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feat: handle nested calls in witgen (#10384)
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Please read [contributing guidelines](CONTRIBUTING.md) and remove this
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---------

Co-authored-by: David Banks <[email protected]>
Co-authored-by: dbanks12 <[email protected]>
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3 people authored Dec 9, 2024
1 parent ead9c0b commit 1e21f31
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Showing 25 changed files with 525 additions and 559 deletions.
44 changes: 22 additions & 22 deletions barretenberg/cpp/pil/avm/main.pil
Original file line number Diff line number Diff line change
Expand Up @@ -405,29 +405,29 @@ namespace main(256);
// - We then write the return location (pc + 5) into the call stack (in memory), whereby the constant 5
// corresponds to the size of the internal_call instruction in bytes.

#[RETURN_POINTER_INCREMENT]
sel_op_internal_call * (internal_return_ptr' - (internal_return_ptr + 1)) = 0;
sel_op_internal_call * (internal_return_ptr - mem_addr_b) = 0;
sel_op_internal_call * (pc' - ia) = 0;
sel_op_internal_call * ((pc + 5) - ib) = 0; // 5 = size in bytes of internal call instruction
//#[RETURN_POINTER_INCREMENT]
////sel_op_internal_call * (internal_return_ptr' - (internal_return_ptr + 1)) = 0;
//sel_op_internal_call * (internal_return_ptr - mem_addr_b) = 0;
//sel_op_internal_call * (pc' - ia) = 0;
//sel_op_internal_call * ((pc + 5) - ib) = 0; // 5 = size in bytes of internal call instruction

// TODO(md): Below relations may be removed through sub-op table lookup
sel_op_internal_call * (rwb - 1) = 0;
sel_op_internal_call * (sel_mem_op_b - 1) = 0;
//sel_op_internal_call * (rwb - 1) = 0;
//sel_op_internal_call * (sel_mem_op_b - 1) = 0;

//===== INTERNAL_RETURN ===================================================
// - We load the memory pointer to be the internal_return_ptr
// - Constrain then next program counter to be the loaded value
// - decrement the internal_return_ptr

#[RETURN_POINTER_DECREMENT]
sel_op_internal_return * (internal_return_ptr' - (internal_return_ptr - 1)) = 0;
sel_op_internal_return * ((internal_return_ptr - 1) - mem_addr_a) = 0;
sel_op_internal_return * (pc' - ia) = 0;
//#[RETURN_POINTER_DECREMENT]
//sel_op_internal_return * (internal_return_ptr' - (internal_return_ptr - 1)) = 0;
//sel_op_internal_return * ((internal_return_ptr - 1) - mem_addr_a) = 0;
//sel_op_internal_return * (pc' - ia) = 0;

// TODO(md): Below relations may be removed through sub-op table lookup
sel_op_internal_return * rwa = 0;
sel_op_internal_return * (sel_mem_op_a - 1) = 0;
//sel_op_internal_return * rwa = 0;
//sel_op_internal_return * (sel_mem_op_a - 1) = 0;

//===== CONTROL_FLOW_CONSISTENCY ============================================
pol SEL_ALL_CTRL_FLOW = sel_op_jump + sel_op_jumpi + sel_op_internal_call
Expand Down Expand Up @@ -466,17 +466,17 @@ namespace main(256);

// When considering two adjacent main trace rows,
// the internal return ptr must stay the same if not jumping or returning.
#[INTERNAL_RETURN_POINTER_CONSISTENCY]
CUR_AND_NEXT_ARE_MAIN * (1 - SEL_ALL_CTRL_FLOW) * (internal_return_ptr' - internal_return_ptr) = 0;
// #[INTERNAL_RETURN_POINTER_CONSISTENCY]
// CUR_AND_NEXT_ARE_MAIN * (1 - SEL_ALL_CTRL_FLOW) * (internal_return_ptr' - internal_return_ptr) = 0;
// TODO: for external_call and external_return the internal_return_ptr will
// actually have to be reset (to zero for an external call) or resumed
// (for an external return) and that the space_id/call_ptr will be incremented.

// TODO: we want to set an initial number for the reserved memory of the jump pointer

//====== SPACE ID CONSTRAINTS ===============================================
#[SPACE_ID_INTERNAL]
(sel_op_internal_call + sel_op_internal_return) * (space_id - constants_misc.INTERNAL_CALL_SPACE_ID) = 0;
//#[SPACE_ID_INTERNAL]
//(sel_op_internal_call + sel_op_internal_return) * (space_id - constants_misc.INTERNAL_CALL_SPACE_ID) = 0;

#[SPACE_ID_STANDARD_OPCODES]
(1 - sel_op_internal_call - sel_op_internal_return) * (call_ptr - space_id) = 0;
Expand Down Expand Up @@ -532,7 +532,7 @@ namespace main(256);
pol commit sel_slice_gadget; // Selector to activate a slice gadget operation in the gadget (#[PERM_MAIN_SLICE]).

// Activate only if op_err is disabled or retsize (ib) is non-zero
ib * (1 - op_err) * (sel_op_calldata_copy + sel_op_external_return - sel_slice_gadget)= 0;
// ib * (1 - op_err) * (sel_op_calldata_copy + sel_op_external_return - sel_slice_gadget)= 0;

//====== Inter-table Constraints ============================================

Expand Down Expand Up @@ -592,10 +592,10 @@ namespace main(256);
//is
//keccakf1600.sel_keccakf1600 {keccakf1600.clk, keccakf1600.input, keccakf1600.output};

#[PERM_MAIN_SLICE]
sel_slice_gadget {clk, space_id, ia, ib, mem_addr_c, sel_op_calldata_copy, sel_op_external_return}
is
slice.sel_start {slice.clk, slice.space_id, slice.col_offset, slice.cnt, slice.addr, slice.sel_cd_cpy, slice.sel_return};
//#[PERM_MAIN_SLICE]
//sel_slice_gadget {clk, space_id, ia, ib, mem_addr_c, sel_op_calldata_copy, sel_op_external_return}
//is
//slice.sel_start {slice.clk, slice.space_id, slice.col_offset, slice.cnt, slice.addr, slice.sel_cd_cpy, slice.sel_return};

#[PERM_MAIN_MEM_A]
sel_mem_op_a {clk, space_id, mem_addr_a, ia, rwa, r_in_tag, w_in_tag, sel_mov_ia_to_ic}
Expand Down
173 changes: 84 additions & 89 deletions barretenberg/cpp/src/barretenberg/vm/avm/generated/flavor.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -735,92 +735,90 @@ AvmFlavor::AllConstRefValues::AllConstRefValues(
, perm_main_conv_inv(il[727])
, perm_main_sha256_inv(il[728])
, perm_main_pos2_perm_inv(il[729])
, perm_main_slice_inv(il[730])
, perm_main_mem_a_inv(il[731])
, perm_main_mem_b_inv(il[732])
, perm_main_mem_c_inv(il[733])
, perm_main_mem_d_inv(il[734])
, perm_main_mem_ind_addr_a_inv(il[735])
, perm_main_mem_ind_addr_b_inv(il[736])
, perm_main_mem_ind_addr_c_inv(il[737])
, perm_main_mem_ind_addr_d_inv(il[738])
, lookup_rng_chk_pow_2_inv(il[739])
, lookup_rng_chk_diff_inv(il[740])
, lookup_rng_chk_0_inv(il[741])
, lookup_rng_chk_1_inv(il[742])
, lookup_rng_chk_2_inv(il[743])
, lookup_rng_chk_3_inv(il[744])
, lookup_rng_chk_4_inv(il[745])
, lookup_rng_chk_5_inv(il[746])
, lookup_rng_chk_6_inv(il[747])
, lookup_rng_chk_7_inv(il[748])
, lookup_mem_rng_chk_0_inv(il[749])
, lookup_mem_rng_chk_1_inv(il[750])
, lookup_mem_rng_chk_2_inv(il[751])
, lookup_pow_2_0_inv(il[752])
, lookup_pow_2_1_inv(il[753])
, lookup_byte_lengths_inv(il[754])
, lookup_byte_operations_inv(il[755])
, lookup_opcode_gas_inv(il[756])
, lookup_l2_gas_rng_chk_0_inv(il[757])
, lookup_l2_gas_rng_chk_1_inv(il[758])
, lookup_da_gas_rng_chk_0_inv(il[759])
, lookup_da_gas_rng_chk_1_inv(il[760])
, lookup_cd_value_inv(il[761])
, lookup_ret_value_inv(il[762])
, incl_main_tag_err_inv(il[763])
, incl_mem_tag_err_inv(il[764])
, binary_acc_ia_shift(il[765])
, binary_acc_ib_shift(il[766])
, binary_acc_ic_shift(il[767])
, binary_mem_tag_ctr_shift(il[768])
, binary_op_id_shift(il[769])
, cmp_a_hi_shift(il[770])
, cmp_a_lo_shift(il[771])
, cmp_b_hi_shift(il[772])
, cmp_b_lo_shift(il[773])
, cmp_cmp_rng_ctr_shift(il[774])
, cmp_op_gt_shift(il[775])
, cmp_p_sub_a_hi_shift(il[776])
, cmp_p_sub_a_lo_shift(il[777])
, cmp_p_sub_b_hi_shift(il[778])
, cmp_p_sub_b_lo_shift(il[779])
, cmp_sel_rng_chk_shift(il[780])
, main_da_gas_remaining_shift(il[781])
, main_internal_return_ptr_shift(il[782])
, main_l2_gas_remaining_shift(il[783])
, main_pc_shift(il[784])
, main_sel_execution_end_shift(il[785])
, main_sel_execution_row_shift(il[786])
, mem_glob_addr_shift(il[787])
, mem_rw_shift(il[788])
, mem_sel_mem_shift(il[789])
, mem_tag_shift(il[790])
, mem_tsp_shift(il[791])
, mem_val_shift(il[792])
, merkle_tree_leaf_index_shift(il[793])
, merkle_tree_leaf_value_shift(il[794])
, merkle_tree_path_len_shift(il[795])
, poseidon2_full_a_0_shift(il[796])
, poseidon2_full_a_1_shift(il[797])
, poseidon2_full_a_2_shift(il[798])
, poseidon2_full_a_3_shift(il[799])
, poseidon2_full_execute_poseidon_perm_shift(il[800])
, poseidon2_full_input_0_shift(il[801])
, poseidon2_full_input_1_shift(il[802])
, poseidon2_full_input_2_shift(il[803])
, poseidon2_full_num_perm_rounds_rem_shift(il[804])
, poseidon2_full_sel_poseidon_shift(il[805])
, poseidon2_full_start_poseidon_shift(il[806])
, slice_addr_shift(il[807])
, slice_clk_shift(il[808])
, slice_cnt_shift(il[809])
, slice_col_offset_shift(il[810])
, slice_sel_cd_cpy_shift(il[811])
, slice_sel_mem_active_shift(il[812])
, slice_sel_return_shift(il[813])
, slice_sel_start_shift(il[814])
, slice_space_id_shift(il[815])
, perm_main_mem_a_inv(il[730])
, perm_main_mem_b_inv(il[731])
, perm_main_mem_c_inv(il[732])
, perm_main_mem_d_inv(il[733])
, perm_main_mem_ind_addr_a_inv(il[734])
, perm_main_mem_ind_addr_b_inv(il[735])
, perm_main_mem_ind_addr_c_inv(il[736])
, perm_main_mem_ind_addr_d_inv(il[737])
, lookup_rng_chk_pow_2_inv(il[738])
, lookup_rng_chk_diff_inv(il[739])
, lookup_rng_chk_0_inv(il[740])
, lookup_rng_chk_1_inv(il[741])
, lookup_rng_chk_2_inv(il[742])
, lookup_rng_chk_3_inv(il[743])
, lookup_rng_chk_4_inv(il[744])
, lookup_rng_chk_5_inv(il[745])
, lookup_rng_chk_6_inv(il[746])
, lookup_rng_chk_7_inv(il[747])
, lookup_mem_rng_chk_0_inv(il[748])
, lookup_mem_rng_chk_1_inv(il[749])
, lookup_mem_rng_chk_2_inv(il[750])
, lookup_pow_2_0_inv(il[751])
, lookup_pow_2_1_inv(il[752])
, lookup_byte_lengths_inv(il[753])
, lookup_byte_operations_inv(il[754])
, lookup_opcode_gas_inv(il[755])
, lookup_l2_gas_rng_chk_0_inv(il[756])
, lookup_l2_gas_rng_chk_1_inv(il[757])
, lookup_da_gas_rng_chk_0_inv(il[758])
, lookup_da_gas_rng_chk_1_inv(il[759])
, lookup_cd_value_inv(il[760])
, lookup_ret_value_inv(il[761])
, incl_main_tag_err_inv(il[762])
, incl_mem_tag_err_inv(il[763])
, binary_acc_ia_shift(il[764])
, binary_acc_ib_shift(il[765])
, binary_acc_ic_shift(il[766])
, binary_mem_tag_ctr_shift(il[767])
, binary_op_id_shift(il[768])
, cmp_a_hi_shift(il[769])
, cmp_a_lo_shift(il[770])
, cmp_b_hi_shift(il[771])
, cmp_b_lo_shift(il[772])
, cmp_cmp_rng_ctr_shift(il[773])
, cmp_op_gt_shift(il[774])
, cmp_p_sub_a_hi_shift(il[775])
, cmp_p_sub_a_lo_shift(il[776])
, cmp_p_sub_b_hi_shift(il[777])
, cmp_p_sub_b_lo_shift(il[778])
, cmp_sel_rng_chk_shift(il[779])
, main_da_gas_remaining_shift(il[780])
, main_l2_gas_remaining_shift(il[781])
, main_pc_shift(il[782])
, main_sel_execution_end_shift(il[783])
, main_sel_execution_row_shift(il[784])
, mem_glob_addr_shift(il[785])
, mem_rw_shift(il[786])
, mem_sel_mem_shift(il[787])
, mem_tag_shift(il[788])
, mem_tsp_shift(il[789])
, mem_val_shift(il[790])
, merkle_tree_leaf_index_shift(il[791])
, merkle_tree_leaf_value_shift(il[792])
, merkle_tree_path_len_shift(il[793])
, poseidon2_full_a_0_shift(il[794])
, poseidon2_full_a_1_shift(il[795])
, poseidon2_full_a_2_shift(il[796])
, poseidon2_full_a_3_shift(il[797])
, poseidon2_full_execute_poseidon_perm_shift(il[798])
, poseidon2_full_input_0_shift(il[799])
, poseidon2_full_input_1_shift(il[800])
, poseidon2_full_input_2_shift(il[801])
, poseidon2_full_num_perm_rounds_rem_shift(il[802])
, poseidon2_full_sel_poseidon_shift(il[803])
, poseidon2_full_start_poseidon_shift(il[804])
, slice_addr_shift(il[805])
, slice_clk_shift(il[806])
, slice_cnt_shift(il[807])
, slice_col_offset_shift(il[808])
, slice_sel_cd_cpy_shift(il[809])
, slice_sel_mem_active_shift(il[810])
, slice_sel_return_shift(il[811])
, slice_sel_start_shift(il[812])
, slice_space_id_shift(il[813])
{}

AvmFlavor::ProverPolynomials::ProverPolynomials(ProvingKey& proving_key)
Expand Down Expand Up @@ -1567,7 +1565,6 @@ AvmFlavor::AllConstRefValues AvmFlavor::ProverPolynomials::get_row(size_t row_id
perm_main_conv_inv[row_idx],
perm_main_sha256_inv[row_idx],
perm_main_pos2_perm_inv[row_idx],
perm_main_slice_inv[row_idx],
perm_main_mem_a_inv[row_idx],
perm_main_mem_b_inv[row_idx],
perm_main_mem_c_inv[row_idx],
Expand Down Expand Up @@ -1619,7 +1616,6 @@ AvmFlavor::AllConstRefValues AvmFlavor::ProverPolynomials::get_row(size_t row_id
cmp_p_sub_b_lo_shift[row_idx],
cmp_sel_rng_chk_shift[row_idx],
main_da_gas_remaining_shift[row_idx],
main_internal_return_ptr_shift[row_idx],
main_l2_gas_remaining_shift[row_idx],
main_pc_shift[row_idx],
main_sel_execution_end_shift[row_idx],
Expand Down Expand Up @@ -2361,7 +2357,6 @@ AvmFlavor::CommitmentLabels::CommitmentLabels()
Base::perm_main_conv_inv = "PERM_MAIN_CONV_INV";
Base::perm_main_sha256_inv = "PERM_MAIN_SHA256_INV";
Base::perm_main_pos2_perm_inv = "PERM_MAIN_POS2_PERM_INV";
Base::perm_main_slice_inv = "PERM_MAIN_SLICE_INV";
Base::perm_main_mem_a_inv = "PERM_MAIN_MEM_A_INV";
Base::perm_main_mem_b_inv = "PERM_MAIN_MEM_B_INV";
Base::perm_main_mem_c_inv = "PERM_MAIN_MEM_C_INV";
Expand Down
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