arm64/esr: Document ISS for ZT0 being disabled

SME2 defines a new ISS code for use when trapping acesses to ZT0, add a definition for it. Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
AsahiLinux · Jan 20, 2023 · 8ef5560 · 8ef5560
1 parent 4edc117
commit 8ef5560
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
@@ -341,6 +341,7 @@
 #define ESR_ELx_SME_ISS_ILL		1
 #define ESR_ELx_SME_ISS_SM_DISABLED	2
 #define ESR_ELx_SME_ISS_ZA_DISABLED	3
+#define ESR_ELx_SME_ISS_ZT_DISABLED	4
 
 #ifndef __ASSEMBLY__
 #include <asm/types.h>