fix: missing IPCC enable for C2 in several examples from stm32CubeWB

This fix is coming from STMicroelectronics/STM32CubeWB#19 Signed-off-by: Francois Ramu <[email protected]>
AresMaster · Dec 2, 2021 · 4d9fd31 · 4d9fd31
1 parent ac3469e
commit 4d9fd31
Showing 1 changed file with 6 additions and 0 deletions.
diff --git a/src/utility/STM32Cube_FW/hw_ipcc.c b/src/utility/STM32Cube_FW/hw_ipcc.c
@@ -107,6 +107,12 @@ void IPCC_C1_TX_IRQHandler(void)
  ******************************************************************************/
 void HW_IPCC_Enable( void )
 {
+  /**
+  * Such as IPCC IP available to the CPU2, it is required to keep the IPCC clock running
+    when FUS is running on CPU2 and CPU1 enters deep sleep mode
+  */
+  LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC);
+
   /**
    * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2
    */