Fix backend transpilation issues (S.K. Synthesis, scheduling, custom definitions) #27
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MaxleDrut
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February 16, 2024 09:52
Since the release of 1.0, our current limits on the version of qiskit-terra and aer were not enough to enforce Qiskit to be < 0.45. We now enforce it explicitely, as we have not yet migrated to version 1.0.
We were not properly mapping the virtual to physical qubits in our custom pass manager, which resulted in the impossibility of using the full capabilities of our backends. Indeed, this prevented from defining circuits with multiple quantum registries that Qiskit would have been able to a single physical registry to run on. This commit addresses that, adding a Layout when applying the custom pass manager of our backends to ensure we can map qubits to physical registries.
We are missing this step to be able to transpile circuits with custom defined gates (such as Margolus). The gates are now unrolled to their lowest definitions before being synthetized.
We used to apply the SK synthesis algorithm to the CZ & CCZ gates. This behaviour was inappropriate as these gates are discrete gates, and should not be approximated like a continuous one (e.g.: rZ(theta)). The CZ & CCZ should rather be replaced by CX & CCX respectively in the "Basis Translation" step of transpilation instead. This commit does this by removing CZ & CCZ from the list of gates to synthesize, so they will be ignored by the SK synthesis step.
MaxleDrut
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That looked painful, congrats for getting to the bottom of it! 💯 |
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