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Define soft-float PCS for AArch64 #232

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merged 1 commit into from
Feb 7, 2024

Commits on Feb 7, 2024

  1. Define soft-float PCS for AArch64

    With the release of the Cortex-R82, we now have an AArch64 CPU which can
    be built without any floating-point instructions or registers, so I
    think we should re-consider our decision to not have a soft-float
    variant of the AArch64 PCS.
    
    I've worded this as a variant over the base PCS, to keep it simple.
    
    No compiler implements this yet, but clang does already allow passing
    floating-point types without an FPU, and seems to implement the first
    bullet point correctly. I'm working on LLVM patches which will
    implement bullet points 2 and 3.
    
    GCC doesn't currently allow any use of floating-point types without an
    FPU for AArch64, so we don't need to worry about compatibility with
    existing code there.
    
    For the fourth bullet point, I don't think we need to define the PCS for
    vector types, because these are only defined by the ACLE when the
    relevant hardware exists.
    ostannard committed Feb 7, 2024
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