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rockchip: fix kernel 5.10 build error (coolsnowwolf#10017)
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47 changes: 47 additions & 0 deletions
47
target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts
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|---|---|---|
| @@ -0,0 +1,47 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| /* | ||
| * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. | ||
| * (http://www.friendlyarm.com) | ||
| * | ||
| * Copyright (c) 2021 Tianling Shen <[email protected]> | ||
| */ | ||
|
|
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| /dts-v1/; | ||
|
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| #include "rk3328-nanopi-r2s.dts" | ||
|
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| / { | ||
| model = "FriendlyElec NanoPi R2C"; | ||
| compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; | ||
| }; | ||
|
|
||
| &gmac2io { | ||
| phy-handle = <&yt8521s>; | ||
|
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| mdio { | ||
| /delete-node/ ethernet-phy@1; | ||
|
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| yt8521s: ethernet-phy@3 { | ||
| compatible = "ethernet-phy-id0000.011a", | ||
| "ethernet-phy-ieee802.3-c22"; | ||
| reg = <3>; | ||
| pinctrl-0 = <ð_phy_reset_pin>; | ||
| pinctrl-names = "default"; | ||
| reset-assert-us = <10000>; | ||
| reset-deassert-us = <50000>; | ||
| reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; | ||
| }; | ||
| }; | ||
| }; | ||
|
|
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| &lan_led { | ||
| label = "nanopi-r2c:green:lan"; | ||
| }; | ||
|
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| &sys_led { | ||
| label = "nanopi-r2c:red:sys"; | ||
| }; | ||
|
|
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| &wan_led { | ||
| label = "nanopi-r2c:green:wan"; | ||
| }; |
70 changes: 70 additions & 0 deletions
70
...et/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
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| @@ -0,0 +1,70 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| #include "rk3328-orangepi-r1-plus.dts" | ||
|
|
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| / { | ||
| model = "Xunlong Orange Pi R1 Plus LTS"; | ||
| compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; | ||
| }; | ||
|
|
||
| /delete-node/ &rtl8211e; | ||
| &gmac2io { | ||
| phy-handle = <ðphy3>; | ||
| snps,reset-delays-us = <0 15000 50000>; | ||
| tx_delay = <0x19>; | ||
| rx_delay = <0x05>; | ||
| status = "okay"; | ||
|
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| mdio { | ||
| compatible = "snps,dwmac-mdio"; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
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| ethphy3: ethernet-phy@0 { | ||
| reg = <0x0>; | ||
| keep-clkout-on; | ||
| reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; | ||
| }; | ||
| }; | ||
| }; | ||
|
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| &sdmmc { | ||
| bus-width = <4>; | ||
| cap-sd-highspeed; | ||
| disable-wp; | ||
| pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; | ||
| pinctrl-names = "default"; | ||
| sd-uhs-sdr12; | ||
| sd-uhs-sdr25; | ||
| sd-uhs-sdr50; | ||
| sd-uhs-sdr104; | ||
| vmmc-supply = <&vcc_sd>; | ||
| vqmmc-supply = <&vcc_io_sdio>; | ||
| status = "okay"; | ||
| }; | ||
|
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| &dmc_opp_table { | ||
| opp-1056000000 { | ||
| status = "disabled"; | ||
| }; | ||
| opp-924000000 { | ||
| status = "disabled"; | ||
| }; | ||
| opp-840000000 { | ||
| status = "disabled"; | ||
| }; | ||
| opp-798000000 { | ||
| status = "disabled"; | ||
| }; | ||
| }; | ||
|
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| &sys_led { | ||
| label = "orangepi-r1-plus-lts:red:sys"; | ||
| }; | ||
|
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| &wan_led { | ||
| label = "orangepi-r1-plus-lts:green:wan"; | ||
| }; | ||
|
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| &lan_led { | ||
| label = "orangepi-r1-plus-lts:green:lan"; | ||
| }; |
39 changes: 39 additions & 0 deletions
39
target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,39 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| #include "rk3328-nanopi-r2s.dts" | ||
|
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| / { | ||
| model = "Xunlong Orange Pi R1 Plus"; | ||
| compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; | ||
| }; | ||
|
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| &lan_led { | ||
| label = "orangepi-r1-plus:green:lan"; | ||
| }; | ||
|
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| &spi0 { | ||
| max-freq = <48000000>; | ||
| status = "okay"; | ||
|
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| flash@0 { | ||
| compatible = "jedec,spi-nor"; | ||
| reg = <0>; | ||
| spi-max-frequency = <10000000>; | ||
| }; | ||
| }; | ||
|
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| &sys_led { | ||
| gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; | ||
| label = "orangepi-r1-plus:red:sys"; | ||
| }; | ||
|
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| &sys_led_pin { | ||
| rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; | ||
| }; | ||
|
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| &uart1 { | ||
| status = "okay"; | ||
| }; | ||
|
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| &wan_led { | ||
| label = "orangepi-r1-plus:green:wan"; | ||
| }; |
8 changes: 8 additions & 0 deletions
8
target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
|
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| /dts-v1/; | ||
| / { | ||
| model = "FriendlyElec NanoPi R5S"; | ||
| compatible = "friendlyelec,nanopi-r5s", "rockchip,rk3568"; | ||
| }; |
8 changes: 8 additions & 0 deletions
8
target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| // SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
|
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| /dts-v1/; | ||
| / { | ||
| model = "FastRhino R66S"; | ||
| compatible = "fastrhino,r66s", "rockchip,rk3568"; | ||
| }; | ||
|
|
7 changes: 7 additions & 0 deletions
7
target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,7 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
|
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| /dts-v1/; | ||
| / { | ||
| model = "Radxa ROCK3 Model A"; | ||
| compatible = "radxa,rock3a", "rockchip,rk3568"; | ||
| }; |
11 changes: 11 additions & 0 deletions
11
target/linux/rockchip/files-5.10/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,11 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| /* | ||
| * Copyright (c) 2021 Rockchip Electronics Co., Ltd. | ||
| * | ||
| */ | ||
|
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| /dts-v1/; | ||
| / { | ||
| model = "Firefly Station P2"; | ||
| compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -7,54 +7,4 @@ | |
| +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb | ||
| dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb | ||
| dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb | ||
| dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb | ||
| --- /dev/null | ||
| +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts | ||
| @@ -0,0 +1,47 @@ | ||
| +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| +/* | ||
| + * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. | ||
| + * (http://www.friendlyarm.com) | ||
| + * | ||
| + * Copyright (c) 2021 Tianling Shen <[email protected]> | ||
| + */ | ||
| + | ||
| +/dts-v1/; | ||
| + | ||
| +#include "rk3328-nanopi-r2s.dts" | ||
| + | ||
| +/ { | ||
| + model = "FriendlyElec NanoPi R2C"; | ||
| + compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; | ||
| +}; | ||
| + | ||
| +&gmac2io { | ||
| + phy-handle = <&yt8521s>; | ||
| + | ||
| + mdio { | ||
| + /delete-node/ ethernet-phy@1; | ||
| + | ||
| + yt8521s: ethernet-phy@3 { | ||
| + compatible = "ethernet-phy-id0000.011a", | ||
| + "ethernet-phy-ieee802.3-c22"; | ||
| + reg = <3>; | ||
| + pinctrl-0 = <ð_phy_reset_pin>; | ||
| + pinctrl-names = "default"; | ||
| + reset-assert-us = <10000>; | ||
| + reset-deassert-us = <50000>; | ||
| + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; | ||
| + }; | ||
| + }; | ||
| +}; | ||
| + | ||
| +&lan_led { | ||
| + label = "nanopi-r2c:green:lan"; | ||
| +}; | ||
| + | ||
| +&sys_led { | ||
| + label = "nanopi-r2c:red:sys"; | ||
| +}; | ||
| + | ||
| +&wan_led { | ||
| + label = "nanopi-r2c:green:wan"; | ||
| +}; | ||
| dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb | ||
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