From 2b48c13ebf19644f809ae6da4eecb24639bd18ef Mon Sep 17 00:00:00 2001 From: zhaqian <80608733+zhaqian12@users.noreply.github.com> Date: Sat, 6 May 2023 16:18:22 +0800 Subject: [PATCH] init the support of stm32f4xx --- README.md | 3 + bootloader/ST/cherryuf2_stm32f401ccu6.bin | Bin 0 -> 12044 bytes bootloader/ST/cherryuf2_stm32f407zgt6.bin | Bin 0 -> 12304 bytes bootloader/ST/cherryuf2_stm32f411ceu6.bin | Bin 0 -> 12048 bytes ports/ST/stm32f0xx/boards.c | 196 +++---- ports/ST/stm32f1xx/boards.c | 18 +- ports/ST/stm32f4xx/Makefile | 8 + ports/ST/stm32f4xx/board_flash.c | 158 ++++++ ports/ST/stm32f4xx/boards.c | 205 +++++++ ports/ST/stm32f4xx/boards.h | 49 ++ .../ST/stm32f4xx/boards/stm32f401ccu6/board.h | 85 +++ .../stm32f4xx/boards/stm32f401ccu6/board.mk | 14 + .../ST/stm32f4xx/boards/stm32f407zgt6/board.h | 87 +++ .../stm32f4xx/boards/stm32f407zgt6/board.mk | 14 + .../ST/stm32f4xx/boards/stm32f411ceu6/board.h | 85 +++ .../stm32f4xx/boards/stm32f411ceu6/board.mk | 14 + ports/ST/stm32f4xx/ld/STM32F401XC_FLASH.ld | 191 +++++++ ports/ST/stm32f4xx/ld/STM32F407XG_FLASH.ld | 211 ++++++++ ports/ST/stm32f4xx/ld/STM32F411XE_FLASH.ld | 191 +++++++ ports/ST/stm32f4xx/port.mk | 46 ++ ports/ST/stm32f4xx/stm32f4xx_hal_conf.h | 500 ++++++++++++++++++ ports/ST/stm32f4xx/usb_config.h | 161 ++++++ ports/ST/stm32g4xx/board_flash.c | 2 +- ports/ST/stm32g4xx/boards.c | 14 + ports/ST/stm32l4xx/board_flash.c | 2 +- ports/ST/stm32l4xx/boards.c | 20 + sdk/ST/stm32f4xx_library/cmsis_device_f4 | 1 + sdk/ST/stm32f4xx_library/stm32f4xx_hal_driver | 1 + src/ghostfat.c | 2 +- 29 files changed, 2177 insertions(+), 101 deletions(-) create mode 100644 bootloader/ST/cherryuf2_stm32f401ccu6.bin create mode 100644 bootloader/ST/cherryuf2_stm32f407zgt6.bin create mode 100644 bootloader/ST/cherryuf2_stm32f411ceu6.bin create mode 100644 ports/ST/stm32f4xx/Makefile create mode 100644 ports/ST/stm32f4xx/board_flash.c create mode 100644 ports/ST/stm32f4xx/boards.c create mode 100644 ports/ST/stm32f4xx/boards.h create mode 100644 ports/ST/stm32f4xx/boards/stm32f401ccu6/board.h create mode 100644 ports/ST/stm32f4xx/boards/stm32f401ccu6/board.mk create mode 100644 ports/ST/stm32f4xx/boards/stm32f407zgt6/board.h create mode 100644 ports/ST/stm32f4xx/boards/stm32f407zgt6/board.mk create mode 100644 ports/ST/stm32f4xx/boards/stm32f411ceu6/board.h create mode 100644 ports/ST/stm32f4xx/boards/stm32f411ceu6/board.mk create mode 100644 ports/ST/stm32f4xx/ld/STM32F401XC_FLASH.ld create mode 100644 ports/ST/stm32f4xx/ld/STM32F407XG_FLASH.ld create mode 100644 ports/ST/stm32f4xx/ld/STM32F411XE_FLASH.ld create mode 100644 ports/ST/stm32f4xx/port.mk create mode 100644 ports/ST/stm32f4xx/stm32f4xx_hal_conf.h create mode 100644 ports/ST/stm32f4xx/usb_config.h create mode 160000 sdk/ST/stm32f4xx_library/cmsis_device_f4 create mode 160000 sdk/ST/stm32f4xx_library/stm32f4xx_hal_driver diff --git a/README.md b/README.md index 77166ea..9805fd4 100644 --- a/README.md +++ b/README.md @@ -26,6 +26,9 @@ It only supports DFU with MSC. | ArteryTek | AT32F415 | | | ST | STM32F072 | Need to copy the vector table from the Flash to the base address of the SRAM at 0x20000000 in app | | ST | STM32F103 | | +| ST | STM32F401 | | +| ST | STM32F407 | | +| ST | STM32F411 | | | ST | STM32G431 | | | ST | STM32L433 | | | WCH | CH32V307 | | diff --git a/bootloader/ST/cherryuf2_stm32f401ccu6.bin b/bootloader/ST/cherryuf2_stm32f401ccu6.bin new file mode 100644 index 0000000000000000000000000000000000000000..806bcb838c8b00426e2a95d951d0869f65e603a9 GIT binary patch literal 12044 zcmeHteOyylw&*?|`5;6H33ed(5puMJ#E+0TtyQbxBpgYif}&GJXPWR~4`PL)ZRyt~ zsm>eJcB(>eE!d6~XQtDcqG0VCv<_D7Ogm0z64d)ZZ>Nl2iNbArBEcMj4R`GTt(|%E z-o5wtd%yS3gx@)P?{(JRd#$zCUTf{OxigA%*C{0bF8#L;`m5gr4hG};_jP~UX9DNH zQ~uR-@j3oG<4p9Kp!4qb-E(00e+Flw|3rEB7sYv!Fy@tI>u2Gp!uwtNQN~)ktrUpngEhI}de#>+Q=%g(g zJ1f%b8`zP6RG{ctZ6CK!vBNAG2LK|xU%hl5r{U17!GIV{zOlAMSk zdoQj%S4dmVrM<`wUr2N&E<+5_t8vrjL+r=}LYN&JjdaEcp&?qm^bXhtP)S`OJXo(z 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z$YimU_%xtwIsAvl128l2@X*1KmHT}tpSv2$<6<}Ae~rK(!%s0Gf>JP%eK}-h(jv!t9Ew@~zKSSL*n!Pi$JGSePglmQ__eyJ+E-@)~dT)!HgB!mymj`Lt&ibm z<>py@(|6paF$x>mNSyB14 zZl-PwrG(YxJZ+j~nPr-3nKx(V;}%b)r=rY~J3+Cms-kk!eBBspx{_7PEM{&_Ufu)+ zTji;#nCY<3{{~oFFhODWY^|KHTjqIIr+ZLmHkmCG6i5wX1EE;oLL+a15Mk#gkvfD0 zXHJ69laxz~NtuKst?-{e5hs?lynE7}Ba52{G?y^k`3g@>N-eh?lD%0u%I{=qcgdJ+qY>HIs-|0VvfVws!7%ar9HLFk;ob~Eq7W{K8w->AdH7Q)R46O$E3!`9UTfK5+!SYpD>&76Xh3Z?a Qe>DCffqzKg|CI#(6PK?($^ZZW literal 0 HcmV?d00001 diff --git a/ports/ST/stm32f0xx/boards.c b/ports/ST/stm32f0xx/boards.c index 9037849..87ce435 100644 --- a/ports/ST/stm32f0xx/boards.c +++ b/ports/ST/stm32f0xx/boards.c @@ -27,148 +27,150 @@ //--------------------------------------------------------------------+ // CherryUSB LLD //--------------------------------------------------------------------+ -__attribute__((weak)) void usb_dc_low_level_init(void) -{ - /* Peripheral clock enable */ - __HAL_RCC_USB_CLK_ENABLE(); - /* USB interrupt Init */ - HAL_NVIC_SetPriority(USB_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(USB_IRQn); +__attribute__((weak)) void usb_dc_low_level_init(void) { + /* Peripheral clock enable */ + __HAL_RCC_USB_CLK_ENABLE(); + /* USB interrupt Init */ + HAL_NVIC_SetPriority(USB_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(USB_IRQn); } //--------------------------------------------------------------------+ // Boards api //--------------------------------------------------------------------+ -__attribute__((weak)) void board_init(void) -{ - clock_init(); - SystemCoreClockUpdate(); - - board_timer_stop(); - - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - __HAL_RCC_GPIOF_CLK_ENABLE(); - __HAL_RCC_SYSCFG_CLK_ENABLE(); - __HAL_RCC_PWR_CLK_ENABLE(); - - GPIO_InitTypeDef GPIO_InitStruct = {0}; - - GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +__attribute__((weak)) void board_init(void) { + clock_init(); + SystemCoreClockUpdate(); + + board_timer_stop(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); +#ifdef GPIOD + __HAL_RCC_GPIOD_CLK_ENABLE(); +#endif +#ifdef GPIOE + __HAL_RCC_GPIOE_CLK_ENABLE(); +#endif + __HAL_RCC_GPIOF_CLK_ENABLE(); +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_ENABLE(); +#endif + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); #ifdef LED_PIN - GPIO_InitStruct.Pin = LED_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); - board_led_write(1); + board_led_write(1); #endif } -__attribute__((weak)) void board_dfu_complete(void) -{ - NVIC_SystemReset(); +__attribute__((weak)) void board_dfu_complete(void) { + NVIC_SystemReset(); } -__attribute__((weak)) void board_usb_process(void) -{ - // todo +__attribute__((weak)) void board_usb_process(void) { + // todo } -__attribute__((weak)) bool board_app_valid(void) -{ - volatile uint32_t const *app_vector = (volatile uint32_t const *)BOARD_FLASH_APP_START; +__attribute__((weak)) bool board_app_valid(void) { + volatile uint32_t const *app_vector = (volatile uint32_t const *)BOARD_FLASH_APP_START; - // 2nd word is App entry point (reset) - if (app_vector[1] < BOARD_FLASH_APP_START || app_vector[1] > BOARD_FLASH_APP_START + BOARD_FLASH_SIZE) - { - return false; - } + // 2nd word is App entry point (reset) + if (app_vector[1] < BOARD_FLASH_APP_START || app_vector[1] > BOARD_FLASH_APP_START + BOARD_FLASH_SIZE) { + return false; + } - return true; + return true; } -__attribute__((weak)) void board_app_jump(void) -{ +__attribute__((weak)) void board_app_jump(void) { #ifdef LED_PIN - HAL_GPIO_DeInit(LED_PORT, LED_PIN); + HAL_GPIO_DeInit(LED_PORT, LED_PIN); #endif - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12); + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12); + + __HAL_RCC_GPIOA_CLK_DISABLE(); + __HAL_RCC_GPIOB_CLK_DISABLE(); + __HAL_RCC_GPIOC_CLK_DISABLE(); +#ifdef GPIOD + __HAL_RCC_GPIOD_CLK_DISABLE(); +#endif +#ifdef GPIOE + __HAL_RCC_GPIOE_CLK_DISABLE(); +#endif + __HAL_RCC_GPIOF_CLK_DISABLE(); +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_DISABLE(); +#endif + __HAL_RCC_USB_CLK_DISABLE(); - __HAL_RCC_GPIOA_CLK_DISABLE(); - __HAL_RCC_GPIOB_CLK_DISABLE(); - __HAL_RCC_GPIOC_CLK_DISABLE(); - __HAL_RCC_GPIOD_CLK_DISABLE(); - __HAL_RCC_GPIOF_CLK_DISABLE(); - __HAL_RCC_USB_CLK_DISABLE(); + HAL_RCC_DeInit(); + HAL_DeInit(); - HAL_RCC_DeInit(); - HAL_DeInit(); + SysTick->CTRL = 0; + SysTick->LOAD = 0; + SysTick->VAL = 0; - SysTick->CTRL = 0; - SysTick->LOAD = 0; - SysTick->VAL = 0; + // Disable all Interrupts + NVIC->ICER[0] = 0xFFFFFFFF; + NVIC->ICER[1] = 0xFFFFFFFF; + NVIC->ICER[2] = 0xFFFFFFFF; + NVIC->ICER[3] = 0xFFFFFFFF; - // Disable all Interrupts - NVIC->ICER[0] = 0xFFFFFFFF; - NVIC->ICER[1] = 0xFFFFFFFF; - NVIC->ICER[2] = 0xFFFFFFFF; - NVIC->ICER[3] = 0xFFFFFFFF; + volatile uint32_t const *app_vector = (volatile uint32_t const *)BOARD_FLASH_APP_START; - volatile uint32_t const *app_vector = (volatile uint32_t const *)BOARD_FLASH_APP_START; - - __set_MSP(app_vector[0]); + __set_MSP(app_vector[0]); - typedef void (*BootJump_t)(void); - BootJump_t boot_jump = *(BootJump_t *)(BOARD_FLASH_APP_START + 4); - boot_jump(); + typedef void (*BootJump_t)(void); + BootJump_t boot_jump = *(BootJump_t *)(BOARD_FLASH_APP_START + 4); + boot_jump(); } //--------------------------------------------------------------------+ // LED //--------------------------------------------------------------------+ -void board_led_write(uint32_t state) -{ - (void)state; +void board_led_write(uint32_t state) { + (void)state; #ifdef LED_PIN - HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); + HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); #endif } //--------------------------------------------------------------------+ // Timer //--------------------------------------------------------------------+ -void board_timer_start(uint32_t ms) -{ - SysTick_Config((SystemCoreClock / 1000) * ms); +void board_timer_start(uint32_t ms) { + SysTick_Config((SystemCoreClock / 1000) * ms); } -void board_timer_stop(void) -{ - SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; +void board_timer_stop(void) { + SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -void SysTick_Handler(void) -{ - board_timer_handler(); +void SysTick_Handler(void) { + board_timer_handler(); } -int board_uart_write(void const *buf, int len) -{ - (void)buf; - (void)len; - return 0; +int board_uart_write(void const *buf, int len) { + (void)buf; + (void)len; + return 0; } -void _init(void) -{ -} +void _init(void) {} diff --git a/ports/ST/stm32f1xx/boards.c b/ports/ST/stm32f1xx/boards.c index 01354fe..b683403 100644 --- a/ports/ST/stm32f1xx/boards.c +++ b/ports/ST/stm32f1xx/boards.c @@ -48,8 +48,16 @@ __attribute__((weak)) void board_init(void) { __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); +#ifdef GPIOE __HAL_RCC_GPIOE_CLK_ENABLE(); - __HAL_RCC_SYSCFG_CLK_ENABLE(); +#endif +#ifdef GPIOF + __HAL_RCC_GPIOF_CLK_ENABLE(); +#endif +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_ENABLE(); +#endif + __HAL_RCC_AFIO_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE(); GPIO_InitTypeDef GPIO_InitStruct = {0}; @@ -103,7 +111,15 @@ __attribute__((weak)) void board_app_jump(void) { __HAL_RCC_GPIOB_CLK_DISABLE(); __HAL_RCC_GPIOC_CLK_DISABLE(); __HAL_RCC_GPIOD_CLK_DISABLE(); +#ifdef GPIOE __HAL_RCC_GPIOE_CLK_DISABLE(); +#endif +#ifdef GPIOF + __HAL_RCC_GPIOF_CLK_DISABLE(); +#endif +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_DISABLE(); +#endif __HAL_RCC_AFIO_CLK_DISABLE(); __HAL_RCC_USB_CLK_DISABLE(); diff --git a/ports/ST/stm32f4xx/Makefile b/ports/ST/stm32f4xx/Makefile new file mode 100644 index 0000000..bfb8c39 --- /dev/null +++ b/ports/ST/stm32f4xx/Makefile @@ -0,0 +1,8 @@ +# Port Makefile +PORTS ?= ST +include ../../make.mk +include port.mk +include ../../rules.mk + +self-update: + @echo "not implemented yet" diff --git a/ports/ST/stm32f4xx/board_flash.c b/ports/ST/stm32f4xx/board_flash.c new file mode 100644 index 0000000..0612d7d --- /dev/null +++ b/ports/ST/stm32f4xx/board_flash.c @@ -0,0 +1,158 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Zhaqian + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "board_api.h" + +//--------------------------------------------------------------------+ +// FLASH +//--------------------------------------------------------------------+ +#define FLASH_BASE_ADDR 0x08000000UL + +// clang-format off +/* flash parameters that we should not really know */ +static const uint32_t sector_size[] = +{ + // First 4 sectors are for bootloader (64KB) + 16 * 1024, + 16 * 1024, + 16 * 1024, + 16 * 1024, + // Application (BOARD_FLASH_APP_START) + 64 * 1024, + 128 * 1024, + 128 * 1024, + 128 * 1024, + + // flash sectors only in 1 MB devices + 128 * 1024, + 128 * 1024, + 128 * 1024, + 128 * 1024, + + // flash sectors only in 2 MB devices + 16 * 1024, + 16 * 1024, + 16 * 1024, + 16 * 1024, + 64 * 1024, + 128 * 1024, + 128 * 1024, + 128 * 1024, + 128 * 1024, + 128 * 1024, + 128 * 1024, + 128 * 1024 +}; + +enum { + SECTOR_COUNT = sizeof(sector_size)/sizeof(sector_size[0]) +}; + +// clang-format on +static uint8_t erased_sectors[SECTOR_COUNT] = {0}; + +static bool is_blank(uint32_t addr, uint32_t size) { + for (uint32_t i = 0; i < size; i += sizeof(uint32_t)) { + if (*(uint32_t *)(addr + i) != 0xffffffff) { + return false; + } + } + return true; +} + +static bool flash_erase(uint32_t addr) { + // starting address from 0x08000000 + uint32_t sector_addr = FLASH_BASE_ADDR; + bool erased = false; + + uint32_t sector = 0; + uint32_t size = 0; + (void)sector; + for (uint32_t i = 0; i < SECTOR_COUNT; i++) { + size = sector_size[i]; + if (sector_addr + size > addr) { + sector = i; + erased = erased_sectors[i]; + erased_sectors[i] = 1; // don't erase anymore - we will continue writing here! + break; + } + sector_addr += size; + } + + if (!erased && !is_blank(sector_addr, size)) { + FLASH_Erase_Sector(sector, FLASH_VOLTAGE_RANGE_3); + FLASH_WaitForLastOperation(HAL_MAX_DELAY); + } + + return true; +} + +static void flash_write(uint32_t dst, const uint8_t *src, int len) { + flash_erase(dst); + + for (int i = 0; i < len; i += 4) { + uint32_t data = *((uint32_t *)((void *)(src + i))); + if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, dst + i, (uint64_t)data) != HAL_OK) { + break; + } + + if (FLASH_WaitForLastOperation(HAL_MAX_DELAY) != HAL_OK) { + return; + } + } + + // verify contents + if (memcmp((void *)dst, src, len) != 0) { + } +} + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ +__attribute__((weak)) void board_flash_init(void) {} + +__attribute__((weak)) uint32_t board_flash_size(void) { + return BOARD_FLASH_SIZE; +} + +void board_flash_read(uint32_t addr, void *buffer, uint32_t len) { + memcpy(buffer, (void *)addr, len); +} + +__attribute__((weak)) void board_flash_flush(void) {} + +__attribute__((weak)) void board_flash_write(uint32_t addr, void const *data, uint32_t len) { + HAL_FLASH_Unlock(); + flash_write(addr, data, len); + HAL_FLASH_Lock(); +} + +__attribute__((weak)) void board_flash_erase_app(void) {} + +#ifdef CHERRYUF2_SELF_UPDATE +void board_self_update(const uint8_t *bootloader_bin, uint32_t bootloader_len) { + (void)bootloader_bin; + (void)bootloader_len; +} +#endif diff --git a/ports/ST/stm32f4xx/boards.c b/ports/ST/stm32f4xx/boards.c new file mode 100644 index 0000000..f3bda06 --- /dev/null +++ b/ports/ST/stm32f4xx/boards.c @@ -0,0 +1,205 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Zhaqian + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "board_api.h" + +//--------------------------------------------------------------------+ +// CherryUSB LLD +//--------------------------------------------------------------------+ +__attribute__((weak)) void usb_dc_low_level_init(void) { + GPIO_InitTypeDef GPIO_InitStruct; + + // USB Pin Init + // PA9- VUSB, PA11- DM, PA12- DP + + /* Configure DM DP Pins */ + GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Configure VBUS Pin */ +#ifdef CONFIG_DWC2_VBUS_SENSING_ENABLE + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +#endif + + /* Peripheral clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + + /* Peripheral interrupt init */ + HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(OTG_FS_IRQn); +} + +//--------------------------------------------------------------------+ +// Boards api +//--------------------------------------------------------------------+ +__attribute__((weak)) void board_init(void) { + clock_init(); + SystemCoreClockUpdate(); + + board_timer_stop(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); +#ifdef GPIOD + __HAL_RCC_GPIOD_CLK_ENABLE(); +#endif +#ifdef GPIOE + __HAL_RCC_GPIOE_CLK_ENABLE(); +#endif +#ifdef GPIOF + __HAL_RCC_GPIOF_CLK_ENABLE(); +#endif +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_ENABLE(); +#endif + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + +#ifdef LED_PIN + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + + board_led_write(1); +#endif +} + +__attribute__((weak)) void board_dfu_complete(void) { + NVIC_SystemReset(); +} + +__attribute__((weak)) void board_usb_process(void) { + // todo +} + +__attribute__((weak)) bool board_app_valid(void) { + volatile uint32_t const *app_vector = (volatile uint32_t const *)BOARD_FLASH_APP_START; + + // 1st word is stack pointer (must be in SRAM region) + if ((app_vector[0] & 0xff000003) != 0x20000000) return false; + + // 2nd word is App entry point (reset) + if (app_vector[1] < BOARD_FLASH_APP_START || app_vector[1] > BOARD_FLASH_APP_START + BOARD_FLASH_SIZE) { + return false; + } + + return true; +} + +__attribute__((weak)) void board_app_jump(void) { +#ifdef LED_PIN + HAL_GPIO_DeInit(LED_PORT, LED_PIN); +#endif + + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12 | GPIO_PIN_11 | GPIO_PIN_9); + + __HAL_RCC_GPIOA_CLK_DISABLE(); + __HAL_RCC_GPIOB_CLK_DISABLE(); + __HAL_RCC_GPIOC_CLK_DISABLE(); +#ifdef GPIOD + __HAL_RCC_GPIOD_CLK_DISABLE(); +#endif +#ifdef GPIOE + __HAL_RCC_GPIOE_CLK_DISABLE(); +#endif +#ifdef GPIOF + __HAL_RCC_GPIOF_CLK_DISABLE(); +#endif +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_DISABLE(); +#endif + __HAL_RCC_GPIOH_CLK_DISABLE(); + __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); + + HAL_RCC_DeInit(); + HAL_DeInit(); + + SysTick->CTRL = 0; + SysTick->LOAD = 0; + SysTick->VAL = 0; + + // Disable all Interrupts + NVIC->ICER[0] = 0xFFFFFFFF; + NVIC->ICER[1] = 0xFFFFFFFF; + NVIC->ICER[2] = 0xFFFFFFFF; + NVIC->ICER[3] = 0xFFFFFFFF; + + volatile uint32_t const *app_vector = (volatile uint32_t const *)BOARD_FLASH_APP_START; + + /* switch exception handlers to the application */ + SCB->VTOR = (uint32_t)BOARD_FLASH_APP_START; + + // Set stack pointer + __set_MSP(app_vector[0]); + __set_PSP(app_vector[0]); + + // Jump to Application Entry + asm("bx %0" ::"r"(app_vector[1])); +} + +//--------------------------------------------------------------------+ +// LED +//--------------------------------------------------------------------+ +void board_led_write(uint32_t state) { + (void)state; +#ifdef LED_PIN + HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); +#endif +} + +//--------------------------------------------------------------------+ +// Timer +//--------------------------------------------------------------------+ +void board_timer_start(uint32_t ms) { + SysTick_Config((SystemCoreClock / 1000) * ms); +} + +void board_timer_stop(void) { + SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; +} + +void SysTick_Handler(void) { + board_timer_handler(); +} + +int board_uart_write(void const *buf, int len) { + (void)buf; + (void)len; + return 0; +} + +void _init(void) {} diff --git a/ports/ST/stm32f4xx/boards.h b/ports/ST/stm32f4xx/boards.h new file mode 100644 index 0000000..82969fa --- /dev/null +++ b/ports/ST/stm32f4xx/boards.h @@ -0,0 +1,49 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Zhaqian + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef BOARDS_H_ +#define BOARDS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "stm32f4xx.h" +#include "stm32f4xx_hal_conf.h" + +#include "board.h" + +// Flash Start Address of Application +#ifndef BOARD_FLASH_APP_START +# define BOARD_FLASH_APP_START 0x08004000 +#endif + +// Double Reset tap to enter DFU +#define CHERRYUF2_DFU_DOUBLE_TAP 1 + +#ifdef __cplusplus +} +#endif + +#endif /* BOARDS_H_ */ diff --git a/ports/ST/stm32f4xx/boards/stm32f401ccu6/board.h b/ports/ST/stm32f4xx/boards/stm32f401ccu6/board.h new file mode 100644 index 0000000..d3caffa --- /dev/null +++ b/ports/ST/stm32f4xx/boards/stm32f401ccu6/board.h @@ -0,0 +1,85 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Zhaqian + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "stm32f4xx.h" + +// clang-format off +//--------------------------------------------------------------------+ +// LED +//--------------------------------------------------------------------+ +#define LED_PORT GPIOA +#define LED_PIN GPIO_PIN_1 +#define LED_STATE_ON 0 + +//--------------------------------------------------------------------+ +// FLASH +//--------------------------------------------------------------------+ +#define BOARD_FLASH_SIZE (1024 * 256) + +//--------------------------------------------------------------------+ +// USB UF2 +//--------------------------------------------------------------------+ +#define USBD_VID 0x00AA +#define USBD_PID 0xAAFF +#define USB_MANUFACTURER "Zhaqian" +#define USB_PRODUCT "STM32F401" + +#define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT +#define UF2_BOARD_ID "STM32F401xC" +#define UF2_VOLUME_LABEL "Zhaqian" +#define UF2_INDEX_URL "https://www.st.com/content/st_com/en.html" + +// clang-format on +//--------------------------------------------------------------------+ +// CLOCK +//--------------------------------------------------------------------+ +static inline void clock_init(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = (HSE_VALUE / 1000000); + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); +} +#endif diff --git a/ports/ST/stm32f4xx/boards/stm32f401ccu6/board.mk b/ports/ST/stm32f4xx/boards/stm32f401ccu6/board.mk new file mode 100644 index 0000000..00ff6d9 --- /dev/null +++ b/ports/ST/stm32f4xx/boards/stm32f401ccu6/board.mk @@ -0,0 +1,14 @@ +CFLAGS += \ + -DSTM32F401xC \ + -DHSE_VALUE=25000000U + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s + +LD_FILES = $(PORT_DIR)/ld/STM32F401XC_FLASH.ld + +# For flash-jlink target +JLINK_DEVICE = stm32f401cc + +flash: flash-jlink +erase: erase-jlink diff --git a/ports/ST/stm32f4xx/boards/stm32f407zgt6/board.h b/ports/ST/stm32f4xx/boards/stm32f407zgt6/board.h new file mode 100644 index 0000000..46a9f0e --- /dev/null +++ b/ports/ST/stm32f4xx/boards/stm32f407zgt6/board.h @@ -0,0 +1,87 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Zhaqian + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "stm32f4xx.h" + +// clang-format off +//--------------------------------------------------------------------+ +// LED +//--------------------------------------------------------------------+ +#define LED_PORT GPIOG +#define LED_PIN GPIO_PIN_8 +#define LED_STATE_ON 0 + +//--------------------------------------------------------------------+ +// FLASH +//--------------------------------------------------------------------+ +#define BOARD_FLASH_SIZE (1024 * 1024) + +#define BOARD_FLASH_APP_START 0x08008000 + +//--------------------------------------------------------------------+ +// USB UF2 +//--------------------------------------------------------------------+ +#define USBD_VID 0x00AA +#define USBD_PID 0xAAFF +#define USB_MANUFACTURER "Zhaqian" +#define USB_PRODUCT "STM32F407" + +#define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT +#define UF2_BOARD_ID "STM32F407xG" +#define UF2_VOLUME_LABEL "Zhaqian" +#define UF2_INDEX_URL "https://www.st.com/content/st_com/en.html" + +// clang-format on +//--------------------------------------------------------------------+ +// CLOCK +//--------------------------------------------------------------------+ +static inline void clock_init(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = (HSE_VALUE / 1000000); + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); +} +#endif diff --git a/ports/ST/stm32f4xx/boards/stm32f407zgt6/board.mk b/ports/ST/stm32f4xx/boards/stm32f407zgt6/board.mk new file mode 100644 index 0000000..0b948e7 --- /dev/null +++ b/ports/ST/stm32f4xx/boards/stm32f407zgt6/board.mk @@ -0,0 +1,14 @@ +CFLAGS += \ + -DSTM32F407xx \ + -DHSE_VALUE=25000000U \ + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s + +LD_FILES = $(PORT_DIR)/ld/STM32F407XG_FLASH.ld + +# For flash-jlink target +JLINK_DEVICE = stm32f407zg + +flash: flash-jlink +erase: erase-jlink diff --git a/ports/ST/stm32f4xx/boards/stm32f411ceu6/board.h b/ports/ST/stm32f4xx/boards/stm32f411ceu6/board.h new file mode 100644 index 0000000..7684876 --- /dev/null +++ b/ports/ST/stm32f4xx/boards/stm32f411ceu6/board.h @@ -0,0 +1,85 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Zhaqian + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "stm32f4xx.h" + +// clang-format off +//--------------------------------------------------------------------+ +// LED +//--------------------------------------------------------------------+ +#define LED_PORT GPIOA +#define LED_PIN GPIO_PIN_1 +#define LED_STATE_ON 0 + +//--------------------------------------------------------------------+ +// FLASH +//--------------------------------------------------------------------+ +#define BOARD_FLASH_SIZE (1024 * 512) + +//--------------------------------------------------------------------+ +// USB UF2 +//--------------------------------------------------------------------+ +#define USBD_VID 0x00AA +#define USBD_PID 0xAAFF +#define USB_MANUFACTURER "Zhaqian" +#define USB_PRODUCT "STM32F411" + +#define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT +#define UF2_BOARD_ID "STM32F411xE" +#define UF2_VOLUME_LABEL "Zhaqian" +#define UF2_INDEX_URL "https://www.st.com/content/st_com/en.html" + +// clang-format on +//--------------------------------------------------------------------+ +// CLOCK +//--------------------------------------------------------------------+ +static inline void clock_init(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = (HSE_VALUE / 1000000); + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); +} +#endif diff --git a/ports/ST/stm32f4xx/boards/stm32f411ceu6/board.mk b/ports/ST/stm32f4xx/boards/stm32f411ceu6/board.mk new file mode 100644 index 0000000..29b83cd --- /dev/null +++ b/ports/ST/stm32f4xx/boards/stm32f411ceu6/board.mk @@ -0,0 +1,14 @@ +CFLAGS += \ + -DSTM32F411xE \ + -DHSE_VALUE=8000000U \ + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s + +LD_FILES = $(PORT_DIR)/ld/STM32F411XE_FLASH.ld + +# For flash-jlink target +JLINK_DEVICE = stm32f411ce + +flash: flash-jlink +erase: erase-jlink diff --git a/ports/ST/stm32f4xx/ld/STM32F401XC_FLASH.ld b/ports/ST/stm32f4xx/ld/STM32F401XC_FLASH.ld new file mode 100644 index 0000000..d353407 --- /dev/null +++ b/ports/ST/stm32f4xx/ld/STM32F401XC_FLASH.ld @@ -0,0 +1,191 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : STM32CubeMX +** +** Abstract : Linker script for STM32F401CCUx series +** 256Kbytes FLASH and 64Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ +_board_dfu_dbl_tap = _estack; + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K - 4 +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/ST/stm32f4xx/ld/STM32F407XG_FLASH.ld b/ports/ST/stm32f4xx/ld/STM32F407XG_FLASH.ld new file mode 100644 index 0000000..9280ac2 --- /dev/null +++ b/ports/ST/stm32f4xx/ld/STM32F407XG_FLASH.ld @@ -0,0 +1,211 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : STM32CubeMX +** +** Abstract : Linker script for STM32F407ZGTx series +** 1024Kbytes FLASH and 192Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ +_board_dfu_dbl_tap = _estack; + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K - 4 +CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/ST/stm32f4xx/ld/STM32F411XE_FLASH.ld b/ports/ST/stm32f4xx/ld/STM32F411XE_FLASH.ld new file mode 100644 index 0000000..00def97 --- /dev/null +++ b/ports/ST/stm32f4xx/ld/STM32F411XE_FLASH.ld @@ -0,0 +1,191 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : STM32CubeMX +** +** Abstract : Linker script for STM32F411CEUx series +** 512Kbytes FLASH and 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ +_board_dfu_dbl_tap = _estack; + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K - 4 +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/ST/stm32f4xx/port.mk b/ports/ST/stm32f4xx/port.mk new file mode 100644 index 0000000..07d1de6 --- /dev/null +++ b/ports/ST/stm32f4xx/port.mk @@ -0,0 +1,46 @@ +UF2_FAMILY_ID ?= 0x57755a57 +CROSS_COMPILE = arm-none-eabi- + +ST_DRIVERS = sdk/ST/stm32f4xx_library/stm32f4xx_hal_driver +ST_CMSIS = sdk/ST/stm32f4xx_library/cmsis_device_f4 +CMSIS_5 = sdk/CMSIS_5 + +# Port Compiler Flags +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -nostdlib -nostartfiles \ + -DUSE_HAL_DRIVER + +# suppress warning caused by vendor mcu driver +CFLAGS += -Wno-error=cast-align -Wno-error=unused-parameter + +# default linker file +LD_FILES ?= $(PORT_DIR)/ld/STM32F401XC_FLASH.ld + +# Port source +SRC_C += \ + $(addprefix $(CURRENT_PATH)/, $(wildcard *.c)) \ + $(ST_CMSIS)/Source/Templates/system_stm32f4xx.c \ + $(ST_DRIVERS)/Src/stm32f4xx_hal.c \ + $(ST_DRIVERS)/Src/stm32f4xx_hal_cortex.c \ + $(ST_DRIVERS)/Src/stm32f4xx_hal_rcc.c \ + $(ST_DRIVERS)/Src/stm32f4xx_hal_gpio.c \ + $(ST_DRIVERS)/Src/stm32f4xx_hal_flash.c \ + $(ST_DRIVERS)/Src/stm32f4xx_hal_flash_ex.c + +# Port include +INC += \ + $(TOP)/$(CMSIS_5)/CMSIS/Core/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_DRIVERS)/Inc + +# Port source for USB +SRC_C += $(CHERRYUSB_DIR)/port/dwc2/usb_dc_dwc2.c + +# Port include for USB port +INC += $(TOP)/$(CHERRYUSB_DIR)/port/dwc2 diff --git a/ports/ST/stm32f4xx/stm32f4xx_hal_conf.h b/ports/ST/stm32f4xx/stm32f4xx_hal_conf.h new file mode 100644 index 0000000..4ea5387 --- /dev/null +++ b/ports/ST/stm32f4xx/stm32f4xx_hal_conf.h @@ -0,0 +1,500 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +// #define HAL_ADC_MODULE_ENABLED +// #define HAL_CAN_MODULE_ENABLED +// /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ +// #define HAL_CRC_MODULE_ENABLED +// #define HAL_CEC_MODULE_ENABLED +// #define HAL_CRYP_MODULE_ENABLED +// #define HAL_DAC_MODULE_ENABLED +// #define HAL_DCMI_MODULE_ENABLED +// #define HAL_DMA_MODULE_ENABLED +// #define HAL_DMA2D_MODULE_ENABLED +// #define HAL_ETH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +// #define HAL_NAND_MODULE_ENABLED +// #define HAL_NOR_MODULE_ENABLED +// #define HAL_PCCARD_MODULE_ENABLED +// #define HAL_SRAM_MODULE_ENABLED +// #define HAL_SDRAM_MODULE_ENABLED +// #define HAL_HASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +// #define HAL_EXTI_MODULE_ENABLED +// #define HAL_I2C_MODULE_ENABLED +// #define HAL_SMBUS_MODULE_ENABLED +// #define HAL_I2S_MODULE_ENABLED +// #define HAL_IWDG_MODULE_ENABLED +// #define HAL_LTDC_MODULE_ENABLED +// #define HAL_DSI_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +// #define HAL_QSPI_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +// #define HAL_RNG_MODULE_ENABLED +// #define HAL_RTC_MODULE_ENABLED +// #define HAL_SAI_MODULE_ENABLED +// #define HAL_SD_MODULE_ENABLED +// #define HAL_SPI_MODULE_ENABLED +// #define HAL_TIM_MODULE_ENABLED +// #define HAL_UART_MODULE_ENABLED +// #define HAL_USART_MODULE_ENABLED +// #define HAL_IRDA_MODULE_ENABLED +// #define HAL_SMARTCARD_MODULE_ENABLED +// #define HAL_WWDG_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +// #define HAL_PCD_MODULE_ENABLED +// #define HAL_HCD_MODULE_ENABLED +// #define HAL_FMPI2C_MODULE_ENABLED +// #define HAL_FMPSMBUS_MODULE_ENABLED +// #define HAL_SPDIFRX_MODULE_ENABLED +// #define HAL_DFSDM_MODULE_ENABLED +// #define HAL_LPTIM_MODULE_ENABLED +// #define HAL_MMC_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ +#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE 1528U /* ETH Max buffer size for receive */ +#define ETH_TX_BUF_SIZE 1528U /* ETH Max buffer size for transmit */ +#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848 PHY Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY 0x000000FFU +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY 0x00000FFFU + +#define PHY_READ_TO 0x0000FFFFU +#define PHY_WRITE_TO 0x0000FFFFU + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ + +#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ +#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ +#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ + +#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ +#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ + +#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ +#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ + +#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ +#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 1U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED + #include "stm32f4xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32f4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_FMPSMBUS_MODULE_ENABLED + #include "stm32f4xx_hal_fmpsmbus.h" +#endif /* HAL_FMPSMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + + diff --git a/ports/ST/stm32f4xx/usb_config.h b/ports/ST/stm32f4xx/usb_config.h new file mode 100644 index 0000000..30058a3 --- /dev/null +++ b/ports/ST/stm32f4xx/usb_config.h @@ -0,0 +1,161 @@ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef CHERRYUSB_CONFIG_H +#define CHERRYUSB_CONFIG_H + +#define CHERRYUSB_VERSION 0x000800 + +/* ================ USB common Configuration ================ */ + +// #define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) +#define CONFIG_USB_PRINTF(...) + +#define usb_malloc(size) malloc(size) +#define usb_free(ptr) free(ptr) + +#ifndef CONFIG_USB_DBG_LEVEL +# define CONFIG_USB_DBG_LEVEL USB_DBG_LOG +#endif + +/* Enable print with color */ +// #define CONFIG_USB_PRINTF_COLOR_ENABLE + +/* data align size when use dma */ +#ifndef CONFIG_USB_ALIGN_SIZE +# define CONFIG_USB_ALIGN_SIZE 4 +#endif + +/* attribute data into no cache ram */ +#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) + +/* ================= USB Device Stack Configuration ================ */ + +/* Ep0 max transfer buffer, specially for receiving data from ep0 out */ +#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 256 + +/* Setup packet log for debug */ +// #define CONFIG_USBDEV_SETUP_LOG_PRINT + +/* Check if the input descriptor is correct */ +// #define CONFIG_USBDEV_DESC_CHECK + +/* Enable test mode */ +// #define CONFIG_USBDEV_TEST_MODE + +//#define CONFIG_USBDEV_TX_THREAD +//#define CONFIG_USBDEV_RX_THREAD + +#ifdef CONFIG_USBDEV_TX_THREAD +# ifndef CONFIG_USBDEV_TX_PRIO +# define CONFIG_USBDEV_TX_PRIO 4 +# endif +# ifndef CONFIG_USBDEV_TX_STACKSIZE +# define CONFIG_USBDEV_TX_STACKSIZE 2048 +# endif +#endif + +#ifdef CONFIG_USBDEV_RX_THREAD +# ifndef CONFIG_USBDEV_RX_PRIO +# define CONFIG_USBDEV_RX_PRIO 4 +# endif +# ifndef CONFIG_USBDEV_RX_STACKSIZE +# define CONFIG_USBDEV_RX_STACKSIZE 2048 +# endif +#endif + +#ifndef CONFIG_USBDEV_MSC_BLOCK_SIZE +# define CONFIG_USBDEV_MSC_BLOCK_SIZE 512 +#endif + +#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING +# define CONFIG_USBDEV_MSC_MANUFACTURER_STRING "" +#endif + +#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING +# define CONFIG_USBDEV_MSC_PRODUCT_STRING "" +#endif + +#ifndef CONFIG_USBDEV_MSC_VERSION_STRING +# define CONFIG_USBDEV_MSC_VERSION_STRING "0.01" +#endif + +#ifndef CONFIG_USBDEV_AUDIO_VERSION +# define CONFIG_USBDEV_AUDIO_VERSION 0x0100 +#endif + +#ifndef CONFIG_USBDEV_AUDIO_MAX_CHANNEL +# define CONFIG_USBDEV_AUDIO_MAX_CHANNEL 8 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE +# define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 128 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE +# define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1536 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID +# define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff +#endif + +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC +# define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB" +#endif + +#define CONFIG_USBDEV_RNDIS_USING_LWIP +/* ================ USB HOST Stack Configuration ================== */ + +#define CONFIG_USBHOST_MAX_RHPORTS 1 +#define CONFIG_USBHOST_MAX_EXTHUBS 1 +#define CONFIG_USBHOST_MAX_EHPORTS 4 +#define CONFIG_USBHOST_MAX_INTERFACES 6 +#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 1 +#define CONFIG_USBHOST_MAX_ENDPOINTS 4 + +#define CONFIG_USBHOST_DEV_NAMELEN 16 + +#ifndef CONFIG_USBHOST_PSC_PRIO +# define CONFIG_USBHOST_PSC_PRIO 4 +#endif +#ifndef CONFIG_USBHOST_PSC_STACKSIZE +# define CONFIG_USBHOST_PSC_STACKSIZE 2048 +#endif + +//#define CONFIG_USBHOST_GET_STRING_DESC + +/* Ep0 max transfer buffer */ +#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512 + +#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT +# define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500 +#endif + +#ifndef CONFIG_USBHOST_MSC_TIMEOUT +# define CONFIG_USBHOST_MSC_TIMEOUT 5000 +#endif + +/* ================ USB Device Port Configuration ================*/ + +#define CONFIG_USB_DWC2_PORT FS_PORT +#define USBD_IRQHandler OTG_FS_IRQHandler +// #define USB_NUM_BIDIR_ENDPOINTS 4 + +/* ================ USB Host Port Configuration ==================*/ + +#define CONFIG_USBHOST_PIPE_NUM 10 + +/* ================ EHCI Configuration ================ */ + +#define CONFIG_USB_EHCI_HCCR_BASE (0x20072000) +#define CONFIG_USB_EHCI_HCOR_BASE (0x20072000 + 0x10) +#define CONFIG_EHCI_FRAME_LIST_SIZE 1024 +// #define CONFIG_USB_EHCI_INFO_ENABLE +// #define CONFIG_USB_ECHI_HCOR_RESERVED_DISABLE +// #define CONFIG_USB_EHCI_CONFIGFLAG +// #define CONFIG_USB_EHCI_PORT_POWER + +#endif diff --git a/ports/ST/stm32g4xx/board_flash.c b/ports/ST/stm32g4xx/board_flash.c index 8537adb..00e9104 100644 --- a/ports/ST/stm32g4xx/board_flash.c +++ b/ports/ST/stm32g4xx/board_flash.c @@ -83,7 +83,7 @@ static void flash_write(uint32_t dst, const uint8_t *src, int len) { for (int i = 0; i < len; i += 8) { uint64_t data = *((uint64_t *)((void *)(src + i))); - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, dst + i, data) != HAL_OK) { + if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, dst + i, (uint64_t)data) != HAL_OK) { break; } diff --git a/ports/ST/stm32g4xx/boards.c b/ports/ST/stm32g4xx/boards.c index a0f6416..e7aa875 100644 --- a/ports/ST/stm32g4xx/boards.c +++ b/ports/ST/stm32g4xx/boards.c @@ -55,9 +55,16 @@ __attribute__((weak)) void board_init(void) { __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); +#ifdef GPIOD __HAL_RCC_GPIOD_CLK_ENABLE(); +#endif +#ifdef GPIOE __HAL_RCC_GPIOE_CLK_ENABLE(); +#endif + __HAL_RCC_GPIOF_CLK_ENABLE(); +#ifdef GPIOG __HAL_RCC_GPIOG_CLK_ENABLE(); +#endif __HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE(); @@ -111,9 +118,16 @@ __attribute__((weak)) void board_app_jump(void) { __HAL_RCC_GPIOA_CLK_DISABLE(); __HAL_RCC_GPIOB_CLK_DISABLE(); __HAL_RCC_GPIOC_CLK_DISABLE(); +#ifdef GPIOD __HAL_RCC_GPIOD_CLK_DISABLE(); +#endif +#ifdef GPIOE __HAL_RCC_GPIOE_CLK_DISABLE(); +#endif + __HAL_RCC_GPIOF_CLK_DISABLE(); +#ifdef GPIOG __HAL_RCC_GPIOG_CLK_DISABLE(); +#endif __HAL_RCC_USB_CLK_DISABLE(); HAL_RCC_DeInit(); diff --git a/ports/ST/stm32l4xx/board_flash.c b/ports/ST/stm32l4xx/board_flash.c index 046ac1c..ecf78e3 100644 --- a/ports/ST/stm32l4xx/board_flash.c +++ b/ports/ST/stm32l4xx/board_flash.c @@ -82,7 +82,7 @@ static void flash_write(uint32_t dst, const uint8_t *src, int len) { for (int i = 0; i < len; i += 8) { uint64_t data = *((uint64_t *)((void *)(src + i))); - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, dst + i, data) != HAL_OK) { + if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, dst + i, (uint64_t)data) != HAL_OK) { break; } diff --git a/ports/ST/stm32l4xx/boards.c b/ports/ST/stm32l4xx/boards.c index edcc472..f00d487 100644 --- a/ports/ST/stm32l4xx/boards.c +++ b/ports/ST/stm32l4xx/boards.c @@ -56,8 +56,18 @@ __attribute__((weak)) void board_init(void) { __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); +#ifdef GPIOD __HAL_RCC_GPIOD_CLK_ENABLE(); +#endif +#ifdef GPIOE __HAL_RCC_GPIOE_CLK_ENABLE(); +#endif +#ifdef GPIOF + __HAL_RCC_GPIOF_CLK_ENABLE(); +#endif +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_ENABLE(); +#endif __HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE(); @@ -104,8 +114,18 @@ __attribute__((weak)) void board_app_jump(void) { __HAL_RCC_GPIOA_CLK_DISABLE(); __HAL_RCC_GPIOB_CLK_DISABLE(); __HAL_RCC_GPIOC_CLK_DISABLE(); +#ifdef GPIOD __HAL_RCC_GPIOD_CLK_DISABLE(); +#endif +#ifdef GPIOE __HAL_RCC_GPIOE_CLK_DISABLE(); +#endif +#ifdef GPIOF + __HAL_RCC_GPIOF_CLK_DISABLE(); +#endif +#ifdef GPIOG + __HAL_RCC_GPIOG_CLK_DISABLE(); +#endif __HAL_RCC_GPIOH_CLK_DISABLE(); __HAL_RCC_USB_CLK_DISABLE(); diff --git a/sdk/ST/stm32f4xx_library/cmsis_device_f4 b/sdk/ST/stm32f4xx_library/cmsis_device_f4 new file mode 160000 index 0000000..7ac6909 --- /dev/null +++ b/sdk/ST/stm32f4xx_library/cmsis_device_f4 @@ -0,0 +1 @@ +Subproject commit 7ac69098b3e5f9b2d929acd4f087e92a7e59e0e9 diff --git a/sdk/ST/stm32f4xx_library/stm32f4xx_hal_driver b/sdk/ST/stm32f4xx_library/stm32f4xx_hal_driver new file mode 160000 index 0000000..9dd5bce --- /dev/null +++ b/sdk/ST/stm32f4xx_library/stm32f4xx_hal_driver @@ -0,0 +1 @@ +Subproject commit 9dd5bcee7fb0d242178a7d918dbf64882afc6b75 diff --git a/src/ghostfat.c b/src/ghostfat.c index aab0379..d712fcc 100644 --- a/src/ghostfat.c +++ b/src/ghostfat.c @@ -120,7 +120,7 @@ typedef struct FileContent { #define UF2_SECTOR_COUNT (_flash_size / UF2_FIRMWARE_BYTES_PER_SECTOR) #define UF2_BYTE_COUNT (UF2_SECTOR_COUNT * BPB_SECTOR_SIZE) // always a multiple of sector size, per UF2 spec -const char infoUf2File[] = "CherryUF2 Bootloader" UF2_VERSION "\r\n" +const char infoUf2File[] = "CherryUF2 Bootloader:" UF2_VERSION "\r\n" "Model: " UF2_PRODUCT_NAME "\r\n" "Board-ID: " UF2_BOARD_ID "\r\n" "Date: " COMPILE_DATE "\r\n";