From e799be1868d3f10204066e0635148130aef6e484 Mon Sep 17 00:00:00 2001 From: "xmc-action-bot[bot]" <121654204+xmc-action-bot[bot]@users.noreply.github.com> Date: Mon, 1 Jul 2024 05:26:24 +0000 Subject: [PATCH] feat: updating from newer svd2rust (#93) Co-authored-by: lucasbrendel <1765755+lucasbrendel@users.noreply.github.com> --- src/can.rs | 20 +- src/can/clc.rs | 2 +- src/can/fdr.rs | 2 +- src/can/id.rs | 2 +- src/can/list.rs | 2 +- src/can/mcr.rs | 2 +- src/can/mitr.rs | 2 +- src/can/msid.rs | 2 +- src/can/msimask.rs | 2 +- src/can/mspnd.rs | 2 +- src/can/panctr.rs | 2 +- src/can_mo0.rs | 18 +- src/can_mo0/moamr.rs | 2 +- src/can_mo0/moar.rs | 2 +- src/can_mo0/moctr.rs | 2 +- src/can_mo0/modatah.rs | 2 +- src/can_mo0/modatal.rs | 2 +- src/can_mo0/mofcr.rs | 2 +- src/can_mo0/mofgpr.rs | 2 +- src/can_mo0/moipr.rs | 2 +- src/can_mo0/mostat.rs | 2 +- src/can_node0.rs | 14 +- src/can_node0/nbtr.rs | 2 +- src/can_node0/ncr.rs | 2 +- src/can_node0/necnt.rs | 2 +- src/can_node0/nfcr.rs | 2 +- src/can_node0/nipr.rs | 2 +- src/can_node0/npcr.rs | 2 +- src/can_node0/nsr.rs | 2 +- src/ccu40.rs | 18 +- src/ccu40/ecrd.rs | 2 +- src/ccu40/gcsc.rs | 2 +- src/ccu40/gcss.rs | 2 +- src/ccu40/gcst.rs | 2 +- src/ccu40/gctrl.rs | 2 +- src/ccu40/gidlc.rs | 2 +- src/ccu40/gidls.rs | 2 +- src/ccu40/gstat.rs | 2 +- src/ccu40/midr.rs | 2 +- src/ccu40_cc40.rs | 52 +-- src/ccu40_cc40/c0v.rs | 2 +- src/ccu40_cc40/c1v.rs | 2 +- src/ccu40_cc40/c2v.rs | 2 +- src/ccu40_cc40/c3v.rs | 2 +- src/ccu40_cc40/cmc.rs | 2 +- src/ccu40_cc40/cr.rs | 2 +- src/ccu40_cc40/crs.rs | 2 +- src/ccu40_cc40/dit.rs | 2 +- src/ccu40_cc40/dits.rs | 2 +- src/ccu40_cc40/fpc.rs | 2 +- src/ccu40_cc40/fpcs.rs | 2 +- src/ccu40_cc40/ins.rs | 2 +- src/ccu40_cc40/inte.rs | 2 +- src/ccu40_cc40/ints.rs | 2 +- src/ccu40_cc40/pr.rs | 2 +- src/ccu40_cc40/prs.rs | 2 +- src/ccu40_cc40/psc.rs | 2 +- src/ccu40_cc40/psl.rs | 2 +- src/ccu40_cc40/srs.rs | 2 +- src/ccu40_cc40/swr.rs | 2 +- src/ccu40_cc40/sws.rs | 2 +- src/ccu40_cc40/tc.rs | 2 +- src/ccu40_cc40/tcclr.rs | 2 +- src/ccu40_cc40/tcset.rs | 2 +- src/ccu40_cc40/tcst.rs | 2 +- src/ccu40_cc40/timer.rs | 2 +- src/ccu80.rs | 20 +- src/ccu80/ecrd.rs | 2 +- src/ccu80/gcsc.rs | 2 +- src/ccu80/gcss.rs | 2 +- src/ccu80/gcst.rs | 2 +- src/ccu80/gctrl.rs | 2 +- src/ccu80/gidlc.rs | 2 +- src/ccu80/gidls.rs | 2 +- src/ccu80/gpchk.rs | 2 +- src/ccu80/gstat.rs | 2 +- src/ccu80/midr.rs | 2 +- src/ccu80_cc80.rs | 66 +-- src/ccu80_cc80/c0v.rs | 2 +- src/ccu80_cc80/c1v.rs | 2 +- src/ccu80_cc80/c2v.rs | 2 +- src/ccu80_cc80/c3v.rs | 2 +- src/ccu80_cc80/chc.rs | 2 +- src/ccu80_cc80/cmc.rs | 2 +- src/ccu80_cc80/cr1.rs | 2 +- src/ccu80_cc80/cr1s.rs | 2 +- src/ccu80_cc80/cr2.rs | 2 +- src/ccu80_cc80/cr2s.rs | 2 +- src/ccu80_cc80/dc1r.rs | 2 +- src/ccu80_cc80/dc2r.rs | 2 +- src/ccu80_cc80/dit.rs | 2 +- src/ccu80_cc80/dits.rs | 2 +- src/ccu80_cc80/dtc.rs | 2 +- src/ccu80_cc80/fpc.rs | 2 +- src/ccu80_cc80/fpcs.rs | 2 +- src/ccu80_cc80/ins.rs | 2 +- src/ccu80_cc80/inte.rs | 2 +- src/ccu80_cc80/ints.rs | 2 +- src/ccu80_cc80/pr.rs | 2 +- src/ccu80_cc80/prs.rs | 2 +- src/ccu80_cc80/psc.rs | 2 +- src/ccu80_cc80/psl.rs | 2 +- src/ccu80_cc80/srs.rs | 2 +- src/ccu80_cc80/stc.rs | 2 +- src/ccu80_cc80/swr.rs | 2 +- src/ccu80_cc80/sws.rs | 2 +- src/ccu80_cc80/tc.rs | 2 +- src/ccu80_cc80/tcclr.rs | 2 +- src/ccu80_cc80/tcset.rs | 2 +- src/ccu80_cc80/tcst.rs | 2 +- src/ccu80_cc80/timer.rs | 2 +- src/dac.rs | 24 +- src/dac/dac01data.rs | 2 +- src/dac/dac0cfg0.rs | 2 +- src/dac/dac0cfg1.rs | 2 +- src/dac/dac0data.rs | 2 +- src/dac/dac0path.rs | 2 +- src/dac/dac0patl.rs | 2 +- src/dac/dac1cfg0.rs | 2 +- src/dac/dac1cfg1.rs | 2 +- src/dac/dac1data.rs | 2 +- src/dac/dac1path.rs | 2 +- src/dac/dac1patl.rs | 2 +- src/dac/id.rs | 2 +- src/dlr.rs | 8 +- src/dlr/lnen.rs | 2 +- src/dlr/ovrclr.rs | 2 +- src/dlr/ovrstat.rs | 2 +- src/dlr/srsel0.rs | 2 +- src/dsd.rs | 16 +- src/dsd/cgcfg.rs | 2 +- src/dsd/clc.rs | 2 +- src/dsd/evflag.rs | 2 +- src/dsd/evflagclr.rs | 2 +- src/dsd/globcfg.rs | 2 +- src/dsd/globrc.rs | 2 +- src/dsd/id.rs | 2 +- src/dsd/ocs.rs | 2 +- src/dsd_ch0.rs | 24 +- src/dsd_ch0/boundsel.rs | 2 +- src/dsd_ch0/cgsync.rs | 2 +- src/dsd_ch0/dicfg.rs | 2 +- src/dsd_ch0/fcfga.rs | 2 +- src/dsd_ch0/fcfgc.rs | 2 +- src/dsd_ch0/iwctr.rs | 2 +- src/dsd_ch0/modcfg.rs | 2 +- src/dsd_ch0/offm.rs | 2 +- src/dsd_ch0/rectcfg.rs | 2 +- src/dsd_ch0/resa.rs | 2 +- src/dsd_ch0/resm.rs | 2 +- src/dsd_ch0/tstmp.rs | 2 +- src/eru0.rs | 6 +- src/eru0/exicon.rs | 2 +- src/eru0/exisel.rs | 2 +- src/eru0/exocon.rs | 2 +- src/eth0.rs | 274 ++++++------- src/eth0/ahb_status.rs | 2 +- src/eth0/bus_mode.rs | 2 +- .../current_host_receive_buffer_address.rs | 2 +- src/eth0/current_host_receive_descriptor.rs | 2 +- .../current_host_transmit_buffer_address.rs | 2 +- src/eth0/current_host_transmit_descriptor.rs | 2 +- src/eth0/debug.rs | 2 +- src/eth0/flow_control.rs | 2 +- src/eth0/gmii_address.rs | 2 +- src/eth0/gmii_data.rs | 2 +- src/eth0/hash_table_high.rs | 2 +- src/eth0/hash_table_low.rs | 2 +- src/eth0/hw_feature.rs | 2 +- src/eth0/interrupt_enable.rs | 2 +- src/eth0/interrupt_mask.rs | 2 +- src/eth0/interrupt_status.rs | 2 +- src/eth0/mac_address0_high.rs | 2 +- src/eth0/mac_address0_low.rs | 2 +- src/eth0/mac_address1_high.rs | 2 +- src/eth0/mac_address1_low.rs | 2 +- src/eth0/mac_address2_high.rs | 2 +- src/eth0/mac_address2_low.rs | 2 +- src/eth0/mac_address3_high.rs | 2 +- src/eth0/mac_address3_low.rs | 2 +- src/eth0/mac_configuration.rs | 2 +- src/eth0/mac_frame_filter.rs | 2 +- ...issed_frame_and_buffer_overflow_counter.rs | 2 +- src/eth0/mmc_control.rs | 2 +- src/eth0/mmc_ipc_receive_interrupt.rs | 2 +- src/eth0/mmc_ipc_receive_interrupt_mask.rs | 2 +- src/eth0/mmc_receive_interrupt.rs | 2 +- src/eth0/mmc_receive_interrupt_mask.rs | 2 +- src/eth0/mmc_transmit_interrupt.rs | 2 +- src/eth0/mmc_transmit_interrupt_mask.rs | 2 +- src/eth0/operation_mode.rs | 2 +- src/eth0/pmt_control_status.rs | 2 +- src/eth0/pps_control.rs | 2 +- src/eth0/receive_descriptor_list_address.rs | 2 +- src/eth0/receive_interrupt_watchdog_timer.rs | 2 +- src/eth0/receive_poll_demand.rs | 2 +- src/eth0/remote_wake_up_frame_filter.rs | 2 +- .../rx_1024tomaxoctets_frames_good_bad.rs | 2 +- src/eth0/rx_128to255octets_frames_good_bad.rs | 2 +- src/eth0/rx_256to511octets_frames_good_bad.rs | 2 +- .../rx_512to1023octets_frames_good_bad.rs | 2 +- src/eth0/rx_64octets_frames_good_bad.rs | 2 +- src/eth0/rx_65to127octets_frames_good_bad.rs | 2 +- src/eth0/rx_alignment_error_frames.rs | 2 +- src/eth0/rx_broadcast_frames_good.rs | 2 +- src/eth0/rx_control_frames_good.rs | 2 +- src/eth0/rx_crc_error_frames.rs | 2 +- src/eth0/rx_fifo_overflow_frames.rs | 2 +- src/eth0/rx_frames_count_good_bad.rs | 2 +- src/eth0/rx_jabber_error_frames.rs | 2 +- src/eth0/rx_length_error_frames.rs | 2 +- src/eth0/rx_multicast_frames_good.rs | 2 +- src/eth0/rx_octet_count_good.rs | 2 +- src/eth0/rx_octet_count_good_bad.rs | 2 +- src/eth0/rx_out_of_range_type_frames.rs | 2 +- src/eth0/rx_oversize_frames_good.rs | 2 +- src/eth0/rx_pause_frames.rs | 2 +- src/eth0/rx_receive_error_frames.rs | 2 +- src/eth0/rx_runt_error_frames.rs | 2 +- src/eth0/rx_undersize_frames_good.rs | 2 +- src/eth0/rx_unicast_frames_good.rs | 2 +- src/eth0/rx_vlan_frames_good_bad.rs | 2 +- src/eth0/rx_watchdog_error_frames.rs | 2 +- src/eth0/rxicmp_error_frames.rs | 2 +- src/eth0/rxicmp_error_octets.rs | 2 +- src/eth0/rxicmp_good_frames.rs | 2 +- src/eth0/rxicmp_good_octets.rs | 2 +- src/eth0/rxipv4_fragmented_frames.rs | 2 +- src/eth0/rxipv4_fragmented_octets.rs | 2 +- src/eth0/rxipv4_good_frames.rs | 2 +- src/eth0/rxipv4_good_octets.rs | 2 +- src/eth0/rxipv4_header_error_frames.rs | 2 +- src/eth0/rxipv4_header_error_octets.rs | 2 +- src/eth0/rxipv4_no_payload_frames.rs | 2 +- src/eth0/rxipv4_no_payload_octets.rs | 2 +- .../rxipv4_udp_checksum_disable_octets.rs | 2 +- .../rxipv4_udp_checksum_disabled_frames.rs | 2 +- src/eth0/rxipv6_good_frames.rs | 2 +- src/eth0/rxipv6_good_octets.rs | 2 +- src/eth0/rxipv6_header_error_frames.rs | 2 +- src/eth0/rxipv6_header_error_octets.rs | 2 +- src/eth0/rxipv6_no_payload_frames.rs | 2 +- src/eth0/rxipv6_no_payload_octets.rs | 2 +- src/eth0/rxtcp_error_frames.rs | 2 +- src/eth0/rxtcp_error_octets.rs | 2 +- src/eth0/rxtcp_good_frames.rs | 2 +- src/eth0/rxtcp_good_octets.rs | 2 +- src/eth0/rxudp_error_frames.rs | 2 +- src/eth0/rxudp_error_octets.rs | 2 +- src/eth0/rxudp_good_frames.rs | 2 +- src/eth0/rxudp_good_octets.rs | 2 +- src/eth0/status.rs | 2 +- src/eth0/sub_second_increment.rs | 2 +- src/eth0/system_time_higher_word_seconds.rs | 2 +- src/eth0/system_time_nanoseconds.rs | 2 +- src/eth0/system_time_nanoseconds_update.rs | 2 +- src/eth0/system_time_seconds.rs | 2 +- src/eth0/system_time_seconds_update.rs | 2 +- src/eth0/target_time_nanoseconds.rs | 2 +- src/eth0/target_time_seconds.rs | 2 +- src/eth0/timestamp_addend.rs | 2 +- src/eth0/timestamp_control.rs | 2 +- src/eth0/timestamp_status.rs | 2 +- src/eth0/transmit_descriptor_list_address.rs | 2 +- src/eth0/transmit_poll_demand.rs | 2 +- .../tx_1024tomaxoctets_frames_good_bad.rs | 2 +- src/eth0/tx_128to255octets_frames_good_bad.rs | 2 +- src/eth0/tx_256to511octets_frames_good_bad.rs | 2 +- .../tx_512to1023octets_frames_good_bad.rs | 2 +- src/eth0/tx_64octets_frames_good_bad.rs | 2 +- src/eth0/tx_65to127octets_frames_good_bad.rs | 2 +- src/eth0/tx_broadcast_frames_good.rs | 2 +- src/eth0/tx_broadcast_frames_good_bad.rs | 2 +- src/eth0/tx_carrier_error_frames.rs | 2 +- src/eth0/tx_deferred_frames.rs | 2 +- src/eth0/tx_excessive_collision_frames.rs | 2 +- src/eth0/tx_excessive_deferral_error.rs | 2 +- src/eth0/tx_frame_count_good.rs | 2 +- src/eth0/tx_frame_count_good_bad.rs | 2 +- src/eth0/tx_late_collision_frames.rs | 2 +- src/eth0/tx_multicast_frames_good.rs | 2 +- src/eth0/tx_multicast_frames_good_bad.rs | 2 +- src/eth0/tx_multiple_collision_good_frames.rs | 2 +- src/eth0/tx_octet_count_good.rs | 2 +- src/eth0/tx_octet_count_good_bad.rs | 2 +- src/eth0/tx_osize_frames_good.rs | 2 +- src/eth0/tx_pause_frames.rs | 2 +- src/eth0/tx_single_collision_good_frames.rs | 2 +- src/eth0/tx_underflow_error_frames.rs | 2 +- src/eth0/tx_unicast_frames_good_bad.rs | 2 +- src/eth0/tx_vlan_frames_good.rs | 2 +- src/eth0/version.rs | 2 +- src/eth0/vlan_tag.rs | 2 +- src/eth0_con.rs | 2 +- src/eth0_con/eth0_con.rs | 2 +- src/fce.rs | 4 +- src/fce/clc.rs | 2 +- src/fce/id.rs | 2 +- src/fce_ke0.rs | 17 +- src/fce_ke0/cfg.rs | 2 +- src/fce_ke0/check.rs | 2 +- src/fce_ke0/crc.rs | 2 +- src/fce_ke0/ctr.rs | 2 +- src/fce_ke0/ir.rs | 2 +- src/fce_ke0/length.rs | 2 +- src/fce_ke0/res.rs | 2 +- src/fce_ke0/sts.rs | 2 +- src/flash0.rs | 14 +- src/flash0/fcon.rs | 2 +- src/flash0/fsr.rs | 2 +- src/flash0/id.rs | 2 +- src/flash0/marp.rs | 2 +- src/flash0/procon0.rs | 2 +- src/flash0/procon1.rs | 2 +- src/flash0/procon2.rs | 2 +- src/generic.rs | 268 ++++++------ src/gpdma0.rs | 64 +-- src/gpdma0/chenreg.rs | 2 +- src/gpdma0/clearblock.rs | 2 +- src/gpdma0/cleardsttran.rs | 2 +- src/gpdma0/clearerr.rs | 2 +- src/gpdma0/clearsrctran.rs | 2 +- src/gpdma0/cleartfr.rs | 2 +- src/gpdma0/dmacfgreg.rs | 2 +- src/gpdma0/id.rs | 2 +- src/gpdma0/lstdstreg.rs | 2 +- src/gpdma0/lstsrcreg.rs | 2 +- src/gpdma0/maskblock.rs | 2 +- src/gpdma0/maskdsttran.rs | 2 +- src/gpdma0/maskerr.rs | 2 +- src/gpdma0/masksrctran.rs | 2 +- src/gpdma0/masktfr.rs | 2 +- src/gpdma0/rawblock.rs | 2 +- src/gpdma0/rawdsttran.rs | 2 +- src/gpdma0/rawerr.rs | 2 +- src/gpdma0/rawsrctran.rs | 2 +- src/gpdma0/rawtfr.rs | 2 +- src/gpdma0/reqdstreg.rs | 2 +- src/gpdma0/reqsrcreg.rs | 2 +- src/gpdma0/sglreqdstreg.rs | 2 +- src/gpdma0/sglreqsrcreg.rs | 2 +- src/gpdma0/statusblock.rs | 2 +- src/gpdma0/statusdsttran.rs | 2 +- src/gpdma0/statuserr.rs | 2 +- src/gpdma0/statusint.rs | 2 +- src/gpdma0/statussrctran.rs | 2 +- src/gpdma0/statustfr.rs | 2 +- src/gpdma0/type_.rs | 2 +- src/gpdma0/version.rs | 2 +- src/gpdma0_ch0.rs | 26 +- src/gpdma0_ch0/cfgh.rs | 2 +- src/gpdma0_ch0/cfgl.rs | 2 +- src/gpdma0_ch0/ctlh.rs | 2 +- src/gpdma0_ch0/ctll.rs | 2 +- src/gpdma0_ch0/dar.rs | 2 +- src/gpdma0_ch0/dsr.rs | 2 +- src/gpdma0_ch0/dstat.rs | 2 +- src/gpdma0_ch0/dstatar.rs | 2 +- src/gpdma0_ch0/llp.rs | 2 +- src/gpdma0_ch0/sar.rs | 2 +- src/gpdma0_ch0/sgr.rs | 2 +- src/gpdma0_ch0/sstat.rs | 2 +- src/gpdma0_ch0/sstatar.rs | 2 +- src/gpdma0_ch2.rs | 12 +- src/gpdma0_ch2/cfgh.rs | 2 +- src/gpdma0_ch2/cfgl.rs | 2 +- src/gpdma0_ch2/ctlh.rs | 2 +- src/gpdma0_ch2/ctll.rs | 2 +- src/gpdma0_ch2/dar.rs | 2 +- src/gpdma0_ch2/sar.rs | 2 +- src/hrpwm0.rs | 34 +- src/hrpwm0/csgcfg.rs | 2 +- src/hrpwm0/csgclrg.rs | 2 +- src/hrpwm0/csgfcg.rs | 2 +- src/hrpwm0/csgfsg.rs | 2 +- src/hrpwm0/csgsetg.rs | 2 +- src/hrpwm0/csgstatg.rs | 2 +- src/hrpwm0/csgtrc.rs | 2 +- src/hrpwm0/csgtrg.rs | 2 +- src/hrpwm0/csgtrsg.rs | 2 +- src/hrpwm0/glbana.rs | 2 +- src/hrpwm0/hrbsc.rs | 2 +- src/hrpwm0/hrccfg.rs | 2 +- src/hrpwm0/hrcctrg.rs | 2 +- src/hrpwm0/hrcstrg.rs | 2 +- src/hrpwm0/hrcstsg.rs | 2 +- src/hrpwm0/hrghrs.rs | 2 +- src/hrpwm0/midr.rs | 2 +- src/hrpwm0_csg0.rs | 32 +- src/hrpwm0_csg0/blv.rs | 2 +- src/hrpwm0_csg0/cc.rs | 2 +- src/hrpwm0_csg0/dci.rs | 2 +- src/hrpwm0_csg0/dsv1.rs | 2 +- src/hrpwm0_csg0/dsv2.rs | 2 +- src/hrpwm0_csg0/ies.rs | 2 +- src/hrpwm0_csg0/istat.rs | 2 +- src/hrpwm0_csg0/pc.rs | 2 +- src/hrpwm0_csg0/plc.rs | 2 +- src/hrpwm0_csg0/sc.rs | 2 +- src/hrpwm0_csg0/sdsv1.rs | 2 +- src/hrpwm0_csg0/spc.rs | 2 +- src/hrpwm0_csg0/sre.rs | 2 +- src/hrpwm0_csg0/srs.rs | 2 +- src/hrpwm0_csg0/swc.rs | 2 +- src/hrpwm0_csg0/sws.rs | 2 +- src/hrpwm0_hrc0.rs | 28 +- src/hrpwm0_hrc0/cr1.rs | 2 +- src/hrpwm0_hrc0/cr2.rs | 2 +- src/hrpwm0_hrc0/dcf.rs | 2 +- src/hrpwm0_hrc0/dcr.rs | 2 +- src/hrpwm0_hrc0/gc.rs | 2 +- src/hrpwm0_hrc0/gsel.rs | 2 +- src/hrpwm0_hrc0/pl.rs | 2 +- src/hrpwm0_hrc0/sc.rs | 2 +- src/hrpwm0_hrc0/scr1.rs | 2 +- src/hrpwm0_hrc0/scr2.rs | 2 +- src/hrpwm0_hrc0/sdcf.rs | 2 +- src/hrpwm0_hrc0/sdcr.rs | 2 +- src/hrpwm0_hrc0/ssc.rs | 2 +- src/hrpwm0_hrc0/tsel.rs | 2 +- src/ledts0.rs | 22 +- src/ledts0/evfr.rs | 2 +- src/ledts0/fnctl.rs | 2 +- src/ledts0/globctl.rs | 2 +- src/ledts0/id.rs | 2 +- src/ledts0/ldcmp0.rs | 2 +- src/ledts0/ldcmp1.rs | 2 +- src/ledts0/line0.rs | 2 +- src/ledts0/line1.rs | 2 +- src/ledts0/tscmp0.rs | 2 +- src/ledts0/tscmp1.rs | 2 +- src/ledts0/tsval.rs | 2 +- src/lib.rs | 388 +++++++++--------- src/pba0.rs | 4 +- src/pba0/sts.rs | 2 +- src/pba0/waddr.rs | 2 +- src/pmu0.rs | 2 +- src/pmu0/id.rs | 2 +- src/port0.rs | 24 +- src/port0/hwsel.rs | 2 +- src/port0/in_.rs | 2 +- src/port0/iocr0.rs | 2 +- src/port0/iocr12.rs | 2 +- src/port0/iocr4.rs | 2 +- src/port0/iocr8.rs | 2 +- src/port0/omr.rs | 2 +- src/port0/out.rs | 2 +- src/port0/pdisc.rs | 2 +- src/port0/pdr0.rs | 2 +- src/port0/pdr1.rs | 2 +- src/port0/pps.rs | 2 +- src/port1.rs | 24 +- src/port1/hwsel.rs | 2 +- src/port1/in_.rs | 2 +- src/port1/iocr0.rs | 2 +- src/port1/iocr12.rs | 2 +- src/port1/iocr4.rs | 2 +- src/port1/iocr8.rs | 2 +- src/port1/omr.rs | 2 +- src/port1/out.rs | 2 +- src/port1/pdisc.rs | 2 +- src/port1/pdr0.rs | 2 +- src/port1/pdr1.rs | 2 +- src/port1/pps.rs | 2 +- src/port14.rs | 20 +- src/port14/hwsel.rs | 2 +- src/port14/in_.rs | 2 +- src/port14/iocr0.rs | 2 +- src/port14/iocr12.rs | 2 +- src/port14/iocr4.rs | 2 +- src/port14/iocr8.rs | 2 +- src/port14/omr.rs | 2 +- src/port14/out.rs | 2 +- src/port14/pdisc.rs | 2 +- src/port14/pps.rs | 2 +- src/port15.rs | 18 +- src/port15/hwsel.rs | 2 +- src/port15/in_.rs | 2 +- src/port15/iocr0.rs | 2 +- src/port15/iocr4.rs | 2 +- src/port15/iocr8.rs | 2 +- src/port15/omr.rs | 2 +- src/port15/out.rs | 2 +- src/port15/pdisc.rs | 2 +- src/port15/pps.rs | 2 +- src/port2.rs | 24 +- src/port2/hwsel.rs | 2 +- src/port2/in_.rs | 2 +- src/port2/iocr0.rs | 2 +- src/port2/iocr12.rs | 2 +- src/port2/iocr4.rs | 2 +- src/port2/iocr8.rs | 2 +- src/port2/omr.rs | 2 +- src/port2/out.rs | 2 +- src/port2/pdisc.rs | 2 +- src/port2/pdr0.rs | 2 +- src/port2/pdr1.rs | 2 +- src/port2/pps.rs | 2 +- src/port3.rs | 18 +- src/port3/hwsel.rs | 2 +- src/port3/in_.rs | 2 +- src/port3/iocr0.rs | 2 +- src/port3/iocr4.rs | 2 +- src/port3/omr.rs | 2 +- src/port3/out.rs | 2 +- src/port3/pdisc.rs | 2 +- src/port3/pdr0.rs | 2 +- src/port3/pps.rs | 2 +- src/port4.rs | 16 +- src/port4/hwsel.rs | 2 +- src/port4/in_.rs | 2 +- src/port4/iocr0.rs | 2 +- src/port4/omr.rs | 2 +- src/port4/out.rs | 2 +- src/port4/pdisc.rs | 2 +- src/port4/pdr0.rs | 2 +- src/port4/pps.rs | 2 +- src/port5.rs | 18 +- src/port5/hwsel.rs | 2 +- src/port5/in_.rs | 2 +- src/port5/iocr0.rs | 2 +- src/port5/iocr4.rs | 2 +- src/port5/omr.rs | 2 +- src/port5/out.rs | 2 +- src/port5/pdisc.rs | 2 +- src/port5/pdr0.rs | 2 +- src/port5/pps.rs | 2 +- src/posif0.rs | 38 +- src/posif0/halp.rs | 2 +- src/posif0/halps.rs | 2 +- src/posif0/mcm.rs | 2 +- src/posif0/mcmc.rs | 2 +- src/posif0/mcmf.rs | 2 +- src/posif0/mcms.rs | 2 +- src/posif0/mcsm.rs | 2 +- src/posif0/midr.rs | 2 +- src/posif0/pconf.rs | 2 +- src/posif0/pdbg.rs | 2 +- src/posif0/pflg.rs | 2 +- src/posif0/pflge.rs | 2 +- src/posif0/prun.rs | 2 +- src/posif0/prunc.rs | 2 +- src/posif0/pruns.rs | 2 +- src/posif0/psus.rs | 2 +- src/posif0/qdc.rs | 2 +- src/posif0/rpflg.rs | 2 +- src/posif0/spflg.rs | 2 +- src/ppb.rs | 168 ++++---- src/ppb/actlr.rs | 2 +- src/ppb/afsr.rs | 2 +- src/ppb/aircr.rs | 2 +- src/ppb/bfar.rs | 2 +- src/ppb/ccr.rs | 2 +- src/ppb/cfsr.rs | 2 +- src/ppb/cpacr.rs | 2 +- src/ppb/cpuid.rs | 2 +- src/ppb/fpcar.rs | 2 +- src/ppb/fpccr.rs | 2 +- src/ppb/fpdscr.rs | 2 +- src/ppb/hfsr.rs | 2 +- src/ppb/icsr.rs | 2 +- src/ppb/mmfar.rs | 2 +- src/ppb/mpu_ctrl.rs | 2 +- src/ppb/mpu_rasr.rs | 2 +- src/ppb/mpu_rasr_a1.rs | 2 +- src/ppb/mpu_rasr_a2.rs | 2 +- src/ppb/mpu_rasr_a3.rs | 2 +- src/ppb/mpu_rbar.rs | 2 +- src/ppb/mpu_rbar_a1.rs | 2 +- src/ppb/mpu_rbar_a2.rs | 2 +- src/ppb/mpu_rbar_a3.rs | 2 +- src/ppb/mpu_rnr.rs | 2 +- src/ppb/mpu_type.rs | 2 +- src/ppb/nvic_iabr0.rs | 2 +- src/ppb/nvic_iabr1.rs | 2 +- src/ppb/nvic_iabr2.rs | 2 +- src/ppb/nvic_iabr3.rs | 2 +- src/ppb/nvic_icer0.rs | 2 +- src/ppb/nvic_icer1.rs | 2 +- src/ppb/nvic_icer2.rs | 2 +- src/ppb/nvic_icer3.rs | 2 +- src/ppb/nvic_icpr0.rs | 2 +- src/ppb/nvic_icpr1.rs | 2 +- src/ppb/nvic_icpr2.rs | 2 +- src/ppb/nvic_icpr3.rs | 2 +- src/ppb/nvic_ipr0.rs | 2 +- src/ppb/nvic_ipr1.rs | 2 +- src/ppb/nvic_ipr10.rs | 2 +- src/ppb/nvic_ipr11.rs | 2 +- src/ppb/nvic_ipr12.rs | 2 +- src/ppb/nvic_ipr13.rs | 2 +- src/ppb/nvic_ipr14.rs | 2 +- src/ppb/nvic_ipr15.rs | 2 +- src/ppb/nvic_ipr16.rs | 2 +- src/ppb/nvic_ipr17.rs | 2 +- src/ppb/nvic_ipr18.rs | 2 +- src/ppb/nvic_ipr19.rs | 2 +- src/ppb/nvic_ipr2.rs | 2 +- src/ppb/nvic_ipr20.rs | 2 +- src/ppb/nvic_ipr21.rs | 2 +- src/ppb/nvic_ipr22.rs | 2 +- src/ppb/nvic_ipr23.rs | 2 +- src/ppb/nvic_ipr24.rs | 2 +- src/ppb/nvic_ipr25.rs | 2 +- src/ppb/nvic_ipr26.rs | 2 +- src/ppb/nvic_ipr27.rs | 2 +- src/ppb/nvic_ipr3.rs | 2 +- src/ppb/nvic_ipr4.rs | 2 +- src/ppb/nvic_ipr5.rs | 2 +- src/ppb/nvic_ipr6.rs | 2 +- src/ppb/nvic_ipr7.rs | 2 +- src/ppb/nvic_ipr8.rs | 2 +- src/ppb/nvic_ipr9.rs | 2 +- src/ppb/nvic_iser0.rs | 2 +- src/ppb/nvic_iser1.rs | 2 +- src/ppb/nvic_iser2.rs | 2 +- src/ppb/nvic_iser3.rs | 2 +- src/ppb/nvic_ispr0.rs | 2 +- src/ppb/nvic_ispr1.rs | 2 +- src/ppb/nvic_ispr2.rs | 2 +- src/ppb/nvic_ispr3.rs | 2 +- src/ppb/scr.rs | 2 +- src/ppb/shcsr.rs | 2 +- src/ppb/shpr1.rs | 2 +- src/ppb/shpr2.rs | 2 +- src/ppb/shpr3.rs | 2 +- src/ppb/stir.rs | 2 +- src/ppb/syst_calib.rs | 2 +- src/ppb/syst_csr.rs | 2 +- src/ppb/syst_cvr.rs | 2 +- src/ppb/syst_rvr.rs | 2 +- src/ppb/vtor.rs | 2 +- src/pref.rs | 2 +- src/pref/pcon.rs | 2 +- src/rtc.rs | 20 +- src/rtc/atim0.rs | 2 +- src/rtc/atim1.rs | 2 +- src/rtc/clrsr.rs | 2 +- src/rtc/ctr.rs | 2 +- src/rtc/id.rs | 2 +- src/rtc/msksr.rs | 2 +- src/rtc/rawstat.rs | 2 +- src/rtc/stssr.rs | 2 +- src/rtc/tim0.rs | 2 +- src/rtc/tim1.rs | 2 +- src/scu_clk.rs | 44 +- src/scu_clk/ccuclkcr.rs | 2 +- src/scu_clk/cgatclr0.rs | 2 +- src/scu_clk/cgatclr1.rs | 2 +- src/scu_clk/cgatclr2.rs | 2 +- src/scu_clk/cgatset0.rs | 2 +- src/scu_clk/cgatset1.rs | 2 +- src/scu_clk/cgatset2.rs | 2 +- src/scu_clk/cgatstat0.rs | 2 +- src/scu_clk/cgatstat1.rs | 2 +- src/scu_clk/cgatstat2.rs | 2 +- src/scu_clk/clkclr.rs | 2 +- src/scu_clk/clkset.rs | 2 +- src/scu_clk/clkstat.rs | 2 +- src/scu_clk/cpuclkcr.rs | 2 +- src/scu_clk/dsleepcr.rs | 2 +- src/scu_clk/extclkcr.rs | 2 +- src/scu_clk/mlinkclkcr.rs | 2 +- src/scu_clk/pbclkcr.rs | 2 +- src/scu_clk/sleepcr.rs | 2 +- src/scu_clk/sysclkcr.rs | 2 +- src/scu_clk/usbclkcr.rs | 2 +- src/scu_clk/wdtclkcr.rs | 2 +- src/scu_general.rs | 36 +- src/scu_general/ccucon.rs | 2 +- src/scu_general/dtempalarm.rs | 2 +- src/scu_general/dtemplim.rs | 2 +- src/scu_general/dtscon.rs | 2 +- src/scu_general/dtsstat.rs | 2 +- src/scu_general/g0orcen.rs | 2 +- src/scu_general/g1orcen.rs | 2 +- src/scu_general/gpr0.rs | 2 +- src/scu_general/gpr1.rs | 2 +- src/scu_general/id.rs | 2 +- src/scu_general/idchip.rs | 2 +- src/scu_general/idmanuf.rs | 2 +- src/scu_general/mirrallreq.rs | 2 +- src/scu_general/mirrallstat.rs | 2 +- src/scu_general/mirrsts.rs | 2 +- src/scu_general/rmacr.rs | 2 +- src/scu_general/rmdata.rs | 2 +- src/scu_general/stcon.rs | 2 +- src/scu_hibernate.rs | 32 +- src/scu_hibernate/hdclr.rs | 2 +- src/scu_hibernate/hdcr.rs | 2 +- src/scu_hibernate/hdset.rs | 2 +- src/scu_hibernate/hdstat.rs | 2 +- src/scu_hibernate/hintclr.rs | 2 +- src/scu_hibernate/hintset.rs | 2 +- src/scu_hibernate/hintst.rs | 2 +- src/scu_hibernate/lpacclr.rs | 2 +- src/scu_hibernate/lpacconf.rs | 2 +- src/scu_hibernate/lpacset.rs | 2 +- src/scu_hibernate/lpacst.rs | 2 +- src/scu_hibernate/lpacth0.rs | 2 +- src/scu_hibernate/lpacth1.rs | 2 +- src/scu_hibernate/oscsictrl.rs | 2 +- src/scu_hibernate/osculctrl.rs | 2 +- src/scu_hibernate/osculstat.rs | 2 +- src/scu_interrupt.rs | 12 +- src/scu_interrupt/nmireqen.rs | 2 +- src/scu_interrupt/srclr.rs | 2 +- src/scu_interrupt/srmsk.rs | 2 +- src/scu_interrupt/srraw.rs | 2 +- src/scu_interrupt/srset.rs | 2 +- src/scu_interrupt/srstat.rs | 2 +- src/scu_osc.rs | 6 +- src/scu_osc/clkcalconst.rs | 2 +- src/scu_osc/oschpctrl.rs | 2 +- src/scu_osc/oschpstat.rs | 2 +- src/scu_parity.rs | 14 +- src/scu_parity/mchkcon.rs | 2 +- src/scu_parity/peen.rs | 2 +- src/scu_parity/peflag.rs | 2 +- src/scu_parity/persten.rs | 2 +- src/scu_parity/pete.rs | 2 +- src/scu_parity/pmtpr.rs | 2 +- src/scu_parity/pmtsr.rs | 2 +- src/scu_pll.rs | 14 +- src/scu_pll/clkmxstat.rs | 2 +- src/scu_pll/pllcon0.rs | 2 +- src/scu_pll/pllcon1.rs | 2 +- src/scu_pll/pllcon2.rs | 2 +- src/scu_pll/pllstat.rs | 2 +- src/scu_pll/usbpllcon.rs | 2 +- src/scu_pll/usbpllstat.rs | 2 +- src/scu_power.rs | 12 +- src/scu_power/evrstat.rs | 2 +- src/scu_power/evrvadcstat.rs | 2 +- src/scu_power/pwrclr.rs | 2 +- src/scu_power/pwrmon.rs | 2 +- src/scu_power/pwrset.rs | 2 +- src/scu_power/pwrstat.rs | 2 +- src/scu_reset.rs | 24 +- src/scu_reset/prclr0.rs | 2 +- src/scu_reset/prclr1.rs | 2 +- src/scu_reset/prclr2.rs | 2 +- src/scu_reset/prset0.rs | 2 +- src/scu_reset/prset1.rs | 2 +- src/scu_reset/prset2.rs | 2 +- src/scu_reset/prstat0.rs | 2 +- src/scu_reset/prstat1.rs | 2 +- src/scu_reset/prstat2.rs | 2 +- src/scu_reset/rstclr.rs | 2 +- src/scu_reset/rstset.rs | 2 +- src/scu_reset/rststat.rs | 2 +- src/scu_trap.rs | 10 +- src/scu_trap/trapclr.rs | 2 +- src/scu_trap/trapdis.rs | 2 +- src/scu_trap/trapraw.rs | 2 +- src/scu_trap/trapset.rs | 2 +- src/scu_trap/trapstat.rs | 2 +- src/usb0.rs | 90 ++-- src/usb0/daint.rs | 2 +- src/usb0/daintmsk.rs | 2 +- src/usb0/dcfg.rs | 2 +- src/usb0/dctl.rs | 2 +- src/usb0/diepempmsk.rs | 2 +- src/usb0/diepmsk.rs | 2 +- src/usb0/dieptxf1.rs | 2 +- src/usb0/dieptxf2.rs | 2 +- src/usb0/dieptxf3.rs | 2 +- src/usb0/dieptxf4.rs | 2 +- src/usb0/dieptxf5.rs | 2 +- src/usb0/dieptxf6.rs | 2 +- src/usb0/doepmsk.rs | 2 +- src/usb0/dsts.rs | 2 +- src/usb0/dvbusdis.rs | 2 +- src/usb0/dvbuspulse.rs | 2 +- src/usb0/gahbcfg.rs | 2 +- src/usb0/gdfifocfg.rs | 2 +- src/usb0/gintmsk_devicemode.rs | 2 +- src/usb0/gintmsk_hostmode.rs | 2 +- src/usb0/gintsts_devicemode.rs | 2 +- src/usb0/gintsts_hostmode.rs | 2 +- src/usb0/gnptxfsiz_devicemode.rs | 2 +- src/usb0/gnptxfsiz_hostmode.rs | 2 +- src/usb0/gnptxsts.rs | 2 +- src/usb0/gotgctl.rs | 2 +- src/usb0/gotgint.rs | 2 +- src/usb0/grstctl.rs | 2 +- src/usb0/grxfsiz.rs | 2 +- src/usb0/grxstsp_devicemode.rs | 2 +- src/usb0/grxstsp_hostmode.rs | 2 +- src/usb0/grxstsr_devicemode.rs | 2 +- src/usb0/grxstsr_hostmode.rs | 2 +- src/usb0/guid.rs | 2 +- src/usb0/gusbcfg.rs | 2 +- src/usb0/haint.rs | 2 +- src/usb0/haintmsk.rs | 2 +- src/usb0/hcfg.rs | 2 +- src/usb0/hfir.rs | 2 +- src/usb0/hflbaddr.rs | 2 +- src/usb0/hfnum.rs | 2 +- src/usb0/hprt.rs | 2 +- src/usb0/hptxfsiz.rs | 2 +- src/usb0/hptxsts.rs | 2 +- src/usb0/pcgcctl.rs | 2 +- src/usb0_ch0.rs | 16 +- src/usb0_ch0/hcchar.rs | 2 +- src/usb0_ch0/hcdma_buffermode.rs | 2 +- src/usb0_ch0/hcdma_scatgather.rs | 2 +- src/usb0_ch0/hcdmab.rs | 2 +- src/usb0_ch0/hcint.rs | 2 +- src/usb0_ch0/hcintmsk.rs | 2 +- src/usb0_ch0/hctsiz_buffermode.rs | 2 +- src/usb0_ch0/hctsiz_scatgather.rs | 2 +- src/usb0_ep0.rs | 22 +- src/usb0_ep0/diepctl0.rs | 2 +- src/usb0_ep0/diepdma0.rs | 2 +- src/usb0_ep0/diepdmab0.rs | 2 +- src/usb0_ep0/diepint0.rs | 2 +- src/usb0_ep0/dieptsiz0.rs | 2 +- src/usb0_ep0/doepctl0.rs | 2 +- src/usb0_ep0/doepdma0.rs | 2 +- src/usb0_ep0/doepdmab0.rs | 2 +- src/usb0_ep0/doepint0.rs | 2 +- src/usb0_ep0/doeptsiz0.rs | 2 +- src/usb0_ep0/dtxfsts0.rs | 2 +- src/usb0_ep1.rs | 28 +- src/usb0_ep1/diepctl_intbulk.rs | 2 +- src/usb0_ep1/diepctl_isocont.rs | 2 +- src/usb0_ep1/diepdma.rs | 2 +- src/usb0_ep1/diepdmab.rs | 2 +- src/usb0_ep1/diepint.rs | 2 +- src/usb0_ep1/dieptsiz.rs | 2 +- src/usb0_ep1/doepctl_intbulk.rs | 2 +- src/usb0_ep1/doepctl_isocont.rs | 2 +- src/usb0_ep1/doepdma.rs | 2 +- src/usb0_ep1/doepdmab.rs | 2 +- src/usb0_ep1/doepint.rs | 2 +- src/usb0_ep1/doeptsiz_control.rs | 2 +- src/usb0_ep1/doeptsiz_iso.rs | 2 +- src/usb0_ep1/dtxfsts.rs | 2 +- src/usic0.rs | 2 +- src/usic0/id.rs | 2 +- src/usic0_ch0.rs | 88 ++-- src/usic0_ch0/brg.rs | 2 +- src/usic0_ch0/byp.rs | 2 +- src/usic0_ch0/bypcr.rs | 2 +- src/usic0_ch0/ccfg.rs | 2 +- src/usic0_ch0/ccr.rs | 2 +- src/usic0_ch0/cmtr.rs | 2 +- src/usic0_ch0/dx0cr.rs | 2 +- src/usic0_ch0/dx1cr.rs | 2 +- src/usic0_ch0/dx2cr.rs | 2 +- src/usic0_ch0/dx3cr.rs | 2 +- src/usic0_ch0/dx4cr.rs | 2 +- src/usic0_ch0/dx5cr.rs | 2 +- src/usic0_ch0/fdr.rs | 2 +- src/usic0_ch0/fmr.rs | 2 +- src/usic0_ch0/in_.rs | 2 +- src/usic0_ch0/inpr.rs | 2 +- src/usic0_ch0/kscfg.rs | 2 +- src/usic0_ch0/outdr.rs | 2 +- src/usic0_ch0/outr.rs | 2 +- src/usic0_ch0/pcr.rs | 2 +- src/usic0_ch0/pcr_ascmode.rs | 2 +- src/usic0_ch0/pcr_iicmode.rs | 2 +- src/usic0_ch0/pcr_iismode.rs | 2 +- src/usic0_ch0/pcr_sscmode.rs | 2 +- src/usic0_ch0/pscr.rs | 2 +- src/usic0_ch0/psr.rs | 2 +- src/usic0_ch0/psr_ascmode.rs | 2 +- src/usic0_ch0/psr_iicmode.rs | 2 +- src/usic0_ch0/psr_iismode.rs | 2 +- src/usic0_ch0/psr_sscmode.rs | 2 +- src/usic0_ch0/rbctr.rs | 2 +- src/usic0_ch0/rbuf.rs | 2 +- src/usic0_ch0/rbuf0.rs | 2 +- src/usic0_ch0/rbuf01sr.rs | 2 +- src/usic0_ch0/rbuf1.rs | 2 +- src/usic0_ch0/rbufd.rs | 2 +- src/usic0_ch0/rbufsr.rs | 2 +- src/usic0_ch0/sctr.rs | 2 +- src/usic0_ch0/tbctr.rs | 2 +- src/usic0_ch0/tbuf.rs | 2 +- src/usic0_ch0/tcsr.rs | 2 +- src/usic0_ch0/trbptr.rs | 2 +- src/usic0_ch0/trbscr.rs | 2 +- src/usic0_ch0/trbsr.rs | 2 +- src/vadc.rs | 34 +- src/vadc/brsctrl.rs | 2 +- src/vadc/brsmr.rs | 2 +- src/vadc/brspnd.rs | 2 +- src/vadc/brssel.rs | 2 +- src/vadc/clc.rs | 2 +- src/vadc/emuxsel.rs | 2 +- src/vadc/globbound.rs | 2 +- src/vadc/globcfg.rs | 2 +- src/vadc/globeflag.rs | 2 +- src/vadc/globevnp.rs | 2 +- src/vadc/globiclass.rs | 2 +- src/vadc/globrcr.rs | 2 +- src/vadc/globres.rs | 2 +- src/vadc/globresd.rs | 2 +- src/vadc/globtf.rs | 2 +- src/vadc/id.rs | 2 +- src/vadc/ocs.rs | 2 +- src/vadc_g0.rs | 76 ++-- src/vadc_g0/alias.rs | 2 +- src/vadc_g0/arbcfg.rs | 2 +- src/vadc_g0/arbpr.rs | 2 +- src/vadc_g0/asctrl.rs | 2 +- src/vadc_g0/asmr.rs | 2 +- src/vadc_g0/aspnd.rs | 2 +- src/vadc_g0/assel.rs | 2 +- src/vadc_g0/bfl.rs | 2 +- src/vadc_g0/bflc.rs | 2 +- src/vadc_g0/bflnp.rs | 2 +- src/vadc_g0/bfls.rs | 2 +- src/vadc_g0/bound.rs | 2 +- src/vadc_g0/cefclr.rs | 2 +- src/vadc_g0/ceflag.rs | 2 +- src/vadc_g0/cevnp0.rs | 2 +- src/vadc_g0/chass.rs | 2 +- src/vadc_g0/chctr.rs | 2 +- src/vadc_g0/emuxctr.rs | 2 +- src/vadc_g0/iclass.rs | 2 +- src/vadc_g0/q0r0.rs | 2 +- src/vadc_g0/qbur0.rs | 2 +- src/vadc_g0/qctrl0.rs | 2 +- src/vadc_g0/qinr0.rs | 2 +- src/vadc_g0/qmr0.rs | 2 +- src/vadc_g0/qsr0.rs | 2 +- src/vadc_g0/rcr.rs | 2 +- src/vadc_g0/refclr.rs | 2 +- src/vadc_g0/reflag.rs | 2 +- src/vadc_g0/res.rs | 2 +- src/vadc_g0/resd.rs | 2 +- src/vadc_g0/revnp0.rs | 2 +- src/vadc_g0/revnp1.rs | 2 +- src/vadc_g0/sefclr.rs | 2 +- src/vadc_g0/seflag.rs | 2 +- src/vadc_g0/sevnp.rs | 2 +- src/vadc_g0/sract.rs | 2 +- src/vadc_g0/synctr.rs | 2 +- src/vadc_g0/vfr.rs | 2 +- src/wdt.rs | 16 +- src/wdt/ctr.rs | 2 +- src/wdt/id.rs | 2 +- src/wdt/srv.rs | 2 +- src/wdt/tim.rs | 2 +- src/wdt/wdtclr.rs | 2 +- src/wdt/wdtsts.rs | 2 +- src/wdt/wlb.rs | 2 +- src/wdt/wub.rs | 2 +- 952 files changed, 2115 insertions(+), 2114 deletions(-) diff --git a/src/can.rs b/src/can.rs index 82cd95c5..d9e8d942 100644 --- a/src/can.rs +++ b/src/can.rs @@ -87,52 +87,52 @@ impl RegisterBlock { &self.mitr } } -#[doc = "CLC (rw) register accessor: CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] +#[doc = "CLC (rw) register accessor: CAN Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] pub type CLC = crate::Reg; #[doc = "CAN Clock Control Register"] pub mod clc; -#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; -#[doc = "FDR (rw) register accessor: CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] +#[doc = "FDR (rw) register accessor: CAN Fractional Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] module"] pub type FDR = crate::Reg; #[doc = "CAN Fractional Divider Register"] pub mod fdr; -#[doc = "LIST (r) register accessor: List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@list`] +#[doc = "LIST (r) register accessor: List Register\n\nYou can [`read`](crate::Reg::read) this register and get [`list::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@list`] module"] pub type LIST = crate::Reg; #[doc = "List Register"] pub mod list; -#[doc = "MSPND (rw) register accessor: Message Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mspnd`] +#[doc = "MSPND (rw) register accessor: Message Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mspnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mspnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mspnd`] module"] pub type MSPND = crate::Reg; #[doc = "Message Pending Register"] pub mod mspnd; -#[doc = "MSID (r) register accessor: Message Index Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msid`] +#[doc = "MSID (r) register accessor: Message Index Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msid`] module"] pub type MSID = crate::Reg; #[doc = "Message Index Register"] pub mod msid; -#[doc = "MSIMASK (rw) register accessor: Message Index Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msimask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msimask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msimask`] +#[doc = "MSIMASK (rw) register accessor: Message Index Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msimask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msimask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msimask`] module"] pub type MSIMASK = crate::Reg; #[doc = "Message Index Mask Register"] pub mod msimask; -#[doc = "PANCTR (rw) register accessor: Panel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`panctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`panctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@panctr`] +#[doc = "PANCTR (rw) register accessor: Panel Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`panctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`panctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@panctr`] module"] pub type PANCTR = crate::Reg; #[doc = "Panel Control Register"] pub mod panctr; -#[doc = "MCR (rw) register accessor: Module Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcr`] +#[doc = "MCR (rw) register accessor: Module Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcr`] module"] pub type MCR = crate::Reg; #[doc = "Module Control Register"] pub mod mcr; -#[doc = "MITR (w) register accessor: Module Interrupt Trigger Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mitr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mitr`] +#[doc = "MITR (w) register accessor: Module Interrupt Trigger Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mitr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mitr`] module"] pub type MITR = crate::Reg; #[doc = "Module Interrupt Trigger Register"] diff --git a/src/can/clc.rs b/src/can/clc.rs index d2863655..e6403ee5 100644 --- a/src/can/clc.rs +++ b/src/can/clc.rs @@ -51,7 +51,7 @@ impl W { SBWE_W::new(self, 4) } } -#[doc = "CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CAN Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLC_SPEC; impl crate::RegisterSpec for CLC_SPEC { type Ux = u32; diff --git a/src/can/fdr.rs b/src/can/fdr.rs index 1b55878e..dca278d6 100644 --- a/src/can/fdr.rs +++ b/src/can/fdr.rs @@ -117,7 +117,7 @@ impl W { DISCLK_W::new(self, 31) } } -#[doc = "CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CAN Fractional Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FDR_SPEC; impl crate::RegisterSpec for FDR_SPEC { type Ux = u32; diff --git a/src/can/id.rs b/src/can/id.rs index 1c4eed67..81d8e107 100644 --- a/src/can/id.rs +++ b/src/can/id.rs @@ -55,7 +55,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/can/list.rs b/src/can/list.rs index 7d1110a0..3f2b4dd6 100644 --- a/src/can/list.rs +++ b/src/can/list.rs @@ -64,7 +64,7 @@ impl R { EMPTY_R::new(((self.bits >> 24) & 1) != 0) } } -#[doc = "List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "List Register\n\nYou can [`read`](crate::Reg::read) this register and get [`list::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LIST_SPEC; impl crate::RegisterSpec for LIST_SPEC { type Ux = u32; diff --git a/src/can/mcr.rs b/src/can/mcr.rs index 999f9aae..7e0876b5 100644 --- a/src/can/mcr.rs +++ b/src/can/mcr.rs @@ -21,7 +21,7 @@ impl W { MPSEL_W::new(self, 12) } } -#[doc = "Module Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MCR_SPEC; impl crate::RegisterSpec for MCR_SPEC { type Ux = u32; diff --git a/src/can/mitr.rs b/src/can/mitr.rs index 8d1f2e28..a93d4063 100644 --- a/src/can/mitr.rs +++ b/src/can/mitr.rs @@ -10,7 +10,7 @@ impl W { IT_W::new(self, 0) } } -#[doc = "Module Interrupt Trigger Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mitr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Interrupt Trigger Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mitr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MITR_SPEC; impl crate::RegisterSpec for MITR_SPEC { type Ux = u32; diff --git a/src/can/msid.rs b/src/can/msid.rs index bae28d51..bddd4f07 100644 --- a/src/can/msid.rs +++ b/src/can/msid.rs @@ -9,7 +9,7 @@ impl R { INDEX_R::new((self.bits & 0x3f) as u8) } } -#[doc = "Message Index Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Index Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MSID_SPEC; impl crate::RegisterSpec for MSID_SPEC { type Ux = u32; diff --git a/src/can/msimask.rs b/src/can/msimask.rs index 513659a3..c2af20c6 100644 --- a/src/can/msimask.rs +++ b/src/can/msimask.rs @@ -21,7 +21,7 @@ impl W { IM_W::new(self, 0) } } -#[doc = "Message Index Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msimask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msimask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Index Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msimask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msimask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MSIMASK_SPEC; impl crate::RegisterSpec for MSIMASK_SPEC { type Ux = u32; diff --git a/src/can/mspnd.rs b/src/can/mspnd.rs index 169b73a2..242d26f3 100644 --- a/src/can/mspnd.rs +++ b/src/can/mspnd.rs @@ -21,7 +21,7 @@ impl W { PND_W::new(self, 0) } } -#[doc = "Message Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mspnd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mspnd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MSPND_SPEC; impl crate::RegisterSpec for MSPND_SPEC { type Ux = u32; diff --git a/src/can/panctr.rs b/src/can/panctr.rs index 626d49ae..eb80f6eb 100644 --- a/src/can/panctr.rs +++ b/src/can/panctr.rs @@ -133,7 +133,7 @@ impl W { PANAR2_W::new(self, 24) } } -#[doc = "Panel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`panctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`panctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Panel Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`panctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`panctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PANCTR_SPEC; impl crate::RegisterSpec for PANCTR_SPEC { type Ux = u32; diff --git a/src/can_mo0.rs b/src/can_mo0.rs index 327cae25..4da07b08 100644 --- a/src/can_mo0.rs +++ b/src/can_mo0.rs @@ -57,47 +57,47 @@ impl RegisterBlock { unsafe { &*(self as *const Self).cast::().add(28).cast() } } } -#[doc = "MOFCR (rw) register accessor: Message Object Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofcr`] +#[doc = "MOFCR (rw) register accessor: Message Object Function Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mofcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mofcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofcr`] module"] pub type MOFCR = crate::Reg; #[doc = "Message Object Function Control Register"] pub mod mofcr; -#[doc = "MOFGPR (rw) register accessor: Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofgpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofgpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofgpr`] +#[doc = "MOFGPR (rw) register accessor: Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mofgpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mofgpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofgpr`] module"] pub type MOFGPR = crate::Reg; #[doc = "Message Object FIFO/Gateway Pointer Register"] pub mod mofgpr; -#[doc = "MOIPR (rw) register accessor: Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moipr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moipr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moipr`] +#[doc = "MOIPR (rw) register accessor: Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`moipr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moipr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moipr`] module"] pub type MOIPR = crate::Reg; #[doc = "Message Object Interrupt Pointer Register"] pub mod moipr; -#[doc = "MOAMR (rw) register accessor: Message Object Acceptance Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moamr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moamr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moamr`] +#[doc = "MOAMR (rw) register accessor: Message Object Acceptance Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`moamr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moamr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moamr`] module"] pub type MOAMR = crate::Reg; #[doc = "Message Object Acceptance Mask Register"] pub mod moamr; -#[doc = "MODATAL (rw) register accessor: Message Object Data Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatal::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatal::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatal`] +#[doc = "MODATAL (rw) register accessor: Message Object Data Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`modatal::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`modatal::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatal`] module"] pub type MODATAL = crate::Reg; #[doc = "Message Object Data Register Low"] pub mod modatal; -#[doc = "MODATAH (rw) register accessor: Message Object Data Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatah::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatah::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatah`] +#[doc = "MODATAH (rw) register accessor: Message Object Data Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`modatah::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`modatah::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatah`] module"] pub type MODATAH = crate::Reg; #[doc = "Message Object Data Register High"] pub mod modatah; -#[doc = "MOAR (rw) register accessor: Message Object Arbitration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moar`] +#[doc = "MOAR (rw) register accessor: Message Object Arbitration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`moar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moar`] module"] pub type MOAR = crate::Reg; #[doc = "Message Object Arbitration Register"] pub mod moar; -#[doc = "MOCTR (w) register accessor: Message Object Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moctr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moctr`] +#[doc = "MOCTR (w) register accessor: Message Object Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moctr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moctr`] module"] pub type MOCTR = crate::Reg; #[doc = "Message Object Control Register"] pub mod moctr; -#[doc = "MOSTAT (r) register accessor: Message Object Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mostat`] +#[doc = "MOSTAT (r) register accessor: Message Object Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mostat`] module"] pub type MOSTAT = crate::Reg; #[doc = "Message Object Status Register"] diff --git a/src/can_mo0/moamr.rs b/src/can_mo0/moamr.rs index c1e02a04..6f86bc6d 100644 --- a/src/can_mo0/moamr.rs +++ b/src/can_mo0/moamr.rs @@ -85,7 +85,7 @@ impl W { MIDE_W::new(self, 29) } } -#[doc = "Message Object Acceptance Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moamr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moamr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Acceptance Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`moamr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moamr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MOAMR_SPEC; impl crate::RegisterSpec for MOAMR_SPEC { type Ux = u32; diff --git a/src/can_mo0/moar.rs b/src/can_mo0/moar.rs index adc602ac..57d2db69 100644 --- a/src/can_mo0/moar.rs +++ b/src/can_mo0/moar.rs @@ -182,7 +182,7 @@ impl W { PRI_W::new(self, 30) } } -#[doc = "Message Object Arbitration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Arbitration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`moar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MOAR_SPEC; impl crate::RegisterSpec for MOAR_SPEC { type Ux = u32; diff --git a/src/can_mo0/moctr.rs b/src/can_mo0/moctr.rs index 5f020643..205ed740 100644 --- a/src/can_mo0/moctr.rs +++ b/src/can_mo0/moctr.rs @@ -194,7 +194,7 @@ impl W { SETDIR_W::new(self, 27) } } -#[doc = "Message Object Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moctr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moctr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MOCTR_SPEC; impl crate::RegisterSpec for MOCTR_SPEC { type Ux = u32; diff --git a/src/can_mo0/modatah.rs b/src/can_mo0/modatah.rs index 86f9194f..e29226aa 100644 --- a/src/can_mo0/modatah.rs +++ b/src/can_mo0/modatah.rs @@ -66,7 +66,7 @@ impl W { DB7_W::new(self, 24) } } -#[doc = "Message Object Data Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatah::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatah::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Data Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`modatah::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`modatah::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MODATAH_SPEC; impl crate::RegisterSpec for MODATAH_SPEC { type Ux = u32; diff --git a/src/can_mo0/modatal.rs b/src/can_mo0/modatal.rs index 101f64d3..9abb2c4e 100644 --- a/src/can_mo0/modatal.rs +++ b/src/can_mo0/modatal.rs @@ -66,7 +66,7 @@ impl W { DB3_W::new(self, 24) } } -#[doc = "Message Object Data Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatal::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatal::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Data Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`modatal::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`modatal::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MODATAL_SPEC; impl crate::RegisterSpec for MODATAL_SPEC { type Ux = u32; diff --git a/src/can_mo0/mofcr.rs b/src/can_mo0/mofcr.rs index da9c3236..b28e43d9 100644 --- a/src/can_mo0/mofcr.rs +++ b/src/can_mo0/mofcr.rs @@ -737,7 +737,7 @@ impl W { DLC_W::new(self, 24) } } -#[doc = "Message Object Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Function Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mofcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mofcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MOFCR_SPEC; impl crate::RegisterSpec for MOFCR_SPEC { type Ux = u32; diff --git a/src/can_mo0/mofgpr.rs b/src/can_mo0/mofgpr.rs index ba8f90c5..8856aaf1 100644 --- a/src/can_mo0/mofgpr.rs +++ b/src/can_mo0/mofgpr.rs @@ -66,7 +66,7 @@ impl W { SEL_W::new(self, 24) } } -#[doc = "Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofgpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofgpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mofgpr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mofgpr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MOFGPR_SPEC; impl crate::RegisterSpec for MOFGPR_SPEC { type Ux = u32; diff --git a/src/can_mo0/moipr.rs b/src/can_mo0/moipr.rs index 52eddea5..253b795d 100644 --- a/src/can_mo0/moipr.rs +++ b/src/can_mo0/moipr.rs @@ -204,7 +204,7 @@ impl W { CFCVAL_W::new(self, 16) } } -#[doc = "Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moipr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moipr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`moipr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moipr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MOIPR_SPEC; impl crate::RegisterSpec for MOIPR_SPEC { type Ux = u32; diff --git a/src/can_mo0/mostat.rs b/src/can_mo0/mostat.rs index 9f3b491b..f6069387 100644 --- a/src/can_mo0/mostat.rs +++ b/src/can_mo0/mostat.rs @@ -515,7 +515,7 @@ impl R { PNEXT_R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "Message Object Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Message Object Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MOSTAT_SPEC; impl crate::RegisterSpec for MOSTAT_SPEC { type Ux = u32; diff --git a/src/can_node0.rs b/src/can_node0.rs index bddd8a0d..7b9905fc 100644 --- a/src/can_node0.rs +++ b/src/can_node0.rs @@ -46,37 +46,37 @@ impl RegisterBlock { &self.nfcr } } -#[doc = "NCR (rw) register accessor: Node Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ncr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ncr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ncr`] +#[doc = "NCR (rw) register accessor: Node Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ncr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ncr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ncr`] module"] pub type NCR = crate::Reg; #[doc = "Node Control Register"] pub mod ncr; -#[doc = "NSR (rw) register accessor: Node Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsr`] +#[doc = "NSR (rw) register accessor: Node Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsr`] module"] pub type NSR = crate::Reg; #[doc = "Node Status Register"] pub mod nsr; -#[doc = "NIPR (rw) register accessor: Node Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nipr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nipr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nipr`] +#[doc = "NIPR (rw) register accessor: Node Interrupt Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nipr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nipr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nipr`] module"] pub type NIPR = crate::Reg; #[doc = "Node Interrupt Pointer Register"] pub mod nipr; -#[doc = "NPCR (rw) register accessor: Node Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npcr`] +#[doc = "NPCR (rw) register accessor: Node Port Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`npcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`npcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npcr`] module"] pub type NPCR = crate::Reg; #[doc = "Node Port Control Register"] pub mod npcr; -#[doc = "NBTR (rw) register accessor: Node Bit Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nbtr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nbtr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nbtr`] +#[doc = "NBTR (rw) register accessor: Node Bit Timing Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nbtr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nbtr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nbtr`] module"] pub type NBTR = crate::Reg; #[doc = "Node Bit Timing Register"] pub mod nbtr; -#[doc = "NECNT (rw) register accessor: Node Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necnt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`necnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@necnt`] +#[doc = "NECNT (rw) register accessor: Node Error Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`necnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`necnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@necnt`] module"] pub type NECNT = crate::Reg; #[doc = "Node Error Counter Register"] pub mod necnt; -#[doc = "NFCR (rw) register accessor: Node Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nfcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nfcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nfcr`] +#[doc = "NFCR (rw) register accessor: Node Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nfcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nfcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nfcr`] module"] pub type NFCR = crate::Reg; #[doc = "Node Frame Counter Register"] diff --git a/src/can_node0/nbtr.rs b/src/can_node0/nbtr.rs index 944af895..e4fe6382 100644 --- a/src/can_node0/nbtr.rs +++ b/src/can_node0/nbtr.rs @@ -130,7 +130,7 @@ impl W { DIV8_W::new(self, 15) } } -#[doc = "Node Bit Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nbtr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nbtr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Node Bit Timing Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nbtr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nbtr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NBTR_SPEC; impl crate::RegisterSpec for NBTR_SPEC { type Ux = u32; diff --git a/src/can_node0/ncr.rs b/src/can_node0/ncr.rs index 710637b8..c6b276a2 100644 --- a/src/can_node0/ncr.rs +++ b/src/can_node0/ncr.rs @@ -420,7 +420,7 @@ impl W { SUSEN_W::new(self, 8) } } -#[doc = "Node Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ncr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ncr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Node Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ncr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ncr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NCR_SPEC; impl crate::RegisterSpec for NCR_SPEC { type Ux = u32; diff --git a/src/can_node0/necnt.rs b/src/can_node0/necnt.rs index aa37ae83..34259f28 100644 --- a/src/can_node0/necnt.rs +++ b/src/can_node0/necnt.rs @@ -133,7 +133,7 @@ impl W { EWRNLVL_W::new(self, 16) } } -#[doc = "Node Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necnt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`necnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Node Error Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`necnt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`necnt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NECNT_SPEC; impl crate::RegisterSpec for NECNT_SPEC { type Ux = u32; diff --git a/src/can_node0/nfcr.rs b/src/can_node0/nfcr.rs index 4a21025c..ae162729 100644 --- a/src/can_node0/nfcr.rs +++ b/src/can_node0/nfcr.rs @@ -291,7 +291,7 @@ impl W { CFCOV_W::new(self, 23) } } -#[doc = "Node Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nfcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nfcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Node Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nfcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nfcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NFCR_SPEC; impl crate::RegisterSpec for NFCR_SPEC { type Ux = u32; diff --git a/src/can_node0/nipr.rs b/src/can_node0/nipr.rs index 390b1c70..c939b13e 100644 --- a/src/can_node0/nipr.rs +++ b/src/can_node0/nipr.rs @@ -342,7 +342,7 @@ impl W { CFCINP_W::new(self, 12) } } -#[doc = "Node Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nipr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nipr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Node Interrupt Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nipr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nipr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NIPR_SPEC; impl crate::RegisterSpec for NIPR_SPEC { type Ux = u32; diff --git a/src/can_node0/npcr.rs b/src/can_node0/npcr.rs index 02202677..3408526d 100644 --- a/src/can_node0/npcr.rs +++ b/src/can_node0/npcr.rs @@ -85,7 +85,7 @@ impl W { LBM_W::new(self, 8) } } -#[doc = "Node Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Node Port Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`npcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`npcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NPCR_SPEC; impl crate::RegisterSpec for NPCR_SPEC { type Ux = u32; diff --git a/src/can_node0/nsr.rs b/src/can_node0/nsr.rs index d27eff56..b20c0ed2 100644 --- a/src/can_node0/nsr.rs +++ b/src/can_node0/nsr.rs @@ -415,7 +415,7 @@ impl W { LOE_W::new(self, 9) } } -#[doc = "Node Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Node Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`nsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NSR_SPEC; impl crate::RegisterSpec for NSR_SPEC { type Ux = u32; diff --git a/src/ccu40.rs b/src/ccu40.rs index a2fd4343..8141071f 100644 --- a/src/ccu40.rs +++ b/src/ccu40.rs @@ -60,47 +60,47 @@ impl RegisterBlock { &self.midr } } -#[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] +#[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] module"] pub type GCTRL = crate::Reg; #[doc = "Global Control Register"] pub mod gctrl; -#[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] +#[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] module"] pub type GSTAT = crate::Reg; #[doc = "Global Status Register"] pub mod gstat; -#[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] +#[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] module"] pub type GIDLS = crate::Reg; #[doc = "Global Idle Set"] pub mod gidls; -#[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] +#[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] module"] pub type GIDLC = crate::Reg; #[doc = "Global Idle Clear"] pub mod gidlc; -#[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] +#[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] module"] pub type GCSS = crate::Reg; #[doc = "Global Channel Set"] pub mod gcss; -#[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] +#[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] module"] pub type GCSC = crate::Reg; #[doc = "Global Channel Clear"] pub mod gcsc; -#[doc = "GCST (r) register accessor: Global Channel Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] +#[doc = "GCST (r) register accessor: Global Channel Status\n\nYou can [`read`](crate::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] module"] pub type GCST = crate::Reg; #[doc = "Global Channel Status"] pub mod gcst; -#[doc = "ECRD (r) register accessor: Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd`] +#[doc = "ECRD (r) register accessor: Extended Capture Mode Read\n\nYou can [`read`](crate::Reg::read) this register and get [`ecrd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@ecrd`] module"] pub type ECRD = crate::Reg; #[doc = "Extended Capture Mode Read"] pub mod ecrd; -#[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] +#[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] pub type MIDR = crate::Reg; #[doc = "Module Identification"] diff --git a/src/ccu40/ecrd.rs b/src/ccu40/ecrd.rs index 54c03ab7..4e625791 100644 --- a/src/ccu40/ecrd.rs +++ b/src/ccu40/ecrd.rs @@ -183,7 +183,7 @@ impl R { FFL_R::new(((self.bits >> 24) & 1) != 0) } } -#[doc = "Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Extended Capture Mode Read\n\nYou can [`read`](crate::Reg::read) this register and get [`ecrd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct ECRD_SPEC; impl crate::RegisterSpec for ECRD_SPEC { type Ux = u32; diff --git a/src/ccu40/gcsc.rs b/src/ccu40/gcsc.rs index 43d0f4d6..09fb22a6 100644 --- a/src/ccu40/gcsc.rs +++ b/src/ccu40/gcsc.rs @@ -130,7 +130,7 @@ impl W { S3STC_W::new(self, 19) } } -#[doc = "Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Channel Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCSC_SPEC; impl crate::RegisterSpec for GCSC_SPEC { type Ux = u32; diff --git a/src/ccu40/gcss.rs b/src/ccu40/gcss.rs index 70789d07..3b1ed572 100644 --- a/src/ccu40/gcss.rs +++ b/src/ccu40/gcss.rs @@ -130,7 +130,7 @@ impl W { S3STS_W::new(self, 19) } } -#[doc = "Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Channel Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCSS_SPEC; impl crate::RegisterSpec for GCSS_SPEC { type Ux = u32; diff --git a/src/ccu40/gcst.rs b/src/ccu40/gcst.rs index 2750092c..0a6ae219 100644 --- a/src/ccu40/gcst.rs +++ b/src/ccu40/gcst.rs @@ -522,7 +522,7 @@ impl R { CC43ST_R::new(((self.bits >> 19) & 1) != 0) } } -#[doc = "Global Channel Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Channel Status\n\nYou can [`read`](crate::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCST_SPEC; impl crate::RegisterSpec for GCST_SPEC { type Ux = u32; diff --git a/src/ccu40/gctrl.rs b/src/ccu40/gctrl.rs index f18411eb..d0a62ebd 100644 --- a/src/ccu40/gctrl.rs +++ b/src/ccu40/gctrl.rs @@ -650,7 +650,7 @@ impl W { MSDE_W::new(self, 14) } } -#[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCTRL_SPEC; impl crate::RegisterSpec for GCTRL_SPEC { type Ux = u32; diff --git a/src/ccu40/gidlc.rs b/src/ccu40/gidlc.rs index ebf8731f..4fdfa4f5 100644 --- a/src/ccu40/gidlc.rs +++ b/src/ccu40/gidlc.rs @@ -42,7 +42,7 @@ impl W { SPRB_W::new(self, 8) } } -#[doc = "Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Idle Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GIDLC_SPEC; impl crate::RegisterSpec for GIDLC_SPEC { type Ux = u32; diff --git a/src/ccu40/gidls.rs b/src/ccu40/gidls.rs index ac66911f..8461de49 100644 --- a/src/ccu40/gidls.rs +++ b/src/ccu40/gidls.rs @@ -50,7 +50,7 @@ impl W { PSIC_W::new(self, 9) } } -#[doc = "Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Idle Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GIDLS_SPEC; impl crate::RegisterSpec for GIDLS_SPEC { type Ux = u32; diff --git a/src/ccu40/gstat.rs b/src/ccu40/gstat.rs index 6d3a25e3..ae996eb7 100644 --- a/src/ccu40/gstat.rs +++ b/src/ccu40/gstat.rs @@ -207,7 +207,7 @@ impl R { PRB_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GSTAT_SPEC; impl crate::RegisterSpec for GSTAT_SPEC { type Ux = u32; diff --git a/src/ccu40/midr.rs b/src/ccu40/midr.rs index a00c3cf8..eef6e558 100644 --- a/src/ccu40/midr.rs +++ b/src/ccu40/midr.rs @@ -23,7 +23,7 @@ impl R { MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MIDR_SPEC; impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40.rs b/src/ccu40_cc40.rs index ec8440c5..8198aebb 100644 --- a/src/ccu40_cc40.rs +++ b/src/ccu40_cc40.rs @@ -162,132 +162,132 @@ impl RegisterBlock { &self.swr } } -#[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] +#[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] module"] pub type INS = crate::Reg; #[doc = "Input Selector Configuration"] pub mod ins; -#[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] +#[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] module"] pub type CMC = crate::Reg; #[doc = "Connection Matrix Control"] pub mod cmc; -#[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] +#[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] module"] pub type TCST = crate::Reg; #[doc = "Slice Timer Status"] pub mod tcst; -#[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] +#[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] module"] pub type TCSET = crate::Reg; #[doc = "Slice Timer Run Set"] pub mod tcset; -#[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] +#[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] module"] pub type TCCLR = crate::Reg; #[doc = "Slice Timer Clear"] pub mod tcclr; -#[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] +#[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] module"] pub type TC = crate::Reg; #[doc = "Slice Timer Control"] pub mod tc; -#[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] +#[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] module"] pub type PSL = crate::Reg; #[doc = "Passive Level Config"] pub mod psl; -#[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] +#[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] module"] pub type DIT = crate::Reg; #[doc = "Dither Config"] pub mod dit; -#[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] +#[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] module"] pub type DITS = crate::Reg; #[doc = "Dither Shadow Register"] pub mod dits; -#[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] +#[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] module"] pub type PSC = crate::Reg; #[doc = "Prescaler Control"] pub mod psc; -#[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] +#[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] module"] pub type FPC = crate::Reg; #[doc = "Floating Prescaler Control"] pub mod fpc; -#[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] +#[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] module"] pub type FPCS = crate::Reg; #[doc = "Floating Prescaler Shadow"] pub mod fpcs; -#[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] +#[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] module"] pub type PR = crate::Reg; #[doc = "Timer Period Value"] pub mod pr; -#[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] +#[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] module"] pub type PRS = crate::Reg; #[doc = "Timer Shadow Period Value"] pub mod prs; -#[doc = "CR (r) register accessor: Timer Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`] +#[doc = "CR (r) register accessor: Timer Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`] module"] pub type CR = crate::Reg; #[doc = "Timer Compare Value"] pub mod cr; -#[doc = "CRS (rw) register accessor: Timer Shadow Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crs`] +#[doc = "CRS (rw) register accessor: Timer Shadow Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`crs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crs`] module"] pub type CRS = crate::Reg; #[doc = "Timer Shadow Compare Value"] pub mod crs; -#[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] +#[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] module"] pub type TIMER = crate::Reg; #[doc = "Timer Value"] pub mod timer; -#[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c0v`] +#[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`c0v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c0v`] module"] pub type C0V = crate::Reg; #[doc = "Capture Register 0"] pub mod c0v; -#[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c1v`] +#[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`c1v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c1v`] module"] pub type C1V = crate::Reg; #[doc = "Capture Register 1"] pub mod c1v; -#[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c2v`] +#[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`c2v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c2v`] module"] pub type C2V = crate::Reg; #[doc = "Capture Register 2"] pub mod c2v; -#[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c3v`] +#[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`c3v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c3v`] module"] pub type C3V = crate::Reg; #[doc = "Capture Register 3"] pub mod c3v; -#[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] +#[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] module"] pub type INTS = crate::Reg; #[doc = "Interrupt Status"] pub mod ints; -#[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] +#[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] module"] pub type INTE = crate::Reg; #[doc = "Interrupt Enable Control"] pub mod inte; -#[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] +#[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] pub type SRS = crate::Reg; #[doc = "Service Request Selector"] pub mod srs; -#[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] +#[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] pub type SWS = crate::Reg; #[doc = "Interrupt Status Set"] pub mod sws; -#[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] +#[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] module"] pub type SWR = crate::Reg; #[doc = "Interrupt Status Clear"] diff --git a/src/ccu40_cc40/c0v.rs b/src/ccu40_cc40/c0v.rs index 220d6022..deb07cd0 100644 --- a/src/ccu40_cc40/c0v.rs +++ b/src/ccu40_cc40/c0v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`c0v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C0V_SPEC; impl crate::RegisterSpec for C0V_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/c1v.rs b/src/ccu40_cc40/c1v.rs index 19aed9fb..f0cd18ca 100644 --- a/src/ccu40_cc40/c1v.rs +++ b/src/ccu40_cc40/c1v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`c1v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C1V_SPEC; impl crate::RegisterSpec for C1V_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/c2v.rs b/src/ccu40_cc40/c2v.rs index e04bb78c..7fed1ea1 100644 --- a/src/ccu40_cc40/c2v.rs +++ b/src/ccu40_cc40/c2v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`c2v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C2V_SPEC; impl crate::RegisterSpec for C2V_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/c3v.rs b/src/ccu40_cc40/c3v.rs index c502b769..282b2b6a 100644 --- a/src/ccu40_cc40/c3v.rs +++ b/src/ccu40_cc40/c3v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`c3v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C3V_SPEC; impl crate::RegisterSpec for C3V_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/cmc.rs b/src/ccu40_cc40/cmc.rs index cbf59c75..84109e27 100644 --- a/src/ccu40_cc40/cmc.rs +++ b/src/ccu40_cc40/cmc.rs @@ -907,7 +907,7 @@ impl W { TCE_W::new(self, 20) } } -#[doc = "Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Connection Matrix Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CMC_SPEC; impl crate::RegisterSpec for CMC_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/cr.rs b/src/ccu40_cc40/cr.rs index 6a3a7ff7..5115b258 100644 --- a/src/ccu40_cc40/cr.rs +++ b/src/ccu40_cc40/cr.rs @@ -9,7 +9,7 @@ impl R { CR_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Timer Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CR_SPEC; impl crate::RegisterSpec for CR_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/crs.rs b/src/ccu40_cc40/crs.rs index 94e1f4ed..ca7ef15b 100644 --- a/src/ccu40_cc40/crs.rs +++ b/src/ccu40_cc40/crs.rs @@ -21,7 +21,7 @@ impl W { CRS_W::new(self, 0) } } -#[doc = "Timer Shadow Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Shadow Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`crs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CRS_SPEC; impl crate::RegisterSpec for CRS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/dit.rs b/src/ccu40_cc40/dit.rs index 02e005ab..e1876dd9 100644 --- a/src/ccu40_cc40/dit.rs +++ b/src/ccu40_cc40/dit.rs @@ -16,7 +16,7 @@ impl R { DCNT_R::new(((self.bits >> 8) & 0x0f) as u8) } } -#[doc = "Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Dither Config\n\nYou can [`read`](crate::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIT_SPEC; impl crate::RegisterSpec for DIT_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/dits.rs b/src/ccu40_cc40/dits.rs index 31dd2b44..0457d48f 100644 --- a/src/ccu40_cc40/dits.rs +++ b/src/ccu40_cc40/dits.rs @@ -21,7 +21,7 @@ impl W { DCVS_W::new(self, 0) } } -#[doc = "Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Dither Shadow Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DITS_SPEC; impl crate::RegisterSpec for DITS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/fpc.rs b/src/ccu40_cc40/fpc.rs index 36e4088a..77c4d241 100644 --- a/src/ccu40_cc40/fpc.rs +++ b/src/ccu40_cc40/fpc.rs @@ -28,7 +28,7 @@ impl W { PVAL_W::new(self, 8) } } -#[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FPC_SPEC; impl crate::RegisterSpec for FPC_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/fpcs.rs b/src/ccu40_cc40/fpcs.rs index e59acee1..7ebabe62 100644 --- a/src/ccu40_cc40/fpcs.rs +++ b/src/ccu40_cc40/fpcs.rs @@ -21,7 +21,7 @@ impl W { PCMP_W::new(self, 0) } } -#[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FPCS_SPEC; impl crate::RegisterSpec for FPCS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/ins.rs b/src/ccu40_cc40/ins.rs index 76659036..9e16e3ba 100644 --- a/src/ccu40_cc40/ins.rs +++ b/src/ccu40_cc40/ins.rs @@ -1539,7 +1539,7 @@ impl W { LPF2M_W::new(self, 29) } } -#[doc = "Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Selector Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INS_SPEC; impl crate::RegisterSpec for INS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/inte.rs b/src/ccu40_cc40/inte.rs index 78e3d3de..3bd17c45 100644 --- a/src/ccu40_cc40/inte.rs +++ b/src/ccu40_cc40/inte.rs @@ -454,7 +454,7 @@ impl W { E2AE_W::new(self, 10) } } -#[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INTE_SPEC; impl crate::RegisterSpec for INTE_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/ints.rs b/src/ccu40_cc40/ints.rs index b805c2c3..070af119 100644 --- a/src/ccu40_cc40/ints.rs +++ b/src/ccu40_cc40/ints.rs @@ -296,7 +296,7 @@ impl R { TRPF_R::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INTS_SPEC; impl crate::RegisterSpec for INTS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/pr.rs b/src/ccu40_cc40/pr.rs index 33893da5..82bffa47 100644 --- a/src/ccu40_cc40/pr.rs +++ b/src/ccu40_cc40/pr.rs @@ -9,7 +9,7 @@ impl R { PR_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PR_SPEC; impl crate::RegisterSpec for PR_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/prs.rs b/src/ccu40_cc40/prs.rs index b8d77680..7a8e25be 100644 --- a/src/ccu40_cc40/prs.rs +++ b/src/ccu40_cc40/prs.rs @@ -21,7 +21,7 @@ impl W { PRS_W::new(self, 0) } } -#[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRS_SPEC; impl crate::RegisterSpec for PRS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/psc.rs b/src/ccu40_cc40/psc.rs index 0b0a874e..81b915c9 100644 --- a/src/ccu40_cc40/psc.rs +++ b/src/ccu40_cc40/psc.rs @@ -21,7 +21,7 @@ impl W { PSIV_W::new(self, 0) } } -#[doc = "Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/psl.rs b/src/ccu40_cc40/psl.rs index 488aad06..3e3f8018 100644 --- a/src/ccu40_cc40/psl.rs +++ b/src/ccu40_cc40/psl.rs @@ -70,7 +70,7 @@ impl W { PSL_W::new(self, 0) } } -#[doc = "Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Passive Level Config\n\nYou can [`read`](crate::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSL_SPEC; impl crate::RegisterSpec for PSL_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/srs.rs b/src/ccu40_cc40/srs.rs index cab372a8..c1f900c5 100644 --- a/src/ccu40_cc40/srs.rs +++ b/src/ccu40_cc40/srs.rs @@ -491,7 +491,7 @@ impl W { E2SR_W::new(self, 12) } } -#[doc = "Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Selector\n\nYou can [`read`](crate::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRS_SPEC; impl crate::RegisterSpec for SRS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/swr.rs b/src/ccu40_cc40/swr.rs index 928ddf79..290356fd 100644 --- a/src/ccu40_cc40/swr.rs +++ b/src/ccu40_cc40/swr.rs @@ -66,7 +66,7 @@ impl W { RTRPF_W::new(self, 11) } } -#[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SWR_SPEC; impl crate::RegisterSpec for SWR_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/sws.rs b/src/ccu40_cc40/sws.rs index d1110959..666deb65 100644 --- a/src/ccu40_cc40/sws.rs +++ b/src/ccu40_cc40/sws.rs @@ -66,7 +66,7 @@ impl W { STRPF_W::new(self, 11) } } -#[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SWS_SPEC; impl crate::RegisterSpec for SWS_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/tc.rs b/src/ccu40_cc40/tc.rs index b2629eb0..1a80da9d 100644 --- a/src/ccu40_cc40/tc.rs +++ b/src/ccu40_cc40/tc.rs @@ -1236,7 +1236,7 @@ impl W { MCME_W::new(self, 25) } } -#[doc = "Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TC_SPEC; impl crate::RegisterSpec for TC_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/tcclr.rs b/src/ccu40_cc40/tcclr.rs index d2fa79fd..abf7b848 100644 --- a/src/ccu40_cc40/tcclr.rs +++ b/src/ccu40_cc40/tcclr.rs @@ -26,7 +26,7 @@ impl W { DITC_W::new(self, 2) } } -#[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TCCLR_SPEC; impl crate::RegisterSpec for TCCLR_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/tcset.rs b/src/ccu40_cc40/tcset.rs index 3be8b0aa..04914af2 100644 --- a/src/ccu40_cc40/tcset.rs +++ b/src/ccu40_cc40/tcset.rs @@ -10,7 +10,7 @@ impl W { TRBS_W::new(self, 0) } } -#[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TCSET_SPEC; impl crate::RegisterSpec for TCSET_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/tcst.rs b/src/ccu40_cc40/tcst.rs index c685aaa6..08327569 100644 --- a/src/ccu40_cc40/tcst.rs +++ b/src/ccu40_cc40/tcst.rs @@ -84,7 +84,7 @@ impl R { CDIR_R::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Status\n\nYou can [`read`](crate::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TCST_SPEC; impl crate::RegisterSpec for TCST_SPEC { type Ux = u32; diff --git a/src/ccu40_cc40/timer.rs b/src/ccu40_cc40/timer.rs index 1c7ed7d0..222e6bd7 100644 --- a/src/ccu40_cc40/timer.rs +++ b/src/ccu40_cc40/timer.rs @@ -21,7 +21,7 @@ impl W { TVAL_W::new(self, 0) } } -#[doc = "Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Value\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIMER_SPEC; impl crate::RegisterSpec for TIMER_SPEC { type Ux = u32; diff --git a/src/ccu80.rs b/src/ccu80.rs index 429b9bff..9f40fc0a 100644 --- a/src/ccu80.rs +++ b/src/ccu80.rs @@ -66,52 +66,52 @@ impl RegisterBlock { &self.midr } } -#[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] +#[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] module"] pub type GCTRL = crate::Reg; #[doc = "Global Control Register"] pub mod gctrl; -#[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] +#[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] module"] pub type GSTAT = crate::Reg; #[doc = "Global Status Register"] pub mod gstat; -#[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] +#[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] module"] pub type GIDLS = crate::Reg; #[doc = "Global Idle Set"] pub mod gidls; -#[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] +#[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] module"] pub type GIDLC = crate::Reg; #[doc = "Global Idle Clear"] pub mod gidlc; -#[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] +#[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] module"] pub type GCSS = crate::Reg; #[doc = "Global Channel Set"] pub mod gcss; -#[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] +#[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] module"] pub type GCSC = crate::Reg; #[doc = "Global Channel Clear"] pub mod gcsc; -#[doc = "GCST (r) register accessor: Global Channel status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] +#[doc = "GCST (r) register accessor: Global Channel status\n\nYou can [`read`](crate::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] module"] pub type GCST = crate::Reg; #[doc = "Global Channel status"] pub mod gcst; -#[doc = "GPCHK (rw) register accessor: Parity Checker Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpchk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpchk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpchk`] +#[doc = "GPCHK (rw) register accessor: Parity Checker Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`gpchk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpchk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpchk`] module"] pub type GPCHK = crate::Reg; #[doc = "Parity Checker Configuration"] pub mod gpchk; -#[doc = "ECRD (r) register accessor: Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd`] +#[doc = "ECRD (r) register accessor: Extended Capture Mode Read\n\nYou can [`read`](crate::Reg::read) this register and get [`ecrd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@ecrd`] module"] pub type ECRD = crate::Reg; #[doc = "Extended Capture Mode Read"] pub mod ecrd; -#[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] +#[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] pub type MIDR = crate::Reg; #[doc = "Module Identification"] diff --git a/src/ccu80/ecrd.rs b/src/ccu80/ecrd.rs index 1cb76a1f..bf75c5ee 100644 --- a/src/ccu80/ecrd.rs +++ b/src/ccu80/ecrd.rs @@ -183,7 +183,7 @@ impl R { FFL_R::new(((self.bits >> 24) & 1) != 0) } } -#[doc = "Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Extended Capture Mode Read\n\nYou can [`read`](crate::Reg::read) this register and get [`ecrd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct ECRD_SPEC; impl crate::RegisterSpec for ECRD_SPEC { type Ux = u32; diff --git a/src/ccu80/gcsc.rs b/src/ccu80/gcsc.rs index 12e3a39f..78e835a0 100644 --- a/src/ccu80/gcsc.rs +++ b/src/ccu80/gcsc.rs @@ -162,7 +162,7 @@ impl W { S3ST2C_W::new(self, 23) } } -#[doc = "Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Channel Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCSC_SPEC; impl crate::RegisterSpec for GCSC_SPEC { type Ux = u32; diff --git a/src/ccu80/gcss.rs b/src/ccu80/gcss.rs index 07bef4b5..0c55eb8f 100644 --- a/src/ccu80/gcss.rs +++ b/src/ccu80/gcss.rs @@ -162,7 +162,7 @@ impl W { S3ST2S_W::new(self, 23) } } -#[doc = "Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Channel Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCSS_SPEC; impl crate::RegisterSpec for GCSS_SPEC { type Ux = u32; diff --git a/src/ccu80/gcst.rs b/src/ccu80/gcst.rs index f38f948e..a1ef473c 100644 --- a/src/ccu80/gcst.rs +++ b/src/ccu80/gcst.rs @@ -550,7 +550,7 @@ impl R { CC83ST2_R::new(((self.bits >> 23) & 1) != 0) } } -#[doc = "Global Channel status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Channel status\n\nYou can [`read`](crate::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCST_SPEC; impl crate::RegisterSpec for GCST_SPEC { type Ux = u32; diff --git a/src/ccu80/gctrl.rs b/src/ccu80/gctrl.rs index ab855e6f..5a43a147 100644 --- a/src/ccu80/gctrl.rs +++ b/src/ccu80/gctrl.rs @@ -650,7 +650,7 @@ impl W { MSDE_W::new(self, 14) } } -#[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GCTRL_SPEC; impl crate::RegisterSpec for GCTRL_SPEC { type Ux = u32; diff --git a/src/ccu80/gidlc.rs b/src/ccu80/gidlc.rs index 9b9cd698..17077922 100644 --- a/src/ccu80/gidlc.rs +++ b/src/ccu80/gidlc.rs @@ -50,7 +50,7 @@ impl W { SPCH_W::new(self, 10) } } -#[doc = "Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Idle Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GIDLC_SPEC; impl crate::RegisterSpec for GIDLC_SPEC { type Ux = u32; diff --git a/src/ccu80/gidls.rs b/src/ccu80/gidls.rs index 51ef594d..aeea95fc 100644 --- a/src/ccu80/gidls.rs +++ b/src/ccu80/gidls.rs @@ -58,7 +58,7 @@ impl W { CPCH_W::new(self, 10) } } -#[doc = "Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Idle Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GIDLS_SPEC; impl crate::RegisterSpec for GIDLS_SPEC { type Ux = u32; diff --git a/src/ccu80/gpchk.rs b/src/ccu80/gpchk.rs index 1a098b17..75a356c4 100644 --- a/src/ccu80/gpchk.rs +++ b/src/ccu80/gpchk.rs @@ -443,7 +443,7 @@ impl W { PCSEL3_W::new(self, 28) } } -#[doc = "Parity Checker Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpchk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpchk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Parity Checker Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`gpchk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpchk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GPCHK_SPEC; impl crate::RegisterSpec for GPCHK_SPEC { type Ux = u32; diff --git a/src/ccu80/gstat.rs b/src/ccu80/gstat.rs index 545fd746..cebd9b09 100644 --- a/src/ccu80/gstat.rs +++ b/src/ccu80/gstat.rs @@ -248,7 +248,7 @@ impl R { PCRB_R::new(((self.bits >> 10) & 1) != 0) } } -#[doc = "Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GSTAT_SPEC; impl crate::RegisterSpec for GSTAT_SPEC { type Ux = u32; diff --git a/src/ccu80/midr.rs b/src/ccu80/midr.rs index 10cbacbb..c891152e 100644 --- a/src/ccu80/midr.rs +++ b/src/ccu80/midr.rs @@ -23,7 +23,7 @@ impl R { MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MIDR_SPEC; impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80.rs b/src/ccu80_cc80.rs index 5ae62e08..9d8fbbb5 100644 --- a/src/ccu80_cc80.rs +++ b/src/ccu80_cc80.rs @@ -204,167 +204,167 @@ impl RegisterBlock { &self.stc } } -#[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] +#[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] module"] pub type INS = crate::Reg; #[doc = "Input Selector Configuration"] pub mod ins; -#[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] +#[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] module"] pub type CMC = crate::Reg; #[doc = "Connection Matrix Control"] pub mod cmc; -#[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] +#[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] module"] pub type TCST = crate::Reg; #[doc = "Slice Timer Status"] pub mod tcst; -#[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] +#[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] module"] pub type TCSET = crate::Reg; #[doc = "Slice Timer Run Set"] pub mod tcset; -#[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] +#[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] module"] pub type TCCLR = crate::Reg; #[doc = "Slice Timer Clear"] pub mod tcclr; -#[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] +#[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] module"] pub type TC = crate::Reg; #[doc = "Slice Timer Control"] pub mod tc; -#[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] +#[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] module"] pub type PSL = crate::Reg; #[doc = "Passive Level Config"] pub mod psl; -#[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] +#[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] module"] pub type DIT = crate::Reg; #[doc = "Dither Config"] pub mod dit; -#[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] +#[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] module"] pub type DITS = crate::Reg; #[doc = "Dither Shadow Register"] pub mod dits; -#[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] +#[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] module"] pub type PSC = crate::Reg; #[doc = "Prescaler Control"] pub mod psc; -#[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] +#[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] module"] pub type FPC = crate::Reg; #[doc = "Floating Prescaler Control"] pub mod fpc; -#[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] +#[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] module"] pub type FPCS = crate::Reg; #[doc = "Floating Prescaler Shadow"] pub mod fpcs; -#[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] +#[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] module"] pub type PR = crate::Reg; #[doc = "Timer Period Value"] pub mod pr; -#[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] +#[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] module"] pub type PRS = crate::Reg; #[doc = "Timer Shadow Period Value"] pub mod prs; -#[doc = "CR1 (r) register accessor: Channel 1 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`] +#[doc = "CR1 (r) register accessor: Channel 1 Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`] module"] pub type CR1 = crate::Reg; #[doc = "Channel 1 Compare Value"] pub mod cr1; -#[doc = "CR1S (rw) register accessor: Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1s::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr1s::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1s`] +#[doc = "CR1S (rw) register accessor: Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr1s::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1s::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1s`] module"] pub type CR1S = crate::Reg; #[doc = "Channel 1 Compare Shadow Value"] pub mod cr1s; -#[doc = "CR2 (r) register accessor: Channel 2 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`] +#[doc = "CR2 (r) register accessor: Channel 2 Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`] module"] pub type CR2 = crate::Reg; #[doc = "Channel 2 Compare Value"] pub mod cr2; -#[doc = "CR2S (rw) register accessor: Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2s::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr2s::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2s`] +#[doc = "CR2S (rw) register accessor: Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr2s::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2s::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2s`] module"] pub type CR2S = crate::Reg; #[doc = "Channel 2 Compare Shadow Value"] pub mod cr2s; -#[doc = "CHC (rw) register accessor: Channel Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chc`] +#[doc = "CHC (rw) register accessor: Channel Control\n\nYou can [`read`](crate::Reg::read) this register and get [`chc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chc`] module"] pub type CHC = crate::Reg; #[doc = "Channel Control"] pub mod chc; -#[doc = "DTC (rw) register accessor: Dead Time Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtc`] +#[doc = "DTC (rw) register accessor: Dead Time Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dtc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtc`] module"] pub type DTC = crate::Reg; #[doc = "Dead Time Control"] pub mod dtc; -#[doc = "DC1R (rw) register accessor: Channel 1 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc1r::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc1r::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc1r`] +#[doc = "DC1R (rw) register accessor: Channel 1 Dead Time Values\n\nYou can [`read`](crate::Reg::read) this register and get [`dc1r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dc1r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc1r`] module"] pub type DC1R = crate::Reg; #[doc = "Channel 1 Dead Time Values"] pub mod dc1r; -#[doc = "DC2R (rw) register accessor: Channel 2 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc2r::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc2r::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc2r`] +#[doc = "DC2R (rw) register accessor: Channel 2 Dead Time Values\n\nYou can [`read`](crate::Reg::read) this register and get [`dc2r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dc2r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc2r`] module"] pub type DC2R = crate::Reg; #[doc = "Channel 2 Dead Time Values"] pub mod dc2r; -#[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] +#[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] module"] pub type TIMER = crate::Reg; #[doc = "Timer Value"] pub mod timer; -#[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c0v`] +#[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`c0v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c0v`] module"] pub type C0V = crate::Reg; #[doc = "Capture Register 0"] pub mod c0v; -#[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c1v`] +#[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`c1v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c1v`] module"] pub type C1V = crate::Reg; #[doc = "Capture Register 1"] pub mod c1v; -#[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c2v`] +#[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`c2v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c2v`] module"] pub type C2V = crate::Reg; #[doc = "Capture Register 2"] pub mod c2v; -#[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c3v`] +#[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`c3v::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@c3v`] module"] pub type C3V = crate::Reg; #[doc = "Capture Register 3"] pub mod c3v; -#[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] +#[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] module"] pub type INTS = crate::Reg; #[doc = "Interrupt Status"] pub mod ints; -#[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] +#[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] module"] pub type INTE = crate::Reg; #[doc = "Interrupt Enable Control"] pub mod inte; -#[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] +#[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] pub type SRS = crate::Reg; #[doc = "Service Request Selector"] pub mod srs; -#[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] +#[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] pub type SWS = crate::Reg; #[doc = "Interrupt Status Set"] pub mod sws; -#[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] +#[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] module"] pub type SWR = crate::Reg; #[doc = "Interrupt Status Clear"] pub mod swr; -#[doc = "STC (rw) register accessor: Shadow transfer control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stc`] +#[doc = "STC (rw) register accessor: Shadow transfer control\n\nYou can [`read`](crate::Reg::read) this register and get [`stc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stc`] module"] pub type STC = crate::Reg; #[doc = "Shadow transfer control"] diff --git a/src/ccu80_cc80/c0v.rs b/src/ccu80_cc80/c0v.rs index 220d6022..deb07cd0 100644 --- a/src/ccu80_cc80/c0v.rs +++ b/src/ccu80_cc80/c0v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`c0v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C0V_SPEC; impl crate::RegisterSpec for C0V_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/c1v.rs b/src/ccu80_cc80/c1v.rs index 19aed9fb..f0cd18ca 100644 --- a/src/ccu80_cc80/c1v.rs +++ b/src/ccu80_cc80/c1v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`c1v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C1V_SPEC; impl crate::RegisterSpec for C1V_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/c2v.rs b/src/ccu80_cc80/c2v.rs index e04bb78c..7fed1ea1 100644 --- a/src/ccu80_cc80/c2v.rs +++ b/src/ccu80_cc80/c2v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`c2v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C2V_SPEC; impl crate::RegisterSpec for C2V_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/c3v.rs b/src/ccu80_cc80/c3v.rs index c502b769..282b2b6a 100644 --- a/src/ccu80_cc80/c3v.rs +++ b/src/ccu80_cc80/c3v.rs @@ -57,7 +57,7 @@ impl R { FFL_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`c3v::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct C3V_SPEC; impl crate::RegisterSpec for C3V_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/chc.rs b/src/ccu80_cc80/chc.rs index cd4620ac..7892bfb2 100644 --- a/src/ccu80_cc80/chc.rs +++ b/src/ccu80_cc80/chc.rs @@ -326,7 +326,7 @@ impl W { OCS4_W::new(self, 4) } } -#[doc = "Channel Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Control\n\nYou can [`read`](crate::Reg::read) this register and get [`chc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CHC_SPEC; impl crate::RegisterSpec for CHC_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/cmc.rs b/src/ccu80_cc80/cmc.rs index cbf59c75..84109e27 100644 --- a/src/ccu80_cc80/cmc.rs +++ b/src/ccu80_cc80/cmc.rs @@ -907,7 +907,7 @@ impl W { TCE_W::new(self, 20) } } -#[doc = "Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Connection Matrix Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CMC_SPEC; impl crate::RegisterSpec for CMC_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/cr1.rs b/src/ccu80_cc80/cr1.rs index 9b6f129a..5ddb7b77 100644 --- a/src/ccu80_cc80/cr1.rs +++ b/src/ccu80_cc80/cr1.rs @@ -9,7 +9,7 @@ impl R { CR1_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Channel 1 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel 1 Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CR1_SPEC; impl crate::RegisterSpec for CR1_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/cr1s.rs b/src/ccu80_cc80/cr1s.rs index 1062b0d2..0714c604 100644 --- a/src/ccu80_cc80/cr1s.rs +++ b/src/ccu80_cc80/cr1s.rs @@ -21,7 +21,7 @@ impl W { CR1S_W::new(self, 0) } } -#[doc = "Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1s::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr1s::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr1s::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1s::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CR1S_SPEC; impl crate::RegisterSpec for CR1S_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/cr2.rs b/src/ccu80_cc80/cr2.rs index 033fed80..047c4c30 100644 --- a/src/ccu80_cc80/cr2.rs +++ b/src/ccu80_cc80/cr2.rs @@ -9,7 +9,7 @@ impl R { CR2_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Channel 2 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel 2 Compare Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CR2_SPEC; impl crate::RegisterSpec for CR2_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/cr2s.rs b/src/ccu80_cc80/cr2s.rs index 1ab624f2..66c34101 100644 --- a/src/ccu80_cc80/cr2s.rs +++ b/src/ccu80_cc80/cr2s.rs @@ -21,7 +21,7 @@ impl W { CR2S_W::new(self, 0) } } -#[doc = "Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2s::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr2s::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr2s::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2s::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CR2S_SPEC; impl crate::RegisterSpec for CR2S_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/dc1r.rs b/src/ccu80_cc80/dc1r.rs index d97afddd..4ea85b59 100644 --- a/src/ccu80_cc80/dc1r.rs +++ b/src/ccu80_cc80/dc1r.rs @@ -36,7 +36,7 @@ impl W { DT1F_W::new(self, 8) } } -#[doc = "Channel 1 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc1r::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc1r::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel 1 Dead Time Values\n\nYou can [`read`](crate::Reg::read) this register and get [`dc1r::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dc1r::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DC1R_SPEC; impl crate::RegisterSpec for DC1R_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/dc2r.rs b/src/ccu80_cc80/dc2r.rs index b6fa8376..ee22369d 100644 --- a/src/ccu80_cc80/dc2r.rs +++ b/src/ccu80_cc80/dc2r.rs @@ -36,7 +36,7 @@ impl W { DT2F_W::new(self, 8) } } -#[doc = "Channel 2 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc2r::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc2r::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel 2 Dead Time Values\n\nYou can [`read`](crate::Reg::read) this register and get [`dc2r::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dc2r::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DC2R_SPEC; impl crate::RegisterSpec for DC2R_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/dit.rs b/src/ccu80_cc80/dit.rs index 02e005ab..e1876dd9 100644 --- a/src/ccu80_cc80/dit.rs +++ b/src/ccu80_cc80/dit.rs @@ -16,7 +16,7 @@ impl R { DCNT_R::new(((self.bits >> 8) & 0x0f) as u8) } } -#[doc = "Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Dither Config\n\nYou can [`read`](crate::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIT_SPEC; impl crate::RegisterSpec for DIT_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/dits.rs b/src/ccu80_cc80/dits.rs index 31dd2b44..0457d48f 100644 --- a/src/ccu80_cc80/dits.rs +++ b/src/ccu80_cc80/dits.rs @@ -21,7 +21,7 @@ impl W { DCVS_W::new(self, 0) } } -#[doc = "Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Dither Shadow Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DITS_SPEC; impl crate::RegisterSpec for DITS_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/dtc.rs b/src/ccu80_cc80/dtc.rs index 489eb2ae..7ca7a348 100644 --- a/src/ccu80_cc80/dtc.rs +++ b/src/ccu80_cc80/dtc.rs @@ -487,7 +487,7 @@ impl W { DTCC_W::new(self, 6) } } -#[doc = "Dead Time Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Dead Time Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dtc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DTC_SPEC; impl crate::RegisterSpec for DTC_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/fpc.rs b/src/ccu80_cc80/fpc.rs index 36e4088a..77c4d241 100644 --- a/src/ccu80_cc80/fpc.rs +++ b/src/ccu80_cc80/fpc.rs @@ -28,7 +28,7 @@ impl W { PVAL_W::new(self, 8) } } -#[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FPC_SPEC; impl crate::RegisterSpec for FPC_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/fpcs.rs b/src/ccu80_cc80/fpcs.rs index e59acee1..7ebabe62 100644 --- a/src/ccu80_cc80/fpcs.rs +++ b/src/ccu80_cc80/fpcs.rs @@ -21,7 +21,7 @@ impl W { PCMP_W::new(self, 0) } } -#[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FPCS_SPEC; impl crate::RegisterSpec for FPCS_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/ins.rs b/src/ccu80_cc80/ins.rs index f2004ff5..bd483a07 100644 --- a/src/ccu80_cc80/ins.rs +++ b/src/ccu80_cc80/ins.rs @@ -1539,7 +1539,7 @@ impl W { LPF2M_W::new(self, 29) } } -#[doc = "Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Selector Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INS_SPEC; impl crate::RegisterSpec for INS_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/inte.rs b/src/ccu80_cc80/inte.rs index 66aa666d..81cba007 100644 --- a/src/ccu80_cc80/inte.rs +++ b/src/ccu80_cc80/inte.rs @@ -582,7 +582,7 @@ impl W { E2AE_W::new(self, 10) } } -#[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INTE_SPEC; impl crate::RegisterSpec for INTE_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/ints.rs b/src/ccu80_cc80/ints.rs index 8eb02277..7b0b2706 100644 --- a/src/ccu80_cc80/ints.rs +++ b/src/ccu80_cc80/ints.rs @@ -378,7 +378,7 @@ impl R { TRPF_R::new(((self.bits >> 11) & 1) != 0) } } -#[doc = "Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INTS_SPEC; impl crate::RegisterSpec for INTS_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/pr.rs b/src/ccu80_cc80/pr.rs index 33893da5..82bffa47 100644 --- a/src/ccu80_cc80/pr.rs +++ b/src/ccu80_cc80/pr.rs @@ -9,7 +9,7 @@ impl R { PR_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PR_SPEC; impl crate::RegisterSpec for PR_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/prs.rs b/src/ccu80_cc80/prs.rs index b8d77680..7a8e25be 100644 --- a/src/ccu80_cc80/prs.rs +++ b/src/ccu80_cc80/prs.rs @@ -21,7 +21,7 @@ impl W { PRS_W::new(self, 0) } } -#[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRS_SPEC; impl crate::RegisterSpec for PRS_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/psc.rs b/src/ccu80_cc80/psc.rs index 0b0a874e..81b915c9 100644 --- a/src/ccu80_cc80/psc.rs +++ b/src/ccu80_cc80/psc.rs @@ -21,7 +21,7 @@ impl W { PSIV_W::new(self, 0) } } -#[doc = "Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Prescaler Control\n\nYou can [`read`](crate::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/psl.rs b/src/ccu80_cc80/psl.rs index e2f16d24..9566c754 100644 --- a/src/ccu80_cc80/psl.rs +++ b/src/ccu80_cc80/psl.rs @@ -262,7 +262,7 @@ impl W { PSL22_W::new(self, 3) } } -#[doc = "Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Passive Level Config\n\nYou can [`read`](crate::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSL_SPEC; impl crate::RegisterSpec for PSL_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/srs.rs b/src/ccu80_cc80/srs.rs index ded1e704..e1492789 100644 --- a/src/ccu80_cc80/srs.rs +++ b/src/ccu80_cc80/srs.rs @@ -588,7 +588,7 @@ impl W { E2SR_W::new(self, 12) } } -#[doc = "Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Selector\n\nYou can [`read`](crate::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRS_SPEC; impl crate::RegisterSpec for SRS_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/stc.rs b/src/ccu80_cc80/stc.rs index 5bc28c63..3951b800 100644 --- a/src/ccu80_cc80/stc.rs +++ b/src/ccu80_cc80/stc.rs @@ -154,7 +154,7 @@ impl W { STM_W::new(self, 1) } } -#[doc = "Shadow transfer control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Shadow transfer control\n\nYou can [`read`](crate::Reg::read) this register and get [`stc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STC_SPEC; impl crate::RegisterSpec for STC_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/swr.rs b/src/ccu80_cc80/swr.rs index 17b82c33..2a89528e 100644 --- a/src/ccu80_cc80/swr.rs +++ b/src/ccu80_cc80/swr.rs @@ -82,7 +82,7 @@ impl W { RTRPF_W::new(self, 11) } } -#[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SWR_SPEC; impl crate::RegisterSpec for SWR_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/sws.rs b/src/ccu80_cc80/sws.rs index ab2bc72c..175754ee 100644 --- a/src/ccu80_cc80/sws.rs +++ b/src/ccu80_cc80/sws.rs @@ -82,7 +82,7 @@ impl W { STRPF_W::new(self, 11) } } -#[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SWS_SPEC; impl crate::RegisterSpec for SWS_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/tc.rs b/src/ccu80_cc80/tc.rs index c29e4b9b..0f274a55 100644 --- a/src/ccu80_cc80/tc.rs +++ b/src/ccu80_cc80/tc.rs @@ -1590,7 +1590,7 @@ impl W { STOS_W::new(self, 29) } } -#[doc = "Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TC_SPEC; impl crate::RegisterSpec for TC_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/tcclr.rs b/src/ccu80_cc80/tcclr.rs index af16fbee..3f7deef5 100644 --- a/src/ccu80_cc80/tcclr.rs +++ b/src/ccu80_cc80/tcclr.rs @@ -42,7 +42,7 @@ impl W { DTC2C_W::new(self, 4) } } -#[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TCCLR_SPEC; impl crate::RegisterSpec for TCCLR_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/tcset.rs b/src/ccu80_cc80/tcset.rs index 3be8b0aa..04914af2 100644 --- a/src/ccu80_cc80/tcset.rs +++ b/src/ccu80_cc80/tcset.rs @@ -10,7 +10,7 @@ impl W { TRBS_W::new(self, 0) } } -#[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TCSET_SPEC; impl crate::RegisterSpec for TCSET_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/tcst.rs b/src/ccu80_cc80/tcst.rs index 709c462a..99fd9fb8 100644 --- a/src/ccu80_cc80/tcst.rs +++ b/src/ccu80_cc80/tcst.rs @@ -166,7 +166,7 @@ impl R { DTR2_R::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slice Timer Status\n\nYou can [`read`](crate::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TCST_SPEC; impl crate::RegisterSpec for TCST_SPEC { type Ux = u32; diff --git a/src/ccu80_cc80/timer.rs b/src/ccu80_cc80/timer.rs index 1c7ed7d0..222e6bd7 100644 --- a/src/ccu80_cc80/timer.rs +++ b/src/ccu80_cc80/timer.rs @@ -21,7 +21,7 @@ impl W { TVAL_W::new(self, 0) } } -#[doc = "Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timer Value\n\nYou can [`read`](crate::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIMER_SPEC; impl crate::RegisterSpec for TIMER_SPEC { type Ux = u32; diff --git a/src/dac.rs b/src/dac.rs index a06f6a26..7e43284e 100644 --- a/src/dac.rs +++ b/src/dac.rs @@ -76,62 +76,62 @@ impl RegisterBlock { &self.dac1path } } -#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; -#[doc = "DAC0CFG0 (rw) register accessor: DAC0 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg0`] +#[doc = "DAC0CFG0 (rw) register accessor: DAC0 Configuration Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg0`] module"] pub type DAC0CFG0 = crate::Reg; #[doc = "DAC0 Configuration Register 0"] pub mod dac0cfg0; -#[doc = "DAC0CFG1 (rw) register accessor: DAC0 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg1`] +#[doc = "DAC0CFG1 (rw) register accessor: DAC0 Configuration Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg1`] module"] pub type DAC0CFG1 = crate::Reg; #[doc = "DAC0 Configuration Register 1"] pub mod dac0cfg1; -#[doc = "DAC1CFG0 (rw) register accessor: DAC1 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg0`] +#[doc = "DAC1CFG0 (rw) register accessor: DAC1 Configuration Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1cfg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1cfg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg0`] module"] pub type DAC1CFG0 = crate::Reg; #[doc = "DAC1 Configuration Register 0"] pub mod dac1cfg0; -#[doc = "DAC1CFG1 (rw) register accessor: DAC1 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg1`] +#[doc = "DAC1CFG1 (rw) register accessor: DAC1 Configuration Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg1`] module"] pub type DAC1CFG1 = crate::Reg; #[doc = "DAC1 Configuration Register 1"] pub mod dac1cfg1; -#[doc = "DAC0DATA (rw) register accessor: DAC0 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0data`] +#[doc = "DAC0DATA (rw) register accessor: DAC0 Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0data`] module"] pub type DAC0DATA = crate::Reg; #[doc = "DAC0 Data Register"] pub mod dac0data; -#[doc = "DAC1DATA (rw) register accessor: DAC1 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1data`] +#[doc = "DAC1DATA (rw) register accessor: DAC1 Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1data`] module"] pub type DAC1DATA = crate::Reg; #[doc = "DAC1 Data Register"] pub mod dac1data; -#[doc = "DAC01DATA (rw) register accessor: DAC01 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac01data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac01data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac01data`] +#[doc = "DAC01DATA (rw) register accessor: DAC01 Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac01data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac01data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac01data`] module"] pub type DAC01DATA = crate::Reg; #[doc = "DAC01 Data Register"] pub mod dac01data; -#[doc = "DAC0PATL (rw) register accessor: DAC0 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0patl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0patl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0patl`] +#[doc = "DAC0PATL (rw) register accessor: DAC0 Lower Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0patl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0patl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0patl`] module"] pub type DAC0PATL = crate::Reg; #[doc = "DAC0 Lower Pattern Register"] pub mod dac0patl; -#[doc = "DAC0PATH (rw) register accessor: DAC0 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0path::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0path::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0path`] +#[doc = "DAC0PATH (rw) register accessor: DAC0 Higher Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0path::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0path::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0path`] module"] pub type DAC0PATH = crate::Reg; #[doc = "DAC0 Higher Pattern Register"] pub mod dac0path; -#[doc = "DAC1PATL (rw) register accessor: DAC1 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1patl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1patl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1patl`] +#[doc = "DAC1PATL (rw) register accessor: DAC1 Lower Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1patl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1patl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1patl`] module"] pub type DAC1PATL = crate::Reg; #[doc = "DAC1 Lower Pattern Register"] pub mod dac1patl; -#[doc = "DAC1PATH (rw) register accessor: DAC1 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1path::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1path::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1path`] +#[doc = "DAC1PATH (rw) register accessor: DAC1 Higher Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1path::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1path::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1path`] module"] pub type DAC1PATH = crate::Reg; #[doc = "DAC1 Higher Pattern Register"] diff --git a/src/dac/dac01data.rs b/src/dac/dac01data.rs index 70ea2942..114ba193 100644 --- a/src/dac/dac01data.rs +++ b/src/dac/dac01data.rs @@ -36,7 +36,7 @@ impl W { DATA1_W::new(self, 16) } } -#[doc = "DAC01 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac01data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac01data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC01 Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac01data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac01data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC01DATA_SPEC; impl crate::RegisterSpec for DAC01DATA_SPEC { type Ux = u32; diff --git a/src/dac/dac0cfg0.rs b/src/dac/dac0cfg0.rs index bec872b5..13563c55 100644 --- a/src/dac/dac0cfg0.rs +++ b/src/dac/dac0cfg0.rs @@ -556,7 +556,7 @@ impl W { SREN_W::new(self, 30) } } -#[doc = "DAC0 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC0 Configuration Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC0CFG0_SPEC; impl crate::RegisterSpec for DAC0CFG0_SPEC { type Ux = u32; diff --git a/src/dac/dac0cfg1.rs b/src/dac/dac0cfg1.rs index 21a6d712..78cbe4d6 100644 --- a/src/dac/dac0cfg1.rs +++ b/src/dac/dac0cfg1.rs @@ -506,7 +506,7 @@ impl W { REFCFGL_W::new(self, 28) } } -#[doc = "DAC0 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC0 Configuration Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC0CFG1_SPEC; impl crate::RegisterSpec for DAC0CFG1_SPEC { type Ux = u32; diff --git a/src/dac/dac0data.rs b/src/dac/dac0data.rs index b1fbd507..ed05c204 100644 --- a/src/dac/dac0data.rs +++ b/src/dac/dac0data.rs @@ -21,7 +21,7 @@ impl W { DATA0_W::new(self, 0) } } -#[doc = "DAC0 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC0 Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC0DATA_SPEC; impl crate::RegisterSpec for DAC0DATA_SPEC { type Ux = u32; diff --git a/src/dac/dac0path.rs b/src/dac/dac0path.rs index 5546d955..5a00ed26 100644 --- a/src/dac/dac0path.rs +++ b/src/dac/dac0path.rs @@ -51,7 +51,7 @@ impl W { PAT8_W::new(self, 10) } } -#[doc = "DAC0 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0path::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0path::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC0 Higher Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0path::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0path::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC0PATH_SPEC; impl crate::RegisterSpec for DAC0PATH_SPEC { type Ux = u32; diff --git a/src/dac/dac0patl.rs b/src/dac/dac0patl.rs index 30cdb26e..1c270a3d 100644 --- a/src/dac/dac0patl.rs +++ b/src/dac/dac0patl.rs @@ -96,7 +96,7 @@ impl W { PAT5_W::new(self, 25) } } -#[doc = "DAC0 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0patl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0patl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC0 Lower Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac0patl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac0patl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC0PATL_SPEC; impl crate::RegisterSpec for DAC0PATL_SPEC { type Ux = u32; diff --git a/src/dac/dac1cfg0.rs b/src/dac/dac1cfg0.rs index 447a93a9..d1bb5412 100644 --- a/src/dac/dac1cfg0.rs +++ b/src/dac/dac1cfg0.rs @@ -556,7 +556,7 @@ impl W { SREN_W::new(self, 30) } } -#[doc = "DAC1 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC1 Configuration Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC1CFG0_SPEC; impl crate::RegisterSpec for DAC1CFG0_SPEC { type Ux = u32; diff --git a/src/dac/dac1cfg1.rs b/src/dac/dac1cfg1.rs index c910debf..87e6bc09 100644 --- a/src/dac/dac1cfg1.rs +++ b/src/dac/dac1cfg1.rs @@ -442,7 +442,7 @@ impl W { REFCFGH_W::new(self, 28) } } -#[doc = "DAC1 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC1 Configuration Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC1CFG1_SPEC; impl crate::RegisterSpec for DAC1CFG1_SPEC { type Ux = u32; diff --git a/src/dac/dac1data.rs b/src/dac/dac1data.rs index 38dd8c1e..3acf8765 100644 --- a/src/dac/dac1data.rs +++ b/src/dac/dac1data.rs @@ -21,7 +21,7 @@ impl W { DATA1_W::new(self, 0) } } -#[doc = "DAC1 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC1 Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC1DATA_SPEC; impl crate::RegisterSpec for DAC1DATA_SPEC { type Ux = u32; diff --git a/src/dac/dac1path.rs b/src/dac/dac1path.rs index 39a54f67..0f0cc861 100644 --- a/src/dac/dac1path.rs +++ b/src/dac/dac1path.rs @@ -51,7 +51,7 @@ impl W { PAT8_W::new(self, 10) } } -#[doc = "DAC1 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1path::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1path::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC1 Higher Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1path::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1path::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC1PATH_SPEC; impl crate::RegisterSpec for DAC1PATH_SPEC { type Ux = u32; diff --git a/src/dac/dac1patl.rs b/src/dac/dac1patl.rs index b3a7683b..245057ab 100644 --- a/src/dac/dac1patl.rs +++ b/src/dac/dac1patl.rs @@ -96,7 +96,7 @@ impl W { PAT5_W::new(self, 25) } } -#[doc = "DAC1 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1patl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1patl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC1 Lower Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1patl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1patl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAC1PATL_SPEC; impl crate::RegisterSpec for DAC1PATL_SPEC { type Ux = u32; diff --git a/src/dac/id.rs b/src/dac/id.rs index e7416a95..a18d161d 100644 --- a/src/dac/id.rs +++ b/src/dac/id.rs @@ -23,7 +23,7 @@ impl R { MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/dlr.rs b/src/dlr.rs index 08a8d556..a1673295 100644 --- a/src/dlr.rs +++ b/src/dlr.rs @@ -29,22 +29,22 @@ impl RegisterBlock { &self.lnen } } -#[doc = "OVRSTAT (r) register accessor: Overrun Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ovrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrstat`] +#[doc = "OVRSTAT (r) register accessor: Overrun Status\n\nYou can [`read`](crate::Reg::read) this register and get [`ovrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrstat`] module"] pub type OVRSTAT = crate::Reg; #[doc = "Overrun Status"] pub mod ovrstat; -#[doc = "OVRCLR (w) register accessor: Overrun Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ovrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrclr`] +#[doc = "OVRCLR (w) register accessor: Overrun Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ovrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrclr`] module"] pub type OVRCLR = crate::Reg; #[doc = "Overrun Clear"] pub mod ovrclr; -#[doc = "SRSEL0 (rw) register accessor: Service Request Selection 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srsel0`] +#[doc = "SRSEL0 (rw) register accessor: Service Request Selection 0\n\nYou can [`read`](crate::Reg::read) this register and get [`srsel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srsel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srsel0`] module"] pub type SRSEL0 = crate::Reg; #[doc = "Service Request Selection 0"] pub mod srsel0; -#[doc = "LNEN (rw) register accessor: Line Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lnen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lnen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lnen`] +#[doc = "LNEN (rw) register accessor: Line Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lnen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lnen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lnen`] module"] pub type LNEN = crate::Reg; #[doc = "Line Enable"] diff --git a/src/dlr/lnen.rs b/src/dlr/lnen.rs index e4c2e215..8943d8b6 100644 --- a/src/dlr/lnen.rs +++ b/src/dlr/lnen.rs @@ -518,7 +518,7 @@ impl W { LN7_W::new(self, 7) } } -#[doc = "Line Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lnen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lnen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Line Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`lnen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lnen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LNEN_SPEC; impl crate::RegisterSpec for LNEN_SPEC { type Ux = u32; diff --git a/src/dlr/ovrclr.rs b/src/dlr/ovrclr.rs index 442291b4..d175174c 100644 --- a/src/dlr/ovrclr.rs +++ b/src/dlr/ovrclr.rs @@ -66,7 +66,7 @@ impl W { LN7_W::new(self, 7) } } -#[doc = "Overrun Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ovrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Overrun Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ovrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OVRCLR_SPEC; impl crate::RegisterSpec for OVRCLR_SPEC { type Ux = u32; diff --git a/src/dlr/ovrstat.rs b/src/dlr/ovrstat.rs index 1a203e97..311bb5ef 100644 --- a/src/dlr/ovrstat.rs +++ b/src/dlr/ovrstat.rs @@ -58,7 +58,7 @@ impl R { LN7_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Overrun Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ovrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Overrun Status\n\nYou can [`read`](crate::Reg::read) this register and get [`ovrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OVRSTAT_SPEC; impl crate::RegisterSpec for OVRSTAT_SPEC { type Ux = u32; diff --git a/src/dlr/srsel0.rs b/src/dlr/srsel0.rs index 1e0cd9a5..7e517870 100644 --- a/src/dlr/srsel0.rs +++ b/src/dlr/srsel0.rs @@ -126,7 +126,7 @@ impl W { RS7_W::new(self, 28) } } -#[doc = "Service Request Selection 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Selection 0\n\nYou can [`read`](crate::Reg::read) this register and get [`srsel0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srsel0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRSEL0_SPEC; impl crate::RegisterSpec for SRSEL0_SPEC { type Ux = u32; diff --git a/src/dsd.rs b/src/dsd.rs index 28c41d88..33c8106a 100644 --- a/src/dsd.rs +++ b/src/dsd.rs @@ -58,42 +58,42 @@ impl RegisterBlock { &self.evflagclr } } -#[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] +#[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] pub type CLC = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; -#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; -#[doc = "OCS (rw) register accessor: OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ocs`] +#[doc = "OCS (rw) register accessor: OCDS Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ocs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ocs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ocs`] module"] pub type OCS = crate::Reg; #[doc = "OCDS Control and Status Register"] pub mod ocs; -#[doc = "GLOBCFG (rw) register accessor: Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globcfg`] +#[doc = "GLOBCFG (rw) register accessor: Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globcfg`] module"] pub type GLOBCFG = crate::Reg; #[doc = "Global Configuration Register"] pub mod globcfg; -#[doc = "GLOBRC (rw) register accessor: Global Run Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globrc`] +#[doc = "GLOBRC (rw) register accessor: Global Run Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globrc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globrc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globrc`] module"] pub type GLOBRC = crate::Reg; #[doc = "Global Run Control Register"] pub mod globrc; -#[doc = "CGCFG (rw) register accessor: Carrier Generator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcfg`] +#[doc = "CGCFG (rw) register accessor: Carrier Generator Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcfg`] module"] pub type CGCFG = crate::Reg; #[doc = "Carrier Generator Configuration Register"] pub mod cgcfg; -#[doc = "EVFLAG (rw) register accessor: Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evflag`] +#[doc = "EVFLAG (rw) register accessor: Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evflag`] module"] pub type EVFLAG = crate::Reg; #[doc = "Event Flag Register"] pub mod evflag; -#[doc = "EVFLAGCLR (w) register accessor: Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflagclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evflagclr`] +#[doc = "EVFLAGCLR (w) register accessor: Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evflagclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evflagclr`] module"] pub type EVFLAGCLR = crate::Reg; #[doc = "Event Flag Clear Register"] diff --git a/src/dsd/cgcfg.rs b/src/dsd/cgcfg.rs index ed56b474..ef275155 100644 --- a/src/dsd/cgcfg.rs +++ b/src/dsd/cgcfg.rs @@ -506,7 +506,7 @@ impl W { DIVCG_W::new(self, 4) } } -#[doc = "Carrier Generator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Carrier Generator Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGCFG_SPEC; impl crate::RegisterSpec for CGCFG_SPEC { type Ux = u32; diff --git a/src/dsd/clc.rs b/src/dsd/clc.rs index 6bb2d198..e1613540 100644 --- a/src/dsd/clc.rs +++ b/src/dsd/clc.rs @@ -175,7 +175,7 @@ impl W { EDIS_W::new(self, 3) } } -#[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLC_SPEC; impl crate::RegisterSpec for CLC_SPEC { type Ux = u32; diff --git a/src/dsd/evflag.rs b/src/dsd/evflag.rs index 5d7e47ed..076e69dc 100644 --- a/src/dsd/evflag.rs +++ b/src/dsd/evflag.rs @@ -902,7 +902,7 @@ impl W { ALEV9_W::new(self, 25) } } -#[doc = "Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evflag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evflag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EVFLAG_SPEC; impl crate::RegisterSpec for EVFLAG_SPEC { type Ux = u32; diff --git a/src/dsd/evflagclr.rs b/src/dsd/evflagclr.rs index 6758e85f..67d99f95 100644 --- a/src/dsd/evflagclr.rs +++ b/src/dsd/evflagclr.rs @@ -298,7 +298,7 @@ impl W { ALEC3_W::new(self, 19) } } -#[doc = "Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflagclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evflagclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EVFLAGCLR_SPEC; impl crate::RegisterSpec for EVFLAGCLR_SPEC { type Ux = u32; diff --git a/src/dsd/globcfg.rs b/src/dsd/globcfg.rs index 51452db3..2626ed4f 100644 --- a/src/dsd/globcfg.rs +++ b/src/dsd/globcfg.rs @@ -77,7 +77,7 @@ impl W { MCSEL_W::new(self, 0) } } -#[doc = "Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBCFG_SPEC; impl crate::RegisterSpec for GLOBCFG_SPEC { type Ux = u32; diff --git a/src/dsd/globrc.rs b/src/dsd/globrc.rs index 1f685a58..15f251db 100644 --- a/src/dsd/globrc.rs +++ b/src/dsd/globrc.rs @@ -262,7 +262,7 @@ impl W { CH3RUN_W::new(self, 3) } } -#[doc = "Global Run Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Run Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globrc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globrc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBRC_SPEC; impl crate::RegisterSpec for GLOBRC_SPEC { type Ux = u32; diff --git a/src/dsd/id.rs b/src/dsd/id.rs index 5e2344b1..eba21346 100644 --- a/src/dsd/id.rs +++ b/src/dsd/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/dsd/ocs.rs b/src/dsd/ocs.rs index 89792d66..b46b35ea 100644 --- a/src/dsd/ocs.rs +++ b/src/dsd/ocs.rs @@ -165,7 +165,7 @@ impl W { SUS_P_W::new(self, 28) } } -#[doc = "OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "OCDS Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ocs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ocs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OCS_SPEC; impl crate::RegisterSpec for OCS_SPEC { type Ux = u32; diff --git a/src/dsd_ch0.rs b/src/dsd_ch0.rs index 85188df2..b7cb5bf1 100644 --- a/src/dsd_ch0.rs +++ b/src/dsd_ch0.rs @@ -86,62 +86,62 @@ impl RegisterBlock { &self.rectcfg } } -#[doc = "MODCFG (rw) register accessor: Modulator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modcfg`] +#[doc = "MODCFG (rw) register accessor: Modulator Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`modcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`modcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modcfg`] module"] pub type MODCFG = crate::Reg; #[doc = "Modulator Configuration Register"] pub mod modcfg; -#[doc = "DICFG (rw) register accessor: Demodulator Input Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dicfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dicfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dicfg`] +#[doc = "DICFG (rw) register accessor: Demodulator Input Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dicfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dicfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dicfg`] module"] pub type DICFG = crate::Reg; #[doc = "Demodulator Input Configuration Register"] pub mod dicfg; -#[doc = "FCFGC (rw) register accessor: Filter Configuration Register, Main CIC Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfgc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfgc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcfgc`] +#[doc = "FCFGC (rw) register accessor: Filter Configuration Register, Main CIC Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`fcfgc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcfgc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcfgc`] module"] pub type FCFGC = crate::Reg; #[doc = "Filter Configuration Register, Main CIC Filter"] pub mod fcfgc; -#[doc = "FCFGA (rw) register accessor: Filter Configuration Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfga::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfga::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcfga`] +#[doc = "FCFGA (rw) register accessor: Filter Configuration Register, Auxiliary Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`fcfga::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcfga::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcfga`] module"] pub type FCFGA = crate::Reg; #[doc = "Filter Configuration Register, Auxiliary Filter"] pub mod fcfga; -#[doc = "IWCTR (rw) register accessor: Integration Window Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iwctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iwctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iwctr`] +#[doc = "IWCTR (rw) register accessor: Integration Window Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`iwctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iwctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iwctr`] module"] pub type IWCTR = crate::Reg; #[doc = "Integration Window Control Register"] pub mod iwctr; -#[doc = "BOUNDSEL (rw) register accessor: Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`boundsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`boundsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@boundsel`] +#[doc = "BOUNDSEL (rw) register accessor: Boundary Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`boundsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`boundsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@boundsel`] module"] pub type BOUNDSEL = crate::Reg; #[doc = "Boundary Select Register"] pub mod boundsel; -#[doc = "RESM (r) register accessor: Result Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resm`] +#[doc = "RESM (r) register accessor: Result Register, Main Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`resm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resm`] module"] pub type RESM = crate::Reg; #[doc = "Result Register, Main Filter"] pub mod resm; -#[doc = "OFFM (rw) register accessor: Offset Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`offm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`offm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@offm`] +#[doc = "OFFM (rw) register accessor: Offset Register, Main Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`offm::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`offm::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@offm`] module"] pub type OFFM = crate::Reg; #[doc = "Offset Register, Main Filter"] pub mod offm; -#[doc = "RESA (r) register accessor: Result Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resa::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resa`] +#[doc = "RESA (r) register accessor: Result Register, Auxiliary Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`resa::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resa`] module"] pub type RESA = crate::Reg; #[doc = "Result Register, Auxiliary Filter"] pub mod resa; -#[doc = "TSTMP (r) register accessor: Time-Stamp Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstmp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstmp`] +#[doc = "TSTMP (r) register accessor: Time-Stamp Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tstmp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstmp`] module"] pub type TSTMP = crate::Reg; #[doc = "Time-Stamp Register"] pub mod tstmp; -#[doc = "CGSYNC (rw) register accessor: Carrier Generator Synchronization Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgsync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgsync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgsync`] +#[doc = "CGSYNC (rw) register accessor: Carrier Generator Synchronization Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgsync::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgsync::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgsync`] module"] pub type CGSYNC = crate::Reg; #[doc = "Carrier Generator Synchronization Register"] pub mod cgsync; -#[doc = "RECTCFG (rw) register accessor: Rectification Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rectcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rectcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rectcfg`] +#[doc = "RECTCFG (rw) register accessor: Rectification Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rectcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rectcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rectcfg`] module"] pub type RECTCFG = crate::Reg; #[doc = "Rectification Configuration Register"] diff --git a/src/dsd_ch0/boundsel.rs b/src/dsd_ch0/boundsel.rs index dabecc00..e13ccd43 100644 --- a/src/dsd_ch0/boundsel.rs +++ b/src/dsd_ch0/boundsel.rs @@ -36,7 +36,7 @@ impl W { BOUNDARYU_W::new(self, 16) } } -#[doc = "Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`boundsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`boundsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Boundary Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`boundsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`boundsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BOUNDSEL_SPEC; impl crate::RegisterSpec for BOUNDSEL_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/cgsync.rs b/src/dsd_ch0/cgsync.rs index d5225515..4f1ecd9a 100644 --- a/src/dsd_ch0/cgsync.rs +++ b/src/dsd_ch0/cgsync.rs @@ -50,7 +50,7 @@ impl W { SDNEG_W::new(self, 24) } } -#[doc = "Carrier Generator Synchronization Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgsync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgsync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Carrier Generator Synchronization Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cgsync::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgsync::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGSYNC_SPEC; impl crate::RegisterSpec for CGSYNC_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/dicfg.rs b/src/dsd_ch0/dicfg.rs index b1213cde..5fb2b92d 100644 --- a/src/dsd_ch0/dicfg.rs +++ b/src/dsd_ch0/dicfg.rs @@ -669,7 +669,7 @@ impl W { SCWC_W::new(self, 31) } } -#[doc = "Demodulator Input Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dicfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dicfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Demodulator Input Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dicfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dicfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DICFG_SPEC; impl crate::RegisterSpec for DICFG_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/fcfga.rs b/src/dsd_ch0/fcfga.rs index 8597f2cc..de8af0c5 100644 --- a/src/dsd_ch0/fcfga.rs +++ b/src/dsd_ch0/fcfga.rs @@ -357,7 +357,7 @@ impl W { EGT_W::new(self, 14) } } -#[doc = "Filter Configuration Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfga::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfga::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Filter Configuration Register, Auxiliary Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`fcfga::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcfga::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FCFGA_SPEC; impl crate::RegisterSpec for FCFGA_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/fcfgc.rs b/src/dsd_ch0/fcfgc.rs index 4bea6dfa..bb3bab6a 100644 --- a/src/dsd_ch0/fcfgc.rs +++ b/src/dsd_ch0/fcfgc.rs @@ -275,7 +275,7 @@ impl W { CFMSV_W::new(self, 16) } } -#[doc = "Filter Configuration Register, Main CIC Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfgc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfgc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Filter Configuration Register, Main CIC Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`fcfgc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcfgc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FCFGC_SPEC; impl crate::RegisterSpec for FCFGC_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/iwctr.rs b/src/dsd_ch0/iwctr.rs index c248a068..2721a5b4 100644 --- a/src/dsd_ch0/iwctr.rs +++ b/src/dsd_ch0/iwctr.rs @@ -170,7 +170,7 @@ impl W { NVALINT_W::new(self, 24) } } -#[doc = "Integration Window Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iwctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iwctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Integration Window Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`iwctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iwctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IWCTR_SPEC; impl crate::RegisterSpec for IWCTR_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/modcfg.rs b/src/dsd_ch0/modcfg.rs index 65fef11c..12e4f6f0 100644 --- a/src/dsd_ch0/modcfg.rs +++ b/src/dsd_ch0/modcfg.rs @@ -140,7 +140,7 @@ impl W { DWC_W::new(self, 23) } } -#[doc = "Modulator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Modulator Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`modcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`modcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MODCFG_SPEC; impl crate::RegisterSpec for MODCFG_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/offm.rs b/src/dsd_ch0/offm.rs index bab15c1c..3ba5aad4 100644 --- a/src/dsd_ch0/offm.rs +++ b/src/dsd_ch0/offm.rs @@ -21,7 +21,7 @@ impl W { OFFSET_W::new(self, 0) } } -#[doc = "Offset Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`offm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`offm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Offset Register, Main Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`offm::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`offm::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OFFM_SPEC; impl crate::RegisterSpec for OFFM_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/rectcfg.rs b/src/dsd_ch0/rectcfg.rs index 0dbd3598..933ea998 100644 --- a/src/dsd_ch0/rectcfg.rs +++ b/src/dsd_ch0/rectcfg.rs @@ -290,7 +290,7 @@ impl W { SSRC_W::new(self, 4) } } -#[doc = "Rectification Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rectcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rectcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Rectification Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rectcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rectcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RECTCFG_SPEC; impl crate::RegisterSpec for RECTCFG_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/resa.rs b/src/dsd_ch0/resa.rs index 2b6b0e26..0c0461e6 100644 --- a/src/dsd_ch0/resa.rs +++ b/src/dsd_ch0/resa.rs @@ -9,7 +9,7 @@ impl R { RESULT_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Result Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resa::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Register, Auxiliary Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`resa::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RESA_SPEC; impl crate::RegisterSpec for RESA_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/resm.rs b/src/dsd_ch0/resm.rs index 2cec8ffe..77187ced 100644 --- a/src/dsd_ch0/resm.rs +++ b/src/dsd_ch0/resm.rs @@ -9,7 +9,7 @@ impl R { RESULT_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Result Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Register, Main Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`resm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RESM_SPEC; impl crate::RegisterSpec for RESM_SPEC { type Ux = u32; diff --git a/src/dsd_ch0/tstmp.rs b/src/dsd_ch0/tstmp.rs index f9c27107..b90bf35a 100644 --- a/src/dsd_ch0/tstmp.rs +++ b/src/dsd_ch0/tstmp.rs @@ -23,7 +23,7 @@ impl R { NVALCNT_R::new(((self.bits >> 24) & 0x3f) as u8) } } -#[doc = "Time-Stamp Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstmp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Time-Stamp Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tstmp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TSTMP_SPEC; impl crate::RegisterSpec for TSTMP_SPEC { type Ux = u32; diff --git a/src/eru0.rs b/src/eru0.rs index 1a3ad6d9..09d78ea7 100644 --- a/src/eru0.rs +++ b/src/eru0.rs @@ -35,17 +35,17 @@ impl RegisterBlock { self.exocon.iter() } } -#[doc = "EXISEL (rw) register accessor: Event Input Select\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exisel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exisel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exisel`] +#[doc = "EXISEL (rw) register accessor: Event Input Select\n\nYou can [`read`](crate::Reg::read) this register and get [`exisel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exisel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exisel`] module"] pub type EXISEL = crate::Reg; #[doc = "Event Input Select"] pub mod exisel; -#[doc = "EXICON (rw) register accessor: Event Input Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exicon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exicon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exicon`] +#[doc = "EXICON (rw) register accessor: Event Input Control\n\nYou can [`read`](crate::Reg::read) this register and get [`exicon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exicon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exicon`] module"] pub type EXICON = crate::Reg; #[doc = "Event Input Control"] pub mod exicon; -#[doc = "EXOCON (rw) register accessor: Event Output Trigger Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exocon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exocon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exocon`] +#[doc = "EXOCON (rw) register accessor: Event Output Trigger Control\n\nYou can [`read`](crate::Reg::read) this register and get [`exocon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exocon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exocon`] module"] pub type EXOCON = crate::Reg; #[doc = "Event Output Trigger Control"] diff --git a/src/eru0/exicon.rs b/src/eru0/exicon.rs index b6e4b914..c40074b5 100644 --- a/src/eru0/exicon.rs +++ b/src/eru0/exicon.rs @@ -648,7 +648,7 @@ impl W { NB_W::new(self, 11) } } -#[doc = "Event Input Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exicon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exicon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Event Input Control\n\nYou can [`read`](crate::Reg::read) this register and get [`exicon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exicon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EXICON_SPEC; impl crate::RegisterSpec for EXICON_SPEC { type Ux = u32; diff --git a/src/eru0/exisel.rs b/src/eru0/exisel.rs index 2e9f1240..182ff44e 100644 --- a/src/eru0/exisel.rs +++ b/src/eru0/exisel.rs @@ -782,7 +782,7 @@ impl W { EXS3B_W::new(self, 14) } } -#[doc = "Event Input Select\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exisel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exisel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Event Input Select\n\nYou can [`read`](crate::Reg::read) this register and get [`exisel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exisel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EXISEL_SPEC; impl crate::RegisterSpec for EXISEL_SPEC { type Ux = u32; diff --git a/src/eru0/exocon.rs b/src/eru0/exocon.rs index 49b8ab02..1a1523f5 100644 --- a/src/eru0/exocon.rs +++ b/src/eru0/exocon.rs @@ -561,7 +561,7 @@ impl W { IPEN3_W::new(self, 15) } } -#[doc = "Event Output Trigger Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exocon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exocon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Event Output Trigger Control\n\nYou can [`read`](crate::Reg::read) this register and get [`exocon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`exocon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EXOCON_SPEC; impl crate::RegisterSpec for EXOCON_SPEC { type Ux = u32; diff --git a/src/eth0.rs b/src/eth0.rs index e921c3af..b3cfb02d 100644 --- a/src/eth0.rs +++ b/src/eth0.rs @@ -837,687 +837,687 @@ impl RegisterBlock { &self.hw_feature } } -#[doc = "MAC_CONFIGURATION (rw) register accessor: MAC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_configuration::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_configuration::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_configuration`] +#[doc = "MAC_CONFIGURATION (rw) register accessor: MAC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_configuration::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_configuration::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_configuration`] module"] pub type MAC_CONFIGURATION = crate::Reg; #[doc = "MAC Configuration Register"] pub mod mac_configuration; -#[doc = "MAC_FRAME_FILTER (rw) register accessor: MAC Frame Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_filter::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_filter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_filter`] +#[doc = "MAC_FRAME_FILTER (rw) register accessor: MAC Frame Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_frame_filter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_frame_filter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_filter`] module"] pub type MAC_FRAME_FILTER = crate::Reg; #[doc = "MAC Frame Filter"] pub mod mac_frame_filter; -#[doc = "HASH_TABLE_HIGH (rw) register accessor: Hash Table High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hash_table_high`] +#[doc = "HASH_TABLE_HIGH (rw) register accessor: Hash Table High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hash_table_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hash_table_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hash_table_high`] module"] pub type HASH_TABLE_HIGH = crate::Reg; #[doc = "Hash Table High Register"] pub mod hash_table_high; -#[doc = "HASH_TABLE_LOW (rw) register accessor: Hash Table Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hash_table_low`] +#[doc = "HASH_TABLE_LOW (rw) register accessor: Hash Table Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hash_table_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hash_table_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hash_table_low`] module"] pub type HASH_TABLE_LOW = crate::Reg; #[doc = "Hash Table Low Register"] pub mod hash_table_low; -#[doc = "GMII_ADDRESS (rw) register accessor: MII Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmii_address`] +#[doc = "GMII_ADDRESS (rw) register accessor: MII Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gmii_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmii_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmii_address`] module"] pub type GMII_ADDRESS = crate::Reg; #[doc = "MII Address Register"] pub mod gmii_address; -#[doc = "GMII_DATA (rw) register accessor: MII Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmii_data`] +#[doc = "GMII_DATA (rw) register accessor: MII Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gmii_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmii_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmii_data`] module"] pub type GMII_DATA = crate::Reg; #[doc = "MII Data Register"] pub mod gmii_data; -#[doc = "FLOW_CONTROL (rw) register accessor: Flow Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`flow_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`flow_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flow_control`] +#[doc = "FLOW_CONTROL (rw) register accessor: Flow Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`flow_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flow_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flow_control`] module"] pub type FLOW_CONTROL = crate::Reg; #[doc = "Flow Control Register"] pub mod flow_control; -#[doc = "VLAN_TAG (rw) register accessor: VLAN Tag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_tag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_tag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_tag`] +#[doc = "VLAN_TAG (rw) register accessor: VLAN Tag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_tag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_tag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_tag`] module"] pub type VLAN_TAG = crate::Reg; #[doc = "VLAN Tag Register"] pub mod vlan_tag; -#[doc = "VERSION (r) register accessor: Version Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] +#[doc = "VERSION (r) register accessor: Version Register\n\nYou can [`read`](crate::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] module"] pub type VERSION = crate::Reg; #[doc = "Version Register"] pub mod version; -#[doc = "DEBUG (r) register accessor: Debug Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug`] +#[doc = "DEBUG (r) register accessor: Debug Register\n\nYou can [`read`](crate::Reg::read) this register and get [`debug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug`] module"] pub type DEBUG = crate::Reg; #[doc = "Debug Register"] pub mod debug; -#[doc = "REMOTE_WAKE_UP_FRAME_FILTER (rw) register accessor: Remote Wake Up Frame Filter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`remote_wake_up_frame_filter::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`remote_wake_up_frame_filter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@remote_wake_up_frame_filter`] +#[doc = "REMOTE_WAKE_UP_FRAME_FILTER (rw) register accessor: Remote Wake Up Frame Filter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`remote_wake_up_frame_filter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`remote_wake_up_frame_filter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@remote_wake_up_frame_filter`] module"] pub type REMOTE_WAKE_UP_FRAME_FILTER = crate::Reg; #[doc = "Remote Wake Up Frame Filter Register"] pub mod remote_wake_up_frame_filter; -#[doc = "PMT_CONTROL_STATUS (rw) register accessor: PMT Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmt_control_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmt_control_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmt_control_status`] +#[doc = "PMT_CONTROL_STATUS (rw) register accessor: PMT Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmt_control_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmt_control_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmt_control_status`] module"] pub type PMT_CONTROL_STATUS = crate::Reg; #[doc = "PMT Control and Status Register"] pub mod pmt_control_status; -#[doc = "INTERRUPT_STATUS (r) register accessor: Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_status`] +#[doc = "INTERRUPT_STATUS (r) register accessor: Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_status`] module"] pub type INTERRUPT_STATUS = crate::Reg; #[doc = "Interrupt Register"] pub mod interrupt_status; -#[doc = "INTERRUPT_MASK (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_mask`] +#[doc = "INTERRUPT_MASK (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`interrupt_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_mask`] module"] pub type INTERRUPT_MASK = crate::Reg; #[doc = "Interrupt Mask Register"] pub mod interrupt_mask; -#[doc = "MAC_ADDRESS0_HIGH (rw) register accessor: MAC Address0 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address0_high`] +#[doc = "MAC_ADDRESS0_HIGH (rw) register accessor: MAC Address0 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address0_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address0_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address0_high`] module"] pub type MAC_ADDRESS0_HIGH = crate::Reg; #[doc = "MAC Address0 High Register"] pub mod mac_address0_high; -#[doc = "MAC_ADDRESS0_LOW (rw) register accessor: MAC Address0 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address0_low`] +#[doc = "MAC_ADDRESS0_LOW (rw) register accessor: MAC Address0 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address0_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address0_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address0_low`] module"] pub type MAC_ADDRESS0_LOW = crate::Reg; #[doc = "MAC Address0 Low Register"] pub mod mac_address0_low; -#[doc = "MAC_ADDRESS1_HIGH (rw) register accessor: MAC Address1 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address1_high`] +#[doc = "MAC_ADDRESS1_HIGH (rw) register accessor: MAC Address1 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address1_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address1_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address1_high`] module"] pub type MAC_ADDRESS1_HIGH = crate::Reg; #[doc = "MAC Address1 High Register"] pub mod mac_address1_high; -#[doc = "MAC_ADDRESS1_LOW (rw) register accessor: MAC Address1 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address1_low`] +#[doc = "MAC_ADDRESS1_LOW (rw) register accessor: MAC Address1 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address1_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address1_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address1_low`] module"] pub type MAC_ADDRESS1_LOW = crate::Reg; #[doc = "MAC Address1 Low Register"] pub mod mac_address1_low; -#[doc = "MAC_ADDRESS2_HIGH (rw) register accessor: MAC Address2 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address2_high`] +#[doc = "MAC_ADDRESS2_HIGH (rw) register accessor: MAC Address2 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address2_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address2_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address2_high`] module"] pub type MAC_ADDRESS2_HIGH = crate::Reg; #[doc = "MAC Address2 High Register"] pub mod mac_address2_high; -#[doc = "MAC_ADDRESS2_LOW (rw) register accessor: MAC Address2 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address2_low`] +#[doc = "MAC_ADDRESS2_LOW (rw) register accessor: MAC Address2 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address2_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address2_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address2_low`] module"] pub type MAC_ADDRESS2_LOW = crate::Reg; #[doc = "MAC Address2 Low Register"] pub mod mac_address2_low; -#[doc = "MAC_ADDRESS3_HIGH (rw) register accessor: MAC Address3 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address3_high`] +#[doc = "MAC_ADDRESS3_HIGH (rw) register accessor: MAC Address3 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address3_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address3_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address3_high`] module"] pub type MAC_ADDRESS3_HIGH = crate::Reg; #[doc = "MAC Address3 High Register"] pub mod mac_address3_high; -#[doc = "MAC_ADDRESS3_LOW (rw) register accessor: MAC Address3 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address3_low`] +#[doc = "MAC_ADDRESS3_LOW (rw) register accessor: MAC Address3 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address3_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address3_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address3_low`] module"] pub type MAC_ADDRESS3_LOW = crate::Reg; #[doc = "MAC Address3 Low Register"] pub mod mac_address3_low; -#[doc = "MMC_CONTROL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_control`] +#[doc = "MMC_CONTROL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_control`] module"] pub type MMC_CONTROL = crate::Reg; #[doc = "MMC Control Register"] pub mod mmc_control; -#[doc = "MMC_RECEIVE_INTERRUPT (r) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_receive_interrupt`] +#[doc = "MMC_RECEIVE_INTERRUPT (r) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_receive_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_receive_interrupt`] module"] pub type MMC_RECEIVE_INTERRUPT = crate::Reg; #[doc = "MMC Receive Interrupt Register"] pub mod mmc_receive_interrupt; -#[doc = "MMC_TRANSMIT_INTERRUPT (r) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_transmit_interrupt`] +#[doc = "MMC_TRANSMIT_INTERRUPT (r) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_transmit_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_transmit_interrupt`] module"] pub type MMC_TRANSMIT_INTERRUPT = crate::Reg; #[doc = "MMC Transmit Interrupt Register"] pub mod mmc_transmit_interrupt; -#[doc = "MMC_RECEIVE_INTERRUPT_MASK (rw) register accessor: MMC Reveive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_receive_interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_receive_interrupt_mask`] +#[doc = "MMC_RECEIVE_INTERRUPT_MASK (rw) register accessor: MMC Reveive Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_receive_interrupt_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_receive_interrupt_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_receive_interrupt_mask`] module"] pub type MMC_RECEIVE_INTERRUPT_MASK = crate::Reg; #[doc = "MMC Reveive Interrupt Mask Register"] pub mod mmc_receive_interrupt_mask; -#[doc = "MMC_TRANSMIT_INTERRUPT_MASK (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_transmit_interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_transmit_interrupt_mask`] +#[doc = "MMC_TRANSMIT_INTERRUPT_MASK (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_transmit_interrupt_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_transmit_interrupt_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_transmit_interrupt_mask`] module"] pub type MMC_TRANSMIT_INTERRUPT_MASK = crate::Reg; #[doc = "MMC Transmit Interrupt Mask Register"] pub mod mmc_transmit_interrupt_mask; -#[doc = "TX_OCTET_COUNT_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_octet_count_good_bad`] +#[doc = "TX_OCTET_COUNT_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_octet_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_octet_count_good_bad`] module"] pub type TX_OCTET_COUNT_GOOD_BAD = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad Frames Register"] pub mod tx_octet_count_good_bad; -#[doc = "TX_FRAME_COUNT_GOOD_BAD (r) register accessor: Transmit Frame Count for Goodand Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_frame_count_good_bad`] +#[doc = "TX_FRAME_COUNT_GOOD_BAD (r) register accessor: Transmit Frame Count for Goodand Bad Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_frame_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_frame_count_good_bad`] module"] pub type TX_FRAME_COUNT_GOOD_BAD = crate::Reg; #[doc = "Transmit Frame Count for Goodand Bad Frames Register"] pub mod tx_frame_count_good_bad; -#[doc = "TX_BROADCAST_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_broadcast_frames_good`] +#[doc = "TX_BROADCAST_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_broadcast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_broadcast_frames_good`] module"] pub type TX_BROADCAST_FRAMES_GOOD = crate::Reg; #[doc = "Transmit Frame Count for Good Broadcast Frames"] pub mod tx_broadcast_frames_good; -#[doc = "TX_MULTICAST_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multicast_frames_good`] +#[doc = "TX_MULTICAST_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_multicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multicast_frames_good`] module"] pub type TX_MULTICAST_FRAMES_GOOD = crate::Reg; #[doc = "Transmit Frame Count for Good Multicast Frames"] pub mod tx_multicast_frames_good; -#[doc = "TX_64OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_64octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_64octets_frames_good_bad`] +#[doc = "TX_64OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_64octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_64octets_frames_good_bad`] module"] pub type TX_64OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 64 Byte Frames"] pub mod tx_64octets_frames_good_bad; -#[doc = "TX_65TO127OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_65to127octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_65to127octets_frames_good_bad`] +#[doc = "TX_65TO127OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_65to127octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_65to127octets_frames_good_bad`] module"] pub type TX_65TO127OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames"] pub mod tx_65to127octets_frames_good_bad; -#[doc = "TX_128TO255OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_128to255octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_128to255octets_frames_good_bad`] +#[doc = "TX_128TO255OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_128to255octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_128to255octets_frames_good_bad`] module"] pub type TX_128TO255OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames"] pub mod tx_128to255octets_frames_good_bad; -#[doc = "TX_256TO511OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_256to511octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_256to511octets_frames_good_bad`] +#[doc = "TX_256TO511OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_256to511octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_256to511octets_frames_good_bad`] module"] pub type TX_256TO511OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames"] pub mod tx_256to511octets_frames_good_bad; -#[doc = "TX_512TO1023OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_512to1023octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_512to1023octets_frames_good_bad`] +#[doc = "TX_512TO1023OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_512to1023octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_512to1023octets_frames_good_bad`] module"] pub type TX_512TO1023OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames"] pub mod tx_512to1023octets_frames_good_bad; -#[doc = "TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_1024tomaxoctets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_1024tomaxoctets_frames_good_bad`] +#[doc = "TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_1024tomaxoctets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_1024tomaxoctets_frames_good_bad`] module"] pub type TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames"] pub mod tx_1024tomaxoctets_frames_good_bad; -#[doc = "TX_UNICAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_unicast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_unicast_frames_good_bad`] +#[doc = "TX_UNICAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Unicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_unicast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_unicast_frames_good_bad`] module"] pub type TX_UNICAST_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Frame Count for Good and Bad Unicast Frames"] pub mod tx_unicast_frames_good_bad; -#[doc = "TX_MULTICAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multicast_frames_good_bad`] +#[doc = "TX_MULTICAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Multicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_multicast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multicast_frames_good_bad`] module"] pub type TX_MULTICAST_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Frame Count for Good and Bad Multicast Frames"] pub mod tx_multicast_frames_good_bad; -#[doc = "TX_BROADCAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_broadcast_frames_good_bad`] +#[doc = "TX_BROADCAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Broadcast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_broadcast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_broadcast_frames_good_bad`] module"] pub type TX_BROADCAST_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Transmit Frame Count for Good and Bad Broadcast Frames"] pub mod tx_broadcast_frames_good_bad; -#[doc = "TX_UNDERFLOW_ERROR_FRAMES (r) register accessor: Transmit Frame Count for Underflow Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_underflow_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_underflow_error_frames`] +#[doc = "TX_UNDERFLOW_ERROR_FRAMES (r) register accessor: Transmit Frame Count for Underflow Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_underflow_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_underflow_error_frames`] module"] pub type TX_UNDERFLOW_ERROR_FRAMES = crate::Reg; #[doc = "Transmit Frame Count for Underflow Error Frames"] pub mod tx_underflow_error_frames; -#[doc = "TX_SINGLE_COLLISION_GOOD_FRAMES (r) register accessor: Transmit Frame Count for Frames Transmitted after Single Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_single_collision_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_single_collision_good_frames`] +#[doc = "TX_SINGLE_COLLISION_GOOD_FRAMES (r) register accessor: Transmit Frame Count for Frames Transmitted after Single Collision\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_single_collision_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_single_collision_good_frames`] module"] pub type TX_SINGLE_COLLISION_GOOD_FRAMES = crate::Reg; #[doc = "Transmit Frame Count for Frames Transmitted after Single Collision"] pub mod tx_single_collision_good_frames; -#[doc = "TX_MULTIPLE_COLLISION_GOOD_FRAMES (r) register accessor: Transmit Frame Count for Frames Transmitted after Multiple Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multiple_collision_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multiple_collision_good_frames`] +#[doc = "TX_MULTIPLE_COLLISION_GOOD_FRAMES (r) register accessor: Transmit Frame Count for Frames Transmitted after Multiple Collision\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_multiple_collision_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multiple_collision_good_frames`] module"] pub type TX_MULTIPLE_COLLISION_GOOD_FRAMES = crate::Reg; #[doc = "Transmit Frame Count for Frames Transmitted after Multiple Collision"] pub mod tx_multiple_collision_good_frames; -#[doc = "TX_DEFERRED_FRAMES (r) register accessor: Tx Deferred Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_deferred_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_deferred_frames`] +#[doc = "TX_DEFERRED_FRAMES (r) register accessor: Tx Deferred Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_deferred_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_deferred_frames`] module"] pub type TX_DEFERRED_FRAMES = crate::Reg; #[doc = "Tx Deferred Frames Register"] pub mod tx_deferred_frames; -#[doc = "TX_LATE_COLLISION_FRAMES (r) register accessor: Transmit Frame Count for Late Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_late_collision_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_late_collision_frames`] +#[doc = "TX_LATE_COLLISION_FRAMES (r) register accessor: Transmit Frame Count for Late Collision Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_late_collision_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_late_collision_frames`] module"] pub type TX_LATE_COLLISION_FRAMES = crate::Reg; #[doc = "Transmit Frame Count for Late Collision Error Frames"] pub mod tx_late_collision_frames; -#[doc = "TX_EXCESSIVE_COLLISION_FRAMES (r) register accessor: Transmit Frame Count for Excessive Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_collision_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_excessive_collision_frames`] +#[doc = "TX_EXCESSIVE_COLLISION_FRAMES (r) register accessor: Transmit Frame Count for Excessive Collision Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_excessive_collision_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_excessive_collision_frames`] module"] pub type TX_EXCESSIVE_COLLISION_FRAMES = crate::Reg; #[doc = "Transmit Frame Count for Excessive Collision Error Frames"] pub mod tx_excessive_collision_frames; -#[doc = "TX_CARRIER_ERROR_FRAMES (r) register accessor: Transmit Frame Count for Carrier Sense Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_carrier_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_carrier_error_frames`] +#[doc = "TX_CARRIER_ERROR_FRAMES (r) register accessor: Transmit Frame Count for Carrier Sense Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_carrier_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_carrier_error_frames`] module"] pub type TX_CARRIER_ERROR_FRAMES = crate::Reg; #[doc = "Transmit Frame Count for Carrier Sense Error Frames"] pub mod tx_carrier_error_frames; -#[doc = "TX_OCTET_COUNT_GOOD (r) register accessor: Tx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_octet_count_good`] +#[doc = "TX_OCTET_COUNT_GOOD (r) register accessor: Tx Octet Count Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_octet_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_octet_count_good`] module"] pub type TX_OCTET_COUNT_GOOD = crate::Reg; #[doc = "Tx Octet Count Good Register"] pub mod tx_octet_count_good; -#[doc = "TX_FRAME_COUNT_GOOD (r) register accessor: Tx Frame Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_frame_count_good`] +#[doc = "TX_FRAME_COUNT_GOOD (r) register accessor: Tx Frame Count Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_frame_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_frame_count_good`] module"] pub type TX_FRAME_COUNT_GOOD = crate::Reg; #[doc = "Tx Frame Count Good Register"] pub mod tx_frame_count_good; -#[doc = "TX_EXCESSIVE_DEFERRAL_ERROR (r) register accessor: Transmit Frame Count for Excessive Deferral Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_deferral_error::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_excessive_deferral_error`] +#[doc = "TX_EXCESSIVE_DEFERRAL_ERROR (r) register accessor: Transmit Frame Count for Excessive Deferral Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_excessive_deferral_error::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_excessive_deferral_error`] module"] pub type TX_EXCESSIVE_DEFERRAL_ERROR = crate::Reg; #[doc = "Transmit Frame Count for Excessive Deferral Error Frames"] pub mod tx_excessive_deferral_error; -#[doc = "TX_PAUSE_FRAMES (r) register accessor: Transmit Frame Count for Good PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_pause_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_pause_frames`] +#[doc = "TX_PAUSE_FRAMES (r) register accessor: Transmit Frame Count for Good PAUSE Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_pause_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_pause_frames`] module"] pub type TX_PAUSE_FRAMES = crate::Reg; #[doc = "Transmit Frame Count for Good PAUSE Frames"] pub mod tx_pause_frames; -#[doc = "TX_VLAN_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_vlan_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_vlan_frames_good`] +#[doc = "TX_VLAN_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good VLAN Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_vlan_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_vlan_frames_good`] module"] pub type TX_VLAN_FRAMES_GOOD = crate::Reg; #[doc = "Transmit Frame Count for Good VLAN Frames"] pub mod tx_vlan_frames_good; -#[doc = "TX_OSIZE_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Oversize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_osize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_osize_frames_good`] +#[doc = "TX_OSIZE_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Oversize Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_osize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_osize_frames_good`] module"] pub type TX_OSIZE_FRAMES_GOOD = crate::Reg; #[doc = "Transmit Frame Count for Good Oversize Frames"] pub mod tx_osize_frames_good; -#[doc = "RX_FRAMES_COUNT_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_frames_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_frames_count_good_bad`] +#[doc = "RX_FRAMES_COUNT_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_frames_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_frames_count_good_bad`] module"] pub type RX_FRAMES_COUNT_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad Frames"] pub mod rx_frames_count_good_bad; -#[doc = "RX_OCTET_COUNT_GOOD_BAD (r) register accessor: Receive Octet Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_octet_count_good_bad`] +#[doc = "RX_OCTET_COUNT_GOOD_BAD (r) register accessor: Receive Octet Count for Good and Bad Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_octet_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_octet_count_good_bad`] module"] pub type RX_OCTET_COUNT_GOOD_BAD = crate::Reg; #[doc = "Receive Octet Count for Good and Bad Frames"] pub mod rx_octet_count_good_bad; -#[doc = "RX_OCTET_COUNT_GOOD (r) register accessor: Rx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_octet_count_good`] +#[doc = "RX_OCTET_COUNT_GOOD (r) register accessor: Rx Octet Count Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_octet_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_octet_count_good`] module"] pub type RX_OCTET_COUNT_GOOD = crate::Reg; #[doc = "Rx Octet Count Good Register"] pub mod rx_octet_count_good; -#[doc = "RX_BROADCAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_broadcast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_broadcast_frames_good`] +#[doc = "RX_BROADCAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_broadcast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_broadcast_frames_good`] module"] pub type RX_BROADCAST_FRAMES_GOOD = crate::Reg; #[doc = "Receive Frame Count for Good Broadcast Frames"] pub mod rx_broadcast_frames_good; -#[doc = "RX_MULTICAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_multicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_multicast_frames_good`] +#[doc = "RX_MULTICAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_multicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_multicast_frames_good`] module"] pub type RX_MULTICAST_FRAMES_GOOD = crate::Reg; #[doc = "Receive Frame Count for Good Multicast Frames"] pub mod rx_multicast_frames_good; -#[doc = "RX_CRC_ERROR_FRAMES (r) register accessor: Receive Frame Count for CRC Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_crc_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_crc_error_frames`] +#[doc = "RX_CRC_ERROR_FRAMES (r) register accessor: Receive Frame Count for CRC Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_crc_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_crc_error_frames`] module"] pub type RX_CRC_ERROR_FRAMES = crate::Reg; #[doc = "Receive Frame Count for CRC Error Frames"] pub mod rx_crc_error_frames; -#[doc = "RX_ALIGNMENT_ERROR_FRAMES (r) register accessor: Receive Frame Count for Alignment Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_alignment_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_alignment_error_frames`] +#[doc = "RX_ALIGNMENT_ERROR_FRAMES (r) register accessor: Receive Frame Count for Alignment Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_alignment_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_alignment_error_frames`] module"] pub type RX_ALIGNMENT_ERROR_FRAMES = crate::Reg; #[doc = "Receive Frame Count for Alignment Error Frames"] pub mod rx_alignment_error_frames; -#[doc = "RX_RUNT_ERROR_FRAMES (r) register accessor: Receive Frame Count for Runt Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_runt_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_runt_error_frames`] +#[doc = "RX_RUNT_ERROR_FRAMES (r) register accessor: Receive Frame Count for Runt Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_runt_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_runt_error_frames`] module"] pub type RX_RUNT_ERROR_FRAMES = crate::Reg; #[doc = "Receive Frame Count for Runt Error Frames"] pub mod rx_runt_error_frames; -#[doc = "RX_JABBER_ERROR_FRAMES (r) register accessor: Receive Frame Count for Jabber Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_jabber_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_jabber_error_frames`] +#[doc = "RX_JABBER_ERROR_FRAMES (r) register accessor: Receive Frame Count for Jabber Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_jabber_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_jabber_error_frames`] module"] pub type RX_JABBER_ERROR_FRAMES = crate::Reg; #[doc = "Receive Frame Count for Jabber Error Frames"] pub mod rx_jabber_error_frames; -#[doc = "RX_UNDERSIZE_FRAMES_GOOD (r) register accessor: Receive Frame Count for Undersize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_undersize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_undersize_frames_good`] +#[doc = "RX_UNDERSIZE_FRAMES_GOOD (r) register accessor: Receive Frame Count for Undersize Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_undersize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_undersize_frames_good`] module"] pub type RX_UNDERSIZE_FRAMES_GOOD = crate::Reg; #[doc = "Receive Frame Count for Undersize Frames"] pub mod rx_undersize_frames_good; -#[doc = "RX_OVERSIZE_FRAMES_GOOD (r) register accessor: Rx Oversize Frames Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_oversize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_oversize_frames_good`] +#[doc = "RX_OVERSIZE_FRAMES_GOOD (r) register accessor: Rx Oversize Frames Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_oversize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_oversize_frames_good`] module"] pub type RX_OVERSIZE_FRAMES_GOOD = crate::Reg; #[doc = "Rx Oversize Frames Good Register"] pub mod rx_oversize_frames_good; -#[doc = "RX_64OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_64octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_64octets_frames_good_bad`] +#[doc = "RX_64OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_64octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_64octets_frames_good_bad`] module"] pub type RX_64OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 64 Byte Frames"] pub mod rx_64octets_frames_good_bad; -#[doc = "RX_65TO127OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_65to127octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_65to127octets_frames_good_bad`] +#[doc = "RX_65TO127OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_65to127octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_65to127octets_frames_good_bad`] module"] pub type RX_65TO127OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 65 to 127 Bytes Frames"] pub mod rx_65to127octets_frames_good_bad; -#[doc = "RX_128TO255OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_128to255octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_128to255octets_frames_good_bad`] +#[doc = "RX_128TO255OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_128to255octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_128to255octets_frames_good_bad`] module"] pub type RX_128TO255OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 128 to 255 Bytes Frames"] pub mod rx_128to255octets_frames_good_bad; -#[doc = "RX_256TO511OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_256to511octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_256to511octets_frames_good_bad`] +#[doc = "RX_256TO511OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_256to511octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_256to511octets_frames_good_bad`] module"] pub type RX_256TO511OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 256 to 511 Bytes Frames"] pub mod rx_256to511octets_frames_good_bad; -#[doc = "RX_512TO1023OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_512to1023octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_512to1023octets_frames_good_bad`] +#[doc = "RX_512TO1023OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_512to1023octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_512to1023octets_frames_good_bad`] module"] pub type RX_512TO1023OCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames"] pub mod rx_512to1023octets_frames_good_bad; -#[doc = "RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_1024tomaxoctets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_1024tomaxoctets_frames_good_bad`] +#[doc = "RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_1024tomaxoctets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_1024tomaxoctets_frames_good_bad`] module"] pub type RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames"] pub mod rx_1024tomaxoctets_frames_good_bad; -#[doc = "RX_UNICAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_unicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_unicast_frames_good`] +#[doc = "RX_UNICAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Unicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_unicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_unicast_frames_good`] module"] pub type RX_UNICAST_FRAMES_GOOD = crate::Reg; #[doc = "Receive Frame Count for Good Unicast Frames"] pub mod rx_unicast_frames_good; -#[doc = "RX_LENGTH_ERROR_FRAMES (r) register accessor: Receive Frame Count for Length Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_length_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_length_error_frames`] +#[doc = "RX_LENGTH_ERROR_FRAMES (r) register accessor: Receive Frame Count for Length Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_length_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_length_error_frames`] module"] pub type RX_LENGTH_ERROR_FRAMES = crate::Reg; #[doc = "Receive Frame Count for Length Error Frames"] pub mod rx_length_error_frames; -#[doc = "RX_OUT_OF_RANGE_TYPE_FRAMES (r) register accessor: Receive Frame Count for Out of Range Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_out_of_range_type_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_out_of_range_type_frames`] +#[doc = "RX_OUT_OF_RANGE_TYPE_FRAMES (r) register accessor: Receive Frame Count for Out of Range Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_out_of_range_type_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_out_of_range_type_frames`] module"] pub type RX_OUT_OF_RANGE_TYPE_FRAMES = crate::Reg; #[doc = "Receive Frame Count for Out of Range Frames"] pub mod rx_out_of_range_type_frames; -#[doc = "RX_PAUSE_FRAMES (r) register accessor: Receive Frame Count for PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_pause_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_pause_frames`] +#[doc = "RX_PAUSE_FRAMES (r) register accessor: Receive Frame Count for PAUSE Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_pause_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_pause_frames`] module"] pub type RX_PAUSE_FRAMES = crate::Reg; #[doc = "Receive Frame Count for PAUSE Frames"] pub mod rx_pause_frames; -#[doc = "RX_FIFO_OVERFLOW_FRAMES (r) register accessor: Receive Frame Count for FIFO Overflow Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_fifo_overflow_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_fifo_overflow_frames`] +#[doc = "RX_FIFO_OVERFLOW_FRAMES (r) register accessor: Receive Frame Count for FIFO Overflow Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_fifo_overflow_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_fifo_overflow_frames`] module"] pub type RX_FIFO_OVERFLOW_FRAMES = crate::Reg; #[doc = "Receive Frame Count for FIFO Overflow Frames"] pub mod rx_fifo_overflow_frames; -#[doc = "RX_VLAN_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_vlan_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_vlan_frames_good_bad`] +#[doc = "RX_VLAN_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad VLAN Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_vlan_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_vlan_frames_good_bad`] module"] pub type RX_VLAN_FRAMES_GOOD_BAD = crate::Reg; #[doc = "Receive Frame Count for Good and Bad VLAN Frames"] pub mod rx_vlan_frames_good_bad; -#[doc = "RX_WATCHDOG_ERROR_FRAMES (r) register accessor: Receive Frame Count for Watchdog Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_watchdog_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_watchdog_error_frames`] +#[doc = "RX_WATCHDOG_ERROR_FRAMES (r) register accessor: Receive Frame Count for Watchdog Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_watchdog_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_watchdog_error_frames`] module"] pub type RX_WATCHDOG_ERROR_FRAMES = crate::Reg; #[doc = "Receive Frame Count for Watchdog Error Frames"] pub mod rx_watchdog_error_frames; -#[doc = "RX_RECEIVE_ERROR_FRAMES (r) register accessor: Receive Frame Count for Receive Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_receive_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_receive_error_frames`] +#[doc = "RX_RECEIVE_ERROR_FRAMES (r) register accessor: Receive Frame Count for Receive Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_receive_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_receive_error_frames`] module"] pub type RX_RECEIVE_ERROR_FRAMES = crate::Reg; #[doc = "Receive Frame Count for Receive Error Frames"] pub mod rx_receive_error_frames; -#[doc = "RX_CONTROL_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Control Frames Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_control_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_control_frames_good`] +#[doc = "RX_CONTROL_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Control Frames Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_control_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_control_frames_good`] module"] pub type RX_CONTROL_FRAMES_GOOD = crate::Reg; #[doc = "Receive Frame Count for Good Control Frames Frames"] pub mod rx_control_frames_good; -#[doc = "MMC_IPC_RECEIVE_INTERRUPT_MASK (rw) register accessor: MMC Receive Checksum Offload Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_ipc_receive_interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_ipc_receive_interrupt_mask`] +#[doc = "MMC_IPC_RECEIVE_INTERRUPT_MASK (rw) register accessor: MMC Receive Checksum Offload Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_ipc_receive_interrupt_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_ipc_receive_interrupt_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_ipc_receive_interrupt_mask`] module"] pub type MMC_IPC_RECEIVE_INTERRUPT_MASK = crate::Reg; #[doc = "MMC Receive Checksum Offload Interrupt Mask Register"] pub mod mmc_ipc_receive_interrupt_mask; -#[doc = "MMC_IPC_RECEIVE_INTERRUPT (r) register accessor: MMC Receive Checksum Offload Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_ipc_receive_interrupt`] +#[doc = "MMC_IPC_RECEIVE_INTERRUPT (r) register accessor: MMC Receive Checksum Offload Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_ipc_receive_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_ipc_receive_interrupt`] module"] pub type MMC_IPC_RECEIVE_INTERRUPT = crate::Reg; #[doc = "MMC Receive Checksum Offload Interrupt Register"] pub mod mmc_ipc_receive_interrupt; -#[doc = "RXIPV4_GOOD_FRAMES (r) register accessor: RxIPv4 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_good_frames`] +#[doc = "RXIPV4_GOOD_FRAMES (r) register accessor: RxIPv4 Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_good_frames`] module"] pub type RXIPV4_GOOD_FRAMES = crate::Reg; #[doc = "RxIPv4 Good Frames Register"] pub mod rxipv4_good_frames; -#[doc = "RXIPV4_HEADER_ERROR_FRAMES (r) register accessor: Receive IPV4 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_header_error_frames`] +#[doc = "RXIPV4_HEADER_ERROR_FRAMES (r) register accessor: Receive IPV4 Header Error Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_header_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_header_error_frames`] module"] pub type RXIPV4_HEADER_ERROR_FRAMES = crate::Reg; #[doc = "Receive IPV4 Header Error Frame Counter Register"] pub mod rxipv4_header_error_frames; -#[doc = "RXIPV4_NO_PAYLOAD_FRAMES (r) register accessor: Receive IPV4 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_no_payload_frames`] +#[doc = "RXIPV4_NO_PAYLOAD_FRAMES (r) register accessor: Receive IPV4 No Payload Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_no_payload_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_no_payload_frames`] module"] pub type RXIPV4_NO_PAYLOAD_FRAMES = crate::Reg; #[doc = "Receive IPV4 No Payload Frame Counter Register"] pub mod rxipv4_no_payload_frames; -#[doc = "RXIPV4_FRAGMENTED_FRAMES (r) register accessor: Receive IPV4 Fragmented Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_fragmented_frames`] +#[doc = "RXIPV4_FRAGMENTED_FRAMES (r) register accessor: Receive IPV4 Fragmented Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_fragmented_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_fragmented_frames`] module"] pub type RXIPV4_FRAGMENTED_FRAMES = crate::Reg; #[doc = "Receive IPV4 Fragmented Frame Counter Register"] pub mod rxipv4_fragmented_frames; -#[doc = "RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES (r) register accessor: Receive IPV4 UDP Checksum Disabled Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disabled_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_udp_checksum_disabled_frames`] +#[doc = "RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES (r) register accessor: Receive IPV4 UDP Checksum Disabled Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_udp_checksum_disabled_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_udp_checksum_disabled_frames`] module"] pub type RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES = crate::Reg; #[doc = "Receive IPV4 UDP Checksum Disabled Frame Counter Register"] pub mod rxipv4_udp_checksum_disabled_frames; -#[doc = "RXIPV6_GOOD_FRAMES (r) register accessor: RxIPv6 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_good_frames`] +#[doc = "RXIPV6_GOOD_FRAMES (r) register accessor: RxIPv6 Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_good_frames`] module"] pub type RXIPV6_GOOD_FRAMES = crate::Reg; #[doc = "RxIPv6 Good Frames Register"] pub mod rxipv6_good_frames; -#[doc = "RXIPV6_HEADER_ERROR_FRAMES (r) register accessor: Receive IPV6 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_header_error_frames`] +#[doc = "RXIPV6_HEADER_ERROR_FRAMES (r) register accessor: Receive IPV6 Header Error Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_header_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_header_error_frames`] module"] pub type RXIPV6_HEADER_ERROR_FRAMES = crate::Reg; #[doc = "Receive IPV6 Header Error Frame Counter Register"] pub mod rxipv6_header_error_frames; -#[doc = "RXIPV6_NO_PAYLOAD_FRAMES (r) register accessor: Receive IPV6 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_no_payload_frames`] +#[doc = "RXIPV6_NO_PAYLOAD_FRAMES (r) register accessor: Receive IPV6 No Payload Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_no_payload_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_no_payload_frames`] module"] pub type RXIPV6_NO_PAYLOAD_FRAMES = crate::Reg; #[doc = "Receive IPV6 No Payload Frame Counter Register"] pub mod rxipv6_no_payload_frames; -#[doc = "RXUDP_GOOD_FRAMES (r) register accessor: RxUDP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_good_frames`] +#[doc = "RXUDP_GOOD_FRAMES (r) register accessor: RxUDP Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_good_frames`] module"] pub type RXUDP_GOOD_FRAMES = crate::Reg; #[doc = "RxUDP Good Frames Register"] pub mod rxudp_good_frames; -#[doc = "RXUDP_ERROR_FRAMES (r) register accessor: RxUDP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_error_frames`] +#[doc = "RXUDP_ERROR_FRAMES (r) register accessor: RxUDP Error Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_error_frames`] module"] pub type RXUDP_ERROR_FRAMES = crate::Reg; #[doc = "RxUDP Error Frames Register"] pub mod rxudp_error_frames; -#[doc = "RXTCP_GOOD_FRAMES (r) register accessor: RxTCP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_good_frames`] +#[doc = "RXTCP_GOOD_FRAMES (r) register accessor: RxTCP Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_good_frames`] module"] pub type RXTCP_GOOD_FRAMES = crate::Reg; #[doc = "RxTCP Good Frames Register"] pub mod rxtcp_good_frames; -#[doc = "RXTCP_ERROR_FRAMES (r) register accessor: RxTCP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_error_frames`] +#[doc = "RXTCP_ERROR_FRAMES (r) register accessor: RxTCP Error Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_error_frames`] module"] pub type RXTCP_ERROR_FRAMES = crate::Reg; #[doc = "RxTCP Error Frames Register"] pub mod rxtcp_error_frames; -#[doc = "RXICMP_GOOD_FRAMES (r) register accessor: RxICMP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_good_frames`] +#[doc = "RXICMP_GOOD_FRAMES (r) register accessor: RxICMP Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_good_frames`] module"] pub type RXICMP_GOOD_FRAMES = crate::Reg; #[doc = "RxICMP Good Frames Register"] pub mod rxicmp_good_frames; -#[doc = "RXICMP_ERROR_FRAMES (r) register accessor: RxICMP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_error_frames`] +#[doc = "RXICMP_ERROR_FRAMES (r) register accessor: RxICMP Error Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_error_frames`] module"] pub type RXICMP_ERROR_FRAMES = crate::Reg; #[doc = "RxICMP Error Frames Register"] pub mod rxicmp_error_frames; -#[doc = "RXIPV4_GOOD_OCTETS (r) register accessor: RxIPv4 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_good_octets`] +#[doc = "RXIPV4_GOOD_OCTETS (r) register accessor: RxIPv4 Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_good_octets`] module"] pub type RXIPV4_GOOD_OCTETS = crate::Reg; #[doc = "RxIPv4 Good Octets Register"] pub mod rxipv4_good_octets; -#[doc = "RXIPV4_HEADER_ERROR_OCTETS (r) register accessor: Receive IPV4 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_header_error_octets`] +#[doc = "RXIPV4_HEADER_ERROR_OCTETS (r) register accessor: Receive IPV4 Header Error Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_header_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_header_error_octets`] module"] pub type RXIPV4_HEADER_ERROR_OCTETS = crate::Reg; #[doc = "Receive IPV4 Header Error Octet Counter Register"] pub mod rxipv4_header_error_octets; -#[doc = "RXIPV4_NO_PAYLOAD_OCTETS (r) register accessor: Receive IPV4 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_no_payload_octets`] +#[doc = "RXIPV4_NO_PAYLOAD_OCTETS (r) register accessor: Receive IPV4 No Payload Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_no_payload_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_no_payload_octets`] module"] pub type RXIPV4_NO_PAYLOAD_OCTETS = crate::Reg; #[doc = "Receive IPV4 No Payload Octet Counter Register"] pub mod rxipv4_no_payload_octets; -#[doc = "RXIPV4_FRAGMENTED_OCTETS (r) register accessor: Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_fragmented_octets`] +#[doc = "RXIPV4_FRAGMENTED_OCTETS (r) register accessor: Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_fragmented_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_fragmented_octets`] module"] pub type RXIPV4_FRAGMENTED_OCTETS = crate::Reg; #[doc = "Receive IPV4 Fragmented Octet Counter Register"] pub mod rxipv4_fragmented_octets; -#[doc = "RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS (r) register accessor: Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disable_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_udp_checksum_disable_octets`] +#[doc = "RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS (r) register accessor: Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_udp_checksum_disable_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_udp_checksum_disable_octets`] module"] pub type RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS = crate::Reg; #[doc = "Receive IPV4 Fragmented Octet Counter Register"] pub mod rxipv4_udp_checksum_disable_octets; -#[doc = "RXIPV6_GOOD_OCTETS (r) register accessor: RxIPv6 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_good_octets`] +#[doc = "RXIPV6_GOOD_OCTETS (r) register accessor: RxIPv6 Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_good_octets`] module"] pub type RXIPV6_GOOD_OCTETS = crate::Reg; #[doc = "RxIPv6 Good Octets Register"] pub mod rxipv6_good_octets; -#[doc = "RXIPV6_HEADER_ERROR_OCTETS (r) register accessor: Receive IPV6 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_header_error_octets`] +#[doc = "RXIPV6_HEADER_ERROR_OCTETS (r) register accessor: Receive IPV6 Header Error Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_header_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_header_error_octets`] module"] pub type RXIPV6_HEADER_ERROR_OCTETS = crate::Reg; #[doc = "Receive IPV6 Header Error Octet Counter Register"] pub mod rxipv6_header_error_octets; -#[doc = "RXIPV6_NO_PAYLOAD_OCTETS (r) register accessor: Receive IPV6 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_no_payload_octets`] +#[doc = "RXIPV6_NO_PAYLOAD_OCTETS (r) register accessor: Receive IPV6 No Payload Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_no_payload_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_no_payload_octets`] module"] pub type RXIPV6_NO_PAYLOAD_OCTETS = crate::Reg; #[doc = "Receive IPV6 No Payload Octet Counter Register"] pub mod rxipv6_no_payload_octets; -#[doc = "RXUDP_GOOD_OCTETS (r) register accessor: Receive UDP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_good_octets`] +#[doc = "RXUDP_GOOD_OCTETS (r) register accessor: Receive UDP Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_good_octets`] module"] pub type RXUDP_GOOD_OCTETS = crate::Reg; #[doc = "Receive UDP Good Octets Register"] pub mod rxudp_good_octets; -#[doc = "RXUDP_ERROR_OCTETS (r) register accessor: Receive UDP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_error_octets`] +#[doc = "RXUDP_ERROR_OCTETS (r) register accessor: Receive UDP Error Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_error_octets`] module"] pub type RXUDP_ERROR_OCTETS = crate::Reg; #[doc = "Receive UDP Error Octets Register"] pub mod rxudp_error_octets; -#[doc = "RXTCP_GOOD_OCTETS (r) register accessor: Receive TCP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_good_octets`] +#[doc = "RXTCP_GOOD_OCTETS (r) register accessor: Receive TCP Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_good_octets`] module"] pub type RXTCP_GOOD_OCTETS = crate::Reg; #[doc = "Receive TCP Good Octets Register"] pub mod rxtcp_good_octets; -#[doc = "RXTCP_ERROR_OCTETS (r) register accessor: Receive TCP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_error_octets`] +#[doc = "RXTCP_ERROR_OCTETS (r) register accessor: Receive TCP Error Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_error_octets`] module"] pub type RXTCP_ERROR_OCTETS = crate::Reg; #[doc = "Receive TCP Error Octets Register"] pub mod rxtcp_error_octets; -#[doc = "RXICMP_GOOD_OCTETS (r) register accessor: Receive ICMP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_good_octets`] +#[doc = "RXICMP_GOOD_OCTETS (r) register accessor: Receive ICMP Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_good_octets`] module"] pub type RXICMP_GOOD_OCTETS = crate::Reg; #[doc = "Receive ICMP Good Octets Register"] pub mod rxicmp_good_octets; -#[doc = "RXICMP_ERROR_OCTETS (r) register accessor: Receive ICMP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_error_octets`] +#[doc = "RXICMP_ERROR_OCTETS (r) register accessor: Receive ICMP Error Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_error_octets`] module"] pub type RXICMP_ERROR_OCTETS = crate::Reg; #[doc = "Receive ICMP Error Octets Register"] pub mod rxicmp_error_octets; -#[doc = "TIMESTAMP_CONTROL (rw) register accessor: Timestamp Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_control`] +#[doc = "TIMESTAMP_CONTROL (rw) register accessor: Timestamp Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_control`] module"] pub type TIMESTAMP_CONTROL = crate::Reg; #[doc = "Timestamp Control Register"] pub mod timestamp_control; -#[doc = "SUB_SECOND_INCREMENT (rw) register accessor: Sub-Second Increment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sub_second_increment::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sub_second_increment::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sub_second_increment`] +#[doc = "SUB_SECOND_INCREMENT (rw) register accessor: Sub-Second Increment Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sub_second_increment::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sub_second_increment::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sub_second_increment`] module"] pub type SUB_SECOND_INCREMENT = crate::Reg; #[doc = "Sub-Second Increment Register"] pub mod sub_second_increment; -#[doc = "SYSTEM_TIME_SECONDS (r) register accessor: System Time - Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_seconds`] +#[doc = "SYSTEM_TIME_SECONDS (r) register accessor: System Time - Seconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_seconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_seconds`] module"] pub type SYSTEM_TIME_SECONDS = crate::Reg; #[doc = "System Time - Seconds Register"] pub mod system_time_seconds; -#[doc = "SYSTEM_TIME_NANOSECONDS (r) register accessor: System Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_nanoseconds`] +#[doc = "SYSTEM_TIME_NANOSECONDS (r) register accessor: System Time Nanoseconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_nanoseconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_nanoseconds`] module"] pub type SYSTEM_TIME_NANOSECONDS = crate::Reg; #[doc = "System Time Nanoseconds Register"] pub mod system_time_nanoseconds; -#[doc = "SYSTEM_TIME_SECONDS_UPDATE (rw) register accessor: System Time - Seconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds_update::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_seconds_update::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_seconds_update`] +#[doc = "SYSTEM_TIME_SECONDS_UPDATE (rw) register accessor: System Time - Seconds Update Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_seconds_update::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_time_seconds_update::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_seconds_update`] module"] pub type SYSTEM_TIME_SECONDS_UPDATE = crate::Reg; #[doc = "System Time - Seconds Update Register"] pub mod system_time_seconds_update; -#[doc = "SYSTEM_TIME_NANOSECONDS_UPDATE (rw) register accessor: System Time Nanoseconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds_update::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_nanoseconds_update::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_nanoseconds_update`] +#[doc = "SYSTEM_TIME_NANOSECONDS_UPDATE (rw) register accessor: System Time Nanoseconds Update Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_nanoseconds_update::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_time_nanoseconds_update::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_nanoseconds_update`] module"] pub type SYSTEM_TIME_NANOSECONDS_UPDATE = crate::Reg; #[doc = "System Time Nanoseconds Update Register"] pub mod system_time_nanoseconds_update; -#[doc = "TIMESTAMP_ADDEND (rw) register accessor: Timestamp Addend Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_addend::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_addend::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_addend`] +#[doc = "TIMESTAMP_ADDEND (rw) register accessor: Timestamp Addend Register\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_addend::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_addend::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_addend`] module"] pub type TIMESTAMP_ADDEND = crate::Reg; #[doc = "Timestamp Addend Register"] pub mod timestamp_addend; -#[doc = "TARGET_TIME_SECONDS (rw) register accessor: Target Time Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_seconds::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_seconds::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_seconds`] +#[doc = "TARGET_TIME_SECONDS (rw) register accessor: Target Time Seconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_seconds::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_seconds::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_seconds`] module"] pub type TARGET_TIME_SECONDS = crate::Reg; #[doc = "Target Time Seconds Register"] pub mod target_time_seconds; -#[doc = "TARGET_TIME_NANOSECONDS (rw) register accessor: Target Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nanoseconds::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nanoseconds::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nanoseconds`] +#[doc = "TARGET_TIME_NANOSECONDS (rw) register accessor: Target Time Nanoseconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_nanoseconds::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_nanoseconds::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nanoseconds`] module"] pub type TARGET_TIME_NANOSECONDS = crate::Reg; #[doc = "Target Time Nanoseconds Register"] pub mod target_time_nanoseconds; -#[doc = "SYSTEM_TIME_HIGHER_WORD_SECONDS (rw) register accessor: System Time - Higher Word Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_higher_word_seconds::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_higher_word_seconds::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_higher_word_seconds`] +#[doc = "SYSTEM_TIME_HIGHER_WORD_SECONDS (rw) register accessor: System Time - Higher Word Seconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_higher_word_seconds::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_time_higher_word_seconds::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_higher_word_seconds`] module"] pub type SYSTEM_TIME_HIGHER_WORD_SECONDS = crate::Reg; #[doc = "System Time - Higher Word Seconds Register"] pub mod system_time_higher_word_seconds; -#[doc = "TIMESTAMP_STATUS (r) register accessor: Timestamp Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_status`] +#[doc = "TIMESTAMP_STATUS (r) register accessor: Timestamp Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_status`] module"] pub type TIMESTAMP_STATUS = crate::Reg; #[doc = "Timestamp Status Register"] pub mod timestamp_status; -#[doc = "PPS_CONTROL (rw) register accessor: PPS Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps_control`] +#[doc = "PPS_CONTROL (rw) register accessor: PPS Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps_control`] module"] pub type PPS_CONTROL = crate::Reg; #[doc = "PPS Control Register"] pub mod pps_control; -#[doc = "BUS_MODE (rw) register accessor: Bus Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bus_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bus_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bus_mode`] +#[doc = "BUS_MODE (rw) register accessor: Bus Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bus_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bus_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bus_mode`] module"] pub type BUS_MODE = crate::Reg; #[doc = "Bus Mode Register"] pub mod bus_mode; -#[doc = "TRANSMIT_POLL_DEMAND (rw) register accessor: Transmit Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_poll_demand::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@transmit_poll_demand`] +#[doc = "TRANSMIT_POLL_DEMAND (rw) register accessor: Transmit Poll Demand Register\n\nYou can [`read`](crate::Reg::read) this register and get [`transmit_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`transmit_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@transmit_poll_demand`] module"] pub type TRANSMIT_POLL_DEMAND = crate::Reg; #[doc = "Transmit Poll Demand Register"] pub mod transmit_poll_demand; -#[doc = "RECEIVE_POLL_DEMAND (rw) register accessor: Receive Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_poll_demand::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_poll_demand`] +#[doc = "RECEIVE_POLL_DEMAND (rw) register accessor: Receive Poll Demand Register\n\nYou can [`read`](crate::Reg::read) this register and get [`receive_poll_demand::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`receive_poll_demand::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_poll_demand`] module"] pub type RECEIVE_POLL_DEMAND = crate::Reg; #[doc = "Receive Poll Demand Register"] pub mod receive_poll_demand; -#[doc = "RECEIVE_DESCRIPTOR_LIST_ADDRESS (rw) register accessor: Receive Descriptor Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_descriptor_list_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_descriptor_list_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_descriptor_list_address`] +#[doc = "RECEIVE_DESCRIPTOR_LIST_ADDRESS (rw) register accessor: Receive Descriptor Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`receive_descriptor_list_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`receive_descriptor_list_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_descriptor_list_address`] module"] pub type RECEIVE_DESCRIPTOR_LIST_ADDRESS = crate::Reg; #[doc = "Receive Descriptor Address Register"] pub mod receive_descriptor_list_address; -#[doc = "TRANSMIT_DESCRIPTOR_LIST_ADDRESS (rw) register accessor: Transmit descripter Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_descriptor_list_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_descriptor_list_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@transmit_descriptor_list_address`] +#[doc = "TRANSMIT_DESCRIPTOR_LIST_ADDRESS (rw) register accessor: Transmit descripter Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`transmit_descriptor_list_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`transmit_descriptor_list_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@transmit_descriptor_list_address`] module"] pub type TRANSMIT_DESCRIPTOR_LIST_ADDRESS = crate::Reg; #[doc = "Transmit descripter Address Register"] pub mod transmit_descriptor_list_address; -#[doc = "STATUS (rw) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] +#[doc = "STATUS (rw) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] pub type STATUS = crate::Reg; #[doc = "Status Register"] pub mod status; -#[doc = "OPERATION_MODE (rw) register accessor: Operation Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`operation_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`operation_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@operation_mode`] +#[doc = "OPERATION_MODE (rw) register accessor: Operation Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`operation_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`operation_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@operation_mode`] module"] pub type OPERATION_MODE = crate::Reg; #[doc = "Operation Mode Register"] pub mod operation_mode; -#[doc = "INTERRUPT_ENABLE (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_enable::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_enable`] +#[doc = "INTERRUPT_ENABLE (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`interrupt_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_enable`] module"] pub type INTERRUPT_ENABLE = crate::Reg; #[doc = "Interrupt Enable Register"] pub mod interrupt_enable; -#[doc = "MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER (r) register accessor: Missed Frame and Buffer Overflow Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`missed_frame_and_buffer_overflow_counter::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@missed_frame_and_buffer_overflow_counter`] +#[doc = "MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER (r) register accessor: Missed Frame and Buffer Overflow Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`missed_frame_and_buffer_overflow_counter::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@missed_frame_and_buffer_overflow_counter`] module"] pub type MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER = crate::Reg; #[doc = "Missed Frame and Buffer Overflow Counter Register"] pub mod missed_frame_and_buffer_overflow_counter; -#[doc = "RECEIVE_INTERRUPT_WATCHDOG_TIMER (rw) register accessor: Receive Interrupt Watchdog Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_interrupt_watchdog_timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_interrupt_watchdog_timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_interrupt_watchdog_timer`] +#[doc = "RECEIVE_INTERRUPT_WATCHDOG_TIMER (rw) register accessor: Receive Interrupt Watchdog Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`receive_interrupt_watchdog_timer::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`receive_interrupt_watchdog_timer::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_interrupt_watchdog_timer`] module"] pub type RECEIVE_INTERRUPT_WATCHDOG_TIMER = crate::Reg; #[doc = "Receive Interrupt Watchdog Timer Register"] pub mod receive_interrupt_watchdog_timer; -#[doc = "AHB_STATUS (r) register accessor: AHB Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb_status`] +#[doc = "AHB_STATUS (r) register accessor: AHB Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ahb_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb_status`] module"] pub type AHB_STATUS = crate::Reg; #[doc = "AHB Status Register"] pub mod ahb_status; -#[doc = "CURRENT_HOST_TRANSMIT_DESCRIPTOR (r) register accessor: Current Host Transmit Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_descriptor::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_transmit_descriptor`] +#[doc = "CURRENT_HOST_TRANSMIT_DESCRIPTOR (r) register accessor: Current Host Transmit Descriptor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_transmit_descriptor::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_transmit_descriptor`] module"] pub type CURRENT_HOST_TRANSMIT_DESCRIPTOR = crate::Reg; #[doc = "Current Host Transmit Descriptor Register"] pub mod current_host_transmit_descriptor; -#[doc = "CURRENT_HOST_RECEIVE_DESCRIPTOR (r) register accessor: Current Host Receive Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_descriptor::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_receive_descriptor`] +#[doc = "CURRENT_HOST_RECEIVE_DESCRIPTOR (r) register accessor: Current Host Receive Descriptor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_receive_descriptor::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_receive_descriptor`] module"] pub type CURRENT_HOST_RECEIVE_DESCRIPTOR = crate::Reg; #[doc = "Current Host Receive Descriptor Register"] pub mod current_host_receive_descriptor; -#[doc = "CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS (r) register accessor: Current Host Transmit Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_buffer_address::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_transmit_buffer_address`] +#[doc = "CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS (r) register accessor: Current Host Transmit Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_transmit_buffer_address::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_transmit_buffer_address`] module"] pub type CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS = crate::Reg; #[doc = "Current Host Transmit Buffer Address Register"] pub mod current_host_transmit_buffer_address; -#[doc = "CURRENT_HOST_RECEIVE_BUFFER_ADDRESS (r) register accessor: Current Host Receive Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_buffer_address::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_receive_buffer_address`] +#[doc = "CURRENT_HOST_RECEIVE_BUFFER_ADDRESS (r) register accessor: Current Host Receive Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_receive_buffer_address::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_receive_buffer_address`] module"] pub type CURRENT_HOST_RECEIVE_BUFFER_ADDRESS = crate::Reg; #[doc = "Current Host Receive Buffer Address Register"] pub mod current_host_receive_buffer_address; -#[doc = "HW_FEATURE (rw) register accessor: HW Feature Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_feature::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hw_feature::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_feature`] +#[doc = "HW_FEATURE (rw) register accessor: HW Feature Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_feature::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_feature::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_feature`] module"] pub type HW_FEATURE = crate::Reg; #[doc = "HW Feature Register"] diff --git a/src/eth0/ahb_status.rs b/src/eth0/ahb_status.rs index 567a6350..c27dfe24 100644 --- a/src/eth0/ahb_status.rs +++ b/src/eth0/ahb_status.rs @@ -9,7 +9,7 @@ impl R { AHBMS_R::new((self.bits & 1) != 0) } } -#[doc = "AHB Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "AHB Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ahb_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct AHB_STATUS_SPEC; impl crate::RegisterSpec for AHB_STATUS_SPEC { type Ux = u32; diff --git a/src/eth0/bus_mode.rs b/src/eth0/bus_mode.rs index f3f8f3c5..6dd0d0c0 100644 --- a/src/eth0/bus_mode.rs +++ b/src/eth0/bus_mode.rs @@ -208,7 +208,7 @@ impl W { TXPR_W::new(self, 27) } } -#[doc = "Bus Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bus_mode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bus_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Bus Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bus_mode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bus_mode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BUS_MODE_SPEC; impl crate::RegisterSpec for BUS_MODE_SPEC { type Ux = u32; diff --git a/src/eth0/current_host_receive_buffer_address.rs b/src/eth0/current_host_receive_buffer_address.rs index 3cabf1c4..3c20c758 100644 --- a/src/eth0/current_host_receive_buffer_address.rs +++ b/src/eth0/current_host_receive_buffer_address.rs @@ -9,7 +9,7 @@ impl R { CURRBUFAPTR_R::new(self.bits) } } -#[doc = "Current Host Receive Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_buffer_address::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Current Host Receive Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_receive_buffer_address::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_SPEC; impl crate::RegisterSpec for CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_SPEC { type Ux = u32; diff --git a/src/eth0/current_host_receive_descriptor.rs b/src/eth0/current_host_receive_descriptor.rs index 92f5f854..9d89cc77 100644 --- a/src/eth0/current_host_receive_descriptor.rs +++ b/src/eth0/current_host_receive_descriptor.rs @@ -9,7 +9,7 @@ impl R { CURRDESAPTR_R::new(self.bits) } } -#[doc = "Current Host Receive Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_descriptor::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Current Host Receive Descriptor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_receive_descriptor::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CURRENT_HOST_RECEIVE_DESCRIPTOR_SPEC; impl crate::RegisterSpec for CURRENT_HOST_RECEIVE_DESCRIPTOR_SPEC { type Ux = u32; diff --git a/src/eth0/current_host_transmit_buffer_address.rs b/src/eth0/current_host_transmit_buffer_address.rs index 120f4717..e7ebc932 100644 --- a/src/eth0/current_host_transmit_buffer_address.rs +++ b/src/eth0/current_host_transmit_buffer_address.rs @@ -9,7 +9,7 @@ impl R { CURTBUFAPTR_R::new(self.bits) } } -#[doc = "Current Host Transmit Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_buffer_address::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Current Host Transmit Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_transmit_buffer_address::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_SPEC; impl crate::RegisterSpec for CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_SPEC { type Ux = u32; diff --git a/src/eth0/current_host_transmit_descriptor.rs b/src/eth0/current_host_transmit_descriptor.rs index b6c89a82..fa7aae6d 100644 --- a/src/eth0/current_host_transmit_descriptor.rs +++ b/src/eth0/current_host_transmit_descriptor.rs @@ -9,7 +9,7 @@ impl R { CURTDESAPTR_R::new(self.bits) } } -#[doc = "Current Host Transmit Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_descriptor::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Current Host Transmit Descriptor Register\n\nYou can [`read`](crate::Reg::read) this register and get [`current_host_transmit_descriptor::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CURRENT_HOST_TRANSMIT_DESCRIPTOR_SPEC; impl crate::RegisterSpec for CURRENT_HOST_TRANSMIT_DESCRIPTOR_SPEC { type Ux = u32; diff --git a/src/eth0/debug.rs b/src/eth0/debug.rs index 9ae9427c..777d591d 100644 --- a/src/eth0/debug.rs +++ b/src/eth0/debug.rs @@ -86,7 +86,7 @@ impl R { TXSTSFSTS_R::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "Debug Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Debug Register\n\nYou can [`read`](crate::Reg::read) this register and get [`debug::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DEBUG_SPEC; impl crate::RegisterSpec for DEBUG_SPEC { type Ux = u32; diff --git a/src/eth0/flow_control.rs b/src/eth0/flow_control.rs index 400ca3d7..82a812e1 100644 --- a/src/eth0/flow_control.rs +++ b/src/eth0/flow_control.rs @@ -111,7 +111,7 @@ impl W { PT_W::new(self, 16) } } -#[doc = "Flow Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`flow_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`flow_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flow Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`flow_control::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flow_control::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FLOW_CONTROL_SPEC; impl crate::RegisterSpec for FLOW_CONTROL_SPEC { type Ux = u32; diff --git a/src/eth0/gmii_address.rs b/src/eth0/gmii_address.rs index 77f972b8..b3e5532d 100644 --- a/src/eth0/gmii_address.rs +++ b/src/eth0/gmii_address.rs @@ -81,7 +81,7 @@ impl W { PA_W::new(self, 11) } } -#[doc = "MII Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MII Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gmii_address::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmii_address::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GMII_ADDRESS_SPEC; impl crate::RegisterSpec for GMII_ADDRESS_SPEC { type Ux = u32; diff --git a/src/eth0/gmii_data.rs b/src/eth0/gmii_data.rs index 0cb7ce8c..4978d79d 100644 --- a/src/eth0/gmii_data.rs +++ b/src/eth0/gmii_data.rs @@ -21,7 +21,7 @@ impl W { MD_W::new(self, 0) } } -#[doc = "MII Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MII Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gmii_data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gmii_data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GMII_DATA_SPEC; impl crate::RegisterSpec for GMII_DATA_SPEC { type Ux = u32; diff --git a/src/eth0/hash_table_high.rs b/src/eth0/hash_table_high.rs index 817d4d73..63469feb 100644 --- a/src/eth0/hash_table_high.rs +++ b/src/eth0/hash_table_high.rs @@ -21,7 +21,7 @@ impl W { HTH_W::new(self, 0) } } -#[doc = "Hash Table High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hash Table High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hash_table_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hash_table_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HASH_TABLE_HIGH_SPEC; impl crate::RegisterSpec for HASH_TABLE_HIGH_SPEC { type Ux = u32; diff --git a/src/eth0/hash_table_low.rs b/src/eth0/hash_table_low.rs index 6ef17146..370e5cbb 100644 --- a/src/eth0/hash_table_low.rs +++ b/src/eth0/hash_table_low.rs @@ -21,7 +21,7 @@ impl W { HTL_W::new(self, 0) } } -#[doc = "Hash Table Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hash Table Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hash_table_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hash_table_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HASH_TABLE_LOW_SPEC; impl crate::RegisterSpec for HASH_TABLE_LOW_SPEC { type Ux = u32; diff --git a/src/eth0/hw_feature.rs b/src/eth0/hw_feature.rs index a8f3cc9e..0526d8d3 100644 --- a/src/eth0/hw_feature.rs +++ b/src/eth0/hw_feature.rs @@ -203,7 +203,7 @@ impl W { RXFIFOSIZE_W::new(self, 19) } } -#[doc = "HW Feature Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_feature::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hw_feature::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HW Feature Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_feature::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_feature::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HW_FEATURE_SPEC; impl crate::RegisterSpec for HW_FEATURE_SPEC { type Ux = u32; diff --git a/src/eth0/interrupt_enable.rs b/src/eth0/interrupt_enable.rs index de8bcebf..cea359e1 100644 --- a/src/eth0/interrupt_enable.rs +++ b/src/eth0/interrupt_enable.rs @@ -231,7 +231,7 @@ impl W { NIE_W::new(self, 16) } } -#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_enable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`interrupt_enable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INTERRUPT_ENABLE_SPEC; impl crate::RegisterSpec for INTERRUPT_ENABLE_SPEC { type Ux = u32; diff --git a/src/eth0/interrupt_mask.rs b/src/eth0/interrupt_mask.rs index 638c80f3..f43c88e5 100644 --- a/src/eth0/interrupt_mask.rs +++ b/src/eth0/interrupt_mask.rs @@ -36,7 +36,7 @@ impl W { TSIM_W::new(self, 9) } } -#[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`interrupt_mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INTERRUPT_MASK_SPEC; impl crate::RegisterSpec for INTERRUPT_MASK_SPEC { type Ux = u32; diff --git a/src/eth0/interrupt_status.rs b/src/eth0/interrupt_status.rs index 0a7aa7e6..cd23d3b9 100644 --- a/src/eth0/interrupt_status.rs +++ b/src/eth0/interrupt_status.rs @@ -44,7 +44,7 @@ impl R { TSIS_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INTERRUPT_STATUS_SPEC; impl crate::RegisterSpec for INTERRUPT_STATUS_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address0_high.rs b/src/eth0/mac_address0_high.rs index 0e5706f6..7b1f63e1 100644 --- a/src/eth0/mac_address0_high.rs +++ b/src/eth0/mac_address0_high.rs @@ -28,7 +28,7 @@ impl W { ADDRHI_W::new(self, 0) } } -#[doc = "MAC Address0 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address0 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address0_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address0_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS0_HIGH_SPEC; impl crate::RegisterSpec for MAC_ADDRESS0_HIGH_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address0_low.rs b/src/eth0/mac_address0_low.rs index 38c8effb..ef322e45 100644 --- a/src/eth0/mac_address0_low.rs +++ b/src/eth0/mac_address0_low.rs @@ -21,7 +21,7 @@ impl W { ADDRLO_W::new(self, 0) } } -#[doc = "MAC Address0 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address0 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address0_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address0_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS0_LOW_SPEC; impl crate::RegisterSpec for MAC_ADDRESS0_LOW_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address1_high.rs b/src/eth0/mac_address1_high.rs index d1e0ecb4..ec21bc0f 100644 --- a/src/eth0/mac_address1_high.rs +++ b/src/eth0/mac_address1_high.rs @@ -66,7 +66,7 @@ impl W { AE_W::new(self, 31) } } -#[doc = "MAC Address1 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address1 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address1_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address1_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS1_HIGH_SPEC; impl crate::RegisterSpec for MAC_ADDRESS1_HIGH_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address1_low.rs b/src/eth0/mac_address1_low.rs index c958ae32..b8ad12d5 100644 --- a/src/eth0/mac_address1_low.rs +++ b/src/eth0/mac_address1_low.rs @@ -21,7 +21,7 @@ impl W { ADDRLO_W::new(self, 0) } } -#[doc = "MAC Address1 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address1 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address1_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address1_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS1_LOW_SPEC; impl crate::RegisterSpec for MAC_ADDRESS1_LOW_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address2_high.rs b/src/eth0/mac_address2_high.rs index dea480fa..3d82f358 100644 --- a/src/eth0/mac_address2_high.rs +++ b/src/eth0/mac_address2_high.rs @@ -66,7 +66,7 @@ impl W { AE_W::new(self, 31) } } -#[doc = "MAC Address2 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address2 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address2_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address2_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS2_HIGH_SPEC; impl crate::RegisterSpec for MAC_ADDRESS2_HIGH_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address2_low.rs b/src/eth0/mac_address2_low.rs index 69c50b69..7916c916 100644 --- a/src/eth0/mac_address2_low.rs +++ b/src/eth0/mac_address2_low.rs @@ -21,7 +21,7 @@ impl W { ADDRLO_W::new(self, 0) } } -#[doc = "MAC Address2 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address2 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address2_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address2_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS2_LOW_SPEC; impl crate::RegisterSpec for MAC_ADDRESS2_LOW_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address3_high.rs b/src/eth0/mac_address3_high.rs index 0170f29f..dd880f80 100644 --- a/src/eth0/mac_address3_high.rs +++ b/src/eth0/mac_address3_high.rs @@ -66,7 +66,7 @@ impl W { AE_W::new(self, 31) } } -#[doc = "MAC Address3 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address3 High Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address3_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address3_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS3_HIGH_SPEC; impl crate::RegisterSpec for MAC_ADDRESS3_HIGH_SPEC { type Ux = u32; diff --git a/src/eth0/mac_address3_low.rs b/src/eth0/mac_address3_low.rs index 06e1a856..c06db478 100644 --- a/src/eth0/mac_address3_low.rs +++ b/src/eth0/mac_address3_low.rs @@ -21,7 +21,7 @@ impl W { ADDRLO_W::new(self, 0) } } -#[doc = "MAC Address3 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Address3 Low Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_address3_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_address3_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_ADDRESS3_LOW_SPEC; impl crate::RegisterSpec for MAC_ADDRESS3_LOW_SPEC { type Ux = u32; diff --git a/src/eth0/mac_configuration.rs b/src/eth0/mac_configuration.rs index f5ee249f..bce41ed2 100644 --- a/src/eth0/mac_configuration.rs +++ b/src/eth0/mac_configuration.rs @@ -312,7 +312,7 @@ impl W { TWOKPE_W::new(self, 27) } } -#[doc = "MAC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_configuration::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_configuration::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_configuration::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_configuration::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_CONFIGURATION_SPEC; impl crate::RegisterSpec for MAC_CONFIGURATION_SPEC { type Ux = u32; diff --git a/src/eth0/mac_frame_filter.rs b/src/eth0/mac_frame_filter.rs index 4235ae87..585d08ac 100644 --- a/src/eth0/mac_frame_filter.rs +++ b/src/eth0/mac_frame_filter.rs @@ -200,7 +200,7 @@ impl W { RA_W::new(self, 31) } } -#[doc = "MAC Frame Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_filter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_filter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MAC Frame Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_frame_filter::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_frame_filter::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MAC_FRAME_FILTER_SPEC; impl crate::RegisterSpec for MAC_FRAME_FILTER_SPEC { type Ux = u32; diff --git a/src/eth0/missed_frame_and_buffer_overflow_counter.rs b/src/eth0/missed_frame_and_buffer_overflow_counter.rs index e958542d..c9f8d4d1 100644 --- a/src/eth0/missed_frame_and_buffer_overflow_counter.rs +++ b/src/eth0/missed_frame_and_buffer_overflow_counter.rs @@ -30,7 +30,7 @@ impl R { OVFCNTOVF_R::new(((self.bits >> 28) & 1) != 0) } } -#[doc = "Missed Frame and Buffer Overflow Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`missed_frame_and_buffer_overflow_counter::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Missed Frame and Buffer Overflow Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`missed_frame_and_buffer_overflow_counter::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_SPEC; impl crate::RegisterSpec for MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_SPEC { type Ux = u32; diff --git a/src/eth0/mmc_control.rs b/src/eth0/mmc_control.rs index 430e4d26..d8237f91 100644 --- a/src/eth0/mmc_control.rs +++ b/src/eth0/mmc_control.rs @@ -111,7 +111,7 @@ impl W { UCDBC_W::new(self, 8) } } -#[doc = "MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MMC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_control::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_control::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMC_CONTROL_SPEC; impl crate::RegisterSpec for MMC_CONTROL_SPEC { type Ux = u32; diff --git a/src/eth0/mmc_ipc_receive_interrupt.rs b/src/eth0/mmc_ipc_receive_interrupt.rs index 811a952e..7cfcd411 100644 --- a/src/eth0/mmc_ipc_receive_interrupt.rs +++ b/src/eth0/mmc_ipc_receive_interrupt.rs @@ -198,7 +198,7 @@ impl R { RXICMPEROIS_R::new(((self.bits >> 29) & 1) != 0) } } -#[doc = "MMC Receive Checksum Offload Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MMC Receive Checksum Offload Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_ipc_receive_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMC_IPC_RECEIVE_INTERRUPT_SPEC; impl crate::RegisterSpec for MMC_IPC_RECEIVE_INTERRUPT_SPEC { type Ux = u32; diff --git a/src/eth0/mmc_ipc_receive_interrupt_mask.rs b/src/eth0/mmc_ipc_receive_interrupt_mask.rs index 7591f7cb..ea8cd9bc 100644 --- a/src/eth0/mmc_ipc_receive_interrupt_mask.rs +++ b/src/eth0/mmc_ipc_receive_interrupt_mask.rs @@ -426,7 +426,7 @@ impl W { RXICMPEROIM_W::new(self, 29) } } -#[doc = "MMC Receive Checksum Offload Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_ipc_receive_interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MMC Receive Checksum Offload Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_ipc_receive_interrupt_mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_ipc_receive_interrupt_mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMC_IPC_RECEIVE_INTERRUPT_MASK_SPEC; impl crate::RegisterSpec for MMC_IPC_RECEIVE_INTERRUPT_MASK_SPEC { type Ux = u32; diff --git a/src/eth0/mmc_receive_interrupt.rs b/src/eth0/mmc_receive_interrupt.rs index 4dcaab74..6d67b03d 100644 --- a/src/eth0/mmc_receive_interrupt.rs +++ b/src/eth0/mmc_receive_interrupt.rs @@ -184,7 +184,7 @@ impl R { RXCTRLFIS_R::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MMC Receive Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_receive_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMC_RECEIVE_INTERRUPT_SPEC; impl crate::RegisterSpec for MMC_RECEIVE_INTERRUPT_SPEC { type Ux = u32; diff --git a/src/eth0/mmc_receive_interrupt_mask.rs b/src/eth0/mmc_receive_interrupt_mask.rs index 517bbf69..8984b996 100644 --- a/src/eth0/mmc_receive_interrupt_mask.rs +++ b/src/eth0/mmc_receive_interrupt_mask.rs @@ -396,7 +396,7 @@ impl W { RXCTRLFIM_W::new(self, 25) } } -#[doc = "MMC Reveive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_receive_interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MMC Reveive Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_receive_interrupt_mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_receive_interrupt_mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMC_RECEIVE_INTERRUPT_MASK_SPEC; impl crate::RegisterSpec for MMC_RECEIVE_INTERRUPT_MASK_SPEC { type Ux = u32; diff --git a/src/eth0/mmc_transmit_interrupt.rs b/src/eth0/mmc_transmit_interrupt.rs index c1695943..82c7aa21 100644 --- a/src/eth0/mmc_transmit_interrupt.rs +++ b/src/eth0/mmc_transmit_interrupt.rs @@ -184,7 +184,7 @@ impl R { TXOSIZEGFIS_R::new(((self.bits >> 25) & 1) != 0) } } -#[doc = "MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MMC Transmit Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_transmit_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMC_TRANSMIT_INTERRUPT_SPEC; impl crate::RegisterSpec for MMC_TRANSMIT_INTERRUPT_SPEC { type Ux = u32; diff --git a/src/eth0/mmc_transmit_interrupt_mask.rs b/src/eth0/mmc_transmit_interrupt_mask.rs index a885ddf1..e1cba983 100644 --- a/src/eth0/mmc_transmit_interrupt_mask.rs +++ b/src/eth0/mmc_transmit_interrupt_mask.rs @@ -396,7 +396,7 @@ impl W { TXOSIZEGFIM_W::new(self, 25) } } -#[doc = "MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_transmit_interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_transmit_interrupt_mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_transmit_interrupt_mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMC_TRANSMIT_INTERRUPT_MASK_SPEC; impl crate::RegisterSpec for MMC_TRANSMIT_INTERRUPT_MASK_SPEC { type Ux = u32; diff --git a/src/eth0/operation_mode.rs b/src/eth0/operation_mode.rs index 153790ca..9e1f476d 100644 --- a/src/eth0/operation_mode.rs +++ b/src/eth0/operation_mode.rs @@ -186,7 +186,7 @@ impl W { DT_W::new(self, 26) } } -#[doc = "Operation Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`operation_mode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`operation_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Operation Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`operation_mode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`operation_mode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OPERATION_MODE_SPEC; impl crate::RegisterSpec for OPERATION_MODE_SPEC { type Ux = u32; diff --git a/src/eth0/pmt_control_status.rs b/src/eth0/pmt_control_status.rs index 953ade32..6cbf5660 100644 --- a/src/eth0/pmt_control_status.rs +++ b/src/eth0/pmt_control_status.rs @@ -95,7 +95,7 @@ impl W { RWKFILTRST_W::new(self, 31) } } -#[doc = "PMT Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmt_control_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmt_control_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PMT Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmt_control_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmt_control_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PMT_CONTROL_STATUS_SPEC; impl crate::RegisterSpec for PMT_CONTROL_STATUS_SPEC { type Ux = u32; diff --git a/src/eth0/pps_control.rs b/src/eth0/pps_control.rs index 20fc02e9..4c8dfd09 100644 --- a/src/eth0/pps_control.rs +++ b/src/eth0/pps_control.rs @@ -77,7 +77,7 @@ impl W { PPSCTRL_PPSCMD_W::new(self, 0) } } -#[doc = "PPS Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PPS Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps_control::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps_control::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_CONTROL_SPEC; impl crate::RegisterSpec for PPS_CONTROL_SPEC { type Ux = u32; diff --git a/src/eth0/receive_descriptor_list_address.rs b/src/eth0/receive_descriptor_list_address.rs index e76b5b9f..a7f5224e 100644 --- a/src/eth0/receive_descriptor_list_address.rs +++ b/src/eth0/receive_descriptor_list_address.rs @@ -21,7 +21,7 @@ impl W { RDESLA_32BIT_W::new(self, 2) } } -#[doc = "Receive Descriptor Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_descriptor_list_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_descriptor_list_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Descriptor Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`receive_descriptor_list_address::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`receive_descriptor_list_address::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RECEIVE_DESCRIPTOR_LIST_ADDRESS_SPEC; impl crate::RegisterSpec for RECEIVE_DESCRIPTOR_LIST_ADDRESS_SPEC { type Ux = u32; diff --git a/src/eth0/receive_interrupt_watchdog_timer.rs b/src/eth0/receive_interrupt_watchdog_timer.rs index e5bc7d3d..6b8d1574 100644 --- a/src/eth0/receive_interrupt_watchdog_timer.rs +++ b/src/eth0/receive_interrupt_watchdog_timer.rs @@ -21,7 +21,7 @@ impl W { RIWT_W::new(self, 0) } } -#[doc = "Receive Interrupt Watchdog Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_interrupt_watchdog_timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_interrupt_watchdog_timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Interrupt Watchdog Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`receive_interrupt_watchdog_timer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`receive_interrupt_watchdog_timer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RECEIVE_INTERRUPT_WATCHDOG_TIMER_SPEC; impl crate::RegisterSpec for RECEIVE_INTERRUPT_WATCHDOG_TIMER_SPEC { type Ux = u32; diff --git a/src/eth0/receive_poll_demand.rs b/src/eth0/receive_poll_demand.rs index 8e0766f2..35e774d6 100644 --- a/src/eth0/receive_poll_demand.rs +++ b/src/eth0/receive_poll_demand.rs @@ -21,7 +21,7 @@ impl W { RPD_W::new(self, 0) } } -#[doc = "Receive Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_poll_demand::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Poll Demand Register\n\nYou can [`read`](crate::Reg::read) this register and get [`receive_poll_demand::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`receive_poll_demand::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RECEIVE_POLL_DEMAND_SPEC; impl crate::RegisterSpec for RECEIVE_POLL_DEMAND_SPEC { type Ux = u32; diff --git a/src/eth0/remote_wake_up_frame_filter.rs b/src/eth0/remote_wake_up_frame_filter.rs index c6445faa..94f5af18 100644 --- a/src/eth0/remote_wake_up_frame_filter.rs +++ b/src/eth0/remote_wake_up_frame_filter.rs @@ -21,7 +21,7 @@ impl W { WKUPFRMFTR_W::new(self, 0) } } -#[doc = "Remote Wake Up Frame Filter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`remote_wake_up_frame_filter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`remote_wake_up_frame_filter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Remote Wake Up Frame Filter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`remote_wake_up_frame_filter::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`remote_wake_up_frame_filter::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct REMOTE_WAKE_UP_FRAME_FILTER_SPEC; impl crate::RegisterSpec for REMOTE_WAKE_UP_FRAME_FILTER_SPEC { type Ux = u32; diff --git a/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs b/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs index 31de4066..b29cd9e4 100644 --- a/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs +++ b/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { RX1024_MAXOCTGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_1024tomaxoctets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_1024tomaxoctets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_128to255octets_frames_good_bad.rs b/src/eth0/rx_128to255octets_frames_good_bad.rs index d7602b34..f669cca4 100644 --- a/src/eth0/rx_128to255octets_frames_good_bad.rs +++ b/src/eth0/rx_128to255octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { RX128_255OCTGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_128to255octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_128to255octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_256to511octets_frames_good_bad.rs b/src/eth0/rx_256to511octets_frames_good_bad.rs index 90327629..e19e4948 100644 --- a/src/eth0/rx_256to511octets_frames_good_bad.rs +++ b/src/eth0/rx_256to511octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { RX256_511OCTGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_256to511octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_256to511octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_512to1023octets_frames_good_bad.rs b/src/eth0/rx_512to1023octets_frames_good_bad.rs index d9888d62..54648097 100644 --- a/src/eth0/rx_512to1023octets_frames_good_bad.rs +++ b/src/eth0/rx_512to1023octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { RX512_1023OCTGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_512to1023octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_512to1023octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_64octets_frames_good_bad.rs b/src/eth0/rx_64octets_frames_good_bad.rs index 1cafffe4..1522a07b 100644 --- a/src/eth0/rx_64octets_frames_good_bad.rs +++ b/src/eth0/rx_64octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { RX64OCTGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_64octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_64octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_64OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_64OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_65to127octets_frames_good_bad.rs b/src/eth0/rx_65to127octets_frames_good_bad.rs index 69843349..a90a4de5 100644 --- a/src/eth0/rx_65to127octets_frames_good_bad.rs +++ b/src/eth0/rx_65to127octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { RX65_127OCTGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_65to127octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_65to127octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_alignment_error_frames.rs b/src/eth0/rx_alignment_error_frames.rs index db3834e3..cde5b692 100644 --- a/src/eth0/rx_alignment_error_frames.rs +++ b/src/eth0/rx_alignment_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXALGNERR_R::new(self.bits) } } -#[doc = "Receive Frame Count for Alignment Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_alignment_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Alignment Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_alignment_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_ALIGNMENT_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RX_ALIGNMENT_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_broadcast_frames_good.rs b/src/eth0/rx_broadcast_frames_good.rs index 522799d9..ec5069ef 100644 --- a/src/eth0/rx_broadcast_frames_good.rs +++ b/src/eth0/rx_broadcast_frames_good.rs @@ -9,7 +9,7 @@ impl R { RXBCASTG_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_broadcast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_broadcast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_BROADCAST_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for RX_BROADCAST_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_control_frames_good.rs b/src/eth0/rx_control_frames_good.rs index 2cc7a68b..267b392a 100644 --- a/src/eth0/rx_control_frames_good.rs +++ b/src/eth0/rx_control_frames_good.rs @@ -9,7 +9,7 @@ impl R { RXCTRLG_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good Control Frames Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_control_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good Control Frames Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_control_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_CONTROL_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for RX_CONTROL_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_crc_error_frames.rs b/src/eth0/rx_crc_error_frames.rs index bbd9088b..7105a5aa 100644 --- a/src/eth0/rx_crc_error_frames.rs +++ b/src/eth0/rx_crc_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXCRCERR_R::new(self.bits) } } -#[doc = "Receive Frame Count for CRC Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_crc_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for CRC Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_crc_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_CRC_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RX_CRC_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_fifo_overflow_frames.rs b/src/eth0/rx_fifo_overflow_frames.rs index 105ac3b7..d03d1207 100644 --- a/src/eth0/rx_fifo_overflow_frames.rs +++ b/src/eth0/rx_fifo_overflow_frames.rs @@ -9,7 +9,7 @@ impl R { RXFIFOOVFL_R::new(self.bits) } } -#[doc = "Receive Frame Count for FIFO Overflow Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_fifo_overflow_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for FIFO Overflow Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_fifo_overflow_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_FIFO_OVERFLOW_FRAMES_SPEC; impl crate::RegisterSpec for RX_FIFO_OVERFLOW_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_frames_count_good_bad.rs b/src/eth0/rx_frames_count_good_bad.rs index 62305550..b5bfb36d 100644 --- a/src/eth0/rx_frames_count_good_bad.rs +++ b/src/eth0/rx_frames_count_good_bad.rs @@ -9,7 +9,7 @@ impl R { RXFRMGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_frames_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_frames_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_FRAMES_COUNT_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_FRAMES_COUNT_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_jabber_error_frames.rs b/src/eth0/rx_jabber_error_frames.rs index 3bcf4483..d00e116e 100644 --- a/src/eth0/rx_jabber_error_frames.rs +++ b/src/eth0/rx_jabber_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXJABERR_R::new(self.bits) } } -#[doc = "Receive Frame Count for Jabber Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_jabber_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Jabber Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_jabber_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_JABBER_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RX_JABBER_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_length_error_frames.rs b/src/eth0/rx_length_error_frames.rs index 79b8572e..19df7e5a 100644 --- a/src/eth0/rx_length_error_frames.rs +++ b/src/eth0/rx_length_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXLENERR_R::new(self.bits) } } -#[doc = "Receive Frame Count for Length Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_length_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Length Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_length_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_LENGTH_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RX_LENGTH_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_multicast_frames_good.rs b/src/eth0/rx_multicast_frames_good.rs index 7f411b45..b1946065 100644 --- a/src/eth0/rx_multicast_frames_good.rs +++ b/src/eth0/rx_multicast_frames_good.rs @@ -9,7 +9,7 @@ impl R { RXMCASTG_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_multicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_multicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_MULTICAST_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for RX_MULTICAST_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_octet_count_good.rs b/src/eth0/rx_octet_count_good.rs index 79b33e95..0f828fef 100644 --- a/src/eth0/rx_octet_count_good.rs +++ b/src/eth0/rx_octet_count_good.rs @@ -9,7 +9,7 @@ impl R { RXOCTG_R::new(self.bits) } } -#[doc = "Rx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Rx Octet Count Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_octet_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_OCTET_COUNT_GOOD_SPEC; impl crate::RegisterSpec for RX_OCTET_COUNT_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_octet_count_good_bad.rs b/src/eth0/rx_octet_count_good_bad.rs index b05cf958..6742719b 100644 --- a/src/eth0/rx_octet_count_good_bad.rs +++ b/src/eth0/rx_octet_count_good_bad.rs @@ -9,7 +9,7 @@ impl R { RXOCTGB_R::new(self.bits) } } -#[doc = "Receive Octet Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Octet Count for Good and Bad Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_octet_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_OCTET_COUNT_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_OCTET_COUNT_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_out_of_range_type_frames.rs b/src/eth0/rx_out_of_range_type_frames.rs index 791128ee..baaa5ab5 100644 --- a/src/eth0/rx_out_of_range_type_frames.rs +++ b/src/eth0/rx_out_of_range_type_frames.rs @@ -9,7 +9,7 @@ impl R { RXOUTOFRNG_R::new(self.bits) } } -#[doc = "Receive Frame Count for Out of Range Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_out_of_range_type_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Out of Range Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_out_of_range_type_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_OUT_OF_RANGE_TYPE_FRAMES_SPEC; impl crate::RegisterSpec for RX_OUT_OF_RANGE_TYPE_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_oversize_frames_good.rs b/src/eth0/rx_oversize_frames_good.rs index b804282c..6b6d689a 100644 --- a/src/eth0/rx_oversize_frames_good.rs +++ b/src/eth0/rx_oversize_frames_good.rs @@ -9,7 +9,7 @@ impl R { RXOVERSZG_R::new(self.bits) } } -#[doc = "Rx Oversize Frames Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_oversize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Rx Oversize Frames Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_oversize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_OVERSIZE_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for RX_OVERSIZE_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_pause_frames.rs b/src/eth0/rx_pause_frames.rs index d9a756ef..1d1fd30d 100644 --- a/src/eth0/rx_pause_frames.rs +++ b/src/eth0/rx_pause_frames.rs @@ -9,7 +9,7 @@ impl R { RXPAUSEFRM_R::new(self.bits) } } -#[doc = "Receive Frame Count for PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_pause_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for PAUSE Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_pause_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_PAUSE_FRAMES_SPEC; impl crate::RegisterSpec for RX_PAUSE_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_receive_error_frames.rs b/src/eth0/rx_receive_error_frames.rs index 92263e15..498d875c 100644 --- a/src/eth0/rx_receive_error_frames.rs +++ b/src/eth0/rx_receive_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXRCVERR_R::new(self.bits) } } -#[doc = "Receive Frame Count for Receive Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_receive_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Receive Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_receive_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_RECEIVE_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RX_RECEIVE_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_runt_error_frames.rs b/src/eth0/rx_runt_error_frames.rs index d840acfe..762f5ff9 100644 --- a/src/eth0/rx_runt_error_frames.rs +++ b/src/eth0/rx_runt_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXRUNTERR_R::new(self.bits) } } -#[doc = "Receive Frame Count for Runt Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_runt_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Runt Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_runt_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_RUNT_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RX_RUNT_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rx_undersize_frames_good.rs b/src/eth0/rx_undersize_frames_good.rs index 32420602..4539b2f6 100644 --- a/src/eth0/rx_undersize_frames_good.rs +++ b/src/eth0/rx_undersize_frames_good.rs @@ -9,7 +9,7 @@ impl R { RXUNDERSZG_R::new(self.bits) } } -#[doc = "Receive Frame Count for Undersize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_undersize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Undersize Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_undersize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_UNDERSIZE_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for RX_UNDERSIZE_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_unicast_frames_good.rs b/src/eth0/rx_unicast_frames_good.rs index 4882e81a..d2cf16e8 100644 --- a/src/eth0/rx_unicast_frames_good.rs +++ b/src/eth0/rx_unicast_frames_good.rs @@ -9,7 +9,7 @@ impl R { RXUCASTG_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_unicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good Unicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_unicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_UNICAST_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for RX_UNICAST_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_vlan_frames_good_bad.rs b/src/eth0/rx_vlan_frames_good_bad.rs index c6045da3..f7be716c 100644 --- a/src/eth0/rx_vlan_frames_good_bad.rs +++ b/src/eth0/rx_vlan_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { RXVLANFRGB_R::new(self.bits) } } -#[doc = "Receive Frame Count for Good and Bad VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_vlan_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Good and Bad VLAN Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_vlan_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_VLAN_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for RX_VLAN_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/rx_watchdog_error_frames.rs b/src/eth0/rx_watchdog_error_frames.rs index c49ad1a6..2f505c10 100644 --- a/src/eth0/rx_watchdog_error_frames.rs +++ b/src/eth0/rx_watchdog_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXWDGERR_R::new(self.bits) } } -#[doc = "Receive Frame Count for Watchdog Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_watchdog_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Frame Count for Watchdog Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_watchdog_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_WATCHDOG_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RX_WATCHDOG_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxicmp_error_frames.rs b/src/eth0/rxicmp_error_frames.rs index 0f8b6ea6..04f21d8f 100644 --- a/src/eth0/rxicmp_error_frames.rs +++ b/src/eth0/rxicmp_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXICMPERRFRM_R::new(self.bits) } } -#[doc = "RxICMP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxICMP Error Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXICMP_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RXICMP_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxicmp_error_octets.rs b/src/eth0/rxicmp_error_octets.rs index 697a1f3c..4c565bd6 100644 --- a/src/eth0/rxicmp_error_octets.rs +++ b/src/eth0/rxicmp_error_octets.rs @@ -9,7 +9,7 @@ impl R { RXICMPERROCT_R::new(self.bits) } } -#[doc = "Receive ICMP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive ICMP Error Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXICMP_ERROR_OCTETS_SPEC; impl crate::RegisterSpec for RXICMP_ERROR_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxicmp_good_frames.rs b/src/eth0/rxicmp_good_frames.rs index 350f656a..9f1ba080 100644 --- a/src/eth0/rxicmp_good_frames.rs +++ b/src/eth0/rxicmp_good_frames.rs @@ -9,7 +9,7 @@ impl R { RXICMPGDFRM_R::new(self.bits) } } -#[doc = "RxICMP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxICMP Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXICMP_GOOD_FRAMES_SPEC; impl crate::RegisterSpec for RXICMP_GOOD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxicmp_good_octets.rs b/src/eth0/rxicmp_good_octets.rs index 73ef7133..059901bb 100644 --- a/src/eth0/rxicmp_good_octets.rs +++ b/src/eth0/rxicmp_good_octets.rs @@ -9,7 +9,7 @@ impl R { RXICMPGDOCT_R::new(self.bits) } } -#[doc = "Receive ICMP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive ICMP Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxicmp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXICMP_GOOD_OCTETS_SPEC; impl crate::RegisterSpec for RXICMP_GOOD_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_fragmented_frames.rs b/src/eth0/rxipv4_fragmented_frames.rs index c27990aa..01d74d3b 100644 --- a/src/eth0/rxipv4_fragmented_frames.rs +++ b/src/eth0/rxipv4_fragmented_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV4FRAGFRM_R::new(self.bits) } } -#[doc = "Receive IPV4 Fragmented Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 Fragmented Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_fragmented_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_FRAGMENTED_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV4_FRAGMENTED_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_fragmented_octets.rs b/src/eth0/rxipv4_fragmented_octets.rs index adc385dd..fd0b1a49 100644 --- a/src/eth0/rxipv4_fragmented_octets.rs +++ b/src/eth0/rxipv4_fragmented_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV4FRAGOCT_R::new(self.bits) } } -#[doc = "Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_fragmented_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_FRAGMENTED_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV4_FRAGMENTED_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_good_frames.rs b/src/eth0/rxipv4_good_frames.rs index 96ee0303..066c83a0 100644 --- a/src/eth0/rxipv4_good_frames.rs +++ b/src/eth0/rxipv4_good_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV4GDFRM_R::new(self.bits) } } -#[doc = "RxIPv4 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxIPv4 Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_GOOD_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV4_GOOD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_good_octets.rs b/src/eth0/rxipv4_good_octets.rs index 0cb19e08..18117df2 100644 --- a/src/eth0/rxipv4_good_octets.rs +++ b/src/eth0/rxipv4_good_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV4GDOCT_R::new(self.bits) } } -#[doc = "RxIPv4 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxIPv4 Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_GOOD_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV4_GOOD_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_header_error_frames.rs b/src/eth0/rxipv4_header_error_frames.rs index cda4e729..04920a99 100644 --- a/src/eth0/rxipv4_header_error_frames.rs +++ b/src/eth0/rxipv4_header_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV4HDRERRFRM_R::new(self.bits) } } -#[doc = "Receive IPV4 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 Header Error Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_header_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_HEADER_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV4_HEADER_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_header_error_octets.rs b/src/eth0/rxipv4_header_error_octets.rs index c38fc1ab..65249c8c 100644 --- a/src/eth0/rxipv4_header_error_octets.rs +++ b/src/eth0/rxipv4_header_error_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV4HDRERROCT_R::new(self.bits) } } -#[doc = "Receive IPV4 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 Header Error Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_header_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_HEADER_ERROR_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV4_HEADER_ERROR_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_no_payload_frames.rs b/src/eth0/rxipv4_no_payload_frames.rs index 06a0129b..8d8c77cf 100644 --- a/src/eth0/rxipv4_no_payload_frames.rs +++ b/src/eth0/rxipv4_no_payload_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV4NOPAYFRM_R::new(self.bits) } } -#[doc = "Receive IPV4 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 No Payload Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_no_payload_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_NO_PAYLOAD_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV4_NO_PAYLOAD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_no_payload_octets.rs b/src/eth0/rxipv4_no_payload_octets.rs index 0805e8d5..8608ffb2 100644 --- a/src/eth0/rxipv4_no_payload_octets.rs +++ b/src/eth0/rxipv4_no_payload_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV4NOPAYOCT_R::new(self.bits) } } -#[doc = "Receive IPV4 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 No Payload Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_no_payload_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_NO_PAYLOAD_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV4_NO_PAYLOAD_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_udp_checksum_disable_octets.rs b/src/eth0/rxipv4_udp_checksum_disable_octets.rs index 8a563e1a..9b6ad882 100644 --- a/src/eth0/rxipv4_udp_checksum_disable_octets.rs +++ b/src/eth0/rxipv4_udp_checksum_disable_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV4UDSBLOCT_R::new(self.bits) } } -#[doc = "Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disable_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_udp_checksum_disable_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv4_udp_checksum_disabled_frames.rs b/src/eth0/rxipv4_udp_checksum_disabled_frames.rs index 56153397..d011136b 100644 --- a/src/eth0/rxipv4_udp_checksum_disabled_frames.rs +++ b/src/eth0/rxipv4_udp_checksum_disabled_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV4UDSBLFRM_R::new(self.bits) } } -#[doc = "Receive IPV4 UDP Checksum Disabled Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disabled_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV4 UDP Checksum Disabled Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv4_udp_checksum_disabled_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv6_good_frames.rs b/src/eth0/rxipv6_good_frames.rs index 6077c681..480b74f5 100644 --- a/src/eth0/rxipv6_good_frames.rs +++ b/src/eth0/rxipv6_good_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV6GDFRM_R::new(self.bits) } } -#[doc = "RxIPv6 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxIPv6 Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV6_GOOD_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV6_GOOD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv6_good_octets.rs b/src/eth0/rxipv6_good_octets.rs index 255f23ad..66dfbfe3 100644 --- a/src/eth0/rxipv6_good_octets.rs +++ b/src/eth0/rxipv6_good_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV6GDOCT_R::new(self.bits) } } -#[doc = "RxIPv6 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxIPv6 Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV6_GOOD_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV6_GOOD_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv6_header_error_frames.rs b/src/eth0/rxipv6_header_error_frames.rs index a5d1df7d..7f80937c 100644 --- a/src/eth0/rxipv6_header_error_frames.rs +++ b/src/eth0/rxipv6_header_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV6HDRERRFRM_R::new(self.bits) } } -#[doc = "Receive IPV6 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV6 Header Error Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_header_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV6_HEADER_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV6_HEADER_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv6_header_error_octets.rs b/src/eth0/rxipv6_header_error_octets.rs index 572058aa..cf5afad6 100644 --- a/src/eth0/rxipv6_header_error_octets.rs +++ b/src/eth0/rxipv6_header_error_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV6HDRERROCT_R::new(self.bits) } } -#[doc = "Receive IPV6 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV6 Header Error Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_header_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV6_HEADER_ERROR_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV6_HEADER_ERROR_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv6_no_payload_frames.rs b/src/eth0/rxipv6_no_payload_frames.rs index 7a3a694a..e1daf4c2 100644 --- a/src/eth0/rxipv6_no_payload_frames.rs +++ b/src/eth0/rxipv6_no_payload_frames.rs @@ -9,7 +9,7 @@ impl R { RXIPV6NOPAYFRM_R::new(self.bits) } } -#[doc = "Receive IPV6 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV6 No Payload Frame Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_no_payload_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV6_NO_PAYLOAD_FRAMES_SPEC; impl crate::RegisterSpec for RXIPV6_NO_PAYLOAD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxipv6_no_payload_octets.rs b/src/eth0/rxipv6_no_payload_octets.rs index 6165c522..f492e0ac 100644 --- a/src/eth0/rxipv6_no_payload_octets.rs +++ b/src/eth0/rxipv6_no_payload_octets.rs @@ -9,7 +9,7 @@ impl R { RXIPV6NOPAYOCT_R::new(self.bits) } } -#[doc = "Receive IPV6 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive IPV6 No Payload Octet Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxipv6_no_payload_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXIPV6_NO_PAYLOAD_OCTETS_SPEC; impl crate::RegisterSpec for RXIPV6_NO_PAYLOAD_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxtcp_error_frames.rs b/src/eth0/rxtcp_error_frames.rs index 906af0b7..41c2a873 100644 --- a/src/eth0/rxtcp_error_frames.rs +++ b/src/eth0/rxtcp_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXTCPERRFRM_R::new(self.bits) } } -#[doc = "RxTCP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxTCP Error Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXTCP_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RXTCP_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxtcp_error_octets.rs b/src/eth0/rxtcp_error_octets.rs index 9f067968..baddcc28 100644 --- a/src/eth0/rxtcp_error_octets.rs +++ b/src/eth0/rxtcp_error_octets.rs @@ -9,7 +9,7 @@ impl R { RXTCPERROCT_R::new(self.bits) } } -#[doc = "Receive TCP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive TCP Error Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXTCP_ERROR_OCTETS_SPEC; impl crate::RegisterSpec for RXTCP_ERROR_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxtcp_good_frames.rs b/src/eth0/rxtcp_good_frames.rs index 556ff979..08165277 100644 --- a/src/eth0/rxtcp_good_frames.rs +++ b/src/eth0/rxtcp_good_frames.rs @@ -9,7 +9,7 @@ impl R { RXTCPGDFRM_R::new(self.bits) } } -#[doc = "RxTCP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxTCP Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXTCP_GOOD_FRAMES_SPEC; impl crate::RegisterSpec for RXTCP_GOOD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxtcp_good_octets.rs b/src/eth0/rxtcp_good_octets.rs index eb8a5e1c..bfd4167d 100644 --- a/src/eth0/rxtcp_good_octets.rs +++ b/src/eth0/rxtcp_good_octets.rs @@ -9,7 +9,7 @@ impl R { RXTCPGDOCT_R::new(self.bits) } } -#[doc = "Receive TCP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive TCP Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxtcp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXTCP_GOOD_OCTETS_SPEC; impl crate::RegisterSpec for RXTCP_GOOD_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxudp_error_frames.rs b/src/eth0/rxudp_error_frames.rs index 5d15bbaf..e33851b5 100644 --- a/src/eth0/rxudp_error_frames.rs +++ b/src/eth0/rxudp_error_frames.rs @@ -9,7 +9,7 @@ impl R { RXUDPERRFRM_R::new(self.bits) } } -#[doc = "RxUDP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxUDP Error Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXUDP_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for RXUDP_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxudp_error_octets.rs b/src/eth0/rxudp_error_octets.rs index 80be3ba4..2d35d290 100644 --- a/src/eth0/rxudp_error_octets.rs +++ b/src/eth0/rxudp_error_octets.rs @@ -9,7 +9,7 @@ impl R { RXUDPERROCT_R::new(self.bits) } } -#[doc = "Receive UDP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive UDP Error Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXUDP_ERROR_OCTETS_SPEC; impl crate::RegisterSpec for RXUDP_ERROR_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/rxudp_good_frames.rs b/src/eth0/rxudp_good_frames.rs index d796052e..134369cb 100644 --- a/src/eth0/rxudp_good_frames.rs +++ b/src/eth0/rxudp_good_frames.rs @@ -9,7 +9,7 @@ impl R { RXUDPGDFRM_R::new(self.bits) } } -#[doc = "RxUDP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RxUDP Good Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXUDP_GOOD_FRAMES_SPEC; impl crate::RegisterSpec for RXUDP_GOOD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/rxudp_good_octets.rs b/src/eth0/rxudp_good_octets.rs index 52798b60..c3fb0798 100644 --- a/src/eth0/rxudp_good_octets.rs +++ b/src/eth0/rxudp_good_octets.rs @@ -9,7 +9,7 @@ impl R { RXUDPGDOCT_R::new(self.bits) } } -#[doc = "Receive UDP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive UDP Good Octets Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxudp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXUDP_GOOD_OCTETS_SPEC; impl crate::RegisterSpec for RXUDP_GOOD_OCTETS_SPEC { type Ux = u32; diff --git a/src/eth0/status.rs b/src/eth0/status.rs index b721cec6..f4e25529 100644 --- a/src/eth0/status.rs +++ b/src/eth0/status.rs @@ -273,7 +273,7 @@ impl W { NIS_W::new(self, 16) } } -#[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STATUS_SPEC; impl crate::RegisterSpec for STATUS_SPEC { type Ux = u32; diff --git a/src/eth0/sub_second_increment.rs b/src/eth0/sub_second_increment.rs index bfba2603..cf303662 100644 --- a/src/eth0/sub_second_increment.rs +++ b/src/eth0/sub_second_increment.rs @@ -21,7 +21,7 @@ impl W { SSINC_W::new(self, 0) } } -#[doc = "Sub-Second Increment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sub_second_increment::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sub_second_increment::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Sub-Second Increment Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sub_second_increment::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sub_second_increment::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SUB_SECOND_INCREMENT_SPEC; impl crate::RegisterSpec for SUB_SECOND_INCREMENT_SPEC { type Ux = u32; diff --git a/src/eth0/system_time_higher_word_seconds.rs b/src/eth0/system_time_higher_word_seconds.rs index 3b15d164..c9ba350a 100644 --- a/src/eth0/system_time_higher_word_seconds.rs +++ b/src/eth0/system_time_higher_word_seconds.rs @@ -21,7 +21,7 @@ impl W { TSHWR_W::new(self, 0) } } -#[doc = "System Time - Higher Word Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_higher_word_seconds::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_higher_word_seconds::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Time - Higher Word Seconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_higher_word_seconds::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_time_higher_word_seconds::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYSTEM_TIME_HIGHER_WORD_SECONDS_SPEC; impl crate::RegisterSpec for SYSTEM_TIME_HIGHER_WORD_SECONDS_SPEC { type Ux = u32; diff --git a/src/eth0/system_time_nanoseconds.rs b/src/eth0/system_time_nanoseconds.rs index 51f868eb..59683ecc 100644 --- a/src/eth0/system_time_nanoseconds.rs +++ b/src/eth0/system_time_nanoseconds.rs @@ -9,7 +9,7 @@ impl R { TSSS_R::new(self.bits & 0x7fff_ffff) } } -#[doc = "System Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Time Nanoseconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_nanoseconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYSTEM_TIME_NANOSECONDS_SPEC; impl crate::RegisterSpec for SYSTEM_TIME_NANOSECONDS_SPEC { type Ux = u32; diff --git a/src/eth0/system_time_nanoseconds_update.rs b/src/eth0/system_time_nanoseconds_update.rs index 5a0233e5..94e91cfe 100644 --- a/src/eth0/system_time_nanoseconds_update.rs +++ b/src/eth0/system_time_nanoseconds_update.rs @@ -36,7 +36,7 @@ impl W { ADDSUB_W::new(self, 31) } } -#[doc = "System Time Nanoseconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds_update::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_nanoseconds_update::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Time Nanoseconds Update Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_nanoseconds_update::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_time_nanoseconds_update::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYSTEM_TIME_NANOSECONDS_UPDATE_SPEC; impl crate::RegisterSpec for SYSTEM_TIME_NANOSECONDS_UPDATE_SPEC { type Ux = u32; diff --git a/src/eth0/system_time_seconds.rs b/src/eth0/system_time_seconds.rs index 7691823b..cc90ea4f 100644 --- a/src/eth0/system_time_seconds.rs +++ b/src/eth0/system_time_seconds.rs @@ -9,7 +9,7 @@ impl R { TSS_R::new(self.bits) } } -#[doc = "System Time - Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Time - Seconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_seconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYSTEM_TIME_SECONDS_SPEC; impl crate::RegisterSpec for SYSTEM_TIME_SECONDS_SPEC { type Ux = u32; diff --git a/src/eth0/system_time_seconds_update.rs b/src/eth0/system_time_seconds_update.rs index 2a93691b..bc6b2787 100644 --- a/src/eth0/system_time_seconds_update.rs +++ b/src/eth0/system_time_seconds_update.rs @@ -21,7 +21,7 @@ impl W { TSS_W::new(self, 0) } } -#[doc = "System Time - Seconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds_update::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_seconds_update::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Time - Seconds Update Register\n\nYou can [`read`](crate::Reg::read) this register and get [`system_time_seconds_update::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`system_time_seconds_update::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYSTEM_TIME_SECONDS_UPDATE_SPEC; impl crate::RegisterSpec for SYSTEM_TIME_SECONDS_UPDATE_SPEC { type Ux = u32; diff --git a/src/eth0/target_time_nanoseconds.rs b/src/eth0/target_time_nanoseconds.rs index 63d4055a..4ba53bbb 100644 --- a/src/eth0/target_time_nanoseconds.rs +++ b/src/eth0/target_time_nanoseconds.rs @@ -28,7 +28,7 @@ impl W { TTSLO_W::new(self, 0) } } -#[doc = "Target Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nanoseconds::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nanoseconds::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Target Time Nanoseconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_nanoseconds::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_nanoseconds::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TARGET_TIME_NANOSECONDS_SPEC; impl crate::RegisterSpec for TARGET_TIME_NANOSECONDS_SPEC { type Ux = u32; diff --git a/src/eth0/target_time_seconds.rs b/src/eth0/target_time_seconds.rs index e55d3ff2..9587b437 100644 --- a/src/eth0/target_time_seconds.rs +++ b/src/eth0/target_time_seconds.rs @@ -21,7 +21,7 @@ impl W { TSTR_W::new(self, 0) } } -#[doc = "Target Time Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_seconds::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_seconds::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Target Time Seconds Register\n\nYou can [`read`](crate::Reg::read) this register and get [`target_time_seconds::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_time_seconds::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TARGET_TIME_SECONDS_SPEC; impl crate::RegisterSpec for TARGET_TIME_SECONDS_SPEC { type Ux = u32; diff --git a/src/eth0/timestamp_addend.rs b/src/eth0/timestamp_addend.rs index 7bc8815a..dd352763 100644 --- a/src/eth0/timestamp_addend.rs +++ b/src/eth0/timestamp_addend.rs @@ -21,7 +21,7 @@ impl W { TSAR_W::new(self, 0) } } -#[doc = "Timestamp Addend Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_addend::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_addend::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timestamp Addend Register\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_addend::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_addend::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIMESTAMP_ADDEND_SPEC; impl crate::RegisterSpec for TIMESTAMP_ADDEND_SPEC { type Ux = u32; diff --git a/src/eth0/timestamp_control.rs b/src/eth0/timestamp_control.rs index 4749f272..a6deaefa 100644 --- a/src/eth0/timestamp_control.rs +++ b/src/eth0/timestamp_control.rs @@ -246,7 +246,7 @@ impl W { TSENMACADDR_W::new(self, 18) } } -#[doc = "Timestamp Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timestamp Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_control::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timestamp_control::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIMESTAMP_CONTROL_SPEC; impl crate::RegisterSpec for TIMESTAMP_CONTROL_SPEC { type Ux = u32; diff --git a/src/eth0/timestamp_status.rs b/src/eth0/timestamp_status.rs index f0a13bcd..47a48af4 100644 --- a/src/eth0/timestamp_status.rs +++ b/src/eth0/timestamp_status.rs @@ -65,7 +65,7 @@ impl R { TSTRGTERR3_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "Timestamp Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Timestamp Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`timestamp_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIMESTAMP_STATUS_SPEC; impl crate::RegisterSpec for TIMESTAMP_STATUS_SPEC { type Ux = u32; diff --git a/src/eth0/transmit_descriptor_list_address.rs b/src/eth0/transmit_descriptor_list_address.rs index f1f0022f..eb6676ce 100644 --- a/src/eth0/transmit_descriptor_list_address.rs +++ b/src/eth0/transmit_descriptor_list_address.rs @@ -21,7 +21,7 @@ impl W { TDESLA_32BIT_W::new(self, 2) } } -#[doc = "Transmit descripter Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_descriptor_list_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_descriptor_list_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit descripter Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`transmit_descriptor_list_address::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`transmit_descriptor_list_address::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRANSMIT_DESCRIPTOR_LIST_ADDRESS_SPEC; impl crate::RegisterSpec for TRANSMIT_DESCRIPTOR_LIST_ADDRESS_SPEC { type Ux = u32; diff --git a/src/eth0/transmit_poll_demand.rs b/src/eth0/transmit_poll_demand.rs index 8fc34846..d8a0684f 100644 --- a/src/eth0/transmit_poll_demand.rs +++ b/src/eth0/transmit_poll_demand.rs @@ -21,7 +21,7 @@ impl W { TPD_W::new(self, 0) } } -#[doc = "Transmit Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_poll_demand::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Poll Demand Register\n\nYou can [`read`](crate::Reg::read) this register and get [`transmit_poll_demand::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`transmit_poll_demand::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRANSMIT_POLL_DEMAND_SPEC; impl crate::RegisterSpec for TRANSMIT_POLL_DEMAND_SPEC { type Ux = u32; diff --git a/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs b/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs index cf970e8e..29abaea5 100644 --- a/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs +++ b/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TX1024_MAXOCTGB_R::new(self.bits) } } -#[doc = "Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_1024tomaxoctets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_1024tomaxoctets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_128to255octets_frames_good_bad.rs b/src/eth0/tx_128to255octets_frames_good_bad.rs index b10a3abd..16963f33 100644 --- a/src/eth0/tx_128to255octets_frames_good_bad.rs +++ b/src/eth0/tx_128to255octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TX128_255OCTGB_R::new(self.bits) } } -#[doc = "Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_128to255octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_128to255octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_256to511octets_frames_good_bad.rs b/src/eth0/tx_256to511octets_frames_good_bad.rs index b7933cba..6ff901fa 100644 --- a/src/eth0/tx_256to511octets_frames_good_bad.rs +++ b/src/eth0/tx_256to511octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TX256_511OCTGB_R::new(self.bits) } } -#[doc = "Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_256to511octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_256to511octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_512to1023octets_frames_good_bad.rs b/src/eth0/tx_512to1023octets_frames_good_bad.rs index 4e0e16a0..ec227726 100644 --- a/src/eth0/tx_512to1023octets_frames_good_bad.rs +++ b/src/eth0/tx_512to1023octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TX512_1023OCTGB_R::new(self.bits) } } -#[doc = "Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_512to1023octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_512to1023octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_64octets_frames_good_bad.rs b/src/eth0/tx_64octets_frames_good_bad.rs index f09504a6..dcac7b73 100644 --- a/src/eth0/tx_64octets_frames_good_bad.rs +++ b/src/eth0/tx_64octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TX64OCTGB_R::new(self.bits) } } -#[doc = "Transmit Octet Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_64octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Octet Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_64octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_64OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_64OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_65to127octets_frames_good_bad.rs b/src/eth0/tx_65to127octets_frames_good_bad.rs index 299775cd..6d713ffa 100644 --- a/src/eth0/tx_65to127octets_frames_good_bad.rs +++ b/src/eth0/tx_65to127octets_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TX65_127OCTGB_R::new(self.bits) } } -#[doc = "Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_65to127octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_65to127octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_broadcast_frames_good.rs b/src/eth0/tx_broadcast_frames_good.rs index bdd715db..9c00cbf6 100644 --- a/src/eth0/tx_broadcast_frames_good.rs +++ b/src/eth0/tx_broadcast_frames_good.rs @@ -9,7 +9,7 @@ impl R { TXBCASTG_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_broadcast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_BROADCAST_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for TX_BROADCAST_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_broadcast_frames_good_bad.rs b/src/eth0/tx_broadcast_frames_good_bad.rs index 4916f5e7..f294a549 100644 --- a/src/eth0/tx_broadcast_frames_good_bad.rs +++ b/src/eth0/tx_broadcast_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TXBCASTGB_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good and Bad Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good and Bad Broadcast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_broadcast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_BROADCAST_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_BROADCAST_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_carrier_error_frames.rs b/src/eth0/tx_carrier_error_frames.rs index 934056d3..50afc8f2 100644 --- a/src/eth0/tx_carrier_error_frames.rs +++ b/src/eth0/tx_carrier_error_frames.rs @@ -9,7 +9,7 @@ impl R { TXCARR_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Carrier Sense Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_carrier_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Carrier Sense Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_carrier_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_CARRIER_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for TX_CARRIER_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_deferred_frames.rs b/src/eth0/tx_deferred_frames.rs index cebc6757..8c6e98c3 100644 --- a/src/eth0/tx_deferred_frames.rs +++ b/src/eth0/tx_deferred_frames.rs @@ -9,7 +9,7 @@ impl R { TXDEFRD_R::new(self.bits) } } -#[doc = "Tx Deferred Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_deferred_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Tx Deferred Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_deferred_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_DEFERRED_FRAMES_SPEC; impl crate::RegisterSpec for TX_DEFERRED_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_excessive_collision_frames.rs b/src/eth0/tx_excessive_collision_frames.rs index abedf48f..e616cfab 100644 --- a/src/eth0/tx_excessive_collision_frames.rs +++ b/src/eth0/tx_excessive_collision_frames.rs @@ -9,7 +9,7 @@ impl R { TXEXSCOL_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Excessive Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_collision_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Excessive Collision Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_excessive_collision_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_EXCESSIVE_COLLISION_FRAMES_SPEC; impl crate::RegisterSpec for TX_EXCESSIVE_COLLISION_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_excessive_deferral_error.rs b/src/eth0/tx_excessive_deferral_error.rs index fafc9a38..8fc2e217 100644 --- a/src/eth0/tx_excessive_deferral_error.rs +++ b/src/eth0/tx_excessive_deferral_error.rs @@ -9,7 +9,7 @@ impl R { TXEXSDEF_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Excessive Deferral Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_deferral_error::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Excessive Deferral Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_excessive_deferral_error::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_EXCESSIVE_DEFERRAL_ERROR_SPEC; impl crate::RegisterSpec for TX_EXCESSIVE_DEFERRAL_ERROR_SPEC { type Ux = u32; diff --git a/src/eth0/tx_frame_count_good.rs b/src/eth0/tx_frame_count_good.rs index c6237f94..c31bc17d 100644 --- a/src/eth0/tx_frame_count_good.rs +++ b/src/eth0/tx_frame_count_good.rs @@ -9,7 +9,7 @@ impl R { TXFRMG_R::new(self.bits) } } -#[doc = "Tx Frame Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Tx Frame Count Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_frame_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_FRAME_COUNT_GOOD_SPEC; impl crate::RegisterSpec for TX_FRAME_COUNT_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_frame_count_good_bad.rs b/src/eth0/tx_frame_count_good_bad.rs index a8be5001..1e41800d 100644 --- a/src/eth0/tx_frame_count_good_bad.rs +++ b/src/eth0/tx_frame_count_good_bad.rs @@ -9,7 +9,7 @@ impl R { TXFRMGB_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Goodand Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Goodand Bad Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_frame_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_FRAME_COUNT_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_FRAME_COUNT_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_late_collision_frames.rs b/src/eth0/tx_late_collision_frames.rs index e804cb84..e9e0d9b9 100644 --- a/src/eth0/tx_late_collision_frames.rs +++ b/src/eth0/tx_late_collision_frames.rs @@ -9,7 +9,7 @@ impl R { TXLATECOL_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Late Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_late_collision_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Late Collision Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_late_collision_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_LATE_COLLISION_FRAMES_SPEC; impl crate::RegisterSpec for TX_LATE_COLLISION_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_multicast_frames_good.rs b/src/eth0/tx_multicast_frames_good.rs index 33c7bc3d..9bd958e2 100644 --- a/src/eth0/tx_multicast_frames_good.rs +++ b/src/eth0/tx_multicast_frames_good.rs @@ -9,7 +9,7 @@ impl R { TXMCASTG_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_multicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_MULTICAST_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for TX_MULTICAST_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_multicast_frames_good_bad.rs b/src/eth0/tx_multicast_frames_good_bad.rs index 3f66ef24..f2706f15 100644 --- a/src/eth0/tx_multicast_frames_good_bad.rs +++ b/src/eth0/tx_multicast_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TXMCASTGB_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good and Bad Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good and Bad Multicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_multicast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_MULTICAST_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_MULTICAST_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_multiple_collision_good_frames.rs b/src/eth0/tx_multiple_collision_good_frames.rs index bfe4a438..cd91b71b 100644 --- a/src/eth0/tx_multiple_collision_good_frames.rs +++ b/src/eth0/tx_multiple_collision_good_frames.rs @@ -9,7 +9,7 @@ impl R { TXMULTCOLG_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Frames Transmitted after Multiple Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multiple_collision_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Frames Transmitted after Multiple Collision\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_multiple_collision_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_MULTIPLE_COLLISION_GOOD_FRAMES_SPEC; impl crate::RegisterSpec for TX_MULTIPLE_COLLISION_GOOD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_octet_count_good.rs b/src/eth0/tx_octet_count_good.rs index 1478b24d..a90641af 100644 --- a/src/eth0/tx_octet_count_good.rs +++ b/src/eth0/tx_octet_count_good.rs @@ -9,7 +9,7 @@ impl R { TXOCTG_R::new(self.bits) } } -#[doc = "Tx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Tx Octet Count Good Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_octet_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_OCTET_COUNT_GOOD_SPEC; impl crate::RegisterSpec for TX_OCTET_COUNT_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_octet_count_good_bad.rs b/src/eth0/tx_octet_count_good_bad.rs index cba1085e..557b65b9 100644 --- a/src/eth0/tx_octet_count_good_bad.rs +++ b/src/eth0/tx_octet_count_good_bad.rs @@ -9,7 +9,7 @@ impl R { TXOCTGB_R::new(self.bits) } } -#[doc = "Transmit Octet Count for Good and Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Octet Count for Good and Bad Frames Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_octet_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_OCTET_COUNT_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_OCTET_COUNT_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_osize_frames_good.rs b/src/eth0/tx_osize_frames_good.rs index 111f2568..732571be 100644 --- a/src/eth0/tx_osize_frames_good.rs +++ b/src/eth0/tx_osize_frames_good.rs @@ -9,7 +9,7 @@ impl R { TXOSIZG_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good Oversize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_osize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good Oversize Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_osize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_OSIZE_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for TX_OSIZE_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_pause_frames.rs b/src/eth0/tx_pause_frames.rs index a22d49bc..ee7de78a 100644 --- a/src/eth0/tx_pause_frames.rs +++ b/src/eth0/tx_pause_frames.rs @@ -9,7 +9,7 @@ impl R { TXPAUSE_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_pause_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good PAUSE Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_pause_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_PAUSE_FRAMES_SPEC; impl crate::RegisterSpec for TX_PAUSE_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_single_collision_good_frames.rs b/src/eth0/tx_single_collision_good_frames.rs index ef1e763e..efe269f6 100644 --- a/src/eth0/tx_single_collision_good_frames.rs +++ b/src/eth0/tx_single_collision_good_frames.rs @@ -9,7 +9,7 @@ impl R { TXSNGLCOLG_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Frames Transmitted after Single Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_single_collision_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Frames Transmitted after Single Collision\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_single_collision_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_SINGLE_COLLISION_GOOD_FRAMES_SPEC; impl crate::RegisterSpec for TX_SINGLE_COLLISION_GOOD_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_underflow_error_frames.rs b/src/eth0/tx_underflow_error_frames.rs index 93e55ac9..b76718f9 100644 --- a/src/eth0/tx_underflow_error_frames.rs +++ b/src/eth0/tx_underflow_error_frames.rs @@ -9,7 +9,7 @@ impl R { TXUNDRFLW_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Underflow Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_underflow_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Underflow Error Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_underflow_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_UNDERFLOW_ERROR_FRAMES_SPEC; impl crate::RegisterSpec for TX_UNDERFLOW_ERROR_FRAMES_SPEC { type Ux = u32; diff --git a/src/eth0/tx_unicast_frames_good_bad.rs b/src/eth0/tx_unicast_frames_good_bad.rs index ca67a94e..6b9a3f03 100644 --- a/src/eth0/tx_unicast_frames_good_bad.rs +++ b/src/eth0/tx_unicast_frames_good_bad.rs @@ -9,7 +9,7 @@ impl R { TXUCASTGB_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good and Bad Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_unicast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good and Bad Unicast Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_unicast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_UNICAST_FRAMES_GOOD_BAD_SPEC; impl crate::RegisterSpec for TX_UNICAST_FRAMES_GOOD_BAD_SPEC { type Ux = u32; diff --git a/src/eth0/tx_vlan_frames_good.rs b/src/eth0/tx_vlan_frames_good.rs index e092e4a0..e5dfa074 100644 --- a/src/eth0/tx_vlan_frames_good.rs +++ b/src/eth0/tx_vlan_frames_good.rs @@ -9,7 +9,7 @@ impl R { TXVLANG_R::new(self.bits) } } -#[doc = "Transmit Frame Count for Good VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_vlan_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Frame Count for Good VLAN Frames\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_vlan_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_VLAN_FRAMES_GOOD_SPEC; impl crate::RegisterSpec for TX_VLAN_FRAMES_GOOD_SPEC { type Ux = u32; diff --git a/src/eth0/version.rs b/src/eth0/version.rs index b3e2943e..792e22dd 100644 --- a/src/eth0/version.rs +++ b/src/eth0/version.rs @@ -16,7 +16,7 @@ impl R { USERVER_R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "Version Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Version Register\n\nYou can [`read`](crate::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct VERSION_SPEC; impl crate::RegisterSpec for VERSION_SPEC { type Ux = u32; diff --git a/src/eth0/vlan_tag.rs b/src/eth0/vlan_tag.rs index c91038bf..0e738037 100644 --- a/src/eth0/vlan_tag.rs +++ b/src/eth0/vlan_tag.rs @@ -73,7 +73,7 @@ impl W { ESVL_W::new(self, 18) } } -#[doc = "VLAN Tag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_tag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_tag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "VLAN Tag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vlan_tag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vlan_tag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct VLAN_TAG_SPEC; impl crate::RegisterSpec for VLAN_TAG_SPEC { type Ux = u32; diff --git a/src/eth0_con.rs b/src/eth0_con.rs index af267b1e..76e52886 100644 --- a/src/eth0_con.rs +++ b/src/eth0_con.rs @@ -10,7 +10,7 @@ impl RegisterBlock { &self.eth0_con } } -#[doc = "ETH0_CON (rw) register accessor: Ethernet 0 Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eth0_con::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eth0_con::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eth0_con`] +#[doc = "ETH0_CON (rw) register accessor: Ethernet 0 Port Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`eth0_con::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eth0_con::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eth0_con`] module"] pub type ETH0_CON = crate::Reg; #[doc = "Ethernet 0 Port Control Register"] diff --git a/src/eth0_con/eth0_con.rs b/src/eth0_con/eth0_con.rs index fc8861af..7014dc8c 100644 --- a/src/eth0_con/eth0_con.rs +++ b/src/eth0_con/eth0_con.rs @@ -1137,7 +1137,7 @@ impl W { INFSEL_W::new(self, 26) } } -#[doc = "Ethernet 0 Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eth0_con::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eth0_con::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Ethernet 0 Port Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`eth0_con::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eth0_con::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ETH0_CON_SPEC; impl crate::RegisterSpec for ETH0_CON_SPEC { type Ux = u32; diff --git a/src/fce.rs b/src/fce.rs index 45bdd5fd..de051360 100644 --- a/src/fce.rs +++ b/src/fce.rs @@ -17,12 +17,12 @@ impl RegisterBlock { &self.id } } -#[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] +#[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] pub type CLC = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; -#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Module Identification Register"] diff --git a/src/fce/clc.rs b/src/fce/clc.rs index 0baf3615..9cdb8ac7 100644 --- a/src/fce/clc.rs +++ b/src/fce/clc.rs @@ -28,7 +28,7 @@ impl W { DISR_W::new(self, 0) } } -#[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLC_SPEC; impl crate::RegisterSpec for CLC_SPEC { type Ux = u32; diff --git a/src/fce/id.rs b/src/fce/id.rs index f575170f..d63382f6 100644 --- a/src/fce/id.rs +++ b/src/fce/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/fce_ke0.rs b/src/fce_ke0.rs index 356495fc..56799088 100644 --- a/src/fce_ke0.rs +++ b/src/fce_ke0.rs @@ -52,41 +52,42 @@ impl RegisterBlock { &self.ctr } } -#[doc = "IR (rw) register accessor: Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ir::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ir::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ir`] +#[doc = "IR (rw) register accessor: Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ir::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ir::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ir`] module"] pub type IR = crate::Reg; #[doc = "Input Register"] pub mod ir; -#[doc = "RES (r) register accessor: CRC Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res`] +#[doc = "RES (r) register accessor: CRC Result Register\n\nYou can [`read`](crate::Reg::read) this register and get [`res::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res`] module"] pub type RES = crate::Reg; #[doc = "CRC Result Register"] pub mod res; -#[doc = "CFG (rw) register accessor: CRC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CFG (rw) register accessor: CRC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`] +module"] pub type CFG = crate::Reg; #[doc = "CRC Configuration Register"] pub mod cfg; -#[doc = "STS (rw) register accessor: CRC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] +#[doc = "STS (rw) register accessor: CRC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] module"] pub type STS = crate::Reg; #[doc = "CRC Status Register"] pub mod sts; -#[doc = "LENGTH (rw) register accessor: CRC Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`length::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`length::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@length`] +#[doc = "LENGTH (rw) register accessor: CRC Length Register\n\nYou can [`read`](crate::Reg::read) this register and get [`length::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`length::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@length`] module"] pub type LENGTH = crate::Reg; #[doc = "CRC Length Register"] pub mod length; -#[doc = "CHECK (rw) register accessor: CRC Check Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`check::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`check::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@check`] +#[doc = "CHECK (rw) register accessor: CRC Check Register\n\nYou can [`read`](crate::Reg::read) this register and get [`check::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`check::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@check`] module"] pub type CHECK = crate::Reg; #[doc = "CRC Check Register"] pub mod check; -#[doc = "CRC (rw) register accessor: CRC Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crc`] +#[doc = "CRC (rw) register accessor: CRC Register\n\nYou can [`read`](crate::Reg::read) this register and get [`crc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crc`] module"] pub type CRC = crate::Reg; #[doc = "CRC Register"] pub mod crc; -#[doc = "CTR (rw) register accessor: CRC Test Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] +#[doc = "CTR (rw) register accessor: CRC Test Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] pub type CTR = crate::Reg; #[doc = "CRC Test Register"] diff --git a/src/fce_ke0/cfg.rs b/src/fce_ke0/cfg.rs index 948f0f0b..e2778c60 100644 --- a/src/fce_ke0/cfg.rs +++ b/src/fce_ke0/cfg.rs @@ -582,7 +582,7 @@ impl W { XSEL_W::new(self, 10) } } -#[doc = "CRC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CRC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; diff --git a/src/fce_ke0/check.rs b/src/fce_ke0/check.rs index 6b484ebb..c25f786f 100644 --- a/src/fce_ke0/check.rs +++ b/src/fce_ke0/check.rs @@ -21,7 +21,7 @@ impl W { CHECK_W::new(self, 0) } } -#[doc = "CRC Check Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`check::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`check::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CRC Check Register\n\nYou can [`read`](crate::Reg::read) this register and get [`check::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`check::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CHECK_SPEC; impl crate::RegisterSpec for CHECK_SPEC { type Ux = u32; diff --git a/src/fce_ke0/crc.rs b/src/fce_ke0/crc.rs index 22fabadb..5480390a 100644 --- a/src/fce_ke0/crc.rs +++ b/src/fce_ke0/crc.rs @@ -21,7 +21,7 @@ impl W { CRC_W::new(self, 0) } } -#[doc = "CRC Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CRC Register\n\nYou can [`read`](crate::Reg::read) this register and get [`crc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CRC_SPEC; impl crate::RegisterSpec for CRC_SPEC { type Ux = u32; diff --git a/src/fce_ke0/ctr.rs b/src/fce_ke0/ctr.rs index 5597415c..a7bbcb73 100644 --- a/src/fce_ke0/ctr.rs +++ b/src/fce_ke0/ctr.rs @@ -51,7 +51,7 @@ impl W { FRM_CHECK_W::new(self, 2) } } -#[doc = "CRC Test Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CRC Test Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CTR_SPEC; impl crate::RegisterSpec for CTR_SPEC { type Ux = u32; diff --git a/src/fce_ke0/ir.rs b/src/fce_ke0/ir.rs index 010e034f..2fb540aa 100644 --- a/src/fce_ke0/ir.rs +++ b/src/fce_ke0/ir.rs @@ -21,7 +21,7 @@ impl W { IR_W::new(self, 0) } } -#[doc = "Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ir::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ir::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ir::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ir::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IR_SPEC; impl crate::RegisterSpec for IR_SPEC { type Ux = u32; diff --git a/src/fce_ke0/length.rs b/src/fce_ke0/length.rs index 827655bc..636ee919 100644 --- a/src/fce_ke0/length.rs +++ b/src/fce_ke0/length.rs @@ -21,7 +21,7 @@ impl W { LENGTH_W::new(self, 0) } } -#[doc = "CRC Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`length::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`length::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CRC Length Register\n\nYou can [`read`](crate::Reg::read) this register and get [`length::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`length::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LENGTH_SPEC; impl crate::RegisterSpec for LENGTH_SPEC { type Ux = u32; diff --git a/src/fce_ke0/res.rs b/src/fce_ke0/res.rs index f673a85c..4c49d567 100644 --- a/src/fce_ke0/res.rs +++ b/src/fce_ke0/res.rs @@ -9,7 +9,7 @@ impl R { RES_R::new(self.bits) } } -#[doc = "CRC Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CRC Result Register\n\nYou can [`read`](crate::Reg::read) this register and get [`res::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RES_SPEC; impl crate::RegisterSpec for RES_SPEC { type Ux = u32; diff --git a/src/fce_ke0/sts.rs b/src/fce_ke0/sts.rs index 1af113e3..08894209 100644 --- a/src/fce_ke0/sts.rs +++ b/src/fce_ke0/sts.rs @@ -66,7 +66,7 @@ impl W { BEF_W::new(self, 3) } } -#[doc = "CRC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CRC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STS_SPEC; impl crate::RegisterSpec for STS_SPEC { type Ux = u32; diff --git a/src/flash0.rs b/src/flash0.rs index 773782c6..fd437849 100644 --- a/src/flash0.rs +++ b/src/flash0.rs @@ -49,37 +49,37 @@ impl RegisterBlock { &self.procon2 } } -#[doc = "ID (r) register accessor: Flash Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Flash Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Flash Module Identification Register"] pub mod id; -#[doc = "FSR (r) register accessor: Flash Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsr`] +#[doc = "FSR (r) register accessor: Flash Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsr`] module"] pub type FSR = crate::Reg; #[doc = "Flash Status Register"] pub mod fsr; -#[doc = "FCON (rw) register accessor: Flash Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcon`] +#[doc = "FCON (rw) register accessor: Flash Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fcon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcon`] module"] pub type FCON = crate::Reg; #[doc = "Flash Configuration Register"] pub mod fcon; -#[doc = "MARP (rw) register accessor: Margin Control Register PFLASH\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`marp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`marp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@marp`] +#[doc = "MARP (rw) register accessor: Margin Control Register PFLASH\n\nYou can [`read`](crate::Reg::read) this register and get [`marp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`marp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@marp`] module"] pub type MARP = crate::Reg; #[doc = "Margin Control Register PFLASH"] pub mod marp; -#[doc = "PROCON0 (r) register accessor: Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon0`] +#[doc = "PROCON0 (r) register accessor: Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::Reg::read) this register and get [`procon0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon0`] module"] pub type PROCON0 = crate::Reg; #[doc = "Flash Protection Configuration Register User 0"] pub mod procon0; -#[doc = "PROCON1 (r) register accessor: Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon1`] +#[doc = "PROCON1 (r) register accessor: Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::Reg::read) this register and get [`procon1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon1`] module"] pub type PROCON1 = crate::Reg; #[doc = "Flash Protection Configuration Register User 1"] pub mod procon1; -#[doc = "PROCON2 (r) register accessor: Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon2`] +#[doc = "PROCON2 (r) register accessor: Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::Reg::read) this register and get [`procon2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon2`] module"] pub type PROCON2 = crate::Reg; #[doc = "Flash Protection Configuration Register User 2"] diff --git a/src/flash0/fcon.rs b/src/flash0/fcon.rs index 1325dc4c..ced6d3ff 100644 --- a/src/flash0/fcon.rs +++ b/src/flash0/fcon.rs @@ -925,7 +925,7 @@ impl W { EOBM_W::new(self, 31) } } -#[doc = "Flash Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flash Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fcon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FCON_SPEC; impl crate::RegisterSpec for FCON_SPEC { type Ux = u32; diff --git a/src/flash0/fsr.rs b/src/flash0/fsr.rs index db79d429..f30daac9 100644 --- a/src/flash0/fsr.rs +++ b/src/flash0/fsr.rs @@ -788,7 +788,7 @@ impl R { VER_R::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Flash Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flash Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FSR_SPEC; impl crate::RegisterSpec for FSR_SPEC { type Ux = u32; diff --git a/src/flash0/id.rs b/src/flash0/id.rs index 675ef15d..b0aff3ea 100644 --- a/src/flash0/id.rs +++ b/src/flash0/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Flash Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flash Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/flash0/marp.rs b/src/flash0/marp.rs index f2476c99..40a6dc40 100644 --- a/src/flash0/marp.rs +++ b/src/flash0/marp.rs @@ -154,7 +154,7 @@ impl W { TRAPDIS_W::new(self, 15) } } -#[doc = "Margin Control Register PFLASH\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`marp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`marp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Margin Control Register PFLASH\n\nYou can [`read`](crate::Reg::read) this register and get [`marp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`marp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MARP_SPEC; impl crate::RegisterSpec for MARP_SPEC { type Ux = u32; diff --git a/src/flash0/procon0.rs b/src/flash0/procon0.rs index 4c3093a5..bb9ea8b1 100644 --- a/src/flash0/procon0.rs +++ b/src/flash0/procon0.rs @@ -453,7 +453,7 @@ impl R { RPRO_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::Reg::read) this register and get [`procon0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PROCON0_SPEC; impl crate::RegisterSpec for PROCON0_SPEC { type Ux = u32; diff --git a/src/flash0/procon1.rs b/src/flash0/procon1.rs index 08021bcf..4ab82e2e 100644 --- a/src/flash0/procon1.rs +++ b/src/flash0/procon1.rs @@ -412,7 +412,7 @@ impl R { S9L_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::Reg::read) this register and get [`procon1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PROCON1_SPEC; impl crate::RegisterSpec for PROCON1_SPEC { type Ux = u32; diff --git a/src/flash0/procon2.rs b/src/flash0/procon2.rs index 8a01edbd..5846ea3d 100644 --- a/src/flash0/procon2.rs +++ b/src/flash0/procon2.rs @@ -412,7 +412,7 @@ impl R { S9ROM_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::Reg::read) this register and get [`procon2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PROCON2_SPEC; impl crate::RegisterSpec for PROCON2_SPEC { type Ux = u32; diff --git a/src/generic.rs b/src/generic.rs index 209b70cf..b25072d8 100644 --- a/src/generic.rs +++ b/src/generic.rs @@ -72,140 +72,6 @@ pub trait Resettable: RegisterSpec { Self::RESET_VALUE } } -#[doc = " This structure provides volatile access to registers."] -#[repr(transparent)] -pub struct Reg { - register: vcell::VolatileCell, - _marker: marker::PhantomData, -} -unsafe impl Send for Reg where REG::Ux: Send {} -impl Reg { - #[doc = " Returns the underlying memory address of register."] - #[doc = ""] - #[doc = " ```ignore"] - #[doc = " let reg_ptr = periph.reg.as_ptr();"] - #[doc = " ```"] - #[inline(always)] - pub fn as_ptr(&self) -> *mut REG::Ux { - self.register.as_ptr() - } -} -impl Reg { - #[doc = " Reads the contents of a `Readable` register."] - #[doc = ""] - #[doc = " You can read the raw contents of a register by using `bits`:"] - #[doc = " ```ignore"] - #[doc = " let bits = periph.reg.read().bits();"] - #[doc = " ```"] - #[doc = " or get the content of a particular field of a register:"] - #[doc = " ```ignore"] - #[doc = " let reader = periph.reg.read();"] - #[doc = " let bits = reader.field1().bits();"] - #[doc = " let flag = reader.field2().bit_is_set();"] - #[doc = " ```"] - #[inline(always)] - pub fn read(&self) -> R { - R { bits: self.register.get(), _reg: marker::PhantomData } - } -} -impl Reg { - #[doc = " Writes the reset value to `Writable` register."] - #[doc = ""] - #[doc = " Resets the register to its initial state."] - #[inline(always)] - pub fn reset(&self) { - self.register.set(REG::RESET_VALUE) - } - #[doc = " Writes bits to a `Writable` register."] - #[doc = ""] - #[doc = " You can write raw bits into a register:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] - #[doc = " ```"] - #[doc = " or write only the fields you need:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.write(|w| w"] - #[doc = " .field1().bits(newfield1bits)"] - #[doc = " .field2().set_bit()"] - #[doc = " .field3().variant(VARIANT)"] - #[doc = " );"] - #[doc = " ```"] - #[doc = " or an alternative way of saying the same:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.write(|w| {"] - #[doc = " w.field1().bits(newfield1bits);"] - #[doc = " w.field2().set_bit();"] - #[doc = " w.field3().variant(VARIANT)"] - #[doc = " });"] - #[doc = " ```"] - #[doc = " In the latter case, other fields will be set to their reset value."] - #[inline(always)] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - self.register.set(f(&mut W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits); - } -} -impl Reg { - #[doc = " Writes 0 to a `Writable` register."] - #[doc = ""] - #[doc = " Similar to `write`, but unused bits will contain 0."] - #[doc = ""] - #[doc = " # Safety"] - #[doc = ""] - #[doc = " Unsafe to use with registers which don't allow to write 0."] - #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - self.register.set(f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData }).bits); - } -} -impl Reg { - #[doc = " Modifies the contents of the register by reading and then writing it."] - #[doc = ""] - #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("] - #[doc = " r.bits() | 3"] - #[doc = " ) });"] - #[doc = " ```"] - #[doc = " or"] - #[doc = " ```ignore"] - #[doc = " periph.reg.modify(|_, w| w"] - #[doc = " .field1().bits(newfield1bits)"] - #[doc = " .field2().set_bit()"] - #[doc = " .field3().variant(VARIANT)"] - #[doc = " );"] - #[doc = " ```"] - #[doc = " or an alternative way of saying the same:"] - #[doc = " ```ignore"] - #[doc = " periph.reg.modify(|_, w| {"] - #[doc = " w.field1().bits(newfield1bits);"] - #[doc = " w.field2().set_bit();"] - #[doc = " w.field3().variant(VARIANT)"] - #[doc = " });"] - #[doc = " ```"] - #[doc = " Other fields will have the value they had before the call to `modify`."] - #[inline(always)] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - self.register.set(f(&R { bits, _reg: marker::PhantomData }, &mut W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits); - } -} -impl core::fmt::Debug for crate::generic::Reg -where - R: core::fmt::Debug, -{ - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} #[doc(hidden)] pub mod raw; #[doc = " Register reader."] @@ -575,3 +441,137 @@ where self.w } } +#[doc = " This structure provides volatile access to registers."] +#[repr(transparent)] +pub struct Reg { + register: vcell::VolatileCell, + _marker: marker::PhantomData, +} +unsafe impl Send for Reg where REG::Ux: Send {} +impl Reg { + #[doc = " Returns the underlying memory address of register."] + #[doc = ""] + #[doc = " ```ignore"] + #[doc = " let reg_ptr = periph.reg.as_ptr();"] + #[doc = " ```"] + #[inline(always)] + pub fn as_ptr(&self) -> *mut REG::Ux { + self.register.as_ptr() + } +} +impl Reg { + #[doc = " Reads the contents of a `Readable` register."] + #[doc = ""] + #[doc = " You can read the raw contents of a register by using `bits`:"] + #[doc = " ```ignore"] + #[doc = " let bits = periph.reg.read().bits();"] + #[doc = " ```"] + #[doc = " or get the content of a particular field of a register:"] + #[doc = " ```ignore"] + #[doc = " let reader = periph.reg.read();"] + #[doc = " let bits = reader.field1().bits();"] + #[doc = " let flag = reader.field2().bit_is_set();"] + #[doc = " ```"] + #[inline(always)] + pub fn read(&self) -> R { + R { bits: self.register.get(), _reg: marker::PhantomData } + } +} +impl Reg { + #[doc = " Writes the reset value to `Writable` register."] + #[doc = ""] + #[doc = " Resets the register to its initial state."] + #[inline(always)] + pub fn reset(&self) { + self.register.set(REG::RESET_VALUE) + } + #[doc = " Writes bits to a `Writable` register."] + #[doc = ""] + #[doc = " You can write raw bits into a register:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"] + #[doc = " ```"] + #[doc = " or write only the fields you need:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write(|w| w"] + #[doc = " .field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT)"] + #[doc = " );"] + #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write(|w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT)"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " In the latter case, other fields will be set to their reset value."] + #[inline(always)] + pub fn write(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + self.register.set(f(&mut W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits); + } +} +impl Reg { + #[doc = " Writes 0 to a `Writable` register."] + #[doc = ""] + #[doc = " Similar to `write`, but unused bits will contain 0."] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Unsafe to use with registers which don't allow to write 0."] + #[inline(always)] + pub unsafe fn write_with_zero(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + self.register.set(f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData }).bits); + } +} +impl Reg { + #[doc = " Modifies the contents of the register by reading and then writing it."] + #[doc = ""] + #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("] + #[doc = " r.bits() | 3"] + #[doc = " ) });"] + #[doc = " ```"] + #[doc = " or"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|_, w| w"] + #[doc = " .field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT)"] + #[doc = " );"] + #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|_, w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT)"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " Other fields will have the value they had before the call to `modify`."] + #[inline(always)] + pub fn modify(&self, f: F) + where + for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, + { + let bits = self.register.get(); + self.register.set(f(&R { bits, _reg: marker::PhantomData }, &mut W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits); + } +} +impl core::fmt::Debug for crate::generic::Reg +where + R: core::fmt::Debug, +{ + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} diff --git a/src/gpdma0.rs b/src/gpdma0.rs index cb0daf62..b4288ae3 100644 --- a/src/gpdma0.rs +++ b/src/gpdma0.rs @@ -226,162 +226,162 @@ impl RegisterBlock { &self.version } } -#[doc = "RAWTFR (rw) register accessor: Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawtfr`] +#[doc = "RAWTFR (rw) register accessor: Raw IntTfr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawtfr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawtfr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawtfr`] module"] pub type RAWTFR = crate::Reg; #[doc = "Raw IntTfr Status"] pub mod rawtfr; -#[doc = "RAWBLOCK (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawblock`] +#[doc = "RAWBLOCK (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawblock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawblock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawblock`] module"] pub type RAWBLOCK = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawblock; -#[doc = "RAWSRCTRAN (rw) register accessor: Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawsrctran`] +#[doc = "RAWSRCTRAN (rw) register accessor: Raw IntSrcTran Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawsrctran::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawsrctran::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawsrctran`] module"] pub type RAWSRCTRAN = crate::Reg; #[doc = "Raw IntSrcTran Status"] pub mod rawsrctran; -#[doc = "RAWDSTTRAN (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawdsttran`] +#[doc = "RAWDSTTRAN (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawdsttran::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawdsttran::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawdsttran`] module"] pub type RAWDSTTRAN = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawdsttran; -#[doc = "RAWERR (rw) register accessor: Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawerr`] +#[doc = "RAWERR (rw) register accessor: Raw IntErr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawerr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawerr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawerr`] module"] pub type RAWERR = crate::Reg; #[doc = "Raw IntErr Status"] pub mod rawerr; -#[doc = "STATUSTFR (r) register accessor: IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statustfr`] +#[doc = "STATUSTFR (r) register accessor: IntTfr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statustfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statustfr`] module"] pub type STATUSTFR = crate::Reg; #[doc = "IntTfr Status"] pub mod statustfr; -#[doc = "STATUSBLOCK (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusblock`] +#[doc = "STATUSBLOCK (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statusblock::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusblock`] module"] pub type STATUSBLOCK = crate::Reg; #[doc = "IntBlock Status"] pub mod statusblock; -#[doc = "STATUSSRCTRAN (r) register accessor: IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statussrctran`] +#[doc = "STATUSSRCTRAN (r) register accessor: IntSrcTran Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statussrctran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statussrctran`] module"] pub type STATUSSRCTRAN = crate::Reg; #[doc = "IntSrcTran Status"] pub mod statussrctran; -#[doc = "STATUSDSTTRAN (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusdsttran`] +#[doc = "STATUSDSTTRAN (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statusdsttran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusdsttran`] module"] pub type STATUSDSTTRAN = crate::Reg; #[doc = "IntBlock Status"] pub mod statusdsttran; -#[doc = "STATUSERR (r) register accessor: IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statuserr`] +#[doc = "STATUSERR (r) register accessor: IntErr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statuserr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statuserr`] module"] pub type STATUSERR = crate::Reg; #[doc = "IntErr Status"] pub mod statuserr; -#[doc = "MASKTFR (rw) register accessor: Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masktfr`] +#[doc = "MASKTFR (rw) register accessor: Mask for Raw IntTfr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`masktfr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`masktfr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masktfr`] module"] pub type MASKTFR = crate::Reg; #[doc = "Mask for Raw IntTfr Status"] pub mod masktfr; -#[doc = "MASKBLOCK (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskblock`] +#[doc = "MASKBLOCK (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`maskblock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskblock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskblock`] module"] pub type MASKBLOCK = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskblock; -#[doc = "MASKSRCTRAN (rw) register accessor: Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masksrctran`] +#[doc = "MASKSRCTRAN (rw) register accessor: Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::Reg::read) this register and get [`masksrctran::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`masksrctran::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masksrctran`] module"] pub type MASKSRCTRAN = crate::Reg; #[doc = "Mask for Raw IntSrcTran Status"] pub mod masksrctran; -#[doc = "MASKDSTTRAN (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskdsttran`] +#[doc = "MASKDSTTRAN (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`maskdsttran::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskdsttran::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskdsttran`] module"] pub type MASKDSTTRAN = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskdsttran; -#[doc = "MASKERR (rw) register accessor: Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskerr`] +#[doc = "MASKERR (rw) register accessor: Mask for Raw IntErr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`maskerr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskerr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskerr`] module"] pub type MASKERR = crate::Reg; #[doc = "Mask for Raw IntErr Status"] pub mod maskerr; -#[doc = "CLEARTFR (w) register accessor: IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleartfr`] +#[doc = "CLEARTFR (w) register accessor: IntTfr Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cleartfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleartfr`] module"] pub type CLEARTFR = crate::Reg; #[doc = "IntTfr Status"] pub mod cleartfr; -#[doc = "CLEARBLOCK (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearblock`] +#[doc = "CLEARBLOCK (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clearblock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearblock`] module"] pub type CLEARBLOCK = crate::Reg; #[doc = "IntBlock Status"] pub mod clearblock; -#[doc = "CLEARSRCTRAN (w) register accessor: IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearsrctran`] +#[doc = "CLEARSRCTRAN (w) register accessor: IntSrcTran Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clearsrctran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearsrctran`] module"] pub type CLEARSRCTRAN = crate::Reg; #[doc = "IntSrcTran Status"] pub mod clearsrctran; -#[doc = "CLEARDSTTRAN (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleardsttran`] +#[doc = "CLEARDSTTRAN (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cleardsttran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleardsttran`] module"] pub type CLEARDSTTRAN = crate::Reg; #[doc = "IntBlock Status"] pub mod cleardsttran; -#[doc = "CLEARERR (w) register accessor: IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearerr`] +#[doc = "CLEARERR (w) register accessor: IntErr Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clearerr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearerr`] module"] pub type CLEARERR = crate::Reg; #[doc = "IntErr Status"] pub mod clearerr; -#[doc = "STATUSINT (r) register accessor: Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusint`] +#[doc = "STATUSINT (r) register accessor: Combined Interrupt Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`statusint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusint`] module"] pub type STATUSINT = crate::Reg; #[doc = "Combined Interrupt Status Register"] pub mod statusint; -#[doc = "REQSRCREG (rw) register accessor: Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqsrcreg`] +#[doc = "REQSRCREG (rw) register accessor: Source Software Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reqsrcreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqsrcreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqsrcreg`] module"] pub type REQSRCREG = crate::Reg; #[doc = "Source Software Transaction Request Register"] pub mod reqsrcreg; -#[doc = "REQDSTREG (rw) register accessor: Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqdstreg`] +#[doc = "REQDSTREG (rw) register accessor: Destination Software Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reqdstreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqdstreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqdstreg`] module"] pub type REQDSTREG = crate::Reg; #[doc = "Destination Software Transaction Request Register"] pub mod reqdstreg; -#[doc = "SGLREQSRCREG (rw) register accessor: Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqsrcreg`] +#[doc = "SGLREQSRCREG (rw) register accessor: Single Source Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sglreqsrcreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sglreqsrcreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqsrcreg`] module"] pub type SGLREQSRCREG = crate::Reg; #[doc = "Single Source Transaction Request Register"] pub mod sglreqsrcreg; -#[doc = "SGLREQDSTREG (rw) register accessor: Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqdstreg`] +#[doc = "SGLREQDSTREG (rw) register accessor: Single Destination Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sglreqdstreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sglreqdstreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqdstreg`] module"] pub type SGLREQDSTREG = crate::Reg; #[doc = "Single Destination Transaction Request Register"] pub mod sglreqdstreg; -#[doc = "LSTSRCREG (rw) register accessor: Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstsrcreg`] +#[doc = "LSTSRCREG (rw) register accessor: Last Source Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lstsrcreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lstsrcreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstsrcreg`] module"] pub type LSTSRCREG = crate::Reg; #[doc = "Last Source Transaction Request Register"] pub mod lstsrcreg; -#[doc = "LSTDSTREG (rw) register accessor: Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstdstreg`] +#[doc = "LSTDSTREG (rw) register accessor: Last Destination Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lstdstreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lstdstreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstdstreg`] module"] pub type LSTDSTREG = crate::Reg; #[doc = "Last Destination Transaction Request Register"] pub mod lstdstreg; -#[doc = "DMACFGREG (rw) register accessor: GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmacfgreg`] +#[doc = "DMACFGREG (rw) register accessor: GPDMA Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmacfgreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmacfgreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmacfgreg`] module"] pub type DMACFGREG = crate::Reg; #[doc = "GPDMA Configuration Register"] pub mod dmacfgreg; -#[doc = "CHENREG (rw) register accessor: GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chenreg`] +#[doc = "CHENREG (rw) register accessor: GPDMA Channel Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`chenreg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chenreg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chenreg`] module"] pub type CHENREG = crate::Reg; #[doc = "GPDMA Channel Enable Register"] pub mod chenreg; -#[doc = "ID (r) register accessor: GPDMA0 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: GPDMA0 ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "GPDMA0 ID Register"] pub mod id; -#[doc = "TYPE (r) register accessor: GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@type_`] +#[doc = "TYPE (r) register accessor: GPDMA Component Type\n\nYou can [`read`](crate::Reg::read) this register and get [`type_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@type_`] module"] pub type TYPE = crate::Reg; #[doc = "GPDMA Component Type"] pub mod type_; -#[doc = "VERSION (r) register accessor: DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] +#[doc = "VERSION (r) register accessor: DMA Component Version\n\nYou can [`read`](crate::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] module"] pub type VERSION = crate::Reg; #[doc = "DMA Component Version"] diff --git a/src/gpdma0/chenreg.rs b/src/gpdma0/chenreg.rs index 5e16fec3..7ded0541 100644 --- a/src/gpdma0/chenreg.rs +++ b/src/gpdma0/chenreg.rs @@ -85,7 +85,7 @@ impl W { WE_CH_W::new(self, 8) } } -#[doc = "GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "GPDMA Channel Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`chenreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chenreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CHENREG_SPEC; impl crate::RegisterSpec for CHENREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/clearblock.rs b/src/gpdma0/clearblock.rs index 0a4b3551..bfbfb6ae 100644 --- a/src/gpdma0/clearblock.rs +++ b/src/gpdma0/clearblock.rs @@ -298,7 +298,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntBlock Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clearblock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLEARBLOCK_SPEC; impl crate::RegisterSpec for CLEARBLOCK_SPEC { type Ux = u32; diff --git a/src/gpdma0/cleardsttran.rs b/src/gpdma0/cleardsttran.rs index 6bca8185..3dfd9a11 100644 --- a/src/gpdma0/cleardsttran.rs +++ b/src/gpdma0/cleardsttran.rs @@ -298,7 +298,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntBlock Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cleardsttran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLEARDSTTRAN_SPEC; impl crate::RegisterSpec for CLEARDSTTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/clearerr.rs b/src/gpdma0/clearerr.rs index db8fdc35..291719fa 100644 --- a/src/gpdma0/clearerr.rs +++ b/src/gpdma0/clearerr.rs @@ -298,7 +298,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntErr Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clearerr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLEARERR_SPEC; impl crate::RegisterSpec for CLEARERR_SPEC { type Ux = u32; diff --git a/src/gpdma0/clearsrctran.rs b/src/gpdma0/clearsrctran.rs index b3cc9614..2f65eeec 100644 --- a/src/gpdma0/clearsrctran.rs +++ b/src/gpdma0/clearsrctran.rs @@ -298,7 +298,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntSrcTran Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clearsrctran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLEARSRCTRAN_SPEC; impl crate::RegisterSpec for CLEARSRCTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/cleartfr.rs b/src/gpdma0/cleartfr.rs index b02edf6c..4b42e8d6 100644 --- a/src/gpdma0/cleartfr.rs +++ b/src/gpdma0/cleartfr.rs @@ -298,7 +298,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntTfr Status\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cleartfr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLEARTFR_SPEC; impl crate::RegisterSpec for CLEARTFR_SPEC { type Ux = u32; diff --git a/src/gpdma0/dmacfgreg.rs b/src/gpdma0/dmacfgreg.rs index f3f2f1ec..d1ab2132 100644 --- a/src/gpdma0/dmacfgreg.rs +++ b/src/gpdma0/dmacfgreg.rs @@ -70,7 +70,7 @@ impl W { DMA_EN_W::new(self, 0) } } -#[doc = "GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "GPDMA Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dmacfgreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmacfgreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DMACFGREG_SPEC; impl crate::RegisterSpec for DMACFGREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/id.rs b/src/gpdma0/id.rs index 489c2fcb..d0d2308a 100644 --- a/src/gpdma0/id.rs +++ b/src/gpdma0/id.rs @@ -9,7 +9,7 @@ impl R { VALUE_R::new(self.bits) } } -#[doc = "GPDMA0 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "GPDMA0 ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/gpdma0/lstdstreg.rs b/src/gpdma0/lstdstreg.rs index ac8bc165..dc6e398f 100644 --- a/src/gpdma0/lstdstreg.rs +++ b/src/gpdma0/lstdstreg.rs @@ -814,7 +814,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Last Destination Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lstdstreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lstdstreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LSTDSTREG_SPEC; impl crate::RegisterSpec for LSTDSTREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/lstsrcreg.rs b/src/gpdma0/lstsrcreg.rs index a0b62124..35d048f3 100644 --- a/src/gpdma0/lstsrcreg.rs +++ b/src/gpdma0/lstsrcreg.rs @@ -814,7 +814,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Last Source Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lstsrcreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lstsrcreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LSTSRCREG_SPEC; impl crate::RegisterSpec for LSTSRCREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/maskblock.rs b/src/gpdma0/maskblock.rs index f1a8d4bb..f071f88f 100644 --- a/src/gpdma0/maskblock.rs +++ b/src/gpdma0/maskblock.rs @@ -814,7 +814,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`maskblock::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskblock::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MASKBLOCK_SPEC; impl crate::RegisterSpec for MASKBLOCK_SPEC { type Ux = u32; diff --git a/src/gpdma0/maskdsttran.rs b/src/gpdma0/maskdsttran.rs index 46970271..2f3af5eb 100644 --- a/src/gpdma0/maskdsttran.rs +++ b/src/gpdma0/maskdsttran.rs @@ -814,7 +814,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`maskdsttran::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskdsttran::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MASKDSTTRAN_SPEC; impl crate::RegisterSpec for MASKDSTTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/maskerr.rs b/src/gpdma0/maskerr.rs index 28ceec02..1fb515c5 100644 --- a/src/gpdma0/maskerr.rs +++ b/src/gpdma0/maskerr.rs @@ -814,7 +814,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mask for Raw IntErr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`maskerr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maskerr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MASKERR_SPEC; impl crate::RegisterSpec for MASKERR_SPEC { type Ux = u32; diff --git a/src/gpdma0/masksrctran.rs b/src/gpdma0/masksrctran.rs index 9e4a8c01..04b9d9c1 100644 --- a/src/gpdma0/masksrctran.rs +++ b/src/gpdma0/masksrctran.rs @@ -814,7 +814,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::Reg::read) this register and get [`masksrctran::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`masksrctran::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MASKSRCTRAN_SPEC; impl crate::RegisterSpec for MASKSRCTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/masktfr.rs b/src/gpdma0/masktfr.rs index a914cec9..a5c3842b 100644 --- a/src/gpdma0/masktfr.rs +++ b/src/gpdma0/masktfr.rs @@ -814,7 +814,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mask for Raw IntTfr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`masktfr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`masktfr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MASKTFR_SPEC; impl crate::RegisterSpec for MASKTFR_SPEC { type Ux = u32; diff --git a/src/gpdma0/rawblock.rs b/src/gpdma0/rawblock.rs index d15fb003..b54478a3 100644 --- a/src/gpdma0/rawblock.rs +++ b/src/gpdma0/rawblock.rs @@ -126,7 +126,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawblock::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawblock::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RAWBLOCK_SPEC; impl crate::RegisterSpec for RAWBLOCK_SPEC { type Ux = u32; diff --git a/src/gpdma0/rawdsttran.rs b/src/gpdma0/rawdsttran.rs index 49acaece..c3634201 100644 --- a/src/gpdma0/rawdsttran.rs +++ b/src/gpdma0/rawdsttran.rs @@ -126,7 +126,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawdsttran::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawdsttran::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RAWDSTTRAN_SPEC; impl crate::RegisterSpec for RAWDSTTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/rawerr.rs b/src/gpdma0/rawerr.rs index 8b388a24..b281e2e6 100644 --- a/src/gpdma0/rawerr.rs +++ b/src/gpdma0/rawerr.rs @@ -126,7 +126,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Raw IntErr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawerr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawerr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RAWERR_SPEC; impl crate::RegisterSpec for RAWERR_SPEC { type Ux = u32; diff --git a/src/gpdma0/rawsrctran.rs b/src/gpdma0/rawsrctran.rs index d7538a68..8519037d 100644 --- a/src/gpdma0/rawsrctran.rs +++ b/src/gpdma0/rawsrctran.rs @@ -126,7 +126,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Raw IntSrcTran Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawsrctran::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawsrctran::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RAWSRCTRAN_SPEC; impl crate::RegisterSpec for RAWSRCTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/rawtfr.rs b/src/gpdma0/rawtfr.rs index 9ff0d37a..6371ebb5 100644 --- a/src/gpdma0/rawtfr.rs +++ b/src/gpdma0/rawtfr.rs @@ -126,7 +126,7 @@ impl W { CH7_W::new(self, 7) } } -#[doc = "Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Raw IntTfr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rawtfr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rawtfr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RAWTFR_SPEC; impl crate::RegisterSpec for RAWTFR_SPEC { type Ux = u32; diff --git a/src/gpdma0/reqdstreg.rs b/src/gpdma0/reqdstreg.rs index 4f619abd..c721b3dd 100644 --- a/src/gpdma0/reqdstreg.rs +++ b/src/gpdma0/reqdstreg.rs @@ -422,7 +422,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Destination Software Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reqdstreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqdstreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct REQDSTREG_SPEC; impl crate::RegisterSpec for REQDSTREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/reqsrcreg.rs b/src/gpdma0/reqsrcreg.rs index 89299815..f0bbf157 100644 --- a/src/gpdma0/reqsrcreg.rs +++ b/src/gpdma0/reqsrcreg.rs @@ -422,7 +422,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Software Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reqsrcreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqsrcreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct REQSRCREG_SPEC; impl crate::RegisterSpec for REQSRCREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/sglreqdstreg.rs b/src/gpdma0/sglreqdstreg.rs index f25c1c3b..674f2e69 100644 --- a/src/gpdma0/sglreqdstreg.rs +++ b/src/gpdma0/sglreqdstreg.rs @@ -422,7 +422,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Single Destination Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sglreqdstreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sglreqdstreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SGLREQDSTREG_SPEC; impl crate::RegisterSpec for SGLREQDSTREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/sglreqsrcreg.rs b/src/gpdma0/sglreqsrcreg.rs index 234c671e..ef731c5c 100644 --- a/src/gpdma0/sglreqsrcreg.rs +++ b/src/gpdma0/sglreqsrcreg.rs @@ -422,7 +422,7 @@ impl W { WE_CH7_W::new(self, 15) } } -#[doc = "Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Single Source Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sglreqsrcreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sglreqsrcreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SGLREQSRCREG_SPEC; impl crate::RegisterSpec for SGLREQSRCREG_SPEC { type Ux = u32; diff --git a/src/gpdma0/statusblock.rs b/src/gpdma0/statusblock.rs index 6ee6c7ea..4b623c96 100644 --- a/src/gpdma0/statusblock.rs +++ b/src/gpdma0/statusblock.rs @@ -58,7 +58,7 @@ impl R { CH7_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statusblock::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STATUSBLOCK_SPEC; impl crate::RegisterSpec for STATUSBLOCK_SPEC { type Ux = u32; diff --git a/src/gpdma0/statusdsttran.rs b/src/gpdma0/statusdsttran.rs index bb986da7..df6e7c95 100644 --- a/src/gpdma0/statusdsttran.rs +++ b/src/gpdma0/statusdsttran.rs @@ -58,7 +58,7 @@ impl R { CH7_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntBlock Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statusdsttran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STATUSDSTTRAN_SPEC; impl crate::RegisterSpec for STATUSDSTTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/statuserr.rs b/src/gpdma0/statuserr.rs index b6b41015..ab36a872 100644 --- a/src/gpdma0/statuserr.rs +++ b/src/gpdma0/statuserr.rs @@ -58,7 +58,7 @@ impl R { CH7_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntErr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statuserr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STATUSERR_SPEC; impl crate::RegisterSpec for STATUSERR_SPEC { type Ux = u32; diff --git a/src/gpdma0/statusint.rs b/src/gpdma0/statusint.rs index e8fd9f1e..b04fa44f 100644 --- a/src/gpdma0/statusint.rs +++ b/src/gpdma0/statusint.rs @@ -37,7 +37,7 @@ impl R { ERR_R::new(((self.bits >> 4) & 1) != 0) } } -#[doc = "Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Combined Interrupt Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`statusint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STATUSINT_SPEC; impl crate::RegisterSpec for STATUSINT_SPEC { type Ux = u32; diff --git a/src/gpdma0/statussrctran.rs b/src/gpdma0/statussrctran.rs index 69659f32..5b61e315 100644 --- a/src/gpdma0/statussrctran.rs +++ b/src/gpdma0/statussrctran.rs @@ -58,7 +58,7 @@ impl R { CH7_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntSrcTran Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statussrctran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STATUSSRCTRAN_SPEC; impl crate::RegisterSpec for STATUSSRCTRAN_SPEC { type Ux = u32; diff --git a/src/gpdma0/statustfr.rs b/src/gpdma0/statustfr.rs index cb402cb0..0c347bca 100644 --- a/src/gpdma0/statustfr.rs +++ b/src/gpdma0/statustfr.rs @@ -58,7 +58,7 @@ impl R { CH7_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "IntTfr Status\n\nYou can [`read`](crate::Reg::read) this register and get [`statustfr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STATUSTFR_SPEC; impl crate::RegisterSpec for STATUSTFR_SPEC { type Ux = u32; diff --git a/src/gpdma0/type_.rs b/src/gpdma0/type_.rs index cf672516..60f7309a 100644 --- a/src/gpdma0/type_.rs +++ b/src/gpdma0/type_.rs @@ -9,7 +9,7 @@ impl R { VALUE_R::new(self.bits) } } -#[doc = "GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "GPDMA Component Type\n\nYou can [`read`](crate::Reg::read) this register and get [`type_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TYPE_SPEC; impl crate::RegisterSpec for TYPE_SPEC { type Ux = u32; diff --git a/src/gpdma0/version.rs b/src/gpdma0/version.rs index 1b3d1f83..dc9e8225 100644 --- a/src/gpdma0/version.rs +++ b/src/gpdma0/version.rs @@ -9,7 +9,7 @@ impl R { VALUE_R::new(self.bits) } } -#[doc = "DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DMA Component Version\n\nYou can [`read`](crate::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct VERSION_SPEC; impl crate::RegisterSpec for VERSION_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0.rs b/src/gpdma0_ch0.rs index d5af652f..527792c5 100644 --- a/src/gpdma0_ch0.rs +++ b/src/gpdma0_ch0.rs @@ -90,67 +90,67 @@ impl RegisterBlock { &self.dsr } } -#[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] +#[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] module"] pub type SAR = crate::Reg; #[doc = "Source Address Register"] pub mod sar; -#[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] +#[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] module"] pub type DAR = crate::Reg; #[doc = "Destination Address Register"] pub mod dar; -#[doc = "LLP (rw) register accessor: Linked List Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`llp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`llp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@llp`] +#[doc = "LLP (rw) register accessor: Linked List Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`llp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`llp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@llp`] module"] pub type LLP = crate::Reg; #[doc = "Linked List Pointer Register"] pub mod llp; -#[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] +#[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] module"] pub type CTLL = crate::Reg; #[doc = "Control Register Low"] pub mod ctll; -#[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] +#[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] module"] pub type CTLH = crate::Reg; #[doc = "Control Register High"] pub mod ctlh; -#[doc = "SSTAT (rw) register accessor: Source Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstat`] +#[doc = "SSTAT (rw) register accessor: Source Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstat`] module"] pub type SSTAT = crate::Reg; #[doc = "Source Status Register"] pub mod sstat; -#[doc = "DSTAT (rw) register accessor: Destination Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstat`] +#[doc = "DSTAT (rw) register accessor: Destination Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstat`] module"] pub type DSTAT = crate::Reg; #[doc = "Destination Status Register"] pub mod dstat; -#[doc = "SSTATAR (rw) register accessor: Source Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstatar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstatar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstatar`] +#[doc = "SSTATAR (rw) register accessor: Source Status Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sstatar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sstatar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstatar`] module"] pub type SSTATAR = crate::Reg; #[doc = "Source Status Address Register"] pub mod sstatar; -#[doc = "DSTATAR (rw) register accessor: Destination Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstatar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstatar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstatar`] +#[doc = "DSTATAR (rw) register accessor: Destination Status Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dstatar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dstatar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstatar`] module"] pub type DSTATAR = crate::Reg; #[doc = "Destination Status Address Register"] pub mod dstatar; -#[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] +#[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] module"] pub type CFGL = crate::Reg; #[doc = "Configuration Register Low"] pub mod cfgl; -#[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] +#[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] module"] pub type CFGH = crate::Reg; #[doc = "Configuration Register High"] pub mod cfgh; -#[doc = "SGR (rw) register accessor: Source Gather Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sgr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sgr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sgr`] +#[doc = "SGR (rw) register accessor: Source Gather Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sgr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sgr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sgr`] module"] pub type SGR = crate::Reg; #[doc = "Source Gather Register"] pub mod sgr; -#[doc = "DSR (rw) register accessor: Destination Scatter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsr`] +#[doc = "DSR (rw) register accessor: Destination Scatter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsr`] module"] pub type DSR = crate::Reg; #[doc = "Destination Scatter Register"] diff --git a/src/gpdma0_ch0/cfgh.rs b/src/gpdma0_ch0/cfgh.rs index ba1676f8..8de6142d 100644 --- a/src/gpdma0_ch0/cfgh.rs +++ b/src/gpdma0_ch0/cfgh.rs @@ -209,7 +209,7 @@ impl W { DEST_PER_W::new(self, 11) } } -#[doc = "Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Configuration Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFGH_SPEC; impl crate::RegisterSpec for CFGH_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/cfgl.rs b/src/gpdma0_ch0/cfgl.rs index 50f8561a..4fbe0d80 100644 --- a/src/gpdma0_ch0/cfgl.rs +++ b/src/gpdma0_ch0/cfgl.rs @@ -625,7 +625,7 @@ impl W { RELOAD_DST_W::new(self, 31) } } -#[doc = "Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Configuration Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFGL_SPEC; impl crate::RegisterSpec for CFGL_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/ctlh.rs b/src/gpdma0_ch0/ctlh.rs index 624dc573..b458bd15 100644 --- a/src/gpdma0_ch0/ctlh.rs +++ b/src/gpdma0_ch0/ctlh.rs @@ -36,7 +36,7 @@ impl W { DONE_W::new(self, 12) } } -#[doc = "Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Control Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CTLH_SPEC; impl crate::RegisterSpec for CTLH_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/ctll.rs b/src/gpdma0_ch0/ctll.rs index 5d1b9606..de26965e 100644 --- a/src/gpdma0_ch0/ctll.rs +++ b/src/gpdma0_ch0/ctll.rs @@ -422,7 +422,7 @@ impl W { LLP_SRC_EN_W::new(self, 28) } } -#[doc = "Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Control Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CTLL_SPEC; impl crate::RegisterSpec for CTLL_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/dar.rs b/src/gpdma0_ch0/dar.rs index 3b87df70..31720911 100644 --- a/src/gpdma0_ch0/dar.rs +++ b/src/gpdma0_ch0/dar.rs @@ -21,7 +21,7 @@ impl W { DAR_W::new(self, 0) } } -#[doc = "Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Destination Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAR_SPEC; impl crate::RegisterSpec for DAR_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/dsr.rs b/src/gpdma0_ch0/dsr.rs index a1f6dff2..83029db0 100644 --- a/src/gpdma0_ch0/dsr.rs +++ b/src/gpdma0_ch0/dsr.rs @@ -36,7 +36,7 @@ impl W { DSC_W::new(self, 20) } } -#[doc = "Destination Scatter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Destination Scatter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DSR_SPEC; impl crate::RegisterSpec for DSR_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/dstat.rs b/src/gpdma0_ch0/dstat.rs index 466d701d..60769385 100644 --- a/src/gpdma0_ch0/dstat.rs +++ b/src/gpdma0_ch0/dstat.rs @@ -21,7 +21,7 @@ impl W { DSTAT_W::new(self, 0) } } -#[doc = "Destination Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Destination Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dstat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dstat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DSTAT_SPEC; impl crate::RegisterSpec for DSTAT_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/dstatar.rs b/src/gpdma0_ch0/dstatar.rs index 88925a53..8bd34d67 100644 --- a/src/gpdma0_ch0/dstatar.rs +++ b/src/gpdma0_ch0/dstatar.rs @@ -21,7 +21,7 @@ impl W { DSTATAR_W::new(self, 0) } } -#[doc = "Destination Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstatar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstatar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Destination Status Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dstatar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dstatar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DSTATAR_SPEC; impl crate::RegisterSpec for DSTATAR_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/llp.rs b/src/gpdma0_ch0/llp.rs index 41d1027d..421ae8ab 100644 --- a/src/gpdma0_ch0/llp.rs +++ b/src/gpdma0_ch0/llp.rs @@ -21,7 +21,7 @@ impl W { LOC_W::new(self, 2) } } -#[doc = "Linked List Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`llp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`llp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Linked List Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`llp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`llp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LLP_SPEC; impl crate::RegisterSpec for LLP_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/sar.rs b/src/gpdma0_ch0/sar.rs index b69328d6..c932fdd2 100644 --- a/src/gpdma0_ch0/sar.rs +++ b/src/gpdma0_ch0/sar.rs @@ -21,7 +21,7 @@ impl W { SAR_W::new(self, 0) } } -#[doc = "Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SAR_SPEC; impl crate::RegisterSpec for SAR_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/sgr.rs b/src/gpdma0_ch0/sgr.rs index 0bc5870b..f1c1179a 100644 --- a/src/gpdma0_ch0/sgr.rs +++ b/src/gpdma0_ch0/sgr.rs @@ -36,7 +36,7 @@ impl W { SGC_W::new(self, 20) } } -#[doc = "Source Gather Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sgr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sgr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Gather Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sgr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sgr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SGR_SPEC; impl crate::RegisterSpec for SGR_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/sstat.rs b/src/gpdma0_ch0/sstat.rs index ee59b76c..34527e7c 100644 --- a/src/gpdma0_ch0/sstat.rs +++ b/src/gpdma0_ch0/sstat.rs @@ -21,7 +21,7 @@ impl W { SSTAT_W::new(self, 0) } } -#[doc = "Source Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sstat::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sstat::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SSTAT_SPEC; impl crate::RegisterSpec for SSTAT_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch0/sstatar.rs b/src/gpdma0_ch0/sstatar.rs index 1e8ea1d7..0b5e1a48 100644 --- a/src/gpdma0_ch0/sstatar.rs +++ b/src/gpdma0_ch0/sstatar.rs @@ -21,7 +21,7 @@ impl W { SSTATAR_W::new(self, 0) } } -#[doc = "Source Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstatar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstatar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Status Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sstatar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sstatar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SSTATAR_SPEC; impl crate::RegisterSpec for SSTATAR_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch2.rs b/src/gpdma0_ch2.rs index f89803ec..d5b2bc3f 100644 --- a/src/gpdma0_ch2.rs +++ b/src/gpdma0_ch2.rs @@ -43,32 +43,32 @@ impl RegisterBlock { &self.cfgh } } -#[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] +#[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] module"] pub type SAR = crate::Reg; #[doc = "Source Address Register"] pub mod sar; -#[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] +#[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] module"] pub type DAR = crate::Reg; #[doc = "Destination Address Register"] pub mod dar; -#[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] +#[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] module"] pub type CTLL = crate::Reg; #[doc = "Control Register Low"] pub mod ctll; -#[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] +#[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] module"] pub type CTLH = crate::Reg; #[doc = "Control Register High"] pub mod ctlh; -#[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] +#[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] module"] pub type CFGL = crate::Reg; #[doc = "Configuration Register Low"] pub mod cfgl; -#[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] +#[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] module"] pub type CFGH = crate::Reg; #[doc = "Configuration Register High"] diff --git a/src/gpdma0_ch2/cfgh.rs b/src/gpdma0_ch2/cfgh.rs index 45ce891b..df3ebf0c 100644 --- a/src/gpdma0_ch2/cfgh.rs +++ b/src/gpdma0_ch2/cfgh.rs @@ -179,7 +179,7 @@ impl W { DEST_PER_W::new(self, 11) } } -#[doc = "Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Configuration Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFGH_SPEC; impl crate::RegisterSpec for CFGH_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch2/cfgl.rs b/src/gpdma0_ch2/cfgl.rs index a81ebc10..1dd2d4e2 100644 --- a/src/gpdma0_ch2/cfgl.rs +++ b/src/gpdma0_ch2/cfgl.rs @@ -595,7 +595,7 @@ impl W { MAX_ABRST_W::new(self, 20) } } -#[doc = "Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Configuration Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFGL_SPEC; impl crate::RegisterSpec for CFGL_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch2/ctlh.rs b/src/gpdma0_ch2/ctlh.rs index 624dc573..b458bd15 100644 --- a/src/gpdma0_ch2/ctlh.rs +++ b/src/gpdma0_ch2/ctlh.rs @@ -36,7 +36,7 @@ impl W { DONE_W::new(self, 12) } } -#[doc = "Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Control Register High\n\nYou can [`read`](crate::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CTLH_SPEC; impl crate::RegisterSpec for CTLH_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch2/ctll.rs b/src/gpdma0_ch2/ctll.rs index 97a04bac..b33e26ae 100644 --- a/src/gpdma0_ch2/ctll.rs +++ b/src/gpdma0_ch2/ctll.rs @@ -264,7 +264,7 @@ impl W { TT_FC_W::new(self, 20) } } -#[doc = "Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Control Register Low\n\nYou can [`read`](crate::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CTLL_SPEC; impl crate::RegisterSpec for CTLL_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch2/dar.rs b/src/gpdma0_ch2/dar.rs index 3b87df70..31720911 100644 --- a/src/gpdma0_ch2/dar.rs +++ b/src/gpdma0_ch2/dar.rs @@ -21,7 +21,7 @@ impl W { DAR_W::new(self, 0) } } -#[doc = "Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Destination Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAR_SPEC; impl crate::RegisterSpec for DAR_SPEC { type Ux = u32; diff --git a/src/gpdma0_ch2/sar.rs b/src/gpdma0_ch2/sar.rs index b69328d6..c932fdd2 100644 --- a/src/gpdma0_ch2/sar.rs +++ b/src/gpdma0_ch2/sar.rs @@ -21,7 +21,7 @@ impl W { SAR_W::new(self, 0) } } -#[doc = "Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SAR_SPEC; impl crate::RegisterSpec for SAR_SPEC { type Ux = u32; diff --git a/src/hrpwm0.rs b/src/hrpwm0.rs index ff32ea7b..0e87769f 100644 --- a/src/hrpwm0.rs +++ b/src/hrpwm0.rs @@ -110,87 +110,87 @@ impl RegisterBlock { &self.hrghrs } } -#[doc = "HRBSC (rw) register accessor: Bias and suspend configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrbsc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrbsc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrbsc`] +#[doc = "HRBSC (rw) register accessor: Bias and suspend configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`hrbsc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrbsc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrbsc`] module"] pub type HRBSC = crate::Reg; #[doc = "Bias and suspend configuration"] pub mod hrbsc; -#[doc = "MIDR (r) register accessor: Module identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] +#[doc = "MIDR (r) register accessor: Module identification register\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] pub type MIDR = crate::Reg; #[doc = "Module identification register"] pub mod midr; -#[doc = "GLBANA (rw) register accessor: Global Analog Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`glbana::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`glbana::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@glbana`] +#[doc = "GLBANA (rw) register accessor: Global Analog Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`glbana::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`glbana::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@glbana`] module"] pub type GLBANA = crate::Reg; #[doc = "Global Analog Configuration"] pub mod glbana; -#[doc = "CSGCFG (rw) register accessor: Global CSG configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgcfg`] +#[doc = "CSGCFG (rw) register accessor: Global CSG configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`csgcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgcfg`] module"] pub type CSGCFG = crate::Reg; #[doc = "Global CSG configuration"] pub mod csgcfg; -#[doc = "CSGSETG (w) register accessor: Global CSG run bit set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgsetg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgsetg`] +#[doc = "CSGSETG (w) register accessor: Global CSG run bit set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgsetg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgsetg`] module"] pub type CSGSETG = crate::Reg; #[doc = "Global CSG run bit set"] pub mod csgsetg; -#[doc = "CSGCLRG (w) register accessor: Global CSG run bit clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgclrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgclrg`] +#[doc = "CSGCLRG (w) register accessor: Global CSG run bit clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgclrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgclrg`] module"] pub type CSGCLRG = crate::Reg; #[doc = "Global CSG run bit clear"] pub mod csgclrg; -#[doc = "CSGSTATG (r) register accessor: Global CSG run bit status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgstatg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgstatg`] +#[doc = "CSGSTATG (r) register accessor: Global CSG run bit status\n\nYou can [`read`](crate::Reg::read) this register and get [`csgstatg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgstatg`] module"] pub type CSGSTATG = crate::Reg; #[doc = "Global CSG run bit status"] pub mod csgstatg; -#[doc = "CSGFCG (w) register accessor: Global CSG slope/prescaler control\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgfcg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgfcg`] +#[doc = "CSGFCG (w) register accessor: Global CSG slope/prescaler control\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgfcg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgfcg`] module"] pub type CSGFCG = crate::Reg; #[doc = "Global CSG slope/prescaler control"] pub mod csgfcg; -#[doc = "CSGFSG (r) register accessor: Global CSG slope/prescaler status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgfsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgfsg`] +#[doc = "CSGFSG (r) register accessor: Global CSG slope/prescaler status\n\nYou can [`read`](crate::Reg::read) this register and get [`csgfsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgfsg`] module"] pub type CSGFSG = crate::Reg; #[doc = "Global CSG slope/prescaler status"] pub mod csgfsg; -#[doc = "CSGTRG (w) register accessor: Global CSG shadow/switch trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrg`] +#[doc = "CSGTRG (w) register accessor: Global CSG shadow/switch trigger\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgtrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrg`] module"] pub type CSGTRG = crate::Reg; #[doc = "Global CSG shadow/switch trigger"] pub mod csgtrg; -#[doc = "CSGTRC (w) register accessor: Global CSG shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrc`] +#[doc = "CSGTRC (w) register accessor: Global CSG shadow trigger clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgtrc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrc`] module"] pub type CSGTRC = crate::Reg; #[doc = "Global CSG shadow trigger clear"] pub mod csgtrc; -#[doc = "CSGTRSG (r) register accessor: Global CSG shadow/switch status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgtrsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrsg`] +#[doc = "CSGTRSG (r) register accessor: Global CSG shadow/switch status\n\nYou can [`read`](crate::Reg::read) this register and get [`csgtrsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrsg`] module"] pub type CSGTRSG = crate::Reg; #[doc = "Global CSG shadow/switch status"] pub mod csgtrsg; -#[doc = "HRCCFG (rw) register accessor: Global HRC configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrccfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrccfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrccfg`] +#[doc = "HRCCFG (rw) register accessor: Global HRC configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`hrccfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrccfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrccfg`] module"] pub type HRCCFG = crate::Reg; #[doc = "Global HRC configuration"] pub mod hrccfg; -#[doc = "HRCSTRG (w) register accessor: Global HRC shadow trigger set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcstrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcstrg`] +#[doc = "HRCSTRG (w) register accessor: Global HRC shadow trigger set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrcstrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcstrg`] module"] pub type HRCSTRG = crate::Reg; #[doc = "Global HRC shadow trigger set"] pub mod hrcstrg; -#[doc = "HRCCTRG (w) register accessor: Global HRC shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcctrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcctrg`] +#[doc = "HRCCTRG (w) register accessor: Global HRC shadow trigger clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrcctrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcctrg`] module"] pub type HRCCTRG = crate::Reg; #[doc = "Global HRC shadow trigger clear"] pub mod hrcctrg; -#[doc = "HRCSTSG (r) register accessor: Global HRC shadow transfer status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrcstsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcstsg`] +#[doc = "HRCSTSG (r) register accessor: Global HRC shadow transfer status\n\nYou can [`read`](crate::Reg::read) this register and get [`hrcstsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcstsg`] module"] pub type HRCSTSG = crate::Reg; #[doc = "Global HRC shadow transfer status"] pub mod hrcstsg; -#[doc = "HRGHRS (r) register accessor: High Resolution Generation Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrghrs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrghrs`] +#[doc = "HRGHRS (r) register accessor: High Resolution Generation Status\n\nYou can [`read`](crate::Reg::read) this register and get [`hrghrs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrghrs`] module"] pub type HRGHRS = crate::Reg; #[doc = "High Resolution Generation Status"] diff --git a/src/hrpwm0/csgcfg.rs b/src/hrpwm0/csgcfg.rs index 480fdf9c..1049161f 100644 --- a/src/hrpwm0/csgcfg.rs +++ b/src/hrpwm0/csgcfg.rs @@ -303,7 +303,7 @@ impl W { C2CD_W::new(self, 18) } } -#[doc = "Global CSG configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`csgcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGCFG_SPEC; impl crate::RegisterSpec for CSGCFG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgclrg.rs b/src/hrpwm0/csgclrg.rs index 64505644..1e2e7acc 100644 --- a/src/hrpwm0/csgclrg.rs +++ b/src/hrpwm0/csgclrg.rs @@ -74,7 +74,7 @@ impl W { CC2P_W::new(self, 10) } } -#[doc = "Global CSG run bit clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgclrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG run bit clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgclrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGCLRG_SPEC; impl crate::RegisterSpec for CSGCLRG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgfcg.rs b/src/hrpwm0/csgfcg.rs index cb73eb13..54f542b4 100644 --- a/src/hrpwm0/csgfcg.rs +++ b/src/hrpwm0/csgfcg.rs @@ -122,7 +122,7 @@ impl W { PS2CLR_W::new(self, 20) } } -#[doc = "Global CSG slope/prescaler control\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgfcg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG slope/prescaler control\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgfcg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGFCG_SPEC; impl crate::RegisterSpec for CSGFCG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgfsg.rs b/src/hrpwm0/csgfsg.rs index d48f238f..d3c4e3cc 100644 --- a/src/hrpwm0/csgfsg.rs +++ b/src/hrpwm0/csgfsg.rs @@ -248,7 +248,7 @@ impl R { P2RB_R::new(((self.bits >> 17) & 1) != 0) } } -#[doc = "Global CSG slope/prescaler status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgfsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG slope/prescaler status\n\nYou can [`read`](crate::Reg::read) this register and get [`csgfsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGFSG_SPEC; impl crate::RegisterSpec for CSGFSG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgsetg.rs b/src/hrpwm0/csgsetg.rs index d47d58bb..0438d66a 100644 --- a/src/hrpwm0/csgsetg.rs +++ b/src/hrpwm0/csgsetg.rs @@ -74,7 +74,7 @@ impl W { SC2P_W::new(self, 10) } } -#[doc = "Global CSG run bit set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgsetg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG run bit set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgsetg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGSETG_SPEC; impl crate::RegisterSpec for CSGSETG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgstatg.rs b/src/hrpwm0/csgstatg.rs index e93cc76e..40216c74 100644 --- a/src/hrpwm0/csgstatg.rs +++ b/src/hrpwm0/csgstatg.rs @@ -371,7 +371,7 @@ impl R { PSLS2_R::new(((self.bits >> 10) & 1) != 0) } } -#[doc = "Global CSG run bit status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgstatg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG run bit status\n\nYou can [`read`](crate::Reg::read) this register and get [`csgstatg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGSTATG_SPEC; impl crate::RegisterSpec for CSGSTATG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgtrc.rs b/src/hrpwm0/csgtrc.rs index b6f1287b..75f1649a 100644 --- a/src/hrpwm0/csgtrc.rs +++ b/src/hrpwm0/csgtrc.rs @@ -26,7 +26,7 @@ impl W { D2SEC_W::new(self, 8) } } -#[doc = "Global CSG shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG shadow trigger clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgtrc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGTRC_SPEC; impl crate::RegisterSpec for CSGTRC_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgtrg.rs b/src/hrpwm0/csgtrg.rs index 8bfcb28d..889dd2c7 100644 --- a/src/hrpwm0/csgtrg.rs +++ b/src/hrpwm0/csgtrg.rs @@ -50,7 +50,7 @@ impl W { D2SVS_W::new(self, 9) } } -#[doc = "Global CSG shadow/switch trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG shadow/switch trigger\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgtrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGTRG_SPEC; impl crate::RegisterSpec for CSGTRG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/csgtrsg.rs b/src/hrpwm0/csgtrsg.rs index 369912dc..d604a4fc 100644 --- a/src/hrpwm0/csgtrsg.rs +++ b/src/hrpwm0/csgtrsg.rs @@ -248,7 +248,7 @@ impl R { SW2ST_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "Global CSG shadow/switch status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgtrsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global CSG shadow/switch status\n\nYou can [`read`](crate::Reg::read) this register and get [`csgtrsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CSGTRSG_SPEC; impl crate::RegisterSpec for CSGTRSG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/glbana.rs b/src/hrpwm0/glbana.rs index 9f788b3b..517a0f49 100644 --- a/src/hrpwm0/glbana.rs +++ b/src/hrpwm0/glbana.rs @@ -190,7 +190,7 @@ impl W { GHREN_W::new(self, 18) } } -#[doc = "Global Analog Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`glbana::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`glbana::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Analog Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`glbana::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`glbana::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLBANA_SPEC; impl crate::RegisterSpec for GLBANA_SPEC { type Ux = u32; diff --git a/src/hrpwm0/hrbsc.rs b/src/hrpwm0/hrbsc.rs index d76d5bce..a5f3532c 100644 --- a/src/hrpwm0/hrbsc.rs +++ b/src/hrpwm0/hrbsc.rs @@ -118,7 +118,7 @@ impl W { HRBE_W::new(self, 8) } } -#[doc = "Bias and suspend configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrbsc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrbsc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Bias and suspend configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`hrbsc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrbsc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HRBSC_SPEC; impl crate::RegisterSpec for HRBSC_SPEC { type Ux = u32; diff --git a/src/hrpwm0/hrccfg.rs b/src/hrpwm0/hrccfg.rs index 8df8e213..ef79769b 100644 --- a/src/hrpwm0/hrccfg.rs +++ b/src/hrpwm0/hrccfg.rs @@ -679,7 +679,7 @@ impl W { LRC3E_W::new(self, 23) } } -#[doc = "Global HRC configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrccfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrccfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global HRC configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`hrccfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrccfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HRCCFG_SPEC; impl crate::RegisterSpec for HRCCFG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/hrcctrg.rs b/src/hrpwm0/hrcctrg.rs index 90530b0c..93571c63 100644 --- a/src/hrpwm0/hrcctrg.rs +++ b/src/hrpwm0/hrcctrg.rs @@ -66,7 +66,7 @@ impl W { H3DEC_W::new(self, 13) } } -#[doc = "Global HRC shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcctrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global HRC shadow trigger clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrcctrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HRCCTRG_SPEC; impl crate::RegisterSpec for HRCCTRG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/hrcstrg.rs b/src/hrpwm0/hrcstrg.rs index 7d3871a7..0cacd9de 100644 --- a/src/hrpwm0/hrcstrg.rs +++ b/src/hrpwm0/hrcstrg.rs @@ -66,7 +66,7 @@ impl W { H3DES_W::new(self, 13) } } -#[doc = "Global HRC shadow trigger set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcstrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global HRC shadow trigger set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hrcstrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HRCSTRG_SPEC; impl crate::RegisterSpec for HRCSTRG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/hrcstsg.rs b/src/hrpwm0/hrcstsg.rs index e0fe7197..f2d2ffc6 100644 --- a/src/hrpwm0/hrcstsg.rs +++ b/src/hrpwm0/hrcstsg.rs @@ -330,7 +330,7 @@ impl R { H3DSTE_R::new(((self.bits >> 13) & 1) != 0) } } -#[doc = "Global HRC shadow transfer status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrcstsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global HRC shadow transfer status\n\nYou can [`read`](crate::Reg::read) this register and get [`hrcstsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HRCSTSG_SPEC; impl crate::RegisterSpec for HRCSTSG_SPEC { type Ux = u32; diff --git a/src/hrpwm0/hrghrs.rs b/src/hrpwm0/hrghrs.rs index 1ae91a57..236efca3 100644 --- a/src/hrpwm0/hrghrs.rs +++ b/src/hrpwm0/hrghrs.rs @@ -43,7 +43,7 @@ impl R { HRGR_R::new((self.bits & 1) != 0) } } -#[doc = "High Resolution Generation Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrghrs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "High Resolution Generation Status\n\nYou can [`read`](crate::Reg::read) this register and get [`hrghrs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HRGHRS_SPEC; impl crate::RegisterSpec for HRGHRS_SPEC { type Ux = u32; diff --git a/src/hrpwm0/midr.rs b/src/hrpwm0/midr.rs index 22096da2..ef7cafe3 100644 --- a/src/hrpwm0/midr.rs +++ b/src/hrpwm0/midr.rs @@ -23,7 +23,7 @@ impl R { MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module identification register\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MIDR_SPEC; impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0.rs b/src/hrpwm0_csg0.rs index dbaa7df1..fc11c45e 100644 --- a/src/hrpwm0_csg0.rs +++ b/src/hrpwm0_csg0.rs @@ -100,82 +100,82 @@ impl RegisterBlock { &self.istat } } -#[doc = "DCI (rw) register accessor: External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dci::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dci::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dci`] +#[doc = "DCI (rw) register accessor: External input selection\n\nYou can [`read`](crate::Reg::read) this register and get [`dci::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dci::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dci`] module"] pub type DCI = crate::Reg; #[doc = "External input selection"] pub mod dci; -#[doc = "IES (rw) register accessor: External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ies::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ies::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ies`] +#[doc = "IES (rw) register accessor: External input selection\n\nYou can [`read`](crate::Reg::read) this register and get [`ies::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ies::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ies`] module"] pub type IES = crate::Reg; #[doc = "External input selection"] pub mod ies; -#[doc = "SC (rw) register accessor: Slope generation control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sc`] +#[doc = "SC (rw) register accessor: Slope generation control\n\nYou can [`read`](crate::Reg::read) this register and get [`sc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sc`] module"] pub type SC = crate::Reg; #[doc = "Slope generation control"] pub mod sc; -#[doc = "PC (r) register accessor: Pulse swallow configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pc`] +#[doc = "PC (r) register accessor: Pulse swallow configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pc`] module"] pub type PC = crate::Reg; #[doc = "Pulse swallow configuration"] pub mod pc; -#[doc = "DSV1 (r) register accessor: DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsv1`] +#[doc = "DSV1 (r) register accessor: DAC reference value 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dsv1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsv1`] module"] pub type DSV1 = crate::Reg; #[doc = "DAC reference value 1"] pub mod dsv1; -#[doc = "DSV2 (rw) register accessor: DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsv2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsv2`] +#[doc = "DSV2 (rw) register accessor: DAC reference value 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dsv2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsv2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsv2`] module"] pub type DSV2 = crate::Reg; #[doc = "DAC reference value 1"] pub mod dsv2; -#[doc = "SDSV1 (rw) register accessor: Shadow reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdsv1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdsv1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdsv1`] +#[doc = "SDSV1 (rw) register accessor: Shadow reference value 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sdsv1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdsv1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdsv1`] module"] pub type SDSV1 = crate::Reg; #[doc = "Shadow reference value 1"] pub mod sdsv1; -#[doc = "SPC (rw) register accessor: Shadow Pulse swallow value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spc`] +#[doc = "SPC (rw) register accessor: Shadow Pulse swallow value\n\nYou can [`read`](crate::Reg::read) this register and get [`spc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spc`] module"] pub type SPC = crate::Reg; #[doc = "Shadow Pulse swallow value"] pub mod spc; -#[doc = "CC (rw) register accessor: Comparator configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc`] +#[doc = "CC (rw) register accessor: Comparator configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`cc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc`] module"] pub type CC = crate::Reg; #[doc = "Comparator configuration"] pub mod cc; -#[doc = "PLC (rw) register accessor: Passive level configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`plc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`plc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@plc`] +#[doc = "PLC (rw) register accessor: Passive level configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`plc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@plc`] module"] pub type PLC = crate::Reg; #[doc = "Passive level configuration"] pub mod plc; -#[doc = "BLV (rw) register accessor: Comparator blanking value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`blv::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`blv::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@blv`] +#[doc = "BLV (rw) register accessor: Comparator blanking value\n\nYou can [`read`](crate::Reg::read) this register and get [`blv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`blv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@blv`] module"] pub type BLV = crate::Reg; #[doc = "Comparator blanking value"] pub mod blv; -#[doc = "SRE (rw) register accessor: Service request enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sre::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sre::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sre`] +#[doc = "SRE (rw) register accessor: Service request enable\n\nYou can [`read`](crate::Reg::read) this register and get [`sre::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sre::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sre`] module"] pub type SRE = crate::Reg; #[doc = "Service request enable"] pub mod sre; -#[doc = "SRS (rw) register accessor: Service request line selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] +#[doc = "SRS (rw) register accessor: Service request line selector\n\nYou can [`read`](crate::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] pub type SRS = crate::Reg; #[doc = "Service request line selector"] pub mod srs; -#[doc = "SWS (w) register accessor: Service request SW set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] +#[doc = "SWS (w) register accessor: Service request SW set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] pub type SWS = crate::Reg; #[doc = "Service request SW set"] pub mod sws; -#[doc = "SWC (w) register accessor: Service request SW clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swc`] +#[doc = "SWC (w) register accessor: Service request SW clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swc`] module"] pub type SWC = crate::Reg; #[doc = "Service request SW clear"] pub mod swc; -#[doc = "ISTAT (r) register accessor: Service request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`istat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@istat`] +#[doc = "ISTAT (r) register accessor: Service request status\n\nYou can [`read`](crate::Reg::read) this register and get [`istat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@istat`] module"] pub type ISTAT = crate::Reg; #[doc = "Service request status"] diff --git a/src/hrpwm0_csg0/blv.rs b/src/hrpwm0_csg0/blv.rs index 699c32b3..9c281647 100644 --- a/src/hrpwm0_csg0/blv.rs +++ b/src/hrpwm0_csg0/blv.rs @@ -21,7 +21,7 @@ impl W { BLV_W::new(self, 0) } } -#[doc = "Comparator blanking value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`blv::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`blv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Comparator blanking value\n\nYou can [`read`](crate::Reg::read) this register and get [`blv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`blv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BLV_SPEC; impl crate::RegisterSpec for BLV_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/cc.rs b/src/hrpwm0_csg0/cc.rs index 7df822e0..90285664 100644 --- a/src/hrpwm0_csg0/cc.rs +++ b/src/hrpwm0_csg0/cc.rs @@ -861,7 +861,7 @@ impl W { COFC_W::new(self, 24) } } -#[doc = "Comparator configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Comparator configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`cc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CC_SPEC; impl crate::RegisterSpec for CC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/dci.rs b/src/hrpwm0_csg0/dci.rs index e65877e6..68d71da7 100644 --- a/src/hrpwm0_csg0/dci.rs +++ b/src/hrpwm0_csg0/dci.rs @@ -416,7 +416,7 @@ impl W { SCS_W::new(self, 20) } } -#[doc = "External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dci::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dci::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "External input selection\n\nYou can [`read`](crate::Reg::read) this register and get [`dci::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dci::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DCI_SPEC; impl crate::RegisterSpec for DCI_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/dsv1.rs b/src/hrpwm0_csg0/dsv1.rs index f67f6956..2dc659a4 100644 --- a/src/hrpwm0_csg0/dsv1.rs +++ b/src/hrpwm0_csg0/dsv1.rs @@ -9,7 +9,7 @@ impl R { DSV1_R::new((self.bits & 0x03ff) as u16) } } -#[doc = "DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC reference value 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dsv1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DSV1_SPEC; impl crate::RegisterSpec for DSV1_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/dsv2.rs b/src/hrpwm0_csg0/dsv2.rs index 727579ad..32201ea2 100644 --- a/src/hrpwm0_csg0/dsv2.rs +++ b/src/hrpwm0_csg0/dsv2.rs @@ -21,7 +21,7 @@ impl W { DSV2_W::new(self, 0) } } -#[doc = "DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsv2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "DAC reference value 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dsv2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsv2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DSV2_SPEC; impl crate::RegisterSpec for DSV2_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/ies.rs b/src/hrpwm0_csg0/ies.rs index 1e51a137..d2044ad8 100644 --- a/src/hrpwm0_csg0/ies.rs +++ b/src/hrpwm0_csg0/ies.rs @@ -478,7 +478,7 @@ impl W { STES_W::new(self, 8) } } -#[doc = "External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ies::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ies::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "External input selection\n\nYou can [`read`](crate::Reg::read) this register and get [`ies::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ies::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IES_SPEC; impl crate::RegisterSpec for IES_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/istat.rs b/src/hrpwm0_csg0/istat.rs index 3cfdf527..4051f055 100644 --- a/src/hrpwm0_csg0/istat.rs +++ b/src/hrpwm0_csg0/istat.rs @@ -371,7 +371,7 @@ impl R { CSES_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "Service request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`istat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service request status\n\nYou can [`read`](crate::Reg::read) this register and get [`istat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ISTAT_SPEC; impl crate::RegisterSpec for ISTAT_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/pc.rs b/src/hrpwm0_csg0/pc.rs index 2b683a34..28e831e1 100644 --- a/src/hrpwm0_csg0/pc.rs +++ b/src/hrpwm0_csg0/pc.rs @@ -9,7 +9,7 @@ impl R { PSWV_R::new((self.bits & 0x3f) as u8) } } -#[doc = "Pulse swallow configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Pulse swallow configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`pc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PC_SPEC; impl crate::RegisterSpec for PC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/plc.rs b/src/hrpwm0_csg0/plc.rs index d5ab9e06..a7fe298a 100644 --- a/src/hrpwm0_csg0/plc.rs +++ b/src/hrpwm0_csg0/plc.rs @@ -639,7 +639,7 @@ impl W { PLXC_W::new(self, 14) } } -#[doc = "Passive level configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`plc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`plc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Passive level configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`plc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PLC_SPEC; impl crate::RegisterSpec for PLC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/sc.rs b/src/hrpwm0_csg0/sc.rs index 4f809ef4..1e11e625 100644 --- a/src/hrpwm0_csg0/sc.rs +++ b/src/hrpwm0_csg0/sc.rs @@ -1067,7 +1067,7 @@ impl W { PSWM_W::new(self, 24) } } -#[doc = "Slope generation control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Slope generation control\n\nYou can [`read`](crate::Reg::read) this register and get [`sc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SC_SPEC; impl crate::RegisterSpec for SC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/sdsv1.rs b/src/hrpwm0_csg0/sdsv1.rs index 9152e8a5..0f138e3e 100644 --- a/src/hrpwm0_csg0/sdsv1.rs +++ b/src/hrpwm0_csg0/sdsv1.rs @@ -21,7 +21,7 @@ impl W { SDSV1_W::new(self, 0) } } -#[doc = "Shadow reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdsv1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdsv1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Shadow reference value 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sdsv1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdsv1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SDSV1_SPEC; impl crate::RegisterSpec for SDSV1_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/spc.rs b/src/hrpwm0_csg0/spc.rs index c1a7099c..91b8b3a8 100644 --- a/src/hrpwm0_csg0/spc.rs +++ b/src/hrpwm0_csg0/spc.rs @@ -21,7 +21,7 @@ impl W { SPSWV_W::new(self, 0) } } -#[doc = "Shadow Pulse swallow value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Shadow Pulse swallow value\n\nYou can [`read`](crate::Reg::read) this register and get [`spc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SPC_SPEC; impl crate::RegisterSpec for SPC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/sre.rs b/src/hrpwm0_csg0/sre.rs index add38301..1af4fd9b 100644 --- a/src/hrpwm0_csg0/sre.rs +++ b/src/hrpwm0_csg0/sre.rs @@ -141,7 +141,7 @@ impl W { CSEE_W::new(self, 8) } } -#[doc = "Service request enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sre::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sre::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service request enable\n\nYou can [`read`](crate::Reg::read) this register and get [`sre::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sre::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRE_SPEC; impl crate::RegisterSpec for SRE_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/srs.rs b/src/hrpwm0_csg0/srs.rs index 9e8ef2b8..3da15ae1 100644 --- a/src/hrpwm0_csg0/srs.rs +++ b/src/hrpwm0_csg0/srs.rs @@ -685,7 +685,7 @@ impl W { CSLS_W::new(self, 12) } } -#[doc = "Service request line selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service request line selector\n\nYou can [`read`](crate::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRS_SPEC; impl crate::RegisterSpec for SRS_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/swc.rs b/src/hrpwm0_csg0/swc.rs index 3c87b30c..06ac675e 100644 --- a/src/hrpwm0_csg0/swc.rs +++ b/src/hrpwm0_csg0/swc.rs @@ -74,7 +74,7 @@ impl W { CCSS_W::new(self, 8) } } -#[doc = "Service request SW clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service request SW clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SWC_SPEC; impl crate::RegisterSpec for SWC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_csg0/sws.rs b/src/hrpwm0_csg0/sws.rs index c2052995..f579d329 100644 --- a/src/hrpwm0_csg0/sws.rs +++ b/src/hrpwm0_csg0/sws.rs @@ -74,7 +74,7 @@ impl W { SCSS_W::new(self, 8) } } -#[doc = "Service request SW set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service request SW set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SWS_SPEC; impl crate::RegisterSpec for SWS_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0.rs b/src/hrpwm0_hrc0.rs index 210264db..bad5c8fd 100644 --- a/src/hrpwm0_hrc0.rs +++ b/src/hrpwm0_hrc0.rs @@ -88,72 +88,72 @@ impl RegisterBlock { &self.scr2 } } -#[doc = "GC (rw) register accessor: HRC mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gc`] +#[doc = "GC (rw) register accessor: HRC mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`gc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gc`] module"] pub type GC = crate::Reg; #[doc = "HRC mode configuration"] pub mod gc; -#[doc = "PL (rw) register accessor: HRC output passive level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pl`] +#[doc = "PL (rw) register accessor: HRC output passive level\n\nYou can [`read`](crate::Reg::read) this register and get [`pl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pl`] module"] pub type PL = crate::Reg; #[doc = "HRC output passive level"] pub mod pl; -#[doc = "GSEL (rw) register accessor: HRC global control selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gsel`] +#[doc = "GSEL (rw) register accessor: HRC global control selection\n\nYou can [`read`](crate::Reg::read) this register and get [`gsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gsel`] module"] pub type GSEL = crate::Reg; #[doc = "HRC global control selection"] pub mod gsel; -#[doc = "TSEL (rw) register accessor: HRC timer selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsel`] +#[doc = "TSEL (rw) register accessor: HRC timer selection\n\nYou can [`read`](crate::Reg::read) this register and get [`tsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsel`] module"] pub type TSEL = crate::Reg; #[doc = "HRC timer selection"] pub mod tsel; -#[doc = "SC (r) register accessor: HRC current source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sc`] +#[doc = "SC (r) register accessor: HRC current source for shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`sc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sc`] module"] pub type SC = crate::Reg; #[doc = "HRC current source for shadow"] pub mod sc; -#[doc = "DCR (r) register accessor: HRC dead time rising value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcr`] +#[doc = "DCR (r) register accessor: HRC dead time rising value\n\nYou can [`read`](crate::Reg::read) this register and get [`dcr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcr`] module"] pub type DCR = crate::Reg; #[doc = "HRC dead time rising value"] pub mod dcr; -#[doc = "DCF (r) register accessor: HRC dead time falling value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcf`] +#[doc = "DCF (r) register accessor: HRC dead time falling value\n\nYou can [`read`](crate::Reg::read) this register and get [`dcf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcf`] module"] pub type DCF = crate::Reg; #[doc = "HRC dead time falling value"] pub mod dcf; -#[doc = "CR1 (r) register accessor: HRC rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`] +#[doc = "CR1 (r) register accessor: HRC rising edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`] module"] pub type CR1 = crate::Reg; #[doc = "HRC rising edge value"] pub mod cr1; -#[doc = "CR2 (r) register accessor: HRC falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`] +#[doc = "CR2 (r) register accessor: HRC falling edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`] module"] pub type CR2 = crate::Reg; #[doc = "HRC falling edge value"] pub mod cr2; -#[doc = "SSC (rw) register accessor: HRC next source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ssc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ssc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ssc`] +#[doc = "SSC (rw) register accessor: HRC next source for shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`ssc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ssc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ssc`] module"] pub type SSC = crate::Reg; #[doc = "HRC next source for shadow"] pub mod ssc; -#[doc = "SDCR (rw) register accessor: HRC shadow dead time rising\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdcr`] +#[doc = "SDCR (rw) register accessor: HRC shadow dead time rising\n\nYou can [`read`](crate::Reg::read) this register and get [`sdcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdcr`] module"] pub type SDCR = crate::Reg; #[doc = "HRC shadow dead time rising"] pub mod sdcr; -#[doc = "SDCF (rw) register accessor: HRC shadow dead time falling\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdcf`] +#[doc = "SDCF (rw) register accessor: HRC shadow dead time falling\n\nYou can [`read`](crate::Reg::read) this register and get [`sdcf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdcf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdcf`] module"] pub type SDCF = crate::Reg; #[doc = "HRC shadow dead time falling"] pub mod sdcf; -#[doc = "SCR1 (rw) register accessor: HRC shadow rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr1`] +#[doc = "SCR1 (rw) register accessor: HRC shadow rising edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`scr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr1`] module"] pub type SCR1 = crate::Reg; #[doc = "HRC shadow rising edge value"] pub mod scr1; -#[doc = "SCR2 (rw) register accessor: HRC shadow falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr2`] +#[doc = "SCR2 (rw) register accessor: HRC shadow falling edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`scr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr2`] module"] pub type SCR2 = crate::Reg; #[doc = "HRC shadow falling edge value"] diff --git a/src/hrpwm0_hrc0/cr1.rs b/src/hrpwm0_hrc0/cr1.rs index 531b1093..2d633c74 100644 --- a/src/hrpwm0_hrc0/cr1.rs +++ b/src/hrpwm0_hrc0/cr1.rs @@ -9,7 +9,7 @@ impl R { CR1_R::new((self.bits & 0xff) as u8) } } -#[doc = "HRC rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC rising edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CR1_SPEC; impl crate::RegisterSpec for CR1_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/cr2.rs b/src/hrpwm0_hrc0/cr2.rs index 2659afd1..e7237e44 100644 --- a/src/hrpwm0_hrc0/cr2.rs +++ b/src/hrpwm0_hrc0/cr2.rs @@ -9,7 +9,7 @@ impl R { CR2_R::new((self.bits & 0xff) as u8) } } -#[doc = "HRC falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC falling edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`cr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CR2_SPEC; impl crate::RegisterSpec for CR2_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/dcf.rs b/src/hrpwm0_hrc0/dcf.rs index 0ebf652e..b2ad4e0c 100644 --- a/src/hrpwm0_hrc0/dcf.rs +++ b/src/hrpwm0_hrc0/dcf.rs @@ -9,7 +9,7 @@ impl R { DTFV_R::new((self.bits & 0xffff) as u16) } } -#[doc = "HRC dead time falling value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC dead time falling value\n\nYou can [`read`](crate::Reg::read) this register and get [`dcf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DCF_SPEC; impl crate::RegisterSpec for DCF_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/dcr.rs b/src/hrpwm0_hrc0/dcr.rs index c3a2350c..cade7002 100644 --- a/src/hrpwm0_hrc0/dcr.rs +++ b/src/hrpwm0_hrc0/dcr.rs @@ -9,7 +9,7 @@ impl R { DTRV_R::new((self.bits & 0xffff) as u16) } } -#[doc = "HRC dead time rising value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC dead time rising value\n\nYou can [`read`](crate::Reg::read) this register and get [`dcr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DCR_SPEC; impl crate::RegisterSpec for DCR_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/gc.rs b/src/hrpwm0_hrc0/gc.rs index 3c6f3fb0..68a23867 100644 --- a/src/hrpwm0_hrc0/gc.rs +++ b/src/hrpwm0_hrc0/gc.rs @@ -712,7 +712,7 @@ impl W { DTUS_W::new(self, 16) } } -#[doc = "HRC mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`gc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GC_SPEC; impl crate::RegisterSpec for GC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/gsel.rs b/src/hrpwm0_hrc0/gsel.rs index 94aa9c5f..20c8ddc0 100644 --- a/src/hrpwm0_hrc0/gsel.rs +++ b/src/hrpwm0_hrc0/gsel.rs @@ -1014,7 +1014,7 @@ impl W { C1ES_W::new(self, 28) } } -#[doc = "HRC global control selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC global control selection\n\nYou can [`read`](crate::Reg::read) this register and get [`gsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GSEL_SPEC; impl crate::RegisterSpec for GSEL_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/pl.rs b/src/hrpwm0_hrc0/pl.rs index d3d69c87..2601eacb 100644 --- a/src/hrpwm0_hrc0/pl.rs +++ b/src/hrpwm0_hrc0/pl.rs @@ -134,7 +134,7 @@ impl W { PSL1_W::new(self, 1) } } -#[doc = "HRC output passive level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC output passive level\n\nYou can [`read`](crate::Reg::read) this register and get [`pl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PL_SPEC; impl crate::RegisterSpec for PL_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/sc.rs b/src/hrpwm0_hrc0/sc.rs index eacb2e91..257e0413 100644 --- a/src/hrpwm0_hrc0/sc.rs +++ b/src/hrpwm0_hrc0/sc.rs @@ -43,7 +43,7 @@ impl R { ST_R::new((self.bits & 1) != 0) } } -#[doc = "HRC current source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC current source for shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`sc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SC_SPEC; impl crate::RegisterSpec for SC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/scr1.rs b/src/hrpwm0_hrc0/scr1.rs index 6c8be0b8..a6ab4ca2 100644 --- a/src/hrpwm0_hrc0/scr1.rs +++ b/src/hrpwm0_hrc0/scr1.rs @@ -21,7 +21,7 @@ impl W { SCR1_W::new(self, 0) } } -#[doc = "HRC shadow rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC shadow rising edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`scr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SCR1_SPEC; impl crate::RegisterSpec for SCR1_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/scr2.rs b/src/hrpwm0_hrc0/scr2.rs index b5f5d3ee..3e57a5d9 100644 --- a/src/hrpwm0_hrc0/scr2.rs +++ b/src/hrpwm0_hrc0/scr2.rs @@ -21,7 +21,7 @@ impl W { SCR2_W::new(self, 0) } } -#[doc = "HRC shadow falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC shadow falling edge value\n\nYou can [`read`](crate::Reg::read) this register and get [`scr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SCR2_SPEC; impl crate::RegisterSpec for SCR2_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/sdcf.rs b/src/hrpwm0_hrc0/sdcf.rs index ffb1c5ba..773aca69 100644 --- a/src/hrpwm0_hrc0/sdcf.rs +++ b/src/hrpwm0_hrc0/sdcf.rs @@ -21,7 +21,7 @@ impl W { SDTFV_W::new(self, 0) } } -#[doc = "HRC shadow dead time falling\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC shadow dead time falling\n\nYou can [`read`](crate::Reg::read) this register and get [`sdcf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdcf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SDCF_SPEC; impl crate::RegisterSpec for SDCF_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/sdcr.rs b/src/hrpwm0_hrc0/sdcr.rs index 14578a1f..baecffa5 100644 --- a/src/hrpwm0_hrc0/sdcr.rs +++ b/src/hrpwm0_hrc0/sdcr.rs @@ -21,7 +21,7 @@ impl W { SDTRV_W::new(self, 0) } } -#[doc = "HRC shadow dead time rising\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC shadow dead time rising\n\nYou can [`read`](crate::Reg::read) this register and get [`sdcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SDCR_SPEC; impl crate::RegisterSpec for SDCR_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/ssc.rs b/src/hrpwm0_hrc0/ssc.rs index f12f13f3..c61da752 100644 --- a/src/hrpwm0_hrc0/ssc.rs +++ b/src/hrpwm0_hrc0/ssc.rs @@ -70,7 +70,7 @@ impl W { SST_W::new(self, 0) } } -#[doc = "HRC next source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ssc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ssc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC next source for shadow\n\nYou can [`read`](crate::Reg::read) this register and get [`ssc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ssc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SSC_SPEC; impl crate::RegisterSpec for SSC_SPEC { type Ux = u32; diff --git a/src/hrpwm0_hrc0/tsel.rs b/src/hrpwm0_hrc0/tsel.rs index e12ff4f5..956f52db 100644 --- a/src/hrpwm0_hrc0/tsel.rs +++ b/src/hrpwm0_hrc0/tsel.rs @@ -328,7 +328,7 @@ impl W { TS1E_W::new(self, 17) } } -#[doc = "HRC timer selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HRC timer selection\n\nYou can [`read`](crate::Reg::read) this register and get [`tsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TSEL_SPEC; impl crate::RegisterSpec for TSEL_SPEC { type Ux = u32; diff --git a/src/ledts0.rs b/src/ledts0.rs index 080588b5..695b015b 100644 --- a/src/ledts0.rs +++ b/src/ledts0.rs @@ -70,57 +70,57 @@ impl RegisterBlock { &self.tscmp1 } } -#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; -#[doc = "GLOBCTL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globctl`] +#[doc = "GLOBCTL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globctl`] module"] pub type GLOBCTL = crate::Reg; #[doc = "Global Control Register"] pub mod globctl; -#[doc = "FNCTL (rw) register accessor: Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fnctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fnctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fnctl`] +#[doc = "FNCTL (rw) register accessor: Function Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fnctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fnctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fnctl`] module"] pub type FNCTL = crate::Reg; #[doc = "Function Control Register"] pub mod fnctl; -#[doc = "EVFR (rw) register accessor: Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evfr`] +#[doc = "EVFR (rw) register accessor: Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evfr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evfr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evfr`] module"] pub type EVFR = crate::Reg; #[doc = "Event Flag Register"] pub mod evfr; -#[doc = "TSVAL (rw) register accessor: Touch-sense TS-Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsval::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsval::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsval`] +#[doc = "TSVAL (rw) register accessor: Touch-sense TS-Counter Value\n\nYou can [`read`](crate::Reg::read) this register and get [`tsval::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsval::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsval`] module"] pub type TSVAL = crate::Reg; #[doc = "Touch-sense TS-Counter Value"] pub mod tsval; -#[doc = "LINE0 (rw) register accessor: Line Pattern Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line0`] +#[doc = "LINE0 (rw) register accessor: Line Pattern Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`line0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`line0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line0`] module"] pub type LINE0 = crate::Reg; #[doc = "Line Pattern Register 0"] pub mod line0; -#[doc = "LINE1 (rw) register accessor: Line Pattern Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line1`] +#[doc = "LINE1 (rw) register accessor: Line Pattern Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`line1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`line1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line1`] module"] pub type LINE1 = crate::Reg; #[doc = "Line Pattern Register 1"] pub mod line1; -#[doc = "LDCMP0 (rw) register accessor: LED Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp0`] +#[doc = "LDCMP0 (rw) register accessor: LED Compare Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ldcmp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ldcmp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp0`] module"] pub type LDCMP0 = crate::Reg; #[doc = "LED Compare Register 0"] pub mod ldcmp0; -#[doc = "LDCMP1 (rw) register accessor: LED Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp1`] +#[doc = "LDCMP1 (rw) register accessor: LED Compare Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ldcmp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ldcmp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp1`] module"] pub type LDCMP1 = crate::Reg; #[doc = "LED Compare Register 1"] pub mod ldcmp1; -#[doc = "TSCMP0 (rw) register accessor: Touch-sense Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp0`] +#[doc = "TSCMP0 (rw) register accessor: Touch-sense Compare Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`tscmp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tscmp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp0`] module"] pub type TSCMP0 = crate::Reg; #[doc = "Touch-sense Compare Register 0"] pub mod tscmp0; -#[doc = "TSCMP1 (rw) register accessor: Touch-sense Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp1`] +#[doc = "TSCMP1 (rw) register accessor: Touch-sense Compare Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`tscmp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tscmp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp1`] module"] pub type TSCMP1 = crate::Reg; #[doc = "Touch-sense Compare Register 1"] diff --git a/src/ledts0/evfr.rs b/src/ledts0/evfr.rs index c6a204b8..9bcaafb7 100644 --- a/src/ledts0/evfr.rs +++ b/src/ledts0/evfr.rs @@ -179,7 +179,7 @@ impl W { CTPF_W::new(self, 18) } } -#[doc = "Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evfr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evfr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EVFR_SPEC; impl crate::RegisterSpec for EVFR_SPEC { type Ux = u32; diff --git a/src/ledts0/fnctl.rs b/src/ledts0/fnctl.rs index 51a192de..978704a3 100644 --- a/src/ledts0/fnctl.rs +++ b/src/ledts0/fnctl.rs @@ -872,7 +872,7 @@ impl W { NR_LEDCOL_W::new(self, 29) } } -#[doc = "Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fnctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fnctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Function Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fnctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fnctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FNCTL_SPEC; impl crate::RegisterSpec for FNCTL_SPEC { type Ux = u32; diff --git a/src/ledts0/globctl.rs b/src/ledts0/globctl.rs index 25ba745b..b9892caa 100644 --- a/src/ledts0/globctl.rs +++ b/src/ledts0/globctl.rs @@ -583,7 +583,7 @@ impl W { CLK_PS_W::new(self, 16) } } -#[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBCTL_SPEC; impl crate::RegisterSpec for GLOBCTL_SPEC { type Ux = u32; diff --git a/src/ledts0/id.rs b/src/ledts0/id.rs index 4ea1846e..f9244740 100644 --- a/src/ledts0/id.rs +++ b/src/ledts0/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/ledts0/ldcmp0.rs b/src/ledts0/ldcmp0.rs index 85ffa9e5..aba89e1e 100644 --- a/src/ledts0/ldcmp0.rs +++ b/src/ledts0/ldcmp0.rs @@ -66,7 +66,7 @@ impl W { CMP_LD3_W::new(self, 24) } } -#[doc = "LED Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "LED Compare Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`ldcmp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ldcmp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LDCMP0_SPEC; impl crate::RegisterSpec for LDCMP0_SPEC { type Ux = u32; diff --git a/src/ledts0/ldcmp1.rs b/src/ledts0/ldcmp1.rs index c6d639b5..d50855cc 100644 --- a/src/ledts0/ldcmp1.rs +++ b/src/ledts0/ldcmp1.rs @@ -66,7 +66,7 @@ impl W { CMP_LDA_TSCOM_W::new(self, 24) } } -#[doc = "LED Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "LED Compare Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ldcmp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ldcmp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LDCMP1_SPEC; impl crate::RegisterSpec for LDCMP1_SPEC { type Ux = u32; diff --git a/src/ledts0/line0.rs b/src/ledts0/line0.rs index cde04a66..1bf75dc1 100644 --- a/src/ledts0/line0.rs +++ b/src/ledts0/line0.rs @@ -66,7 +66,7 @@ impl W { LINE_3_W::new(self, 24) } } -#[doc = "Line Pattern Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Line Pattern Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`line0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`line0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LINE0_SPEC; impl crate::RegisterSpec for LINE0_SPEC { type Ux = u32; diff --git a/src/ledts0/line1.rs b/src/ledts0/line1.rs index 5f456a80..1c0af34c 100644 --- a/src/ledts0/line1.rs +++ b/src/ledts0/line1.rs @@ -66,7 +66,7 @@ impl W { LINE_A_W::new(self, 24) } } -#[doc = "Line Pattern Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Line Pattern Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`line1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`line1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LINE1_SPEC; impl crate::RegisterSpec for LINE1_SPEC { type Ux = u32; diff --git a/src/ledts0/tscmp0.rs b/src/ledts0/tscmp0.rs index 76097681..fac583bc 100644 --- a/src/ledts0/tscmp0.rs +++ b/src/ledts0/tscmp0.rs @@ -66,7 +66,7 @@ impl W { CMP_TS3_W::new(self, 24) } } -#[doc = "Touch-sense Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Touch-sense Compare Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`tscmp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tscmp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TSCMP0_SPEC; impl crate::RegisterSpec for TSCMP0_SPEC { type Ux = u32; diff --git a/src/ledts0/tscmp1.rs b/src/ledts0/tscmp1.rs index 01d40ebc..da99af1d 100644 --- a/src/ledts0/tscmp1.rs +++ b/src/ledts0/tscmp1.rs @@ -66,7 +66,7 @@ impl W { CMP_TS7_W::new(self, 24) } } -#[doc = "Touch-sense Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Touch-sense Compare Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`tscmp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tscmp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TSCMP1_SPEC; impl crate::RegisterSpec for TSCMP1_SPEC { type Ux = u32; diff --git a/src/ledts0/tsval.rs b/src/ledts0/tsval.rs index 3e4c2391..c50a90f3 100644 --- a/src/ledts0/tsval.rs +++ b/src/ledts0/tsval.rs @@ -28,7 +28,7 @@ impl W { TSCTRVAL_W::new(self, 16) } } -#[doc = "Touch-sense TS-Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsval::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsval::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Touch-sense TS-Counter Value\n\nYou can [`read`](crate::Reg::read) this register and get [`tsval::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsval::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TSVAL_SPEC; impl crate::RegisterSpec for TSVAL_SPEC { type Ux = u32; diff --git a/src/lib.rs b/src/lib.rs index abda36bd..0fe5409d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,5 +1,5 @@ -#![doc = "Peripheral access API for XMC4400 microcontrollers (generated using svd2rust v0.33.3 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.3/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for XMC4400 microcontrollers (generated using svd2rust v0.33.4 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.4/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] @@ -9296,198 +9296,198 @@ impl Peripherals { pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals { - PPB: PPB { _marker: PhantomData }, - DLR: DLR { _marker: PhantomData }, - ERU0: ERU0 { _marker: PhantomData }, - ERU1: ERU1 { _marker: PhantomData }, - GPDMA0: GPDMA0 { _marker: PhantomData }, - GPDMA0_CH0: GPDMA0_CH0 { _marker: PhantomData }, - GPDMA0_CH1: GPDMA0_CH1 { _marker: PhantomData }, - GPDMA0_CH2: GPDMA0_CH2 { _marker: PhantomData }, - GPDMA0_CH3: GPDMA0_CH3 { _marker: PhantomData }, - GPDMA0_CH4: GPDMA0_CH4 { _marker: PhantomData }, - GPDMA0_CH5: GPDMA0_CH5 { _marker: PhantomData }, - GPDMA0_CH6: GPDMA0_CH6 { _marker: PhantomData }, - GPDMA0_CH7: GPDMA0_CH7 { _marker: PhantomData }, - FCE: FCE { _marker: PhantomData }, - FCE_KE0: FCE_KE0 { _marker: PhantomData }, - FCE_KE1: FCE_KE1 { _marker: PhantomData }, - FCE_KE2: FCE_KE2 { _marker: PhantomData }, - FCE_KE3: FCE_KE3 { _marker: PhantomData }, - PBA0: PBA0 { _marker: PhantomData }, - PBA1: PBA1 { _marker: PhantomData }, - FLASH0: FLASH0 { _marker: PhantomData }, - PREF: PREF { _marker: PhantomData }, - PMU0: PMU0 { _marker: PhantomData }, - WDT: WDT { _marker: PhantomData }, - RTC: RTC { _marker: PhantomData }, - SCU_CLK: SCU_CLK { _marker: PhantomData }, - SCU_OSC: SCU_OSC { _marker: PhantomData }, - SCU_PLL: SCU_PLL { _marker: PhantomData }, - SCU_GENERAL: SCU_GENERAL { _marker: PhantomData }, - SCU_INTERRUPT: SCU_INTERRUPT { _marker: PhantomData }, - SCU_PARITY: SCU_PARITY { _marker: PhantomData }, - SCU_TRAP: SCU_TRAP { _marker: PhantomData }, - SCU_HIBERNATE: SCU_HIBERNATE { _marker: PhantomData }, - SCU_POWER: SCU_POWER { _marker: PhantomData }, - SCU_RESET: SCU_RESET { _marker: PhantomData }, - LEDTS0: LEDTS0 { _marker: PhantomData }, - ETH0_CON: ETH0_CON { _marker: PhantomData }, - ETH0: ETH0 { _marker: PhantomData }, - USB0: USB0 { _marker: PhantomData }, - USB0_EP0: USB0_EP0 { _marker: PhantomData }, - USB0_EP1: USB0_EP1 { _marker: PhantomData }, - USB0_EP2: USB0_EP2 { _marker: PhantomData }, - USB0_EP3: USB0_EP3 { _marker: PhantomData }, - USB0_EP4: USB0_EP4 { _marker: PhantomData }, - USB0_EP5: USB0_EP5 { _marker: PhantomData }, - USB0_EP6: USB0_EP6 { _marker: PhantomData }, - USB0_CH0: USB0_CH0 { _marker: PhantomData }, - USB0_CH1: USB0_CH1 { _marker: PhantomData }, - USB0_CH2: USB0_CH2 { _marker: PhantomData }, - USB0_CH3: USB0_CH3 { _marker: PhantomData }, - USB0_CH4: USB0_CH4 { _marker: PhantomData }, - USB0_CH5: USB0_CH5 { _marker: PhantomData }, - USB0_CH6: USB0_CH6 { _marker: PhantomData }, - USB0_CH7: USB0_CH7 { _marker: PhantomData }, - USB0_CH8: USB0_CH8 { _marker: PhantomData }, - USB0_CH9: USB0_CH9 { _marker: PhantomData }, - USB0_CH10: USB0_CH10 { _marker: PhantomData }, - USB0_CH11: USB0_CH11 { _marker: PhantomData }, - USB0_CH12: USB0_CH12 { _marker: PhantomData }, - USB0_CH13: USB0_CH13 { _marker: PhantomData }, - USIC0: USIC0 { _marker: PhantomData }, - USIC1: USIC1 { _marker: PhantomData }, - USIC0_CH0: USIC0_CH0 { _marker: PhantomData }, - USIC0_CH1: USIC0_CH1 { _marker: PhantomData }, - USIC1_CH0: USIC1_CH0 { _marker: PhantomData }, - USIC1_CH1: USIC1_CH1 { _marker: PhantomData }, - CAN: CAN { _marker: PhantomData }, - CAN_NODE0: CAN_NODE0 { _marker: PhantomData }, - CAN_NODE1: CAN_NODE1 { _marker: PhantomData }, - CAN_MO0: CAN_MO0 { _marker: PhantomData }, - CAN_MO1: CAN_MO1 { _marker: PhantomData }, - CAN_MO2: CAN_MO2 { _marker: PhantomData }, - CAN_MO3: CAN_MO3 { _marker: PhantomData }, - CAN_MO4: CAN_MO4 { _marker: PhantomData }, - CAN_MO5: CAN_MO5 { _marker: PhantomData }, - CAN_MO6: CAN_MO6 { _marker: PhantomData }, - CAN_MO7: CAN_MO7 { _marker: PhantomData }, - CAN_MO8: CAN_MO8 { _marker: PhantomData }, - CAN_MO9: CAN_MO9 { _marker: PhantomData }, - CAN_MO10: CAN_MO10 { _marker: PhantomData }, - CAN_MO11: CAN_MO11 { _marker: PhantomData }, - CAN_MO12: CAN_MO12 { _marker: PhantomData }, - CAN_MO13: CAN_MO13 { _marker: PhantomData }, - CAN_MO14: CAN_MO14 { _marker: PhantomData }, - CAN_MO15: CAN_MO15 { _marker: PhantomData }, - CAN_MO16: CAN_MO16 { _marker: PhantomData }, - CAN_MO17: CAN_MO17 { _marker: PhantomData }, - CAN_MO18: CAN_MO18 { _marker: PhantomData }, - CAN_MO19: CAN_MO19 { _marker: PhantomData }, - CAN_MO20: CAN_MO20 { _marker: PhantomData }, - CAN_MO21: CAN_MO21 { _marker: PhantomData }, - CAN_MO22: CAN_MO22 { _marker: PhantomData }, - CAN_MO23: CAN_MO23 { _marker: PhantomData }, - CAN_MO24: CAN_MO24 { _marker: PhantomData }, - CAN_MO25: CAN_MO25 { _marker: PhantomData }, - CAN_MO26: CAN_MO26 { _marker: PhantomData }, - CAN_MO27: CAN_MO27 { _marker: PhantomData }, - CAN_MO28: CAN_MO28 { _marker: PhantomData }, - CAN_MO29: CAN_MO29 { _marker: PhantomData }, - CAN_MO30: CAN_MO30 { _marker: PhantomData }, - CAN_MO31: CAN_MO31 { _marker: PhantomData }, - CAN_MO32: CAN_MO32 { _marker: PhantomData }, - CAN_MO33: CAN_MO33 { _marker: PhantomData }, - CAN_MO34: CAN_MO34 { _marker: PhantomData }, - CAN_MO35: CAN_MO35 { _marker: PhantomData }, - CAN_MO36: CAN_MO36 { _marker: PhantomData }, - CAN_MO37: CAN_MO37 { _marker: PhantomData }, - CAN_MO38: CAN_MO38 { _marker: PhantomData }, - CAN_MO39: CAN_MO39 { _marker: PhantomData }, - CAN_MO40: CAN_MO40 { _marker: PhantomData }, - CAN_MO41: CAN_MO41 { _marker: PhantomData }, - CAN_MO42: CAN_MO42 { _marker: PhantomData }, - CAN_MO43: CAN_MO43 { _marker: PhantomData }, - CAN_MO44: CAN_MO44 { _marker: PhantomData }, - CAN_MO45: CAN_MO45 { _marker: PhantomData }, - CAN_MO46: CAN_MO46 { _marker: PhantomData }, - CAN_MO47: CAN_MO47 { _marker: PhantomData }, - CAN_MO48: CAN_MO48 { _marker: PhantomData }, - CAN_MO49: CAN_MO49 { _marker: PhantomData }, - CAN_MO50: CAN_MO50 { _marker: PhantomData }, - CAN_MO51: CAN_MO51 { _marker: PhantomData }, - CAN_MO52: CAN_MO52 { _marker: PhantomData }, - CAN_MO53: CAN_MO53 { _marker: PhantomData }, - CAN_MO54: CAN_MO54 { _marker: PhantomData }, - CAN_MO55: CAN_MO55 { _marker: PhantomData }, - CAN_MO56: CAN_MO56 { _marker: PhantomData }, - CAN_MO57: CAN_MO57 { _marker: PhantomData }, - CAN_MO58: CAN_MO58 { _marker: PhantomData }, - CAN_MO59: CAN_MO59 { _marker: PhantomData }, - CAN_MO60: CAN_MO60 { _marker: PhantomData }, - CAN_MO61: CAN_MO61 { _marker: PhantomData }, - CAN_MO62: CAN_MO62 { _marker: PhantomData }, - CAN_MO63: CAN_MO63 { _marker: PhantomData }, - VADC: VADC { _marker: PhantomData }, - VADC_G0: VADC_G0 { _marker: PhantomData }, - VADC_G1: VADC_G1 { _marker: PhantomData }, - VADC_G2: VADC_G2 { _marker: PhantomData }, - VADC_G3: VADC_G3 { _marker: PhantomData }, - DSD: DSD { _marker: PhantomData }, - DSD_CH0: DSD_CH0 { _marker: PhantomData }, - DSD_CH1: DSD_CH1 { _marker: PhantomData }, - DSD_CH2: DSD_CH2 { _marker: PhantomData }, - DSD_CH3: DSD_CH3 { _marker: PhantomData }, - DAC: DAC { _marker: PhantomData }, - CCU40: CCU40 { _marker: PhantomData }, - CCU41: CCU41 { _marker: PhantomData }, - CCU42: CCU42 { _marker: PhantomData }, - CCU43: CCU43 { _marker: PhantomData }, - CCU40_CC40: CCU40_CC40 { _marker: PhantomData }, - CCU40_CC41: CCU40_CC41 { _marker: PhantomData }, - CCU40_CC42: CCU40_CC42 { _marker: PhantomData }, - CCU40_CC43: CCU40_CC43 { _marker: PhantomData }, - CCU41_CC40: CCU41_CC40 { _marker: PhantomData }, - CCU41_CC41: CCU41_CC41 { _marker: PhantomData }, - CCU41_CC42: CCU41_CC42 { _marker: PhantomData }, - CCU41_CC43: CCU41_CC43 { _marker: PhantomData }, - CCU42_CC40: CCU42_CC40 { _marker: PhantomData }, - CCU42_CC41: CCU42_CC41 { _marker: PhantomData }, - CCU42_CC42: CCU42_CC42 { _marker: PhantomData }, - CCU42_CC43: CCU42_CC43 { _marker: PhantomData }, - CCU43_CC40: CCU43_CC40 { _marker: PhantomData }, - CCU43_CC41: CCU43_CC41 { _marker: PhantomData }, - CCU43_CC42: CCU43_CC42 { _marker: PhantomData }, - CCU43_CC43: CCU43_CC43 { _marker: PhantomData }, - CCU80: CCU80 { _marker: PhantomData }, - CCU81: CCU81 { _marker: PhantomData }, - CCU80_CC80: CCU80_CC80 { _marker: PhantomData }, - CCU80_CC81: CCU80_CC81 { _marker: PhantomData }, - CCU80_CC82: CCU80_CC82 { _marker: PhantomData }, - CCU80_CC83: CCU80_CC83 { _marker: PhantomData }, - CCU81_CC80: CCU81_CC80 { _marker: PhantomData }, - CCU81_CC81: CCU81_CC81 { _marker: PhantomData }, - CCU81_CC82: CCU81_CC82 { _marker: PhantomData }, - CCU81_CC83: CCU81_CC83 { _marker: PhantomData }, - HRPWM0: HRPWM0 { _marker: PhantomData }, - HRPWM0_CSG0: HRPWM0_CSG0 { _marker: PhantomData }, - HRPWM0_CSG1: HRPWM0_CSG1 { _marker: PhantomData }, - HRPWM0_CSG2: HRPWM0_CSG2 { _marker: PhantomData }, - HRPWM0_HRC0: HRPWM0_HRC0 { _marker: PhantomData }, - HRPWM0_HRC1: HRPWM0_HRC1 { _marker: PhantomData }, - HRPWM0_HRC2: HRPWM0_HRC2 { _marker: PhantomData }, - HRPWM0_HRC3: HRPWM0_HRC3 { _marker: PhantomData }, - POSIF0: POSIF0 { _marker: PhantomData }, - POSIF1: POSIF1 { _marker: PhantomData }, - PORT0: PORT0 { _marker: PhantomData }, - PORT1: PORT1 { _marker: PhantomData }, - PORT2: PORT2 { _marker: PhantomData }, - PORT3: PORT3 { _marker: PhantomData }, - PORT4: PORT4 { _marker: PhantomData }, - PORT5: PORT5 { _marker: PhantomData }, - PORT14: PORT14 { _marker: PhantomData }, - PORT15: PORT15 { _marker: PhantomData }, + PPB: PPB::steal(), + DLR: DLR::steal(), + ERU0: ERU0::steal(), + ERU1: ERU1::steal(), + GPDMA0: GPDMA0::steal(), + GPDMA0_CH0: GPDMA0_CH0::steal(), + GPDMA0_CH1: GPDMA0_CH1::steal(), + GPDMA0_CH2: GPDMA0_CH2::steal(), + GPDMA0_CH3: GPDMA0_CH3::steal(), + GPDMA0_CH4: GPDMA0_CH4::steal(), + GPDMA0_CH5: GPDMA0_CH5::steal(), + GPDMA0_CH6: GPDMA0_CH6::steal(), + GPDMA0_CH7: GPDMA0_CH7::steal(), + FCE: FCE::steal(), + FCE_KE0: FCE_KE0::steal(), + FCE_KE1: FCE_KE1::steal(), + FCE_KE2: FCE_KE2::steal(), + FCE_KE3: FCE_KE3::steal(), + PBA0: PBA0::steal(), + PBA1: PBA1::steal(), + FLASH0: FLASH0::steal(), + PREF: PREF::steal(), + PMU0: PMU0::steal(), + WDT: WDT::steal(), + RTC: RTC::steal(), + SCU_CLK: SCU_CLK::steal(), + SCU_OSC: SCU_OSC::steal(), + SCU_PLL: SCU_PLL::steal(), + SCU_GENERAL: SCU_GENERAL::steal(), + SCU_INTERRUPT: SCU_INTERRUPT::steal(), + SCU_PARITY: SCU_PARITY::steal(), + SCU_TRAP: SCU_TRAP::steal(), + SCU_HIBERNATE: SCU_HIBERNATE::steal(), + SCU_POWER: SCU_POWER::steal(), + SCU_RESET: SCU_RESET::steal(), + LEDTS0: LEDTS0::steal(), + ETH0_CON: ETH0_CON::steal(), + ETH0: ETH0::steal(), + USB0: USB0::steal(), + USB0_EP0: USB0_EP0::steal(), + USB0_EP1: USB0_EP1::steal(), + USB0_EP2: USB0_EP2::steal(), + USB0_EP3: USB0_EP3::steal(), + USB0_EP4: USB0_EP4::steal(), + USB0_EP5: USB0_EP5::steal(), + USB0_EP6: USB0_EP6::steal(), + USB0_CH0: USB0_CH0::steal(), + USB0_CH1: USB0_CH1::steal(), + USB0_CH2: USB0_CH2::steal(), + USB0_CH3: USB0_CH3::steal(), + USB0_CH4: USB0_CH4::steal(), + USB0_CH5: USB0_CH5::steal(), + USB0_CH6: USB0_CH6::steal(), + USB0_CH7: USB0_CH7::steal(), + USB0_CH8: USB0_CH8::steal(), + USB0_CH9: USB0_CH9::steal(), + USB0_CH10: USB0_CH10::steal(), + USB0_CH11: USB0_CH11::steal(), + USB0_CH12: USB0_CH12::steal(), + USB0_CH13: USB0_CH13::steal(), + USIC0: USIC0::steal(), + USIC1: USIC1::steal(), + USIC0_CH0: USIC0_CH0::steal(), + USIC0_CH1: USIC0_CH1::steal(), + USIC1_CH0: USIC1_CH0::steal(), + USIC1_CH1: USIC1_CH1::steal(), + CAN: CAN::steal(), + CAN_NODE0: CAN_NODE0::steal(), + CAN_NODE1: CAN_NODE1::steal(), + CAN_MO0: CAN_MO0::steal(), + CAN_MO1: CAN_MO1::steal(), + CAN_MO2: CAN_MO2::steal(), + CAN_MO3: CAN_MO3::steal(), + CAN_MO4: CAN_MO4::steal(), + CAN_MO5: CAN_MO5::steal(), + CAN_MO6: CAN_MO6::steal(), + CAN_MO7: CAN_MO7::steal(), + CAN_MO8: CAN_MO8::steal(), + CAN_MO9: CAN_MO9::steal(), + CAN_MO10: CAN_MO10::steal(), + CAN_MO11: CAN_MO11::steal(), + CAN_MO12: CAN_MO12::steal(), + CAN_MO13: CAN_MO13::steal(), + CAN_MO14: CAN_MO14::steal(), + CAN_MO15: CAN_MO15::steal(), + CAN_MO16: CAN_MO16::steal(), + CAN_MO17: CAN_MO17::steal(), + CAN_MO18: CAN_MO18::steal(), + CAN_MO19: CAN_MO19::steal(), + CAN_MO20: CAN_MO20::steal(), + CAN_MO21: CAN_MO21::steal(), + CAN_MO22: CAN_MO22::steal(), + CAN_MO23: CAN_MO23::steal(), + CAN_MO24: CAN_MO24::steal(), + CAN_MO25: CAN_MO25::steal(), + CAN_MO26: CAN_MO26::steal(), + CAN_MO27: CAN_MO27::steal(), + CAN_MO28: CAN_MO28::steal(), + CAN_MO29: CAN_MO29::steal(), + CAN_MO30: CAN_MO30::steal(), + CAN_MO31: CAN_MO31::steal(), + CAN_MO32: CAN_MO32::steal(), + CAN_MO33: CAN_MO33::steal(), + CAN_MO34: CAN_MO34::steal(), + CAN_MO35: CAN_MO35::steal(), + CAN_MO36: CAN_MO36::steal(), + CAN_MO37: CAN_MO37::steal(), + CAN_MO38: CAN_MO38::steal(), + CAN_MO39: CAN_MO39::steal(), + CAN_MO40: CAN_MO40::steal(), + CAN_MO41: CAN_MO41::steal(), + CAN_MO42: CAN_MO42::steal(), + CAN_MO43: CAN_MO43::steal(), + CAN_MO44: CAN_MO44::steal(), + CAN_MO45: CAN_MO45::steal(), + CAN_MO46: CAN_MO46::steal(), + CAN_MO47: CAN_MO47::steal(), + CAN_MO48: CAN_MO48::steal(), + CAN_MO49: CAN_MO49::steal(), + CAN_MO50: CAN_MO50::steal(), + CAN_MO51: CAN_MO51::steal(), + CAN_MO52: CAN_MO52::steal(), + CAN_MO53: CAN_MO53::steal(), + CAN_MO54: CAN_MO54::steal(), + CAN_MO55: CAN_MO55::steal(), + CAN_MO56: CAN_MO56::steal(), + CAN_MO57: CAN_MO57::steal(), + CAN_MO58: CAN_MO58::steal(), + CAN_MO59: CAN_MO59::steal(), + CAN_MO60: CAN_MO60::steal(), + CAN_MO61: CAN_MO61::steal(), + CAN_MO62: CAN_MO62::steal(), + CAN_MO63: CAN_MO63::steal(), + VADC: VADC::steal(), + VADC_G0: VADC_G0::steal(), + VADC_G1: VADC_G1::steal(), + VADC_G2: VADC_G2::steal(), + VADC_G3: VADC_G3::steal(), + DSD: DSD::steal(), + DSD_CH0: DSD_CH0::steal(), + DSD_CH1: DSD_CH1::steal(), + DSD_CH2: DSD_CH2::steal(), + DSD_CH3: DSD_CH3::steal(), + DAC: DAC::steal(), + CCU40: CCU40::steal(), + CCU41: CCU41::steal(), + CCU42: CCU42::steal(), + CCU43: CCU43::steal(), + CCU40_CC40: CCU40_CC40::steal(), + CCU40_CC41: CCU40_CC41::steal(), + CCU40_CC42: CCU40_CC42::steal(), + CCU40_CC43: CCU40_CC43::steal(), + CCU41_CC40: CCU41_CC40::steal(), + CCU41_CC41: CCU41_CC41::steal(), + CCU41_CC42: CCU41_CC42::steal(), + CCU41_CC43: CCU41_CC43::steal(), + CCU42_CC40: CCU42_CC40::steal(), + CCU42_CC41: CCU42_CC41::steal(), + CCU42_CC42: CCU42_CC42::steal(), + CCU42_CC43: CCU42_CC43::steal(), + CCU43_CC40: CCU43_CC40::steal(), + CCU43_CC41: CCU43_CC41::steal(), + CCU43_CC42: CCU43_CC42::steal(), + CCU43_CC43: CCU43_CC43::steal(), + CCU80: CCU80::steal(), + CCU81: CCU81::steal(), + CCU80_CC80: CCU80_CC80::steal(), + CCU80_CC81: CCU80_CC81::steal(), + CCU80_CC82: CCU80_CC82::steal(), + CCU80_CC83: CCU80_CC83::steal(), + CCU81_CC80: CCU81_CC80::steal(), + CCU81_CC81: CCU81_CC81::steal(), + CCU81_CC82: CCU81_CC82::steal(), + CCU81_CC83: CCU81_CC83::steal(), + HRPWM0: HRPWM0::steal(), + HRPWM0_CSG0: HRPWM0_CSG0::steal(), + HRPWM0_CSG1: HRPWM0_CSG1::steal(), + HRPWM0_CSG2: HRPWM0_CSG2::steal(), + HRPWM0_HRC0: HRPWM0_HRC0::steal(), + HRPWM0_HRC1: HRPWM0_HRC1::steal(), + HRPWM0_HRC2: HRPWM0_HRC2::steal(), + HRPWM0_HRC3: HRPWM0_HRC3::steal(), + POSIF0: POSIF0::steal(), + POSIF1: POSIF1::steal(), + PORT0: PORT0::steal(), + PORT1: PORT1::steal(), + PORT2: PORT2::steal(), + PORT3: PORT3::steal(), + PORT4: PORT4::steal(), + PORT5: PORT5::steal(), + PORT14: PORT14::steal(), + PORT15: PORT15::steal(), } } } diff --git a/src/pba0.rs b/src/pba0.rs index 3a2ce5a7..a2966cc6 100644 --- a/src/pba0.rs +++ b/src/pba0.rs @@ -16,12 +16,12 @@ impl RegisterBlock { &self.waddr } } -#[doc = "STS (rw) register accessor: Peripheral Bridge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] +#[doc = "STS (rw) register accessor: Peripheral Bridge Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] module"] pub type STS = crate::Reg; #[doc = "Peripheral Bridge Status Register"] pub mod sts; -#[doc = "WADDR (r) register accessor: PBA Write Error Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waddr`] +#[doc = "WADDR (r) register accessor: PBA Write Error Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`waddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waddr`] module"] pub type WADDR = crate::Reg; #[doc = "PBA Write Error Address Register"] diff --git a/src/pba0/sts.rs b/src/pba0/sts.rs index 6d67bb1e..b968864a 100644 --- a/src/pba0/sts.rs +++ b/src/pba0/sts.rs @@ -70,7 +70,7 @@ impl W { WERR_W::new(self, 0) } } -#[doc = "Peripheral Bridge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral Bridge Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STS_SPEC; impl crate::RegisterSpec for STS_SPEC { type Ux = u32; diff --git a/src/pba0/waddr.rs b/src/pba0/waddr.rs index 58df48e8..c8923cbd 100644 --- a/src/pba0/waddr.rs +++ b/src/pba0/waddr.rs @@ -9,7 +9,7 @@ impl R { WADDR_R::new(self.bits) } } -#[doc = "PBA Write Error Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waddr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PBA Write Error Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`waddr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct WADDR_SPEC; impl crate::RegisterSpec for WADDR_SPEC { type Ux = u32; diff --git a/src/pmu0.rs b/src/pmu0.rs index 390f147e..65df476d 100644 --- a/src/pmu0.rs +++ b/src/pmu0.rs @@ -10,7 +10,7 @@ impl RegisterBlock { &self.id } } -#[doc = "ID (r) register accessor: PMU0 Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: PMU0 Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "PMU0 Identification Register"] diff --git a/src/pmu0/id.rs b/src/pmu0/id.rs index 407391e3..5135f0bd 100644 --- a/src/pmu0/id.rs +++ b/src/pmu0/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "PMU0 Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PMU0 Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/port0.rs b/src/port0.rs index 82292744..3bde887d 100644 --- a/src/port0.rs +++ b/src/port0.rs @@ -81,62 +81,62 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 0 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 0 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 0 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 0 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 0 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 0 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IOCR4 (rw) register accessor: Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] +#[doc = "IOCR4 (rw) register accessor: Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] pub type IOCR4 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 4"] pub mod iocr4; -#[doc = "IOCR8 (rw) register accessor: Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] +#[doc = "IOCR8 (rw) register accessor: Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] pub type IOCR8 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 8"] pub mod iocr8; -#[doc = "IOCR12 (rw) register accessor: Port 0 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] +#[doc = "IOCR12 (rw) register accessor: Port 0 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] pub type IOCR12 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 12"] pub mod iocr12; -#[doc = "IN (r) register accessor: Port 0 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 0 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 0 Input Register"] pub mod in_; -#[doc = "PDR0 (rw) register accessor: Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] +#[doc = "PDR0 (rw) register accessor: Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] pub type PDR0 = crate::Reg; #[doc = "Port 0 Pad Driver Mode 0 Register"] pub mod pdr0; -#[doc = "PDR1 (rw) register accessor: Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] +#[doc = "PDR1 (rw) register accessor: Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] pub type PDR1 = crate::Reg; #[doc = "Port 0 Pad Driver Mode 1 Register"] pub mod pdr1; -#[doc = "PDISC (r) register accessor: Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (r) register accessor: Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 0 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 0 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 0 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 0 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 0 Pin Hardware Select Register"] diff --git a/src/port0/hwsel.rs b/src/port0/hwsel.rs index f9f61efc..5cfcc8ba 100644 --- a/src/port0/hwsel.rs +++ b/src/port0/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port0/in_.rs b/src/port0/in_.rs index 57f6bb30..9c575660 100644 --- a/src/port0/in_.rs +++ b/src/port0/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 0 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port0/iocr0.rs b/src/port0/iocr0.rs index e6da7548..a979a70d 100644 --- a/src/port0/iocr0.rs +++ b/src/port0/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port0/iocr12.rs b/src/port0/iocr12.rs index 020eae93..4c7ff187 100644 --- a/src/port0/iocr12.rs +++ b/src/port0/iocr12.rs @@ -1122,7 +1122,7 @@ impl W { PC15_W::new(self, 27) } } -#[doc = "Port 0 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR12_SPEC; impl crate::RegisterSpec for IOCR12_SPEC { type Ux = u32; diff --git a/src/port0/iocr4.rs b/src/port0/iocr4.rs index 4a1127f6..3b8acd10 100644 --- a/src/port0/iocr4.rs +++ b/src/port0/iocr4.rs @@ -1122,7 +1122,7 @@ impl W { PC7_W::new(self, 27) } } -#[doc = "Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR4_SPEC; impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; diff --git a/src/port0/iocr8.rs b/src/port0/iocr8.rs index a0880880..24c0b59c 100644 --- a/src/port0/iocr8.rs +++ b/src/port0/iocr8.rs @@ -1122,7 +1122,7 @@ impl W { PC11_W::new(self, 27) } } -#[doc = "Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR8_SPEC; impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; diff --git a/src/port0/omr.rs b/src/port0/omr.rs index 2ec0c14e..583993ec 100644 --- a/src/port0/omr.rs +++ b/src/port0/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 0 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port0/out.rs b/src/port0/out.rs index fdd19cef..9c557f64 100644 --- a/src/port0/out.rs +++ b/src/port0/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 0 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port0/pdisc.rs b/src/port0/pdisc.rs index a3f48399..afa69482 100644 --- a/src/port0/pdisc.rs +++ b/src/port0/pdisc.rs @@ -658,7 +658,7 @@ impl R { PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port0/pdr0.rs b/src/port0/pdr0.rs index f7362a47..e86c3324 100644 --- a/src/port0/pdr0.rs +++ b/src/port0/pdr0.rs @@ -126,7 +126,7 @@ impl W { PD7_W::new(self, 28) } } -#[doc = "Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR0_SPEC; impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; diff --git a/src/port0/pdr1.rs b/src/port0/pdr1.rs index af072bf2..1e85b35c 100644 --- a/src/port0/pdr1.rs +++ b/src/port0/pdr1.rs @@ -126,7 +126,7 @@ impl W { PD15_W::new(self, 28) } } -#[doc = "Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR1_SPEC; impl crate::RegisterSpec for PDR1_SPEC { type Ux = u32; diff --git a/src/port0/pps.rs b/src/port0/pps.rs index 0343eeef..84439952 100644 --- a/src/port0/pps.rs +++ b/src/port0/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 0 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 0 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/port1.rs b/src/port1.rs index fc68f077..9bd22976 100644 --- a/src/port1.rs +++ b/src/port1.rs @@ -81,62 +81,62 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 1 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 1 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 1 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 1 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 1 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 1 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IOCR4 (rw) register accessor: Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] +#[doc = "IOCR4 (rw) register accessor: Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] pub type IOCR4 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 4"] pub mod iocr4; -#[doc = "IOCR8 (rw) register accessor: Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] +#[doc = "IOCR8 (rw) register accessor: Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] pub type IOCR8 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 8"] pub mod iocr8; -#[doc = "IOCR12 (rw) register accessor: Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] +#[doc = "IOCR12 (rw) register accessor: Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] pub type IOCR12 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 12"] pub mod iocr12; -#[doc = "IN (r) register accessor: Port 1 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 1 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 1 Input Register"] pub mod in_; -#[doc = "PDR0 (rw) register accessor: Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] +#[doc = "PDR0 (rw) register accessor: Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] pub type PDR0 = crate::Reg; #[doc = "Port 1 Pad Driver Mode 0 Register"] pub mod pdr0; -#[doc = "PDR1 (rw) register accessor: Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] +#[doc = "PDR1 (rw) register accessor: Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] pub type PDR1 = crate::Reg; #[doc = "Port 1 Pad Driver Mode 1 Register"] pub mod pdr1; -#[doc = "PDISC (r) register accessor: Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (r) register accessor: Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 1 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 1 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 1 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 1 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 1 Pin Hardware Select Register"] diff --git a/src/port1/hwsel.rs b/src/port1/hwsel.rs index c4fd72e7..ab5157e6 100644 --- a/src/port1/hwsel.rs +++ b/src/port1/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port1/in_.rs b/src/port1/in_.rs index c41c6035..1c236e88 100644 --- a/src/port1/in_.rs +++ b/src/port1/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 1 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port1/iocr0.rs b/src/port1/iocr0.rs index 8e9b19af..56713514 100644 --- a/src/port1/iocr0.rs +++ b/src/port1/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port1/iocr12.rs b/src/port1/iocr12.rs index d4e55b43..ca619f3a 100644 --- a/src/port1/iocr12.rs +++ b/src/port1/iocr12.rs @@ -1122,7 +1122,7 @@ impl W { PC15_W::new(self, 27) } } -#[doc = "Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR12_SPEC; impl crate::RegisterSpec for IOCR12_SPEC { type Ux = u32; diff --git a/src/port1/iocr4.rs b/src/port1/iocr4.rs index 098589b3..f8d058da 100644 --- a/src/port1/iocr4.rs +++ b/src/port1/iocr4.rs @@ -1122,7 +1122,7 @@ impl W { PC7_W::new(self, 27) } } -#[doc = "Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR4_SPEC; impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; diff --git a/src/port1/iocr8.rs b/src/port1/iocr8.rs index aac91600..20b818bb 100644 --- a/src/port1/iocr8.rs +++ b/src/port1/iocr8.rs @@ -1122,7 +1122,7 @@ impl W { PC11_W::new(self, 27) } } -#[doc = "Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR8_SPEC; impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; diff --git a/src/port1/omr.rs b/src/port1/omr.rs index 0d8cbaf2..f6583148 100644 --- a/src/port1/omr.rs +++ b/src/port1/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 1 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port1/out.rs b/src/port1/out.rs index f1b5f9ac..1ecdc3ca 100644 --- a/src/port1/out.rs +++ b/src/port1/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 1 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port1/pdisc.rs b/src/port1/pdisc.rs index 438099ed..ee3634fa 100644 --- a/src/port1/pdisc.rs +++ b/src/port1/pdisc.rs @@ -658,7 +658,7 @@ impl R { PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port1/pdr0.rs b/src/port1/pdr0.rs index 1b79bab1..b35f448c 100644 --- a/src/port1/pdr0.rs +++ b/src/port1/pdr0.rs @@ -126,7 +126,7 @@ impl W { PD7_W::new(self, 28) } } -#[doc = "Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR0_SPEC; impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; diff --git a/src/port1/pdr1.rs b/src/port1/pdr1.rs index 56e238e2..c4d9bc79 100644 --- a/src/port1/pdr1.rs +++ b/src/port1/pdr1.rs @@ -126,7 +126,7 @@ impl W { PD15_W::new(self, 28) } } -#[doc = "Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR1_SPEC; impl crate::RegisterSpec for PDR1_SPEC { type Ux = u32; diff --git a/src/port1/pps.rs b/src/port1/pps.rs index 3356c5f5..b204d790 100644 --- a/src/port1/pps.rs +++ b/src/port1/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 1 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 1 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/port14.rs b/src/port14.rs index 11d83857..51333665 100644 --- a/src/port14.rs +++ b/src/port14.rs @@ -68,52 +68,52 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 14 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 14 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 14 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 14 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 14 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 14 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IOCR4 (rw) register accessor: Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] +#[doc = "IOCR4 (rw) register accessor: Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] pub type IOCR4 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 4"] pub mod iocr4; -#[doc = "IOCR8 (rw) register accessor: Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] +#[doc = "IOCR8 (rw) register accessor: Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] pub type IOCR8 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 8"] pub mod iocr8; -#[doc = "IOCR12 (rw) register accessor: Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] +#[doc = "IOCR12 (rw) register accessor: Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] pub type IOCR12 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 12"] pub mod iocr12; -#[doc = "IN (r) register accessor: Port 14 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 14 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 14 Input Register"] pub mod in_; -#[doc = "PDISC (rw) register accessor: Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (rw) register accessor: Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdisc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 14 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 14 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 14 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 14 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 14 Pin Hardware Select Register"] diff --git a/src/port14/hwsel.rs b/src/port14/hwsel.rs index a9c6c7cd..b3ef0e79 100644 --- a/src/port14/hwsel.rs +++ b/src/port14/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port14/in_.rs b/src/port14/in_.rs index eb4f9a66..6ffa1518 100644 --- a/src/port14/in_.rs +++ b/src/port14/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 14 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port14/iocr0.rs b/src/port14/iocr0.rs index 5b2df41f..8f6da63d 100644 --- a/src/port14/iocr0.rs +++ b/src/port14/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port14/iocr12.rs b/src/port14/iocr12.rs index c18d67d5..625be6f4 100644 --- a/src/port14/iocr12.rs +++ b/src/port14/iocr12.rs @@ -1122,7 +1122,7 @@ impl W { PC15_W::new(self, 27) } } -#[doc = "Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR12_SPEC; impl crate::RegisterSpec for IOCR12_SPEC { type Ux = u32; diff --git a/src/port14/iocr4.rs b/src/port14/iocr4.rs index 297e0bf9..cbf8f808 100644 --- a/src/port14/iocr4.rs +++ b/src/port14/iocr4.rs @@ -1122,7 +1122,7 @@ impl W { PC7_W::new(self, 27) } } -#[doc = "Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR4_SPEC; impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; diff --git a/src/port14/iocr8.rs b/src/port14/iocr8.rs index d7dc8b59..f0261686 100644 --- a/src/port14/iocr8.rs +++ b/src/port14/iocr8.rs @@ -1122,7 +1122,7 @@ impl W { PC11_W::new(self, 27) } } -#[doc = "Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR8_SPEC; impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; diff --git a/src/port14/omr.rs b/src/port14/omr.rs index e15bc62b..3a804c69 100644 --- a/src/port14/omr.rs +++ b/src/port14/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 14 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port14/out.rs b/src/port14/out.rs index 694985fd..a16ae658 100644 --- a/src/port14/out.rs +++ b/src/port14/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 14 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port14/pdisc.rs b/src/port14/pdisc.rs index 09ccb15f..85e55766 100644 --- a/src/port14/pdisc.rs +++ b/src/port14/pdisc.rs @@ -1030,7 +1030,7 @@ impl W { PDIS15_W::new(self, 15) } } -#[doc = "Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdisc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port14/pps.rs b/src/port14/pps.rs index 1aeb33db..2d39eb8c 100644 --- a/src/port14/pps.rs +++ b/src/port14/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 14 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 14 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/port15.rs b/src/port15.rs index ad47f38b..4f8ffb42 100644 --- a/src/port15.rs +++ b/src/port15.rs @@ -62,47 +62,47 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 15 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 15 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 15 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 15 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 15 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 15 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 15 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 15 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 15 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IOCR4 (rw) register accessor: Port 15 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] +#[doc = "IOCR4 (rw) register accessor: Port 15 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] pub type IOCR4 = crate::Reg; #[doc = "Port 15 Input/Output Control Register 4"] pub mod iocr4; -#[doc = "IOCR8 (rw) register accessor: Port 15 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] +#[doc = "IOCR8 (rw) register accessor: Port 15 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] pub type IOCR8 = crate::Reg; #[doc = "Port 15 Input/Output Control Register 8"] pub mod iocr8; -#[doc = "IN (r) register accessor: Port 15 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 15 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 15 Input Register"] pub mod in_; -#[doc = "PDISC (rw) register accessor: Port 15 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (rw) register accessor: Port 15 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdisc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 15 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 15 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 15 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 15 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 15 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 15 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 15 Pin Hardware Select Register"] diff --git a/src/port15/hwsel.rs b/src/port15/hwsel.rs index e0b62e2a..4018e41b 100644 --- a/src/port15/hwsel.rs +++ b/src/port15/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 15 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port15/in_.rs b/src/port15/in_.rs index cd5b6609..289573b7 100644 --- a/src/port15/in_.rs +++ b/src/port15/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 15 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port15/iocr0.rs b/src/port15/iocr0.rs index 9df58241..31bd6e40 100644 --- a/src/port15/iocr0.rs +++ b/src/port15/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 15 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port15/iocr4.rs b/src/port15/iocr4.rs index db351e6e..73f3b958 100644 --- a/src/port15/iocr4.rs +++ b/src/port15/iocr4.rs @@ -1122,7 +1122,7 @@ impl W { PC7_W::new(self, 27) } } -#[doc = "Port 15 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR4_SPEC; impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; diff --git a/src/port15/iocr8.rs b/src/port15/iocr8.rs index c25a3085..86c8311a 100644 --- a/src/port15/iocr8.rs +++ b/src/port15/iocr8.rs @@ -1122,7 +1122,7 @@ impl W { PC11_W::new(self, 27) } } -#[doc = "Port 15 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR8_SPEC; impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; diff --git a/src/port15/omr.rs b/src/port15/omr.rs index 6f4bda79..10b3e273 100644 --- a/src/port15/omr.rs +++ b/src/port15/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 15 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port15/out.rs b/src/port15/out.rs index 5e91c34c..3c4999f1 100644 --- a/src/port15/out.rs +++ b/src/port15/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 15 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port15/pdisc.rs b/src/port15/pdisc.rs index 20a71cc9..79db1b20 100644 --- a/src/port15/pdisc.rs +++ b/src/port15/pdisc.rs @@ -1030,7 +1030,7 @@ impl W { PDIS15_W::new(self, 15) } } -#[doc = "Port 15 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdisc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port15/pps.rs b/src/port15/pps.rs index ed2104d2..95abfdd1 100644 --- a/src/port15/pps.rs +++ b/src/port15/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 15 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 15 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/port2.rs b/src/port2.rs index 4f856c7e..b6ac3f95 100644 --- a/src/port2.rs +++ b/src/port2.rs @@ -81,62 +81,62 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 2 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 2 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 2 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 2 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 2 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 2 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IOCR4 (rw) register accessor: Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] +#[doc = "IOCR4 (rw) register accessor: Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] pub type IOCR4 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 4"] pub mod iocr4; -#[doc = "IOCR8 (rw) register accessor: Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] +#[doc = "IOCR8 (rw) register accessor: Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] pub type IOCR8 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 8"] pub mod iocr8; -#[doc = "IOCR12 (rw) register accessor: Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] +#[doc = "IOCR12 (rw) register accessor: Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] pub type IOCR12 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 12"] pub mod iocr12; -#[doc = "IN (r) register accessor: Port 2 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 2 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 2 Input Register"] pub mod in_; -#[doc = "PDR0 (rw) register accessor: Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] +#[doc = "PDR0 (rw) register accessor: Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] pub type PDR0 = crate::Reg; #[doc = "Port 2 Pad Driver Mode 0 Register"] pub mod pdr0; -#[doc = "PDR1 (rw) register accessor: Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] +#[doc = "PDR1 (rw) register accessor: Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] pub type PDR1 = crate::Reg; #[doc = "Port 2 Pad Driver Mode 1 Register"] pub mod pdr1; -#[doc = "PDISC (r) register accessor: Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (r) register accessor: Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 2 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 2 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 2 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 2 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 2 Pin Hardware Select Register"] diff --git a/src/port2/hwsel.rs b/src/port2/hwsel.rs index 955f98a6..9986fc21 100644 --- a/src/port2/hwsel.rs +++ b/src/port2/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port2/in_.rs b/src/port2/in_.rs index 6b449942..a96d114e 100644 --- a/src/port2/in_.rs +++ b/src/port2/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 2 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port2/iocr0.rs b/src/port2/iocr0.rs index 1d2f1f27..90b88b3d 100644 --- a/src/port2/iocr0.rs +++ b/src/port2/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port2/iocr12.rs b/src/port2/iocr12.rs index ae74f572..4f8b652e 100644 --- a/src/port2/iocr12.rs +++ b/src/port2/iocr12.rs @@ -1122,7 +1122,7 @@ impl W { PC15_W::new(self, 27) } } -#[doc = "Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR12_SPEC; impl crate::RegisterSpec for IOCR12_SPEC { type Ux = u32; diff --git a/src/port2/iocr4.rs b/src/port2/iocr4.rs index f2b24aa0..27fbc929 100644 --- a/src/port2/iocr4.rs +++ b/src/port2/iocr4.rs @@ -1122,7 +1122,7 @@ impl W { PC7_W::new(self, 27) } } -#[doc = "Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR4_SPEC; impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; diff --git a/src/port2/iocr8.rs b/src/port2/iocr8.rs index 5c7e10cd..d8b10679 100644 --- a/src/port2/iocr8.rs +++ b/src/port2/iocr8.rs @@ -1122,7 +1122,7 @@ impl W { PC11_W::new(self, 27) } } -#[doc = "Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR8_SPEC; impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; diff --git a/src/port2/omr.rs b/src/port2/omr.rs index 4d71e108..5fd03cd0 100644 --- a/src/port2/omr.rs +++ b/src/port2/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 2 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port2/out.rs b/src/port2/out.rs index 09001f5f..ff800299 100644 --- a/src/port2/out.rs +++ b/src/port2/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 2 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port2/pdisc.rs b/src/port2/pdisc.rs index cf718444..b9d1eec6 100644 --- a/src/port2/pdisc.rs +++ b/src/port2/pdisc.rs @@ -658,7 +658,7 @@ impl R { PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port2/pdr0.rs b/src/port2/pdr0.rs index 49988bed..7e6af204 100644 --- a/src/port2/pdr0.rs +++ b/src/port2/pdr0.rs @@ -126,7 +126,7 @@ impl W { PD7_W::new(self, 28) } } -#[doc = "Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR0_SPEC; impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; diff --git a/src/port2/pdr1.rs b/src/port2/pdr1.rs index fac65620..09066435 100644 --- a/src/port2/pdr1.rs +++ b/src/port2/pdr1.rs @@ -126,7 +126,7 @@ impl W { PD15_W::new(self, 28) } } -#[doc = "Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR1_SPEC; impl crate::RegisterSpec for PDR1_SPEC { type Ux = u32; diff --git a/src/port2/pps.rs b/src/port2/pps.rs index 290f4901..a5cf9d2b 100644 --- a/src/port2/pps.rs +++ b/src/port2/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 2 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 2 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/port3.rs b/src/port3.rs index 3423729e..e3528247 100644 --- a/src/port3.rs +++ b/src/port3.rs @@ -63,47 +63,47 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 3 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 3 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 3 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 3 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 3 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 3 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 3 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IOCR4 (rw) register accessor: Port 3 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] +#[doc = "IOCR4 (rw) register accessor: Port 3 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] pub type IOCR4 = crate::Reg; #[doc = "Port 3 Input/Output Control Register 4"] pub mod iocr4; -#[doc = "IN (r) register accessor: Port 3 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 3 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 3 Input Register"] pub mod in_; -#[doc = "PDR0 (rw) register accessor: Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] +#[doc = "PDR0 (rw) register accessor: Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] pub type PDR0 = crate::Reg; #[doc = "Port 3 Pad Driver Mode 0 Register"] pub mod pdr0; -#[doc = "PDISC (r) register accessor: Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (r) register accessor: Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 3 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 3 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 3 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 3 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 3 Pin Hardware Select Register"] diff --git a/src/port3/hwsel.rs b/src/port3/hwsel.rs index 0360b926..5b742f6a 100644 --- a/src/port3/hwsel.rs +++ b/src/port3/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port3/in_.rs b/src/port3/in_.rs index 9618e8f6..9efa9b11 100644 --- a/src/port3/in_.rs +++ b/src/port3/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 3 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port3/iocr0.rs b/src/port3/iocr0.rs index 614a4a11..10777565 100644 --- a/src/port3/iocr0.rs +++ b/src/port3/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port3/iocr4.rs b/src/port3/iocr4.rs index 34245948..f478ab38 100644 --- a/src/port3/iocr4.rs +++ b/src/port3/iocr4.rs @@ -1122,7 +1122,7 @@ impl W { PC7_W::new(self, 27) } } -#[doc = "Port 3 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR4_SPEC; impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; diff --git a/src/port3/omr.rs b/src/port3/omr.rs index 0852829e..c45e0548 100644 --- a/src/port3/omr.rs +++ b/src/port3/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 3 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port3/out.rs b/src/port3/out.rs index 603fd9ca..5c53eb03 100644 --- a/src/port3/out.rs +++ b/src/port3/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 3 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port3/pdisc.rs b/src/port3/pdisc.rs index 80289698..72420b4c 100644 --- a/src/port3/pdisc.rs +++ b/src/port3/pdisc.rs @@ -658,7 +658,7 @@ impl R { PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port3/pdr0.rs b/src/port3/pdr0.rs index 52964a7a..09120f9b 100644 --- a/src/port3/pdr0.rs +++ b/src/port3/pdr0.rs @@ -126,7 +126,7 @@ impl W { PD7_W::new(self, 28) } } -#[doc = "Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR0_SPEC; impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; diff --git a/src/port3/pps.rs b/src/port3/pps.rs index cafcfa28..539e527d 100644 --- a/src/port3/pps.rs +++ b/src/port3/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 3 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 3 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/port4.rs b/src/port4.rs index b910ea35..8c706f27 100644 --- a/src/port4.rs +++ b/src/port4.rs @@ -57,42 +57,42 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 4 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 4 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 4 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 4 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 4 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 4 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 4 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 4 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 4 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IN (r) register accessor: Port 4 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 4 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 4 Input Register"] pub mod in_; -#[doc = "PDR0 (rw) register accessor: Port 4 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] +#[doc = "PDR0 (rw) register accessor: Port 4 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] pub type PDR0 = crate::Reg; #[doc = "Port 4 Pad Driver Mode 0 Register"] pub mod pdr0; -#[doc = "PDISC (r) register accessor: Port 4 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (r) register accessor: Port 4 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 4 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 4 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 4 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 4 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 4 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 4 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 4 Pin Hardware Select Register"] diff --git a/src/port4/hwsel.rs b/src/port4/hwsel.rs index 723f053f..319b9400 100644 --- a/src/port4/hwsel.rs +++ b/src/port4/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 4 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port4/in_.rs b/src/port4/in_.rs index e6f91fa0..000e9078 100644 --- a/src/port4/in_.rs +++ b/src/port4/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 4 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port4/iocr0.rs b/src/port4/iocr0.rs index 4e3ec4d7..40f3268a 100644 --- a/src/port4/iocr0.rs +++ b/src/port4/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 4 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port4/omr.rs b/src/port4/omr.rs index 8d7f8ec9..e36e0a76 100644 --- a/src/port4/omr.rs +++ b/src/port4/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 4 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port4/out.rs b/src/port4/out.rs index 0e7be814..59b6c602 100644 --- a/src/port4/out.rs +++ b/src/port4/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 4 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port4/pdisc.rs b/src/port4/pdisc.rs index 66fcaa87..3317fee5 100644 --- a/src/port4/pdisc.rs +++ b/src/port4/pdisc.rs @@ -658,7 +658,7 @@ impl R { PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 4 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port4/pdr0.rs b/src/port4/pdr0.rs index 25607049..12094725 100644 --- a/src/port4/pdr0.rs +++ b/src/port4/pdr0.rs @@ -126,7 +126,7 @@ impl W { PD7_W::new(self, 28) } } -#[doc = "Port 4 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR0_SPEC; impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; diff --git a/src/port4/pps.rs b/src/port4/pps.rs index 2685f287..201ad4ba 100644 --- a/src/port4/pps.rs +++ b/src/port4/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 4 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 4 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/port5.rs b/src/port5.rs index 23439f72..fd46743a 100644 --- a/src/port5.rs +++ b/src/port5.rs @@ -63,47 +63,47 @@ impl RegisterBlock { &self.hwsel } } -#[doc = "OUT (rw) register accessor: Port 5 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] +#[doc = "OUT (rw) register accessor: Port 5 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] pub type OUT = crate::Reg; #[doc = "Port 5 Output Register"] pub mod out; -#[doc = "OMR (w) register accessor: Port 5 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] +#[doc = "OMR (w) register accessor: Port 5 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] pub type OMR = crate::Reg; #[doc = "Port 5 Output Modification Register"] pub mod omr; -#[doc = "IOCR0 (rw) register accessor: Port 5 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] +#[doc = "IOCR0 (rw) register accessor: Port 5 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] pub type IOCR0 = crate::Reg; #[doc = "Port 5 Input/Output Control Register 0"] pub mod iocr0; -#[doc = "IOCR4 (rw) register accessor: Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] +#[doc = "IOCR4 (rw) register accessor: Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] pub type IOCR4 = crate::Reg; #[doc = "Port 5 Input/Output Control Register 4"] pub mod iocr4; -#[doc = "IN (r) register accessor: Port 5 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (r) register accessor: Port 5 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Port 5 Input Register"] pub mod in_; -#[doc = "PDR0 (rw) register accessor: Port 5 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] +#[doc = "PDR0 (rw) register accessor: Port 5 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] pub type PDR0 = crate::Reg; #[doc = "Port 5 Pad Driver Mode 0 Register"] pub mod pdr0; -#[doc = "PDISC (r) register accessor: Port 5 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] +#[doc = "PDISC (r) register accessor: Port 5 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] pub type PDISC = crate::Reg; #[doc = "Port 5 Pin Function Decision Control Register"] pub mod pdisc; -#[doc = "PPS (rw) register accessor: Port 5 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] +#[doc = "PPS (rw) register accessor: Port 5 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] pub type PPS = crate::Reg; #[doc = "Port 5 Pin Power Save Register"] pub mod pps; -#[doc = "HWSEL (rw) register accessor: Port 5 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] +#[doc = "HWSEL (rw) register accessor: Port 5 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] pub type HWSEL = crate::Reg; #[doc = "Port 5 Pin Hardware Select Register"] diff --git a/src/port5/hwsel.rs b/src/port5/hwsel.rs index 6523b97f..1408bb69 100644 --- a/src/port5/hwsel.rs +++ b/src/port5/hwsel.rs @@ -1350,7 +1350,7 @@ impl W { HW15_W::new(self, 30) } } -#[doc = "Port 5 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HWSEL_SPEC; impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; diff --git a/src/port5/in_.rs b/src/port5/in_.rs index 3e65129f..3edc425e 100644 --- a/src/port5/in_.rs +++ b/src/port5/in_.rs @@ -658,7 +658,7 @@ impl R { P15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 5 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/port5/iocr0.rs b/src/port5/iocr0.rs index 07adb9d0..57e54934 100644 --- a/src/port5/iocr0.rs +++ b/src/port5/iocr0.rs @@ -1122,7 +1122,7 @@ impl W { PC3_W::new(self, 27) } } -#[doc = "Port 5 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR0_SPEC; impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; diff --git a/src/port5/iocr4.rs b/src/port5/iocr4.rs index cc0af53a..e27d11eb 100644 --- a/src/port5/iocr4.rs +++ b/src/port5/iocr4.rs @@ -1122,7 +1122,7 @@ impl W { PC7_W::new(self, 27) } } -#[doc = "Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IOCR4_SPEC; impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; diff --git a/src/port5/omr.rs b/src/port5/omr.rs index 695c2fe3..22c7e453 100644 --- a/src/port5/omr.rs +++ b/src/port5/omr.rs @@ -258,7 +258,7 @@ impl W { PR15_W::new(self, 31) } } -#[doc = "Port 5 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OMR_SPEC; impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; diff --git a/src/port5/out.rs b/src/port5/out.rs index c3c12005..b8560e41 100644 --- a/src/port5/out.rs +++ b/src/port5/out.rs @@ -1030,7 +1030,7 @@ impl W { P15_W::new(self, 15) } } -#[doc = "Port 5 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUT_SPEC; impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; diff --git a/src/port5/pdisc.rs b/src/port5/pdisc.rs index 3d932942..9052f4fb 100644 --- a/src/port5/pdisc.rs +++ b/src/port5/pdisc.rs @@ -658,7 +658,7 @@ impl R { PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Port 5 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDISC_SPEC; impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; diff --git a/src/port5/pdr0.rs b/src/port5/pdr0.rs index 006ce49d..74bf0103 100644 --- a/src/port5/pdr0.rs +++ b/src/port5/pdr0.rs @@ -126,7 +126,7 @@ impl W { PD7_W::new(self, 28) } } -#[doc = "Port 5 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDR0_SPEC; impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; diff --git a/src/port5/pps.rs b/src/port5/pps.rs index 8ee16e21..500c40eb 100644 --- a/src/port5/pps.rs +++ b/src/port5/pps.rs @@ -1030,7 +1030,7 @@ impl W { PPS15_W::new(self, 15) } } -#[doc = "Port 5 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Port 5 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PPS_SPEC; impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; diff --git a/src/posif0.rs b/src/posif0.rs index 12ca524d..60b439e4 100644 --- a/src/posif0.rs +++ b/src/posif0.rs @@ -124,97 +124,97 @@ impl RegisterBlock { &self.pdbg } } -#[doc = "PCONF (rw) register accessor: Service Request Processing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pconf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pconf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pconf`] +#[doc = "PCONF (rw) register accessor: Service Request Processing configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`pconf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pconf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pconf`] module"] pub type PCONF = crate::Reg; #[doc = "Service Request Processing configuration"] pub mod pconf; -#[doc = "PSUS (rw) register accessor: Service Request Processing Suspend Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psus::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psus::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psus`] +#[doc = "PSUS (rw) register accessor: Service Request Processing Suspend Config\n\nYou can [`read`](crate::Reg::read) this register and get [`psus::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psus::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psus`] module"] pub type PSUS = crate::Reg; #[doc = "Service Request Processing Suspend Config"] pub mod psus; -#[doc = "PRUNS (w) register accessor: Service Request Processing Run Bit Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pruns::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pruns`] +#[doc = "PRUNS (w) register accessor: Service Request Processing Run Bit Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pruns::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pruns`] module"] pub type PRUNS = crate::Reg; #[doc = "Service Request Processing Run Bit Set"] pub mod pruns; -#[doc = "PRUNC (w) register accessor: Service Request Processing Run Bit Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prunc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prunc`] +#[doc = "PRUNC (w) register accessor: Service Request Processing Run Bit Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prunc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prunc`] module"] pub type PRUNC = crate::Reg; #[doc = "Service Request Processing Run Bit Clear"] pub mod prunc; -#[doc = "PRUN (r) register accessor: Service Request Processing Run Bit Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prun::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prun`] +#[doc = "PRUN (r) register accessor: Service Request Processing Run Bit Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prun::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prun`] module"] pub type PRUN = crate::Reg; #[doc = "Service Request Processing Run Bit Status"] pub mod prun; -#[doc = "MIDR (r) register accessor: Module Identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] +#[doc = "MIDR (r) register accessor: Module Identification register\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] pub type MIDR = crate::Reg; #[doc = "Module Identification register"] pub mod midr; -#[doc = "HALP (r) register accessor: Hall Sensor Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halp`] +#[doc = "HALP (r) register accessor: Hall Sensor Patterns\n\nYou can [`read`](crate::Reg::read) this register and get [`halp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halp`] module"] pub type HALP = crate::Reg; #[doc = "Hall Sensor Patterns"] pub mod halp; -#[doc = "HALPS (rw) register accessor: Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`halps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halps`] +#[doc = "HALPS (rw) register accessor: Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::Reg::read) this register and get [`halps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`halps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halps`] module"] pub type HALPS = crate::Reg; #[doc = "Hall Sensor Shadow Patterns"] pub mod halps; -#[doc = "MCM (r) register accessor: Multi-Channel Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcm`] +#[doc = "MCM (r) register accessor: Multi-Channel Pattern\n\nYou can [`read`](crate::Reg::read) this register and get [`mcm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcm`] module"] pub type MCM = crate::Reg; #[doc = "Multi-Channel Pattern"] pub mod mcm; -#[doc = "MCSM (rw) register accessor: Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcsm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcsm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcsm`] +#[doc = "MCSM (rw) register accessor: Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::Reg::read) this register and get [`mcsm::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcsm::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcsm`] module"] pub type MCSM = crate::Reg; #[doc = "Multi-Channel Shadow Pattern"] pub mod mcsm; -#[doc = "MCMS (w) register accessor: Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcms::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcms`] +#[doc = "MCMS (w) register accessor: Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcms::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcms`] module"] pub type MCMS = crate::Reg; #[doc = "Multi-Channel Pattern Control set"] pub mod mcms; -#[doc = "MCMC (w) register accessor: Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcmc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmc`] +#[doc = "MCMC (w) register accessor: Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcmc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmc`] module"] pub type MCMC = crate::Reg; #[doc = "Multi-Channel Pattern Control clear"] pub mod mcmc; -#[doc = "MCMF (r) register accessor: Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcmf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmf`] +#[doc = "MCMF (r) register accessor: Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::Reg::read) this register and get [`mcmf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmf`] module"] pub type MCMF = crate::Reg; #[doc = "Multi-Channel Pattern Control flag"] pub mod mcmf; -#[doc = "QDC (rw) register accessor: Quadrature Decoder Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qdc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qdc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qdc`] +#[doc = "QDC (rw) register accessor: Quadrature Decoder Control\n\nYou can [`read`](crate::Reg::read) this register and get [`qdc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qdc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qdc`] module"] pub type QDC = crate::Reg; #[doc = "Quadrature Decoder Control"] pub mod qdc; -#[doc = "PFLG (r) register accessor: Service Request Processing Interrupt Flags\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflg`] +#[doc = "PFLG (r) register accessor: Service Request Processing Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`pflg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflg`] module"] pub type PFLG = crate::Reg; #[doc = "Service Request Processing Interrupt Flags"] pub mod pflg; -#[doc = "PFLGE (rw) register accessor: Service Request Processing Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflge::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pflge::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflge`] +#[doc = "PFLGE (rw) register accessor: Service Request Processing Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`pflge::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pflge::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflge`] module"] pub type PFLGE = crate::Reg; #[doc = "Service Request Processing Interrupt Enable"] pub mod pflge; -#[doc = "SPFLG (w) register accessor: Service Request Processing Interrupt Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spflg`] +#[doc = "SPFLG (w) register accessor: Service Request Processing Interrupt Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spflg`] module"] pub type SPFLG = crate::Reg; #[doc = "Service Request Processing Interrupt Set"] pub mod spflg; -#[doc = "RPFLG (w) register accessor: Service Request Processing Interrupt Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rpflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rpflg`] +#[doc = "RPFLG (w) register accessor: Service Request Processing Interrupt Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rpflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rpflg`] module"] pub type RPFLG = crate::Reg; #[doc = "Service Request Processing Interrupt Clear"] pub mod rpflg; -#[doc = "PDBG (r) register accessor: POSIF Debug register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdbg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdbg`] +#[doc = "PDBG (r) register accessor: POSIF Debug register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdbg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdbg`] module"] pub type PDBG = crate::Reg; #[doc = "POSIF Debug register"] diff --git a/src/posif0/halp.rs b/src/posif0/halp.rs index 4cb95afd..ebc0370d 100644 --- a/src/posif0/halp.rs +++ b/src/posif0/halp.rs @@ -16,7 +16,7 @@ impl R { HEP_R::new(((self.bits >> 3) & 7) as u8) } } -#[doc = "Hall Sensor Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hall Sensor Patterns\n\nYou can [`read`](crate::Reg::read) this register and get [`halp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HALP_SPEC; impl crate::RegisterSpec for HALP_SPEC { type Ux = u32; diff --git a/src/posif0/halps.rs b/src/posif0/halps.rs index b754bb83..861e249d 100644 --- a/src/posif0/halps.rs +++ b/src/posif0/halps.rs @@ -36,7 +36,7 @@ impl W { HEPS_W::new(self, 3) } } -#[doc = "Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`halps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::Reg::read) this register and get [`halps::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`halps::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HALPS_SPEC; impl crate::RegisterSpec for HALPS_SPEC { type Ux = u32; diff --git a/src/posif0/mcm.rs b/src/posif0/mcm.rs index 5c7adf9c..c58292c6 100644 --- a/src/posif0/mcm.rs +++ b/src/posif0/mcm.rs @@ -9,7 +9,7 @@ impl R { MCMP_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Multi-Channel Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Multi-Channel Pattern\n\nYou can [`read`](crate::Reg::read) this register and get [`mcm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MCM_SPEC; impl crate::RegisterSpec for MCM_SPEC { type Ux = u32; diff --git a/src/posif0/mcmc.rs b/src/posif0/mcmc.rs index 2c596dec..b73050d6 100644 --- a/src/posif0/mcmc.rs +++ b/src/posif0/mcmc.rs @@ -18,7 +18,7 @@ impl W { MPC_W::new(self, 1) } } -#[doc = "Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcmc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcmc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MCMC_SPEC; impl crate::RegisterSpec for MCMC_SPEC { type Ux = u32; diff --git a/src/posif0/mcmf.rs b/src/posif0/mcmf.rs index d12f18d6..909706f6 100644 --- a/src/posif0/mcmf.rs +++ b/src/posif0/mcmf.rs @@ -43,7 +43,7 @@ impl R { MSS_R::new((self.bits & 1) != 0) } } -#[doc = "Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcmf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::Reg::read) this register and get [`mcmf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MCMF_SPEC; impl crate::RegisterSpec for MCMF_SPEC { type Ux = u32; diff --git a/src/posif0/mcms.rs b/src/posif0/mcms.rs index 13894973..c3a7203a 100644 --- a/src/posif0/mcms.rs +++ b/src/posif0/mcms.rs @@ -26,7 +26,7 @@ impl W { STMR_W::new(self, 2) } } -#[doc = "Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcms::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcms::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MCMS_SPEC; impl crate::RegisterSpec for MCMS_SPEC { type Ux = u32; diff --git a/src/posif0/mcsm.rs b/src/posif0/mcsm.rs index a7b22c26..c9e3d79f 100644 --- a/src/posif0/mcsm.rs +++ b/src/posif0/mcsm.rs @@ -21,7 +21,7 @@ impl W { MCMPS_W::new(self, 0) } } -#[doc = "Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcsm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcsm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::Reg::read) this register and get [`mcsm::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcsm::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MCSM_SPEC; impl crate::RegisterSpec for MCSM_SPEC { type Ux = u32; diff --git a/src/posif0/midr.rs b/src/posif0/midr.rs index d2428440..7c7afad0 100644 --- a/src/posif0/midr.rs +++ b/src/posif0/midr.rs @@ -23,7 +23,7 @@ impl R { MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification register\n\nYou can [`read`](crate::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MIDR_SPEC; impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; diff --git a/src/posif0/pconf.rs b/src/posif0/pconf.rs index 1d40d9df..a2fb3f06 100644 --- a/src/posif0/pconf.rs +++ b/src/posif0/pconf.rs @@ -1355,7 +1355,7 @@ impl W { LPC_W::new(self, 28) } } -#[doc = "Service Request Processing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pconf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pconf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`pconf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pconf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCONF_SPEC; impl crate::RegisterSpec for PCONF_SPEC { type Ux = u32; diff --git a/src/posif0/pdbg.rs b/src/posif0/pdbg.rs index bd25b8a1..fa2331c5 100644 --- a/src/posif0/pdbg.rs +++ b/src/posif0/pdbg.rs @@ -51,7 +51,7 @@ impl R { LPP2_R::new(((self.bits >> 22) & 0x3f) as u8) } } -#[doc = "POSIF Debug register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdbg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "POSIF Debug register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdbg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PDBG_SPEC; impl crate::RegisterSpec for PDBG_SPEC { type Ux = u32; diff --git a/src/posif0/pflg.rs b/src/posif0/pflg.rs index d15fd359..347e8634 100644 --- a/src/posif0/pflg.rs +++ b/src/posif0/pflg.rs @@ -371,7 +371,7 @@ impl R { PCLKS_R::new(((self.bits >> 12) & 1) != 0) } } -#[doc = "Service Request Processing Interrupt Flags\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Interrupt Flags\n\nYou can [`read`](crate::Reg::read) this register and get [`pflg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PFLG_SPEC; impl crate::RegisterSpec for PFLG_SPEC { type Ux = u32; diff --git a/src/posif0/pflge.rs b/src/posif0/pflge.rs index 13395527..ce5fb276 100644 --- a/src/posif0/pflge.rs +++ b/src/posif0/pflge.rs @@ -1158,7 +1158,7 @@ impl W { PCLSEL_W::new(self, 28) } } -#[doc = "Service Request Processing Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflge::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pflge::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`pflge::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pflge::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PFLGE_SPEC; impl crate::RegisterSpec for PFLGE_SPEC { type Ux = u32; diff --git a/src/posif0/prun.rs b/src/posif0/prun.rs index 25512c24..f4892fcb 100644 --- a/src/posif0/prun.rs +++ b/src/posif0/prun.rs @@ -43,7 +43,7 @@ impl R { RB_R::new((self.bits & 1) != 0) } } -#[doc = "Service Request Processing Run Bit Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prun::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Run Bit Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prun::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRUN_SPEC; impl crate::RegisterSpec for PRUN_SPEC { type Ux = u32; diff --git a/src/posif0/prunc.rs b/src/posif0/prunc.rs index 1aaeed99..57316646 100644 --- a/src/posif0/prunc.rs +++ b/src/posif0/prunc.rs @@ -18,7 +18,7 @@ impl W { CSM_W::new(self, 1) } } -#[doc = "Service Request Processing Run Bit Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prunc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Run Bit Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prunc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRUNC_SPEC; impl crate::RegisterSpec for PRUNC_SPEC { type Ux = u32; diff --git a/src/posif0/pruns.rs b/src/posif0/pruns.rs index 71658dca..d80e4493 100644 --- a/src/posif0/pruns.rs +++ b/src/posif0/pruns.rs @@ -10,7 +10,7 @@ impl W { SRB_W::new(self, 0) } } -#[doc = "Service Request Processing Run Bit Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pruns::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Run Bit Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pruns::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRUNS_SPEC; impl crate::RegisterSpec for PRUNS_SPEC { type Ux = u32; diff --git a/src/posif0/psus.rs b/src/posif0/psus.rs index 647c11ef..c106d344 100644 --- a/src/posif0/psus.rs +++ b/src/posif0/psus.rs @@ -200,7 +200,7 @@ impl W { MSUS_W::new(self, 2) } } -#[doc = "Service Request Processing Suspend Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psus::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psus::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Suspend Config\n\nYou can [`read`](crate::Reg::read) this register and get [`psus::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psus::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSUS_SPEC; impl crate::RegisterSpec for PSUS_SPEC { type Ux = u32; diff --git a/src/posif0/qdc.rs b/src/posif0/qdc.rs index 790ee5b0..2c3ec97c 100644 --- a/src/posif0/qdc.rs +++ b/src/posif0/qdc.rs @@ -323,7 +323,7 @@ impl W { ICM_W::new(self, 4) } } -#[doc = "Quadrature Decoder Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qdc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qdc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Quadrature Decoder Control\n\nYou can [`read`](crate::Reg::read) this register and get [`qdc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qdc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct QDC_SPEC; impl crate::RegisterSpec for QDC_SPEC { type Ux = u32; diff --git a/src/posif0/rpflg.rs b/src/posif0/rpflg.rs index a96d2f25..b3e179ab 100644 --- a/src/posif0/rpflg.rs +++ b/src/posif0/rpflg.rs @@ -74,7 +74,7 @@ impl W { RPCLK_W::new(self, 12) } } -#[doc = "Service Request Processing Interrupt Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rpflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Interrupt Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rpflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RPFLG_SPEC; impl crate::RegisterSpec for RPFLG_SPEC { type Ux = u32; diff --git a/src/posif0/spflg.rs b/src/posif0/spflg.rs index d4313e69..c6ae6ba7 100644 --- a/src/posif0/spflg.rs +++ b/src/posif0/spflg.rs @@ -74,7 +74,7 @@ impl W { SPCLK_W::new(self, 12) } } -#[doc = "Service Request Processing Interrupt Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Processing Interrupt Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SPFLG_SPEC; impl crate::RegisterSpec for SPFLG_SPEC { type Ux = u32; diff --git a/src/ppb.rs b/src/ppb.rs index a16ff7a7..0a1e105d 100644 --- a/src/ppb.rs +++ b/src/ppb.rs @@ -522,422 +522,422 @@ impl RegisterBlock { &self.fpdscr } } -#[doc = "ACTLR (rw) register accessor: Auxiliary Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`actlr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`actlr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@actlr`] +#[doc = "ACTLR (rw) register accessor: Auxiliary Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`actlr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`actlr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@actlr`] module"] pub type ACTLR = crate::Reg; #[doc = "Auxiliary Control Register"] pub mod actlr; -#[doc = "SYST_CSR (rw) register accessor: SysTick Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_csr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_csr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_csr`] +#[doc = "SYST_CSR (rw) register accessor: SysTick Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_csr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_csr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_csr`] module"] pub type SYST_CSR = crate::Reg; #[doc = "SysTick Control and Status Register"] pub mod syst_csr; -#[doc = "SYST_RVR (rw) register accessor: SysTick Reload Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_rvr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_rvr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_rvr`] +#[doc = "SYST_RVR (rw) register accessor: SysTick Reload Value Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_rvr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_rvr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_rvr`] module"] pub type SYST_RVR = crate::Reg; #[doc = "SysTick Reload Value Register"] pub mod syst_rvr; -#[doc = "SYST_CVR (rw) register accessor: SysTick Current Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_cvr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_cvr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_cvr`] +#[doc = "SYST_CVR (rw) register accessor: SysTick Current Value Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_cvr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_cvr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_cvr`] module"] pub type SYST_CVR = crate::Reg; #[doc = "SysTick Current Value Register"] pub mod syst_cvr; -#[doc = "SYST_CALIB (rw) register accessor: SysTick Calibration Value Register r\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_calib::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_calib::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_calib`] +#[doc = "SYST_CALIB (rw) register accessor: SysTick Calibration Value Register r\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_calib::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_calib::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_calib`] module"] pub type SYST_CALIB = crate::Reg; #[doc = "SysTick Calibration Value Register r"] pub mod syst_calib; -#[doc = "NVIC_ISER0 (rw) register accessor: Interrupt Set-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser0`] +#[doc = "NVIC_ISER0 (rw) register accessor: Interrupt Set-enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser0`] module"] pub type NVIC_ISER0 = crate::Reg; #[doc = "Interrupt Set-enable Register 0"] pub mod nvic_iser0; -#[doc = "NVIC_ISER1 (rw) register accessor: Interrupt Set-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser1`] +#[doc = "NVIC_ISER1 (rw) register accessor: Interrupt Set-enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser1`] module"] pub type NVIC_ISER1 = crate::Reg; #[doc = "Interrupt Set-enable Register 1"] pub mod nvic_iser1; -#[doc = "NVIC_ISER2 (rw) register accessor: Interrupt Set-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser2`] +#[doc = "NVIC_ISER2 (rw) register accessor: Interrupt Set-enable Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser2`] module"] pub type NVIC_ISER2 = crate::Reg; #[doc = "Interrupt Set-enable Register 2"] pub mod nvic_iser2; -#[doc = "NVIC_ISER3 (rw) register accessor: Interrupt Set-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser3`] +#[doc = "NVIC_ISER3 (rw) register accessor: Interrupt Set-enable Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser3`] module"] pub type NVIC_ISER3 = crate::Reg; #[doc = "Interrupt Set-enable Register 3"] pub mod nvic_iser3; -#[doc = "NVIC_ICER0 (rw) register accessor: Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer0`] +#[doc = "NVIC_ICER0 (rw) register accessor: Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer0`] module"] pub type NVIC_ICER0 = crate::Reg; #[doc = "Interrupt Clear-enable Register 0"] pub mod nvic_icer0; -#[doc = "NVIC_ICER1 (rw) register accessor: Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer1`] +#[doc = "NVIC_ICER1 (rw) register accessor: Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer1`] module"] pub type NVIC_ICER1 = crate::Reg; #[doc = "Interrupt Clear-enable Register 1"] pub mod nvic_icer1; -#[doc = "NVIC_ICER2 (rw) register accessor: Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer2`] +#[doc = "NVIC_ICER2 (rw) register accessor: Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer2`] module"] pub type NVIC_ICER2 = crate::Reg; #[doc = "Interrupt Clear-enable Register 2"] pub mod nvic_icer2; -#[doc = "NVIC_ICER3 (rw) register accessor: Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer3`] +#[doc = "NVIC_ICER3 (rw) register accessor: Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer3`] module"] pub type NVIC_ICER3 = crate::Reg; #[doc = "Interrupt Clear-enable Register 3"] pub mod nvic_icer3; -#[doc = "NVIC_ISPR0 (rw) register accessor: Interrupt Set-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr0`] +#[doc = "NVIC_ISPR0 (rw) register accessor: Interrupt Set-pending Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr0`] module"] pub type NVIC_ISPR0 = crate::Reg; #[doc = "Interrupt Set-pending Register 0"] pub mod nvic_ispr0; -#[doc = "NVIC_ISPR1 (rw) register accessor: Interrupt Set-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr1`] +#[doc = "NVIC_ISPR1 (rw) register accessor: Interrupt Set-pending Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr1`] module"] pub type NVIC_ISPR1 = crate::Reg; #[doc = "Interrupt Set-pending Register 1"] pub mod nvic_ispr1; -#[doc = "NVIC_ISPR2 (rw) register accessor: Interrupt Set-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr2`] +#[doc = "NVIC_ISPR2 (rw) register accessor: Interrupt Set-pending Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr2`] module"] pub type NVIC_ISPR2 = crate::Reg; #[doc = "Interrupt Set-pending Register 2"] pub mod nvic_ispr2; -#[doc = "NVIC_ISPR3 (rw) register accessor: Interrupt Set-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr3`] +#[doc = "NVIC_ISPR3 (rw) register accessor: Interrupt Set-pending Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr3`] module"] pub type NVIC_ISPR3 = crate::Reg; #[doc = "Interrupt Set-pending Register 3"] pub mod nvic_ispr3; -#[doc = "NVIC_ICPR0 (rw) register accessor: Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr0`] +#[doc = "NVIC_ICPR0 (rw) register accessor: Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr0`] module"] pub type NVIC_ICPR0 = crate::Reg; #[doc = "Interrupt Clear-pending Register 0"] pub mod nvic_icpr0; -#[doc = "NVIC_ICPR1 (rw) register accessor: Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr1`] +#[doc = "NVIC_ICPR1 (rw) register accessor: Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr1`] module"] pub type NVIC_ICPR1 = crate::Reg; #[doc = "Interrupt Clear-pending Register 1"] pub mod nvic_icpr1; -#[doc = "NVIC_ICPR2 (rw) register accessor: Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr2`] +#[doc = "NVIC_ICPR2 (rw) register accessor: Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr2`] module"] pub type NVIC_ICPR2 = crate::Reg; #[doc = "Interrupt Clear-pending Register 2"] pub mod nvic_icpr2; -#[doc = "NVIC_ICPR3 (rw) register accessor: Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr3`] +#[doc = "NVIC_ICPR3 (rw) register accessor: Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr3`] module"] pub type NVIC_ICPR3 = crate::Reg; #[doc = "Interrupt Clear-pending Register 3"] pub mod nvic_icpr3; -#[doc = "NVIC_IABR0 (rw) register accessor: Interrupt Active Bit Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr0`] +#[doc = "NVIC_IABR0 (rw) register accessor: Interrupt Active Bit Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr0`] module"] pub type NVIC_IABR0 = crate::Reg; #[doc = "Interrupt Active Bit Register 0"] pub mod nvic_iabr0; -#[doc = "NVIC_IABR1 (rw) register accessor: Interrupt Active Bit Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr1`] +#[doc = "NVIC_IABR1 (rw) register accessor: Interrupt Active Bit Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr1`] module"] pub type NVIC_IABR1 = crate::Reg; #[doc = "Interrupt Active Bit Register 1"] pub mod nvic_iabr1; -#[doc = "NVIC_IABR2 (rw) register accessor: Interrupt Active Bit Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr2`] +#[doc = "NVIC_IABR2 (rw) register accessor: Interrupt Active Bit Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr2`] module"] pub type NVIC_IABR2 = crate::Reg; #[doc = "Interrupt Active Bit Register 2"] pub mod nvic_iabr2; -#[doc = "NVIC_IABR3 (rw) register accessor: Interrupt Active Bit Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr3`] +#[doc = "NVIC_IABR3 (rw) register accessor: Interrupt Active Bit Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr3`] module"] pub type NVIC_IABR3 = crate::Reg; #[doc = "Interrupt Active Bit Register 3"] pub mod nvic_iabr3; -#[doc = "NVIC_IPR0 (rw) register accessor: Interrupt Priority Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr0`] +#[doc = "NVIC_IPR0 (rw) register accessor: Interrupt Priority Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr0`] module"] pub type NVIC_IPR0 = crate::Reg; #[doc = "Interrupt Priority Register 0"] pub mod nvic_ipr0; -#[doc = "NVIC_IPR1 (rw) register accessor: Interrupt Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr1`] +#[doc = "NVIC_IPR1 (rw) register accessor: Interrupt Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr1`] module"] pub type NVIC_IPR1 = crate::Reg; #[doc = "Interrupt Priority Register 1"] pub mod nvic_ipr1; -#[doc = "NVIC_IPR2 (rw) register accessor: Interrupt Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr2`] +#[doc = "NVIC_IPR2 (rw) register accessor: Interrupt Priority Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr2`] module"] pub type NVIC_IPR2 = crate::Reg; #[doc = "Interrupt Priority Register 2"] pub mod nvic_ipr2; -#[doc = "NVIC_IPR3 (rw) register accessor: Interrupt Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr3`] +#[doc = "NVIC_IPR3 (rw) register accessor: Interrupt Priority Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr3`] module"] pub type NVIC_IPR3 = crate::Reg; #[doc = "Interrupt Priority Register 3"] pub mod nvic_ipr3; -#[doc = "NVIC_IPR4 (rw) register accessor: Interrupt Priority Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr4`] +#[doc = "NVIC_IPR4 (rw) register accessor: Interrupt Priority Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr4`] module"] pub type NVIC_IPR4 = crate::Reg; #[doc = "Interrupt Priority Register 4"] pub mod nvic_ipr4; -#[doc = "NVIC_IPR5 (rw) register accessor: Interrupt Priority Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr5`] +#[doc = "NVIC_IPR5 (rw) register accessor: Interrupt Priority Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr5`] module"] pub type NVIC_IPR5 = crate::Reg; #[doc = "Interrupt Priority Register 5"] pub mod nvic_ipr5; -#[doc = "NVIC_IPR6 (rw) register accessor: Interrupt Priority Register 6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr6`] +#[doc = "NVIC_IPR6 (rw) register accessor: Interrupt Priority Register 6\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr6`] module"] pub type NVIC_IPR6 = crate::Reg; #[doc = "Interrupt Priority Register 6"] pub mod nvic_ipr6; -#[doc = "NVIC_IPR7 (rw) register accessor: Interrupt Priority Register 7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr7`] +#[doc = "NVIC_IPR7 (rw) register accessor: Interrupt Priority Register 7\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr7`] module"] pub type NVIC_IPR7 = crate::Reg; #[doc = "Interrupt Priority Register 7"] pub mod nvic_ipr7; -#[doc = "NVIC_IPR8 (rw) register accessor: Interrupt Priority Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr8`] +#[doc = "NVIC_IPR8 (rw) register accessor: Interrupt Priority Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr8`] module"] pub type NVIC_IPR8 = crate::Reg; #[doc = "Interrupt Priority Register 8"] pub mod nvic_ipr8; -#[doc = "NVIC_IPR9 (rw) register accessor: Interrupt Priority Register 9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr9`] +#[doc = "NVIC_IPR9 (rw) register accessor: Interrupt Priority Register 9\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr9`] module"] pub type NVIC_IPR9 = crate::Reg; #[doc = "Interrupt Priority Register 9"] pub mod nvic_ipr9; -#[doc = "NVIC_IPR10 (rw) register accessor: Interrupt Priority Register 10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr10`] +#[doc = "NVIC_IPR10 (rw) register accessor: Interrupt Priority Register 10\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr10`] module"] pub type NVIC_IPR10 = crate::Reg; #[doc = "Interrupt Priority Register 10"] pub mod nvic_ipr10; -#[doc = "NVIC_IPR11 (rw) register accessor: Interrupt Priority Register 11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr11`] +#[doc = "NVIC_IPR11 (rw) register accessor: Interrupt Priority Register 11\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr11`] module"] pub type NVIC_IPR11 = crate::Reg; #[doc = "Interrupt Priority Register 11"] pub mod nvic_ipr11; -#[doc = "NVIC_IPR12 (rw) register accessor: Interrupt Priority Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr12`] +#[doc = "NVIC_IPR12 (rw) register accessor: Interrupt Priority Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr12`] module"] pub type NVIC_IPR12 = crate::Reg; #[doc = "Interrupt Priority Register 12"] pub mod nvic_ipr12; -#[doc = "NVIC_IPR13 (rw) register accessor: Interrupt Priority Register 13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr13`] +#[doc = "NVIC_IPR13 (rw) register accessor: Interrupt Priority Register 13\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr13`] module"] pub type NVIC_IPR13 = crate::Reg; #[doc = "Interrupt Priority Register 13"] pub mod nvic_ipr13; -#[doc = "NVIC_IPR14 (rw) register accessor: Interrupt Priority Register 14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr14`] +#[doc = "NVIC_IPR14 (rw) register accessor: Interrupt Priority Register 14\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr14`] module"] pub type NVIC_IPR14 = crate::Reg; #[doc = "Interrupt Priority Register 14"] pub mod nvic_ipr14; -#[doc = "NVIC_IPR15 (rw) register accessor: Interrupt Priority Register 15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr15::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr15::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr15`] +#[doc = "NVIC_IPR15 (rw) register accessor: Interrupt Priority Register 15\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr15::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr15::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr15`] module"] pub type NVIC_IPR15 = crate::Reg; #[doc = "Interrupt Priority Register 15"] pub mod nvic_ipr15; -#[doc = "NVIC_IPR16 (rw) register accessor: Interrupt Priority Register 16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr16::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr16::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr16`] +#[doc = "NVIC_IPR16 (rw) register accessor: Interrupt Priority Register 16\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr16::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr16::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr16`] module"] pub type NVIC_IPR16 = crate::Reg; #[doc = "Interrupt Priority Register 16"] pub mod nvic_ipr16; -#[doc = "NVIC_IPR17 (rw) register accessor: Interrupt Priority Register 17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr17::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr17::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr17`] +#[doc = "NVIC_IPR17 (rw) register accessor: Interrupt Priority Register 17\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr17::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr17::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr17`] module"] pub type NVIC_IPR17 = crate::Reg; #[doc = "Interrupt Priority Register 17"] pub mod nvic_ipr17; -#[doc = "NVIC_IPR18 (rw) register accessor: Interrupt Priority Register 18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr18::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr18::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr18`] +#[doc = "NVIC_IPR18 (rw) register accessor: Interrupt Priority Register 18\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr18::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr18::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr18`] module"] pub type NVIC_IPR18 = crate::Reg; #[doc = "Interrupt Priority Register 18"] pub mod nvic_ipr18; -#[doc = "NVIC_IPR19 (rw) register accessor: Interrupt Priority Register 19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr19::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr19::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr19`] +#[doc = "NVIC_IPR19 (rw) register accessor: Interrupt Priority Register 19\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr19::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr19::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr19`] module"] pub type NVIC_IPR19 = crate::Reg; #[doc = "Interrupt Priority Register 19"] pub mod nvic_ipr19; -#[doc = "NVIC_IPR20 (rw) register accessor: Interrupt Priority Register 20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr20::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr20::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr20`] +#[doc = "NVIC_IPR20 (rw) register accessor: Interrupt Priority Register 20\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr20::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr20::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr20`] module"] pub type NVIC_IPR20 = crate::Reg; #[doc = "Interrupt Priority Register 20"] pub mod nvic_ipr20; -#[doc = "NVIC_IPR21 (rw) register accessor: Interrupt Priority Register 21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr21::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr21::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr21`] +#[doc = "NVIC_IPR21 (rw) register accessor: Interrupt Priority Register 21\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr21::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr21::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr21`] module"] pub type NVIC_IPR21 = crate::Reg; #[doc = "Interrupt Priority Register 21"] pub mod nvic_ipr21; -#[doc = "NVIC_IPR22 (rw) register accessor: Interrupt Priority Register 22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr22::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr22::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr22`] +#[doc = "NVIC_IPR22 (rw) register accessor: Interrupt Priority Register 22\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr22::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr22::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr22`] module"] pub type NVIC_IPR22 = crate::Reg; #[doc = "Interrupt Priority Register 22"] pub mod nvic_ipr22; -#[doc = "NVIC_IPR23 (rw) register accessor: Interrupt Priority Register 23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr23::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr23::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr23`] +#[doc = "NVIC_IPR23 (rw) register accessor: Interrupt Priority Register 23\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr23::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr23::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr23`] module"] pub type NVIC_IPR23 = crate::Reg; #[doc = "Interrupt Priority Register 23"] pub mod nvic_ipr23; -#[doc = "NVIC_IPR24 (rw) register accessor: Interrupt Priority Register 24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr24::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr24::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr24`] +#[doc = "NVIC_IPR24 (rw) register accessor: Interrupt Priority Register 24\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr24::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr24::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr24`] module"] pub type NVIC_IPR24 = crate::Reg; #[doc = "Interrupt Priority Register 24"] pub mod nvic_ipr24; -#[doc = "NVIC_IPR25 (rw) register accessor: Interrupt Priority Register 25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr25::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr25::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr25`] +#[doc = "NVIC_IPR25 (rw) register accessor: Interrupt Priority Register 25\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr25::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr25::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr25`] module"] pub type NVIC_IPR25 = crate::Reg; #[doc = "Interrupt Priority Register 25"] pub mod nvic_ipr25; -#[doc = "NVIC_IPR26 (rw) register accessor: Interrupt Priority Register 26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr26::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr26::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr26`] +#[doc = "NVIC_IPR26 (rw) register accessor: Interrupt Priority Register 26\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr26::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr26::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr26`] module"] pub type NVIC_IPR26 = crate::Reg; #[doc = "Interrupt Priority Register 26"] pub mod nvic_ipr26; -#[doc = "NVIC_IPR27 (rw) register accessor: Interrupt Priority Register 27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr27::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr27::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr27`] +#[doc = "NVIC_IPR27 (rw) register accessor: Interrupt Priority Register 27\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr27::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr27::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr27`] module"] pub type NVIC_IPR27 = crate::Reg; #[doc = "Interrupt Priority Register 27"] pub mod nvic_ipr27; -#[doc = "CPUID (r) register accessor: CPUID Base Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuid`] +#[doc = "CPUID (r) register accessor: CPUID Base Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpuid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuid`] module"] pub type CPUID = crate::Reg; #[doc = "CPUID Base Register"] pub mod cpuid; -#[doc = "ICSR (rw) register accessor: Interrupt Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icsr`] +#[doc = "ICSR (rw) register accessor: Interrupt Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icsr`] module"] pub type ICSR = crate::Reg; #[doc = "Interrupt Control and State Register"] pub mod icsr; -#[doc = "VTOR (rw) register accessor: Vector Table Offset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vtor::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vtor::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vtor`] +#[doc = "VTOR (rw) register accessor: Vector Table Offset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vtor::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vtor::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vtor`] module"] pub type VTOR = crate::Reg; #[doc = "Vector Table Offset Register"] pub mod vtor; -#[doc = "AIRCR (rw) register accessor: Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aircr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aircr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aircr`] +#[doc = "AIRCR (rw) register accessor: Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`aircr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aircr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aircr`] module"] pub type AIRCR = crate::Reg; #[doc = "Application Interrupt and Reset Control Register"] pub mod aircr; -#[doc = "SCR (rw) register accessor: System Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr`] +#[doc = "SCR (rw) register accessor: System Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`scr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr`] module"] pub type SCR = crate::Reg; #[doc = "System Control Register"] pub mod scr; -#[doc = "CCR (rw) register accessor: Configuration and Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] +#[doc = "CCR (rw) register accessor: Configuration and Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"] pub type CCR = crate::Reg; #[doc = "Configuration and Control Register"] pub mod ccr; -#[doc = "SHPR1 (rw) register accessor: System Handler Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr1`] +#[doc = "SHPR1 (rw) register accessor: System Handler Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr1`] module"] pub type SHPR1 = crate::Reg; #[doc = "System Handler Priority Register 1"] pub mod shpr1; -#[doc = "SHPR2 (rw) register accessor: System Handler Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr2`] +#[doc = "SHPR2 (rw) register accessor: System Handler Priority Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr2`] module"] pub type SHPR2 = crate::Reg; #[doc = "System Handler Priority Register 2"] pub mod shpr2; -#[doc = "SHPR3 (rw) register accessor: System Handler Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr3`] +#[doc = "SHPR3 (rw) register accessor: System Handler Priority Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr3`] module"] pub type SHPR3 = crate::Reg; #[doc = "System Handler Priority Register 3"] pub mod shpr3; -#[doc = "SHCSR (rw) register accessor: System Handler Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shcsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shcsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shcsr`] +#[doc = "SHCSR (rw) register accessor: System Handler Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`shcsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shcsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shcsr`] module"] pub type SHCSR = crate::Reg; #[doc = "System Handler Control and State Register"] pub mod shcsr; -#[doc = "CFSR (rw) register accessor: Configurable Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfsr`] +#[doc = "CFSR (rw) register accessor: Configurable Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfsr`] module"] pub type CFSR = crate::Reg; #[doc = "Configurable Fault Status Register"] pub mod cfsr; -#[doc = "HFSR (rw) register accessor: HardFault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfsr`] +#[doc = "HFSR (rw) register accessor: HardFault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfsr`] module"] pub type HFSR = crate::Reg; #[doc = "HardFault Status Register"] pub mod hfsr; -#[doc = "MMFAR (rw) register accessor: MemManage Fault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmfar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmfar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmfar`] +#[doc = "MMFAR (rw) register accessor: MemManage Fault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmfar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmfar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmfar`] module"] pub type MMFAR = crate::Reg; #[doc = "MemManage Fault Address Register"] pub mod mmfar; -#[doc = "BFAR (rw) register accessor: BusFault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfar`] +#[doc = "BFAR (rw) register accessor: BusFault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bfar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfar`] module"] pub type BFAR = crate::Reg; #[doc = "BusFault Address Register"] pub mod bfar; -#[doc = "AFSR (rw) register accessor: Auxiliary Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`afsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@afsr`] +#[doc = "AFSR (rw) register accessor: Auxiliary Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`afsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`afsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@afsr`] module"] pub type AFSR = crate::Reg; #[doc = "Auxiliary Fault Status Register"] pub mod afsr; -#[doc = "CPACR (rw) register accessor: Coprocessor Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpacr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpacr`] +#[doc = "CPACR (rw) register accessor: Coprocessor Access Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpacr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpacr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpacr`] module"] pub type CPACR = crate::Reg; #[doc = "Coprocessor Access Control Register"] pub mod cpacr; -#[doc = "MPU_TYPE (r) register accessor: MPU Type Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_type::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_type`] +#[doc = "MPU_TYPE (r) register accessor: MPU Type Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_type::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_type`] module"] pub type MPU_TYPE = crate::Reg; #[doc = "MPU Type Register"] pub mod mpu_type; -#[doc = "MPU_CTRL (rw) register accessor: MPU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_ctrl`] +#[doc = "MPU_CTRL (rw) register accessor: MPU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_ctrl`] module"] pub type MPU_CTRL = crate::Reg; #[doc = "MPU Control Register"] pub mod mpu_ctrl; -#[doc = "MPU_RNR (rw) register accessor: MPU Region Number Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rnr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rnr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rnr`] +#[doc = "MPU_RNR (rw) register accessor: MPU Region Number Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rnr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rnr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rnr`] module"] pub type MPU_RNR = crate::Reg; #[doc = "MPU Region Number Register"] pub mod mpu_rnr; -#[doc = "MPU_RBAR (rw) register accessor: MPU Region Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar`] +#[doc = "MPU_RBAR (rw) register accessor: MPU Region Base Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar`] module"] pub type MPU_RBAR = crate::Reg; #[doc = "MPU Region Base Address Register"] pub mod mpu_rbar; -#[doc = "MPU_RASR (rw) register accessor: MPU Region Attribute and Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr`] +#[doc = "MPU_RASR (rw) register accessor: MPU Region Attribute and Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr`] module"] pub type MPU_RASR = crate::Reg; #[doc = "MPU Region Attribute and Size Register"] pub mod mpu_rasr; -#[doc = "MPU_RBAR_A1 (rw) register accessor: MPU Region Base Address Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a1`] +#[doc = "MPU_RBAR_A1 (rw) register accessor: MPU Region Base Address Register A1\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a1`] module"] pub type MPU_RBAR_A1 = crate::Reg; #[doc = "MPU Region Base Address Register A1"] pub mod mpu_rbar_a1; -#[doc = "MPU_RASR_A1 (rw) register accessor: MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a1`] +#[doc = "MPU_RASR_A1 (rw) register accessor: MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a1`] module"] pub type MPU_RASR_A1 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A1"] pub mod mpu_rasr_a1; -#[doc = "MPU_RBAR_A2 (rw) register accessor: MPU Region Base Address Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a2`] +#[doc = "MPU_RBAR_A2 (rw) register accessor: MPU Region Base Address Register A2\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a2`] module"] pub type MPU_RBAR_A2 = crate::Reg; #[doc = "MPU Region Base Address Register A2"] pub mod mpu_rbar_a2; -#[doc = "MPU_RASR_A2 (rw) register accessor: MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a2`] +#[doc = "MPU_RASR_A2 (rw) register accessor: MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a2`] module"] pub type MPU_RASR_A2 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A2"] pub mod mpu_rasr_a2; -#[doc = "MPU_RBAR_A3 (rw) register accessor: MPU Region Base Address Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a3`] +#[doc = "MPU_RBAR_A3 (rw) register accessor: MPU Region Base Address Register A3\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a3`] module"] pub type MPU_RBAR_A3 = crate::Reg; #[doc = "MPU Region Base Address Register A3"] pub mod mpu_rbar_a3; -#[doc = "MPU_RASR_A3 (rw) register accessor: MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a3`] +#[doc = "MPU_RASR_A3 (rw) register accessor: MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a3`] module"] pub type MPU_RASR_A3 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A3"] pub mod mpu_rasr_a3; -#[doc = "STIR (w) register accessor: Software Trigger Interrupt Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stir::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stir`] +#[doc = "STIR (w) register accessor: Software Trigger Interrupt Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stir::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stir`] module"] pub type STIR = crate::Reg; #[doc = "Software Trigger Interrupt Register"] pub mod stir; -#[doc = "FPCCR (rw) register accessor: Floating-point Context Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpccr`] +#[doc = "FPCCR (rw) register accessor: Floating-point Context Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpccr`] module"] pub type FPCCR = crate::Reg; #[doc = "Floating-point Context Control Register"] pub mod fpccr; -#[doc = "FPCAR (rw) register accessor: Floating-point Context Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcar`] +#[doc = "FPCAR (rw) register accessor: Floating-point Context Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpcar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpcar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcar`] module"] pub type FPCAR = crate::Reg; #[doc = "Floating-point Context Address Register"] pub mod fpcar; -#[doc = "FPDSCR (rw) register accessor: Floating-point Default Status Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpdscr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpdscr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpdscr`] +#[doc = "FPDSCR (rw) register accessor: Floating-point Default Status Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpdscr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpdscr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpdscr`] module"] pub type FPDSCR = crate::Reg; #[doc = "Floating-point Default Status Control Register"] diff --git a/src/ppb/actlr.rs b/src/ppb/actlr.rs index f921e839..8cd01a89 100644 --- a/src/ppb/actlr.rs +++ b/src/ppb/actlr.rs @@ -81,7 +81,7 @@ impl W { DISOOFP_W::new(self, 9) } } -#[doc = "Auxiliary Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`actlr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`actlr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Auxiliary Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`actlr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`actlr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ACTLR_SPEC; impl crate::RegisterSpec for ACTLR_SPEC { type Ux = u32; diff --git a/src/ppb/afsr.rs b/src/ppb/afsr.rs index 280e37a7..dda9d3ec 100644 --- a/src/ppb/afsr.rs +++ b/src/ppb/afsr.rs @@ -21,7 +21,7 @@ impl W { VALUE_W::new(self, 0) } } -#[doc = "Auxiliary Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`afsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Auxiliary Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`afsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`afsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct AFSR_SPEC; impl crate::RegisterSpec for AFSR_SPEC { type Ux = u32; diff --git a/src/ppb/aircr.rs b/src/ppb/aircr.rs index 5b044510..b1f64a8b 100644 --- a/src/ppb/aircr.rs +++ b/src/ppb/aircr.rs @@ -130,7 +130,7 @@ impl W { VECTKEY_W::new(self, 16) } } -#[doc = "Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aircr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aircr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`aircr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aircr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct AIRCR_SPEC; impl crate::RegisterSpec for AIRCR_SPEC { type Ux = u32; diff --git a/src/ppb/bfar.rs b/src/ppb/bfar.rs index 6f2f280d..0c079de8 100644 --- a/src/ppb/bfar.rs +++ b/src/ppb/bfar.rs @@ -21,7 +21,7 @@ impl W { ADDRESS_W::new(self, 0) } } -#[doc = "BusFault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "BusFault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bfar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BFAR_SPEC; impl crate::RegisterSpec for BFAR_SPEC { type Ux = u32; diff --git a/src/ppb/ccr.rs b/src/ppb/ccr.rs index 4c202028..3126f8f9 100644 --- a/src/ppb/ccr.rs +++ b/src/ppb/ccr.rs @@ -393,7 +393,7 @@ impl W { STKALIGN_W::new(self, 9) } } -#[doc = "Configuration and Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Configuration and Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CCR_SPEC; impl crate::RegisterSpec for CCR_SPEC { type Ux = u32; diff --git a/src/ppb/cfsr.rs b/src/ppb/cfsr.rs index e02e6632..9a169710 100644 --- a/src/ppb/cfsr.rs +++ b/src/ppb/cfsr.rs @@ -1222,7 +1222,7 @@ impl W { DIVBYZERO_W::new(self, 25) } } -#[doc = "Configurable Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Configurable Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFSR_SPEC; impl crate::RegisterSpec for CFSR_SPEC { type Ux = u32; diff --git a/src/ppb/cpacr.rs b/src/ppb/cpacr.rs index dae19663..1d369904 100644 --- a/src/ppb/cpacr.rs +++ b/src/ppb/cpacr.rs @@ -174,7 +174,7 @@ impl W { CP11_W::new(self, 22) } } -#[doc = "Coprocessor Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpacr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpacr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Coprocessor Access Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpacr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpacr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CPACR_SPEC; impl crate::RegisterSpec for CPACR_SPEC { type Ux = u32; diff --git a/src/ppb/cpuid.rs b/src/ppb/cpuid.rs index 604fff46..f6630fbb 100644 --- a/src/ppb/cpuid.rs +++ b/src/ppb/cpuid.rs @@ -165,7 +165,7 @@ impl R { IMPLEMENTER_R::new(((self.bits >> 24) & 0xff) as u8) } } -#[doc = "CPUID Base Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CPUID Base Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpuid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CPUID_SPEC; impl crate::RegisterSpec for CPUID_SPEC { type Ux = u32; diff --git a/src/ppb/fpcar.rs b/src/ppb/fpcar.rs index 1a3a8de5..9f271893 100644 --- a/src/ppb/fpcar.rs +++ b/src/ppb/fpcar.rs @@ -21,7 +21,7 @@ impl W { ADDRESS_W::new(self, 3) } } -#[doc = "Floating-point Context Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Floating-point Context Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpcar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpcar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FPCAR_SPEC; impl crate::RegisterSpec for FPCAR_SPEC { type Ux = u32; diff --git a/src/ppb/fpccr.rs b/src/ppb/fpccr.rs index 03190909..de4e6c59 100644 --- a/src/ppb/fpccr.rs +++ b/src/ppb/fpccr.rs @@ -582,7 +582,7 @@ impl W { ASPEN_W::new(self, 31) } } -#[doc = "Floating-point Context Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Floating-point Context Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FPCCR_SPEC; impl crate::RegisterSpec for FPCCR_SPEC { type Ux = u32; diff --git a/src/ppb/fpdscr.rs b/src/ppb/fpdscr.rs index 57f48595..5dec8d8e 100644 --- a/src/ppb/fpdscr.rs +++ b/src/ppb/fpdscr.rs @@ -66,7 +66,7 @@ impl W { AHP_W::new(self, 26) } } -#[doc = "Floating-point Default Status Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpdscr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpdscr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Floating-point Default Status Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpdscr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpdscr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FPDSCR_SPEC; impl crate::RegisterSpec for FPDSCR_SPEC { type Ux = u32; diff --git a/src/ppb/hfsr.rs b/src/ppb/hfsr.rs index 3697d907..7049ec73 100644 --- a/src/ppb/hfsr.rs +++ b/src/ppb/hfsr.rs @@ -149,7 +149,7 @@ impl W { DEBUGEVT_W::new(self, 31) } } -#[doc = "HardFault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "HardFault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HFSR_SPEC; impl crate::RegisterSpec for HFSR_SPEC { type Ux = u32; diff --git a/src/ppb/icsr.rs b/src/ppb/icsr.rs index 3a2a5f5c..ea73ce6e 100644 --- a/src/ppb/icsr.rs +++ b/src/ppb/icsr.rs @@ -334,7 +334,7 @@ impl W { NMIPENDSET_W::new(self, 31) } } -#[doc = "Interrupt Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ICSR_SPEC; impl crate::RegisterSpec for ICSR_SPEC { type Ux = u32; diff --git a/src/ppb/mmfar.rs b/src/ppb/mmfar.rs index f0f5066a..50f6a26d 100644 --- a/src/ppb/mmfar.rs +++ b/src/ppb/mmfar.rs @@ -21,7 +21,7 @@ impl W { ADDRESS_W::new(self, 0) } } -#[doc = "MemManage Fault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmfar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmfar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MemManage Fault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmfar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmfar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MMFAR_SPEC; impl crate::RegisterSpec for MMFAR_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_ctrl.rs b/src/ppb/mpu_ctrl.rs index 2c257619..c92fbd1f 100644 --- a/src/ppb/mpu_ctrl.rs +++ b/src/ppb/mpu_ctrl.rs @@ -198,7 +198,7 @@ impl W { PRIVDEFENA_W::new(self, 2) } } -#[doc = "MPU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_CTRL_SPEC; impl crate::RegisterSpec for MPU_CTRL_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rasr.rs b/src/ppb/mpu_rasr.rs index 77842758..cb73ff71 100644 --- a/src/ppb/mpu_rasr.rs +++ b/src/ppb/mpu_rasr.rs @@ -246,7 +246,7 @@ impl W { XN_W::new(self, 28) } } -#[doc = "MPU Region Attribute and Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Attribute and Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RASR_SPEC; impl crate::RegisterSpec for MPU_RASR_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rasr_a1.rs b/src/ppb/mpu_rasr_a1.rs index 7e093b9f..b42f0d14 100644 --- a/src/ppb/mpu_rasr_a1.rs +++ b/src/ppb/mpu_rasr_a1.rs @@ -246,7 +246,7 @@ impl W { XN_W::new(self, 28) } } -#[doc = "MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RASR_A1_SPEC; impl crate::RegisterSpec for MPU_RASR_A1_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rasr_a2.rs b/src/ppb/mpu_rasr_a2.rs index 74ff4667..776f7e25 100644 --- a/src/ppb/mpu_rasr_a2.rs +++ b/src/ppb/mpu_rasr_a2.rs @@ -246,7 +246,7 @@ impl W { XN_W::new(self, 28) } } -#[doc = "MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RASR_A2_SPEC; impl crate::RegisterSpec for MPU_RASR_A2_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rasr_a3.rs b/src/ppb/mpu_rasr_a3.rs index 558c8533..18a2f8bc 100644 --- a/src/ppb/mpu_rasr_a3.rs +++ b/src/ppb/mpu_rasr_a3.rs @@ -246,7 +246,7 @@ impl W { XN_W::new(self, 28) } } -#[doc = "MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RASR_A3_SPEC; impl crate::RegisterSpec for MPU_RASR_A3_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rbar.rs b/src/ppb/mpu_rbar.rs index 67e670b4..12a75396 100644 --- a/src/ppb/mpu_rbar.rs +++ b/src/ppb/mpu_rbar.rs @@ -100,7 +100,7 @@ impl W { ADDR_W::new(self, 9) } } -#[doc = "MPU Region Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Base Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RBAR_SPEC; impl crate::RegisterSpec for MPU_RBAR_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rbar_a1.rs b/src/ppb/mpu_rbar_a1.rs index 29a81ba2..a37996a3 100644 --- a/src/ppb/mpu_rbar_a1.rs +++ b/src/ppb/mpu_rbar_a1.rs @@ -100,7 +100,7 @@ impl W { ADDR_W::new(self, 9) } } -#[doc = "MPU Region Base Address Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Base Address Register A1\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RBAR_A1_SPEC; impl crate::RegisterSpec for MPU_RBAR_A1_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rbar_a2.rs b/src/ppb/mpu_rbar_a2.rs index 9f72c2a9..6d2998b4 100644 --- a/src/ppb/mpu_rbar_a2.rs +++ b/src/ppb/mpu_rbar_a2.rs @@ -100,7 +100,7 @@ impl W { ADDR_W::new(self, 9) } } -#[doc = "MPU Region Base Address Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Base Address Register A2\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RBAR_A2_SPEC; impl crate::RegisterSpec for MPU_RBAR_A2_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rbar_a3.rs b/src/ppb/mpu_rbar_a3.rs index a7300f47..77c2573a 100644 --- a/src/ppb/mpu_rbar_a3.rs +++ b/src/ppb/mpu_rbar_a3.rs @@ -100,7 +100,7 @@ impl W { ADDR_W::new(self, 9) } } -#[doc = "MPU Region Base Address Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Base Address Register A3\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RBAR_A3_SPEC; impl crate::RegisterSpec for MPU_RBAR_A3_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_rnr.rs b/src/ppb/mpu_rnr.rs index e8767ab2..87423c66 100644 --- a/src/ppb/mpu_rnr.rs +++ b/src/ppb/mpu_rnr.rs @@ -21,7 +21,7 @@ impl W { REGION_W::new(self, 0) } } -#[doc = "MPU Region Number Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rnr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rnr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Region Number Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rnr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rnr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_RNR_SPEC; impl crate::RegisterSpec for MPU_RNR_SPEC { type Ux = u32; diff --git a/src/ppb/mpu_type.rs b/src/ppb/mpu_type.rs index 78279dc0..1759d751 100644 --- a/src/ppb/mpu_type.rs +++ b/src/ppb/mpu_type.rs @@ -23,7 +23,7 @@ impl R { IREGION_R::new(((self.bits >> 16) & 0xff) as u8) } } -#[doc = "MPU Type Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_type::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "MPU Type Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_type::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MPU_TYPE_SPEC; impl crate::RegisterSpec for MPU_TYPE_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iabr0.rs b/src/ppb/nvic_iabr0.rs index dd77dac0..1d1352c3 100644 --- a/src/ppb/nvic_iabr0.rs +++ b/src/ppb/nvic_iabr0.rs @@ -77,7 +77,7 @@ impl W { ACTIVE_W::new(self, 0) } } -#[doc = "Interrupt Active Bit Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Active Bit Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IABR0_SPEC; impl crate::RegisterSpec for NVIC_IABR0_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iabr1.rs b/src/ppb/nvic_iabr1.rs index fd06bcf2..14f6e78c 100644 --- a/src/ppb/nvic_iabr1.rs +++ b/src/ppb/nvic_iabr1.rs @@ -77,7 +77,7 @@ impl W { ACTIVE_W::new(self, 0) } } -#[doc = "Interrupt Active Bit Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Active Bit Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IABR1_SPEC; impl crate::RegisterSpec for NVIC_IABR1_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iabr2.rs b/src/ppb/nvic_iabr2.rs index 9081fde1..b4bfadce 100644 --- a/src/ppb/nvic_iabr2.rs +++ b/src/ppb/nvic_iabr2.rs @@ -77,7 +77,7 @@ impl W { ACTIVE_W::new(self, 0) } } -#[doc = "Interrupt Active Bit Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Active Bit Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IABR2_SPEC; impl crate::RegisterSpec for NVIC_IABR2_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iabr3.rs b/src/ppb/nvic_iabr3.rs index 824411cd..c686cad0 100644 --- a/src/ppb/nvic_iabr3.rs +++ b/src/ppb/nvic_iabr3.rs @@ -77,7 +77,7 @@ impl W { ACTIVE_W::new(self, 0) } } -#[doc = "Interrupt Active Bit Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Active Bit Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IABR3_SPEC; impl crate::RegisterSpec for NVIC_IABR3_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icer0.rs b/src/ppb/nvic_icer0.rs index 514a6631..c647323e 100644 --- a/src/ppb/nvic_icer0.rs +++ b/src/ppb/nvic_icer0.rs @@ -77,7 +77,7 @@ impl W { CLRENA_W::new(self, 0) } } -#[doc = "Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICER0_SPEC; impl crate::RegisterSpec for NVIC_ICER0_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icer1.rs b/src/ppb/nvic_icer1.rs index 39fe3638..4638b613 100644 --- a/src/ppb/nvic_icer1.rs +++ b/src/ppb/nvic_icer1.rs @@ -77,7 +77,7 @@ impl W { CLRENA_W::new(self, 0) } } -#[doc = "Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICER1_SPEC; impl crate::RegisterSpec for NVIC_ICER1_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icer2.rs b/src/ppb/nvic_icer2.rs index a4708794..a9dfe960 100644 --- a/src/ppb/nvic_icer2.rs +++ b/src/ppb/nvic_icer2.rs @@ -77,7 +77,7 @@ impl W { CLRENA_W::new(self, 0) } } -#[doc = "Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICER2_SPEC; impl crate::RegisterSpec for NVIC_ICER2_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icer3.rs b/src/ppb/nvic_icer3.rs index cbc0a7d4..83ce0792 100644 --- a/src/ppb/nvic_icer3.rs +++ b/src/ppb/nvic_icer3.rs @@ -77,7 +77,7 @@ impl W { CLRENA_W::new(self, 0) } } -#[doc = "Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICER3_SPEC; impl crate::RegisterSpec for NVIC_ICER3_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icpr0.rs b/src/ppb/nvic_icpr0.rs index 5445e2f2..4e3c2d6e 100644 --- a/src/ppb/nvic_icpr0.rs +++ b/src/ppb/nvic_icpr0.rs @@ -77,7 +77,7 @@ impl W { CLRPEND_W::new(self, 0) } } -#[doc = "Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICPR0_SPEC; impl crate::RegisterSpec for NVIC_ICPR0_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icpr1.rs b/src/ppb/nvic_icpr1.rs index fc0fc013..4e8f961e 100644 --- a/src/ppb/nvic_icpr1.rs +++ b/src/ppb/nvic_icpr1.rs @@ -77,7 +77,7 @@ impl W { CLRPEND_W::new(self, 0) } } -#[doc = "Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICPR1_SPEC; impl crate::RegisterSpec for NVIC_ICPR1_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icpr2.rs b/src/ppb/nvic_icpr2.rs index 7864b0e1..a6f060ee 100644 --- a/src/ppb/nvic_icpr2.rs +++ b/src/ppb/nvic_icpr2.rs @@ -77,7 +77,7 @@ impl W { CLRPEND_W::new(self, 0) } } -#[doc = "Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICPR2_SPEC; impl crate::RegisterSpec for NVIC_ICPR2_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_icpr3.rs b/src/ppb/nvic_icpr3.rs index f28d9fd0..4dfa476e 100644 --- a/src/ppb/nvic_icpr3.rs +++ b/src/ppb/nvic_icpr3.rs @@ -77,7 +77,7 @@ impl W { CLRPEND_W::new(self, 0) } } -#[doc = "Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ICPR3_SPEC; impl crate::RegisterSpec for NVIC_ICPR3_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr0.rs b/src/ppb/nvic_ipr0.rs index 1fc89f6d..1a94f2a7 100644 --- a/src/ppb/nvic_ipr0.rs +++ b/src/ppb/nvic_ipr0.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR0_SPEC; impl crate::RegisterSpec for NVIC_IPR0_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr1.rs b/src/ppb/nvic_ipr1.rs index 5fde81f1..a723d30f 100644 --- a/src/ppb/nvic_ipr1.rs +++ b/src/ppb/nvic_ipr1.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR1_SPEC; impl crate::RegisterSpec for NVIC_IPR1_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr10.rs b/src/ppb/nvic_ipr10.rs index df64b5e7..7597ac61 100644 --- a/src/ppb/nvic_ipr10.rs +++ b/src/ppb/nvic_ipr10.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 10\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr10::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr10::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR10_SPEC; impl crate::RegisterSpec for NVIC_IPR10_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr11.rs b/src/ppb/nvic_ipr11.rs index 45bdeed6..a4e75c2d 100644 --- a/src/ppb/nvic_ipr11.rs +++ b/src/ppb/nvic_ipr11.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 11\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr11::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr11::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR11_SPEC; impl crate::RegisterSpec for NVIC_IPR11_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr12.rs b/src/ppb/nvic_ipr12.rs index f6af8e36..43315fc1 100644 --- a/src/ppb/nvic_ipr12.rs +++ b/src/ppb/nvic_ipr12.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR12_SPEC; impl crate::RegisterSpec for NVIC_IPR12_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr13.rs b/src/ppb/nvic_ipr13.rs index 88352ec2..bb86b859 100644 --- a/src/ppb/nvic_ipr13.rs +++ b/src/ppb/nvic_ipr13.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 13\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr13::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr13::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR13_SPEC; impl crate::RegisterSpec for NVIC_IPR13_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr14.rs b/src/ppb/nvic_ipr14.rs index 51d93123..51e3137b 100644 --- a/src/ppb/nvic_ipr14.rs +++ b/src/ppb/nvic_ipr14.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 14\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr14::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr14::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR14_SPEC; impl crate::RegisterSpec for NVIC_IPR14_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr15.rs b/src/ppb/nvic_ipr15.rs index 797d1f6d..1b10e27a 100644 --- a/src/ppb/nvic_ipr15.rs +++ b/src/ppb/nvic_ipr15.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr15::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr15::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 15\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr15::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr15::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR15_SPEC; impl crate::RegisterSpec for NVIC_IPR15_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr16.rs b/src/ppb/nvic_ipr16.rs index aded47e7..c8247e2c 100644 --- a/src/ppb/nvic_ipr16.rs +++ b/src/ppb/nvic_ipr16.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr16::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr16::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 16\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr16::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr16::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR16_SPEC; impl crate::RegisterSpec for NVIC_IPR16_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr17.rs b/src/ppb/nvic_ipr17.rs index 17cb4107..84ada4a3 100644 --- a/src/ppb/nvic_ipr17.rs +++ b/src/ppb/nvic_ipr17.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr17::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr17::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 17\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr17::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr17::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR17_SPEC; impl crate::RegisterSpec for NVIC_IPR17_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr18.rs b/src/ppb/nvic_ipr18.rs index a4f66552..58b2a3c8 100644 --- a/src/ppb/nvic_ipr18.rs +++ b/src/ppb/nvic_ipr18.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr18::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr18::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 18\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr18::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr18::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR18_SPEC; impl crate::RegisterSpec for NVIC_IPR18_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr19.rs b/src/ppb/nvic_ipr19.rs index 737504ef..8a2045af 100644 --- a/src/ppb/nvic_ipr19.rs +++ b/src/ppb/nvic_ipr19.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr19::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr19::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 19\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr19::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr19::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR19_SPEC; impl crate::RegisterSpec for NVIC_IPR19_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr2.rs b/src/ppb/nvic_ipr2.rs index 54b3b5e7..0aa004bc 100644 --- a/src/ppb/nvic_ipr2.rs +++ b/src/ppb/nvic_ipr2.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR2_SPEC; impl crate::RegisterSpec for NVIC_IPR2_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr20.rs b/src/ppb/nvic_ipr20.rs index 37f4364f..79278117 100644 --- a/src/ppb/nvic_ipr20.rs +++ b/src/ppb/nvic_ipr20.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr20::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr20::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 20\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr20::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr20::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR20_SPEC; impl crate::RegisterSpec for NVIC_IPR20_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr21.rs b/src/ppb/nvic_ipr21.rs index 74d0cb1e..d1155af3 100644 --- a/src/ppb/nvic_ipr21.rs +++ b/src/ppb/nvic_ipr21.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr21::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr21::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 21\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr21::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr21::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR21_SPEC; impl crate::RegisterSpec for NVIC_IPR21_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr22.rs b/src/ppb/nvic_ipr22.rs index 55802b0a..95d954f4 100644 --- a/src/ppb/nvic_ipr22.rs +++ b/src/ppb/nvic_ipr22.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr22::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr22::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 22\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr22::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr22::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR22_SPEC; impl crate::RegisterSpec for NVIC_IPR22_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr23.rs b/src/ppb/nvic_ipr23.rs index a455964e..5f88d74b 100644 --- a/src/ppb/nvic_ipr23.rs +++ b/src/ppb/nvic_ipr23.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr23::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr23::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 23\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr23::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr23::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR23_SPEC; impl crate::RegisterSpec for NVIC_IPR23_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr24.rs b/src/ppb/nvic_ipr24.rs index e4a25307..be770ff3 100644 --- a/src/ppb/nvic_ipr24.rs +++ b/src/ppb/nvic_ipr24.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr24::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr24::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 24\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr24::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr24::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR24_SPEC; impl crate::RegisterSpec for NVIC_IPR24_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr25.rs b/src/ppb/nvic_ipr25.rs index fa865334..fdb26d7c 100644 --- a/src/ppb/nvic_ipr25.rs +++ b/src/ppb/nvic_ipr25.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr25::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr25::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 25\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr25::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr25::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR25_SPEC; impl crate::RegisterSpec for NVIC_IPR25_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr26.rs b/src/ppb/nvic_ipr26.rs index f3bddfc5..7c50398b 100644 --- a/src/ppb/nvic_ipr26.rs +++ b/src/ppb/nvic_ipr26.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr26::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr26::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 26\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr26::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr26::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR26_SPEC; impl crate::RegisterSpec for NVIC_IPR26_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr27.rs b/src/ppb/nvic_ipr27.rs index 6e001e20..bcbc1c76 100644 --- a/src/ppb/nvic_ipr27.rs +++ b/src/ppb/nvic_ipr27.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr27::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr27::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 27\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr27::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr27::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR27_SPEC; impl crate::RegisterSpec for NVIC_IPR27_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr3.rs b/src/ppb/nvic_ipr3.rs index 8c361d56..93fecfd2 100644 --- a/src/ppb/nvic_ipr3.rs +++ b/src/ppb/nvic_ipr3.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR3_SPEC; impl crate::RegisterSpec for NVIC_IPR3_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr4.rs b/src/ppb/nvic_ipr4.rs index 47c888a6..7fd1aba9 100644 --- a/src/ppb/nvic_ipr4.rs +++ b/src/ppb/nvic_ipr4.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR4_SPEC; impl crate::RegisterSpec for NVIC_IPR4_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr5.rs b/src/ppb/nvic_ipr5.rs index 3870b4f6..29a11906 100644 --- a/src/ppb/nvic_ipr5.rs +++ b/src/ppb/nvic_ipr5.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR5_SPEC; impl crate::RegisterSpec for NVIC_IPR5_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr6.rs b/src/ppb/nvic_ipr6.rs index b79589ae..689ce5ff 100644 --- a/src/ppb/nvic_ipr6.rs +++ b/src/ppb/nvic_ipr6.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 6\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR6_SPEC; impl crate::RegisterSpec for NVIC_IPR6_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr7.rs b/src/ppb/nvic_ipr7.rs index 5a0e310f..46c73359 100644 --- a/src/ppb/nvic_ipr7.rs +++ b/src/ppb/nvic_ipr7.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 7\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR7_SPEC; impl crate::RegisterSpec for NVIC_IPR7_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr8.rs b/src/ppb/nvic_ipr8.rs index 8ae71408..49aa77b1 100644 --- a/src/ppb/nvic_ipr8.rs +++ b/src/ppb/nvic_ipr8.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR8_SPEC; impl crate::RegisterSpec for NVIC_IPR8_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ipr9.rs b/src/ppb/nvic_ipr9.rs index 59bac530..c843b0d2 100644 --- a/src/ppb/nvic_ipr9.rs +++ b/src/ppb/nvic_ipr9.rs @@ -66,7 +66,7 @@ impl W { PRI_3_W::new(self, 24) } } -#[doc = "Interrupt Priority Register 9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Priority Register 9\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr9::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr9::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_IPR9_SPEC; impl crate::RegisterSpec for NVIC_IPR9_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iser0.rs b/src/ppb/nvic_iser0.rs index 2d08fdde..05c64f30 100644 --- a/src/ppb/nvic_iser0.rs +++ b/src/ppb/nvic_iser0.rs @@ -77,7 +77,7 @@ impl W { SETENA_W::new(self, 0) } } -#[doc = "Interrupt Set-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISER0_SPEC; impl crate::RegisterSpec for NVIC_ISER0_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iser1.rs b/src/ppb/nvic_iser1.rs index 7f737780..80fc1e5d 100644 --- a/src/ppb/nvic_iser1.rs +++ b/src/ppb/nvic_iser1.rs @@ -77,7 +77,7 @@ impl W { SETENA_W::new(self, 0) } } -#[doc = "Interrupt Set-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISER1_SPEC; impl crate::RegisterSpec for NVIC_ISER1_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iser2.rs b/src/ppb/nvic_iser2.rs index 03fc4f9c..9bee7e59 100644 --- a/src/ppb/nvic_iser2.rs +++ b/src/ppb/nvic_iser2.rs @@ -77,7 +77,7 @@ impl W { SETENA_W::new(self, 0) } } -#[doc = "Interrupt Set-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-enable Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISER2_SPEC; impl crate::RegisterSpec for NVIC_ISER2_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_iser3.rs b/src/ppb/nvic_iser3.rs index 6145e912..b2faaa0b 100644 --- a/src/ppb/nvic_iser3.rs +++ b/src/ppb/nvic_iser3.rs @@ -77,7 +77,7 @@ impl W { SETENA_W::new(self, 0) } } -#[doc = "Interrupt Set-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-enable Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISER3_SPEC; impl crate::RegisterSpec for NVIC_ISER3_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ispr0.rs b/src/ppb/nvic_ispr0.rs index 3bcf8697..db41fe52 100644 --- a/src/ppb/nvic_ispr0.rs +++ b/src/ppb/nvic_ispr0.rs @@ -77,7 +77,7 @@ impl W { SETPEND_W::new(self, 0) } } -#[doc = "Interrupt Set-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-pending Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISPR0_SPEC; impl crate::RegisterSpec for NVIC_ISPR0_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ispr1.rs b/src/ppb/nvic_ispr1.rs index cb0299a8..5276c203 100644 --- a/src/ppb/nvic_ispr1.rs +++ b/src/ppb/nvic_ispr1.rs @@ -77,7 +77,7 @@ impl W { SETPEND_W::new(self, 0) } } -#[doc = "Interrupt Set-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-pending Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISPR1_SPEC; impl crate::RegisterSpec for NVIC_ISPR1_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ispr2.rs b/src/ppb/nvic_ispr2.rs index f1db28f4..abf15b5d 100644 --- a/src/ppb/nvic_ispr2.rs +++ b/src/ppb/nvic_ispr2.rs @@ -77,7 +77,7 @@ impl W { SETPEND_W::new(self, 0) } } -#[doc = "Interrupt Set-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-pending Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISPR2_SPEC; impl crate::RegisterSpec for NVIC_ISPR2_SPEC { type Ux = u32; diff --git a/src/ppb/nvic_ispr3.rs b/src/ppb/nvic_ispr3.rs index 43c01e7d..eff33e3e 100644 --- a/src/ppb/nvic_ispr3.rs +++ b/src/ppb/nvic_ispr3.rs @@ -77,7 +77,7 @@ impl W { SETPEND_W::new(self, 0) } } -#[doc = "Interrupt Set-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Set-pending Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NVIC_ISPR3_SPEC; impl crate::RegisterSpec for NVIC_ISPR3_SPEC { type Ux = u32; diff --git a/src/ppb/scr.rs b/src/ppb/scr.rs index 34612da7..2e6656c6 100644 --- a/src/ppb/scr.rs +++ b/src/ppb/scr.rs @@ -198,7 +198,7 @@ impl W { SEVONPEND_W::new(self, 4) } } -#[doc = "System Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`scr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SCR_SPEC; impl crate::RegisterSpec for SCR_SPEC { type Ux = u32; diff --git a/src/ppb/shcsr.rs b/src/ppb/shcsr.rs index 54862cc3..a58d218c 100644 --- a/src/ppb/shcsr.rs +++ b/src/ppb/shcsr.rs @@ -216,7 +216,7 @@ impl W { USGFAULTENA_W::new(self, 18) } } -#[doc = "System Handler Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shcsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shcsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Handler Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`shcsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shcsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SHCSR_SPEC; impl crate::RegisterSpec for SHCSR_SPEC { type Ux = u32; diff --git a/src/ppb/shpr1.rs b/src/ppb/shpr1.rs index b2eefba9..152d5d8c 100644 --- a/src/ppb/shpr1.rs +++ b/src/ppb/shpr1.rs @@ -51,7 +51,7 @@ impl W { PRI_6_W::new(self, 16) } } -#[doc = "System Handler Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Handler Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SHPR1_SPEC; impl crate::RegisterSpec for SHPR1_SPEC { type Ux = u32; diff --git a/src/ppb/shpr2.rs b/src/ppb/shpr2.rs index da6d23f4..2e3c0058 100644 --- a/src/ppb/shpr2.rs +++ b/src/ppb/shpr2.rs @@ -21,7 +21,7 @@ impl W { PRI_11_W::new(self, 24) } } -#[doc = "System Handler Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Handler Priority Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SHPR2_SPEC; impl crate::RegisterSpec for SHPR2_SPEC { type Ux = u32; diff --git a/src/ppb/shpr3.rs b/src/ppb/shpr3.rs index 56ec2423..34baaa1c 100644 --- a/src/ppb/shpr3.rs +++ b/src/ppb/shpr3.rs @@ -36,7 +36,7 @@ impl W { PRI_15_W::new(self, 24) } } -#[doc = "System Handler Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Handler Priority Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SHPR3_SPEC; impl crate::RegisterSpec for SHPR3_SPEC { type Ux = u32; diff --git a/src/ppb/stir.rs b/src/ppb/stir.rs index 4b715a26..6d260a60 100644 --- a/src/ppb/stir.rs +++ b/src/ppb/stir.rs @@ -10,7 +10,7 @@ impl W { INTID_W::new(self, 0) } } -#[doc = "Software Trigger Interrupt Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stir::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Software Trigger Interrupt Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stir::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STIR_SPEC; impl crate::RegisterSpec for STIR_SPEC { type Ux = u32; diff --git a/src/ppb/syst_calib.rs b/src/ppb/syst_calib.rs index f70e2384..b526dc65 100644 --- a/src/ppb/syst_calib.rs +++ b/src/ppb/syst_calib.rs @@ -149,7 +149,7 @@ impl W { NOREF_W::new(self, 31) } } -#[doc = "SysTick Calibration Value Register r\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_calib::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_calib::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SysTick Calibration Value Register r\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_calib::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_calib::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYST_CALIB_SPEC; impl crate::RegisterSpec for SYST_CALIB_SPEC { type Ux = u32; diff --git a/src/ppb/syst_csr.rs b/src/ppb/syst_csr.rs index 090cbcef..141b5b35 100644 --- a/src/ppb/syst_csr.rs +++ b/src/ppb/syst_csr.rs @@ -213,7 +213,7 @@ impl W { COUNTFLAG_W::new(self, 16) } } -#[doc = "SysTick Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_csr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_csr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SysTick Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_csr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_csr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYST_CSR_SPEC; impl crate::RegisterSpec for SYST_CSR_SPEC { type Ux = u32; diff --git a/src/ppb/syst_cvr.rs b/src/ppb/syst_cvr.rs index 5dc9034b..ca5f621e 100644 --- a/src/ppb/syst_cvr.rs +++ b/src/ppb/syst_cvr.rs @@ -21,7 +21,7 @@ impl W { CURRENT_W::new(self, 0) } } -#[doc = "SysTick Current Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_cvr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_cvr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SysTick Current Value Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_cvr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_cvr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYST_CVR_SPEC; impl crate::RegisterSpec for SYST_CVR_SPEC { type Ux = u32; diff --git a/src/ppb/syst_rvr.rs b/src/ppb/syst_rvr.rs index 1394ee23..0fa79e04 100644 --- a/src/ppb/syst_rvr.rs +++ b/src/ppb/syst_rvr.rs @@ -21,7 +21,7 @@ impl W { RELOAD_W::new(self, 0) } } -#[doc = "SysTick Reload Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_rvr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_rvr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SysTick Reload Value Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_rvr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_rvr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYST_RVR_SPEC; impl crate::RegisterSpec for SYST_RVR_SPEC { type Ux = u32; diff --git a/src/ppb/vtor.rs b/src/ppb/vtor.rs index 67cd5c13..1503b4ae 100644 --- a/src/ppb/vtor.rs +++ b/src/ppb/vtor.rs @@ -21,7 +21,7 @@ impl W { TBLOFF_W::new(self, 10) } } -#[doc = "Vector Table Offset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vtor::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vtor::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Vector Table Offset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vtor::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vtor::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct VTOR_SPEC; impl crate::RegisterSpec for VTOR_SPEC { type Ux = u32; diff --git a/src/pref.rs b/src/pref.rs index 7205f0ae..6ac541a6 100644 --- a/src/pref.rs +++ b/src/pref.rs @@ -10,7 +10,7 @@ impl RegisterBlock { &self.pcon } } -#[doc = "PCON (rw) register accessor: Prefetch Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcon`] +#[doc = "PCON (rw) register accessor: Prefetch Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcon`] module"] pub type PCON = crate::Reg; #[doc = "Prefetch Configuration Register"] diff --git a/src/pref/pcon.rs b/src/pref/pcon.rs index 51835475..17cb6b58 100644 --- a/src/pref/pcon.rs +++ b/src/pref/pcon.rs @@ -107,7 +107,7 @@ impl W { IINV_W::new(self, 1) } } -#[doc = "Prefetch Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Prefetch Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCON_SPEC; impl crate::RegisterSpec for PCON_SPEC { type Ux = u32; diff --git a/src/rtc.rs b/src/rtc.rs index eff62dc2..3a8a3d81 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -64,52 +64,52 @@ impl RegisterBlock { &self.tim1 } } -#[doc = "ID (r) register accessor: RTC ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: RTC ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "RTC ID Register"] pub mod id; -#[doc = "CTR (rw) register accessor: RTC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] +#[doc = "CTR (rw) register accessor: RTC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] pub type CTR = crate::Reg; #[doc = "RTC Control Register"] pub mod ctr; -#[doc = "RAWSTAT (r) register accessor: RTC Raw Service Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawstat`] +#[doc = "RAWSTAT (r) register accessor: RTC Raw Service Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rawstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawstat`] module"] pub type RAWSTAT = crate::Reg; #[doc = "RTC Raw Service Request Register"] pub mod rawstat; -#[doc = "STSSR (r) register accessor: RTC Service Request Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stssr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stssr`] +#[doc = "STSSR (r) register accessor: RTC Service Request Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stssr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stssr`] module"] pub type STSSR = crate::Reg; #[doc = "RTC Service Request Status Register"] pub mod stssr; -#[doc = "MSKSR (rw) register accessor: RTC Service Request Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msksr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msksr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msksr`] +#[doc = "MSKSR (rw) register accessor: RTC Service Request Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msksr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msksr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msksr`] module"] pub type MSKSR = crate::Reg; #[doc = "RTC Service Request Mask Register"] pub mod msksr; -#[doc = "CLRSR (w) register accessor: RTC Clear Service Request Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clrsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clrsr`] +#[doc = "CLRSR (w) register accessor: RTC Clear Service Request Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clrsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clrsr`] module"] pub type CLRSR = crate::Reg; #[doc = "RTC Clear Service Request Register"] pub mod clrsr; -#[doc = "ATIM0 (rw) register accessor: RTC Alarm Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim0`] +#[doc = "ATIM0 (rw) register accessor: RTC Alarm Time Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`atim0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`atim0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim0`] module"] pub type ATIM0 = crate::Reg; #[doc = "RTC Alarm Time Register 0"] pub mod atim0; -#[doc = "ATIM1 (rw) register accessor: RTC Alarm Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim1`] +#[doc = "ATIM1 (rw) register accessor: RTC Alarm Time Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`atim1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`atim1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim1`] module"] pub type ATIM1 = crate::Reg; #[doc = "RTC Alarm Time Register 1"] pub mod atim1; -#[doc = "TIM0 (rw) register accessor: RTC Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim0`] +#[doc = "TIM0 (rw) register accessor: RTC Time Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`tim0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim0`] module"] pub type TIM0 = crate::Reg; #[doc = "RTC Time Register 0"] pub mod tim0; -#[doc = "TIM1 (rw) register accessor: RTC Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim1`] +#[doc = "TIM1 (rw) register accessor: RTC Time Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`tim1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim1`] module"] pub type TIM1 = crate::Reg; #[doc = "RTC Time Register 1"] diff --git a/src/rtc/atim0.rs b/src/rtc/atim0.rs index bb787ee5..37ed4dcf 100644 --- a/src/rtc/atim0.rs +++ b/src/rtc/atim0.rs @@ -66,7 +66,7 @@ impl W { ADA_W::new(self, 24) } } -#[doc = "RTC Alarm Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Alarm Time Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`atim0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`atim0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ATIM0_SPEC; impl crate::RegisterSpec for ATIM0_SPEC { type Ux = u32; diff --git a/src/rtc/atim1.rs b/src/rtc/atim1.rs index 5e6f6718..99bf56b8 100644 --- a/src/rtc/atim1.rs +++ b/src/rtc/atim1.rs @@ -36,7 +36,7 @@ impl W { AYE_W::new(self, 16) } } -#[doc = "RTC Alarm Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Alarm Time Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`atim1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`atim1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ATIM1_SPEC; impl crate::RegisterSpec for ATIM1_SPEC { type Ux = u32; diff --git a/src/rtc/clrsr.rs b/src/rtc/clrsr.rs index 792ea452..4d641e97 100644 --- a/src/rtc/clrsr.rs +++ b/src/rtc/clrsr.rs @@ -58,7 +58,7 @@ impl W { RAI_W::new(self, 8) } } -#[doc = "RTC Clear Service Request Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clrsr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Clear Service Request Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clrsr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLRSR_SPEC; impl crate::RegisterSpec for CLRSR_SPEC { type Ux = u32; diff --git a/src/rtc/ctr.rs b/src/rtc/ctr.rs index ff1b5894..e932c8b6 100644 --- a/src/rtc/ctr.rs +++ b/src/rtc/ctr.rs @@ -141,7 +141,7 @@ impl W { DIV_W::new(self, 16) } } -#[doc = "RTC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CTR_SPEC; impl crate::RegisterSpec for CTR_SPEC { type Ux = u32; diff --git a/src/rtc/id.rs b/src/rtc/id.rs index 4e46c792..c8951ae3 100644 --- a/src/rtc/id.rs +++ b/src/rtc/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "RTC ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/rtc/msksr.rs b/src/rtc/msksr.rs index 2169d505..778aaf2e 100644 --- a/src/rtc/msksr.rs +++ b/src/rtc/msksr.rs @@ -111,7 +111,7 @@ impl W { MAI_W::new(self, 8) } } -#[doc = "RTC Service Request Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msksr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msksr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Service Request Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msksr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msksr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MSKSR_SPEC; impl crate::RegisterSpec for MSKSR_SPEC { type Ux = u32; diff --git a/src/rtc/rawstat.rs b/src/rtc/rawstat.rs index 1d473d74..9d5a21f9 100644 --- a/src/rtc/rawstat.rs +++ b/src/rtc/rawstat.rs @@ -51,7 +51,7 @@ impl R { RAI_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "RTC Raw Service Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Raw Service Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rawstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RAWSTAT_SPEC; impl crate::RegisterSpec for RAWSTAT_SPEC { type Ux = u32; diff --git a/src/rtc/stssr.rs b/src/rtc/stssr.rs index 78e32ac1..092814be 100644 --- a/src/rtc/stssr.rs +++ b/src/rtc/stssr.rs @@ -51,7 +51,7 @@ impl R { SAI_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "RTC Service Request Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stssr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Service Request Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stssr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STSSR_SPEC; impl crate::RegisterSpec for STSSR_SPEC { type Ux = u32; diff --git a/src/rtc/tim0.rs b/src/rtc/tim0.rs index 692a3141..e425c0e4 100644 --- a/src/rtc/tim0.rs +++ b/src/rtc/tim0.rs @@ -66,7 +66,7 @@ impl W { DA_W::new(self, 24) } } -#[doc = "RTC Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Time Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`tim0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIM0_SPEC; impl crate::RegisterSpec for TIM0_SPEC { type Ux = u32; diff --git a/src/rtc/tim1.rs b/src/rtc/tim1.rs index a8177888..7502be4c 100644 --- a/src/rtc/tim1.rs +++ b/src/rtc/tim1.rs @@ -51,7 +51,7 @@ impl W { YE_W::new(self, 16) } } -#[doc = "RTC Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RTC Time Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`tim1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tim1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIM1_SPEC; impl crate::RegisterSpec for TIM1_SPEC { type Ux = u32; diff --git a/src/scu_clk.rs b/src/scu_clk.rs index 5d959a84..14368009 100644 --- a/src/scu_clk.rs +++ b/src/scu_clk.rs @@ -138,112 +138,112 @@ impl RegisterBlock { &self.cgatclr2 } } -#[doc = "CLKSTAT (r) register accessor: Clock Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkstat`] +#[doc = "CLKSTAT (r) register accessor: Clock Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkstat`] module"] pub type CLKSTAT = crate::Reg; #[doc = "Clock Status Register"] pub mod clkstat; -#[doc = "CLKSET (w) register accessor: CLK Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkset`] +#[doc = "CLKSET (w) register accessor: CLK Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkset`] module"] pub type CLKSET = crate::Reg; #[doc = "CLK Set Register"] pub mod clkset; -#[doc = "CLKCLR (w) register accessor: CLK Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkclr`] +#[doc = "CLKCLR (w) register accessor: CLK Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkclr`] module"] pub type CLKCLR = crate::Reg; #[doc = "CLK Clear Register"] pub mod clkclr; -#[doc = "SYSCLKCR (rw) register accessor: System Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sysclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sysclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclkcr`] +#[doc = "SYSCLKCR (rw) register accessor: System Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclkcr`] module"] pub type SYSCLKCR = crate::Reg; #[doc = "System Clock Control Register"] pub mod sysclkcr; -#[doc = "CPUCLKCR (rw) register accessor: CPU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpuclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuclkcr`] +#[doc = "CPUCLKCR (rw) register accessor: CPU Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpuclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpuclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuclkcr`] module"] pub type CPUCLKCR = crate::Reg; #[doc = "CPU Clock Control Register"] pub mod cpuclkcr; -#[doc = "PBCLKCR (rw) register accessor: Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pbclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pbclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pbclkcr`] +#[doc = "PBCLKCR (rw) register accessor: Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pbclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pbclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pbclkcr`] module"] pub type PBCLKCR = crate::Reg; #[doc = "Peripheral Bus Clock Control Register"] pub mod pbclkcr; -#[doc = "USBCLKCR (rw) register accessor: USB Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbclkcr`] +#[doc = "USBCLKCR (rw) register accessor: USB Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`usbclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbclkcr`] module"] pub type USBCLKCR = crate::Reg; #[doc = "USB Clock Control Register"] pub mod usbclkcr; -#[doc = "CCUCLKCR (rw) register accessor: CCU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccuclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccuclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccuclkcr`] +#[doc = "CCUCLKCR (rw) register accessor: CCU Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccuclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccuclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccuclkcr`] module"] pub type CCUCLKCR = crate::Reg; #[doc = "CCU Clock Control Register"] pub mod ccuclkcr; -#[doc = "WDTCLKCR (rw) register accessor: WDT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclkcr`] +#[doc = "WDTCLKCR (rw) register accessor: WDT Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdtclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdtclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclkcr`] module"] pub type WDTCLKCR = crate::Reg; #[doc = "WDT Clock Control Register"] pub mod wdtclkcr; -#[doc = "EXTCLKCR (rw) register accessor: External Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`extclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`extclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extclkcr`] +#[doc = "EXTCLKCR (rw) register accessor: External Clock Control\n\nYou can [`read`](crate::Reg::read) this register and get [`extclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extclkcr`] module"] pub type EXTCLKCR = crate::Reg; #[doc = "External Clock Control"] pub mod extclkcr; -#[doc = "MLINKCLKCR (rw) register accessor: Multi-Link Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mlinkclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mlinkclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mlinkclkcr`] +#[doc = "MLINKCLKCR (rw) register accessor: Multi-Link Clock Control\n\nYou can [`read`](crate::Reg::read) this register and get [`mlinkclkcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mlinkclkcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mlinkclkcr`] module"] pub type MLINKCLKCR = crate::Reg; #[doc = "Multi-Link Clock Control"] pub mod mlinkclkcr; -#[doc = "SLEEPCR (rw) register accessor: Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sleepcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sleepcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sleepcr`] +#[doc = "SLEEPCR (rw) register accessor: Sleep Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sleepcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sleepcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sleepcr`] module"] pub type SLEEPCR = crate::Reg; #[doc = "Sleep Control Register"] pub mod sleepcr; -#[doc = "DSLEEPCR (rw) register accessor: Deep Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsleepcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsleepcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsleepcr`] +#[doc = "DSLEEPCR (rw) register accessor: Deep Sleep Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dsleepcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsleepcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsleepcr`] module"] pub type DSLEEPCR = crate::Reg; #[doc = "Deep Sleep Control Register"] pub mod dsleepcr; -#[doc = "CGATSTAT0 (r) register accessor: Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat0`] +#[doc = "CGATSTAT0 (r) register accessor: Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::Reg::read) this register and get [`cgatstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat0`] module"] pub type CGATSTAT0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Status"] pub mod cgatstat0; -#[doc = "CGATSET0 (w) register accessor: Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset0`] +#[doc = "CGATSET0 (w) register accessor: Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset0`] module"] pub type CGATSET0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Set"] pub mod cgatset0; -#[doc = "CGATCLR0 (w) register accessor: Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr0`] +#[doc = "CGATCLR0 (w) register accessor: Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr0`] module"] pub type CGATCLR0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Clear"] pub mod cgatclr0; -#[doc = "CGATSTAT1 (r) register accessor: Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat1`] +#[doc = "CGATSTAT1 (r) register accessor: Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::Reg::read) this register and get [`cgatstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat1`] module"] pub type CGATSTAT1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Status"] pub mod cgatstat1; -#[doc = "CGATSET1 (w) register accessor: Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset1`] +#[doc = "CGATSET1 (w) register accessor: Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset1`] module"] pub type CGATSET1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Set"] pub mod cgatset1; -#[doc = "CGATCLR1 (w) register accessor: Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr1`] +#[doc = "CGATCLR1 (w) register accessor: Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr1`] module"] pub type CGATCLR1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Clear"] pub mod cgatclr1; -#[doc = "CGATSTAT2 (r) register accessor: Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat2`] +#[doc = "CGATSTAT2 (r) register accessor: Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::Reg::read) this register and get [`cgatstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat2`] module"] pub type CGATSTAT2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Status"] pub mod cgatstat2; -#[doc = "CGATSET2 (w) register accessor: Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset2`] +#[doc = "CGATSET2 (w) register accessor: Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset2`] module"] pub type CGATSET2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Set"] pub mod cgatset2; -#[doc = "CGATCLR2 (w) register accessor: Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr2`] +#[doc = "CGATCLR2 (w) register accessor: Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr2`] module"] pub type CGATCLR2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Clear"] diff --git a/src/scu_clk/ccuclkcr.rs b/src/scu_clk/ccuclkcr.rs index 92d7a1d6..7fb4097e 100644 --- a/src/scu_clk/ccuclkcr.rs +++ b/src/scu_clk/ccuclkcr.rs @@ -70,7 +70,7 @@ impl W { CCUDIV_W::new(self, 0) } } -#[doc = "CCU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccuclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccuclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CCU Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccuclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccuclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CCUCLKCR_SPEC; impl crate::RegisterSpec for CCUCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatclr0.rs b/src/scu_clk/cgatclr0.rs index e0ec3b59..5134e775 100644 --- a/src/scu_clk/cgatclr0.rs +++ b/src/scu_clk/cgatclr0.rs @@ -446,7 +446,7 @@ impl W { HRPWM0_W::new(self, 23) } } -#[doc = "Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATCLR0_SPEC; impl crate::RegisterSpec for CGATCLR0_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatclr1.rs b/src/scu_clk/cgatclr1.rs index 46aa9caa..bfce4fe5 100644 --- a/src/scu_clk/cgatclr1.rs +++ b/src/scu_clk/cgatclr1.rs @@ -224,7 +224,7 @@ impl W { PPORTS_W::new(self, 9) } } -#[doc = "Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATCLR1_SPEC; impl crate::RegisterSpec for CGATCLR1_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatclr2.rs b/src/scu_clk/cgatclr2.rs index bb8c14a0..2ddcb780 100644 --- a/src/scu_clk/cgatclr2.rs +++ b/src/scu_clk/cgatclr2.rs @@ -187,7 +187,7 @@ impl W { USB_W::new(self, 7) } } -#[doc = "Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATCLR2_SPEC; impl crate::RegisterSpec for CGATCLR2_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatset0.rs b/src/scu_clk/cgatset0.rs index f0e78fc3..8c8fa4a0 100644 --- a/src/scu_clk/cgatset0.rs +++ b/src/scu_clk/cgatset0.rs @@ -446,7 +446,7 @@ impl W { HRPWM0_W::new(self, 23) } } -#[doc = "Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATSET0_SPEC; impl crate::RegisterSpec for CGATSET0_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatset1.rs b/src/scu_clk/cgatset1.rs index cbb103cd..ca1618a2 100644 --- a/src/scu_clk/cgatset1.rs +++ b/src/scu_clk/cgatset1.rs @@ -224,7 +224,7 @@ impl W { PPORTS_W::new(self, 9) } } -#[doc = "Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATSET1_SPEC; impl crate::RegisterSpec for CGATSET1_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatset2.rs b/src/scu_clk/cgatset2.rs index e1a5816d..d3b21084 100644 --- a/src/scu_clk/cgatset2.rs +++ b/src/scu_clk/cgatset2.rs @@ -187,7 +187,7 @@ impl W { USB_W::new(self, 7) } } -#[doc = "Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cgatset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATSET2_SPEC; impl crate::RegisterSpec for CGATSET2_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatstat0.rs b/src/scu_clk/cgatstat0.rs index 61c507b4..88c923de 100644 --- a/src/scu_clk/cgatstat0.rs +++ b/src/scu_clk/cgatstat0.rs @@ -494,7 +494,7 @@ impl R { HRPWM0_R::new(((self.bits >> 23) & 1) != 0) } } -#[doc = "Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::Reg::read) this register and get [`cgatstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATSTAT0_SPEC; impl crate::RegisterSpec for CGATSTAT0_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatstat1.rs b/src/scu_clk/cgatstat1.rs index 1cf9913b..2f886d7d 100644 --- a/src/scu_clk/cgatstat1.rs +++ b/src/scu_clk/cgatstat1.rs @@ -248,7 +248,7 @@ impl R { PPORTS_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::Reg::read) this register and get [`cgatstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATSTAT1_SPEC; impl crate::RegisterSpec for CGATSTAT1_SPEC { type Ux = u32; diff --git a/src/scu_clk/cgatstat2.rs b/src/scu_clk/cgatstat2.rs index 1d8c3bd6..d55a4f3c 100644 --- a/src/scu_clk/cgatstat2.rs +++ b/src/scu_clk/cgatstat2.rs @@ -207,7 +207,7 @@ impl R { USB_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::Reg::read) this register and get [`cgatstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CGATSTAT2_SPEC; impl crate::RegisterSpec for CGATSTAT2_SPEC { type Ux = u32; diff --git a/src/scu_clk/clkclr.rs b/src/scu_clk/clkclr.rs index 36bd655a..2eac9427 100644 --- a/src/scu_clk/clkclr.rs +++ b/src/scu_clk/clkclr.rs @@ -150,7 +150,7 @@ impl W { WDTCDI_W::new(self, 5) } } -#[doc = "CLK Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CLK Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLKCLR_SPEC; impl crate::RegisterSpec for CLKCLR_SPEC { type Ux = u32; diff --git a/src/scu_clk/clkset.rs b/src/scu_clk/clkset.rs index f49b7386..c36abe58 100644 --- a/src/scu_clk/clkset.rs +++ b/src/scu_clk/clkset.rs @@ -150,7 +150,7 @@ impl W { WDTCEN_W::new(self, 5) } } -#[doc = "CLK Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CLK Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLKSET_SPEC; impl crate::RegisterSpec for CLKSET_SPEC { type Ux = u32; diff --git a/src/scu_clk/clkstat.rs b/src/scu_clk/clkstat.rs index e19d57ba..82a6a4ea 100644 --- a/src/scu_clk/clkstat.rs +++ b/src/scu_clk/clkstat.rs @@ -166,7 +166,7 @@ impl R { WDTCST_R::new(((self.bits >> 5) & 1) != 0) } } -#[doc = "Clock Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Clock Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLKSTAT_SPEC; impl crate::RegisterSpec for CLKSTAT_SPEC { type Ux = u32; diff --git a/src/scu_clk/cpuclkcr.rs b/src/scu_clk/cpuclkcr.rs index 1a855510..e5888d23 100644 --- a/src/scu_clk/cpuclkcr.rs +++ b/src/scu_clk/cpuclkcr.rs @@ -70,7 +70,7 @@ impl W { CPUDIV_W::new(self, 0) } } -#[doc = "CPU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpuclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CPU Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpuclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpuclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CPUCLKCR_SPEC; impl crate::RegisterSpec for CPUCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/dsleepcr.rs b/src/scu_clk/dsleepcr.rs index bcbb297e..2128eb6f 100644 --- a/src/scu_clk/dsleepcr.rs +++ b/src/scu_clk/dsleepcr.rs @@ -518,7 +518,7 @@ impl W { WDTCR_W::new(self, 21) } } -#[doc = "Deep Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsleepcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsleepcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Deep Sleep Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dsleepcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dsleepcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DSLEEPCR_SPEC; impl crate::RegisterSpec for DSLEEPCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/extclkcr.rs b/src/scu_clk/extclkcr.rs index bc6bf4be..ec106b01 100644 --- a/src/scu_clk/extclkcr.rs +++ b/src/scu_clk/extclkcr.rs @@ -118,7 +118,7 @@ impl W { ECKDIV_W::new(self, 16) } } -#[doc = "External Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`extclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`extclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "External Clock Control\n\nYou can [`read`](crate::Reg::read) this register and get [`extclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EXTCLKCR_SPEC; impl crate::RegisterSpec for EXTCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/mlinkclkcr.rs b/src/scu_clk/mlinkclkcr.rs index 9261c321..ff59ebd4 100644 --- a/src/scu_clk/mlinkclkcr.rs +++ b/src/scu_clk/mlinkclkcr.rs @@ -376,7 +376,7 @@ impl W { WDTSEL_W::new(self, 24) } } -#[doc = "Multi-Link Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mlinkclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mlinkclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Multi-Link Clock Control\n\nYou can [`read`](crate::Reg::read) this register and get [`mlinkclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mlinkclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MLINKCLKCR_SPEC; impl crate::RegisterSpec for MLINKCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/pbclkcr.rs b/src/scu_clk/pbclkcr.rs index 22ef4325..79eedc07 100644 --- a/src/scu_clk/pbclkcr.rs +++ b/src/scu_clk/pbclkcr.rs @@ -70,7 +70,7 @@ impl W { PBDIV_W::new(self, 0) } } -#[doc = "Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pbclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pbclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pbclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pbclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PBCLKCR_SPEC; impl crate::RegisterSpec for PBCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/sleepcr.rs b/src/scu_clk/sleepcr.rs index daf09a65..3dc3136a 100644 --- a/src/scu_clk/sleepcr.rs +++ b/src/scu_clk/sleepcr.rs @@ -326,7 +326,7 @@ impl W { WDTCR_W::new(self, 21) } } -#[doc = "Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sleepcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sleepcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Sleep Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sleepcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sleepcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SLEEPCR_SPEC; impl crate::RegisterSpec for SLEEPCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/sysclkcr.rs b/src/scu_clk/sysclkcr.rs index bfa8440f..275668f0 100644 --- a/src/scu_clk/sysclkcr.rs +++ b/src/scu_clk/sysclkcr.rs @@ -85,7 +85,7 @@ impl W { SYSSEL_W::new(self, 16) } } -#[doc = "System Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sysclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sysclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "System Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYSCLKCR_SPEC; impl crate::RegisterSpec for SYSCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/usbclkcr.rs b/src/scu_clk/usbclkcr.rs index 9828c860..39cbcbdd 100644 --- a/src/scu_clk/usbclkcr.rs +++ b/src/scu_clk/usbclkcr.rs @@ -85,7 +85,7 @@ impl W { USBSEL_W::new(self, 16) } } -#[doc = "USB Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "USB Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`usbclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct USBCLKCR_SPEC; impl crate::RegisterSpec for USBCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_clk/wdtclkcr.rs b/src/scu_clk/wdtclkcr.rs index 4dafd608..e4000da0 100644 --- a/src/scu_clk/wdtclkcr.rs +++ b/src/scu_clk/wdtclkcr.rs @@ -105,7 +105,7 @@ impl W { WDTSEL_W::new(self, 16) } } -#[doc = "WDT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdtclkcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdtclkcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct WDTCLKCR_SPEC; impl crate::RegisterSpec for WDTCLKCR_SPEC { type Ux = u32; diff --git a/src/scu_general.rs b/src/scu_general.rs index 6267c1cf..b09b70c1 100644 --- a/src/scu_general.rs +++ b/src/scu_general.rs @@ -118,92 +118,92 @@ impl RegisterBlock { &self.mirrallreq } } -#[doc = "ID (r) register accessor: SCU Module ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: SCU Module ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "SCU Module ID Register"] pub mod id; -#[doc = "IDCHIP (r) register accessor: Chip ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idchip::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idchip`] +#[doc = "IDCHIP (r) register accessor: Chip ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`idchip::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idchip`] module"] pub type IDCHIP = crate::Reg; #[doc = "Chip ID Register"] pub mod idchip; -#[doc = "IDMANUF (r) register accessor: Manufactory ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idmanuf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idmanuf`] +#[doc = "IDMANUF (r) register accessor: Manufactory ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`idmanuf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idmanuf`] module"] pub type IDMANUF = crate::Reg; #[doc = "Manufactory ID Register"] pub mod idmanuf; -#[doc = "STCON (rw) register accessor: Startup Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stcon`] +#[doc = "STCON (rw) register accessor: Startup Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stcon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stcon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stcon`] module"] pub type STCON = crate::Reg; #[doc = "Startup Configuration Register"] pub mod stcon; -#[doc = "GPR0 (rw) register accessor: General Purpose Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr0`] +#[doc = "GPR0 (rw) register accessor: General Purpose Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`gpr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr0`] module"] pub type GPR0 = crate::Reg; #[doc = "General Purpose Register 0"] pub mod gpr0; -#[doc = "GPR1 (rw) register accessor: General Purpose Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr1`] +#[doc = "GPR1 (rw) register accessor: General Purpose Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`gpr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr1`] module"] pub type GPR1 = crate::Reg; #[doc = "General Purpose Register 1"] pub mod gpr1; -#[doc = "CCUCON (rw) register accessor: CCU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccucon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccucon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccucon`] +#[doc = "CCUCON (rw) register accessor: CCU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccucon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccucon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccucon`] module"] pub type CCUCON = crate::Reg; #[doc = "CCU Control Register"] pub mod ccucon; -#[doc = "DTSCON (rw) register accessor: Die Temperature Sensor Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtscon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtscon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtscon`] +#[doc = "DTSCON (rw) register accessor: Die Temperature Sensor Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtscon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtscon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtscon`] module"] pub type DTSCON = crate::Reg; #[doc = "Die Temperature Sensor Control Register"] pub mod dtscon; -#[doc = "DTSSTAT (r) register accessor: Die Temperature Sensor Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtsstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtsstat`] +#[doc = "DTSSTAT (r) register accessor: Die Temperature Sensor Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtsstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtsstat`] module"] pub type DTSSTAT = crate::Reg; #[doc = "Die Temperature Sensor Status Register"] pub mod dtsstat; -#[doc = "G0ORCEN (rw) register accessor: Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g0orcen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g0orcen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g0orcen`] +#[doc = "G0ORCEN (rw) register accessor: Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`g0orcen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`g0orcen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g0orcen`] module"] pub type G0ORCEN = crate::Reg; #[doc = "Out of Range Comparator Enable Register 0"] pub mod g0orcen; -#[doc = "G1ORCEN (rw) register accessor: Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g1orcen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g1orcen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g1orcen`] +#[doc = "G1ORCEN (rw) register accessor: Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`g1orcen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`g1orcen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g1orcen`] module"] pub type G1ORCEN = crate::Reg; #[doc = "Out of Range Comparator Enable Register 1"] pub mod g1orcen; -#[doc = "DTEMPLIM (rw) register accessor: Die Temperature Sensor Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtemplim::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtemplim::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtemplim`] +#[doc = "DTEMPLIM (rw) register accessor: Die Temperature Sensor Limit Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtemplim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtemplim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtemplim`] module"] pub type DTEMPLIM = crate::Reg; #[doc = "Die Temperature Sensor Limit Register"] pub mod dtemplim; -#[doc = "DTEMPALARM (r) register accessor: Die Temperature Sensor Alarm Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtempalarm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtempalarm`] +#[doc = "DTEMPALARM (r) register accessor: Die Temperature Sensor Alarm Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtempalarm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtempalarm`] module"] pub type DTEMPALARM = crate::Reg; #[doc = "Die Temperature Sensor Alarm Register"] pub mod dtempalarm; -#[doc = "MIRRSTS (r) register accessor: Mirror Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrsts`] +#[doc = "MIRRSTS (r) register accessor: Mirror Write Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mirrsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrsts`] module"] pub type MIRRSTS = crate::Reg; #[doc = "Mirror Write Status Register"] pub mod mirrsts; -#[doc = "RMACR (rw) register accessor: Retention Memory Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmacr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmacr`] +#[doc = "RMACR (rw) register accessor: Retention Memory Access Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmacr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmacr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmacr`] module"] pub type RMACR = crate::Reg; #[doc = "Retention Memory Access Control Register"] pub mod rmacr; -#[doc = "RMDATA (rw) register accessor: Retention Memory Access Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmdata::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmdata::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmdata`] +#[doc = "RMDATA (rw) register accessor: Retention Memory Access Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmdata::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmdata::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmdata`] module"] pub type RMDATA = crate::Reg; #[doc = "Retention Memory Access Data Register"] pub mod rmdata; -#[doc = "MIRRALLSTAT (r) register accessor: Mirror All Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrallstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrallstat`] +#[doc = "MIRRALLSTAT (r) register accessor: Mirror All Status\n\nYou can [`read`](crate::Reg::read) this register and get [`mirrallstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrallstat`] module"] pub type MIRRALLSTAT = crate::Reg; #[doc = "Mirror All Status"] pub mod mirrallstat; -#[doc = "MIRRALLREQ (w) register accessor: Mirror All Request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mirrallreq::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrallreq`] +#[doc = "MIRRALLREQ (w) register accessor: Mirror All Request\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mirrallreq::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrallreq`] module"] pub type MIRRALLREQ = crate::Reg; #[doc = "Mirror All Request"] diff --git a/src/scu_general/ccucon.rs b/src/scu_general/ccucon.rs index 8caf4347..928198ba 100644 --- a/src/scu_general/ccucon.rs +++ b/src/scu_general/ccucon.rs @@ -454,7 +454,7 @@ impl W { GSHR0_W::new(self, 24) } } -#[doc = "CCU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccucon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccucon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "CCU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccucon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccucon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CCUCON_SPEC; impl crate::RegisterSpec for CCUCON_SPEC { type Ux = u32; diff --git a/src/scu_general/dtempalarm.rs b/src/scu_general/dtempalarm.rs index 92ff0df4..79fd9b4f 100644 --- a/src/scu_general/dtempalarm.rs +++ b/src/scu_general/dtempalarm.rs @@ -84,7 +84,7 @@ impl R { OVERFL_R::new(((self.bits >> 16) & 1) != 0) } } -#[doc = "Die Temperature Sensor Alarm Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtempalarm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Die Temperature Sensor Alarm Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtempalarm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DTEMPALARM_SPEC; impl crate::RegisterSpec for DTEMPALARM_SPEC { type Ux = u32; diff --git a/src/scu_general/dtemplim.rs b/src/scu_general/dtemplim.rs index 20ae8dc9..57d8cb03 100644 --- a/src/scu_general/dtemplim.rs +++ b/src/scu_general/dtemplim.rs @@ -36,7 +36,7 @@ impl W { UPPER_W::new(self, 16) } } -#[doc = "Die Temperature Sensor Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtemplim::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtemplim::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Die Temperature Sensor Limit Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtemplim::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtemplim::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DTEMPLIM_SPEC; impl crate::RegisterSpec for DTEMPLIM_SPEC { type Ux = u32; diff --git a/src/scu_general/dtscon.rs b/src/scu_general/dtscon.rs index f3bc2362..3ef43320 100644 --- a/src/scu_general/dtscon.rs +++ b/src/scu_general/dtscon.rs @@ -167,7 +167,7 @@ impl W { BGTRIM_W::new(self, 20) } } -#[doc = "Die Temperature Sensor Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtscon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtscon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Die Temperature Sensor Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtscon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtscon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DTSCON_SPEC; impl crate::RegisterSpec for DTSCON_SPEC { type Ux = u32; diff --git a/src/scu_general/dtsstat.rs b/src/scu_general/dtsstat.rs index 069dd88a..c37aa8e5 100644 --- a/src/scu_general/dtsstat.rs +++ b/src/scu_general/dtsstat.rs @@ -91,7 +91,7 @@ impl R { BUSY_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Die Temperature Sensor Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtsstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Die Temperature Sensor Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtsstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DTSSTAT_SPEC; impl crate::RegisterSpec for DTSSTAT_SPEC { type Ux = u32; diff --git a/src/scu_general/g0orcen.rs b/src/scu_general/g0orcen.rs index d95ca933..6e8eb962 100644 --- a/src/scu_general/g0orcen.rs +++ b/src/scu_general/g0orcen.rs @@ -134,7 +134,7 @@ impl W { ENORC7_W::new(self, 7) } } -#[doc = "Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g0orcen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g0orcen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`g0orcen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`g0orcen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct G0ORCEN_SPEC; impl crate::RegisterSpec for G0ORCEN_SPEC { type Ux = u32; diff --git a/src/scu_general/g1orcen.rs b/src/scu_general/g1orcen.rs index c5a4a562..5838950e 100644 --- a/src/scu_general/g1orcen.rs +++ b/src/scu_general/g1orcen.rs @@ -134,7 +134,7 @@ impl W { ENORC7_W::new(self, 7) } } -#[doc = "Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g1orcen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g1orcen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`g1orcen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`g1orcen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct G1ORCEN_SPEC; impl crate::RegisterSpec for G1ORCEN_SPEC { type Ux = u32; diff --git a/src/scu_general/gpr0.rs b/src/scu_general/gpr0.rs index cf25921b..b283ac4b 100644 --- a/src/scu_general/gpr0.rs +++ b/src/scu_general/gpr0.rs @@ -21,7 +21,7 @@ impl W { DAT_W::new(self, 0) } } -#[doc = "General Purpose Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "General Purpose Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`gpr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GPR0_SPEC; impl crate::RegisterSpec for GPR0_SPEC { type Ux = u32; diff --git a/src/scu_general/gpr1.rs b/src/scu_general/gpr1.rs index f6c67f12..b5b3a48e 100644 --- a/src/scu_general/gpr1.rs +++ b/src/scu_general/gpr1.rs @@ -21,7 +21,7 @@ impl W { DAT_W::new(self, 0) } } -#[doc = "General Purpose Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "General Purpose Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`gpr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GPR1_SPEC; impl crate::RegisterSpec for GPR1_SPEC { type Ux = u32; diff --git a/src/scu_general/id.rs b/src/scu_general/id.rs index c4f2b101..0128503c 100644 --- a/src/scu_general/id.rs +++ b/src/scu_general/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "SCU Module ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SCU Module ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/scu_general/idchip.rs b/src/scu_general/idchip.rs index 1ce6b30c..59a2318f 100644 --- a/src/scu_general/idchip.rs +++ b/src/scu_general/idchip.rs @@ -9,7 +9,7 @@ impl R { IDCHIP_R::new(self.bits) } } -#[doc = "Chip ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idchip::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Chip ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`idchip::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IDCHIP_SPEC; impl crate::RegisterSpec for IDCHIP_SPEC { type Ux = u32; diff --git a/src/scu_general/idmanuf.rs b/src/scu_general/idmanuf.rs index 9ce0d588..5734d958 100644 --- a/src/scu_general/idmanuf.rs +++ b/src/scu_general/idmanuf.rs @@ -16,7 +16,7 @@ impl R { MANUF_R::new(((self.bits >> 5) & 0x07ff) as u16) } } -#[doc = "Manufactory ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idmanuf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Manufactory ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`idmanuf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IDMANUF_SPEC; impl crate::RegisterSpec for IDMANUF_SPEC { type Ux = u32; diff --git a/src/scu_general/mirrallreq.rs b/src/scu_general/mirrallreq.rs index ccc5443f..88258949 100644 --- a/src/scu_general/mirrallreq.rs +++ b/src/scu_general/mirrallreq.rs @@ -39,7 +39,7 @@ impl W { REQ_W::new(self, 0) } } -#[doc = "Mirror All Request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mirrallreq::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mirror All Request\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mirrallreq::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MIRRALLREQ_SPEC; impl crate::RegisterSpec for MIRRALLREQ_SPEC { type Ux = u32; diff --git a/src/scu_general/mirrallstat.rs b/src/scu_general/mirrallstat.rs index cfa39143..e27294e0 100644 --- a/src/scu_general/mirrallstat.rs +++ b/src/scu_general/mirrallstat.rs @@ -43,7 +43,7 @@ impl R { BUSY_R::new((self.bits & 1) != 0) } } -#[doc = "Mirror All Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrallstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mirror All Status\n\nYou can [`read`](crate::Reg::read) this register and get [`mirrallstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MIRRALLSTAT_SPEC; impl crate::RegisterSpec for MIRRALLSTAT_SPEC { type Ux = u32; diff --git a/src/scu_general/mirrsts.rs b/src/scu_general/mirrsts.rs index 75f15056..1e359cc9 100644 --- a/src/scu_general/mirrsts.rs +++ b/src/scu_general/mirrsts.rs @@ -822,7 +822,7 @@ impl R { HINTSET_R::new(((self.bits >> 24) & 1) != 0) } } -#[doc = "Mirror Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Mirror Write Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mirrsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MIRRSTS_SPEC; impl crate::RegisterSpec for MIRRSTS_SPEC { type Ux = u32; diff --git a/src/scu_general/rmacr.rs b/src/scu_general/rmacr.rs index 0ceb3141..2d427fd0 100644 --- a/src/scu_general/rmacr.rs +++ b/src/scu_general/rmacr.rs @@ -85,7 +85,7 @@ impl W { ADDR_W::new(self, 16) } } -#[doc = "Retention Memory Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmacr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmacr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Retention Memory Access Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmacr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmacr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RMACR_SPEC; impl crate::RegisterSpec for RMACR_SPEC { type Ux = u32; diff --git a/src/scu_general/rmdata.rs b/src/scu_general/rmdata.rs index e2f898fd..e83ae39a 100644 --- a/src/scu_general/rmdata.rs +++ b/src/scu_general/rmdata.rs @@ -21,7 +21,7 @@ impl W { DATA_W::new(self, 0) } } -#[doc = "Retention Memory Access Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmdata::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmdata::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Retention Memory Access Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmdata::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmdata::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RMDATA_SPEC; impl crate::RegisterSpec for RMDATA_SPEC { type Ux = u32; diff --git a/src/scu_general/stcon.rs b/src/scu_general/stcon.rs index 159a7799..e4fd1901 100644 --- a/src/scu_general/stcon.rs +++ b/src/scu_general/stcon.rs @@ -218,7 +218,7 @@ impl W { SWCON_W::new(self, 8) } } -#[doc = "Startup Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Startup Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`stcon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stcon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct STCON_SPEC; impl crate::RegisterSpec for STCON_SPEC { type Ux = u32; diff --git a/src/scu_hibernate.rs b/src/scu_hibernate.rs index 1b2f94d4..29a26190 100644 --- a/src/scu_hibernate.rs +++ b/src/scu_hibernate.rs @@ -101,82 +101,82 @@ impl RegisterBlock { &self.hintset } } -#[doc = "HDSTAT (r) register accessor: Hibernate Domain Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdstat`] +#[doc = "HDSTAT (r) register accessor: Hibernate Domain Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hdstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdstat`] module"] pub type HDSTAT = crate::Reg; #[doc = "Hibernate Domain Status Register"] pub mod hdstat; -#[doc = "HDCLR (w) register accessor: Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdclr`] +#[doc = "HDCLR (w) register accessor: Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hdclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdclr`] module"] pub type HDCLR = crate::Reg; #[doc = "Hibernate Domain Status Clear Register"] pub mod hdclr; -#[doc = "HDSET (w) register accessor: Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdset`] +#[doc = "HDSET (w) register accessor: Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hdset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdset`] module"] pub type HDSET = crate::Reg; #[doc = "Hibernate Domain Status Set Register"] pub mod hdset; -#[doc = "HDCR (rw) register accessor: Hibernate Domain Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdcr`] +#[doc = "HDCR (rw) register accessor: Hibernate Domain Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hdcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hdcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdcr`] module"] pub type HDCR = crate::Reg; #[doc = "Hibernate Domain Control Register"] pub mod hdcr; -#[doc = "OSCSICTRL (rw) register accessor: fOSI Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oscsictrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oscsictrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oscsictrl`] +#[doc = "OSCSICTRL (rw) register accessor: fOSI Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`oscsictrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`oscsictrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oscsictrl`] module"] pub type OSCSICTRL = crate::Reg; #[doc = "fOSI Control Register"] pub mod oscsictrl; -#[doc = "OSCULSTAT (r) register accessor: OSC_ULP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculstat`] +#[doc = "OSCULSTAT (r) register accessor: OSC_ULP Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`osculstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculstat`] module"] pub type OSCULSTAT = crate::Reg; #[doc = "OSC_ULP Status Register"] pub mod osculstat; -#[doc = "OSCULCTRL (rw) register accessor: OSC_ULP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`osculctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculctrl`] +#[doc = "OSCULCTRL (rw) register accessor: OSC_ULP Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`osculctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`osculctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculctrl`] module"] pub type OSCULCTRL = crate::Reg; #[doc = "OSC_ULP Control Register"] pub mod osculctrl; -#[doc = "LPACCONF (rw) register accessor: Analog Wake-up Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacconf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacconf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacconf`] +#[doc = "LPACCONF (rw) register accessor: Analog Wake-up Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacconf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacconf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacconf`] module"] pub type LPACCONF = crate::Reg; #[doc = "Analog Wake-up Configuration Register"] pub mod lpacconf; -#[doc = "LPACTH0 (rw) register accessor: LPAC Threshold Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacth0`] +#[doc = "LPACTH0 (rw) register accessor: LPAC Threshold Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacth0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacth0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacth0`] module"] pub type LPACTH0 = crate::Reg; #[doc = "LPAC Threshold Register 0"] pub mod lpacth0; -#[doc = "LPACTH1 (rw) register accessor: LPAC Threshold Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacth1`] +#[doc = "LPACTH1 (rw) register accessor: LPAC Threshold Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacth1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacth1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacth1`] module"] pub type LPACTH1 = crate::Reg; #[doc = "LPAC Threshold Register 1"] pub mod lpacth1; -#[doc = "LPACST (r) register accessor: Hibernate Analog Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacst`] +#[doc = "LPACST (r) register accessor: Hibernate Analog Control State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacst`] module"] pub type LPACST = crate::Reg; #[doc = "Hibernate Analog Control State Register"] pub mod lpacst; -#[doc = "LPACCLR (w) register accessor: LPAC Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacclr`] +#[doc = "LPACCLR (w) register accessor: LPAC Control Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacclr`] module"] pub type LPACCLR = crate::Reg; #[doc = "LPAC Control Clear Register"] pub mod lpacclr; -#[doc = "LPACSET (w) register accessor: LPAC Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacset`] +#[doc = "LPACSET (w) register accessor: LPAC Control Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacset`] module"] pub type LPACSET = crate::Reg; #[doc = "LPAC Control Set Register"] pub mod lpacset; -#[doc = "HINTST (r) register accessor: Hibernate Internal Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hintst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintst`] +#[doc = "HINTST (r) register accessor: Hibernate Internal Control State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hintst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintst`] module"] pub type HINTST = crate::Reg; #[doc = "Hibernate Internal Control State Register"] pub mod hintst; -#[doc = "HINTCLR (w) register accessor: Hibernate Internal Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintclr`] +#[doc = "HINTCLR (w) register accessor: Hibernate Internal Control Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hintclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintclr`] module"] pub type HINTCLR = crate::Reg; #[doc = "Hibernate Internal Control Clear Register"] pub mod hintclr; -#[doc = "HINTSET (w) register accessor: Hibernate Internal Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintset`] +#[doc = "HINTSET (w) register accessor: Hibernate Internal Control Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hintset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintset`] module"] pub type HINTSET = crate::Reg; #[doc = "Hibernate Internal Control Set Register"] diff --git a/src/scu_hibernate/hdclr.rs b/src/scu_hibernate/hdclr.rs index 895b96ad..8426cc6f 100644 --- a/src/scu_hibernate/hdclr.rs +++ b/src/scu_hibernate/hdclr.rs @@ -372,7 +372,7 @@ impl W { AHIBIO1NEV_W::new(self, 13) } } -#[doc = "Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hdclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HDCLR_SPEC; impl crate::RegisterSpec for HDCLR_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/hdcr.rs b/src/scu_hibernate/hdcr.rs index 0ffd4a75..06b84527 100644 --- a/src/scu_hibernate/hdcr.rs +++ b/src/scu_hibernate/hdcr.rs @@ -1700,7 +1700,7 @@ impl W { AHIBIO1HI_W::new(self, 29) } } -#[doc = "Hibernate Domain Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Domain Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hdcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hdcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HDCR_SPEC; impl crate::RegisterSpec for HDCR_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/hdset.rs b/src/scu_hibernate/hdset.rs index 749bd88c..5b0e1099 100644 --- a/src/scu_hibernate/hdset.rs +++ b/src/scu_hibernate/hdset.rs @@ -372,7 +372,7 @@ impl W { AHIBIO1NEV_W::new(self, 13) } } -#[doc = "Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hdset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HDSET_SPEC; impl crate::RegisterSpec for HDSET_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/hdstat.rs b/src/scu_hibernate/hdstat.rs index 69fdbf1c..959dea55 100644 --- a/src/scu_hibernate/hdstat.rs +++ b/src/scu_hibernate/hdstat.rs @@ -453,7 +453,7 @@ impl R { AHIBIO1NEV_R::new(((self.bits >> 13) & 1) != 0) } } -#[doc = "Hibernate Domain Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Domain Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hdstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HDSTAT_SPEC; impl crate::RegisterSpec for HDSTAT_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/hintclr.rs b/src/scu_hibernate/hintclr.rs index 36572bc7..491e0bba 100644 --- a/src/scu_hibernate/hintclr.rs +++ b/src/scu_hibernate/hintclr.rs @@ -195,7 +195,7 @@ impl W { POFFH_W::new(self, 20) } } -#[doc = "Hibernate Internal Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Internal Control Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hintclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HINTCLR_SPEC; impl crate::RegisterSpec for HINTCLR_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/hintset.rs b/src/scu_hibernate/hintset.rs index 1302f4aa..c41e5e82 100644 --- a/src/scu_hibernate/hintset.rs +++ b/src/scu_hibernate/hintset.rs @@ -232,7 +232,7 @@ impl W { POFFH_W::new(self, 20) } } -#[doc = "Hibernate Internal Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Internal Control Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hintset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HINTSET_SPEC; impl crate::RegisterSpec for HINTSET_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/hintst.rs b/src/scu_hibernate/hintst.rs index 2bcda130..38211f96 100644 --- a/src/scu_hibernate/hintst.rs +++ b/src/scu_hibernate/hintst.rs @@ -214,7 +214,7 @@ impl R { POFFH_R::new(((self.bits >> 20) & 1) != 0) } } -#[doc = "Hibernate Internal Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hintst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Internal Control State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hintst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HINTST_SPEC; impl crate::RegisterSpec for HINTST_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/lpacclr.rs b/src/scu_hibernate/lpacclr.rs index d8bcc96d..dab76837 100644 --- a/src/scu_hibernate/lpacclr.rs +++ b/src/scu_hibernate/lpacclr.rs @@ -224,7 +224,7 @@ impl W { AHIBIO1VAL_W::new(self, 18) } } -#[doc = "LPAC Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "LPAC Control Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LPACCLR_SPEC; impl crate::RegisterSpec for LPACCLR_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/lpacconf.rs b/src/scu_hibernate/lpacconf.rs index 2ef28484..b87fd6e6 100644 --- a/src/scu_hibernate/lpacconf.rs +++ b/src/scu_hibernate/lpacconf.rs @@ -284,7 +284,7 @@ impl W { SETTLECNT_W::new(self, 28) } } -#[doc = "Analog Wake-up Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacconf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacconf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Analog Wake-up Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacconf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacconf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LPACCONF_SPEC; impl crate::RegisterSpec for LPACCONF_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/lpacset.rs b/src/scu_hibernate/lpacset.rs index eeb0f3c8..dfc1f4e7 100644 --- a/src/scu_hibernate/lpacset.rs +++ b/src/scu_hibernate/lpacset.rs @@ -224,7 +224,7 @@ impl W { AHIBIO1VAL_W::new(self, 18) } } -#[doc = "LPAC Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "LPAC Control Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LPACSET_SPEC; impl crate::RegisterSpec for LPACSET_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/lpacst.rs b/src/scu_hibernate/lpacst.rs index a2ebfb46..0ad4031e 100644 --- a/src/scu_hibernate/lpacst.rs +++ b/src/scu_hibernate/lpacst.rs @@ -248,7 +248,7 @@ impl R { AHIBIO1VAL_R::new(((self.bits >> 18) & 1) != 0) } } -#[doc = "Hibernate Analog Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Hibernate Analog Control State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LPACST_SPEC; impl crate::RegisterSpec for LPACST_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/lpacth0.rs b/src/scu_hibernate/lpacth0.rs index d388073f..d9941990 100644 --- a/src/scu_hibernate/lpacth0.rs +++ b/src/scu_hibernate/lpacth0.rs @@ -36,7 +36,7 @@ impl W { VBATHI_W::new(self, 8) } } -#[doc = "LPAC Threshold Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "LPAC Threshold Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacth0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacth0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LPACTH0_SPEC; impl crate::RegisterSpec for LPACTH0_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/lpacth1.rs b/src/scu_hibernate/lpacth1.rs index b4ef6553..73d6f1f3 100644 --- a/src/scu_hibernate/lpacth1.rs +++ b/src/scu_hibernate/lpacth1.rs @@ -66,7 +66,7 @@ impl W { AHIBIO1HI_W::new(self, 24) } } -#[doc = "LPAC Threshold Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "LPAC Threshold Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`lpacth1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpacth1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct LPACTH1_SPEC; impl crate::RegisterSpec for LPACTH1_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/oscsictrl.rs b/src/scu_hibernate/oscsictrl.rs index 238ec24c..913795a4 100644 --- a/src/scu_hibernate/oscsictrl.rs +++ b/src/scu_hibernate/oscsictrl.rs @@ -70,7 +70,7 @@ impl W { PWD_W::new(self, 0) } } -#[doc = "fOSI Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oscsictrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oscsictrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "fOSI Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`oscsictrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`oscsictrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OSCSICTRL_SPEC; impl crate::RegisterSpec for OSCSICTRL_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/osculctrl.rs b/src/scu_hibernate/osculctrl.rs index fac02c72..e3987769 100644 --- a/src/scu_hibernate/osculctrl.rs +++ b/src/scu_hibernate/osculctrl.rs @@ -167,7 +167,7 @@ impl W { MODE_W::new(self, 4) } } -#[doc = "OSC_ULP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`osculctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "OSC_ULP Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`osculctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`osculctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OSCULCTRL_SPEC; impl crate::RegisterSpec for OSCULCTRL_SPEC { type Ux = u32; diff --git a/src/scu_hibernate/osculstat.rs b/src/scu_hibernate/osculstat.rs index 6cb65935..7cb5e49d 100644 --- a/src/scu_hibernate/osculstat.rs +++ b/src/scu_hibernate/osculstat.rs @@ -9,7 +9,7 @@ impl R { X1D_R::new((self.bits & 1) != 0) } } -#[doc = "OSC_ULP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "OSC_ULP Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`osculstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OSCULSTAT_SPEC; impl crate::RegisterSpec for OSCULSTAT_SPEC { type Ux = u32; diff --git a/src/scu_interrupt.rs b/src/scu_interrupt.rs index e13a1316..0364e8df 100644 --- a/src/scu_interrupt.rs +++ b/src/scu_interrupt.rs @@ -40,32 +40,32 @@ impl RegisterBlock { &self.nmireqen } } -#[doc = "SRSTAT (r) register accessor: SCU Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srstat`] +#[doc = "SRSTAT (r) register accessor: SCU Service Request Status\n\nYou can [`read`](crate::Reg::read) this register and get [`srstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srstat`] module"] pub type SRSTAT = crate::Reg; #[doc = "SCU Service Request Status"] pub mod srstat; -#[doc = "SRRAW (r) register accessor: SCU Raw Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srraw`] +#[doc = "SRRAW (r) register accessor: SCU Raw Service Request Status\n\nYou can [`read`](crate::Reg::read) this register and get [`srraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srraw`] module"] pub type SRRAW = crate::Reg; #[doc = "SCU Raw Service Request Status"] pub mod srraw; -#[doc = "SRMSK (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srmsk`] +#[doc = "SRMSK (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`srmsk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srmsk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srmsk`] module"] pub type SRMSK = crate::Reg; #[doc = "SCU Service Request Mask"] pub mod srmsk; -#[doc = "SRCLR (w) register accessor: SCU Service Request Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srclr`] +#[doc = "SRCLR (w) register accessor: SCU Service Request Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srclr`] module"] pub type SRCLR = crate::Reg; #[doc = "SCU Service Request Clear"] pub mod srclr; -#[doc = "SRSET (w) register accessor: SCU Service Request Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srset`] +#[doc = "SRSET (w) register accessor: SCU Service Request Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srset`] module"] pub type SRSET = crate::Reg; #[doc = "SCU Service Request Set"] pub mod srset; -#[doc = "NMIREQEN (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nmireqen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nmireqen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nmireqen`] +#[doc = "NMIREQEN (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`nmireqen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nmireqen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nmireqen`] module"] pub type NMIREQEN = crate::Reg; #[doc = "SCU Service Request Mask"] diff --git a/src/scu_interrupt/nmireqen.rs b/src/scu_interrupt/nmireqen.rs index 0d7802c4..b66a22ae 100644 --- a/src/scu_interrupt/nmireqen.rs +++ b/src/scu_interrupt/nmireqen.rs @@ -454,7 +454,7 @@ impl W { ERU03_W::new(self, 19) } } -#[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nmireqen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nmireqen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`nmireqen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nmireqen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct NMIREQEN_SPEC; impl crate::RegisterSpec for NMIREQEN_SPEC { type Ux = u32; diff --git a/src/scu_interrupt/srclr.rs b/src/scu_interrupt/srclr.rs index 2d03cd72..a9451379 100644 --- a/src/scu_interrupt/srclr.rs +++ b/src/scu_interrupt/srclr.rs @@ -890,7 +890,7 @@ impl W { RMX_W::new(self, 29) } } -#[doc = "SCU Service Request Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SCU Service Request Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRCLR_SPEC; impl crate::RegisterSpec for SRCLR_SPEC { type Ux = u32; diff --git a/src/scu_interrupt/srmsk.rs b/src/scu_interrupt/srmsk.rs index ee19705d..69c7027f 100644 --- a/src/scu_interrupt/srmsk.rs +++ b/src/scu_interrupt/srmsk.rs @@ -1542,7 +1542,7 @@ impl W { RMX_W::new(self, 29) } } -#[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`srmsk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srmsk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRMSK_SPEC; impl crate::RegisterSpec for SRMSK_SPEC { type Ux = u32; diff --git a/src/scu_interrupt/srraw.rs b/src/scu_interrupt/srraw.rs index 0eab2319..47e50e16 100644 --- a/src/scu_interrupt/srraw.rs +++ b/src/scu_interrupt/srraw.rs @@ -884,7 +884,7 @@ impl R { RMX_R::new(((self.bits >> 29) & 1) != 0) } } -#[doc = "SCU Raw Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SCU Raw Service Request Status\n\nYou can [`read`](crate::Reg::read) this register and get [`srraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRRAW_SPEC; impl crate::RegisterSpec for SRRAW_SPEC { type Ux = u32; diff --git a/src/scu_interrupt/srset.rs b/src/scu_interrupt/srset.rs index b500a14b..f304775f 100644 --- a/src/scu_interrupt/srset.rs +++ b/src/scu_interrupt/srset.rs @@ -890,7 +890,7 @@ impl W { RMX_W::new(self, 29) } } -#[doc = "SCU Service Request Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SCU Service Request Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRSET_SPEC; impl crate::RegisterSpec for SRSET_SPEC { type Ux = u32; diff --git a/src/scu_interrupt/srstat.rs b/src/scu_interrupt/srstat.rs index 2e06ce98..701117b9 100644 --- a/src/scu_interrupt/srstat.rs +++ b/src/scu_interrupt/srstat.rs @@ -884,7 +884,7 @@ impl R { RMX_R::new(((self.bits >> 29) & 1) != 0) } } -#[doc = "SCU Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "SCU Service Request Status\n\nYou can [`read`](crate::Reg::read) this register and get [`srstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRSTAT_SPEC; impl crate::RegisterSpec for SRSTAT_SPEC { type Ux = u32; diff --git a/src/scu_osc.rs b/src/scu_osc.rs index bb3d74fc..b955d931 100644 --- a/src/scu_osc.rs +++ b/src/scu_osc.rs @@ -23,17 +23,17 @@ impl RegisterBlock { &self.clkcalconst } } -#[doc = "OSCHPSTAT (r) register accessor: OSC_HP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpstat`] +#[doc = "OSCHPSTAT (r) register accessor: OSC_HP Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`oschpstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpstat`] module"] pub type OSCHPSTAT = crate::Reg; #[doc = "OSC_HP Status Register"] pub mod oschpstat; -#[doc = "OSCHPCTRL (rw) register accessor: OSC_HP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oschpctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpctrl`] +#[doc = "OSCHPCTRL (rw) register accessor: OSC_HP Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`oschpctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`oschpctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpctrl`] module"] pub type OSCHPCTRL = crate::Reg; #[doc = "OSC_HP Control Register"] pub mod oschpctrl; -#[doc = "CLKCALCONST (rw) register accessor: Clock Calibration Constant Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkcalconst::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkcalconst::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkcalconst`] +#[doc = "CLKCALCONST (rw) register accessor: Clock Calibration Constant Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkcalconst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkcalconst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkcalconst`] module"] pub type CLKCALCONST = crate::Reg; #[doc = "Clock Calibration Constant Register"] diff --git a/src/scu_osc/clkcalconst.rs b/src/scu_osc/clkcalconst.rs index e05ed253..0a0711bb 100644 --- a/src/scu_osc/clkcalconst.rs +++ b/src/scu_osc/clkcalconst.rs @@ -21,7 +21,7 @@ impl W { CALIBCONST_W::new(self, 0) } } -#[doc = "Clock Calibration Constant Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkcalconst::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkcalconst::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Clock Calibration Constant Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkcalconst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkcalconst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLKCALCONST_SPEC; impl crate::RegisterSpec for CLKCALCONST_SPEC { type Ux = u32; diff --git a/src/scu_osc/oschpctrl.rs b/src/scu_osc/oschpctrl.rs index f84de03c..fbe3e620 100644 --- a/src/scu_osc/oschpctrl.rs +++ b/src/scu_osc/oschpctrl.rs @@ -246,7 +246,7 @@ impl W { OSCVAL_W::new(self, 16) } } -#[doc = "OSC_HP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oschpctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "OSC_HP Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`oschpctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`oschpctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OSCHPCTRL_SPEC; impl crate::RegisterSpec for OSCHPCTRL_SPEC { type Ux = u32; diff --git a/src/scu_osc/oschpstat.rs b/src/scu_osc/oschpstat.rs index 62d71bc0..594f6b3e 100644 --- a/src/scu_osc/oschpstat.rs +++ b/src/scu_osc/oschpstat.rs @@ -9,7 +9,7 @@ impl R { X1D_R::new((self.bits & 1) != 0) } } -#[doc = "OSC_HP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "OSC_HP Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`oschpstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OSCHPSTAT_SPEC; impl crate::RegisterSpec for OSCHPSTAT_SPEC { type Ux = u32; diff --git a/src/scu_parity.rs b/src/scu_parity.rs index d41a122f..ed2e392a 100644 --- a/src/scu_parity.rs +++ b/src/scu_parity.rs @@ -47,37 +47,37 @@ impl RegisterBlock { &self.pmtsr } } -#[doc = "PEEN (rw) register accessor: Parity Error Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peen`] +#[doc = "PEEN (rw) register accessor: Parity Error Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`peen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peen`] module"] pub type PEEN = crate::Reg; #[doc = "Parity Error Enable Register"] pub mod peen; -#[doc = "MCHKCON (rw) register accessor: Memory Checking Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mchkcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mchkcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mchkcon`] +#[doc = "MCHKCON (rw) register accessor: Memory Checking Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mchkcon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mchkcon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mchkcon`] module"] pub type MCHKCON = crate::Reg; #[doc = "Memory Checking Control Register"] pub mod mchkcon; -#[doc = "PETE (rw) register accessor: Parity Error Trap Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pete::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pete::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pete`] +#[doc = "PETE (rw) register accessor: Parity Error Trap Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pete::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pete::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pete`] module"] pub type PETE = crate::Reg; #[doc = "Parity Error Trap Enable Register"] pub mod pete; -#[doc = "PERSTEN (rw) register accessor: Parity Error Reset Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`persten::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`persten::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@persten`] +#[doc = "PERSTEN (rw) register accessor: Parity Error Reset Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`persten::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`persten::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@persten`] module"] pub type PERSTEN = crate::Reg; #[doc = "Parity Error Reset Enable Register"] pub mod persten; -#[doc = "PEFLAG (rw) register accessor: Parity Error Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peflag`] +#[doc = "PEFLAG (rw) register accessor: Parity Error Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`peflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peflag`] module"] pub type PEFLAG = crate::Reg; #[doc = "Parity Error Flag Register"] pub mod peflag; -#[doc = "PMTPR (rw) register accessor: Parity Memory Test Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtpr`] +#[doc = "PMTPR (rw) register accessor: Parity Memory Test Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmtpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmtpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtpr`] module"] pub type PMTPR = crate::Reg; #[doc = "Parity Memory Test Pattern Register"] pub mod pmtpr; -#[doc = "PMTSR (rw) register accessor: Parity Memory Test Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtsr`] +#[doc = "PMTSR (rw) register accessor: Parity Memory Test Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmtsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmtsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtsr`] module"] pub type PMTSR = crate::Reg; #[doc = "Parity Memory Test Select Register"] diff --git a/src/scu_parity/mchkcon.rs b/src/scu_parity/mchkcon.rs index 261d7f48..6b93b644 100644 --- a/src/scu_parity/mchkcon.rs +++ b/src/scu_parity/mchkcon.rs @@ -646,7 +646,7 @@ impl W { SELETH0RX_W::new(self, 18) } } -#[doc = "Memory Checking Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mchkcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mchkcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Memory Checking Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mchkcon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mchkcon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct MCHKCON_SPEC; impl crate::RegisterSpec for MCHKCON_SPEC { type Ux = u32; diff --git a/src/scu_parity/peen.rs b/src/scu_parity/peen.rs index 4daab3f3..8c2fcb1a 100644 --- a/src/scu_parity/peen.rs +++ b/src/scu_parity/peen.rs @@ -646,7 +646,7 @@ impl W { PEENETH0RX_W::new(self, 18) } } -#[doc = "Parity Error Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Parity Error Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`peen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PEEN_SPEC; impl crate::RegisterSpec for PEEN_SPEC { type Ux = u32; diff --git a/src/scu_parity/peflag.rs b/src/scu_parity/peflag.rs index 42fd248b..3e597574 100644 --- a/src/scu_parity/peflag.rs +++ b/src/scu_parity/peflag.rs @@ -646,7 +646,7 @@ impl W { PEETH0RX_W::new(self, 18) } } -#[doc = "Parity Error Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Parity Error Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`peflag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peflag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PEFLAG_SPEC; impl crate::RegisterSpec for PEFLAG_SPEC { type Ux = u32; diff --git a/src/scu_parity/persten.rs b/src/scu_parity/persten.rs index 6b0c234c..8f5b6969 100644 --- a/src/scu_parity/persten.rs +++ b/src/scu_parity/persten.rs @@ -70,7 +70,7 @@ impl W { RSEN_W::new(self, 0) } } -#[doc = "Parity Error Reset Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`persten::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`persten::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Parity Error Reset Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`persten::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`persten::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PERSTEN_SPEC; impl crate::RegisterSpec for PERSTEN_SPEC { type Ux = u32; diff --git a/src/scu_parity/pete.rs b/src/scu_parity/pete.rs index 07fc93f2..b82b71e8 100644 --- a/src/scu_parity/pete.rs +++ b/src/scu_parity/pete.rs @@ -646,7 +646,7 @@ impl W { PETEETH0RX_W::new(self, 18) } } -#[doc = "Parity Error Trap Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pete::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pete::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Parity Error Trap Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pete::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pete::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PETE_SPEC; impl crate::RegisterSpec for PETE_SPEC { type Ux = u32; diff --git a/src/scu_parity/pmtpr.rs b/src/scu_parity/pmtpr.rs index 06d3001c..572d76f6 100644 --- a/src/scu_parity/pmtpr.rs +++ b/src/scu_parity/pmtpr.rs @@ -28,7 +28,7 @@ impl W { PWR_W::new(self, 0) } } -#[doc = "Parity Memory Test Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Parity Memory Test Pattern Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmtpr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmtpr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PMTPR_SPEC; impl crate::RegisterSpec for PMTPR_SPEC { type Ux = u32; diff --git a/src/scu_parity/pmtsr.rs b/src/scu_parity/pmtsr.rs index a067a20c..981d6187 100644 --- a/src/scu_parity/pmtsr.rs +++ b/src/scu_parity/pmtsr.rs @@ -646,7 +646,7 @@ impl W { MTETH0RX_W::new(self, 18) } } -#[doc = "Parity Memory Test Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Parity Memory Test Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pmtsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmtsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PMTSR_SPEC; impl crate::RegisterSpec for PMTSR_SPEC { type Ux = u32; diff --git a/src/scu_pll.rs b/src/scu_pll.rs index d151e5e0..2d924f39 100644 --- a/src/scu_pll.rs +++ b/src/scu_pll.rs @@ -47,37 +47,37 @@ impl RegisterBlock { &self.clkmxstat } } -#[doc = "PLLSTAT (r) register accessor: PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllstat`] +#[doc = "PLLSTAT (r) register accessor: PLL Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllstat`] module"] pub type PLLSTAT = crate::Reg; #[doc = "PLL Status Register"] pub mod pllstat; -#[doc = "PLLCON0 (rw) register accessor: PLL Configuration 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon0`] +#[doc = "PLLCON0 (rw) register accessor: PLL Configuration 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllcon0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pllcon0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon0`] module"] pub type PLLCON0 = crate::Reg; #[doc = "PLL Configuration 0 Register"] pub mod pllcon0; -#[doc = "PLLCON1 (rw) register accessor: PLL Configuration 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon1`] +#[doc = "PLLCON1 (rw) register accessor: PLL Configuration 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllcon1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pllcon1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon1`] module"] pub type PLLCON1 = crate::Reg; #[doc = "PLL Configuration 1 Register"] pub mod pllcon1; -#[doc = "PLLCON2 (rw) register accessor: PLL Configuration 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon2`] +#[doc = "PLLCON2 (rw) register accessor: PLL Configuration 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllcon2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pllcon2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon2`] module"] pub type PLLCON2 = crate::Reg; #[doc = "PLL Configuration 2 Register"] pub mod pllcon2; -#[doc = "USBPLLSTAT (r) register accessor: USB PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllstat`] +#[doc = "USBPLLSTAT (r) register accessor: USB PLL Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`usbpllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllstat`] module"] pub type USBPLLSTAT = crate::Reg; #[doc = "USB PLL Status Register"] pub mod usbpllstat; -#[doc = "USBPLLCON (rw) register accessor: USB PLL Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbpllcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllcon`] +#[doc = "USBPLLCON (rw) register accessor: USB PLL Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`usbpllcon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbpllcon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllcon`] module"] pub type USBPLLCON = crate::Reg; #[doc = "USB PLL Configuration Register"] pub mod usbpllcon; -#[doc = "CLKMXSTAT (r) register accessor: Clock Multiplexing Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkmxstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkmxstat`] +#[doc = "CLKMXSTAT (r) register accessor: Clock Multiplexing Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkmxstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkmxstat`] module"] pub type CLKMXSTAT = crate::Reg; #[doc = "Clock Multiplexing Status Register"] diff --git a/src/scu_pll/clkmxstat.rs b/src/scu_pll/clkmxstat.rs index a6620392..0e03a045 100644 --- a/src/scu_pll/clkmxstat.rs +++ b/src/scu_pll/clkmxstat.rs @@ -49,7 +49,7 @@ impl R { SYSCLKMUX_R::new((self.bits & 3) as u8) } } -#[doc = "Clock Multiplexing Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkmxstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Clock Multiplexing Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clkmxstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLKMXSTAT_SPEC; impl crate::RegisterSpec for CLKMXSTAT_SPEC { type Ux = u32; diff --git a/src/scu_pll/pllcon0.rs b/src/scu_pll/pllcon0.rs index 2c00a500..4c39c485 100644 --- a/src/scu_pll/pllcon0.rs +++ b/src/scu_pll/pllcon0.rs @@ -590,7 +590,7 @@ impl W { FOTR_W::new(self, 20) } } -#[doc = "PLL Configuration 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PLL Configuration 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllcon0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pllcon0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PLLCON0_SPEC; impl crate::RegisterSpec for PLLCON0_SPEC { type Ux = u32; diff --git a/src/scu_pll/pllcon1.rs b/src/scu_pll/pllcon1.rs index 11e979ae..4fb0e51f 100644 --- a/src/scu_pll/pllcon1.rs +++ b/src/scu_pll/pllcon1.rs @@ -66,7 +66,7 @@ impl W { PDIV_W::new(self, 24) } } -#[doc = "PLL Configuration 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PLL Configuration 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllcon1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pllcon1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PLLCON1_SPEC; impl crate::RegisterSpec for PLLCON1_SPEC { type Ux = u32; diff --git a/src/scu_pll/pllcon2.rs b/src/scu_pll/pllcon2.rs index 3bd86b26..fbb23ced 100644 --- a/src/scu_pll/pllcon2.rs +++ b/src/scu_pll/pllcon2.rs @@ -134,7 +134,7 @@ impl W { K1INSEL_W::new(self, 8) } } -#[doc = "PLL Configuration 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PLL Configuration 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllcon2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pllcon2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PLLCON2_SPEC; impl crate::RegisterSpec for PLLCON2_SPEC { type Ux = u32; diff --git a/src/scu_pll/pllstat.rs b/src/scu_pll/pllstat.rs index 853b5411..0daff345 100644 --- a/src/scu_pll/pllstat.rs +++ b/src/scu_pll/pllstat.rs @@ -371,7 +371,7 @@ impl R { PLLSP_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PLL Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PLLSTAT_SPEC; impl crate::RegisterSpec for PLLSTAT_SPEC { type Ux = u32; diff --git a/src/scu_pll/usbpllcon.rs b/src/scu_pll/usbpllcon.rs index c69f1777..419976b1 100644 --- a/src/scu_pll/usbpllcon.rs +++ b/src/scu_pll/usbpllcon.rs @@ -428,7 +428,7 @@ impl W { PDIV_W::new(self, 24) } } -#[doc = "USB PLL Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbpllcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "USB PLL Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`usbpllcon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usbpllcon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct USBPLLCON_SPEC; impl crate::RegisterSpec for USBPLLCON_SPEC { type Ux = u32; diff --git a/src/scu_pll/usbpllstat.rs b/src/scu_pll/usbpllstat.rs index c09cff09..e6f51e06 100644 --- a/src/scu_pll/usbpllstat.rs +++ b/src/scu_pll/usbpllstat.rs @@ -207,7 +207,7 @@ impl R { VCOLOCKED_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "USB PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "USB PLL Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`usbpllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct USBPLLSTAT_SPEC; impl crate::RegisterSpec for USBPLLSTAT_SPEC { type Ux = u32; diff --git a/src/scu_power.rs b/src/scu_power.rs index e5afe814..32016ac8 100644 --- a/src/scu_power.rs +++ b/src/scu_power.rs @@ -42,32 +42,32 @@ impl RegisterBlock { &self.pwrmon } } -#[doc = "PWRSTAT (r) register accessor: PCU Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrstat`] +#[doc = "PWRSTAT (r) register accessor: PCU Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrstat`] module"] pub type PWRSTAT = crate::Reg; #[doc = "PCU Status Register"] pub mod pwrstat; -#[doc = "PWRSET (w) register accessor: PCU Set Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrset`] +#[doc = "PWRSET (w) register accessor: PCU Set Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrset`] module"] pub type PWRSET = crate::Reg; #[doc = "PCU Set Control Register"] pub mod pwrset; -#[doc = "PWRCLR (w) register accessor: PCU Clear Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrclr`] +#[doc = "PWRCLR (w) register accessor: PCU Clear Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrclr`] module"] pub type PWRCLR = crate::Reg; #[doc = "PCU Clear Control Register"] pub mod pwrclr; -#[doc = "EVRSTAT (r) register accessor: EVR Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrstat`] +#[doc = "EVRSTAT (r) register accessor: EVR Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrstat`] module"] pub type EVRSTAT = crate::Reg; #[doc = "EVR Status Register"] pub mod evrstat; -#[doc = "EVRVADCSTAT (r) register accessor: EVR VADC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrvadcstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrvadcstat`] +#[doc = "EVRVADCSTAT (r) register accessor: EVR VADC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evrvadcstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrvadcstat`] module"] pub type EVRVADCSTAT = crate::Reg; #[doc = "EVR VADC Status Register"] pub mod evrvadcstat; -#[doc = "PWRMON (rw) register accessor: Power Monitor Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrmon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrmon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrmon`] +#[doc = "PWRMON (rw) register accessor: Power Monitor Control\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrmon::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrmon::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrmon`] module"] pub type PWRMON = crate::Reg; #[doc = "Power Monitor Control"] diff --git a/src/scu_power/evrstat.rs b/src/scu_power/evrstat.rs index 7bb47ef5..bee831f3 100644 --- a/src/scu_power/evrstat.rs +++ b/src/scu_power/evrstat.rs @@ -43,7 +43,7 @@ impl R { OV13_R::new(((self.bits >> 1) & 1) != 0) } } -#[doc = "EVR Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "EVR Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EVRSTAT_SPEC; impl crate::RegisterSpec for EVRSTAT_SPEC { type Ux = u32; diff --git a/src/scu_power/evrvadcstat.rs b/src/scu_power/evrvadcstat.rs index 15ae2e09..6d068ca6 100644 --- a/src/scu_power/evrvadcstat.rs +++ b/src/scu_power/evrvadcstat.rs @@ -16,7 +16,7 @@ impl R { VADC33V_R::new(((self.bits >> 8) & 0xff) as u8) } } -#[doc = "EVR VADC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrvadcstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "EVR VADC Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`evrvadcstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EVRVADCSTAT_SPEC; impl crate::RegisterSpec for EVRVADCSTAT_SPEC { type Ux = u32; diff --git a/src/scu_power/pwrclr.rs b/src/scu_power/pwrclr.rs index 8d842ed8..e9978697 100644 --- a/src/scu_power/pwrclr.rs +++ b/src/scu_power/pwrclr.rs @@ -150,7 +150,7 @@ impl W { USBPUWQ_W::new(self, 18) } } -#[doc = "PCU Clear Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PCU Clear Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PWRCLR_SPEC; impl crate::RegisterSpec for PWRCLR_SPEC { type Ux = u32; diff --git a/src/scu_power/pwrmon.rs b/src/scu_power/pwrmon.rs index 34326846..116c6e8a 100644 --- a/src/scu_power/pwrmon.rs +++ b/src/scu_power/pwrmon.rs @@ -51,7 +51,7 @@ impl W { ENB_W::new(self, 16) } } -#[doc = "Power Monitor Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrmon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrmon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Power Monitor Control\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrmon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrmon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PWRMON_SPEC; impl crate::RegisterSpec for PWRMON_SPEC { type Ux = u32; diff --git a/src/scu_power/pwrset.rs b/src/scu_power/pwrset.rs index cdc03661..ff0a1772 100644 --- a/src/scu_power/pwrset.rs +++ b/src/scu_power/pwrset.rs @@ -150,7 +150,7 @@ impl W { USBPUWQ_W::new(self, 18) } } -#[doc = "PCU Set Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PCU Set Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PWRSET_SPEC; impl crate::RegisterSpec for PWRSET_SPEC { type Ux = u32; diff --git a/src/scu_power/pwrstat.rs b/src/scu_power/pwrstat.rs index b02100cf..23472e94 100644 --- a/src/scu_power/pwrstat.rs +++ b/src/scu_power/pwrstat.rs @@ -166,7 +166,7 @@ impl R { USBPUWQ_R::new(((self.bits >> 18) & 1) != 0) } } -#[doc = "PCU Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "PCU Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PWRSTAT_SPEC; impl crate::RegisterSpec for PWRSTAT_SPEC { type Ux = u32; diff --git a/src/scu_reset.rs b/src/scu_reset.rs index 83876399..e876f895 100644 --- a/src/scu_reset.rs +++ b/src/scu_reset.rs @@ -76,62 +76,62 @@ impl RegisterBlock { &self.prclr2 } } -#[doc = "RSTSTAT (r) register accessor: RCU Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rststat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rststat`] +#[doc = "RSTSTAT (r) register accessor: RCU Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rststat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rststat`] module"] pub type RSTSTAT = crate::Reg; #[doc = "RCU Reset Status"] pub mod rststat; -#[doc = "RSTSET (w) register accessor: RCU Reset Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstset`] +#[doc = "RSTSET (w) register accessor: RCU Reset Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstset`] module"] pub type RSTSET = crate::Reg; #[doc = "RCU Reset Set Register"] pub mod rstset; -#[doc = "RSTCLR (w) register accessor: RCU Reset Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstclr`] +#[doc = "RSTCLR (w) register accessor: RCU Reset Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstclr`] module"] pub type RSTCLR = crate::Reg; #[doc = "RCU Reset Clear Register"] pub mod rstclr; -#[doc = "PRSTAT0 (r) register accessor: RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat0`] +#[doc = "PRSTAT0 (r) register accessor: RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat0`] module"] pub type PRSTAT0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Status"] pub mod prstat0; -#[doc = "PRSET0 (w) register accessor: RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset0`] +#[doc = "PRSET0 (w) register accessor: RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset0`] module"] pub type PRSET0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Set"] pub mod prset0; -#[doc = "PRCLR0 (w) register accessor: RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr0`] +#[doc = "PRCLR0 (w) register accessor: RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr0`] module"] pub type PRCLR0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Clear"] pub mod prclr0; -#[doc = "PRSTAT1 (r) register accessor: RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat1`] +#[doc = "PRSTAT1 (r) register accessor: RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat1`] module"] pub type PRSTAT1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Status"] pub mod prstat1; -#[doc = "PRSET1 (w) register accessor: RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset1`] +#[doc = "PRSET1 (w) register accessor: RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset1`] module"] pub type PRSET1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Set"] pub mod prset1; -#[doc = "PRCLR1 (w) register accessor: RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr1`] +#[doc = "PRCLR1 (w) register accessor: RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr1`] module"] pub type PRCLR1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Clear"] pub mod prclr1; -#[doc = "PRSTAT2 (r) register accessor: RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat2`] +#[doc = "PRSTAT2 (r) register accessor: RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat2`] module"] pub type PRSTAT2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Status"] pub mod prstat2; -#[doc = "PRSET2 (w) register accessor: RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset2`] +#[doc = "PRSET2 (w) register accessor: RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset2`] module"] pub type PRSET2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Set"] pub mod prset2; -#[doc = "PRCLR2 (w) register accessor: RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr2`] +#[doc = "PRCLR2 (w) register accessor: RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr2`] module"] pub type PRCLR2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Clear"] diff --git a/src/scu_reset/prclr0.rs b/src/scu_reset/prclr0.rs index 00c08b72..cd9237b6 100644 --- a/src/scu_reset/prclr0.rs +++ b/src/scu_reset/prclr0.rs @@ -446,7 +446,7 @@ impl W { HRPWM0RS_W::new(self, 23) } } -#[doc = "RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRCLR0_SPEC; impl crate::RegisterSpec for PRCLR0_SPEC { type Ux = u32; diff --git a/src/scu_reset/prclr1.rs b/src/scu_reset/prclr1.rs index abee5677..71a7f6f1 100644 --- a/src/scu_reset/prclr1.rs +++ b/src/scu_reset/prclr1.rs @@ -224,7 +224,7 @@ impl W { PPORTSRS_W::new(self, 9) } } -#[doc = "RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRCLR1_SPEC; impl crate::RegisterSpec for PRCLR1_SPEC { type Ux = u32; diff --git a/src/scu_reset/prclr2.rs b/src/scu_reset/prclr2.rs index a9b618a4..a1e98b7c 100644 --- a/src/scu_reset/prclr2.rs +++ b/src/scu_reset/prclr2.rs @@ -187,7 +187,7 @@ impl W { USBRS_W::new(self, 7) } } -#[doc = "RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRCLR2_SPEC; impl crate::RegisterSpec for PRCLR2_SPEC { type Ux = u32; diff --git a/src/scu_reset/prset0.rs b/src/scu_reset/prset0.rs index e0717817..21b9bf89 100644 --- a/src/scu_reset/prset0.rs +++ b/src/scu_reset/prset0.rs @@ -446,7 +446,7 @@ impl W { HRPWM0RS_W::new(self, 23) } } -#[doc = "RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRSET0_SPEC; impl crate::RegisterSpec for PRSET0_SPEC { type Ux = u32; diff --git a/src/scu_reset/prset1.rs b/src/scu_reset/prset1.rs index 4ede0145..1db97b8a 100644 --- a/src/scu_reset/prset1.rs +++ b/src/scu_reset/prset1.rs @@ -224,7 +224,7 @@ impl W { PPORTSRS_W::new(self, 9) } } -#[doc = "RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRSET1_SPEC; impl crate::RegisterSpec for PRSET1_SPEC { type Ux = u32; diff --git a/src/scu_reset/prset2.rs b/src/scu_reset/prset2.rs index b34f0a34..303284db 100644 --- a/src/scu_reset/prset2.rs +++ b/src/scu_reset/prset2.rs @@ -187,7 +187,7 @@ impl W { USBRS_W::new(self, 7) } } -#[doc = "RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRSET2_SPEC; impl crate::RegisterSpec for PRSET2_SPEC { type Ux = u32; diff --git a/src/scu_reset/prstat0.rs b/src/scu_reset/prstat0.rs index f191fe6d..ced4a1ae 100644 --- a/src/scu_reset/prstat0.rs +++ b/src/scu_reset/prstat0.rs @@ -494,7 +494,7 @@ impl R { HRPWM0RS_R::new(((self.bits >> 23) & 1) != 0) } } -#[doc = "RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRSTAT0_SPEC; impl crate::RegisterSpec for PRSTAT0_SPEC { type Ux = u32; diff --git a/src/scu_reset/prstat1.rs b/src/scu_reset/prstat1.rs index 3cb27692..c457fa21 100644 --- a/src/scu_reset/prstat1.rs +++ b/src/scu_reset/prstat1.rs @@ -248,7 +248,7 @@ impl R { PPORTSRS_R::new(((self.bits >> 9) & 1) != 0) } } -#[doc = "RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRSTAT1_SPEC; impl crate::RegisterSpec for PRSTAT1_SPEC { type Ux = u32; diff --git a/src/scu_reset/prstat2.rs b/src/scu_reset/prstat2.rs index ad5bb011..250d8d83 100644 --- a/src/scu_reset/prstat2.rs +++ b/src/scu_reset/prstat2.rs @@ -207,7 +207,7 @@ impl R { USBRS_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PRSTAT2_SPEC; impl crate::RegisterSpec for PRSTAT2_SPEC { type Ux = u32; diff --git a/src/scu_reset/rstclr.rs b/src/scu_reset/rstclr.rs index 9341951c..0175d07c 100644 --- a/src/scu_reset/rstclr.rs +++ b/src/scu_reset/rstclr.rs @@ -150,7 +150,7 @@ impl W { LCKEN_W::new(self, 10) } } -#[doc = "RCU Reset Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Reset Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RSTCLR_SPEC; impl crate::RegisterSpec for RSTCLR_SPEC { type Ux = u32; diff --git a/src/scu_reset/rstset.rs b/src/scu_reset/rstset.rs index fb9ad5d4..9af87b8a 100644 --- a/src/scu_reset/rstset.rs +++ b/src/scu_reset/rstset.rs @@ -113,7 +113,7 @@ impl W { LCKEN_W::new(self, 10) } } -#[doc = "RCU Reset Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Reset Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RSTSET_SPEC; impl crate::RegisterSpec for RSTSET_SPEC { type Ux = u32; diff --git a/src/scu_reset/rststat.rs b/src/scu_reset/rststat.rs index 2d0b060e..21943912 100644 --- a/src/scu_reset/rststat.rs +++ b/src/scu_reset/rststat.rs @@ -212,7 +212,7 @@ impl R { LCKEN_R::new(((self.bits >> 10) & 1) != 0) } } -#[doc = "RCU Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rststat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "RCU Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rststat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RSTSTAT_SPEC; impl crate::RegisterSpec for RSTSTAT_SPEC { type Ux = u32; diff --git a/src/scu_trap.rs b/src/scu_trap.rs index aec65ec1..eb5001f8 100644 --- a/src/scu_trap.rs +++ b/src/scu_trap.rs @@ -34,27 +34,27 @@ impl RegisterBlock { &self.trapset } } -#[doc = "TRAPSTAT (r) register accessor: Trap Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapstat`] +#[doc = "TRAPSTAT (r) register accessor: Trap Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trapstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapstat`] module"] pub type TRAPSTAT = crate::Reg; #[doc = "Trap Status Register"] pub mod trapstat; -#[doc = "TRAPRAW (r) register accessor: Trap Raw Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapraw`] +#[doc = "TRAPRAW (r) register accessor: Trap Raw Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trapraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapraw`] module"] pub type TRAPRAW = crate::Reg; #[doc = "Trap Raw Status Register"] pub mod trapraw; -#[doc = "TRAPDIS (rw) register accessor: Trap Disable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapdis::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapdis::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapdis`] +#[doc = "TRAPDIS (rw) register accessor: Trap Disable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trapdis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trapdis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapdis`] module"] pub type TRAPDIS = crate::Reg; #[doc = "Trap Disable Register"] pub mod trapdis; -#[doc = "TRAPCLR (w) register accessor: Trap Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapclr`] +#[doc = "TRAPCLR (w) register accessor: Trap Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trapclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapclr`] module"] pub type TRAPCLR = crate::Reg; #[doc = "Trap Clear Register"] pub mod trapclr; -#[doc = "TRAPSET (w) register accessor: Trap Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapset`] +#[doc = "TRAPSET (w) register accessor: Trap Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trapset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapset`] module"] pub type TRAPSET = crate::Reg; #[doc = "Trap Set Register"] diff --git a/src/scu_trap/trapclr.rs b/src/scu_trap/trapclr.rs index 7c6a7c9d..9f802bf2 100644 --- a/src/scu_trap/trapclr.rs +++ b/src/scu_trap/trapclr.rs @@ -372,7 +372,7 @@ impl W { TEMPLOT_W::new(self, 13) } } -#[doc = "Trap Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Trap Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trapclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRAPCLR_SPEC; impl crate::RegisterSpec for TRAPCLR_SPEC { type Ux = u32; diff --git a/src/scu_trap/trapdis.rs b/src/scu_trap/trapdis.rs index 9a106da9..660819b8 100644 --- a/src/scu_trap/trapdis.rs +++ b/src/scu_trap/trapdis.rs @@ -646,7 +646,7 @@ impl W { TEMPLOT_W::new(self, 13) } } -#[doc = "Trap Disable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapdis::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapdis::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Trap Disable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trapdis::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trapdis::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRAPDIS_SPEC; impl crate::RegisterSpec for TRAPDIS_SPEC { type Ux = u32; diff --git a/src/scu_trap/trapraw.rs b/src/scu_trap/trapraw.rs index 85aaff21..39e441ce 100644 --- a/src/scu_trap/trapraw.rs +++ b/src/scu_trap/trapraw.rs @@ -412,7 +412,7 @@ impl R { TEMPLOT_R::new(((self.bits >> 13) & 1) != 0) } } -#[doc = "Trap Raw Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Trap Raw Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trapraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRAPRAW_SPEC; impl crate::RegisterSpec for TRAPRAW_SPEC { type Ux = u32; diff --git a/src/scu_trap/trapset.rs b/src/scu_trap/trapset.rs index 77df893c..6b22c114 100644 --- a/src/scu_trap/trapset.rs +++ b/src/scu_trap/trapset.rs @@ -372,7 +372,7 @@ impl W { TEMPLOT_W::new(self, 13) } } -#[doc = "Trap Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Trap Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trapset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRAPSET_SPEC; impl crate::RegisterSpec for TRAPSET_SPEC { type Ux = u32; diff --git a/src/scu_trap/trapstat.rs b/src/scu_trap/trapstat.rs index 75f33225..b3591282 100644 --- a/src/scu_trap/trapstat.rs +++ b/src/scu_trap/trapstat.rs @@ -412,7 +412,7 @@ impl R { TEMPLOT_R::new(((self.bits >> 13) & 1) != 0) } } -#[doc = "Trap Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Trap Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trapstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRAPSTAT_SPEC; impl crate::RegisterSpec for TRAPSTAT_SPEC { type Ux = u32; diff --git a/src/usb0.rs b/src/usb0.rs index 343abc02..1e0234b4 100644 --- a/src/usb0.rs +++ b/src/usb0.rs @@ -280,227 +280,227 @@ impl RegisterBlock { &self.pcgcctl } } -#[doc = "GOTGCTL (rw) register accessor: Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgctl`] +#[doc = "GOTGCTL (rw) register accessor: Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gotgctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gotgctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgctl`] module"] pub type GOTGCTL = crate::Reg; #[doc = "Control and Status Register"] pub mod gotgctl; -#[doc = "GOTGINT (rw) register accessor: OTG Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgint`] +#[doc = "GOTGINT (rw) register accessor: OTG Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gotgint::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gotgint::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgint`] module"] pub type GOTGINT = crate::Reg; #[doc = "OTG Interrupt Register"] pub mod gotgint; -#[doc = "GAHBCFG (rw) register accessor: AHB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gahbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gahbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gahbcfg`] +#[doc = "GAHBCFG (rw) register accessor: AHB Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gahbcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gahbcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gahbcfg`] module"] pub type GAHBCFG = crate::Reg; #[doc = "AHB Configuration Register"] pub mod gahbcfg; -#[doc = "GUSBCFG (rw) register accessor: USB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gusbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gusbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gusbcfg`] +#[doc = "GUSBCFG (rw) register accessor: USB Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gusbcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gusbcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gusbcfg`] module"] pub type GUSBCFG = crate::Reg; #[doc = "USB Configuration Register"] pub mod gusbcfg; -#[doc = "GRSTCTL (rw) register accessor: Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grstctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grstctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grstctl`] +#[doc = "GRSTCTL (rw) register accessor: Reset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`grstctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grstctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grstctl`] module"] pub type GRSTCTL = crate::Reg; #[doc = "Reset Register"] pub mod grstctl; -#[doc = "GINTSTS_HOSTMODE (rw) register accessor: Interrupt Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_hostmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_hostmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintsts_hostmode`] +#[doc = "GINTSTS_HOSTMODE (rw) register accessor: Interrupt Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintsts_hostmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintsts_hostmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintsts_hostmode`] module"] pub type GINTSTS_HOSTMODE = crate::Reg; #[doc = "Interrupt Register \\[HOSTMODE\\]"] pub mod gintsts_hostmode; -#[doc = "GINTSTS_DEVICEMODE (rw) register accessor: Interrupt Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_devicemode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_devicemode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintsts_devicemode`] +#[doc = "GINTSTS_DEVICEMODE (rw) register accessor: Interrupt Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintsts_devicemode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintsts_devicemode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintsts_devicemode`] module"] pub type GINTSTS_DEVICEMODE = crate::Reg; #[doc = "Interrupt Register \\[DEVICEMODE\\]"] pub mod gintsts_devicemode; -#[doc = "GINTMSK_HOSTMODE (rw) register accessor: Interrupt Mask Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_hostmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_hostmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintmsk_hostmode`] +#[doc = "GINTMSK_HOSTMODE (rw) register accessor: Interrupt Mask Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintmsk_hostmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintmsk_hostmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintmsk_hostmode`] module"] pub type GINTMSK_HOSTMODE = crate::Reg; #[doc = "Interrupt Mask Register \\[HOSTMODE\\]"] pub mod gintmsk_hostmode; -#[doc = "GINTMSK_DEVICEMODE (rw) register accessor: Interrupt Mask Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_devicemode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_devicemode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintmsk_devicemode`] +#[doc = "GINTMSK_DEVICEMODE (rw) register accessor: Interrupt Mask Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintmsk_devicemode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintmsk_devicemode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintmsk_devicemode`] module"] pub type GINTMSK_DEVICEMODE = crate::Reg; #[doc = "Interrupt Mask Register \\[DEVICEMODE\\]"] pub mod gintmsk_devicemode; -#[doc = "GRXSTSR_HOSTMODE (r) register accessor: Receive Status Debug Read Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_hostmode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsr_hostmode`] +#[doc = "GRXSTSR_HOSTMODE (r) register accessor: Receive Status Debug Read Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsr_hostmode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsr_hostmode`] module"] pub type GRXSTSR_HOSTMODE = crate::Reg; #[doc = "Receive Status Debug Read Register \\[HOSTMODE\\]"] pub mod grxstsr_hostmode; -#[doc = "GRXSTSR_DEVICEMODE (r) register accessor: Receive Status Debug Read Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_devicemode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsr_devicemode`] +#[doc = "GRXSTSR_DEVICEMODE (r) register accessor: Receive Status Debug Read Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsr_devicemode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsr_devicemode`] module"] pub type GRXSTSR_DEVICEMODE = crate::Reg; #[doc = "Receive Status Debug Read Register \\[DEVICEMODE\\]"] pub mod grxstsr_devicemode; -#[doc = "GRXSTSP_DEVICEMODE (r) register accessor: Receive Status Read and Pop Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_devicemode::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsp_devicemode`] +#[doc = "GRXSTSP_DEVICEMODE (r) register accessor: Receive Status Read and Pop Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsp_devicemode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@grxstsp_devicemode`] module"] pub type GRXSTSP_DEVICEMODE = crate::Reg; #[doc = "Receive Status Read and Pop Register \\[DEVICEMODE\\]"] pub mod grxstsp_devicemode; -#[doc = "GRXSTSP_HOSTMODE (r) register accessor: Receive Status Read and Pop Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_hostmode::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsp_hostmode`] +#[doc = "GRXSTSP_HOSTMODE (r) register accessor: Receive Status Read and Pop Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsp_hostmode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@grxstsp_hostmode`] module"] pub type GRXSTSP_HOSTMODE = crate::Reg; #[doc = "Receive Status Read and Pop Register \\[HOSTMODE\\]"] pub mod grxstsp_hostmode; -#[doc = "GRXFSIZ (rw) register accessor: Receive FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxfsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grxfsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxfsiz`] +#[doc = "GRXFSIZ (rw) register accessor: Receive FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`grxfsiz::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grxfsiz::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxfsiz`] module"] pub type GRXFSIZ = crate::Reg; #[doc = "Receive FIFO Size Register"] pub mod grxfsiz; -#[doc = "GNPTXFSIZ_HOSTMODE (rw) register accessor: Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_hostmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_hostmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxfsiz_hostmode`] +#[doc = "GNPTXFSIZ_HOSTMODE (rw) register accessor: Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gnptxfsiz_hostmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gnptxfsiz_hostmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxfsiz_hostmode`] module"] pub type GNPTXFSIZ_HOSTMODE = crate::Reg; #[doc = "Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]"] pub mod gnptxfsiz_hostmode; -#[doc = "GNPTXFSIZ_DEVICEMODE (rw) register accessor: Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_devicemode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_devicemode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxfsiz_devicemode`] +#[doc = "GNPTXFSIZ_DEVICEMODE (rw) register accessor: Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gnptxfsiz_devicemode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gnptxfsiz_devicemode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxfsiz_devicemode`] module"] pub type GNPTXFSIZ_DEVICEMODE = crate::Reg; #[doc = "Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]"] pub mod gnptxfsiz_devicemode; -#[doc = "GNPTXSTS (r) register accessor: Non-Periodic Transmit FIFO/Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxsts`] +#[doc = "GNPTXSTS (r) register accessor: Non-Periodic Transmit FIFO/Queue Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gnptxsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxsts`] module"] pub type GNPTXSTS = crate::Reg; #[doc = "Non-Periodic Transmit FIFO/Queue Status Register"] pub mod gnptxsts; -#[doc = "GUID (rw) register accessor: USB Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`guid::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`guid::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@guid`] +#[doc = "GUID (rw) register accessor: USB Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`guid::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`guid::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@guid`] module"] pub type GUID = crate::Reg; #[doc = "USB Module Identification Register"] pub mod guid; -#[doc = "GDFIFOCFG (rw) register accessor: Global DFIFO Software Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gdfifocfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gdfifocfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gdfifocfg`] +#[doc = "GDFIFOCFG (rw) register accessor: Global DFIFO Software Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gdfifocfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gdfifocfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gdfifocfg`] module"] pub type GDFIFOCFG = crate::Reg; #[doc = "Global DFIFO Software Config Register"] pub mod gdfifocfg; -#[doc = "HPTXFSIZ (rw) register accessor: Host Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxfsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxfsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hptxfsiz`] +#[doc = "HPTXFSIZ (rw) register accessor: Host Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hptxfsiz::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hptxfsiz::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hptxfsiz`] module"] pub type HPTXFSIZ = crate::Reg; #[doc = "Host Periodic Transmit FIFO Size Register"] pub mod hptxfsiz; -#[doc = "DIEPTXF1 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf1`] +#[doc = "DIEPTXF1 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf1`] module"] pub type DIEPTXF1 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf1; -#[doc = "DIEPTXF2 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf2`] +#[doc = "DIEPTXF2 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf2`] module"] pub type DIEPTXF2 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf2; -#[doc = "DIEPTXF3 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf3`] +#[doc = "DIEPTXF3 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf3`] module"] pub type DIEPTXF3 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf3; -#[doc = "DIEPTXF4 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf4`] +#[doc = "DIEPTXF4 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf4`] module"] pub type DIEPTXF4 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf4; -#[doc = "DIEPTXF5 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf5`] +#[doc = "DIEPTXF5 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf5`] module"] pub type DIEPTXF5 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf5; -#[doc = "DIEPTXF6 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf6`] +#[doc = "DIEPTXF6 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf6`] module"] pub type DIEPTXF6 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf6; -#[doc = "HCFG (rw) register accessor: Host Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcfg`] +#[doc = "HCFG (rw) register accessor: Host Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcfg`] module"] pub type HCFG = crate::Reg; #[doc = "Host Configuration Register"] pub mod hcfg; -#[doc = "HFIR (rw) register accessor: Host Frame Interval Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfir::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfir::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfir`] +#[doc = "HFIR (rw) register accessor: Host Frame Interval Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfir::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfir::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfir`] module"] pub type HFIR = crate::Reg; #[doc = "Host Frame Interval Register"] pub mod hfir; -#[doc = "HFNUM (rw) register accessor: Host Frame Number/Frame Time Remaining Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfnum::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfnum::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfnum`] +#[doc = "HFNUM (rw) register accessor: Host Frame Number/Frame Time Remaining Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfnum::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfnum::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfnum`] module"] pub type HFNUM = crate::Reg; #[doc = "Host Frame Number/Frame Time Remaining Register"] pub mod hfnum; -#[doc = "HPTXSTS (rw) register accessor: Host Periodic Transmit FIFO/ Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxsts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxsts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hptxsts`] +#[doc = "HPTXSTS (rw) register accessor: Host Periodic Transmit FIFO/ Queue Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hptxsts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hptxsts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hptxsts`] module"] pub type HPTXSTS = crate::Reg; #[doc = "Host Periodic Transmit FIFO/ Queue Status Register"] pub mod hptxsts; -#[doc = "HAINT (r) register accessor: Host All Channels Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@haint`] +#[doc = "HAINT (r) register accessor: Host All Channels Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`haint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@haint`] module"] pub type HAINT = crate::Reg; #[doc = "Host All Channels Interrupt Register"] pub mod haint; -#[doc = "HAINTMSK (rw) register accessor: Host All Channels Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`haintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@haintmsk`] +#[doc = "HAINTMSK (rw) register accessor: Host All Channels Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`haintmsk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`haintmsk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@haintmsk`] module"] pub type HAINTMSK = crate::Reg; #[doc = "Host All Channels Interrupt Mask Register"] pub mod haintmsk; -#[doc = "HFLBADDR (rw) register accessor: Host Frame List Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hflbaddr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hflbaddr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hflbaddr`] +#[doc = "HFLBADDR (rw) register accessor: Host Frame List Base Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hflbaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hflbaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hflbaddr`] module"] pub type HFLBADDR = crate::Reg; #[doc = "Host Frame List Base Address Register"] pub mod hflbaddr; -#[doc = "HPRT (rw) register accessor: Host Port Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hprt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hprt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hprt`] +#[doc = "HPRT (rw) register accessor: Host Port Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hprt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hprt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hprt`] module"] pub type HPRT = crate::Reg; #[doc = "Host Port Control and Status Register"] pub mod hprt; -#[doc = "DCFG (rw) register accessor: Device Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`] +#[doc = "DCFG (rw) register accessor: Device Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`] module"] pub type DCFG = crate::Reg; #[doc = "Device Configuration Register"] pub mod dcfg; -#[doc = "DCTL (rw) register accessor: Device Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dctl`] +#[doc = "DCTL (rw) register accessor: Device Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dctl`] module"] pub type DCTL = crate::Reg; #[doc = "Device Control Register"] pub mod dctl; -#[doc = "DSTS (r) register accessor: Device Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsts`] +#[doc = "DSTS (r) register accessor: Device Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsts`] module"] pub type DSTS = crate::Reg; #[doc = "Device Status Register"] pub mod dsts; -#[doc = "DIEPMSK (rw) register accessor: Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepmsk`] +#[doc = "DIEPMSK (rw) register accessor: Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepmsk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepmsk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepmsk`] module"] pub type DIEPMSK = crate::Reg; #[doc = "Device IN Endpoint Common Interrupt Mask Register"] pub mod diepmsk; -#[doc = "DOEPMSK (rw) register accessor: Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepmsk`] +#[doc = "DOEPMSK (rw) register accessor: Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepmsk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepmsk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepmsk`] module"] pub type DOEPMSK = crate::Reg; #[doc = "Device OUT Endpoint Common Interrupt Mask Register"] pub mod doepmsk; -#[doc = "DAINT (r) register accessor: Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daint`] +#[doc = "DAINT (r) register accessor: Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`daint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daint`] module"] pub type DAINT = crate::Reg; #[doc = "Device All Endpoints Interrupt Register"] pub mod daint; -#[doc = "DAINTMSK (rw) register accessor: Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`daintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daintmsk`] +#[doc = "DAINTMSK (rw) register accessor: Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`daintmsk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`daintmsk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daintmsk`] module"] pub type DAINTMSK = crate::Reg; #[doc = "Device All Endpoints Interrupt Mask Register"] pub mod daintmsk; -#[doc = "DVBUSDIS (rw) register accessor: Device VBUS Discharge Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbusdis::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbusdis::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbusdis`] +#[doc = "DVBUSDIS (rw) register accessor: Device VBUS Discharge Time Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dvbusdis::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dvbusdis::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbusdis`] module"] pub type DVBUSDIS = crate::Reg; #[doc = "Device VBUS Discharge Time Register"] pub mod dvbusdis; -#[doc = "DVBUSPULSE (rw) register accessor: Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbuspulse::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbuspulse::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbuspulse`] +#[doc = "DVBUSPULSE (rw) register accessor: Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dvbuspulse::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dvbuspulse::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbuspulse`] module"] pub type DVBUSPULSE = crate::Reg; #[doc = "Device VBUS Pulsing Time Register"] pub mod dvbuspulse; -#[doc = "DIEPEMPMSK (rw) register accessor: Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepempmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepempmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepempmsk`] +#[doc = "DIEPEMPMSK (rw) register accessor: Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepempmsk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepempmsk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepempmsk`] module"] pub type DIEPEMPMSK = crate::Reg; #[doc = "Device IN Endpoint FIFO Empty Interrupt Mask Register"] pub mod diepempmsk; -#[doc = "PCGCCTL (rw) register accessor: Power and Clock Gating Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgcctl`] +#[doc = "PCGCCTL (rw) register accessor: Power and Clock Gating Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcgcctl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcgcctl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgcctl`] module"] pub type PCGCCTL = crate::Reg; #[doc = "Power and Clock Gating Control Register"] diff --git a/src/usb0/daint.rs b/src/usb0/daint.rs index 60bbb06d..0c2f9c63 100644 --- a/src/usb0/daint.rs +++ b/src/usb0/daint.rs @@ -16,7 +16,7 @@ impl R { OUT_EPINT_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`daint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAINT_SPEC; impl crate::RegisterSpec for DAINT_SPEC { type Ux = u32; diff --git a/src/usb0/daintmsk.rs b/src/usb0/daintmsk.rs index f636c84e..e3088800 100644 --- a/src/usb0/daintmsk.rs +++ b/src/usb0/daintmsk.rs @@ -36,7 +36,7 @@ impl W { OUT_EP_MSK_W::new(self, 16) } } -#[doc = "Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`daintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`daintmsk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`daintmsk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DAINTMSK_SPEC; impl crate::RegisterSpec for DAINTMSK_SPEC { type Ux = u32; diff --git a/src/usb0/dcfg.rs b/src/usb0/dcfg.rs index 6718391f..819c4424 100644 --- a/src/usb0/dcfg.rs +++ b/src/usb0/dcfg.rs @@ -339,7 +339,7 @@ impl W { PER_SCH_INTVL_W::new(self, 24) } } -#[doc = "Device Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DCFG_SPEC; impl crate::RegisterSpec for DCFG_SPEC { type Ux = u32; diff --git a/src/usb0/dctl.rs b/src/usb0/dctl.rs index a2fb7c03..2d80dd3f 100644 --- a/src/usb0/dctl.rs +++ b/src/usb0/dctl.rs @@ -439,7 +439,7 @@ impl W { EN_CONT_ON_BNA_W::new(self, 17) } } -#[doc = "Device Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DCTL_SPEC; impl crate::RegisterSpec for DCTL_SPEC { type Ux = u32; diff --git a/src/usb0/diepempmsk.rs b/src/usb0/diepempmsk.rs index df3e9c8d..c9acf879 100644 --- a/src/usb0/diepempmsk.rs +++ b/src/usb0/diepempmsk.rs @@ -21,7 +21,7 @@ impl W { IN_EP_TXF_EMP_MSK_W::new(self, 0) } } -#[doc = "Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepempmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepempmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepempmsk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepempmsk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPEMPMSK_SPEC; impl crate::RegisterSpec for DIEPEMPMSK_SPEC { type Ux = u32; diff --git a/src/usb0/diepmsk.rs b/src/usb0/diepmsk.rs index fe3ff1db..3804c2b1 100644 --- a/src/usb0/diepmsk.rs +++ b/src/usb0/diepmsk.rs @@ -141,7 +141,7 @@ impl W { NAKMSK_W::new(self, 13) } } -#[doc = "Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepmsk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepmsk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPMSK_SPEC; impl crate::RegisterSpec for DIEPMSK_SPEC { type Ux = u32; diff --git a/src/usb0/dieptxf1.rs b/src/usb0/dieptxf1.rs index 8f9d30c0..cca04384 100644 --- a/src/usb0/dieptxf1.rs +++ b/src/usb0/dieptxf1.rs @@ -36,7 +36,7 @@ impl W { INEPN_TX_FDEP_W::new(self, 16) } } -#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTXF1_SPEC; impl crate::RegisterSpec for DIEPTXF1_SPEC { type Ux = u32; diff --git a/src/usb0/dieptxf2.rs b/src/usb0/dieptxf2.rs index 4a81b6a4..f62fe482 100644 --- a/src/usb0/dieptxf2.rs +++ b/src/usb0/dieptxf2.rs @@ -36,7 +36,7 @@ impl W { INEPN_TX_FDEP_W::new(self, 16) } } -#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTXF2_SPEC; impl crate::RegisterSpec for DIEPTXF2_SPEC { type Ux = u32; diff --git a/src/usb0/dieptxf3.rs b/src/usb0/dieptxf3.rs index 45ba5a26..8f7d0abd 100644 --- a/src/usb0/dieptxf3.rs +++ b/src/usb0/dieptxf3.rs @@ -36,7 +36,7 @@ impl W { INEPN_TX_FDEP_W::new(self, 16) } } -#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTXF3_SPEC; impl crate::RegisterSpec for DIEPTXF3_SPEC { type Ux = u32; diff --git a/src/usb0/dieptxf4.rs b/src/usb0/dieptxf4.rs index 5e05da56..91a635bf 100644 --- a/src/usb0/dieptxf4.rs +++ b/src/usb0/dieptxf4.rs @@ -36,7 +36,7 @@ impl W { INEPN_TX_FDEP_W::new(self, 16) } } -#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTXF4_SPEC; impl crate::RegisterSpec for DIEPTXF4_SPEC { type Ux = u32; diff --git a/src/usb0/dieptxf5.rs b/src/usb0/dieptxf5.rs index 016e0b12..33be8854 100644 --- a/src/usb0/dieptxf5.rs +++ b/src/usb0/dieptxf5.rs @@ -36,7 +36,7 @@ impl W { INEPN_TX_FDEP_W::new(self, 16) } } -#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTXF5_SPEC; impl crate::RegisterSpec for DIEPTXF5_SPEC { type Ux = u32; diff --git a/src/usb0/dieptxf6.rs b/src/usb0/dieptxf6.rs index 3f10b68f..453c8299 100644 --- a/src/usb0/dieptxf6.rs +++ b/src/usb0/dieptxf6.rs @@ -36,7 +36,7 @@ impl W { INEPN_TX_FDEP_W::new(self, 16) } } -#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptxf6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptxf6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTXF6_SPEC; impl crate::RegisterSpec for DIEPTXF6_SPEC { type Ux = u32; diff --git a/src/usb0/doepmsk.rs b/src/usb0/doepmsk.rs index e1d53228..ba72e390 100644 --- a/src/usb0/doepmsk.rs +++ b/src/usb0/doepmsk.rs @@ -171,7 +171,7 @@ impl W { NYETMSK_W::new(self, 14) } } -#[doc = "Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepmsk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepmsk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPMSK_SPEC; impl crate::RegisterSpec for DOEPMSK_SPEC { type Ux = u32; diff --git a/src/usb0/dsts.rs b/src/usb0/dsts.rs index d4417448..0c83b1c8 100644 --- a/src/usb0/dsts.rs +++ b/src/usb0/dsts.rs @@ -62,7 +62,7 @@ impl R { SOFFN_R::new(((self.bits >> 8) & 0x3fff) as u16) } } -#[doc = "Device Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DSTS_SPEC; impl crate::RegisterSpec for DSTS_SPEC { type Ux = u32; diff --git a/src/usb0/dvbusdis.rs b/src/usb0/dvbusdis.rs index a0bc914f..f6df7d4a 100644 --- a/src/usb0/dvbusdis.rs +++ b/src/usb0/dvbusdis.rs @@ -21,7 +21,7 @@ impl W { DVBUSDIS_W::new(self, 0) } } -#[doc = "Device VBUS Discharge Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbusdis::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbusdis::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device VBUS Discharge Time Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dvbusdis::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dvbusdis::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DVBUSDIS_SPEC; impl crate::RegisterSpec for DVBUSDIS_SPEC { type Ux = u32; diff --git a/src/usb0/dvbuspulse.rs b/src/usb0/dvbuspulse.rs index 52659d2b..089b1bbd 100644 --- a/src/usb0/dvbuspulse.rs +++ b/src/usb0/dvbuspulse.rs @@ -21,7 +21,7 @@ impl W { DVBUSPULSE_W::new(self, 0) } } -#[doc = "Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbuspulse::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbuspulse::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dvbuspulse::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dvbuspulse::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DVBUSPULSE_SPEC; impl crate::RegisterSpec for DVBUSPULSE_SPEC { type Ux = u32; diff --git a/src/usb0/gahbcfg.rs b/src/usb0/gahbcfg.rs index 2070f26d..43ec0d42 100644 --- a/src/usb0/gahbcfg.rs +++ b/src/usb0/gahbcfg.rs @@ -436,7 +436,7 @@ impl W { AHBSINGLE_W::new(self, 23) } } -#[doc = "AHB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gahbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gahbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "AHB Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gahbcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gahbcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GAHBCFG_SPEC; impl crate::RegisterSpec for GAHBCFG_SPEC { type Ux = u32; diff --git a/src/usb0/gdfifocfg.rs b/src/usb0/gdfifocfg.rs index 5d66e790..76f28f6c 100644 --- a/src/usb0/gdfifocfg.rs +++ b/src/usb0/gdfifocfg.rs @@ -36,7 +36,7 @@ impl W { EPINFO_BASE_ADDR_W::new(self, 16) } } -#[doc = "Global DFIFO Software Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gdfifocfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gdfifocfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global DFIFO Software Config Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gdfifocfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gdfifocfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GDFIFOCFG_SPEC; impl crate::RegisterSpec for GDFIFOCFG_SPEC { type Ux = u32; diff --git a/src/usb0/gintmsk_devicemode.rs b/src/usb0/gintmsk_devicemode.rs index ba6c98fc..4912ad5a 100644 --- a/src/usb0/gintmsk_devicemode.rs +++ b/src/usb0/gintmsk_devicemode.rs @@ -306,7 +306,7 @@ impl W { WK_UP_INT_MSK_W::new(self, 31) } } -#[doc = "Interrupt Mask Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_devicemode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_devicemode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Mask Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintmsk_devicemode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintmsk_devicemode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GINTMSK_DEVICEMODE_SPEC; impl crate::RegisterSpec for GINTMSK_DEVICEMODE_SPEC { type Ux = u32; diff --git a/src/usb0/gintmsk_hostmode.rs b/src/usb0/gintmsk_hostmode.rs index 14eda548..c1985b9d 100644 --- a/src/usb0/gintmsk_hostmode.rs +++ b/src/usb0/gintmsk_hostmode.rs @@ -186,7 +186,7 @@ impl W { WK_UP_INT_MSK_W::new(self, 31) } } -#[doc = "Interrupt Mask Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_hostmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_hostmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Mask Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintmsk_hostmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintmsk_hostmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GINTMSK_HOSTMODE_SPEC; impl crate::RegisterSpec for GINTMSK_HOSTMODE_SPEC { type Ux = u32; diff --git a/src/usb0/gintsts_devicemode.rs b/src/usb0/gintsts_devicemode.rs index 7fb6253e..f46ad945 100644 --- a/src/usb0/gintsts_devicemode.rs +++ b/src/usb0/gintsts_devicemode.rs @@ -284,7 +284,7 @@ impl W { WK_UP_INT_W::new(self, 31) } } -#[doc = "Interrupt Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_devicemode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_devicemode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintsts_devicemode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintsts_devicemode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GINTSTS_DEVICEMODE_SPEC; impl crate::RegisterSpec for GINTSTS_DEVICEMODE_SPEC { type Ux = u32; diff --git a/src/usb0/gintsts_hostmode.rs b/src/usb0/gintsts_hostmode.rs index 2319af82..754677ae 100644 --- a/src/usb0/gintsts_hostmode.rs +++ b/src/usb0/gintsts_hostmode.rs @@ -187,7 +187,7 @@ impl W { WK_UP_INT_W::new(self, 31) } } -#[doc = "Interrupt Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_hostmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_hostmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintsts_hostmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintsts_hostmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GINTSTS_HOSTMODE_SPEC; impl crate::RegisterSpec for GINTSTS_HOSTMODE_SPEC { type Ux = u32; diff --git a/src/usb0/gnptxfsiz_devicemode.rs b/src/usb0/gnptxfsiz_devicemode.rs index 82d239b3..9432fb2f 100644 --- a/src/usb0/gnptxfsiz_devicemode.rs +++ b/src/usb0/gnptxfsiz_devicemode.rs @@ -36,7 +36,7 @@ impl W { INEPTX_F0DEP_W::new(self, 16) } } -#[doc = "Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_devicemode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_devicemode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gnptxfsiz_devicemode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gnptxfsiz_devicemode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GNPTXFSIZ_DEVICEMODE_SPEC; impl crate::RegisterSpec for GNPTXFSIZ_DEVICEMODE_SPEC { type Ux = u32; diff --git a/src/usb0/gnptxfsiz_hostmode.rs b/src/usb0/gnptxfsiz_hostmode.rs index c3465b7c..0046fb17 100644 --- a/src/usb0/gnptxfsiz_hostmode.rs +++ b/src/usb0/gnptxfsiz_hostmode.rs @@ -36,7 +36,7 @@ impl W { NPTX_FDEP_W::new(self, 16) } } -#[doc = "Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_hostmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_hostmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gnptxfsiz_hostmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gnptxfsiz_hostmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GNPTXFSIZ_HOSTMODE_SPEC; impl crate::RegisterSpec for GNPTXFSIZ_HOSTMODE_SPEC { type Ux = u32; diff --git a/src/usb0/gnptxsts.rs b/src/usb0/gnptxsts.rs index f4c2dd3f..ca7100c8 100644 --- a/src/usb0/gnptxsts.rs +++ b/src/usb0/gnptxsts.rs @@ -167,7 +167,7 @@ impl R { NPTX_QTOP_R::new(((self.bits >> 24) & 0x7f) as u8) } } -#[doc = "Non-Periodic Transmit FIFO/Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Non-Periodic Transmit FIFO/Queue Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gnptxsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GNPTXSTS_SPEC; impl crate::RegisterSpec for GNPTXSTS_SPEC { type Ux = u32; diff --git a/src/usb0/gotgctl.rs b/src/usb0/gotgctl.rs index aefd08fc..23fbddf8 100644 --- a/src/usb0/gotgctl.rs +++ b/src/usb0/gotgctl.rs @@ -956,7 +956,7 @@ impl W { OTGVER_W::new(self, 20) } } -#[doc = "Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gotgctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gotgctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GOTGCTL_SPEC; impl crate::RegisterSpec for GOTGCTL_SPEC { type Ux = u32; diff --git a/src/usb0/gotgint.rs b/src/usb0/gotgint.rs index a02466bb..7a75528b 100644 --- a/src/usb0/gotgint.rs +++ b/src/usb0/gotgint.rs @@ -96,7 +96,7 @@ impl W { DBNCE_DONE_W::new(self, 19) } } -#[doc = "OTG Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "OTG Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gotgint::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gotgint::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GOTGINT_SPEC; impl crate::RegisterSpec for GOTGINT_SPEC { type Ux = u32; diff --git a/src/usb0/grstctl.rs b/src/usb0/grstctl.rs index 3b619022..0e8b3e64 100644 --- a/src/usb0/grstctl.rs +++ b/src/usb0/grstctl.rs @@ -190,7 +190,7 @@ impl W { TX_FNUM_W::new(self, 6) } } -#[doc = "Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grstctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grstctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Reset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`grstctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grstctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GRSTCTL_SPEC; impl crate::RegisterSpec for GRSTCTL_SPEC { type Ux = u32; diff --git a/src/usb0/grxfsiz.rs b/src/usb0/grxfsiz.rs index 41f7e159..d560025b 100644 --- a/src/usb0/grxfsiz.rs +++ b/src/usb0/grxfsiz.rs @@ -21,7 +21,7 @@ impl W { RX_FDEP_W::new(self, 0) } } -#[doc = "Receive FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxfsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grxfsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`grxfsiz::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`grxfsiz::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GRXFSIZ_SPEC; impl crate::RegisterSpec for GRXFSIZ_SPEC { type Ux = u32; diff --git a/src/usb0/grxstsp_devicemode.rs b/src/usb0/grxstsp_devicemode.rs index a69ebe11..7ea916a7 100644 --- a/src/usb0/grxstsp_devicemode.rs +++ b/src/usb0/grxstsp_devicemode.rs @@ -157,7 +157,7 @@ impl R { FN_R::new(((self.bits >> 21) & 0x0f) as u8) } } -#[doc = "Receive Status Read and Pop Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_devicemode::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Status Read and Pop Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsp_devicemode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct GRXSTSP_DEVICEMODE_SPEC; impl crate::RegisterSpec for GRXSTSP_DEVICEMODE_SPEC { type Ux = u32; diff --git a/src/usb0/grxstsp_hostmode.rs b/src/usb0/grxstsp_hostmode.rs index 9908299d..59165fe1 100644 --- a/src/usb0/grxstsp_hostmode.rs +++ b/src/usb0/grxstsp_hostmode.rs @@ -142,7 +142,7 @@ impl R { PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) } } -#[doc = "Receive Status Read and Pop Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_hostmode::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Status Read and Pop Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsp_hostmode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct GRXSTSP_HOSTMODE_SPEC; impl crate::RegisterSpec for GRXSTSP_HOSTMODE_SPEC { type Ux = u32; diff --git a/src/usb0/grxstsr_devicemode.rs b/src/usb0/grxstsr_devicemode.rs index e3dbcc66..70e58d2e 100644 --- a/src/usb0/grxstsr_devicemode.rs +++ b/src/usb0/grxstsr_devicemode.rs @@ -157,7 +157,7 @@ impl R { FN_R::new(((self.bits >> 21) & 0x0f) as u8) } } -#[doc = "Receive Status Debug Read Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_devicemode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Status Debug Read Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsr_devicemode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GRXSTSR_DEVICEMODE_SPEC; impl crate::RegisterSpec for GRXSTSR_DEVICEMODE_SPEC { type Ux = u32; diff --git a/src/usb0/grxstsr_hostmode.rs b/src/usb0/grxstsr_hostmode.rs index d8f70cdf..19ea8bca 100644 --- a/src/usb0/grxstsr_hostmode.rs +++ b/src/usb0/grxstsr_hostmode.rs @@ -142,7 +142,7 @@ impl R { PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) } } -#[doc = "Receive Status Debug Read Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_hostmode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receive Status Debug Read Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`grxstsr_hostmode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GRXSTSR_HOSTMODE_SPEC; impl crate::RegisterSpec for GRXSTSR_HOSTMODE_SPEC { type Ux = u32; diff --git a/src/usb0/guid.rs b/src/usb0/guid.rs index b489f0dd..4243116d 100644 --- a/src/usb0/guid.rs +++ b/src/usb0/guid.rs @@ -51,7 +51,7 @@ impl W { MOD_NUMBER_W::new(self, 16) } } -#[doc = "USB Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`guid::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`guid::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "USB Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`guid::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`guid::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GUID_SPEC; impl crate::RegisterSpec for GUID_SPEC { type Ux = u32; diff --git a/src/usb0/gusbcfg.rs b/src/usb0/gusbcfg.rs index 5a2b76fb..a07d1ece 100644 --- a/src/usb0/gusbcfg.rs +++ b/src/usb0/gusbcfg.rs @@ -457,7 +457,7 @@ impl W { CTP_W::new(self, 31) } } -#[doc = "USB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gusbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gusbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "USB Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`gusbcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gusbcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GUSBCFG_SPEC; impl crate::RegisterSpec for GUSBCFG_SPEC { type Ux = u32; diff --git a/src/usb0/haint.rs b/src/usb0/haint.rs index 70a20dd2..c68b3808 100644 --- a/src/usb0/haint.rs +++ b/src/usb0/haint.rs @@ -9,7 +9,7 @@ impl R { HAINT_R::new((self.bits & 0x3fff) as u16) } } -#[doc = "Host All Channels Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host All Channels Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`haint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HAINT_SPEC; impl crate::RegisterSpec for HAINT_SPEC { type Ux = u32; diff --git a/src/usb0/haintmsk.rs b/src/usb0/haintmsk.rs index 6265f9b9..f2bde566 100644 --- a/src/usb0/haintmsk.rs +++ b/src/usb0/haintmsk.rs @@ -21,7 +21,7 @@ impl W { HAINTMSK_W::new(self, 0) } } -#[doc = "Host All Channels Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`haintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host All Channels Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`haintmsk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`haintmsk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HAINTMSK_SPEC; impl crate::RegisterSpec for HAINTMSK_SPEC { type Ux = u32; diff --git a/src/usb0/hcfg.rs b/src/usb0/hcfg.rs index 16499ff1..fd221026 100644 --- a/src/usb0/hcfg.rs +++ b/src/usb0/hcfg.rs @@ -255,7 +255,7 @@ impl W { PER_SCHED_ENA_W::new(self, 26) } } -#[doc = "Host Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HCFG_SPEC; impl crate::RegisterSpec for HCFG_SPEC { type Ux = u32; diff --git a/src/usb0/hfir.rs b/src/usb0/hfir.rs index 7ca47edb..c855c0e7 100644 --- a/src/usb0/hfir.rs +++ b/src/usb0/hfir.rs @@ -85,7 +85,7 @@ impl W { HFIRRLD_CTRL_W::new(self, 16) } } -#[doc = "Host Frame Interval Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfir::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfir::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Frame Interval Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfir::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfir::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HFIR_SPEC; impl crate::RegisterSpec for HFIR_SPEC { type Ux = u32; diff --git a/src/usb0/hflbaddr.rs b/src/usb0/hflbaddr.rs index e34f8a3c..94860f31 100644 --- a/src/usb0/hflbaddr.rs +++ b/src/usb0/hflbaddr.rs @@ -21,7 +21,7 @@ impl W { STARTING_ADDRESS_W::new(self, 0) } } -#[doc = "Host Frame List Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hflbaddr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hflbaddr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Frame List Base Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hflbaddr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hflbaddr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HFLBADDR_SPEC; impl crate::RegisterSpec for HFLBADDR_SPEC { type Ux = u32; diff --git a/src/usb0/hfnum.rs b/src/usb0/hfnum.rs index 97530fa8..0545df5b 100644 --- a/src/usb0/hfnum.rs +++ b/src/usb0/hfnum.rs @@ -28,7 +28,7 @@ impl W { FR_NUM_W::new(self, 0) } } -#[doc = "Host Frame Number/Frame Time Remaining Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfnum::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfnum::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Frame Number/Frame Time Remaining Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfnum::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfnum::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HFNUM_SPEC; impl crate::RegisterSpec for HFNUM_SPEC { type Ux = u32; diff --git a/src/usb0/hprt.rs b/src/usb0/hprt.rs index 1501f20f..d7b69c2e 100644 --- a/src/usb0/hprt.rs +++ b/src/usb0/hprt.rs @@ -499,7 +499,7 @@ impl W { PRT_PWR_W::new(self, 12) } } -#[doc = "Host Port Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hprt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hprt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Port Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hprt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hprt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HPRT_SPEC; impl crate::RegisterSpec for HPRT_SPEC { type Ux = u32; diff --git a/src/usb0/hptxfsiz.rs b/src/usb0/hptxfsiz.rs index 95377f89..b76dcc8c 100644 --- a/src/usb0/hptxfsiz.rs +++ b/src/usb0/hptxfsiz.rs @@ -36,7 +36,7 @@ impl W { PTX_FSIZE_W::new(self, 16) } } -#[doc = "Host Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxfsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxfsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hptxfsiz::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hptxfsiz::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HPTXFSIZ_SPEC; impl crate::RegisterSpec for HPTXFSIZ_SPEC { type Ux = u32; diff --git a/src/usb0/hptxsts.rs b/src/usb0/hptxsts.rs index 3e6f4d2e..2b4c6302 100644 --- a/src/usb0/hptxsts.rs +++ b/src/usb0/hptxsts.rs @@ -152,7 +152,7 @@ impl W { PTX_FSPC_AVAIL_W::new(self, 0) } } -#[doc = "Host Periodic Transmit FIFO/ Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxsts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxsts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Periodic Transmit FIFO/ Queue Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hptxsts::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hptxsts::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HPTXSTS_SPEC; impl crate::RegisterSpec for HPTXSTS_SPEC { type Ux = u32; diff --git a/src/usb0/pcgcctl.rs b/src/usb0/pcgcctl.rs index e1290ddc..582a6784 100644 --- a/src/usb0/pcgcctl.rs +++ b/src/usb0/pcgcctl.rs @@ -36,7 +36,7 @@ impl W { GATE_HCLK_W::new(self, 1) } } -#[doc = "Power and Clock Gating Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Power and Clock Gating Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcgcctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcgcctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCGCCTL_SPEC; impl crate::RegisterSpec for PCGCCTL_SPEC { type Ux = u32; diff --git a/src/usb0_ch0.rs b/src/usb0_ch0.rs index b5ef203d..6900dba4 100644 --- a/src/usb0_ch0.rs +++ b/src/usb0_ch0.rs @@ -52,42 +52,42 @@ impl RegisterBlock { &self.hcdmab } } -#[doc = "HCCHAR (rw) register accessor: Host Channel Characteristics Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcchar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcchar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcchar`] +#[doc = "HCCHAR (rw) register accessor: Host Channel Characteristics Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcchar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcchar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcchar`] module"] pub type HCCHAR = crate::Reg; #[doc = "Host Channel Characteristics Register"] pub mod hcchar; -#[doc = "HCINT (rw) register accessor: Host Channel Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcint`] +#[doc = "HCINT (rw) register accessor: Host Channel Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcint::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcint::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcint`] module"] pub type HCINT = crate::Reg; #[doc = "Host Channel Interrupt Register"] pub mod hcint; -#[doc = "HCINTMSK (rw) register accessor: Host Channel Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcintmsk`] +#[doc = "HCINTMSK (rw) register accessor: Host Channel Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcintmsk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcintmsk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcintmsk`] module"] pub type HCINTMSK = crate::Reg; #[doc = "Host Channel Interrupt Mask Register"] pub mod hcintmsk; -#[doc = "HCTSIZ_BUFFERMODE (rw) register accessor: Host Channel Transfer Size Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_buffermode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_buffermode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hctsiz_buffermode`] +#[doc = "HCTSIZ_BUFFERMODE (rw) register accessor: Host Channel Transfer Size Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hctsiz_buffermode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hctsiz_buffermode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hctsiz_buffermode`] module"] pub type HCTSIZ_BUFFERMODE = crate::Reg; #[doc = "Host Channel Transfer Size Register \\[BUFFERMODE\\]"] pub mod hctsiz_buffermode; -#[doc = "HCTSIZ_SCATGATHER (rw) register accessor: Host Channel Transfer Size Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_scatgather::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_scatgather::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hctsiz_scatgather`] +#[doc = "HCTSIZ_SCATGATHER (rw) register accessor: Host Channel Transfer Size Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hctsiz_scatgather::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hctsiz_scatgather::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hctsiz_scatgather`] module"] pub type HCTSIZ_SCATGATHER = crate::Reg; #[doc = "Host Channel Transfer Size Register \\[SCATGATHER\\]"] pub mod hctsiz_scatgather; -#[doc = "HCDMA_BUFFERMODE (rw) register accessor: Host Channel DMA Address Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_buffermode::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_buffermode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcdma_buffermode`] +#[doc = "HCDMA_BUFFERMODE (rw) register accessor: Host Channel DMA Address Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hcdma_buffermode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcdma_buffermode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@hcdma_buffermode`] module"] pub type HCDMA_BUFFERMODE = crate::Reg; #[doc = "Host Channel DMA Address Register \\[BUFFERMODE\\]"] pub mod hcdma_buffermode; -#[doc = "HCDMA_SCATGATHER (rw) register accessor: Host Channel DMA Address Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_scatgather::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_scatgather::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcdma_scatgather`] +#[doc = "HCDMA_SCATGATHER (rw) register accessor: Host Channel DMA Address Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hcdma_scatgather::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcdma_scatgather::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@hcdma_scatgather`] module"] pub type HCDMA_SCATGATHER = crate::Reg; #[doc = "Host Channel DMA Address Register \\[SCATGATHER\\]"] pub mod hcdma_scatgather; -#[doc = "HCDMAB (r) register accessor: Host Channel DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcdmab`] +#[doc = "HCDMAB (r) register accessor: Host Channel DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcdmab`] module"] pub type HCDMAB = crate::Reg; #[doc = "Host Channel DMA Buffer Address Register"] diff --git a/src/usb0_ch0/hcchar.rs b/src/usb0_ch0/hcchar.rs index 67023566..76f1808c 100644 --- a/src/usb0_ch0/hcchar.rs +++ b/src/usb0_ch0/hcchar.rs @@ -439,7 +439,7 @@ impl W { CH_ENA_W::new(self, 31) } } -#[doc = "Host Channel Characteristics Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcchar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcchar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel Characteristics Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcchar::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcchar::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HCCHAR_SPEC; impl crate::RegisterSpec for HCCHAR_SPEC { type Ux = u32; diff --git a/src/usb0_ch0/hcdma_buffermode.rs b/src/usb0_ch0/hcdma_buffermode.rs index d00f2e0d..8b5519be 100644 --- a/src/usb0_ch0/hcdma_buffermode.rs +++ b/src/usb0_ch0/hcdma_buffermode.rs @@ -21,7 +21,7 @@ impl W { DMAADDR_W::new(self, 0) } } -#[doc = "Host Channel DMA Address Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_buffermode::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_buffermode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel DMA Address Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hcdma_buffermode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcdma_buffermode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct HCDMA_BUFFERMODE_SPEC; impl crate::RegisterSpec for HCDMA_BUFFERMODE_SPEC { type Ux = u32; diff --git a/src/usb0_ch0/hcdma_scatgather.rs b/src/usb0_ch0/hcdma_scatgather.rs index 3221999e..293e9a2c 100644 --- a/src/usb0_ch0/hcdma_scatgather.rs +++ b/src/usb0_ch0/hcdma_scatgather.rs @@ -92,7 +92,7 @@ impl W { DMAADDR_W::new(self, 9) } } -#[doc = "Host Channel DMA Address Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_scatgather::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_scatgather::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel DMA Address Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hcdma_scatgather::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcdma_scatgather::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct HCDMA_SCATGATHER_SPEC; impl crate::RegisterSpec for HCDMA_SCATGATHER_SPEC { type Ux = u32; diff --git a/src/usb0_ch0/hcdmab.rs b/src/usb0_ch0/hcdmab.rs index ad0a6686..0674fa99 100644 --- a/src/usb0_ch0/hcdmab.rs +++ b/src/usb0_ch0/hcdmab.rs @@ -9,7 +9,7 @@ impl R { BUFFER_ADDRESS_R::new(self.bits) } } -#[doc = "Host Channel DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HCDMAB_SPEC; impl crate::RegisterSpec for HCDMAB_SPEC { type Ux = u32; diff --git a/src/usb0_ch0/hcint.rs b/src/usb0_ch0/hcint.rs index 4e692041..0c5ba92e 100644 --- a/src/usb0_ch0/hcint.rs +++ b/src/usb0_ch0/hcint.rs @@ -216,7 +216,7 @@ impl W { DESC_LST_ROLLINTR_W::new(self, 13) } } -#[doc = "Host Channel Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcint::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcint::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HCINT_SPEC; impl crate::RegisterSpec for HCINT_SPEC { type Ux = u32; diff --git a/src/usb0_ch0/hcintmsk.rs b/src/usb0_ch0/hcintmsk.rs index bdabe51d..5ce49881 100644 --- a/src/usb0_ch0/hcintmsk.rs +++ b/src/usb0_ch0/hcintmsk.rs @@ -201,7 +201,7 @@ impl W { DESC_LST_ROLLINTR_MSK_W::new(self, 13) } } -#[doc = "Host Channel Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hcintmsk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hcintmsk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HCINTMSK_SPEC; impl crate::RegisterSpec for HCINTMSK_SPEC { type Ux = u32; diff --git a/src/usb0_ch0/hctsiz_buffermode.rs b/src/usb0_ch0/hctsiz_buffermode.rs index 54f14b6e..6cebb853 100644 --- a/src/usb0_ch0/hctsiz_buffermode.rs +++ b/src/usb0_ch0/hctsiz_buffermode.rs @@ -133,7 +133,7 @@ impl W { PID_W::new(self, 29) } } -#[doc = "Host Channel Transfer Size Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_buffermode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_buffermode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel Transfer Size Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hctsiz_buffermode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hctsiz_buffermode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HCTSIZ_BUFFERMODE_SPEC; impl crate::RegisterSpec for HCTSIZ_BUFFERMODE_SPEC { type Ux = u32; diff --git a/src/usb0_ch0/hctsiz_scatgather.rs b/src/usb0_ch0/hctsiz_scatgather.rs index 85d50385..08066bde 100644 --- a/src/usb0_ch0/hctsiz_scatgather.rs +++ b/src/usb0_ch0/hctsiz_scatgather.rs @@ -133,7 +133,7 @@ impl W { PID_W::new(self, 29) } } -#[doc = "Host Channel Transfer Size Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_scatgather::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_scatgather::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Host Channel Transfer Size Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`hctsiz_scatgather::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hctsiz_scatgather::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct HCTSIZ_SCATGATHER_SPEC; impl crate::RegisterSpec for HCTSIZ_SCATGATHER_SPEC { type Ux = u32; diff --git a/src/usb0_ep0.rs b/src/usb0_ep0.rs index 12238d60..9f447981 100644 --- a/src/usb0_ep0.rs +++ b/src/usb0_ep0.rs @@ -76,57 +76,57 @@ impl RegisterBlock { &self.doepdmab0 } } -#[doc = "DIEPCTL0 (rw) register accessor: Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`] +#[doc = "DIEPCTL0 (rw) register accessor: Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`] module"] pub type DIEPCTL0 = crate::Reg; #[doc = "Device Control IN Endpoint Control Register"] pub mod diepctl0; -#[doc = "DIEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint0`] +#[doc = "DIEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepint0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepint0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint0`] module"] pub type DIEPINT0 = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod diepint0; -#[doc = "DIEPTSIZ0 (rw) register accessor: Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz0`] +#[doc = "DIEPTSIZ0 (rw) register accessor: Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptsiz0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptsiz0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz0`] module"] pub type DIEPTSIZ0 = crate::Reg; #[doc = "Device IN Endpoint Transfer Size Register"] pub mod dieptsiz0; -#[doc = "DIEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdma0`] +#[doc = "DIEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdma0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepdma0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@diepdma0`] module"] pub type DIEPDMA0 = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod diepdma0; -#[doc = "DTXFSTS0 (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts0`] +#[doc = "DTXFSTS0 (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxfsts0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts0`] module"] pub type DTXFSTS0 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Status Register"] pub mod dtxfsts0; -#[doc = "DIEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab0`] +#[doc = "DIEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab0`] module"] pub type DIEPDMAB0 = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod diepdmab0; -#[doc = "DOEPCTL0 (rw) register accessor: Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl0`] +#[doc = "DOEPCTL0 (rw) register accessor: Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepctl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepctl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl0`] module"] pub type DOEPCTL0 = crate::Reg; #[doc = "Device Control OUT Endpoint Control Register"] pub mod doepctl0; -#[doc = "DOEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint0`] +#[doc = "DOEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepint0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepint0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint0`] module"] pub type DOEPINT0 = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod doepint0; -#[doc = "DOEPTSIZ0 (rw) register accessor: Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz0`] +#[doc = "DOEPTSIZ0 (rw) register accessor: Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doeptsiz0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doeptsiz0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz0`] module"] pub type DOEPTSIZ0 = crate::Reg; #[doc = "Device OUT Endpoint Transfer Size Register"] pub mod doeptsiz0; -#[doc = "DOEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdma0`] +#[doc = "DOEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdma0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepdma0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@doepdma0`] module"] pub type DOEPDMA0 = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod doepdma0; -#[doc = "DOEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab0`] +#[doc = "DOEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab0`] module"] pub type DOEPDMAB0 = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] diff --git a/src/usb0_ep0/diepctl0.rs b/src/usb0_ep0/diepctl0.rs index c940b89f..2d21e517 100644 --- a/src/usb0_ep0/diepctl0.rs +++ b/src/usb0_ep0/diepctl0.rs @@ -234,7 +234,7 @@ impl W { EPENA_W::new(self, 31) } } -#[doc = "Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPCTL0_SPEC; impl crate::RegisterSpec for DIEPCTL0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/diepdma0.rs b/src/usb0_ep0/diepdma0.rs index ee7e2c5e..ea895738 100644 --- a/src/usb0_ep0/diepdma0.rs +++ b/src/usb0_ep0/diepdma0.rs @@ -21,7 +21,7 @@ impl W { DMAADDR_W::new(self, 0) } } -#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdma0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepdma0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct DIEPDMA0_SPEC; impl crate::RegisterSpec for DIEPDMA0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/diepdmab0.rs b/src/usb0_ep0/diepdmab0.rs index c5414cf9..8c66f5f6 100644 --- a/src/usb0_ep0/diepdmab0.rs +++ b/src/usb0_ep0/diepdmab0.rs @@ -9,7 +9,7 @@ impl R { DMABUFFER_ADDR_R::new(self.bits) } } -#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPDMAB0_SPEC; impl crate::RegisterSpec for DIEPDMAB0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/diepint0.rs b/src/usb0_ep0/diepint0.rs index d548a005..13241c3b 100644 --- a/src/usb0_ep0/diepint0.rs +++ b/src/usb0_ep0/diepint0.rs @@ -118,7 +118,7 @@ impl W { BNAINTR_W::new(self, 9) } } -#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepint0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepint0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPINT0_SPEC; impl crate::RegisterSpec for DIEPINT0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/dieptsiz0.rs b/src/usb0_ep0/dieptsiz0.rs index 9a478f5d..806450a0 100644 --- a/src/usb0_ep0/dieptsiz0.rs +++ b/src/usb0_ep0/dieptsiz0.rs @@ -36,7 +36,7 @@ impl W { PKT_CNT_W::new(self, 19) } } -#[doc = "Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptsiz0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptsiz0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTSIZ0_SPEC; impl crate::RegisterSpec for DIEPTSIZ0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/doepctl0.rs b/src/usb0_ep0/doepctl0.rs index 90abc27a..bb11db50 100644 --- a/src/usb0_ep0/doepctl0.rs +++ b/src/usb0_ep0/doepctl0.rs @@ -192,7 +192,7 @@ impl W { EPENA_W::new(self, 31) } } -#[doc = "Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepctl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepctl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPCTL0_SPEC; impl crate::RegisterSpec for DOEPCTL0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/doepdma0.rs b/src/usb0_ep0/doepdma0.rs index 5d9b0ae8..97ec7c03 100644 --- a/src/usb0_ep0/doepdma0.rs +++ b/src/usb0_ep0/doepdma0.rs @@ -21,7 +21,7 @@ impl W { DMAADDR_W::new(self, 0) } } -#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdma0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepdma0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct DOEPDMA0_SPEC; impl crate::RegisterSpec for DOEPDMA0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/doepdmab0.rs b/src/usb0_ep0/doepdmab0.rs index ce04ff38..cbaff88d 100644 --- a/src/usb0_ep0/doepdmab0.rs +++ b/src/usb0_ep0/doepdmab0.rs @@ -9,7 +9,7 @@ impl R { DMABUFFER_ADDR_R::new(self.bits) } } -#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPDMAB0_SPEC; impl crate::RegisterSpec for DOEPDMAB0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/doepint0.rs b/src/usb0_ep0/doepint0.rs index e3fe2eb1..989701f4 100644 --- a/src/usb0_ep0/doepint0.rs +++ b/src/usb0_ep0/doepint0.rs @@ -186,7 +186,7 @@ impl W { NYETINTRPT_W::new(self, 14) } } -#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepint0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepint0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPINT0_SPEC; impl crate::RegisterSpec for DOEPINT0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/doeptsiz0.rs b/src/usb0_ep0/doeptsiz0.rs index 04000399..a2dcb269 100644 --- a/src/usb0_ep0/doeptsiz0.rs +++ b/src/usb0_ep0/doeptsiz0.rs @@ -120,7 +120,7 @@ impl W { SUPCNT_W::new(self, 29) } } -#[doc = "Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doeptsiz0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doeptsiz0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPTSIZ0_SPEC; impl crate::RegisterSpec for DOEPTSIZ0_SPEC { type Ux = u32; diff --git a/src/usb0_ep0/dtxfsts0.rs b/src/usb0_ep0/dtxfsts0.rs index 704576fe..a65e016a 100644 --- a/src/usb0_ep0/dtxfsts0.rs +++ b/src/usb0_ep0/dtxfsts0.rs @@ -57,7 +57,7 @@ impl R { INEPTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxfsts0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DTXFSTS0_SPEC; impl crate::RegisterSpec for DTXFSTS0_SPEC { type Ux = u32; diff --git a/src/usb0_ep1.rs b/src/usb0_ep1.rs index 9d5a4e6f..51917522 100644 --- a/src/usb0_ep1.rs +++ b/src/usb0_ep1.rs @@ -91,72 +91,72 @@ impl RegisterBlock { &self.doepdmab } } -#[doc = "DIEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_isocont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_isocont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_isocont`] +#[doc = "DIEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl_isocont::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl_isocont::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_isocont`] module"] pub type DIEPCTL_ISOCONT = crate::Reg; #[doc = "Device Endpoint Control Register \\[ISOCONT\\]"] pub mod diepctl_isocont; -#[doc = "DIEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_intbulk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_intbulk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_intbulk`] +#[doc = "DIEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl_intbulk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl_intbulk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_intbulk`] module"] pub type DIEPCTL_INTBULK = crate::Reg; #[doc = "Device Endpoint Control Register \\[INTBULK\\]"] pub mod diepctl_intbulk; -#[doc = "DIEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint`] +#[doc = "DIEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepint::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepint::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint`] module"] pub type DIEPINT = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod diepint; -#[doc = "DIEPTSIZ (rw) register accessor: Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz`] +#[doc = "DIEPTSIZ (rw) register accessor: Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptsiz::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptsiz::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz`] module"] pub type DIEPTSIZ = crate::Reg; #[doc = "Device Endpoint Transfer Size Register"] pub mod dieptsiz; -#[doc = "DIEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdma`] +#[doc = "DIEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdma::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepdma::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@diepdma`] module"] pub type DIEPDMA = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod diepdma; -#[doc = "DTXFSTS (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts`] +#[doc = "DTXFSTS (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxfsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts`] module"] pub type DTXFSTS = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Status Register"] pub mod dtxfsts; -#[doc = "DIEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab`] +#[doc = "DIEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab`] module"] pub type DIEPDMAB = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod diepdmab; -#[doc = "DOEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_isocont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_isocont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_isocont`] +#[doc = "DOEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doepctl_isocont::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepctl_isocont::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_isocont`] module"] pub type DOEPCTL_ISOCONT = crate::Reg; #[doc = "Device Endpoint Control Register \\[ISOCONT\\]"] pub mod doepctl_isocont; -#[doc = "DOEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_intbulk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_intbulk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_intbulk`] +#[doc = "DOEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doepctl_intbulk::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepctl_intbulk::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_intbulk`] module"] pub type DOEPCTL_INTBULK = crate::Reg; #[doc = "Device Endpoint Control Register \\[INTBULK\\]"] pub mod doepctl_intbulk; -#[doc = "DOEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint`] +#[doc = "DOEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepint::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepint::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint`] module"] pub type DOEPINT = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod doepint; -#[doc = "DOEPTSIZ_ISO (rw) register accessor: Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_iso::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_iso::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_iso`] +#[doc = "DOEPTSIZ_ISO (rw) register accessor: Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doeptsiz_iso::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doeptsiz_iso::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_iso`] module"] pub type DOEPTSIZ_ISO = crate::Reg; #[doc = "Device Endpoint Transfer Size Register \\[ISO\\]"] pub mod doeptsiz_iso; -#[doc = "DOEPTSIZ_CONTROL (rw) register accessor: Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_control`] +#[doc = "DOEPTSIZ_CONTROL (rw) register accessor: Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doeptsiz_control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doeptsiz_control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_control`] module"] pub type DOEPTSIZ_CONTROL = crate::Reg; #[doc = "Device Endpoint Transfer Size Register \\[CONT\\]"] pub mod doeptsiz_control; -#[doc = "DOEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdma`] +#[doc = "DOEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdma::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepdma::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@doepdma`] module"] pub type DOEPDMA = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod doepdma; -#[doc = "DOEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab`] +#[doc = "DOEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab`] module"] pub type DOEPDMAB = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] diff --git a/src/usb0_ep1/diepctl_intbulk.rs b/src/usb0_ep1/diepctl_intbulk.rs index 59edd3b0..c22f3a0f 100644 --- a/src/usb0_ep1/diepctl_intbulk.rs +++ b/src/usb0_ep1/diepctl_intbulk.rs @@ -322,7 +322,7 @@ impl W { EPENA_W::new(self, 31) } } -#[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_intbulk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_intbulk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl_intbulk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl_intbulk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPCTL_INTBULK_SPEC; impl crate::RegisterSpec for DIEPCTL_INTBULK_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/diepctl_isocont.rs b/src/usb0_ep1/diepctl_isocont.rs index 993454ff..97543e7d 100644 --- a/src/usb0_ep1/diepctl_isocont.rs +++ b/src/usb0_ep1/diepctl_isocont.rs @@ -322,7 +322,7 @@ impl W { EPENA_W::new(self, 31) } } -#[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_isocont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_isocont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl_isocont::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl_isocont::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPCTL_ISOCONT_SPEC; impl crate::RegisterSpec for DIEPCTL_ISOCONT_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/diepdma.rs b/src/usb0_ep1/diepdma.rs index b9fb78f1..535143ff 100644 --- a/src/usb0_ep1/diepdma.rs +++ b/src/usb0_ep1/diepdma.rs @@ -21,7 +21,7 @@ impl W { DMAADDR_W::new(self, 0) } } -#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdma::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepdma::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct DIEPDMA_SPEC; impl crate::RegisterSpec for DIEPDMA_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/diepdmab.rs b/src/usb0_ep1/diepdmab.rs index a695cd8f..48ba9be7 100644 --- a/src/usb0_ep1/diepdmab.rs +++ b/src/usb0_ep1/diepdmab.rs @@ -9,7 +9,7 @@ impl R { DMABUFFER_ADDR_R::new(self.bits) } } -#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPDMAB_SPEC; impl crate::RegisterSpec for DIEPDMAB_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/diepint.rs b/src/usb0_ep1/diepint.rs index 47b66d8e..abf99acc 100644 --- a/src/usb0_ep1/diepint.rs +++ b/src/usb0_ep1/diepint.rs @@ -118,7 +118,7 @@ impl W { BNAINTR_W::new(self, 9) } } -#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepint::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepint::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPINT_SPEC; impl crate::RegisterSpec for DIEPINT_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/dieptsiz.rs b/src/usb0_ep1/dieptsiz.rs index 78f6d4fe..15b5c443 100644 --- a/src/usb0_ep1/dieptsiz.rs +++ b/src/usb0_ep1/dieptsiz.rs @@ -36,7 +36,7 @@ impl W { PKT_CNT_W::new(self, 19) } } -#[doc = "Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptsiz::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptsiz::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DIEPTSIZ_SPEC; impl crate::RegisterSpec for DIEPTSIZ_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/doepctl_intbulk.rs b/src/usb0_ep1/doepctl_intbulk.rs index f7eb0649..d9dfddd4 100644 --- a/src/usb0_ep1/doepctl_intbulk.rs +++ b/src/usb0_ep1/doepctl_intbulk.rs @@ -322,7 +322,7 @@ impl W { EPENA_W::new(self, 31) } } -#[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_intbulk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_intbulk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doepctl_intbulk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepctl_intbulk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPCTL_INTBULK_SPEC; impl crate::RegisterSpec for DOEPCTL_INTBULK_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/doepctl_isocont.rs b/src/usb0_ep1/doepctl_isocont.rs index 01f0e2a9..fe9261aa 100644 --- a/src/usb0_ep1/doepctl_isocont.rs +++ b/src/usb0_ep1/doepctl_isocont.rs @@ -322,7 +322,7 @@ impl W { EPENA_W::new(self, 31) } } -#[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_isocont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_isocont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doepctl_isocont::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepctl_isocont::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPCTL_ISOCONT_SPEC; impl crate::RegisterSpec for DOEPCTL_ISOCONT_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/doepdma.rs b/src/usb0_ep1/doepdma.rs index 72ce65ee..21356edb 100644 --- a/src/usb0_ep1/doepdma.rs +++ b/src/usb0_ep1/doepdma.rs @@ -21,7 +21,7 @@ impl W { DMAADDR_W::new(self, 0) } } -#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdma::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepdma::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct DOEPDMA_SPEC; impl crate::RegisterSpec for DOEPDMA_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/doepdmab.rs b/src/usb0_ep1/doepdmab.rs index 64581ece..76955736 100644 --- a/src/usb0_ep1/doepdmab.rs +++ b/src/usb0_ep1/doepdmab.rs @@ -9,7 +9,7 @@ impl R { DMABUFFER_ADDR_R::new(self.bits) } } -#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPDMAB_SPEC; impl crate::RegisterSpec for DOEPDMAB_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/doepint.rs b/src/usb0_ep1/doepint.rs index 85392a4c..dc1f8660 100644 --- a/src/usb0_ep1/doepint.rs +++ b/src/usb0_ep1/doepint.rs @@ -186,7 +186,7 @@ impl W { NYETINTRPT_W::new(self, 14) } } -#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepint::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepint::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPINT_SPEC; impl crate::RegisterSpec for DOEPINT_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/doeptsiz_control.rs b/src/usb0_ep1/doeptsiz_control.rs index 41094bb3..f65f4ce3 100644 --- a/src/usb0_ep1/doeptsiz_control.rs +++ b/src/usb0_ep1/doeptsiz_control.rs @@ -51,7 +51,7 @@ impl W { SUPCNT_W::new(self, 29) } } -#[doc = "Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doeptsiz_control::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doeptsiz_control::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPTSIZ_CONTROL_SPEC; impl crate::RegisterSpec for DOEPTSIZ_CONTROL_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/doeptsiz_iso.rs b/src/usb0_ep1/doeptsiz_iso.rs index b5a2cf7e..68ad84bc 100644 --- a/src/usb0_ep1/doeptsiz_iso.rs +++ b/src/usb0_ep1/doeptsiz_iso.rs @@ -99,7 +99,7 @@ impl W { PKT_CNT_W::new(self, 19) } } -#[doc = "Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_iso::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_iso::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`doeptsiz_iso::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doeptsiz_iso::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DOEPTSIZ_ISO_SPEC; impl crate::RegisterSpec for DOEPTSIZ_ISO_SPEC { type Ux = u32; diff --git a/src/usb0_ep1/dtxfsts.rs b/src/usb0_ep1/dtxfsts.rs index 23ba9fd9..024b12a1 100644 --- a/src/usb0_ep1/dtxfsts.rs +++ b/src/usb0_ep1/dtxfsts.rs @@ -57,7 +57,7 @@ impl R { INEPTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxfsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DTXFSTS_SPEC; impl crate::RegisterSpec for DTXFSTS_SPEC { type Ux = u32; diff --git a/src/usic0.rs b/src/usic0.rs index 66eb60aa..95bcdea7 100644 --- a/src/usic0.rs +++ b/src/usic0.rs @@ -10,7 +10,7 @@ impl RegisterBlock { &self.id } } -#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Module Identification Register"] diff --git a/src/usic0/id.rs b/src/usic0/id.rs index f44473c6..e5f42eaa 100644 --- a/src/usic0/id.rs +++ b/src/usic0/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/usic0_ch0.rs b/src/usic0_ch0.rs index 704a8592..577c0dbe 100644 --- a/src/usic0_ch0.rs +++ b/src/usic0_ch0.rs @@ -276,230 +276,230 @@ impl RegisterBlock { self.in_.iter() } } -#[doc = "CCFG (r) register accessor: Channel Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccfg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccfg`] +#[doc = "CCFG (r) register accessor: Channel Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccfg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccfg`] module"] pub type CCFG = crate::Reg; #[doc = "Channel Configuration Register"] pub mod ccfg; -#[doc = "KSCFG (rw) register accessor: Kernel State Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`kscfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`kscfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@kscfg`] +#[doc = "KSCFG (rw) register accessor: Kernel State Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`kscfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`kscfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@kscfg`] module"] pub type KSCFG = crate::Reg; #[doc = "Kernel State Configuration Register"] pub mod kscfg; -#[doc = "FDR (rw) register accessor: Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] +#[doc = "FDR (rw) register accessor: Fractional Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] module"] pub type FDR = crate::Reg; #[doc = "Fractional Divider Register"] pub mod fdr; -#[doc = "BRG (rw) register accessor: Baud Rate Generator Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brg`] +#[doc = "BRG (rw) register accessor: Baud Rate Generator Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brg`] module"] pub type BRG = crate::Reg; #[doc = "Baud Rate Generator Register"] pub mod brg; -#[doc = "INPR (rw) register accessor: Interrupt Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inpr`] +#[doc = "INPR (rw) register accessor: Interrupt Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`inpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inpr`] module"] pub type INPR = crate::Reg; #[doc = "Interrupt Node Pointer Register"] pub mod inpr; -#[doc = "DX0CR (rw) register accessor: Input Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx0cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx0cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx0cr`] +#[doc = "DX0CR (rw) register accessor: Input Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dx0cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx0cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx0cr`] module"] pub type DX0CR = crate::Reg; #[doc = "Input Control Register 0"] pub mod dx0cr; -#[doc = "DX1CR (rw) register accessor: Input Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx1cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx1cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx1cr`] +#[doc = "DX1CR (rw) register accessor: Input Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dx1cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx1cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx1cr`] module"] pub type DX1CR = crate::Reg; #[doc = "Input Control Register 1"] pub mod dx1cr; -#[doc = "DX2CR (rw) register accessor: Input Control Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx2cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx2cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx2cr`] +#[doc = "DX2CR (rw) register accessor: Input Control Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`dx2cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx2cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx2cr`] module"] pub type DX2CR = crate::Reg; #[doc = "Input Control Register 2"] pub mod dx2cr; -#[doc = "DX3CR (rw) register accessor: Input Control Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx3cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx3cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx3cr`] +#[doc = "DX3CR (rw) register accessor: Input Control Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`dx3cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx3cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx3cr`] module"] pub type DX3CR = crate::Reg; #[doc = "Input Control Register 3"] pub mod dx3cr; -#[doc = "DX4CR (rw) register accessor: Input Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx4cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx4cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx4cr`] +#[doc = "DX4CR (rw) register accessor: Input Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`dx4cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx4cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx4cr`] module"] pub type DX4CR = crate::Reg; #[doc = "Input Control Register 4"] pub mod dx4cr; -#[doc = "DX5CR (rw) register accessor: Input Control Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx5cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx5cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx5cr`] +#[doc = "DX5CR (rw) register accessor: Input Control Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`dx5cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx5cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx5cr`] module"] pub type DX5CR = crate::Reg; #[doc = "Input Control Register 5"] pub mod dx5cr; -#[doc = "SCTR (rw) register accessor: Shift Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sctr`] +#[doc = "SCTR (rw) register accessor: Shift Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sctr`] module"] pub type SCTR = crate::Reg; #[doc = "Shift Control Register"] pub mod sctr; -#[doc = "TCSR (rw) register accessor: Transmit Control/Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcsr`] +#[doc = "TCSR (rw) register accessor: Transmit Control/Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tcsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcsr`] module"] pub type TCSR = crate::Reg; #[doc = "Transmit Control/Status Register"] pub mod tcsr; -#[doc = "PCR (rw) register accessor: Protocol Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr`] +#[doc = "PCR (rw) register accessor: Protocol Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr`] module"] pub type PCR = crate::Reg; #[doc = "Protocol Control Register"] pub mod pcr; -#[doc = "PCR_ASCMode (rw) register accessor: Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_ascmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_ascmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_ascmode`] +#[doc = "PCR_ASCMode (rw) register accessor: Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_ascmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_ascmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_ascmode`] module"] #[doc(alias = "PCR_ASCMode")] pub type PCR_ASCMODE = crate::Reg; #[doc = "Protocol Control Register \\[ASC Mode\\]"] pub mod pcr_ascmode; -#[doc = "PCR_SSCMode (rw) register accessor: Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_sscmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_sscmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_sscmode`] +#[doc = "PCR_SSCMode (rw) register accessor: Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_sscmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_sscmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_sscmode`] module"] #[doc(alias = "PCR_SSCMode")] pub type PCR_SSCMODE = crate::Reg; #[doc = "Protocol Control Register \\[SSC Mode\\]"] pub mod pcr_sscmode; -#[doc = "PCR_IICMode (rw) register accessor: Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iicmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iicmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iicmode`] +#[doc = "PCR_IICMode (rw) register accessor: Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_iicmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_iicmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iicmode`] module"] #[doc(alias = "PCR_IICMode")] pub type PCR_IICMODE = crate::Reg; #[doc = "Protocol Control Register \\[IIC Mode\\]"] pub mod pcr_iicmode; -#[doc = "PCR_IISMode (rw) register accessor: Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iismode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iismode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iismode`] +#[doc = "PCR_IISMode (rw) register accessor: Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_iismode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_iismode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iismode`] module"] #[doc(alias = "PCR_IISMode")] pub type PCR_IISMODE = crate::Reg; #[doc = "Protocol Control Register \\[IIS Mode\\]"] pub mod pcr_iismode; -#[doc = "CCR (rw) register accessor: Channel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] +#[doc = "CCR (rw) register accessor: Channel Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"] pub type CCR = crate::Reg; #[doc = "Channel Control Register"] pub mod ccr; -#[doc = "CMTR (rw) register accessor: Capture Mode Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmtr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmtr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmtr`] +#[doc = "CMTR (rw) register accessor: Capture Mode Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmtr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmtr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmtr`] module"] pub type CMTR = crate::Reg; #[doc = "Capture Mode Timer Register"] pub mod cmtr; -#[doc = "PSR (rw) register accessor: Protocol Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr`] +#[doc = "PSR (rw) register accessor: Protocol Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`psr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr`] module"] pub type PSR = crate::Reg; #[doc = "Protocol Status Register"] pub mod psr; -#[doc = "PSR_ASCMode (rw) register accessor: Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_ascmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_ascmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_ascmode`] +#[doc = "PSR_ASCMode (rw) register accessor: Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_ascmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_ascmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_ascmode`] module"] #[doc(alias = "PSR_ASCMode")] pub type PSR_ASCMODE = crate::Reg; #[doc = "Protocol Status Register \\[ASC Mode\\]"] pub mod psr_ascmode; -#[doc = "PSR_SSCMode (rw) register accessor: Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_sscmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_sscmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_sscmode`] +#[doc = "PSR_SSCMode (rw) register accessor: Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_sscmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_sscmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_sscmode`] module"] #[doc(alias = "PSR_SSCMode")] pub type PSR_SSCMODE = crate::Reg; #[doc = "Protocol Status Register \\[SSC Mode\\]"] pub mod psr_sscmode; -#[doc = "PSR_IICMode (rw) register accessor: Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iicmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iicmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iicmode`] +#[doc = "PSR_IICMode (rw) register accessor: Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_iicmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_iicmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iicmode`] module"] #[doc(alias = "PSR_IICMode")] pub type PSR_IICMODE = crate::Reg; #[doc = "Protocol Status Register \\[IIC Mode\\]"] pub mod psr_iicmode; -#[doc = "PSR_IISMode (rw) register accessor: Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iismode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iismode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iismode`] +#[doc = "PSR_IISMode (rw) register accessor: Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_iismode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_iismode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iismode`] module"] #[doc(alias = "PSR_IISMode")] pub type PSR_IISMODE = crate::Reg; #[doc = "Protocol Status Register \\[IIS Mode\\]"] pub mod psr_iismode; -#[doc = "PSCR (w) register accessor: Protocol Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pscr`] +#[doc = "PSCR (w) register accessor: Protocol Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pscr`] module"] pub type PSCR = crate::Reg; #[doc = "Protocol Status Clear Register"] pub mod pscr; -#[doc = "RBUFSR (r) register accessor: Receiver Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufsr`] +#[doc = "RBUFSR (r) register accessor: Receiver Buffer Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbufsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufsr`] module"] pub type RBUFSR = crate::Reg; #[doc = "Receiver Buffer Status Register"] pub mod rbufsr; -#[doc = "RBUF (r) register accessor: Receiver Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf`] +#[doc = "RBUF (r) register accessor: Receiver Buffer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@rbuf`] module"] pub type RBUF = crate::Reg; #[doc = "Receiver Buffer Register"] pub mod rbuf; -#[doc = "RBUFD (r) register accessor: Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufd`] +#[doc = "RBUFD (r) register accessor: Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::Reg::read) this register and get [`rbufd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufd`] module"] pub type RBUFD = crate::Reg; #[doc = "Receiver Buffer Register for Debugger"] pub mod rbufd; -#[doc = "RBUF0 (r) register accessor: Receiver Buffer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf0`] +#[doc = "RBUF0 (r) register accessor: Receiver Buffer Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf0`] module"] pub type RBUF0 = crate::Reg; #[doc = "Receiver Buffer Register 0"] pub mod rbuf0; -#[doc = "RBUF1 (r) register accessor: Receiver Buffer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf1`] +#[doc = "RBUF1 (r) register accessor: Receiver Buffer Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf1`] module"] pub type RBUF1 = crate::Reg; #[doc = "Receiver Buffer Register 1"] pub mod rbuf1; -#[doc = "RBUF01SR (r) register accessor: Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf01sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf01sr`] +#[doc = "RBUF01SR (r) register accessor: Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf01sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf01sr`] module"] pub type RBUF01SR = crate::Reg; #[doc = "Receiver Buffer 01 Status Register"] pub mod rbuf01sr; -#[doc = "FMR (w) register accessor: Flag Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fmr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmr`] +#[doc = "FMR (w) register accessor: Flag Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fmr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmr`] module"] pub type FMR = crate::Reg; #[doc = "Flag Modification Register"] pub mod fmr; -#[doc = "TBUF (rw) register accessor: Transmit Buffer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbuf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbuf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbuf`] +#[doc = "TBUF (rw) register accessor: Transmit Buffer\n\nYou can [`read`](crate::Reg::read) this register and get [`tbuf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tbuf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbuf`] module"] pub type TBUF = crate::Reg; #[doc = "Transmit Buffer"] pub mod tbuf; -#[doc = "BYP (rw) register accessor: Bypass Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`byp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`byp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@byp`] +#[doc = "BYP (rw) register accessor: Bypass Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`byp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`byp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@byp`] module"] pub type BYP = crate::Reg; #[doc = "Bypass Data Register"] pub mod byp; -#[doc = "BYPCR (rw) register accessor: Bypass Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bypcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bypcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bypcr`] +#[doc = "BYPCR (rw) register accessor: Bypass Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bypcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bypcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bypcr`] module"] pub type BYPCR = crate::Reg; #[doc = "Bypass Control Register"] pub mod bypcr; -#[doc = "TBCTR (rw) register accessor: Transmitter Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbctr`] +#[doc = "TBCTR (rw) register accessor: Transmitter Buffer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tbctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tbctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbctr`] module"] pub type TBCTR = crate::Reg; #[doc = "Transmitter Buffer Control Register"] pub mod tbctr; -#[doc = "RBCTR (rw) register accessor: Receiver Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rbctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbctr`] +#[doc = "RBCTR (rw) register accessor: Receiver Buffer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rbctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbctr`] module"] pub type RBCTR = crate::Reg; #[doc = "Receiver Buffer Control Register"] pub mod rbctr; -#[doc = "TRBPTR (r) register accessor: Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbptr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbptr`] +#[doc = "TRBPTR (r) register accessor: Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trbptr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbptr`] module"] pub type TRBPTR = crate::Reg; #[doc = "Transmit/Receive Buffer Pointer Register"] pub mod trbptr; -#[doc = "TRBSR (rw) register accessor: Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbsr`] +#[doc = "TRBSR (rw) register accessor: Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trbsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trbsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbsr`] module"] pub type TRBSR = crate::Reg; #[doc = "Transmit/Receive Buffer Status Register"] pub mod trbsr; -#[doc = "TRBSCR (w) register accessor: Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbscr`] +#[doc = "TRBSCR (w) register accessor: Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trbscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbscr`] module"] pub type TRBSCR = crate::Reg; #[doc = "Transmit/Receive Buffer Status Clear Register"] pub mod trbscr; -#[doc = "OUTR (r) register accessor: Receiver Buffer Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outr::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outr`] +#[doc = "OUTR (r) register accessor: Receiver Buffer Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`outr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@outr`] module"] pub type OUTR = crate::Reg; #[doc = "Receiver Buffer Output Register"] pub mod outr; -#[doc = "OUTDR (r) register accessor: Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outdr`] +#[doc = "OUTDR (r) register accessor: Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::Reg::read) this register and get [`outdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outdr`] module"] pub type OUTDR = crate::Reg; #[doc = "Receiver Buffer Output Register L for Debugger"] pub mod outdr; -#[doc = "IN (w) register accessor: Transmit FIFO Buffer\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`in_::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] +#[doc = "IN (w) register accessor: Transmit FIFO Buffer\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`in_::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] pub type IN = crate::Reg; #[doc = "Transmit FIFO Buffer"] diff --git a/src/usic0_ch0/brg.rs b/src/usic0_ch0/brg.rs index a857ad5e..f061d7a5 100644 --- a/src/usic0_ch0/brg.rs +++ b/src/usic0_ch0/brg.rs @@ -585,7 +585,7 @@ impl W { SCLKCFG_W::new(self, 30) } } -#[doc = "Baud Rate Generator Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Baud Rate Generator Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BRG_SPEC; impl crate::RegisterSpec for BRG_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/byp.rs b/src/usic0_ch0/byp.rs index de0463f6..4fe75804 100644 --- a/src/usic0_ch0/byp.rs +++ b/src/usic0_ch0/byp.rs @@ -21,7 +21,7 @@ impl W { BDATA_W::new(self, 0) } } -#[doc = "Bypass Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`byp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`byp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Bypass Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`byp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`byp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BYP_SPEC; impl crate::RegisterSpec for BYP_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/bypcr.rs b/src/usic0_ch0/bypcr.rs index e285ecaa..c94c13a9 100644 --- a/src/usic0_ch0/bypcr.rs +++ b/src/usic0_ch0/bypcr.rs @@ -381,7 +381,7 @@ impl W { BHPC_W::new(self, 21) } } -#[doc = "Bypass Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bypcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bypcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Bypass Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bypcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bypcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BYPCR_SPEC; impl crate::RegisterSpec for BYPCR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/ccfg.rs b/src/usic0_ch0/ccfg.rs index 3a7d2025..e2879800 100644 --- a/src/usic0_ch0/ccfg.rs +++ b/src/usic0_ch0/ccfg.rs @@ -248,7 +248,7 @@ impl R { TB_R::new(((self.bits >> 7) & 1) != 0) } } -#[doc = "Channel Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccfg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccfg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CCFG_SPEC; impl crate::RegisterSpec for CCFG_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/ccr.rs b/src/usic0_ch0/ccr.rs index 6e1eddfa..22464ba5 100644 --- a/src/usic0_ch0/ccr.rs +++ b/src/usic0_ch0/ccr.rs @@ -748,7 +748,7 @@ impl W { BRGIEN_W::new(self, 16) } } -#[doc = "Channel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CCR_SPEC; impl crate::RegisterSpec for CCR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/cmtr.rs b/src/usic0_ch0/cmtr.rs index 124ccaec..0db3b5ad 100644 --- a/src/usic0_ch0/cmtr.rs +++ b/src/usic0_ch0/cmtr.rs @@ -21,7 +21,7 @@ impl W { CTV_W::new(self, 0) } } -#[doc = "Capture Mode Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmtr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmtr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Capture Mode Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmtr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmtr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CMTR_SPEC; impl crate::RegisterSpec for CMTR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/dx0cr.rs b/src/usic0_ch0/dx0cr.rs index e1e524aa..129f4094 100644 --- a/src/usic0_ch0/dx0cr.rs +++ b/src/usic0_ch0/dx0cr.rs @@ -613,7 +613,7 @@ impl W { CM_W::new(self, 10) } } -#[doc = "Input Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx0cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx0cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dx0cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx0cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DX0CR_SPEC; impl crate::RegisterSpec for DX0CR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/dx1cr.rs b/src/usic0_ch0/dx1cr.rs index 6bbf07e3..707c6902 100644 --- a/src/usic0_ch0/dx1cr.rs +++ b/src/usic0_ch0/dx1cr.rs @@ -677,7 +677,7 @@ impl W { CM_W::new(self, 10) } } -#[doc = "Input Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx1cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx1cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dx1cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx1cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DX1CR_SPEC; impl crate::RegisterSpec for DX1CR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/dx2cr.rs b/src/usic0_ch0/dx2cr.rs index a424d7b0..6390e4a1 100644 --- a/src/usic0_ch0/dx2cr.rs +++ b/src/usic0_ch0/dx2cr.rs @@ -613,7 +613,7 @@ impl W { CM_W::new(self, 10) } } -#[doc = "Input Control Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx2cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx2cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Control Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`dx2cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx2cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DX2CR_SPEC; impl crate::RegisterSpec for DX2CR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/dx3cr.rs b/src/usic0_ch0/dx3cr.rs index 56e2658c..808069e6 100644 --- a/src/usic0_ch0/dx3cr.rs +++ b/src/usic0_ch0/dx3cr.rs @@ -613,7 +613,7 @@ impl W { CM_W::new(self, 10) } } -#[doc = "Input Control Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx3cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx3cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Control Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`dx3cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx3cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DX3CR_SPEC; impl crate::RegisterSpec for DX3CR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/dx4cr.rs b/src/usic0_ch0/dx4cr.rs index 320de599..4d76b492 100644 --- a/src/usic0_ch0/dx4cr.rs +++ b/src/usic0_ch0/dx4cr.rs @@ -613,7 +613,7 @@ impl W { CM_W::new(self, 10) } } -#[doc = "Input Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx4cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx4cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`dx4cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx4cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DX4CR_SPEC; impl crate::RegisterSpec for DX4CR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/dx5cr.rs b/src/usic0_ch0/dx5cr.rs index 53577e37..fe654b46 100644 --- a/src/usic0_ch0/dx5cr.rs +++ b/src/usic0_ch0/dx5cr.rs @@ -613,7 +613,7 @@ impl W { CM_W::new(self, 10) } } -#[doc = "Input Control Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx5cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx5cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Control Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`dx5cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx5cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct DX5CR_SPEC; impl crate::RegisterSpec for DX5CR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/fdr.rs b/src/usic0_ch0/fdr.rs index ef6e4510..119ab9bc 100644 --- a/src/usic0_ch0/fdr.rs +++ b/src/usic0_ch0/fdr.rs @@ -125,7 +125,7 @@ impl W { DM_W::new(self, 14) } } -#[doc = "Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Fractional Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FDR_SPEC; impl crate::RegisterSpec for FDR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/fmr.rs b/src/usic0_ch0/fmr.rs index 54d3aed0..3622ae70 100644 --- a/src/usic0_ch0/fmr.rs +++ b/src/usic0_ch0/fmr.rs @@ -385,7 +385,7 @@ impl W { SIO5_W::new(self, 21) } } -#[doc = "Flag Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fmr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Flag Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fmr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FMR_SPEC; impl crate::RegisterSpec for FMR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/in_.rs b/src/usic0_ch0/in_.rs index 5ec0cc24..2a977840 100644 --- a/src/usic0_ch0/in_.rs +++ b/src/usic0_ch0/in_.rs @@ -10,7 +10,7 @@ impl W { TDATA_W::new(self, 0) } } -#[doc = "Transmit FIFO Buffer\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`in_::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit FIFO Buffer\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`in_::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct IN_SPEC; impl crate::RegisterSpec for IN_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/inpr.rs b/src/usic0_ch0/inpr.rs index 1f3949ac..6e3b89c0 100644 --- a/src/usic0_ch0/inpr.rs +++ b/src/usic0_ch0/inpr.rs @@ -189,7 +189,7 @@ impl W { PINP_W::new(self, 16) } } -#[doc = "Interrupt Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Interrupt Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`inpr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inpr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INPR_SPEC; impl crate::RegisterSpec for INPR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/kscfg.rs b/src/usic0_ch0/kscfg.rs index 630b8f22..3822a424 100644 --- a/src/usic0_ch0/kscfg.rs +++ b/src/usic0_ch0/kscfg.rs @@ -293,7 +293,7 @@ impl W { BPSUM_W::new(self, 11) } } -#[doc = "Kernel State Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`kscfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`kscfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Kernel State Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`kscfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`kscfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct KSCFG_SPEC; impl crate::RegisterSpec for KSCFG_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/outdr.rs b/src/usic0_ch0/outdr.rs index 8080282f..303a86e1 100644 --- a/src/usic0_ch0/outdr.rs +++ b/src/usic0_ch0/outdr.rs @@ -16,7 +16,7 @@ impl R { RCI_R::new(((self.bits >> 16) & 0x1f) as u8) } } -#[doc = "Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outdr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::Reg::read) this register and get [`outdr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OUTDR_SPEC; impl crate::RegisterSpec for OUTDR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/outr.rs b/src/usic0_ch0/outr.rs index ceffa844..93c969b1 100644 --- a/src/usic0_ch0/outr.rs +++ b/src/usic0_ch0/outr.rs @@ -16,7 +16,7 @@ impl R { RCI_R::new(((self.bits >> 16) & 0x1f) as u8) } } -#[doc = "Receiver Buffer Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outr::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`outr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct OUTR_SPEC; impl crate::RegisterSpec for OUTR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/pcr.rs b/src/usic0_ch0/pcr.rs index 0a6302fc..ed7a6187 100644 --- a/src/usic0_ch0/pcr.rs +++ b/src/usic0_ch0/pcr.rs @@ -486,7 +486,7 @@ impl W { CTR31_W::new(self, 31) } } -#[doc = "Protocol Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCR_SPEC; impl crate::RegisterSpec for PCR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/pcr_ascmode.rs b/src/usic0_ch0/pcr_ascmode.rs index 21aad7c3..1b3d473d 100644 --- a/src/usic0_ch0/pcr_ascmode.rs +++ b/src/usic0_ch0/pcr_ascmode.rs @@ -834,7 +834,7 @@ impl W { MCLK_W::new(self, 31) } } -#[doc = "Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_ascmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_ascmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_ascmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_ascmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCR_ASCMODE_SPEC; impl crate::RegisterSpec for PCR_ASCMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/pcr_iicmode.rs b/src/usic0_ch0/pcr_iicmode.rs index f6295b60..a833776b 100644 --- a/src/usic0_ch0/pcr_iicmode.rs +++ b/src/usic0_ch0/pcr_iicmode.rs @@ -804,7 +804,7 @@ impl W { MCLK_W::new(self, 31) } } -#[doc = "Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iicmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iicmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_iicmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_iicmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCR_IICMODE_SPEC; impl crate::RegisterSpec for PCR_IICMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/pcr_iismode.rs b/src/usic0_ch0/pcr_iismode.rs index 29ea7789..2b18c4a9 100644 --- a/src/usic0_ch0/pcr_iismode.rs +++ b/src/usic0_ch0/pcr_iismode.rs @@ -533,7 +533,7 @@ impl W { MCLK_W::new(self, 31) } } -#[doc = "Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iismode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iismode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_iismode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_iismode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCR_IISMODE_SPEC; impl crate::RegisterSpec for PCR_IISMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/pcr_sscmode.rs b/src/usic0_ch0/pcr_sscmode.rs index a6fdfe4d..6904186e 100644 --- a/src/usic0_ch0/pcr_sscmode.rs +++ b/src/usic0_ch0/pcr_sscmode.rs @@ -844,7 +844,7 @@ impl W { MCLK_W::new(self, 31) } } -#[doc = "Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_sscmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_sscmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_sscmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_sscmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PCR_SSCMODE_SPEC; impl crate::RegisterSpec for PCR_SSCMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/pscr.rs b/src/usic0_ch0/pscr.rs index 0be6845c..67f11c5c 100644 --- a/src/usic0_ch0/pscr.rs +++ b/src/usic0_ch0/pscr.rs @@ -631,7 +631,7 @@ impl W { CBRGIF_W::new(self, 16) } } -#[doc = "Protocol Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSCR_SPEC; impl crate::RegisterSpec for PSCR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/psr.rs b/src/usic0_ch0/psr.rs index 32271d39..4743cef0 100644 --- a/src/usic0_ch0/psr.rs +++ b/src/usic0_ch0/psr.rs @@ -604,7 +604,7 @@ impl W { BRGIF_W::new(self, 16) } } -#[doc = "Protocol Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`psr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSR_SPEC; impl crate::RegisterSpec for PSR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/psr_ascmode.rs b/src/usic0_ch0/psr_ascmode.rs index 9b1c1f11..9ec6f072 100644 --- a/src/usic0_ch0/psr_ascmode.rs +++ b/src/usic0_ch0/psr_ascmode.rs @@ -1071,7 +1071,7 @@ impl W { BRGIF_W::new(self, 16) } } -#[doc = "Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_ascmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_ascmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_ascmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_ascmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSR_ASCMODE_SPEC; impl crate::RegisterSpec for PSR_ASCMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/psr_iicmode.rs b/src/usic0_ch0/psr_iicmode.rs index 2debedee..eff9fb29 100644 --- a/src/usic0_ch0/psr_iicmode.rs +++ b/src/usic0_ch0/psr_iicmode.rs @@ -1094,7 +1094,7 @@ impl W { BRGIF_W::new(self, 16) } } -#[doc = "Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iicmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iicmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_iicmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_iicmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSR_IICMODE_SPEC; impl crate::RegisterSpec for PSR_IICMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/psr_iismode.rs b/src/usic0_ch0/psr_iismode.rs index 0d8f4b82..01085450 100644 --- a/src/usic0_ch0/psr_iismode.rs +++ b/src/usic0_ch0/psr_iismode.rs @@ -838,7 +838,7 @@ impl W { BRGIF_W::new(self, 16) } } -#[doc = "Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iismode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iismode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_iismode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_iismode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSR_IISMODE_SPEC; impl crate::RegisterSpec for PSR_IISMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/psr_sscmode.rs b/src/usic0_ch0/psr_sscmode.rs index 78b4fe50..69857d16 100644 --- a/src/usic0_ch0/psr_sscmode.rs +++ b/src/usic0_ch0/psr_sscmode.rs @@ -774,7 +774,7 @@ impl W { BRGIF_W::new(self, 16) } } -#[doc = "Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_sscmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_sscmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_sscmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_sscmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct PSR_SSCMODE_SPEC; impl crate::RegisterSpec for PSR_SSCMODE_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/rbctr.rs b/src/usic0_ch0/rbctr.rs index 332c7a68..f38026a3 100644 --- a/src/usic0_ch0/rbctr.rs +++ b/src/usic0_ch0/rbctr.rs @@ -992,7 +992,7 @@ impl W { RBERIEN_W::new(self, 31) } } -#[doc = "Receiver Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rbctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rbctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RBCTR_SPEC; impl crate::RegisterSpec for RBCTR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/rbuf.rs b/src/usic0_ch0/rbuf.rs index 6388c73e..799b4b2d 100644 --- a/src/usic0_ch0/rbuf.rs +++ b/src/usic0_ch0/rbuf.rs @@ -9,7 +9,7 @@ impl R { DSR_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Receiver Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct RBUF_SPEC; impl crate::RegisterSpec for RBUF_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/rbuf0.rs b/src/usic0_ch0/rbuf0.rs index cfc36b8c..7ce53987 100644 --- a/src/usic0_ch0/rbuf0.rs +++ b/src/usic0_ch0/rbuf0.rs @@ -9,7 +9,7 @@ impl R { DSR0_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Receiver Buffer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RBUF0_SPEC; impl crate::RegisterSpec for RBUF0_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/rbuf01sr.rs b/src/usic0_ch0/rbuf01sr.rs index c7504db5..aefc4090 100644 --- a/src/usic0_ch0/rbuf01sr.rs +++ b/src/usic0_ch0/rbuf01sr.rs @@ -480,7 +480,7 @@ impl R { DS1_R::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf01sr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf01sr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RBUF01SR_SPEC; impl crate::RegisterSpec for RBUF01SR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/rbuf1.rs b/src/usic0_ch0/rbuf1.rs index 036e9716..82cf6b6e 100644 --- a/src/usic0_ch0/rbuf1.rs +++ b/src/usic0_ch0/rbuf1.rs @@ -9,7 +9,7 @@ impl R { DSR1_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Receiver Buffer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RBUF1_SPEC; impl crate::RegisterSpec for RBUF1_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/rbufd.rs b/src/usic0_ch0/rbufd.rs index 441149e7..dbcf61b3 100644 --- a/src/usic0_ch0/rbufd.rs +++ b/src/usic0_ch0/rbufd.rs @@ -9,7 +9,7 @@ impl R { DSR_R::new((self.bits & 0xffff) as u16) } } -#[doc = "Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::Reg::read) this register and get [`rbufd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RBUFD_SPEC; impl crate::RegisterSpec for RBUFD_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/rbufsr.rs b/src/usic0_ch0/rbufsr.rs index 034f4742..b85db89d 100644 --- a/src/usic0_ch0/rbufsr.rs +++ b/src/usic0_ch0/rbufsr.rs @@ -51,7 +51,7 @@ impl R { DS_R::new(((self.bits >> 15) & 1) != 0) } } -#[doc = "Receiver Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Receiver Buffer Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbufsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RBUFSR_SPEC; impl crate::RegisterSpec for RBUFSR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/sctr.rs b/src/usic0_ch0/sctr.rs index d4b8bd8b..01502342 100644 --- a/src/usic0_ch0/sctr.rs +++ b/src/usic0_ch0/sctr.rs @@ -568,7 +568,7 @@ impl W { WLE_W::new(self, 24) } } -#[doc = "Shift Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Shift Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SCTR_SPEC; impl crate::RegisterSpec for SCTR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/tbctr.rs b/src/usic0_ch0/tbctr.rs index 153c50f8..efc913d7 100644 --- a/src/usic0_ch0/tbctr.rs +++ b/src/usic0_ch0/tbctr.rs @@ -731,7 +731,7 @@ impl W { TBERIEN_W::new(self, 31) } } -#[doc = "Transmitter Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmitter Buffer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tbctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tbctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TBCTR_SPEC; impl crate::RegisterSpec for TBCTR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/tbuf.rs b/src/usic0_ch0/tbuf.rs index 379b540e..78006e7d 100644 --- a/src/usic0_ch0/tbuf.rs +++ b/src/usic0_ch0/tbuf.rs @@ -21,7 +21,7 @@ impl W { TDATA_W::new(self, 0) } } -#[doc = "Transmit Buffer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbuf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbuf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Buffer\n\nYou can [`read`](crate::Reg::read) this register and get [`tbuf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tbuf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TBUF_SPEC; impl crate::RegisterSpec for TBUF_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/tcsr.rs b/src/usic0_ch0/tcsr.rs index 22a10445..33ba2036 100644 --- a/src/usic0_ch0/tcsr.rs +++ b/src/usic0_ch0/tcsr.rs @@ -954,7 +954,7 @@ impl W { WA_W::new(self, 13) } } -#[doc = "Transmit Control/Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit Control/Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tcsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TCSR_SPEC; impl crate::RegisterSpec for TCSR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/trbptr.rs b/src/usic0_ch0/trbptr.rs index ed9103d8..f84c4a33 100644 --- a/src/usic0_ch0/trbptr.rs +++ b/src/usic0_ch0/trbptr.rs @@ -30,7 +30,7 @@ impl R { RDOPTR_R::new(((self.bits >> 24) & 0x3f) as u8) } } -#[doc = "Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbptr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trbptr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRBPTR_SPEC; impl crate::RegisterSpec for TRBPTR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/trbscr.rs b/src/usic0_ch0/trbscr.rs index 965b0831..61d99c08 100644 --- a/src/usic0_ch0/trbscr.rs +++ b/src/usic0_ch0/trbscr.rs @@ -298,7 +298,7 @@ impl W { FLUSHTB_W::new(self, 15) } } -#[doc = "Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trbscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRBSCR_SPEC; impl crate::RegisterSpec for TRBSCR_SPEC { type Ux = u32; diff --git a/src/usic0_ch0/trbsr.rs b/src/usic0_ch0/trbsr.rs index 250996ee..6234275c 100644 --- a/src/usic0_ch0/trbsr.rs +++ b/src/usic0_ch0/trbsr.rs @@ -668,7 +668,7 @@ impl W { TBERI_W::new(self, 9) } } -#[doc = "Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trbsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trbsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TRBSR_SPEC; impl crate::RegisterSpec for TRBSR_SPEC { type Ux = u32; diff --git a/src/vadc.rs b/src/vadc.rs index 84c207a6..0dcfe8f6 100644 --- a/src/vadc.rs +++ b/src/vadc.rs @@ -139,87 +139,87 @@ impl RegisterBlock { &self.emuxsel } } -#[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] +#[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] pub type CLC = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; -#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; -#[doc = "OCS (rw) register accessor: OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ocs`] +#[doc = "OCS (rw) register accessor: OCDS Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ocs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ocs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ocs`] module"] pub type OCS = crate::Reg; #[doc = "OCDS Control and Status Register"] pub mod ocs; -#[doc = "GLOBCFG (rw) register accessor: Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globcfg`] +#[doc = "GLOBCFG (rw) register accessor: Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globcfg`] module"] pub type GLOBCFG = crate::Reg; #[doc = "Global Configuration Register"] pub mod globcfg; -#[doc = "GLOBICLASS (rw) register accessor: Input Class Register, Global\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globiclass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globiclass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globiclass`] +#[doc = "GLOBICLASS (rw) register accessor: Input Class Register, Global\n\nYou can [`read`](crate::Reg::read) this register and get [`globiclass::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globiclass::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globiclass`] module"] pub type GLOBICLASS = crate::Reg; #[doc = "Input Class Register, Global"] pub mod globiclass; -#[doc = "GLOBBOUND (rw) register accessor: Global Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globbound::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globbound::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globbound`] +#[doc = "GLOBBOUND (rw) register accessor: Global Boundary Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globbound::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globbound::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globbound`] module"] pub type GLOBBOUND = crate::Reg; #[doc = "Global Boundary Select Register"] pub mod globbound; -#[doc = "GLOBEFLAG (rw) register accessor: Global Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globeflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globeflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globeflag`] +#[doc = "GLOBEFLAG (rw) register accessor: Global Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globeflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globeflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globeflag`] module"] pub type GLOBEFLAG = crate::Reg; #[doc = "Global Event Flag Register"] pub mod globeflag; -#[doc = "GLOBEVNP (rw) register accessor: Global Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globevnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globevnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globevnp`] +#[doc = "GLOBEVNP (rw) register accessor: Global Event Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globevnp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globevnp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globevnp`] module"] pub type GLOBEVNP = crate::Reg; #[doc = "Global Event Node Pointer Register"] pub mod globevnp; -#[doc = "GLOBTF (rw) register accessor: Global Test Functions Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globtf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globtf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globtf`] +#[doc = "GLOBTF (rw) register accessor: Global Test Functions Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globtf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globtf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globtf`] module"] pub type GLOBTF = crate::Reg; #[doc = "Global Test Functions Register"] pub mod globtf; -#[doc = "BRSSEL (rw) register accessor: Background Request Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brssel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brssel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brssel`] +#[doc = "BRSSEL (rw) register accessor: Background Request Source Channel Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brssel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brssel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brssel`] module"] pub type BRSSEL = crate::Reg; #[doc = "Background Request Source Channel Select Register"] pub mod brssel; -#[doc = "BRSPND (rw) register accessor: Background Request Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brspnd`] +#[doc = "BRSPND (rw) register accessor: Background Request Source Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brspnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brspnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brspnd`] module"] pub type BRSPND = crate::Reg; #[doc = "Background Request Source Pending Register"] pub mod brspnd; -#[doc = "BRSCTRL (rw) register accessor: Background Request Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsctrl`] +#[doc = "BRSCTRL (rw) register accessor: Background Request Source Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brsctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brsctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsctrl`] module"] pub type BRSCTRL = crate::Reg; #[doc = "Background Request Source Control Register"] pub mod brsctrl; -#[doc = "BRSMR (rw) register accessor: Background Request Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsmr`] +#[doc = "BRSMR (rw) register accessor: Background Request Source Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brsmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brsmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsmr`] module"] pub type BRSMR = crate::Reg; #[doc = "Background Request Source Mode Register"] pub mod brsmr; -#[doc = "GLOBRCR (rw) register accessor: Global Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globrcr`] +#[doc = "GLOBRCR (rw) register accessor: Global Result Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globrcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globrcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globrcr`] module"] pub type GLOBRCR = crate::Reg; #[doc = "Global Result Control Register"] pub mod globrcr; -#[doc = "GLOBRES (rw) register accessor: Global Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globres::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globres::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globres`] +#[doc = "GLOBRES (rw) register accessor: Global Result Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globres::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globres::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@globres`] module"] pub type GLOBRES = crate::Reg; #[doc = "Global Result Register"] pub mod globres; -#[doc = "GLOBRESD (rw) register accessor: Global Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globresd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globresd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globresd`] +#[doc = "GLOBRESD (rw) register accessor: Global Result Register, Debug\n\nYou can [`read`](crate::Reg::read) this register and get [`globresd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globresd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globresd`] module"] pub type GLOBRESD = crate::Reg; #[doc = "Global Result Register, Debug"] pub mod globresd; -#[doc = "EMUXSEL (rw) register accessor: External Multiplexer Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxsel`] +#[doc = "EMUXSEL (rw) register accessor: External Multiplexer Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`emuxsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emuxsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxsel`] module"] pub type EMUXSEL = crate::Reg; #[doc = "External Multiplexer Select Register"] diff --git a/src/vadc/brsctrl.rs b/src/vadc/brsctrl.rs index 91282c52..896b800f 100644 --- a/src/vadc/brsctrl.rs +++ b/src/vadc/brsctrl.rs @@ -305,7 +305,7 @@ impl W { GTWC_W::new(self, 23) } } -#[doc = "Background Request Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Background Request Source Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brsctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brsctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BRSCTRL_SPEC; impl crate::RegisterSpec for BRSCTRL_SPEC { type Ux = u32; diff --git a/src/vadc/brsmr.rs b/src/vadc/brsmr.rs index 8d710ed1..5241d160 100644 --- a/src/vadc/brsmr.rs +++ b/src/vadc/brsmr.rs @@ -538,7 +538,7 @@ impl W { RPTDIS_W::new(self, 16) } } -#[doc = "Background Request Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsmr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Background Request Source Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brsmr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brsmr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BRSMR_SPEC; impl crate::RegisterSpec for BRSMR_SPEC { type Ux = u32; diff --git a/src/vadc/brspnd.rs b/src/vadc/brspnd.rs index 91d8495f..dcce6d87 100644 --- a/src/vadc/brspnd.rs +++ b/src/vadc/brspnd.rs @@ -518,7 +518,7 @@ impl W { CHPNDG7_W::new(self, 7) } } -#[doc = "Background Request Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Background Request Source Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brspnd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brspnd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BRSPND_SPEC; impl crate::RegisterSpec for BRSPND_SPEC { type Ux = u32; diff --git a/src/vadc/brssel.rs b/src/vadc/brssel.rs index 7a761ae7..21ad8ceb 100644 --- a/src/vadc/brssel.rs +++ b/src/vadc/brssel.rs @@ -518,7 +518,7 @@ impl W { CHSELG7_W::new(self, 7) } } -#[doc = "Background Request Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brssel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brssel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Background Request Source Channel Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brssel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brssel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BRSSEL_SPEC; impl crate::RegisterSpec for BRSSEL_SPEC { type Ux = u32; diff --git a/src/vadc/clc.rs b/src/vadc/clc.rs index 6bb2d198..e1613540 100644 --- a/src/vadc/clc.rs +++ b/src/vadc/clc.rs @@ -175,7 +175,7 @@ impl W { EDIS_W::new(self, 3) } } -#[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CLC_SPEC; impl crate::RegisterSpec for CLC_SPEC { type Ux = u32; diff --git a/src/vadc/emuxsel.rs b/src/vadc/emuxsel.rs index e2af79b2..abc1c7d8 100644 --- a/src/vadc/emuxsel.rs +++ b/src/vadc/emuxsel.rs @@ -36,7 +36,7 @@ impl W { EMUXGRP1_W::new(self, 4) } } -#[doc = "External Multiplexer Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "External Multiplexer Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`emuxsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emuxsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EMUXSEL_SPEC; impl crate::RegisterSpec for EMUXSEL_SPEC { type Ux = u32; diff --git a/src/vadc/globbound.rs b/src/vadc/globbound.rs index 556af797..94700203 100644 --- a/src/vadc/globbound.rs +++ b/src/vadc/globbound.rs @@ -36,7 +36,7 @@ impl W { BOUNDARY1_W::new(self, 16) } } -#[doc = "Global Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globbound::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globbound::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Boundary Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globbound::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globbound::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBBOUND_SPEC; impl crate::RegisterSpec for GLOBBOUND_SPEC { type Ux = u32; diff --git a/src/vadc/globcfg.rs b/src/vadc/globcfg.rs index 2fcf9e07..3c718764 100644 --- a/src/vadc/globcfg.rs +++ b/src/vadc/globcfg.rs @@ -594,7 +594,7 @@ impl W { SUCAL_W::new(self, 31) } } -#[doc = "Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBCFG_SPEC; impl crate::RegisterSpec for GLOBCFG_SPEC { type Ux = u32; diff --git a/src/vadc/globeflag.rs b/src/vadc/globeflag.rs index 77ceb10a..258f9e3c 100644 --- a/src/vadc/globeflag.rs +++ b/src/vadc/globeflag.rs @@ -208,7 +208,7 @@ impl W { REVGLBCLR_W::new(self, 24) } } -#[doc = "Global Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globeflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globeflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globeflag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globeflag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBEFLAG_SPEC; impl crate::RegisterSpec for GLOBEFLAG_SPEC { type Ux = u32; diff --git a/src/vadc/globevnp.rs b/src/vadc/globevnp.rs index 1901fec0..f5cb453b 100644 --- a/src/vadc/globevnp.rs +++ b/src/vadc/globevnp.rs @@ -200,7 +200,7 @@ impl W { REV0NP_W::new(self, 16) } } -#[doc = "Global Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globevnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globevnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Event Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globevnp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globevnp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBEVNP_SPEC; impl crate::RegisterSpec for GLOBEVNP_SPEC { type Ux = u32; diff --git a/src/vadc/globiclass.rs b/src/vadc/globiclass.rs index 0868983c..e7300997 100644 --- a/src/vadc/globiclass.rs +++ b/src/vadc/globiclass.rs @@ -230,7 +230,7 @@ impl W { CME_W::new(self, 24) } } -#[doc = "Input Class Register, Global\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globiclass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globiclass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Class Register, Global\n\nYou can [`read`](crate::Reg::read) this register and get [`globiclass::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globiclass::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBICLASS_SPEC; impl crate::RegisterSpec for GLOBICLASS_SPEC { type Ux = u32; diff --git a/src/vadc/globrcr.rs b/src/vadc/globrcr.rs index ce6238b4..3b3e3388 100644 --- a/src/vadc/globrcr.rs +++ b/src/vadc/globrcr.rs @@ -192,7 +192,7 @@ impl W { SRGEN_W::new(self, 31) } } -#[doc = "Global Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Result Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globrcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globrcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBRCR_SPEC; impl crate::RegisterSpec for GLOBRCR_SPEC { type Ux = u32; diff --git a/src/vadc/globres.rs b/src/vadc/globres.rs index 31a59afb..019b9ee8 100644 --- a/src/vadc/globres.rs +++ b/src/vadc/globres.rs @@ -154,7 +154,7 @@ impl W { VF_W::new(self, 31) } } -#[doc = "Global Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globres::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globres::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Result Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globres::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globres::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct GLOBRES_SPEC; impl crate::RegisterSpec for GLOBRES_SPEC { type Ux = u32; diff --git a/src/vadc/globresd.rs b/src/vadc/globresd.rs index aaca9033..edfff83e 100644 --- a/src/vadc/globresd.rs +++ b/src/vadc/globresd.rs @@ -154,7 +154,7 @@ impl W { VF_W::new(self, 31) } } -#[doc = "Global Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globresd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globresd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Result Register, Debug\n\nYou can [`read`](crate::Reg::read) this register and get [`globresd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globresd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBRESD_SPEC; impl crate::RegisterSpec for GLOBRESD_SPEC { type Ux = u32; diff --git a/src/vadc/globtf.rs b/src/vadc/globtf.rs index 0666f634..9d8aacec 100644 --- a/src/vadc/globtf.rs +++ b/src/vadc/globtf.rs @@ -320,7 +320,7 @@ impl W { MDWC_W::new(self, 23) } } -#[doc = "Global Test Functions Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globtf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globtf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Global Test Functions Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globtf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globtf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct GLOBTF_SPEC; impl crate::RegisterSpec for GLOBTF_SPEC { type Ux = u32; diff --git a/src/vadc/id.rs b/src/vadc/id.rs index 2b461bda..51747b83 100644 --- a/src/vadc/id.rs +++ b/src/vadc/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/vadc/ocs.rs b/src/vadc/ocs.rs index 19e75fbd..f95037fd 100644 --- a/src/vadc/ocs.rs +++ b/src/vadc/ocs.rs @@ -295,7 +295,7 @@ impl W { SUS_P_W::new(self, 28) } } -#[doc = "OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "OCDS Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ocs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ocs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct OCS_SPEC; impl crate::RegisterSpec for OCS_SPEC { type Ux = u32; diff --git a/src/vadc_g0.rs b/src/vadc_g0.rs index 6844c1f1..673d1332 100644 --- a/src/vadc_g0.rs +++ b/src/vadc_g0.rs @@ -281,192 +281,192 @@ impl RegisterBlock { self.resd.iter() } } -#[doc = "ARBCFG (rw) register accessor: Arbitration Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbcfg`] +#[doc = "ARBCFG (rw) register accessor: Arbitration Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`arbcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arbcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbcfg`] module"] pub type ARBCFG = crate::Reg; #[doc = "Arbitration Configuration Register"] pub mod arbcfg; -#[doc = "ARBPR (rw) register accessor: Arbitration Priority Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbpr`] +#[doc = "ARBPR (rw) register accessor: Arbitration Priority Register\n\nYou can [`read`](crate::Reg::read) this register and get [`arbpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arbpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbpr`] module"] pub type ARBPR = crate::Reg; #[doc = "Arbitration Priority Register"] pub mod arbpr; -#[doc = "CHASS (rw) register accessor: Channel Assignment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chass`] +#[doc = "CHASS (rw) register accessor: Channel Assignment Register\n\nYou can [`read`](crate::Reg::read) this register and get [`chass::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chass::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chass`] module"] pub type CHASS = crate::Reg; #[doc = "Channel Assignment Register"] pub mod chass; -#[doc = "ICLASS (rw) register accessor: Input Class Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iclass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iclass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iclass`] +#[doc = "ICLASS (rw) register accessor: Input Class Register\n\nYou can [`read`](crate::Reg::read) this register and get [`iclass::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iclass::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iclass`] module"] pub type ICLASS = crate::Reg; #[doc = "Input Class Register"] pub mod iclass; -#[doc = "ALIAS (rw) register accessor: Alias Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alias::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alias::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alias`] +#[doc = "ALIAS (rw) register accessor: Alias Register\n\nYou can [`read`](crate::Reg::read) this register and get [`alias::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alias::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alias`] module"] pub type ALIAS = crate::Reg; #[doc = "Alias Register"] pub mod alias; -#[doc = "BOUND (rw) register accessor: Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bound::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bound::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bound`] +#[doc = "BOUND (rw) register accessor: Boundary Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bound::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bound::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bound`] module"] pub type BOUND = crate::Reg; #[doc = "Boundary Select Register"] pub mod bound; -#[doc = "SYNCTR (rw) register accessor: Synchronization Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synctr`] +#[doc = "SYNCTR (rw) register accessor: Synchronization Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synctr`] module"] pub type SYNCTR = crate::Reg; #[doc = "Synchronization Control Register"] pub mod synctr; -#[doc = "BFL (rw) register accessor: Boundary Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfl`] +#[doc = "BFL (rw) register accessor: Boundary Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bfl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfl`] module"] pub type BFL = crate::Reg; #[doc = "Boundary Flag Register"] pub mod bfl; -#[doc = "BFLS (w) register accessor: Boundary Flag Software Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfls`] +#[doc = "BFLS (w) register accessor: Boundary Flag Software Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfls`] module"] pub type BFLS = crate::Reg; #[doc = "Boundary Flag Software Register"] pub mod bfls; -#[doc = "BFLC (rw) register accessor: Boundary Flag Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflc`] +#[doc = "BFLC (rw) register accessor: Boundary Flag Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bflc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bflc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflc`] module"] pub type BFLC = crate::Reg; #[doc = "Boundary Flag Control Register"] pub mod bflc; -#[doc = "BFLNP (rw) register accessor: Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflnp`] +#[doc = "BFLNP (rw) register accessor: Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bflnp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bflnp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflnp`] module"] pub type BFLNP = crate::Reg; #[doc = "Boundary Flag Node Pointer Register"] pub mod bflnp; -#[doc = "QCTRL0 (rw) register accessor: Queue 0 Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qctrl0`] +#[doc = "QCTRL0 (rw) register accessor: Queue 0 Source Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qctrl0`] module"] pub type QCTRL0 = crate::Reg; #[doc = "Queue 0 Source Control Register"] pub mod qctrl0; -#[doc = "QMR0 (rw) register accessor: Queue 0 Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qmr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qmr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qmr0`] +#[doc = "QMR0 (rw) register accessor: Queue 0 Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qmr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qmr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qmr0`] module"] pub type QMR0 = crate::Reg; #[doc = "Queue 0 Mode Register"] pub mod qmr0; -#[doc = "QSR0 (r) register accessor: Queue 0 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qsr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qsr0`] +#[doc = "QSR0 (r) register accessor: Queue 0 Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qsr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qsr0`] module"] pub type QSR0 = crate::Reg; #[doc = "Queue 0 Status Register"] pub mod qsr0; -#[doc = "Q0R0 (r) register accessor: Queue 0 Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`q0r0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@q0r0`] +#[doc = "Q0R0 (r) register accessor: Queue 0 Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`q0r0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@q0r0`] module"] pub type Q0R0 = crate::Reg; #[doc = "Queue 0 Register 0"] pub mod q0r0; -#[doc = "QINR0 (w) register accessor: Queue 0 Input Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qinr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qinr0`] +#[doc = "QINR0 (w) register accessor: Queue 0 Input Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qinr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qinr0`] module"] pub type QINR0 = crate::Reg; #[doc = "Queue 0 Input Register"] pub mod qinr0; -#[doc = "QBUR0 (r) register accessor: Queue 0 Backup Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qbur0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qbur0`] +#[doc = "QBUR0 (r) register accessor: Queue 0 Backup Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qbur0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qbur0`] module"] pub type QBUR0 = crate::Reg; #[doc = "Queue 0 Backup Register"] pub mod qbur0; -#[doc = "ASCTRL (rw) register accessor: Autoscan Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asctrl`] +#[doc = "ASCTRL (rw) register accessor: Autoscan Source Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`asctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`asctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asctrl`] module"] pub type ASCTRL = crate::Reg; #[doc = "Autoscan Source Control Register"] pub mod asctrl; -#[doc = "ASMR (rw) register accessor: Autoscan Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asmr`] +#[doc = "ASMR (rw) register accessor: Autoscan Source Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`asmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`asmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asmr`] module"] pub type ASMR = crate::Reg; #[doc = "Autoscan Source Mode Register"] pub mod asmr; -#[doc = "ASSEL (rw) register accessor: Autoscan Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`assel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`assel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assel`] +#[doc = "ASSEL (rw) register accessor: Autoscan Source Channel Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`assel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`assel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assel`] module"] pub type ASSEL = crate::Reg; #[doc = "Autoscan Source Channel Select Register"] pub mod assel; -#[doc = "ASPND (rw) register accessor: Autoscan Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aspnd`] +#[doc = "ASPND (rw) register accessor: Autoscan Source Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`aspnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aspnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aspnd`] module"] pub type ASPND = crate::Reg; #[doc = "Autoscan Source Pending Register"] pub mod aspnd; -#[doc = "CEFLAG (rw) register accessor: Channel Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ceflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ceflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ceflag`] +#[doc = "CEFLAG (rw) register accessor: Channel Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ceflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ceflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ceflag`] module"] pub type CEFLAG = crate::Reg; #[doc = "Channel Event Flag Register"] pub mod ceflag; -#[doc = "REFLAG (rw) register accessor: Result Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reflag`] +#[doc = "REFLAG (rw) register accessor: Result Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reflag`] module"] pub type REFLAG = crate::Reg; #[doc = "Result Event Flag Register"] pub mod reflag; -#[doc = "SEFLAG (rw) register accessor: Source Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`seflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`seflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@seflag`] +#[doc = "SEFLAG (rw) register accessor: Source Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`seflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`seflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@seflag`] module"] pub type SEFLAG = crate::Reg; #[doc = "Source Event Flag Register"] pub mod seflag; -#[doc = "CEFCLR (w) register accessor: Channel Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cefclr`] +#[doc = "CEFCLR (w) register accessor: Channel Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cefclr`] module"] pub type CEFCLR = crate::Reg; #[doc = "Channel Event Flag Clear Register"] pub mod cefclr; -#[doc = "REFCLR (w) register accessor: Result Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refclr`] +#[doc = "REFCLR (w) register accessor: Result Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refclr`] module"] pub type REFCLR = crate::Reg; #[doc = "Result Event Flag Clear Register"] pub mod refclr; -#[doc = "SEFCLR (w) register accessor: Source Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sefclr`] +#[doc = "SEFCLR (w) register accessor: Source Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sefclr`] module"] pub type SEFCLR = crate::Reg; #[doc = "Source Event Flag Clear Register"] pub mod sefclr; -#[doc = "CEVNP0 (rw) register accessor: Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cevnp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cevnp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cevnp0`] +#[doc = "CEVNP0 (rw) register accessor: Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`cevnp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cevnp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cevnp0`] module"] pub type CEVNP0 = crate::Reg; #[doc = "Channel Event Node Pointer Register 0"] pub mod cevnp0; -#[doc = "REVNP0 (rw) register accessor: Result Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp0`] +#[doc = "REVNP0 (rw) register accessor: Result Event Node Pointer Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`revnp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`revnp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp0`] module"] pub type REVNP0 = crate::Reg; #[doc = "Result Event Node Pointer Register 0"] pub mod revnp0; -#[doc = "REVNP1 (rw) register accessor: Result Event Node Pointer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp1`] +#[doc = "REVNP1 (rw) register accessor: Result Event Node Pointer Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`revnp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`revnp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp1`] module"] pub type REVNP1 = crate::Reg; #[doc = "Result Event Node Pointer Register 1"] pub mod revnp1; -#[doc = "SEVNP (rw) register accessor: Source Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sevnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sevnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sevnp`] +#[doc = "SEVNP (rw) register accessor: Source Event Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sevnp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sevnp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sevnp`] module"] pub type SEVNP = crate::Reg; #[doc = "Source Event Node Pointer Register"] pub mod sevnp; -#[doc = "SRACT (w) register accessor: Service Request Software Activation Trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sract::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sract`] +#[doc = "SRACT (w) register accessor: Service Request Software Activation Trigger\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sract::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sract`] module"] pub type SRACT = crate::Reg; #[doc = "Service Request Software Activation Trigger"] pub mod sract; -#[doc = "EMUXCTR (rw) register accessor: E0ternal Multiplexer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxctr`] +#[doc = "EMUXCTR (rw) register accessor: E0ternal Multiplexer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`emuxctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emuxctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxctr`] module"] pub type EMUXCTR = crate::Reg; #[doc = "E0ternal Multiplexer Control Register"] pub mod emuxctr; -#[doc = "VFR (rw) register accessor: Valid Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vfr`] +#[doc = "VFR (rw) register accessor: Valid Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vfr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vfr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vfr`] module"] pub type VFR = crate::Reg; #[doc = "Valid Flag Register"] pub mod vfr; -#[doc = "CHCTR (rw) register accessor: Channel Ctrl. Reg.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chctr`] +#[doc = "CHCTR (rw) register accessor: Channel Ctrl. Reg.\n\nYou can [`read`](crate::Reg::read) this register and get [`chctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chctr`] module"] pub type CHCTR = crate::Reg; #[doc = "Channel Ctrl. Reg."] pub mod chctr; -#[doc = "RCR (rw) register accessor: Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rcr`] +#[doc = "RCR (rw) register accessor: Result Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rcr`] module"] pub type RCR = crate::Reg; #[doc = "Result Control Register"] pub mod rcr; -#[doc = "RES (rw) register accessor: Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`res::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res`] +#[doc = "RES (rw) register accessor: Result Register\n\nYou can [`read`](crate::Reg::read) this register and get [`res::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`res::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
\n\nFor information about available fields see [`mod@res`] module"] pub type RES = crate::Reg; #[doc = "Result Register"] pub mod res; -#[doc = "RESD (r) register accessor: Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resd`] +#[doc = "RESD (r) register accessor: Result Register, Debug\n\nYou can [`read`](crate::Reg::read) this register and get [`resd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resd`] module"] pub type RESD = crate::Reg; #[doc = "Result Register, Debug"] diff --git a/src/vadc_g0/alias.rs b/src/vadc_g0/alias.rs index 13fce7b5..3029b53d 100644 --- a/src/vadc_g0/alias.rs +++ b/src/vadc_g0/alias.rs @@ -36,7 +36,7 @@ impl W { ALIAS1_W::new(self, 8) } } -#[doc = "Alias Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alias::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alias::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Alias Register\n\nYou can [`read`](crate::Reg::read) this register and get [`alias::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alias::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ALIAS_SPEC; impl crate::RegisterSpec for ALIAS_SPEC { type Ux = u32; diff --git a/src/vadc_g0/arbcfg.rs b/src/vadc_g0/arbcfg.rs index 2cee9f1b..633b6356 100644 --- a/src/vadc_g0/arbcfg.rs +++ b/src/vadc_g0/arbcfg.rs @@ -352,7 +352,7 @@ impl W { ARBM_W::new(self, 7) } } -#[doc = "Arbitration Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Arbitration Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`arbcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arbcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ARBCFG_SPEC; impl crate::RegisterSpec for ARBCFG_SPEC { type Ux = u32; diff --git a/src/vadc_g0/arbpr.rs b/src/vadc_g0/arbpr.rs index 3284fcf1..fdb1c9ec 100644 --- a/src/vadc_g0/arbpr.rs +++ b/src/vadc_g0/arbpr.rs @@ -603,7 +603,7 @@ impl W { ASEN2_W::new(self, 26) } } -#[doc = "Arbitration Priority Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Arbitration Priority Register\n\nYou can [`read`](crate::Reg::read) this register and get [`arbpr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`arbpr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ARBPR_SPEC; impl crate::RegisterSpec for ARBPR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/asctrl.rs b/src/vadc_g0/asctrl.rs index 6897fe4e..a8c19c4f 100644 --- a/src/vadc_g0/asctrl.rs +++ b/src/vadc_g0/asctrl.rs @@ -406,7 +406,7 @@ impl W { TMWC_W::new(self, 31) } } -#[doc = "Autoscan Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Autoscan Source Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`asctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`asctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ASCTRL_SPEC; impl crate::RegisterSpec for ASCTRL_SPEC { type Ux = u32; diff --git a/src/vadc_g0/asmr.rs b/src/vadc_g0/asmr.rs index 00b81db4..0cd23894 100644 --- a/src/vadc_g0/asmr.rs +++ b/src/vadc_g0/asmr.rs @@ -538,7 +538,7 @@ impl W { RPTDIS_W::new(self, 16) } } -#[doc = "Autoscan Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asmr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Autoscan Source Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`asmr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`asmr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ASMR_SPEC; impl crate::RegisterSpec for ASMR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/aspnd.rs b/src/vadc_g0/aspnd.rs index f71933a2..1ac92e4f 100644 --- a/src/vadc_g0/aspnd.rs +++ b/src/vadc_g0/aspnd.rs @@ -518,7 +518,7 @@ impl W { CHPND7_W::new(self, 7) } } -#[doc = "Autoscan Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Autoscan Source Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`aspnd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aspnd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ASPND_SPEC; impl crate::RegisterSpec for ASPND_SPEC { type Ux = u32; diff --git a/src/vadc_g0/assel.rs b/src/vadc_g0/assel.rs index cb1f579f..d92af792 100644 --- a/src/vadc_g0/assel.rs +++ b/src/vadc_g0/assel.rs @@ -518,7 +518,7 @@ impl W { CHSEL7_W::new(self, 7) } } -#[doc = "Autoscan Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`assel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`assel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Autoscan Source Channel Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`assel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`assel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ASSEL_SPEC; impl crate::RegisterSpec for ASSEL_SPEC { type Ux = u32; diff --git a/src/vadc_g0/bfl.rs b/src/vadc_g0/bfl.rs index 5a4ae436..d793de95 100644 --- a/src/vadc_g0/bfl.rs +++ b/src/vadc_g0/bfl.rs @@ -682,7 +682,7 @@ impl W { BFI3_W::new(self, 19) } } -#[doc = "Boundary Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Boundary Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bfl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BFL_SPEC; impl crate::RegisterSpec for BFL_SPEC { type Ux = u32; diff --git a/src/vadc_g0/bflc.rs b/src/vadc_g0/bflc.rs index 570ea1e9..8037fe27 100644 --- a/src/vadc_g0/bflc.rs +++ b/src/vadc_g0/bflc.rs @@ -394,7 +394,7 @@ impl W { BFM3_W::new(self, 12) } } -#[doc = "Boundary Flag Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Boundary Flag Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bflc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bflc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BFLC_SPEC; impl crate::RegisterSpec for BFLC_SPEC { type Ux = u32; diff --git a/src/vadc_g0/bflnp.rs b/src/vadc_g0/bflnp.rs index 041dfe7c..2523f3dc 100644 --- a/src/vadc_g0/bflnp.rs +++ b/src/vadc_g0/bflnp.rs @@ -446,7 +446,7 @@ impl W { BFL3NP_W::new(self, 12) } } -#[doc = "Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bflnp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bflnp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BFLNP_SPEC; impl crate::RegisterSpec for BFLNP_SPEC { type Ux = u32; diff --git a/src/vadc_g0/bfls.rs b/src/vadc_g0/bfls.rs index 1cc70d08..fb781ac2 100644 --- a/src/vadc_g0/bfls.rs +++ b/src/vadc_g0/bfls.rs @@ -298,7 +298,7 @@ impl W { BFS3_W::new(self, 19) } } -#[doc = "Boundary Flag Software Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Boundary Flag Software Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BFLS_SPEC; impl crate::RegisterSpec for BFLS_SPEC { type Ux = u32; diff --git a/src/vadc_g0/bound.rs b/src/vadc_g0/bound.rs index 69473673..0bc27916 100644 --- a/src/vadc_g0/bound.rs +++ b/src/vadc_g0/bound.rs @@ -36,7 +36,7 @@ impl W { BOUNDARY1_W::new(self, 16) } } -#[doc = "Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bound::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bound::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Boundary Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bound::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bound::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct BOUND_SPEC; impl crate::RegisterSpec for BOUND_SPEC { type Ux = u32; diff --git a/src/vadc_g0/cefclr.rs b/src/vadc_g0/cefclr.rs index 57996efb..190a9eb6 100644 --- a/src/vadc_g0/cefclr.rs +++ b/src/vadc_g0/cefclr.rs @@ -298,7 +298,7 @@ impl W { CEV7_W::new(self, 7) } } -#[doc = "Channel Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CEFCLR_SPEC; impl crate::RegisterSpec for CEFCLR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/ceflag.rs b/src/vadc_g0/ceflag.rs index 561bdec9..7c50801a 100644 --- a/src/vadc_g0/ceflag.rs +++ b/src/vadc_g0/ceflag.rs @@ -518,7 +518,7 @@ impl W { CEV7_W::new(self, 7) } } -#[doc = "Channel Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ceflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ceflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ceflag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ceflag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CEFLAG_SPEC; impl crate::RegisterSpec for CEFLAG_SPEC { type Ux = u32; diff --git a/src/vadc_g0/cevnp0.rs b/src/vadc_g0/cevnp0.rs index ad81497c..aef85d3c 100644 --- a/src/vadc_g0/cevnp0.rs +++ b/src/vadc_g0/cevnp0.rs @@ -782,7 +782,7 @@ impl W { CEV7NP_W::new(self, 28) } } -#[doc = "Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cevnp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cevnp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`cevnp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cevnp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CEVNP0_SPEC; impl crate::RegisterSpec for CEVNP0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/chass.rs b/src/vadc_g0/chass.rs index c04ac4cf..21aca02a 100644 --- a/src/vadc_g0/chass.rs +++ b/src/vadc_g0/chass.rs @@ -518,7 +518,7 @@ impl W { ASSCH7_W::new(self, 7) } } -#[doc = "Channel Assignment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Assignment Register\n\nYou can [`read`](crate::Reg::read) this register and get [`chass::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chass::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CHASS_SPEC; impl crate::RegisterSpec for CHASS_SPEC { type Ux = u32; diff --git a/src/vadc_g0/chctr.rs b/src/vadc_g0/chctr.rs index 454eafbe..744f1fc8 100644 --- a/src/vadc_g0/chctr.rs +++ b/src/vadc_g0/chctr.rs @@ -856,7 +856,7 @@ impl W { BWDEN_W::new(self, 30) } } -#[doc = "Channel Ctrl. Reg.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Channel Ctrl. Reg.\n\nYou can [`read`](crate::Reg::read) this register and get [`chctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CHCTR_SPEC; impl crate::RegisterSpec for CHCTR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/emuxctr.rs b/src/vadc_g0/emuxctr.rs index 9e8f48f0..4bcfbdf5 100644 --- a/src/vadc_g0/emuxctr.rs +++ b/src/vadc_g0/emuxctr.rs @@ -346,7 +346,7 @@ impl W { EMXWC_W::new(self, 31) } } -#[doc = "E0ternal Multiplexer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "E0ternal Multiplexer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`emuxctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emuxctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct EMUXCTR_SPEC; impl crate::RegisterSpec for EMUXCTR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/iclass.rs b/src/vadc_g0/iclass.rs index 7bea0bcd..8dd2fd7a 100644 --- a/src/vadc_g0/iclass.rs +++ b/src/vadc_g0/iclass.rs @@ -230,7 +230,7 @@ impl W { CME_W::new(self, 24) } } -#[doc = "Input Class Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iclass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iclass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Input Class Register\n\nYou can [`read`](crate::Reg::read) this register and get [`iclass::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iclass::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ICLASS_SPEC; impl crate::RegisterSpec for ICLASS_SPEC { type Ux = u32; diff --git a/src/vadc_g0/q0r0.rs b/src/vadc_g0/q0r0.rs index 30645442..5d527f5f 100644 --- a/src/vadc_g0/q0r0.rs +++ b/src/vadc_g0/q0r0.rs @@ -173,7 +173,7 @@ impl R { V_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "Queue 0 Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`q0r0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Queue 0 Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`q0r0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct Q0R0_SPEC; impl crate::RegisterSpec for Q0R0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/qbur0.rs b/src/vadc_g0/qbur0.rs index da8968cb..1e318e02 100644 --- a/src/vadc_g0/qbur0.rs +++ b/src/vadc_g0/qbur0.rs @@ -71,7 +71,7 @@ impl R { V_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "Queue 0 Backup Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qbur0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Queue 0 Backup Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qbur0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct QBUR0_SPEC; impl crate::RegisterSpec for QBUR0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/qctrl0.rs b/src/vadc_g0/qctrl0.rs index e653d896..c50c4161 100644 --- a/src/vadc_g0/qctrl0.rs +++ b/src/vadc_g0/qctrl0.rs @@ -406,7 +406,7 @@ impl W { TMWC_W::new(self, 31) } } -#[doc = "Queue 0 Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Queue 0 Source Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qctrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qctrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct QCTRL0_SPEC; impl crate::RegisterSpec for QCTRL0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/qinr0.rs b/src/vadc_g0/qinr0.rs index 09f58f99..f9ddfb71 100644 --- a/src/vadc_g0/qinr0.rs +++ b/src/vadc_g0/qinr0.rs @@ -121,7 +121,7 @@ impl W { EXTR_W::new(self, 7) } } -#[doc = "Queue 0 Input Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qinr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Queue 0 Input Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qinr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct QINR0_SPEC; impl crate::RegisterSpec for QINR0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/qmr0.rs b/src/vadc_g0/qmr0.rs index b0217d66..2ae9b3bd 100644 --- a/src/vadc_g0/qmr0.rs +++ b/src/vadc_g0/qmr0.rs @@ -379,7 +379,7 @@ impl W { RPTDIS_W::new(self, 16) } } -#[doc = "Queue 0 Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qmr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qmr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Queue 0 Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qmr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qmr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct QMR0_SPEC; impl crate::RegisterSpec for QMR0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/qsr0.rs b/src/vadc_g0/qsr0.rs index 09257d8f..df2c7648 100644 --- a/src/vadc_g0/qsr0.rs +++ b/src/vadc_g0/qsr0.rs @@ -188,7 +188,7 @@ impl R { EV_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "Queue 0 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qsr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Queue 0 Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`qsr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct QSR0_SPEC; impl crate::RegisterSpec for QSR0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/rcr.rs b/src/vadc_g0/rcr.rs index 0203d217..c9145fd5 100644 --- a/src/vadc_g0/rcr.rs +++ b/src/vadc_g0/rcr.rs @@ -304,7 +304,7 @@ impl W { SRGEN_W::new(self, 31) } } -#[doc = "Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RCR_SPEC; impl crate::RegisterSpec for RCR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/refclr.rs b/src/vadc_g0/refclr.rs index 5687ad2e..db8e1dc8 100644 --- a/src/vadc_g0/refclr.rs +++ b/src/vadc_g0/refclr.rs @@ -594,7 +594,7 @@ impl W { REV15_W::new(self, 15) } } -#[doc = "Result Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct REFCLR_SPEC; impl crate::RegisterSpec for REFCLR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/reflag.rs b/src/vadc_g0/reflag.rs index eddab221..6ad27888 100644 --- a/src/vadc_g0/reflag.rs +++ b/src/vadc_g0/reflag.rs @@ -1030,7 +1030,7 @@ impl W { REV15_W::new(self, 15) } } -#[doc = "Result Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reflag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reflag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct REFLAG_SPEC; impl crate::RegisterSpec for REFLAG_SPEC { type Ux = u32; diff --git a/src/vadc_g0/res.rs b/src/vadc_g0/res.rs index 31e2a22f..f2aedcf7 100644 --- a/src/vadc_g0/res.rs +++ b/src/vadc_g0/res.rs @@ -179,7 +179,7 @@ impl W { RESULT_W::new(self, 0) } } -#[doc = "Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`res::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Register\n\nYou can [`read`](crate::Reg::read) this register and get [`res::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`res::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n
One or more dependent resources other than the current register are immediately affected by a read operation.
"] pub struct RES_SPEC; impl crate::RegisterSpec for RES_SPEC { type Ux = u32; diff --git a/src/vadc_g0/resd.rs b/src/vadc_g0/resd.rs index 4aad761d..66cdb948 100644 --- a/src/vadc_g0/resd.rs +++ b/src/vadc_g0/resd.rs @@ -167,7 +167,7 @@ impl R { VF_R::new(((self.bits >> 31) & 1) != 0) } } -#[doc = "Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Register, Debug\n\nYou can [`read`](crate::Reg::read) this register and get [`resd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RESD_SPEC; impl crate::RegisterSpec for RESD_SPEC { type Ux = u32; diff --git a/src/vadc_g0/revnp0.rs b/src/vadc_g0/revnp0.rs index f8a592e7..9a094113 100644 --- a/src/vadc_g0/revnp0.rs +++ b/src/vadc_g0/revnp0.rs @@ -782,7 +782,7 @@ impl W { REV7NP_W::new(self, 28) } } -#[doc = "Result Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Event Node Pointer Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`revnp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`revnp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct REVNP0_SPEC; impl crate::RegisterSpec for REVNP0_SPEC { type Ux = u32; diff --git a/src/vadc_g0/revnp1.rs b/src/vadc_g0/revnp1.rs index 5e2593fa..2c75b2b9 100644 --- a/src/vadc_g0/revnp1.rs +++ b/src/vadc_g0/revnp1.rs @@ -782,7 +782,7 @@ impl W { REV15NP_W::new(self, 28) } } -#[doc = "Result Event Node Pointer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Result Event Node Pointer Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`revnp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`revnp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct REVNP1_SPEC; impl crate::RegisterSpec for REVNP1_SPEC { type Ux = u32; diff --git a/src/vadc_g0/sefclr.rs b/src/vadc_g0/sefclr.rs index a4b15a0e..200e14df 100644 --- a/src/vadc_g0/sefclr.rs +++ b/src/vadc_g0/sefclr.rs @@ -76,7 +76,7 @@ impl W { SEV1_W::new(self, 1) } } -#[doc = "Source Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SEFCLR_SPEC; impl crate::RegisterSpec for SEFCLR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/seflag.rs b/src/vadc_g0/seflag.rs index 47ee0890..3b080447 100644 --- a/src/vadc_g0/seflag.rs +++ b/src/vadc_g0/seflag.rs @@ -134,7 +134,7 @@ impl W { SEV1_W::new(self, 1) } } -#[doc = "Source Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`seflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`seflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Event Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`seflag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`seflag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SEFLAG_SPEC; impl crate::RegisterSpec for SEFLAG_SPEC { type Ux = u32; diff --git a/src/vadc_g0/sevnp.rs b/src/vadc_g0/sevnp.rs index 273b2815..8306dff0 100644 --- a/src/vadc_g0/sevnp.rs +++ b/src/vadc_g0/sevnp.rs @@ -200,7 +200,7 @@ impl W { SEV1NP_W::new(self, 4) } } -#[doc = "Source Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sevnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sevnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Source Event Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sevnp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sevnp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SEVNP_SPEC; impl crate::RegisterSpec for SEVNP_SPEC { type Ux = u32; diff --git a/src/vadc_g0/sract.rs b/src/vadc_g0/sract.rs index ea7f518e..e2f077b6 100644 --- a/src/vadc_g0/sract.rs +++ b/src/vadc_g0/sract.rs @@ -298,7 +298,7 @@ impl W { ASSR3_W::new(self, 11) } } -#[doc = "Service Request Software Activation Trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sract::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Service Request Software Activation Trigger\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sract::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRACT_SPEC; impl crate::RegisterSpec for SRACT_SPEC { type Ux = u32; diff --git a/src/vadc_g0/synctr.rs b/src/vadc_g0/synctr.rs index c6c76ceb..6762b273 100644 --- a/src/vadc_g0/synctr.rs +++ b/src/vadc_g0/synctr.rs @@ -295,7 +295,7 @@ impl W { EVALR3_W::new(self, 6) } } -#[doc = "Synchronization Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Synchronization Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SYNCTR_SPEC; impl crate::RegisterSpec for SYNCTR_SPEC { type Ux = u32; diff --git a/src/vadc_g0/vfr.rs b/src/vadc_g0/vfr.rs index 6c70df98..6b8d00e5 100644 --- a/src/vadc_g0/vfr.rs +++ b/src/vadc_g0/vfr.rs @@ -1030,7 +1030,7 @@ impl W { VF15_W::new(self, 15) } } -#[doc = "Valid Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Valid Flag Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vfr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vfr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct VFR_SPEC; impl crate::RegisterSpec for VFR_SPEC { type Ux = u32; diff --git a/src/wdt.rs b/src/wdt.rs index 6e0a7382..d2ce406f 100644 --- a/src/wdt.rs +++ b/src/wdt.rs @@ -52,42 +52,42 @@ impl RegisterBlock { &self.wdtclr } } -#[doc = "ID (r) register accessor: WDT ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] +#[doc = "ID (r) register accessor: WDT ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] pub type ID = crate::Reg; #[doc = "WDT ID Register"] pub mod id; -#[doc = "CTR (rw) register accessor: WDT Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] +#[doc = "CTR (rw) register accessor: WDT Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] pub type CTR = crate::Reg; #[doc = "WDT Control Register"] pub mod ctr; -#[doc = "SRV (w) register accessor: WDT Service Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srv::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srv`] +#[doc = "SRV (w) register accessor: WDT Service Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srv::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srv`] module"] pub type SRV = crate::Reg; #[doc = "WDT Service Register"] pub mod srv; -#[doc = "TIM (r) register accessor: WDT Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim`] +#[doc = "TIM (r) register accessor: WDT Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tim::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim`] module"] pub type TIM = crate::Reg; #[doc = "WDT Timer Register"] pub mod tim; -#[doc = "WLB (rw) register accessor: WDT Window Lower Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wlb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wlb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wlb`] +#[doc = "WLB (rw) register accessor: WDT Window Lower Bound Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wlb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wlb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wlb`] module"] pub type WLB = crate::Reg; #[doc = "WDT Window Lower Bound Register"] pub mod wlb; -#[doc = "WUB (rw) register accessor: WDT Window Upper Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wub::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wub::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wub`] +#[doc = "WUB (rw) register accessor: WDT Window Upper Bound Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wub::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wub::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wub`] module"] pub type WUB = crate::Reg; #[doc = "WDT Window Upper Bound Register"] pub mod wub; -#[doc = "WDTSTS (r) register accessor: WDT Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtsts`] +#[doc = "WDTSTS (r) register accessor: WDT Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdtsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtsts`] module"] pub type WDTSTS = crate::Reg; #[doc = "WDT Status Register"] pub mod wdtsts; -#[doc = "WDTCLR (w) register accessor: WDT Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclr`] +#[doc = "WDTCLR (w) register accessor: WDT Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdtclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclr`] module"] pub type WDTCLR = crate::Reg; #[doc = "WDT Clear Register"] diff --git a/src/wdt/ctr.rs b/src/wdt/ctr.rs index 22dd3335..55d830dd 100644 --- a/src/wdt/ctr.rs +++ b/src/wdt/ctr.rs @@ -66,7 +66,7 @@ impl W { SPW_W::new(self, 8) } } -#[doc = "WDT Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CTR_SPEC; impl crate::RegisterSpec for CTR_SPEC { type Ux = u32; diff --git a/src/wdt/id.rs b/src/wdt/id.rs index aff37fe6..9822bab7 100644 --- a/src/wdt/id.rs +++ b/src/wdt/id.rs @@ -23,7 +23,7 @@ impl R { MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } -#[doc = "WDT ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; diff --git a/src/wdt/srv.rs b/src/wdt/srv.rs index abc4d917..c462cc9d 100644 --- a/src/wdt/srv.rs +++ b/src/wdt/srv.rs @@ -10,7 +10,7 @@ impl W { SRV_W::new(self, 0) } } -#[doc = "WDT Service Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srv::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Service Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`srv::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct SRV_SPEC; impl crate::RegisterSpec for SRV_SPEC { type Ux = u32; diff --git a/src/wdt/tim.rs b/src/wdt/tim.rs index 1c2e5b06..bcb11a1a 100644 --- a/src/wdt/tim.rs +++ b/src/wdt/tim.rs @@ -9,7 +9,7 @@ impl R { TIM_R::new(self.bits) } } -#[doc = "WDT Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tim::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TIM_SPEC; impl crate::RegisterSpec for TIM_SPEC { type Ux = u32; diff --git a/src/wdt/wdtclr.rs b/src/wdt/wdtclr.rs index ab1c5fdf..47272913 100644 --- a/src/wdt/wdtclr.rs +++ b/src/wdt/wdtclr.rs @@ -10,7 +10,7 @@ impl W { ALMC_W::new(self, 0) } } -#[doc = "WDT Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdtclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct WDTCLR_SPEC; impl crate::RegisterSpec for WDTCLR_SPEC { type Ux = u32; diff --git a/src/wdt/wdtsts.rs b/src/wdt/wdtsts.rs index 99190fa2..3ffdb54f 100644 --- a/src/wdt/wdtsts.rs +++ b/src/wdt/wdtsts.rs @@ -9,7 +9,7 @@ impl R { ALMS_R::new((self.bits & 1) != 0) } } -#[doc = "WDT Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdtsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct WDTSTS_SPEC; impl crate::RegisterSpec for WDTSTS_SPEC { type Ux = u32; diff --git a/src/wdt/wlb.rs b/src/wdt/wlb.rs index c41a332e..6a98f715 100644 --- a/src/wdt/wlb.rs +++ b/src/wdt/wlb.rs @@ -21,7 +21,7 @@ impl W { WLB_W::new(self, 0) } } -#[doc = "WDT Window Lower Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wlb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wlb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Window Lower Bound Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wlb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wlb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct WLB_SPEC; impl crate::RegisterSpec for WLB_SPEC { type Ux = u32; diff --git a/src/wdt/wub.rs b/src/wdt/wub.rs index 0d4006a3..093eb369 100644 --- a/src/wdt/wub.rs +++ b/src/wdt/wub.rs @@ -21,7 +21,7 @@ impl W { WUB_W::new(self, 0) } } -#[doc = "WDT Window Upper Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wub::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wub::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "WDT Window Upper Bound Register\n\nYou can [`read`](crate::Reg::read) this register and get [`wub::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wub::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct WUB_SPEC; impl crate::RegisterSpec for WUB_SPEC { type Ux = u32;