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The Environmental Footprint of IC Production: Review, Analysis, and Lessons From Historical Trends

Thibault Pirson , Graduate Student Member, IEEE , Thibault P. Delhaye , Alex G. Pip, GrØgoire Le Brun, Jean-Pierre Raskin , Fellow, IEEE , and David Bol , Senior Member, IEEE

Abstract -Given the ubiquity of electronic devices and the urgent need to decrease our footprint in the context of global warming and planetary boundaries, it becomes critical to better quantify the environmental impacts of integrated circuit (IC) production. Our work addresses this question in three successive steps. First, we carry out a review of the data available since 2010 from four different literature categories, i.e., foundry reports, industry roadmaps, scientific literature, and life-cycle assessment databases. Then, we leverage the 27 identified sources to perform both a qualitative and quantitative analysis. We propose 10 features for characterizing the scope of studies while focusing on environmental indicators normalized per cm$^{2}$, i.e., energy consumption, carbon footprint and water consumption. The analysis results highlight a clear increasing trend of the environmental footprint with CMOS technology downscaling below 0.13 µ m, despite a significant variation between the sources mainly due to scope mismatch. Finally, we show that environmental impacts per cm 2 did not significantly decrease compared to historical values from 1980-2010, whereas the total silicon area produced keeps on increasing by 3.6%/year. Consequently, this work calls for urgently rethinking the road ahead with sobriety to effectively decrease the absolute environmental footprint of the IC production sub-sector.

Index Terms -Life-cycle assessment (LCA), sustainability, cradle-to-gate, integrated circuits (IC), semiconductors, sobriety, roadmap.

I. INTRODUCTION

I NTEGRATED circuits (ICs) are key building blocks of information and communication technologies (ICTs) which support digital products and services. Due to the increasing pervasiveness of electronic devices in our societies and the

Manuscript received 18 July 2022; revised 13 October 2022, 10 November 2022, 28 November 2022, and 2 December 2022; accepted 7 December 2022. Date of publication 9 December 2022; date of current version 3 February 2023. This work was supported by the Fonds europØen de dØveloppement rØgional (FEDER) and the Wallonia within the Wallonie-2020.EU Program. The work of Thibault P. Delhaye, Alex G. Pip, and GrØgoire Le Brun was supported by the Fonds pour la formation à la Recherche dans l'Industrie et dans l'Agriculture (FRIA) through the Fonds de la Recherche Scientifique-FNRS. (Corresponding author: Thibault Pirson.)

Thibault Pirson, Thibault P. Delhaye, GrØgoire Le Brun, Jean-Pierre Raskin, and David Bol are with the ICTEAM Institute, UniversitØ catholique de Louvain, 1348 Louvain-la-Neuve, Belgium (e-mail: thibault.pirson@ uclouvain.be; [email protected]).

Alex G. Pip is with the ICTEAM Institute and the IMMC Institute, UniversitØ catholique de Louvain, 1348 Louvain-la-Neuve, Belgium.

This article has supplementary material provided by the authors and color versions of one or more figures available at https://doi.org/10.1109/TSM.2022.3228311.

Digital Object Identifier 10.1109/TSM.2022.3228311

Fig. 1. Example of the important variation regarding the embodied carbon footprint of ICs in existing LCA of smartphones, adapted from [4]. The present study focuses on the variation of impact factors for IC production.

very low re-usability of these components, the worldwide production of ICs is continuously growing, together with the high investments in this sector [1]. Indeed, a massive amount of electronic devices are expected to reach the market in the near future, especially with the current trends pushing towards the Internet-of-Things (IoT), distributed artificial intelligence (IA) for edge applications or the use of cloud computing. The carbon footprint of ICT was evaluated at about 12002200 MtCO$_{2}$ eq in 2020, or equivalently 2.1%-3.9% of the world greenhouse gas (GHG) emissions [2]. A significant part of this footprint, i.e., between 360 and 660 MtCO$_{2}$ eq [2], is attributed to the production phase. More specifically, the production of ICs is known to be responsible for an important share of cradle-to-gate impacts [3], [4], [5], [6], [7], [8], [9], therefore justifying special attention. Indeed, even though the size of ICs is usually very small, their production is known to be very intensive in terms of raw materials, chemicals and energy due to the complex processes involved [10], [11]. However, the current global warming situation and the strong loss of biodiversity call all economic sectors and human activities to quickly decrease their environmental footprint [12], [13]. Consequently, it becomes critical to better evaluate the environmental impacts of IC production while going beyond the carbon footprint.

To support this evaluation over multiple environmental indicators, a standardized methodology known as life-cycle assessment (LCA) [14] is generally used. In fact, LCA has been used for semiconductors for the last decades and several pioneer works have assessed the impacts of specific IC electronic components [8], [11], [15], [16], [17], [18], [19], [20] and ICT devices [3], [4], [21], [22], [23], [24], [25]. Unfortunately, the

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TABLE I

GENERAL STRUCTURE OF THIS WORK:ADDRESSING THE ENVIRONMENTAL IMPACTS OF IC PRODUCTION IN THREE SUCCESSIVE STEPS

impacts related to the production phase are usually out of reach for people outside of semiconductor foundries [4], [8], [20]. This strong limitation partially explains the important lack of up-to-date data used to model the environmental impacts of semiconductors, which is reinforced by confidentiality barriers due to intellectual properties [20], the increasing complexity of advanced technologies [19], [20], [26], and the rapid innovation cycles in the nanoelectronic sector [6], [15] as captured by the emblematic Moore's Law. These fundamental limitations have been known for years in the field of LCA for semiconductors [4], [6], [11], [20], [25], [27] and introduce significant variations in the environmental impact modeling of ICs, leading to uncertainty in the impact factors used to generate LCA results [4], [6], as depicted in Fig. 1.T h i s leads to gaps between models and reality. In particular, it is not clear how CMOS technology downscaling modifies the environmental impacts of IC production. Without a proper understanding of these impacts, it will be difficult for LCA practitioners to come up with representative results and for policy-makers to define environmental-aware roadmaps and policies. The lack of environmental considerations can be seen [28], for instance, in the early version of the Chips Act announced by the European Union which projects more than 43 billion euros of investments up to 2030 [29].

In this work, we extend the preliminary study carried out in [30] and we address the environmental impacts of IC production in three successive steps, as detailed in Table I. First, we carry out a review of the literature to provide an extensive overview of the data available regarding the environmental impacts of IC production. We focus on three environmental indicators while going well beyond scientific literature. Then, we leverage this literature review to perform an analysis on both qualitative and quantitative aspects with the identified sources. This reveals the effect of technology downscaling on the environmental impacts per cm 2 and the significant variation introduced by the mismatch of scopes between sources, which brings key insights for future LCAs of ICT devices. Finally, we put these results in perspectives with historical data from the foundries for the period 1980-2010 to reveal the limits of further improving the environmental indicators per cm 2 and thus, the limit of CMOS technology downscaling in being an effective solution for environmental sustainability, if not combined with sobriety. All data and specific assumptions used in this study are provided as supplementary material and are meant to be used for further work.

presents and interprets the results, which mainly highlight the mismatch of scopes and the environmental impacts of pursuing advanced technology downscaling. Then, Section IV provides historical trends regarding the environmental impacts of IC production. Finally, Section V highlights the main conclusions.

II. M ETHODOLOGY

This section starts by providing details about the literature review carried out to identify key sources from four literature categories. Then, the methodology used for the qualitative and quantitative analysis is presented.

A. Identifying Key Sources From Four Literature Categories

In order to cover a wide range of data while avoiding field-related biases, four different literature categories are considered, i.e., foundry reports, semiconductor industry roadmaps, scientific literature, and commercial state-of-the-art LCA databases.

Foundries have to annually report their environmental performance in corporate sustainability responsibility (CSR) reports which ensure a systematic source of information. Nevertheless, the value chain involved in the creation of an IC gathers a wide range of actors such as integrated device manufacturers (IDMs), fabless firms, and pure-play foundries [31], while assembly and testing are often outsourced. We focus on CSR reports of pure-play foundries as they only manufacture ICs, without having any in-house design capabilities or side-activity that could interfere with the reported data. Four pure-play foundries are considered in this study, i.e., Taiwan Semiconductor Manufacturing Company (TSMC), United Microelectronics Corporation (UMC), Semiconductor Manufacturing International Corporation (SMIC), and GlobalFoundries (GF). We also include the IDM STMicroelectronics (STmicro) because they provide data in their CSR reports that can be directly related to their own production unit and IC fabrication capacity.

Roadmaps provide targets rather than actual data from on-site measurements [16], [26], [32]. The most iconic example is the International Technology Roadmap for Semiconductors (ITRS), renamed International Roadmap for Devices and Systems (IRDS) in 2016. These roadmaps are published by a group of industry experts from Europe, Japan, Taiwan, the United States of America and Korea. They include a specific chapter on environment, safety and health (ESH). Apart from the ITRS roadmaps, we found no other roadmap disclosing environmental quantitative targets.

The paper is structured as follows. Section II outlines the methodology used for the review and the analysis. Section III Apart from the ITRS roadmaps, we found no other roadmap disclosing environmental quantitative targets.

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Scientific literature is an important source of data as several peer-reviewed studies have been carried out over the last 20 years. Yet, due to the nature of scientific publication, it does not benefit from regular updates. The selection of scientific studies was conducted through a systematic literature review, backed-up by the authors' previous knowledge in the field of LCA for semiconductors. The following keywords have been used in Google Scholar: semiconductor, life cycle assessment, footprint, environmental impacts, production, integrated circuits, logic, memory, electronics, CMOS and manufacturing. More than 90 studies were analyzed but only studies disclosing quantitative values of environmental footprint related to ICs production have been considered. Let us mention that we also included three relevant non peer-reviewed reports in this literature category [33], [34], [35]. 66 studies were out of scope and 27 studies were selected for deeper analysis. Over the 27 key scientific studies identified, 18 are used for the quantitative analysis (data published after 2010) and 9 are used for historical data (data published between 1980 and 2010), as shown in Table I. More details regarding the selection of the studies are provided in the supplementary material.

Databases from LCA tools provide specific data and usually benefit from regular updates. Three commercial state-of-theart LCA databases are considered in this study because they are widely used among all the tools and databases available for semiconductors [4], [36], i.e., GaBi from Sphera, EIME from Bureau Veritas, and ecoinvent.

B. Environmental Indicators

Among these four literature categories, we include only sources providing quantitative data for at least one of the three following environmental indicators: energy consumption, global warming potential (GWP), and water consumption (Water). Even though these indicators do not provide a comprehensive picture of all environmental impacts [6], they already cover important aspects of the ecological footprint. In addition, they are the ones usually reported in the different literature categories [25], which makes the analysis possible.

Regarding the energy consumption, primary energy demand (PED) is used rather than final energy consumption for two key reasons. First, primary energy expressed in MJ is a well-known indicator used by the LCA community. Second, it accounts for the conversion and transmission efficiency of electricity generation [37], which would not be possible if considering only final energy consumption. A primary energy factor (PEF) of 2.5 was considered in this study.

Global warming potential is caused by GHG emissions which are quantified as kgCO$_{2}$-equivalent (kgCO$_{2}$ eq). They represents the concentration of carbon dioxide that would cause the same radiative forcing as a given mixture of CO$_{2}$ and other forcing components [38]. The GHG Protocol [39] distinguishes three scopes of emissions in order to standardize the reporting of the carbon footprint in organizations.

Regarding water consumption , it is not always possible to distinguish between water and ultra-pure water (UPW), although water is generally purified into UPW on-site [26] as a very low level of contaminants must be reached [18]. In general, very few details are given regarding the nature of the water, i.e., intake, recycled, reclaimed or reused. In the

absence of any more reliable information, water consumption is assumed to be the sum of total intake water and recycled water to express the total need of water for the IC production, expressed in liters (L).

C. Normalization by Area

Choosing the most appropriate functional unit and metrics to characterize the environmental impacts of IC production still remains an open question, especially because semiconductor manufacturing is a fast-evolving sector [10], [11]. In this study, we normalize all environmental indicators by the silicon die area in cm$^{2}$, as done in [11] and [19]. This is also supported by the presence of area in roadmaps and in the well-known power-performance-area-cost (PPAC) metrics in CMOS process development and optimization [19], [32]. Finally, the normalization per area has also an additional advantage: the total area of wafers produced over one year by a foundry is easier to obtain than the total weight or total number of transistors. This facilitates the inclusion of foundries and the consideration of macroscopic IC production volumes.

Yet, the normalization could also be done with respect to the number of transistors or with respect to the weight of the IC [4], [16], [22], [25], [33]. Normalizing via functionality (i.e., per transistor) versus typical product (i.e., per typical IC) yields different results, as shown by Deng and Williams [10]. Yet, they also showed that environmental assessments of information technology goods may be more temporally robust than the rapid progress in the industry would lead one to think [10], therefore supporting a normalization by typical product (e.g., a microprocessor, an image sensor, or a DRAM memory) rather than by functionality. Regarding the normalization by weight, it is commonly accepted that it is less relevant for ICs footprint, mainly because of the very low share of the die compared to the package [16].

D. Defining 10 Objective Features for Characterizing the Scope of IC Production LCAs

Even if all the studies' results are brought back to a common functional unit, another important challenge remains: the concordance of scopes between sources. Indeed, this is a wellknown concern for LCA practitioners, especially when several categories of sources are considered, as it is the case in this study. The mismatch in scopes introduces variations in the results and complicates the comparison [4]. Consequently, a transparent methodology is critical to compare all sources and ensure reliable conclusions in the identification of gaps and similarities. To this end, we define 10 features for characterizing the scope of IC production LCAs, as presented in Table II. These features are then used for the qualitative analysis.

III. R ESULTS

This section presents and interprets the core results of this study. First, we highlight the important scope mismatch between sources and then, we show the effect of technology downscaling on the environmental impacts of IC production.

A. Revealing the Scope Mismatch Through 10 Features

In general, very few details are given regarding the nature of the water, i.e., intake, recycled, reclaimed or reused. In the Table III shows the classification of all sources with respect to the 10 proposed features. This qualitative analysis clearly Authorized licensed use limited to: CLARKSON UNIVERSITY LIBRARY. Downloaded on August 15,2024 at 22:26:17 UTC from IEEE Xplore. Restrictions apply.

TABLE II DEFINING 10 OBJECTIVE FEATURES FOR CHARACTERIZING THE SCOPE OF IC PRODUCTION LCAS

shows the mismatch existing between the considered sources, revealing the complexity of properly harmonizing them. Indeed, mismatch exists among both the scopes and the LCA approaches. Due to the general lack of information across the 10 features, we decided not to perform such an harmonization between the sources to avoid introducing an additional variation. Indeed, several assumptions were already needed to get all sources back to the same functional unit. All these assumptions are provided as supplementary material.

Table III highlights that the values reported by the industry are macroscopic values obtained with a top-down approach. This high level of aggregation is reflected in several features that are not differentiated despite their heterogeneity, e.g., technology type, technology node, wafer size and energy mix. For instance, the annual share of technology nodes in the production volumes is rarely disclosed by foundries. Moreover, it is not clear if yields are included, suggesting that values should

be considered as a lower bound. Finally, as the majority of sources in Table III, the scope is usually limited to the FE as it concentrates most of the activities and the highest number of process steps, at least for conventional nodes.

The industry roadmaps indicate environmental targets per cm 2 of wafer out, suggesting that total yields are not included [51] nor BE environmental impacts.

Regarding the scientific literature, Table III shows that most studies are based on secondary data. The limited access to foundries compels authors to use data from databases or from already published works. This significantly increases dependencies and potential biases, which is an important limitation as it prevents an up-to-date picture of the actual environmental impacts. Dependencies identification reveals that the pioneering work of Boyd [11] has a strong influence on the rest of the literature. Although this work is of high interest, it also depends on data from Krishnan et al. [15], which is

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TABLE III

STREAMLINED CLASSIFICATION OF ALL DATA SOURCES CONSIDERED IN THIS STUDY,ACCORDING TO THE 10 FEATURES DEFINED IN TABLE II

most likely no longer representative of current environmental impacts. In general, scientific literature is more transparent than other types of sources due to peer-reviewing and scientific approach, fostering in-depth details for the results and methodology. Scientific literature is also more prone to widen the scope of study. For instance, efforts were done to include the BE steps [3], [33], [51] which are estimated to contribute from 25 to 37% of the total energy consumption [51].

LCA databases combine interesting features from the other sources types, e.g., transparency, specific technology nodes and a range of environmental indicators. Even though they are based on both primary and secondary data, they usually document their data.

Across all the sources considered in this study, upstream materials are most often overlooked even though scientific literature highlighted their strong contribution in the final results [11]. Similarly, process details are usually scarcely detailed or simply not provided. This is undoubtedly related to aforementioned

limitations, i.e., the great complexity of the semiconductor manufacturing processes and the data privacy concerns. If we focus on the technology node feature, the qualitative analysis suggests two clusters. On one side, the scientific literature and LCA databases allow for a node-wise analysis while on the other side, foundry reports and industry roadmaps provides node-aggregated temporal trends. These two clusters cannot be directly compared to each other, but they both bring useful insights to better understand the environmental impacts of IC production from different yet complementary perspectives, as explained in the following sections.

B. The Effect of Technology Downscaling on the Environmental Impacts of IC Production

The distinction between technology types and nodes is generally performed in the scientific literature and in the LCA databases as illustrated in Table III, because they aim at Authorized licensed use limited to: CLARKSON UNIVERSITY LIBRARY. Downloaded on August 15,2024 at 22:26:17 UTC from IEEE Xplore. Restrictions apply.

Fig. 2. Node-wise trends based on data from the scientific literature and the LCA databases. This shows the environmental impacts per cm 2 with respect to (a) PED, (b) GWP, and (c) water consumption.

providing detailed datasets for LCA practitioners. We leverage this in order to highlight the effect of technology downscaling on the environmental impacts of IC production, as illustrated in Figs. 2(a) to (c).

If we first focus on the scientific literature, two leading sources of data cover technology nodes ranging from 0.25 µ m down to 3 nm, i.e., respectively Boyd [11] and Bardon et al. [19]. Even though they do not cover the same technology nodes, the large gap between these studies is mainly echoed in their different scopes and approach. While Boyd's study is intended to be cradle-to-gate LCA (including

impacts related to the production of upstream materials such as raw materials, gazes, etc.), Bardon's study is a gate-to-gate LCA. Although, the impacts of upstream materials for semiconductor grade remain largely unclear [20], it could explain in part the lower values obtained by Bardon together with the use of a bottom-up assessment method. The analysis for Figs. 2(a) and (b) is very similar. While Boyd's data shows an improvement in normalized PED with downsizing technology up to 0.13 µ m, followed by an increase up to 32 nm, Bardon's study confirms the ascending trend on the last nodes from 28 nm down to 3 nm. Bardon makes clear that the accelerated increase in energy consumption is due to the growing number of interconnect layers in the BEOL, together with lithography, extreme ultra-violet (EUV), etching steps and low throughput process steps [19]. Similarly, Boyd also pointed out the "lengthening of the manufacturing process flow and concomitant expansion in manufacturing infrastructure and equipment" as a reason for the increase of environmental impacts per wafer [11]. Figs. 2(a) and (b) also reveal that the 'mix' values fall in a range similar to other more detailed sources, even though in practice their use is of limited interest as technology node is not clearly stated. The gap observed between Boyd's work and the other sources is greater for water than for PED and GWP, as illustrated in Fig. 2(c). This could be explained by the fact that Boyd did not consider the revalorization of water (and UPW) through recycling, reuse or reclaim. We also acknowledge that less data are available for the water indicator, compared to PED and GWP.

If we then focus on LCA databases, a similar upward trend is observed for advanced nodes for both EIME and GaBi data. As already pointed out in the literature [4], ecoinvent provides significantly higher values than other databases for IC production. Ecoinvent is thus probably not the best suited for IC environmental impacts modeling. Obviously, this must not be extrapolated to the rest of the database.

In conclusion, thanks to the fact that scientific literature and LCA databases both allow for a node-wise analysis as depicted in Figs. 2(a) to (c), we show that the environmental impacts per area are clearly increasing with technology downscaling below 0.13 µ m. This is observed both in the scientific literature and in LCA databases, despite the scope mismatch. It also seems that this increase is accelerating for advanced nodes. In addition, we point out the significant inter-sources variation per technology node which is mainly due to the mismatch of scopes. This is really problematic as this variation will eventually end up in LCA results of ICT devices. Hence, we call for a unified modeling of environmental impacts of IC production. Providing specific details for the 10 proposed features in LCAs of IC production would significantly facilitate the harmonization of the scopes in the future.

C. The Impact of Pursuing Advanced Scaling for Foundries

The previous section leveraged data from the first cluster and highlighted the increasing environmental impacts per area when shifting towards more advanced CMOS technology nodes. In this section, we focus on the second cluster to better understand the current situation in the foundries. Nevertheless, apart from a TSMC's press communication [61] suggesting

that the 5-nm manufacturing process would consume about 1.48 × more electricity than current mainstream manufacturing process, we found no public data disclosed by foundries to allow for a consistent estimation of the environmental impacts with respect to the technology node. Therefore, we analyzed the evolution of aggregated environmental impacts per area with respect to time instead of the technology node, as shown in Figs. 3(a) to (c). The total annual silicon area produced by each foundry was extracted from financial reports (20-F, 1-F) in order to normalize the global values extracted from the CSR reports for each environmental indicator. All details regarding the data extraction from CSR and the normalization are provided as supplementary material.

The high share of electricity in the energy consumption is clearly shown in Fig. 4(a), ranging from 55% up to 97%. This likely explains why foundries show a strong commitment to shift towards a low-carbon energy mix as it is an effective solution to quickly decrease their scope 2 GHG emissions. Moreover, Fig. 4(a) suggests that the shift to low-carbon energy is mostly implemented by purchasing "green" electricity rather than producing it on-site. The overall relevance of such a system can be questioned as it prevents other sectors from acting similarly because the renewable capacity can be limited at the global or local scale [63]. Nevertheless, this could explain why the PED increase reported by TSMC is

Figs. 3(a) and (b) reveal two opposing trends: the impacts per area (slightly) decrease over the period 2010-2020 for most of the foundries while they increase for TSMC. This is even clearer in Fig. 4 where the compound annual growth rate (CAGR) is provided for UMC, TSMC, and STmicro as well as the composition of the aggregated values. Aside from the geographical location, the maturity of their process, and the output production volume, an important difference is the mix of technology nodes in the foundry production volume (although precise shares are not known). Indeed, TSMC is the only industry in this study engaged in the production of technology nodes below 10 nm [31], which could well explain why it demonstrates a net increase in the impacts per area. This is not due to a lack of effort from the foundry to pursue efficiency but rather to the introduction of more demanding processes such as EUV lithography for scaling purpose [19], [61]. The high impact of EUV is also explicitly pointed out in ITRS roadmaps [47]. Yet, this analysis suggests that a reduction of the impacts per area is possible, provided that advanced scaling is not pursued. Indeed, other foundries keep demonstrating slight overall impacts reduction per cm$^{2}$, which could result from general manufacturing optimization. For instance, improvements in GHG abatement efficiency can lead to a decrease of scope 1 emissions [19]. Fig. 3(c) also depicts a clear increase in the case of TSMC, but the trend is less clear than for PED and GWP for the other foundries. In fact, water consumption per cm 2 for SMIC and STmicro seem to increase after 2018. In all cases, the comparison between the foundry impacts and the roadmap targets in Figs. 3(a) to (c) shows that the industry is still facing challenges to reach the environmental targets. Note that a gap from afactor2to4 × between ITRS roadmaps values and industry average was already acknowledged in [62] about 20 years ago.

Fig. 3. Node-aggregated temporal trends based on data from foundry reports and industry roadmaps. This shows the environmental impacts per cm 2 with respect to (a) PED, (b) GWP, and (c) water consumption. The left sub-figure exhibits the data for each source while the right sub-figure reflects the aggregated data for all the foundries considered in this study (further used in Fig. 6).

faster than its GWP increase in Fig. 4(b). The effect of using more renewable is illustrated by STmicro which effectively decreased the share of its scope 2 emissions while its PED remained almost stable, as illustrated in Figs. 4(a) and (b). Yet, it is important to stress that scopes 1 and 2 only provide a partial view of GHG emissions. As the perimeter of scope 3 is not defined in any of the five companies' CSR and is usually not provided, we could not include it. Even though some industries are starting to include scope 3 emissions, this should be seen as a lower bound as it is not yet common for the complex supply chain to report such information. This also explains why scope 3 varies significantly from one foundry to the other. For

Fig. 4. Detailed view of the node-aggregated temporal trends for three foundries, i.e., UMC, TSMC and STmicro. This shows the detailed environmental impacts per cm 2 with respect to (a) PED, (b) GWP, and (c) water consumption. The share of electricity, scope 2 and recycled water with respect to the total is given on each sub-figure for the first and last year of available data in the period 2010-2020. Similarly, the CAGR of the total over that period is shown.

instance, Fig. 4(b) shows a high contribution for the scope 3 of UMC whereas it is marginal for STmicro. Industries and stakeholders must be incited to report it as this can contribute to a better modeling of environmental impacts. For example, thanks to the reporting of foundries regarding the recycling of water, it can be seen in Fig. 4(c) that between 41 and 71% of the water is recycled. However, this is lower than the targets issued by the 2015 ITRS, i.e., 75% [47]. As recycling water consumes energy, it also points out the need to integrate all infrastructure impacts when analyzing the environmental footprint.

Finally, we compare the production volumes of foundries included in this study with the worldwide production of silicon area, as reported by SEMI 1 [64]inFig.5. From 2010 to 2020, this yields a coverage ranging from 14.5% to 20.5%. Consequently, we do not claim a full representativeness of the sub-sector, but it is still significant and covers key manufacturers in the field. Unfortunately, the data for Samsung, Intel and Micron are either too aggregated or not available, which prevents us from including them in this study and reach a higher coverage, i.e., close to 50%. Including Samsung in further studies would be of great interest because it is the second manufacturer of sub-10-nm ICs, as TSMC currently manufactures more than 90% of these ICs [31]. The total production for foundries considered in this study shows a CAGR close to 7.7%, mainly driven by TSMC's production. At the world scale, the total area of silicon produced over the last 10 years keeps increasing with a CAGR close to 3.6%, as illustrated in Fig. 5. Even though this is lower than 7.7%, this clearly confirms the current projections in the electronic sector fostering growth in wafer production.

IV. D ISCUSSION

In this section, we use long-term perspectives to reveal historical trends regarding the environmental impacts of IC production. In this context, we first use historical data from 1980-2010 to show the limits of further improving the environmental indicators per cm 2 in the foundries. Then, we

$^{1}$SEMI data includes front-end fabs and foundries such as TSMC, UMC, GF, SMIC, Samsung, Intel, Toshiba, Micron, SK Hynix, Powerchip, Texas Instruments, STmicro, Fujitsu, NXP, Infineon, among others. Data are for semiconductor applications only and do not include solar applications.

Fig. 5. Total silicon area production for the foundries considered in this study and for the worldwide production. Total annual silicon area produced by each foundry was deduced from CSR and financial reports (20-F, 1-F) by assuming a 90% load capacity.

analyze the ITRS semiconductor roadmaps since the 2000's to point out inadequacies regarding environmental targets and reveal the alarming lack of environmental targets for the upcoming years.

A. Environmental Lessons From 40 Years of Technology Downscaling

Although LCA is generally used either to evaluate, compare, or optimize the environmental impacts of a specific device or service, we propose to leverage it as a tool for analyzing the trends on the long-term. Indeed, we aim at providing longterm perspectives on the evolution of environmental impacts per cm 2 for the IC production sub-sector. In this context, we gathered historical data reported for the period 1980-2010 and we used the same 10 features to support the analysis and the identification of scope mismatch, as depicted in Table III. For most of the historical data, impact values were reported in the scientific literature, although they were directly coming from the foundries. Moreover, a transparent normalization was often available whereas this was less frequently the case for the industrial sources published over the last ten years. In general, historical values reported focused on electricity consumption per cm$^{2}$. As we focus on the improvements made by the foundries themselves and in order to remove the variation from historical results, we assumed the same PEF of 2.5.

Fig. 6. Long-term perspectives between the results presented in this work (2010-2020) and historical data (1980-2010). The comparison per cm 2 is done only for data from foundries, with respect to (a) PED, (b) GWP, and (c) water consumption. Assumptions made by the authors are shown in italic. The median (M) and standard deviation (σ ) are given in each case.

Nevertheless, it has been pointed out that PEF value should be revised as it likely misrepresents the evolution of efficiency with respect to electricity generation and distribution [65]. The share of electricity in the total energy consumption is assumed to be 83%, as deduced from Deng et al. data for a similar period [37]. Furthermore, we assume a global carbon intensity factor of 0.475 kgCO$_{2}$ eq/kWh, which is close to the value considered by Teehan [25] for LCA studies before 2010. As scope 1 was never disclosed in historical data, we assume that scope 2 only accounts for about 67% of the total GHG emissions, which is the median value for current foundries providing detailed data when reporting their carbon footprint in CSR reports. Regarding water consumption, no distinction is made between the different types of water as no information was available. We use medians for the comparison as it is more robust than the mean in the presence of extreme values and better captures the data in the case of asymmetric distribution.

The comparison of the data from the foundries over the period 1980-2010 and 2010-2020 reveals an important finding: environmental indicators normalized per cm 2 did not significantly decrease compared to historical values from 1980-2010, as shown in Figs. 6(a) to (c). In fact, Figs. 6(a) and (b) point out a decrease per cm 2 of about - 26% for PED and - 17% for GWP whereas Fig. 6(c) shows an increase of about + 12% for the water consumption. Undeniably, the

Fig. 7. Evolution of the average chip area of Apple's application processors.

number of transistors fitted on the same area of silicon has tremendously increased since then, revealing the impressive work of foundries. Nevertheless, the computational demand, the constant increase of functionality, and the ubiquity of electronic devices embedding ICs also surged in the meantime [10], [11], [32], supported by the decreasing cost per transistor thanks to aggressive downscaling [32], [63]. When analyzing the evolution of application processor chips from Apple over the last 10 years, Fig. 7 shows that the average die area is roughly constant even though technology node shifted from 45 nm to 5 nm. The increase in functionality can explain the almost constant die size despite technology downscaling [32]. This can be seen as a rebound effect (also called Jevons' Paradox) of technology downscaling which improves the environmental indicators per transistor [9], [10], [62], [63]. This corroborates observations made in the scientific literature over the last decades [9], [10], [27], [32], [59], [62]. More specifically, Deng and Williams [10] stressed the environmental consequences of this increase of functionality more than 10 years ago and Plepys [27], [62] highlighted the issue of ever increasing functionality as a reason for electronic devices to become more and more complex. That work also made clear this trend was "likely to continue for as long as new functional features and higher performance is available", while pointing out that it was not due to a lack of effort from the industry to pursue efficiency but rather due to a fundamental dynamic for sectors seeing their processes and products evolving at the same time [10].

In the context of the Paris agreement focusing on GWP, the UNEP estimates a reduction rate of 7.6%/year to meet the 1.5 $^{·}$C target [66], assuming a start in 2020. This would therefore require a reduction of the GWP/cm 2 close to 11-14%/year if we assume that the total IC production volumes in terms of area keeps increasing at the same rate as last decade, as shown in Fig. 5. This is far from the - 17% observed over more than 15 years in Fig. 6(b). Therefore, in light of the results presented in this study, conflicting trends are to be expected if the IC production sub-sector pursues aggressive downscaling with increasing production volumes while committing to rapid reduction in GHG emissions. This key message is supported by the Association for Computing Machinery (ACM) who recently pointed out that "the Chips Act will lead to significant rebounds (if not backfire) if technology is leveraged in

Fig. 8. Target-shifting phenomenon in ITRS roadmaps. The time-wise analysis of ITRS ESH/S roadmaps from 2001, 2003, 2007 and 2015 reveals that targets are systematically relaxed in the opposite direction of best performance in new roadmap versions. This can be seen for (a) total energy consumption (electricity only!), (b) total fab water consumption and (c) recycle/reuse rate. No target is available for total GHG emissions.

pursuit of economic growth to the exclusion of environmental considerations" [28]. Nevertheless, advanced nodes could be game changing if used to provide constant functionality and performance with less area, rather than more functionalities with constant area. Unfortunately, this requires a complete reboot of the current roadmaps and business models in the electronics industry [67], which seems far from being on the agenda.

B. Industrial Roadmaps Struggle With Defining Relevant Environmental Targets for IC Production

We analyze the ITRS/IRDS roadmaps published since the 2000's to better understand how their environmental targets evolved through time. We consider ESH editions from 2001, 2003, 2007 and 2015 as they all provide quantitative targets over at least four years ahead of the respective publication.

Our analysis reveals a systematic target-relaxing phenomenon. Indeed, Figs. 8(a) to (c) show that targets for energy consumption, water consumption and recycle/reuse rate are delayed or revised with relaxed targets at each new version of the roadmaps. For PED in Fig. 8(a), the final target almost matches the initial one but this is not the case anymore if EUV is used. For water, the final target is slightly higher than the one given in the 2001 ESH edition, as shown in Fig. 8(b). This is even more evident for the recycling/reuse rate in Fig. 8(c) where the target is significantly less ambitious than the one outlined in the 2001 ESH edition. Consequently, environmental indicators per cm 2 do not improve as fast as planned in the roadmaps published in the early 2000's. This analysis again points out the critical need for additional study [16] and for a transparent methodology. Indeed, very little information can be found in ITRS roadmaps regarding the methodology used to define their targets. As such targets are likely influenced by field-related constraints and business interests, more transparency is needed. In addition, targets terminology often changes from one version to the other, which complicated the identification of targets over time. Again, a common framework to report targets and industry performance on a regular basis would greatly help in that matter. We suggest that such a framework should integrate the 10 features proposed in this study, as they have been identified as key features in the evaluation of environmental impacts of IC production. Additional features such as wafer throughput could also be of interest although this information is almost never disclosed despite its significant influence [19].

Regarding GHG emissions, it is striking not to find any quantitative target in ITRS roadmaps. The only requirement regarding GHG exclusively focuses on fluorinated GHG (F-GHG), flurorinated heat transfer fluids and nitrous oxide for which the normalized emission rate (NER) is set to 0.22 kgCO$_{2}$ eq/cm 2 for 2020 [47]. As F-GHG are only a part of the GHG emissions, this is far from being a sufficient and representative target. An explicit quantitative ITRS target is critically needed, especially when the ITRS itself points out in 2015 that "the combination of 450 mm, EUV exposure and rapid addition of new materials over the next 5 years pose significant challenges" [47]. The interactions between technology node, wafer size, yields and average die area were already introduced in [20], [27], [32], pointing out the difficulty to determine the environmental impacts associated with growing circuit complexity and increasing miniaturization trends. This again pleads in favor of long-term systematic analyses, especially because it also allows for a better detection of hotspots shifting or impacts transfer.

Finally, it is even more alarming to observe that after 2015, the lack of quantitative targets generalizes to all indicators in ITRS/IRDS roadmaps. This goes even further in the 2022 IRDS executive summary where it is clearly stated that "the ESH chapter was not updated for 2021 IRDS given the many changes that have occurred within the industry and externally, which require a fundamental reset in how ESH/S emerging challenges are addressed from a technology roadmap perspective" [68]. Historically, targets were provided even though they mentioned that the technology to reach them was not necessarily known. Today, the situation is even worse as the road ahead in terms of environmental targets is not even sketched. Let us stress out here that it must be seen as a strong alarm signal regarding the environmental sustainability of IC production.

V. C ONCLUSION

Properly modeling the environmental impacts generated by the IC production is critical as digitalization is developing fast. While previous works already offer important insights, the environmental impacts of ICs are still far from being thoroughly understood, despite their prominent role in our digital societies. In this work, we address the environmental impacts of IC production in three successive steps, namely (i) a literature review to identify key sources of LCA data with respect to three environmental indicators, (ii) a qualitative

and quantitative analysis to examine these sources, and (iii) a long-term perspective to learn from historical trends.

This reveals two take-away messages. First, we point out the mismatch of scopes as the main reason for the significant variation of environmental impacts per cm$^{2}$. A common framework to report data from different literature categories should be considered in the near future. This can be a relevant interface to bring together data and methods from the scientific community and the industrial actors, while preserving confidentiality up to a certain level. By providing all the data and assumptions as supplementary material, together with the 10 objective features for characterizing the scope of IC production LCAs, this study is a first attempt for this common reporting framework. Then, we demonstrate that minimization of the environmental impacts per cm 2 will not be sufficient to quickly reduce the global absolute environmental footprint of the IC production sub-sector, especially for advanced nodes. Moreover, the trend towards more functionalities observed over the last decades reveals a clear rebound effect at the hardware level, absorbing or backfiring efficiency improvements captured by Moore's Law. This attests the limits of technology downscaling in being an effective solution for sustainability, as long as it feeds economic growth and fosters a rapid rise in the IC production volumes [32].

Therefore, we conclude that sobriety must be integrated into technological innovation and technology usage [69], which calls for profoundly rethinking our socio-economic models and innovation roadmaps. As the need for sobriety in ICT was already pointed out about 20 years ago [27], we stress the urgency of the situation as a challenging question emerges: how should the IC production sub-sector adapt if global IC production volumes flatten or decrease in the long term?

A CKNOWLEDGMENT

The authors would like to thank Sarah Boyd (formerly Sphera now with Apple), Marie Garcia Bardon (imec), Etienne Lees-Perasso (formerly Bureau Veritas), Constantin Herrmann, Stephan Benecke, and Noel Ullrich (Sphera) for the valuable discussions and constructive inputs as well as UCLouvain ECS group members for their proofreading.

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