From bf6102224298c90d811d8cf3ac1f7b616c4c6149 Mon Sep 17 00:00:00 2001 From: "Maksimova, Viktoria" Date: Fri, 6 Oct 2023 02:56:34 -0700 Subject: [PATCH] Update decorations for global variables This change is basically an update of #1389 for spec changes. Implementation of the feature was based on Intel extension which was not officially published to Khronos. Now it has been split, updated, and published to Khronos by https://github.com/KhronosGroup/SPIRV-Registry/pull/205 Summary of the things that have changed: * Capability names and a new capability was added * Values for decorations have been updated to enums * Decoration names and IDs have been changed Specs: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations.asciidoc https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_global_variable_host_access.asciidoc --- include/LLVMSPIRVExtensions.inc | 3 +- lib/SPIRV/SPIRVReader.cpp | 2 +- lib/SPIRV/SPIRVWriter.cpp | 37 ++++++---- lib/SPIRV/libSPIRV/SPIRVDecorate.cpp | 4 +- lib/SPIRV/libSPIRV/SPIRVDecorate.h | 24 ++++--- lib/SPIRV/libSPIRV/SPIRVEnum.h | 12 ++-- lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h | 12 ++-- lib/SPIRV/libSPIRV/spirv_internal.hpp | 9 --- spirv-headers-tag.conf | 2 +- .../global_var_decorations.ll | 44 ++++++------ .../global_var_host_access.ll | 49 +++++++++++++ test/transcoding/global_var_decorations.ll | 68 +++++++++++++++++++ 12 files changed, 193 insertions(+), 73 deletions(-) rename test/extensions/INTEL/{SPV_INTEL_global_variable_decorations => SPV_INTEL_global_variable_fpga_decorations}/global_var_decorations.ll (56%) create mode 100644 test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll create mode 100644 test/transcoding/global_var_decorations.ll diff --git a/include/LLVMSPIRVExtensions.inc b/include/LLVMSPIRVExtensions.inc index c911b4504c..c6a78abea3 100644 --- a/include/LLVMSPIRVExtensions.inc +++ b/include/LLVMSPIRVExtensions.inc @@ -54,7 +54,8 @@ EXT(SPV_INTEL_arithmetic_fence) EXT(SPV_INTEL_bfloat16_conversion) EXT(SPV_INTEL_joint_matrix) EXT(SPV_INTEL_hw_thread_queries) -EXT(SPV_INTEL_global_variable_decorations) +EXT(SPV_INTEL_global_variable_host_access) +EXT(SPV_INTEL_global_variable_fpga_decorations) EXT(SPV_INTEL_complex_float_mul_div) EXT(SPV_INTEL_split_barrier) EXT(SPV_INTEL_masked_gather_scatter) diff --git a/lib/SPIRV/SPIRVReader.cpp b/lib/SPIRV/SPIRVReader.cpp index 85d95de205..153a11ca8a 100644 --- a/lib/SPIRV/SPIRVReader.cpp +++ b/lib/SPIRV/SPIRVReader.cpp @@ -3847,7 +3847,7 @@ transDecorationsToMetadataList(llvm::LLVMContext *Context, OPs.push_back(LinkTypeMD); break; } - case spv::internal::DecorationHostAccessINTEL: { + case DecorationHostAccessINTEL: { const auto *const HostAccDeco = static_cast(Deco); auto *const AccModeMD = ConstantAsMetadata::get(ConstantInt::get( diff --git a/lib/SPIRV/SPIRVWriter.cpp b/lib/SPIRV/SPIRVWriter.cpp index 5830225886..fbc414d55d 100644 --- a/lib/SPIRV/SPIRVWriter.cpp +++ b/lib/SPIRV/SPIRVWriter.cpp @@ -2573,7 +2573,8 @@ static void transMetadataDecorations(Metadata *MD, SPIRVEntry *Target) { Target, Name->getString().str(), TypeKind)); break; } - case spv::internal::DecorationHostAccessINTEL: { + + case DecorationHostAccessINTEL: { checkIsGlobalVar(Target, DecoKind); ErrLog.checkError(NumOperands == 3, SPIRVEC_InvalidLlvmModule, @@ -2584,6 +2585,9 @@ static void transMetadataDecorations(Metadata *MD, SPIRVEntry *Target) { ErrLog.checkError( AccessMode, SPIRVEC_InvalidLlvmModule, "HostAccessINTEL requires first extra operand to be an int"); + + HostAccessQualifier Q = + static_cast(AccessMode->getZExtValue()); auto *Name = dyn_cast(DecoMD->getOperand(2)); ErrLog.checkError( Name, SPIRVEC_InvalidLlvmModule, @@ -2593,7 +2597,8 @@ static void transMetadataDecorations(Metadata *MD, SPIRVEntry *Target) { Target, AccessMode->getZExtValue(), Name->getString().str())); break; } - case spv::internal::DecorationInitModeINTEL: { + + case DecorationInitModeINTEL: { checkIsGlobalVar(Target, DecoKind); ErrLog.checkError(static_cast(Target)->getInitializer(), SPIRVEC_InvalidLlvmModule, @@ -2603,27 +2608,33 @@ static void transMetadataDecorations(Metadata *MD, SPIRVEntry *Target) { ErrLog.checkError(NumOperands == 2, SPIRVEC_InvalidLlvmModule, "InitModeINTEL requires exactly 1 extra operand"); auto *Trigger = mdconst::dyn_extract(DecoMD->getOperand(1)); - ErrLog.checkError( - Trigger, SPIRVEC_InvalidLlvmModule, - "InitModeINTEL requires extra operand to be an integer"); + ErrLog.checkError(Trigger, SPIRVEC_InvalidLlvmModule, + "InitModeINTEL requires extra operand to be an int"); + + InitializationModeQualifier Q = + static_cast(Trigger->getZExtValue()); Target->addDecorate( new SPIRVDecorateInitModeINTEL(Target, Trigger->getZExtValue())); + break; } - case spv::internal::DecorationImplementInCSRINTEL: { + case DecorationImplementInRegisterMapINTEL: { checkIsGlobalVar(Target, DecoKind); - ErrLog.checkError(NumOperands == 2, SPIRVEC_InvalidLlvmModule, - "ImplementInCSRINTEL requires exactly 1 extra operand"); - auto *Value = mdconst::dyn_extract(DecoMD->getOperand(1)); ErrLog.checkError( - Value, SPIRVEC_InvalidLlvmModule, - "ImplementInCSRINTEL requires extra operand to be an integer"); + NumOperands == 2, SPIRVEC_InvalidLlvmModule, + "ImplementInRegisterMapINTEL requires exactly 1 extra operand"); + auto *Value = mdconst::dyn_extract(DecoMD->getOperand(1)); + ErrLog.checkError(Value, SPIRVEC_InvalidLlvmModule, + "ImplementInRegisterMapINTEL requires extra operand to " + "be an integer"); + + Target->addDecorate(new SPIRVDecorateImplementInRegisterMapINTEL( + Target, Value->getZExtValue())); - Target->addDecorate( - new SPIRVDecorateImplementInCSRINTEL(Target, Value->getZExtValue())); break; } + case spv::internal::DecorationCacheControlLoadINTEL: { ErrLog.checkError( NumOperands == 3, SPIRVEC_InvalidLlvmModule, diff --git a/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp b/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp index ca76d6a430..a9561b3e26 100644 --- a/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp +++ b/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp @@ -124,7 +124,7 @@ void SPIRVDecorate::encode(spv_ostream &O) const { case DecorationUserSemantic: SPIRVDecorateUserSemanticAttr::encodeLiterals(Encoder, Literals); break; - case spv::internal::DecorationHostAccessINTEL: + case DecorationHostAccessINTEL: SPIRVDecorateHostAccessINTEL::encodeLiterals(Encoder, Literals); break; default: @@ -153,7 +153,7 @@ void SPIRVDecorate::decode(std::istream &I) { case DecorationUserSemantic: SPIRVDecorateUserSemanticAttr::decodeLiterals(Decoder, Literals); break; - case spv::internal::DecorationHostAccessINTEL: + case DecorationHostAccessINTEL: SPIRVDecorateHostAccessINTEL::decodeLiterals(Decoder, Literals); break; default: diff --git a/lib/SPIRV/libSPIRV/SPIRVDecorate.h b/lib/SPIRV/libSPIRV/SPIRVDecorate.h index c2fe345fde..41279ee7bc 100644 --- a/lib/SPIRV/libSPIRV/SPIRVDecorate.h +++ b/lib/SPIRV/libSPIRV/SPIRVDecorate.h @@ -184,10 +184,12 @@ class SPIRVDecorate : public SPIRVDecorateGeneric { return ExtensionID::SPV_INTEL_fpga_invocation_pipelining_attributes; case internal::DecorationRuntimeAlignedINTEL: return ExtensionID::SPV_INTEL_runtime_aligned; - case internal::DecorationHostAccessINTEL: - case internal::DecorationInitModeINTEL: - case internal::DecorationImplementInCSRINTEL: - return ExtensionID::SPV_INTEL_global_variable_decorations; + case DecorationInitModeINTEL: + case DecorationImplementInRegisterMapINTEL: + return ExtensionID::SPV_INTEL_global_variable_fpga_decorations; + case DecorationHostAccessINTEL: + return ExtensionID::SPV_INTEL_global_variable_host_access; + case DecorationConduitKernelArgumentINTEL: case DecorationRegisterMapKernelArgumentINTEL: case DecorationStableKernelArgumentINTEL: @@ -732,7 +734,7 @@ class SPIRVDecorateHostAccessINTEL : public SPIRVDecorate { // Complete constructor for SPIRVHostAccessINTEL SPIRVDecorateHostAccessINTEL(SPIRVEntry *TheTarget, SPIRVWord AccessMode, const std::string &VarName) - : SPIRVDecorate(spv::internal::DecorationHostAccessINTEL, TheTarget) { + : SPIRVDecorate(DecorationHostAccessINTEL, TheTarget) { Literals.push_back(AccessMode); for (auto &I : getVec(VarName)) Literals.push_back(I); @@ -778,16 +780,16 @@ class SPIRVDecorateInitModeINTEL : public SPIRVDecorate { public: // Complete constructor for SPIRVInitModeINTEL SPIRVDecorateInitModeINTEL(SPIRVEntry *TheTarget, SPIRVWord Trigger) - : SPIRVDecorate(spv::internal::DecorationInitModeINTEL, TheTarget, - Trigger) {} + : SPIRVDecorate(DecorationInitModeINTEL, TheTarget, Trigger) {} }; -class SPIRVDecorateImplementInCSRINTEL : public SPIRVDecorate { +class SPIRVDecorateImplementInRegisterMapINTEL : public SPIRVDecorate { public: // Complete constructor for SPIRVImplementInCSRINTEL - SPIRVDecorateImplementInCSRINTEL(SPIRVEntry *TheTarget, SPIRVWord Value) - : SPIRVDecorate(spv::internal::DecorationImplementInCSRINTEL, TheTarget, - Value) {} + SPIRVDecorateImplementInRegisterMapINTEL(SPIRVEntry *TheTarget, + SPIRVWord Value) + : SPIRVDecorate(DecorationImplementInRegisterMapINTEL, TheTarget, Value) { + } }; class SPIRVDecorateCacheControlLoadINTEL : public SPIRVDecorate { diff --git a/lib/SPIRV/libSPIRV/SPIRVEnum.h b/lib/SPIRV/libSPIRV/SPIRVEnum.h index 7912f15db2..3f61c69104 100644 --- a/lib/SPIRV/libSPIRV/SPIRVEnum.h +++ b/lib/SPIRV/libSPIRV/SPIRVEnum.h @@ -463,12 +463,12 @@ template <> inline void SPIRVMap::init() { {CapabilityFPGAInvocationPipeliningAttributesINTEL}); ADD_VEC_INIT(internal::DecorationRuntimeAlignedINTEL, {CapabilityRuntimeAlignedAttributeINTEL}); - ADD_VEC_INIT(internal::DecorationHostAccessINTEL, - {internal::CapabilityGlobalVariableDecorationsINTEL}); - ADD_VEC_INIT(internal::DecorationInitModeINTEL, - {internal::CapabilityGlobalVariableDecorationsINTEL}); - ADD_VEC_INIT(internal::DecorationImplementInCSRINTEL, - {internal::CapabilityGlobalVariableDecorationsINTEL}); + ADD_VEC_INIT(DecorationHostAccessINTEL, + {CapabilityGlobalVariableHostAccessINTEL}); + ADD_VEC_INIT(DecorationInitModeINTEL, + {CapabilityGlobalVariableFPGADecorationsINTEL}); + ADD_VEC_INIT(DecorationImplementInRegisterMapINTEL, + {CapabilityGlobalVariableFPGADecorationsINTEL}); ADD_VEC_INIT(internal::DecorationArgumentAttributeINTEL, {CapabilityFunctionPointersINTEL}); ADD_VEC_INIT(internal::DecorationCacheControlLoadINTEL, diff --git a/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h b/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h index 02f88123a8..cdfc526d96 100644 --- a/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h +++ b/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h @@ -200,12 +200,13 @@ template <> inline void SPIRVMap::init() { add(DecorationLatencyControlConstraintINTEL, "LatencyControlConstraintINTEL"); add(DecorationFPMaxErrorDecorationINTEL, "FPMaxErrorDecorationINTEL"); + add(DecorationHostAccessINTEL, "HostAccessINTEL"); + add(DecorationInitModeINTEL, "InitModeINTEL"); + add(DecorationImplementInRegisterMapINTEL, "ImplementInRegisterMapINTEL"); + // From spirv_internal.hpp add(internal::DecorationCallableFunctionINTEL, "CallableFunctionINTEL"); add(internal::DecorationRuntimeAlignedINTEL, "RuntimeAlignedINTEL"); - add(internal::DecorationHostAccessINTEL, "HostAccessINTEL"); - add(internal::DecorationInitModeINTEL, "InitModeINTEL"); - add(internal::DecorationImplementInCSRINTEL, "ImplementInCSRINTEL"); add(internal::DecorationArgumentAttributeINTEL, "ArgumentAttributeINTEL"); add(internal::DecorationCacheControlLoadINTEL, "CacheControlLoadINTEL"); add(internal::DecorationCacheControlStoreINTEL, "CacheControlStoreINTEL"); @@ -616,6 +617,9 @@ template <> inline void SPIRVMap::init() { add(CapabilityAtomicFloat16AddEXT, "AtomicFloat16AddEXT"); add(CapabilityDebugInfoModuleINTEL, "DebugInfoModuleINTEL"); add(CapabilitySplitBarrierINTEL, "SplitBarrierINTEL"); + add(CapabilityGlobalVariableFPGADecorationsINTEL, + "GlobalVariableFPGADecorationsINTEL"); + add(CapabilityGlobalVariableHostAccessINTEL, "GlobalVariableHostAccessINTEL"); add(CapabilityGroupUniformArithmeticKHR, "GroupUniformArithmeticKHR"); add(CapabilityFPGADSPControlINTEL, "FPGADSPControlINTEL"); add(CapabilityFPGAInvocationPipeliningAttributesINTEL, @@ -633,8 +637,6 @@ template <> inline void SPIRVMap::init() { add(internal::CapabilityBfloat16ConversionINTEL, "Bfloat16ConversionINTEL"); add(internal::CapabilityJointMatrixINTEL, "JointMatrixINTEL"); add(internal::CapabilityHWThreadQueryINTEL, "HWThreadQueryINTEL"); - add(internal::CapabilityGlobalVariableDecorationsINTEL, - "GlobalVariableDecorationsINTEL"); add(internal::CapabilityComplexFloatMulDivINTEL, "ComplexFloatMulDivINTEL"); add(internal::CapabilityMaskedGatherScatterINTEL, "MaskedGatherScatterINTEL"); add(internal::CapabilityTensorFloat32RoundingINTEL, diff --git a/lib/SPIRV/libSPIRV/spirv_internal.hpp b/lib/SPIRV/libSPIRV/spirv_internal.hpp index 13ee3bd1e9..9336d98b16 100644 --- a/lib/SPIRV/libSPIRV/spirv_internal.hpp +++ b/lib/SPIRV/libSPIRV/spirv_internal.hpp @@ -84,9 +84,6 @@ enum InternalOp { enum InternalDecoration { IDecRuntimeAlignedINTEL = 5940, IDecCallableFunctionINTEL = 6087, - IDecHostAccessINTEL = 6147, - IDecInitModeINTEL = 6148, - IDecImplementInCSRINTEL = 6149, IDecArgumentAttributeINTEL = 6409, IDecCacheControlLoadINTEL = 6442, IDecCacheControlStoreINTEL = 6443 @@ -245,12 +242,6 @@ constexpr Decoration DecorationCallableFunctionINTEL = static_cast(IDecCallableFunctionINTEL); constexpr Decoration DecorationRuntimeAlignedINTEL = static_cast(IDecRuntimeAlignedINTEL); -constexpr Decoration DecorationHostAccessINTEL = - static_cast(IDecHostAccessINTEL); -constexpr Decoration DecorationInitModeINTEL = - static_cast(IDecInitModeINTEL); -constexpr Decoration DecorationImplementInCSRINTEL = - static_cast(IDecImplementInCSRINTEL); constexpr Decoration DecorationArgumentAttributeINTEL = static_cast(IDecArgumentAttributeINTEL); constexpr Decoration DecorationCacheControlLoadINTEL = diff --git a/spirv-headers-tag.conf b/spirv-headers-tag.conf index e28f5847a6..44e9079c13 100644 --- a/spirv-headers-tag.conf +++ b/spirv-headers-tag.conf @@ -1 +1 @@ -51b106461707f46d962554efe1bf56dee28958a3 +b8b9eb8640c8c0107ba580fbcb10f969022ca32c diff --git a/test/extensions/INTEL/SPV_INTEL_global_variable_decorations/global_var_decorations.ll b/test/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations/global_var_decorations.ll similarity index 56% rename from test/extensions/INTEL/SPV_INTEL_global_variable_decorations/global_var_decorations.ll rename to test/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations/global_var_decorations.ll index 993112cc2f..dff159d149 100644 --- a/test/extensions/INTEL/SPV_INTEL_global_variable_decorations/global_var_decorations.ll +++ b/test/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations/global_var_decorations.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as %s -o %t.bc -; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_decorations -o %t.spv +; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_fpga_decorations -o %t.spv ; RUN: llvm-spirv %t.spv -to-text -o %t.spt ; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV @@ -21,17 +21,15 @@ target triple = "spir64-unknown-unknown" @float_var = addrspace(1) global float 1.0, !spirv.Decorations !6 @bool_var = addrspace(1) global i1 0, !spirv.Decorations !9 -; CHECK-SPIRV: Capability GlobalVariableDecorationsINTEL -; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_decorations" -; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] HostAccessINTEL 1 "IntVarName" -; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] ImplementInCSRINTEL 1 +; CHECK-SPIRV: Capability GlobalVariableFPGADecorationsINTEL +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_fpga_decorations" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] ImplementInRegisterMapINTEL 1 ; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] InitModeINTEL 0 -; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID:]] ImplementInCSRINTEL 1 +; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID:]] ImplementInRegisterMapINTEL 1 ; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID]] InitModeINTEL 1 -; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] HostAccessINTEL 3 "BoolVarName" -; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] ImplementInCSRINTEL 0 +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] ImplementInRegisterMapINTEL 0 ; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] InitModeINTEL 0 ; 5 is a global storage @@ -39,29 +37,27 @@ target triple = "spir64-unknown-unknown" ; CHECK-SPIRV: Variable [[#]] [[#FLOAT_VAR_ID]] 5 ; CHECK-SPIRV: Variable [[#]] [[#BOOL_VAR_ID]] 5 -!1 = !{!2, !3, !4} -!2 = !{i32 6147, i32 1, !"IntVarName"} ; HostAccessINTEL 1 "IntVarName" -!3 = !{i32 6149, i1 true} ; ImplementInCSRINTEL = true -!4 = !{i32 6148, i32 0} ; InitModeINTEL = 0 -!5 = !{i32 6148, i32 1} ; InitModeINTEL = 1 +!1 = !{!3, !4} +; !2 = !{i32 6147, i32 1, !"IntVarName"} ; HostAccessINTEL 1 "IntVarName" +!3 = !{i32 6148, i1 true} ; ImplementInRegisterMapINTEL = true +!4 = !{i32 6147, i32 0} ; InitModeINTEL = 0 +!5 = !{i32 6147, i32 1} ; InitModeINTEL = 1 !6 = !{!3, !5} -!7 = !{i32 6147, i32 3, !"BoolVarName"} ; HostAccessINTEL 3 "BoolVarName" -!8 = !{i32 6149, i1 false} ; ImplementInCSRINTEL = false -!9 = !{!7, !8, !4} +; !7 = !{i32 6147, i32 3, !"BoolVarName"} ; HostAccessINTEL 3 "BoolVarName" +!8 = !{i32 6148, i1 false} ; ImplementInRegisterMapINTEL = false +!9 = !{!8, !4} ; CHECK-SPV-IR: @int_var = addrspace(1) global i32 42, !spirv.Decorations ![[#INT_VAR_DEC:]] ; CHECK-SPV-IR: @float_var = addrspace(1) global float 1.000000e+00, !spirv.Decorations ![[#FLOAT_VAR_DEC:]] ; CHECK-SPV-IR: @bool_var = addrspace(1) global i1 false, !spirv.Decorations ![[#BOOL_VAR_DEC:]] -; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_INTVAR:]], ![[#MD_INIT_0:]], ![[#MD_CSR_1:]]} -; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_INTVAR]] = !{i32 6147, i32 1, !"IntVarName"} -; CHECK-SPV-IR: ![[#MD_INIT_0]] = !{i32 6148, i32 0} -; CHECK-SPV-IR: ![[#MD_CSR_1]] = !{i32 6149, i32 1} +; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0:]], ![[#MD_CSR_1:]]} +; CHECK-SPV-IR: ![[#MD_INIT_0]] = !{i32 6147, i32 0} +; CHECK-SPV-IR: ![[#MD_CSR_1]] = !{i32 6148, i32 1} ; CHECK-SPV-IR: ![[#FLOAT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_1:]], ![[#MD_CSR_1]]} -; CHECK-SPV-IR: ![[#MD_INIT_1]] = !{i32 6148, i32 1} -; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_BOOLVAR:]], ![[#MD_INIT_0]], ![[#MD_CSR_0:]]} -; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_BOOLVAR]] = !{i32 6147, i32 3, !"BoolVarName"} -; CHECK-SPV-IR: ![[#MD_CSR_0]] = !{i32 6149, i32 0} +; CHECK-SPV-IR: ![[#MD_INIT_1]] = !{i32 6147, i32 1} +; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0]], ![[#MD_CSR_0:]]} +; CHECK-SPV-IR: ![[#MD_CSR_0]] = !{i32 6148, i32 0} ; CHECK-LLVM-NOT: @int_var = {{.*}}, !spirv.Decorations ![[#]] diff --git a/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll b/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll new file mode 100644 index 0000000000..211ecec1df --- /dev/null +++ b/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll @@ -0,0 +1,49 @@ +; RUN: llvm-as %s -o %t.bc +; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_host_access -o %t.spv +; RUN: llvm-spirv %t.spv -to-text -o %t.spt +; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV + +; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-SPV-IR + +; RUN: llvm-spirv -r %t.spv -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM + +; Expected to fail - the decorations require enabled extension to be translated. +; RUN: not llvm-spirv %t.bc -o %t.spv + +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" +target triple = "spir64-unknown-unknown" + +@int_var = addrspace(1) global i32 42, !spirv.Decorations !1 +@bool_var = addrspace(1) global i1 0, !spirv.Decorations !4 + +; CHECK-SPIRV: Capability GlobalVariableHostAccessINTEL +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_host_access" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] HostAccessINTEL 1 "IntVarName" +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] HostAccessINTEL 3 "BoolVarName" + +; 5 is a global storage +; CHECK-SPIRV: Variable [[#]] [[#INT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#BOOL_VAR_ID]] 5 + +!1 = !{!2} +!2 = !{i32 6168, i32 1, !"IntVarName"} ; HostAccessINTEL 1 "IntVarName" +!3 = !{i32 6168, i32 3, !"BoolVarName"} ; HostAccessINTEL 3 "BoolVarName" +!4 = !{!3} + +; CHECK-SPV-IR: @int_var = addrspace(1) global i32 42, !spirv.Decorations ![[#INT_VAR_DEC:]] +; CHECK-SPV-IR: @bool_var = addrspace(1) global i1 false, !spirv.Decorations ![[#BOOL_VAR_DEC:]] + +; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_INTVAR:]]} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_INTVAR]] = !{i32 6168, i32 1, !"IntVarName"} +; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_BOOLVAR:]]} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_BOOLVAR]] = !{i32 6168, i32 3, !"BoolVarName"} + +; CHECK-LLVM-NOT: @int_var = {{.*}}, !spirv.Decorations ![[#]] +; CHECK-LLVM-NOT: @bool_var = {{.*}}, !spirv.Decorations ![[#]] + +; CHECK-LLVM: @int_var = addrspace(1) global i32 42 +; CHECK-LLVM: @bool_var = addrspace(1) global i1 false diff --git a/test/transcoding/global_var_decorations.ll b/test/transcoding/global_var_decorations.ll new file mode 100644 index 0000000000..a6d7967c0f --- /dev/null +++ b/test/transcoding/global_var_decorations.ll @@ -0,0 +1,68 @@ +; RUN: llvm-as %s -o %t.bc +; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_fpga_decorations,+SPV_INTEL_global_variable_host_access -o %t.spv +; RUN: llvm-spirv %t.spv -to-text -o %t.spt +; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV + +; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-SPV-IR + +; Expected to fail - the decorations require enabled extensions to be translated. +; RUN: not llvm-spirv %t.bc -o %t.spv + +; Expected to fail - the decorations require enabled extensions to be translated. +; RUN: not llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_fpga_decorations -o %t.spv + +; Expected to fail - the decorations require enabled extensions to be translated. +; RUN: not llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_host_access -o %t.spv + +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" +target triple = "spir64-unknown-unknown" + +@int_var = addrspace(1) global i32 42, !spirv.Decorations !1 +@float_var = addrspace(1) global float 1.0, !spirv.Decorations !6 +@bool_var = addrspace(1) global i1 0, !spirv.Decorations !9 + +; CHECK-SPIRV: Capability GlobalVariableFPGADecorationsINTEL +; CHECK-SPIRV: Capability GlobalVariableHostAccessINTEL +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_fpga_decorations" +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_host_access" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] HostAccessINTEL 1 "IntVarName" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] ImplementInRegisterMapINTEL 1 +; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] InitModeINTEL 0 + +; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID:]] ImplementInRegisterMapINTEL 1 +; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID]] InitModeINTEL 1 + +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] HostAccessINTEL 3 "BoolVarName" +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] ImplementInRegisterMapINTEL 0 +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] InitModeINTEL 0 + +; 5 is a global storage +; CHECK-SPIRV: Variable [[#]] [[#INT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#FLOAT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#BOOL_VAR_ID]] 5 + +!1 = !{!2, !3, !4} +!2 = !{i32 6168, i32 1, !"IntVarName"} ; HostAccessINTEL 1 "IntVarName" +!3 = !{i32 6148, i1 true} ; ImplementInRegisterMapINTEL = true +!4 = !{i32 6147, i32 0} ; InitModeINTEL = 0 +!5 = !{i32 6147, i32 1} ; InitModeINTEL = 1 +!6 = !{!3, !5} +!7 = !{i32 6168, i32 3, !"BoolVarName"} ; HostAccessINTEL 3 "BoolVarName" +!8 = !{i32 6148, i1 false} ; ImplementInRegisterMapINTEL = false +!9 = !{!7, !8, !4} + +; CHECK-SPV-IR: @int_var = addrspace(1) global i32 42, !spirv.Decorations ![[#INT_VAR_DEC:]] +; CHECK-SPV-IR: @float_var = addrspace(1) global float 1.000000e+00, !spirv.Decorations ![[#FLOAT_VAR_DEC:]] +; CHECK-SPV-IR: @bool_var = addrspace(1) global i1 false, !spirv.Decorations ![[#BOOL_VAR_DEC:]] + +; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0:]], ![[#MD_CSR_1:]], ![[#MD_HOST_ACCESS_INTVAR:]]} +; CHECK-SPV-IR: ![[#MD_INIT_0]] = !{i32 6147, i32 0} +; CHECK-SPV-IR: ![[#MD_CSR_1]] = !{i32 6148, i32 1} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_INTVAR]] = !{i32 6168, i32 1, !"IntVarName"} +; CHECK-SPV-IR: ![[#FLOAT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_1:]], ![[#MD_CSR_1]]} +; CHECK-SPV-IR: ![[#MD_INIT_1]] = !{i32 6147, i32 1} +; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0]], ![[#MD_CSR_0:]], ![[#MD_HOST_ACCESS_BOOLVAR:]]} +; CHECK-SPV-IR: ![[#MD_CSR_0]] = !{i32 6148, i32 0} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_BOOLVAR]] = !{i32 6168, i32 3, !"BoolVarName"}