11:59:29:401 -> [   286][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 43 =========== Before Setup Start ===========
11:59:29:401 -> Chip Info:
11:59:29:403 -> ------------------------------------------
11:59:29:403 ->   Model             : ESP32-S3
11:59:29:405 ->   Package           : 0
11:59:29:405 ->   Revision          : 0.02
11:59:29:410 ->   Cores             : 2
11:59:29:411 ->   CPU Frequency     : 240 MHz
11:59:29:413 ->   XTAL Frequency    : 40 MHz
11:59:29:416 ->   Features Bitfield : 0x00000012
11:59:29:418 ->   Embedded Flash    : No
11:59:29:420 ->   Embedded PSRAM    : No
11:59:29:422 ->   2.4GHz WiFi       : Yes
11:59:29:425 ->   Classic BT        : No
11:59:29:427 ->   BT Low Energy     : Yes
11:59:29:429 ->   IEEE 802.15.4     : No
11:59:29:433 -> ------------------------------------------
11:59:29:436 -> INTERNAL Memory Info:
11:59:29:439 -> ------------------------------------------
11:59:29:447 ->   Free Bytes        :   372700 B ( 364.0 KB)
11:59:29:451 ->   Allocated Bytes   :    24488 B (  23.9 KB)
11:59:29:455 ->   Minimum Free Bytes:   367652 B ( 359.0 KB)
11:59:29:443 ->   Total Size        :   402236 B ( 392.8 KB)
11:59:29:462 ->   Largest Free Block:   335860 B ( 328.0 KB)
11:59:29:464 -> ------------------------------------------
11:59:29:464 -> Flash Info:
11:59:29:468 -> ------------------------------------------
11:59:29:471 ->   Chip Size         :  4194304 B (4 MB)
11:59:29:475 ->   Block Size        :    65536 B (  64.0 KB)
11:59:29:479 ->   Sector Size       :     4096 B (   4.0 KB)
11:59:29:483 ->   Page Size         :      256 B (   0.2 KB)
11:59:29:486 ->   Bus Speed         : 80 MHz
11:59:29:488 ->   Bus Mode          : QIO
11:59:29:492 -> ------------------------------------------
11:59:29:493 -> Partitions Info:
11:59:29:497 -> ------------------------------------------
11:59:29:504 ->                 nvs : addr: 0x00009000, size:    20.0 KB, type: DATA, subtype: NVS
11:59:29:512 ->             otadata : addr: 0x0000E000, size:     8.0 KB, type: DATA, subtype: OTA
11:59:29:519 ->                app0 : addr: 0x00010000, size:  1280.0 KB, type:  APP, subtype: OTA_0
11:59:29:527 ->                app1 : addr: 0x00150000, size:  1280.0 KB, type:  APP, subtype: OTA_1
11:59:29:534 ->              spiffs : addr: 0x00290000, size:  1408.0 KB, type: DATA, subtype: SPIFFS
11:59:29:542 ->            coredump : addr: 0x003F0000, size:    64.0 KB, type: DATA, subtype: COREDUMP
11:59:29:546 -> ------------------------------------------
11:59:29:547 -> Software Info:
11:59:29:551 -> ------------------------------------------
11:59:29:559 ->   Compile Date/Time : Dec 16 2024 11:55:34
11:59:29:559 ->   Compile Host OS   : linux
11:59:29:562 ->   ESP-IDF Version   : v5.1.4-972-g632e0c2a9f-dirty
11:59:29:565 ->   Arduino Version   : 3.0.7
11:59:29:573 -> ------------------------------------------
11:59:29:573 -> Board Info:
11:59:29:574 -> ------------------------------------------
11:59:29:577 ->   Arduino Board     : LILYGO_T3S3_SX1262
11:59:29:581 ->   Arduino Variant   : lilygo_t3_s3_sx1262
11:59:29:592 ->   Arduino FQBN      : esp32:esp32:lilygo_t3s3:PSRAM=disabled,LoopCore=1,EventsCore=1,USBMode=hwcdc,CDCOnBoot=cdc,MSCOnBoot=default,DFUOnBoot=default,UploadMode=default,PartitionScheme=default,CPUFreq=240,FlashMode=qio,FlashFreq=80,UploadSpeed=921600,DebugLevel=verbose,EraseFlash=none,Revision=Radio_SX1262
11:59:29:616 -> ============ Before Setup End ============
11:59:29:712 -> [   869][I][esp32-hal-periman.c:141] perimanSetPinBus(): Pin 19 already has type USB_DM (45) with bus 0x3fc94ed0
11:59:29:720 -> [   869][I][esp32-hal-periman.c:141] perimanSetPinBus(): Pin 20 already has type USB_DP (46) with bus 0x3fc94ed0
11:59:29:731 -> [   878][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type SPI_MASTER_SCK (34) successfully set to 0x42008314
11:59:29:743 -> [   890][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type SPI_MASTER_MISO (35) successfully set to 0x4200823c
11:59:29:758 -> [   902][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type SPI_MASTER_MOSI (36) successfully set to 0x42008164
11:59:29:767 -> [   914][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type SPI_MASTER_SS (37) successfully set to 0x42008050
11:59:29:779 -> [   926][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type GPIO (1) successfully set to 0x4202b120
11:59:29:788 -> [   936][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 5 successfully set to type GPIO (1) with bus 0x6
11:59:29:799 -> [   946][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 5 successfully set to type SPI_MASTER_SCK (34) with bus 0x1
11:59:29:810 -> [   957][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type GPIO (1) successfully set to 0x4202b120
11:59:29:819 -> [   968][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 3 successfully set to type GPIO (1) with bus 0x4
11:59:29:830 -> [   977][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 3 successfully set to type SPI_MASTER_MISO (35) with bus 0x1
11:59:29:844 -> [   988][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type GPIO (1) successfully set to 0x4202b120
11:59:29:851 -> [   999][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 6 successfully set to type GPIO (1) with bus 0x7
11:59:29:865 -> [  1008][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 6 successfully set to type SPI_MASTER_MOSI (36) with bus 0x1
11:59:29:875 -> [  1019][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type GPIO (1) successfully set to 0x4202b120
11:59:29:883 -> [  1030][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 7 successfully set to type GPIO (1) with bus 0x8
11:59:29:894 -> [  1040][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type GPIO (1) successfully set to 0x4202b120
11:59:29:903 -> [  1051][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 33 successfully set to type GPIO (1) with bus 0x22
11:59:29:916 -> [  1060][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type GPIO (1) successfully set to 0x4202b120
11:59:29:923 -> [  1071][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 34 successfully set to type GPIO (1) with bus 0x23
11:59:29:935 -> [  1081][V][esp32-hal-periman.c:235] perimanSetBusDeinit(): Deinit function for type GPIO (1) successfully set to 0x4202b120
11:59:29:944 -> [  1092][V][esp32-hal-periman.c:160] perimanSetPinBus(): Pin 8 successfully set to type GPIO (1) with bus 0x9
11:59:29:948 -> RLB_SPI: CMDW	80	
11:59:29:948 -> RLB_SPI: SI		0	
11:59:29:948 -> RLB_SPI: SO	AA	AA	
11:59:29:957 -> RLB_SPI: CMDW	80	
11:59:29:957 -> RLB_SPI: SI		0	
11:59:29:957 -> RLB_SPI: SO	A2	A2	
11:59:29:958 -> RLB_SPI: CMDR	1D	3	20	
11:59:29:958 -> RLB_SPI: SI				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
11:59:29:958 -> RLB_SPI: SO	A2	A2	A2	A2	53	58	31	32	36	31	20	56	32	44	20	32	44	30	11:59:29:961 -> RLB_SPI: CMDW	80	
11:59:29:961 -> RLB_SPI: SI		0	
11:59:29:961 -> RLB_SPI: SO	AA	AA	
32	0	
11:59:29:971 -> RLB_SPI: CMDW	80	
11:59:29:971 -> RLB_SPI: SI		0	
11:59:29:971 -> RLB_SPI: SO	A2	A2	
11:59:29:972 -> RLB_SPI: CMDW	80	
11:59:29:972 -> RLB_SPI: SI		0	
11:59:29:972 -> RLB_SPI: SO	A2	A2	
11:59:29:972 -> RLB_SPI: CMDW	80	
11:59:29:972 -> RLB_SPI: SI		0	
11:59:29:972 -> RLB_SPI: SO	A2	A2	
11:59:29:972 -> RLB_SPI: CMDR	17	
11:59:29:972 -> RLB_SPI: SI		0	0	0	
11:59:29:972 -> RLB_SPI: SO	A2	A2	0	20	
11:59:29:972 -> RLB_SPI: CMDW	7	
11:59:29:972 -> RLB_SPI: SI		0	0	
11:59:29:972 -> RLB_SPI: SO	A2	A2	A2	
11:59:29:972 -> RLB_SPI: CMDW	97	
11:59:29:973 -> RLB_SPI: SI		0	0	1	40	
11:59:29:973 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:29:973 -> RLB_SPI: CMDW	8F	
11:59:29:973 -> RLB_SPI: SI		0	0	
11:59:29:973 -> RLB_SPI: SO	A2	A2	A2	
11:59:29:973 -> RLB_SPI: CMDW	8A	
11:59:29:973 -> RLB_SPI: SI		0	
11:59:29:973 -> RLB_SPI: SO	A2	A2	
11:59:29:973 -> RLB_SPI: CMDW	93	
11:59:29:973 -> RLB_SPI: SI		20	
11:59:29:973 -> RLB_SPI: SO	A2	A2	
11:59:29:973 -> RLB_SPI: CMDW	88	
11:59:29:973 -> RLB_SPI: SI		3	D	A	0	0	0	0	
11:59:29:974 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:974 -> RLB_SPI: CMDW	2	
11:59:29:974 -> RLB_SPI: SI		43	FF	
11:59:29:974 -> RLB_SPI: SO	A2	A2	A2	
8	
11:59:29:974 -> RLB_SPI: SI		0	0	0	0	11:59:29:974 -> RLB_SPI: CMDW	0	0	0	0	
11:59:29:974 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:984 -> RLB_SPI: CMDW	89	
11:59:29:984 -> RLB_SPI: SI		7F	
11:59:29:984 -> RLB_SPI: SO	A2	A2	
11:59:29:993 -> RLB_SPI: CMDR	C0	
11:59:29:993 -> RLB_SPI: SI		0	0	
11:59:29:993 -> RLB_SPI: SO	A2	22	22	
11:59:29:993 -> RLB_SPI: CMDR	11	
11:59:29:993 -> RLB_SPI: SI		0	0	
11:59:29:993 -> RLB_SPI: SO	A2	A2	0	
11:59:29:993 -> RLB_SPI: CMDW	8B	
11:59:29:993 -> RLB_SPI: SI		1	E7	35	9	1A	0	CC	CC	
11:59:29:993 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:993 -> RLB_SPI: CMDR	11	
11:59:29:993 -> RLB_SPI: SI		0	0	
11:59:29:993 -> RLB_SPI: SO	A2	A2	0	
11:59:29:993 -> RLB_SPI: CMDW	8B	
11:59:29:993 -> RLB_SPI: SI		1	E7	35	9	1A	0	EA	7	
11:59:29:993 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:993 -> RLB_SPI: CMDR	11	
11:59:29:993 -> RLB_SPI: SI		0	0	
11:59:29:993 -> RLB_SPI: SO	A2	A2	0	
11:59:29:993 -> RLB_SPI: CMDW	8B	
11:59:29:993 -> RLB_SPI: SI		1	E7	35	9	A	0	EA	7	
11:59:29:993 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:993 -> RLB_SPI: CMDW	D	8	E7	
11:59:29:993 -> RLB_SPI: SI				18	
11:59:29:993 -> RLB_SPI: SO	A2	A2	A2	A2	
11:59:29:993 -> RLB_SPI: CMDR	11	
11:59:29:993 -> RLB_SPI: SI		0	0	
11:59:29:993 -> RLB_SPI: SO	A2	A2	0	
11:59:29:993 -> RLB_SPI: CMDW	8C	
11:59:29:993 -> RLB_SPI: SI		0	20	5	0	0	0	FF	6	0	
11:59:29:993 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:993 -> RLB_SPI: CMDW	96	
11:59:29:993 -> RLB_SPI: SI		1	
11:59:29:993 -> RLB_SPI: SO	A2	A2	
11:59:29:993 -> RLB_SPI: CMDR	11	
11:59:29:993 -> RLB_SPI: SI		0	0	
11:59:29:993 -> RLB_SPI: SO	A2	A2	0	
11:59:29:993 -> RLB_SPI: CMDW	D	6	C0	
11:59:29:993 -> RLB_SPI: SI				12	AD	
11:59:29:993 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:29:994 -> RLB_SPI: CMDW	8C	
11:59:29:994 -> RLB_SPI: SI		0	20	5	10	0	0	FF	6	0	
11:59:29:994 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:994 -> RLB_SPI: CMDR	11	
11:59:29:994 -> RLB_SPI: SI		0	0	
11:59:29:994 -> RLB_SPI: SO	A2	A2	0	
11:59:29:994 -> RLB_SPI: CMDW	8B	
11:59:29:994 -> RLB_SPI: SI		1	E7	35	0	A	0	EA	7	
11:59:29:994 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:995 -> RLB_SPI: CMDR	11	
11:59:29:995 -> RLB_SPI: SI		0	0	
11:59:29:995 -> RLB_SPI: SO	A2	A2	0	
11:59:29:995 -> RLB_SPI: CMDW	8C	
11:59:29:995 -> RLB_SPI: SI		0	20	5	10	0	0	FF	6	0	
11:59:29:995 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:995 -> RLB_SPI: CMDR	11	
11:59:29:995 -> RLB_SPI: SI		0	0	
11:59:29:995 -> RLB_SPI: SO	A2	A2	0	
11:59:29:996 -> RLB_SPI: CMDW	8C	
11:59:29:996 -> RLB_SPI: SI		0	20	5	10	0	1	FF	6	0	
11:59:29:996 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:996 -> RLB_SPI: CMDR	11	
11:59:29:996 -> RLB_SPI: SI		0	0	
11:59:29:996 -> RLB_SPI: SO	A2	A2	0	
11:59:29:996 -> RLB_SPI: CMDW	8C	
11:59:29:996 -> RLB_SPI: SI		0	20	5	10	0	1	FF	6	0	
11:59:29:997 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:29:997 -> RLB_SPI: CMDW	D	6	BC	
11:59:29:997 -> RLB_SPI: SI				1D	F	
11:59:29:997 -> RLB_SPI: SO	A2	A2	A2	A2	A2	11:59:29:997 -> RLB_SPI: CMDW	D	6	BE	

11:59:29:997 -> RLB_SPI: SI				10	21	
11:59:29:997 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:29:997 -> RLB_SPI: CMDW	9D	
11:59:29:997 -> RLB_SPI: SI		1	
11:59:29:998 -> RLB_SPI: SO	A2	A2	
11:59:30:004 -> RLB_SPI: CMDW	98	
11:59:30:004 -> RLB_SPI: SI		D7	DB	
11:59:30:004 -> RLB_SPI: SO	A2	A2	A2	
11:59:30:005 -> RLB_SPI: CMDW	86	
11:59:30:005 -> RLB_SPI: SI		36	44	CC	C0	
11:59:30:005 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:30:005 -> RLB_SPI: CMDR	1D	8	D8	
11:59:30:005 -> RLB_SPI: SI				0	0	
11:59:30:005 -> RLB_SPI: SO	A2	A2	A2	A2	C8	
11:59:30:005 -> RLB_SPI: CMDR	C0	
11:59:30:005 -> RLB_SPI: SI		0	0	
11:59:30:005 -> RLB_SPI: SO	A2	22	22	
11:59:30:005 -> RLB_SPI: CMDW	D	8	D8	
11:59:30:005 -> RLB_SPI: SI				DE	
11:59:30:005 -> RLB_SPI: SO	A2	A2	A2	A2	
11:59:30:006 -> RLB_SPI: CMDR	1D	8	E7	
11:59:30:006 -> RLB_SPI: SI				0	0	
11:59:30:006 -> RLB_SPI: SO	A2	A2	A2	A2	18	
11:59:30:006 -> RLB_SPI: CMDR	C0	
11:59:30:006 -> RLB_SPI: SI		0	0	
11:59:30:006 -> RLB_SPI: SO	A2	22	22	
11:59:30:006 -> RLB_SPI: CMDW	95	
11:59:30:006 -> RLB_SPI: SI		4	7	0	1	
11:59:30:006 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:30:007 -> RLB_SPI: CMDW	8E	
11:59:30:007 -> RLB_SPI: SI		A	4	
11:59:30:007 -> RLB_SPI: SO	A2	A2	A2	
11:59:30:007 -> RLB_SPI: CMDW	D	8	E7	
11:59:30:007 -> RLB_SPI: SI				18	
11:59:30:007 -> RLB_SPI: SO	A2	A2	A2	A2	
11:59:30:007 -> [  1165][D][SX1262_FSK_RX.ino:74] setup(): success!
11:59:30:007 -> RLB_SPI: CMDR	11	
11:59:30:007 -> RLB_SPI: SI		0	0	
11:59:30:007 -> RLB_SPI: SO	A2	A2	0	
11:59:30:007 -> RLB_SPI: CMDW	8C	
11:59:30:008 -> RLB_SPI: SI		0	20	5	10	0	0	1B	6	0	
11:59:30:008 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:30:008 -> RLB_SPI: CMDR	11	
11:59:30:008 -> RLB_SPI: SI		0	0	
11:59:30:008 -> RLB_SPI: SO	A2	A2	0	
11:59:30:008 -> RLB_SPI: CMDW	8C	
11:59:30:008 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
11:59:30:008 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:30:009 -> RLB_SPI: CMDW	D	6	BC	
11:59:30:009 -> RLB_SPI: SI				1D	F	
11:59:30:009 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:30:009 -> RLB_SPI: CMDW	D	6	BE	
11:59:30:009 -> RLB_SPI: SI				10	21	
11:59:30:009 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:30:009 -> RLB_SPI: CMDR	11	
11:59:30:009 -> RLB_SPI: SI		0	0	
11:59:30:009 -> RLB_SPI: SO	A2	A2	0	
11:59:30:009 -> RLB_SPI: CMDW	D	6	C0	
11:59:30:010 -> RLB_SPI: SI				AA	2D	
11:59:30:010 -> RLB_SPI: SO	A2	A2	A2	A2	A2	
11:59:30:010 -> RLB_SPI: CMDW	8C	
11:59:30:010 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
11:59:30:010 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:30:010 -> [  1168][D][SX1262_FSK_RX.ino:114] setup(): [SX1262] Setup complete - awaiting incoming messages...
11:59:30:011 -> RLB_SPI: CMDW	8	
11:59:30:011 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
11:59:30:011 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:30:011 -> RLB_SPI: CMDW	8F	
11:59:30:011 -> RLB_SPI: SI		0	0	
11:59:30:011 -> RLB_SPI: SO	A2	A2	A2	
11:59:30:011 -> RLB_SPI: CMDW	2	
11:59:30:012 -> RLB_SPI: SI		43	FF	
11:59:30:012 -> RLB_SPI: SO	A2	A2	A2	
11:59:30:012 -> RLB_SPI: CMDR	11	
11:59:30:012 -> RLB_SPI: SI		0	0	
11:59:30:012 -> RLB_SPI: SO	A2	A2	0	
11:59:30:012 -> RLB_SPI: CMDW	8C	
11:59:30:012 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
11:59:30:012 -> RLB_SPI: SO	A2	A2	A2	A2	A2	A2	A2	A2	A2	A2	
11:59:30:018 -> RLB_SPI: CMDW	82	
11:59:30:018 -> RLB_SPI: SI		FF	FF	FF	
11:59:30:018 -> RLB_SPI: SO	A2	A2	A2	A2	
11:59:30:018 -> =========== After Setup Start ============
11:59:30:018 -> INTERNAL Memory Info:
11:59:30:019 -> ------------------------------------------
11:59:30:023 ->   Total Size        :   402236 B ( 392.8 KB)
11:59:30:027 ->   Free Bytes        :   371756 B ( 363.0 KB)
11:59:30:031 ->   Allocated Bytes   :    25272 B (  24.7 KB)
11:59:30:035 ->   Minimum Free Bytes:   366652 B ( 358.1 KB)
11:59:30:039 ->   Largest Free Block:   335860 B ( 328.0 KB)
11:59:30:043 -> ------------------------------------------
11:59:30:044 -> GPIO Info:
11:59:30:048 -> ------------------------------------------
11:59:30:050 ->   GPIO : BUS_TYPE[bus/unit][chan]
11:59:30:057 ->   --------------------------------------  
11:59:30:059 ->      3 : SPI_MASTER_MISO[0]
11:59:30:059 ->      5 : SPI_MASTER_SCK[0]
11:59:30:062 ->      6 : SPI_MASTER_MOSI[0]
11:59:30:063 ->      7 : GPIO
11:59:30:066 ->      8 : GPIO
11:59:30:066 ->     19 : USB_DM
11:59:30:067 ->     20 : USB_DP
11:59:30:069 ->     33 : GPIO
11:59:30:072 ->     34 : GPIO
11:59:30:072 ->     43 : UART_TX[0]
11:59:30:074 ->     44 : UART_RX[0]
11:59:30:077 -> ============ After Setup End =============
11:59:30:898 -> RLB_SPI: CMDR	C0	
11:59:30:898 -> RLB_SPI: SI		0	0	
11:59:30:898 -> RLB_SPI: SO	D4	54	54	
11:59:30:898 -> RLB_SPI: CMDR	12	
11:59:30:898 -> RLB_SPI: SI		0	0	0	
11:59:30:898 -> RLB_SPI: SO	D4	D4	0	2	
11:59:30:898 -> RLB_SPI: CMDR	11	
11:59:30:898 -> RLB_SPI: SI		0	0	
11:59:30:898 -> RLB_SPI: SO	D4	D4	0	
11:59:30:898 -> RLB_SPI: CMDR	13	
11:59:30:898 -> RLB_SPI: SI		0	0	0	
11:59:30:898 -> RLB_SPI: SO	D4	D4	FF	0	
11:59:30:899 -> RLB_SPI: CMDR	1E	0	
11:59:30:899 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
11:59:30:899 -> RLB_SPI: SO	D4	D4	D4	D4	BB	E9	39	58	23	76	18	FD	BD	FD	25	88	10	30	96	FF	F0	94	AA	0	0	0	0	0	0	0	
11:59:30:900 -> RLB_SPI: CMDW	2	
11:59:30:900 -> RLB_SPI: SI		43	FF	
11:59:30:900 -> RLB_SPI: SO	D4	D4	D4	
11:59:30:900 -> RLB_SPI: CMDR	14	
11:59:30:900 -> RLB_SPI: SI		0	0	0	0	
11:59:30:900 -> RLB_SPI: SO	D4	D4	2	A2	CE	
11:59:30:900 -> RLB_SPI: CMDW	8	
11:59:30:901 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
11:59:30:901 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
11:59:30:901 -> RLB_SPI: CMDW	8F	
11:59:30:901 -> RLB_SPI: SI		0	0	
11:59:30:901 -> RLB_SPI: SO	D4	D4	D4	
11:59:30:901 -> RLB_SPI: CMDW	2	
11:59:30:901 -> RLB_SPI: SI		43	FF	
11:59:30:901 -> RLB_SPI: SO	D2	D2	D2	
11:59:30:901 -> RLB_SPI: CMDR	11	
11:59:30:901 -> RLB_SPI: SI		0	0	
0	
11:59:30:901 -> RLB_SPI: SO	D2	D2	0	
11:59:30:901 -> RLB_SPI: SO	D2	11:59:30:901 -> RLB_SPI: CMDW	8C	
11:59:30:901 -> RLB_SPI: SI	D2	D2	D2	D2	D2	D2	D2	D2	D2	
11:59:30:902 -> RLB_SPI: CMDW		0	20	5	10	0	0	FF	1	82	
11:59:30:902 -> RLB_SPI: SI		FF	FF	FF	
11:59:30:902 -> RLB_SPI: SO	D2	D2	D2	D2	
11:59:30:902 -> [  2060][V][SX1262_FSK_RX.ino:154] getMessage(): [SX1262] Data: D4 BB E9 39 58 23 76 18 FD BD FD 25 88 10 30 96 FF F0 94 AA 00 00 00 00 00 00 00 
11:59:30:915 -> [  2062][D][SX1262_FSK_RX.ino:156] getMessage(): [SX1262] R [D4] RSSI: -103.0
11:59:42:809 -> RLB_SPI: CMDR	C0	
11:59:42:809 -> RLB_SPI: SI		0	0	
11:59:42:809 -> RLB_SPI: SO	D4	54	54	
11:59:42:809 -> RLB_SPI: CMDR	12	
11:59:42:809 -> RLB_SPI: SI		0	0	0	
11:59:42:810 -> RLB_SPI: SO	D4	D4	0	2	
11:59:42:810 -> RLB_SPI: CMDR	11	
11:59:42:810 -> RLB_SPI: SI		0	0	
11:59:42:810 -> RLB_SPI: SO	D4	D4	0	
11:59:42:810 -> RLB_SPI: CMDR	13	
11:59:42:810 -> RLB_SPI: SI		0	0	0	
11:59:42:810 -> RLB_SPI: SO	D4	D4	FF	FF	
11:59:42:810 -> RLB_SPI: CMDR	1E	FF	
11:59:42:810 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
11:59:42:811 -> RLB_SPI: SO	D4	D4	D4	ED	D4	AC	3B	39	58	23	76	18	FD	9C	FD	25	88	FE	AC	FB	FF	1	D5	AA	0	0	0	0	0	0	
11:59:42:811 -> RLB_SPI: CMDW	2	
11:59:42:811 -> RLB_SPI: SI		43	FF	
11:59:42:811 -> RLB_SPI: SO	D4	D4	D4	
11:59:42:811 -> RLB_SPI: CMDR	14	
11:59:42:811 -> RLB_SPI: SI		0	0	0	0	
11:59:42:812 -> RLB_SPI: SO	D4	D4	2	AD	CA	
11:59:42:812 -> RLB_SPI: CMDW	8	
11:59:42:812 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
11:59:42:812 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
11:59:42:812 -> RLB_SPI: CMDW	8F	
11:59:42:812 -> RLB_SPI: SI		0	0	
11:59:42:812 -> RLB_SPI: SO	D4	D4	D4	
11:59:42:812 -> RLB_SPI: CMDW	2	
11:59:42:812 -> RLB_SPI: SI		43	FF	
11:59:42:812 -> RLB_SPI: SO	D2	D2	D2	
11:59:42:813 -> RLB_SPI: CMDR	11	
11:59:42:813 -> RLB_SPI: SI		0	0	
11:59:42:813 -> RLB_SPI: SO	D2	D2	0	
11:59:42:813 -> RLB_SPI: CMDW	8C	
11:59:42:813 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
11:59:42:813 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
11:59:42:813 -> RLB_SPI: CMDW	82	
11:59:42:813 -> RLB_SPI: SI		FF	FF	FF	
11:59:42:813 -> RLB_SPI: SO	D2	D2	D2	D2	
11:59:54:813 -> RLB_SPI: CMDR	C0	
11:59:54:813 -> RLB_SPI: SI		0	0	
11:59:54:813 -> RLB_SPI: SO	D4	54	54	
11:59:54:813 -> RLB_SPI: CMDR	12	
11:59:54:813 -> RLB_SPI: SI		0	0	0	
11:59:54:813 -> RLB_SPI: SO	D4	D4	0	2	
11:59:54:814 -> RLB_SPI: CMDR	11	
11:59:54:814 -> RLB_SPI: SI		0	0	
11:59:54:814 -> RLB_SPI: SO	D4	D4	0	
11:59:54:814 -> RLB_SPI: CMDR	13	
11:59:54:814 -> RLB_SPI: SI		0	0	0	
11:59:54:814 -> RLB_SPI: SO	D4	D4	FF	FF	
11:59:54:814 -> RLB_SPI: CMDR	1E	FF	
11:59:54:814 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
11:59:54:815 -> RLB_SPI: SO	D4	D4	D4	ED	D4	87	C1	39	58	23	76	18	FE	68	FE	27	28	10	30	96	FF	F0	45	AA	0	0	0	0	0	0	
11:59:54:816 -> RLB_SPI: CMDW	2	
11:59:54:816 -> RLB_SPI: SI		43	FF	
11:59:54:816 -> RLB_SPI: SO	D4	D4	D4	
11:59:54:816 -> RLB_SPI: CMDR	14	
11:59:54:816 -> RLB_SPI: SI		0	0	0	0	
11:59:54:816 -> RLB_SPI: SO	D4	D4	2	AE	C8	
11:59:54:816 -> RLB_SPI: CMDW	8	
11:59:54:816 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
11:59:54:816 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
11:59:54:816 -> RLB_SPI: CMDW	8F	
11:59:54:816 -> RLB_SPI: SI		0	0	
11:59:54:816 -> RLB_SPI: SO	D4	D4	D4	
11:59:54:816 -> RLB_SPI: CMDW	2	
11:59:54:816 -> RLB_SPI: SI		43	FF	
11:59:54:816 -> RLB_SPI: SO	D2	D2	D2	
11:59:54:816 -> RLB_SPI: CMDR	11	
11:59:54:816 -> RLB_SPI: SI		0	0	
11:59:54:816 -> RLB_SPI: SO	D2	D2	0	
11:59:54:817 -> RLB_SPI: CMDW	8C	
11:59:54:817 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
11:59:54:817 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
11:59:54:817 -> RLB_SPI: CMDW	82	
11:59:54:817 -> RLB_SPI: SI		FF	FF	FF	
11:59:54:817 -> RLB_SPI: SO	D2	D2	D2	D2	
11:59:58:117 -> RLB_SPI: CMDR	C0	
11:59:58:117 -> RLB_SPI: SI		0	0	
11:59:58:117 -> RLB_SPI: SO	D4	54	54	
11:59:58:117 -> RLB_SPI: CMDR	12	
11:59:58:117 -> RLB_SPI: SI		0	0	0	
11:59:58:117 -> RLB_SPI: SO	D4	D4	0	2	
11:59:58:118 -> RLB_SPI: CMDR	1E	FF	
11:59:58:118 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
11:59:58:118 -> RLB_SPI: SO	D4	D4	D4	ED	D411:59:58:117 -> RLB_SPI: CMDR	11	
11:59:58:117 -> RLB_SPI: SI		0	0	
11:59:58:117 -> RLB_SPI: SO	D4	D4	0	
11:59:58:117 -> RLB_SPI: CMDR	13	
11:59:58:117 -> RLB_SPI: SI		0	0	0	
11:59:58:117 -> RLB_SPI: SO	D4	D4	FF	FF	
	AC	B7	28	96	67	96	5B	70	0	0	0	0	0	0	0	0	2	87	FB	6D	2F	C6	FB	89	C3	
11:59:58:118 -> RLB_SPI: CMDW	2	
11:59:58:118 -> RLB_SPI: SI		43	FF	
11:59:58:118 -> RLB_SPI: SO	D4	D4	D4	
11:59:58:118 -> RLB_SPI: CMDR	14	
11:59:58:119 -> RLB_SPI: SI		0	0	0	0	
11:59:58:119 -> RLB_SPI: SO	D4	D4	2	85	BC	
11:59:58:119 -> RLB_SPI: CMD
11:59:58:119 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
11:59:58:119 -> RLB_SPI: CMDW	8F	W	8	
11:59:58:119 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
11:59:58:119 -> RLB_SPI: SI		0	0	
11:59:58:119 -> RLB_SPI: SO	D4	D4	D4	
11:59:58:120 -> RLB_SPI: CMDW	2	
11:59:58:120 -> RLB_SPI: SI		43	FF	
11:59:58:120 -> RLB_SPI: SO	D2	D2	D2	
11:59:58:120 -> RLB_SPI: CMDR	11:59:58:120 -> RLB_SPI: SO	D2	D2	11	
11:59:58:120 -> RLB_SPI: SI		0	0	
0	
11:59:58:120 -> RLB_SPI: CMDW	8C	
11:59:58:120 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
11:59:58:120 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
11:59:58:120 -> RLB_SPI: CMDW	82	
11:59:58:120 -> RLB_SPI: SI		FF	FF	FF	
11:59:58:120 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:06:820 -> RLB_SPI: CMDR	C0	
12:00:06:820 -> RLB_SPI: SI		0	0	
12:00:06:820 -> RLB_SPI: SO	D4	54	54	
12:00:06:820 -> RLB_SPI: CMDR	12	
12:00:06:820 -> RLB_SPI: SI		0	0	0	
12:00:06:821 -> RLB_SPI: SO	D4	D4	0	2	
12:00:06:821 -> RLB_SPI: CMDR	11	
12:00:06:821 -> RLB_SPI: SI		0	0	
12:00:06:821 -> RLB_SPI: SO	D4	D4	0	
12:00:06:821 -> RLB_SPI: CMDR	13	
12:00:06:821 -> RLB_SPI: SI		0	0	0	
12:00:06:821 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:06:821 -> RLB_SPI: CMDR	1E	FF	
12:00:06:821 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:06:822 -> RLB_SPI: SO	D4	D4	D4	ED	D4	42	12	39	58	23	0	0	0	0	0	
12:00:06:822 -> RLB_SPI: CMDW	2	
12:00:06:823 -> RLB_SPI: SI		43	FF	
12:00:06:823 -> RLB_SPI: SO	D4	D4	D4	
12:00:06:823 -> RLB_SPI: CMDR	14	
12:00:06:823 -> RLB_SPI: SI		0	0	0	0	
12:00:06:823 -> RLB_SPI: SO	D4	D4	2	AE	D2	
12:00:06:823 -> RLB_SPI: CMDW	8	
12:00:06:823 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	76	18	FE	68	FE	23	48	FE	AC	FB	FF	1	49	AA	0	
12:00:06:823 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:06:823 -> RLB_SPI: CMDW	8F	
12:00:06:823 -> RLB_SPI: SI		0	0	
12:00:06:823 -> RLB_SPI: SO	D4	D4	D4	
12:00:06:823 -> RLB_SPI: CMDW	2	
12:00:06:823 -> RLB_SPI: SI		43	FF	
12:00:06:824 -> RLB_SPI: SO	D2	D2	D2	
12:00:06:824 -> RLB_SPI: CMDR	11	
12:00:06:824 -> RLB_SPI: SI		0	0	
12:00:06:824 -> RLB_SPI: SO	D2	D2	0	
12:00:06:824 -> RLB_SPI: CMDW	8C	
12:00:06:824 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:06:824 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:06:824 -> RLB_SPI: CMDW	82	
12:00:06:824 -> RLB_SPI: SI		FF	FF	FF	
12:00:06:824 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:07:124 -> RLB_SPI: CMDR	C0	
12:00:07:124 -> RLB_SPI: SI		0	0	
12:00:07:124 -> RLB_SPI: SO	D4	54	54	
12:00:07:125 -> RLB_SPI: CMDR	12	
12:00:07:125 -> RLB_SPI: SI		0	0	0	
12:00:07:125 -> RLB_SPI: SO	D4	D4	0	2	
12:00:07:125 -> RLB_SPI: CMDR	11	
12:00:07:125 -> RLB_SPI: SI		0	0	
12:00:07:125 -> RLB_SPI: SO	D4	D4	0	
12:00:07:126 -> RLB_SPI: CMDR	13	
12:00:07:126 -> RLB_SPI: SI		0	0	0	
12:00:07:126 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:07:126 -> RLB_SPI: CMDR	1E	FF	
12:00:07:126 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:07:126 -> RLB_SPI: SO	D4	D4	D4	ED	D4	CA	BA	44	51	EF	D2	98	BE	AA	AA	0	0	0	0	0	0	0	0	0	34	A2	AD	14	4D	2A	
12:00:07:127 -> RLB_SPI: CMDW	2	
12:00:07:127 -> RLB_SPI: SI		43	FF	
12:00:07:127 -> RLB_SPI: SO	D4	D4	D4	
12:00:07:127 -> RLB_SPI: CMDR	14	
12:00:07:127 -> RLB_SPI: SI		0	0	0	0	
12:00:07:127 -> RLB_SPI: SO	D4	D4	2	62	A1	
12:00:07:127 -> RLB_SPI: CMDW	8	
12:00:07:127 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:07:127 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:07:127 -> RLB_SPI: CMDW	8F	
12:00:07:127 -> RLB_SPI: SI		0	0	
12:00:07:127 -> RLB_SPI: SO	D4	D4	D4	
12:00:07:127 -> RLB_SPI: CMDW	2	
12:00:07:127 -> RLB_SPI: SI		43	FF	
12:00:07:127 -> RLB_SPI: SO	D2	D2	D2	
12:00:07:128 -> RLB_SPI: CMDR	11	
12:00:07:128 -> RLB_SPI: SI		0	0	
12:00:07:128 -> RLB_SPI: SO	D2	D2	0	
12:00:07:128 -> RLB_SPI: CMDW	8C	
12:00:07:128 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:07:128 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:07:128 -> RLB_SPI: CMDW	82	
12:00:07:128 -> RLB_SPI: SI		FF	FF	FF	
12:00:07:128 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:11:328 -> RLB_SPI: CMDR	C0	
12:00:11:328 -> RLB_SPI: SI		0	0	
12:00:11:328 -> RLB_SPI: SO	D4	54	54	
12:00:11:328 -> RLB_SPI: CMDR	12	
12:00:11:328 -> RLB_SPI: SI		0	0	0	
12:00:11:328 -> RLB_SPI: SO	D4	D4	0	2	
12:00:11:329 -> RLB_SPI: CMDR	11	
12:00:11:329 -> RLB_SPI: SI		0	0	
12:00:11:329 -> RLB_SPI: SO	D4	D4	0	
12:00:11:329 -> RLB_SPI: CMDR	13	
12:00:11:329 -> RLB_SPI: SI		0	0	0	
12:00:11:329 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:11:329 -> RLB_SPI: CMDR	1E	FF	
12:00:11:329 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:11:329 -> RLB_SPI: SO	D4	D4	D4	ED	D4	78	C9	67	56	63	0	49	BB	BB	BB	BB	B0	10	86	9	BB	B0	F0	0	0	0	0	0	0	0	
12:00:11:330 -> RLB_SPI: CMDW	2	
12:00:11:330 -> RLB_SPI: SI		43	FF	
12:00:11:330 -> RLB_SPI: SO	D4	D4	D4	
12:00:11:330 -> RLB_SPI: CMDR	14	
12:00:11:330 -> RLB_SPI: SI		0	0	0	0	
12:00:11:330 -> RLB_SPI: SO	D4	D4	2	C5	CD	
12:00:11:330 -> RLB_SPI: CMDW	8	
12:00:11:330 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:11:331 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:11:331 -> RLB_SPI: CMDW	8F	
12:00:11:331 -> RLB_SPI: SI		0	0	
12:00:11:331 -> RLB_SPI: SO	D4	D4	D4	
12:00:11:331 -> RLB_SPI: CMDW	2	
12:00:11:331 -> RLB_SPI: SI		43	FF	
12:00:11:331 -> RLB_SPI: SO	D2	D2	D2	
12:00:11:331 -> RLB_SPI: CMDR	11	
12:00:11:331 -> RLB_SPI: SI		0	0	
12:00:11:331 -> RLB_SPI: SO	D2	D2	0	
12:00:11:332 -> RLB_SPI: CMDW	8C	
12:00:11:332 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:11:332 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:11:332 -> RLB_SPI: CMDW	82	
12:00:11:332 -> RLB_SPI: SI		FF	FF	FF	
12:00:11:332 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:18:831 -> RLB_SPI: CMDR	C0	
12:00:18:831 -> RLB_SPI: SI		0	0	
12:00:18:831 -> RLB_SPI: SO	D4	54	54	
12:00:18:831 -> RLB_SPI: CMDR	12	
12:00:18:831 -> RLB_SPI: SI		0	0	0	
12:00:18:831 -> RLB_SPI: SO	D4	D4	0	2	
12:00:18:832 -> RLB_SPI: CMDR	11	
12:00:18:832 -> RLB_SPI: SI		0	0	
12:00:18:832 -> RLB_SPI: SO	D4	D4	0	
12:00:18:832 -> RLB_SPI: CMDR	13	
12:00:18:832 -> RLB_SPI: SI		0	0	0	
12:00:18:832 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:18:832 -> RLB_SPI: CMDR	1E	FF	
12:00:18:832 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:18:832 -> RLB_SPI: SO	D4	D4	D4	ED	D4	FC	25	39	58	23	76	18	FE	EE	FE	23	48	10	30	96	FF	F0	A3	AA	0	0	0	0	0	0	
12:00:18:833 -> RLB_SPI: CMDW	2	
12:00:18:833 -> RLB_SPI: SI		43	FF	
12:00:18:833 -> RLB_SPI: SO	D4	D4	D4	
12:00:18:833 -> RLB_SPI: CMDR	14	
12:00:18:833 -> RLB_SPI: SI		0	0	0	0	
12:00:18:833 -> RLB_SPI: SO	D4	D4	2	AD	D1	
12:00:18:833 -> RLB_SPI: CMDW	8	
12:00:18:834 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:18:834 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:18:834 -> RLB_SPI: CMDW	8F	
12:00:18:834 -> RLB_SPI: SI		0	0	
12:00:18:834 -> RLB_SPI: SO	D4	D4	D4	
12:00:18:834 -> RLB_SPI: CMDW	2	
12:00:18:834 -> RLB_SPI: SI		43	FF	
12:00:18:834 -> RLB_SPI: SO	D2	D2	D2	
12:00:18:834 -> RLB_SPI: CMDR	11	
12:00:18:834 -> RLB_SPI: SI		0	0	
12:00:18:834 -> RLB_SPI: SO	D2	D2	0	
12:00:18:835 -> RLB_SPI: CMDW	8C	
12:00:18:835 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:18:835 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:18:835 -> RLB_SPI: CMDW	82	
12:00:18:835 -> RLB_SPI: SI		FF	FF	FF	
12:00:18:835 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:26:934 -> RLB_SPI: CMDR	C0	
12:00:26:934 -> RLB_SPI: SI		0	0	
12:00:26:934 -> RLB_SPI: SO	D4	54	54	
12:00:26:934 -> RLB_SPI: CMDR	12	
12:00:26:934 -> RLB_SPI: SI		0	0	0	
12:00:26:934 -> RLB_SPI: SO	D4	D4	0	2	
12:00:26:935 -> RLB_SPI: CMDR	11	
12:00:26:935 -> RLB_SPI: SI		0	0	
12:00:26:935 -> RLB_SPI: SO	D4	D4	0	
12:00:26:935 -> RLB_SPI: CMDR	13	
12:00:26:935 -> RLB_SPI: SI		0	0	0	
12:00:26:935 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:26:935 -> RLB_SPI: CMDR	1E	FF	
12:00:26:935 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:26:936 -> RLB_SPI: SO	D4	D4	D4	ED	D4	2	16	FC	2A	AA	9A	89	AA	9A	AA	BA	AA	8A	AA	8A	AA	DA	AA	3A	AB	AA	92	FA	AA	AA	
12:00:26:936 -> RLB_SPI: CMDW	2	
12:00:26:936 -> RLB_SPI: SI		43	FF	
12:00:26:936 -> RLB_SPI: SO	D4	D4	D4	
12:00:26:936 -> RLB_SPI: CMDR	14	
12:00:26:936 -> RLB_SPI: SI		0	0	0	0	
12:00:26:936 -> RLB_SPI: SO	D4	D4	2	53	91	
12:00:26:936 -> RLB_SPI: CMDW	8	
12:00:26:936 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:26:937 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:26:937 -> RLB_SPI: CMDW	8F	
12:00:26:937 -> RLB_SPI: SI		0	0	
12:00:26:937 -> RLB_SPI: SO	D4	D4	D4	
12:00:26:938 -> RLB_SPI: CMDW	2	
12:00:26:938 -> RLB_SPI: SI		43	FF	
12:00:26:938 -> RLB_SPI: SO	D2	D2	D2	
12:00:26:938 -> RLB_SPI: CMDR	11	
12:00:26:938 -> RLB_SPI: SI		0	0	
12:00:26:938 -> RLB_SPI: SO	D2	D2	0	
12:00:26:938 -> RLB_SPI: CMDW	8C	
12:00:26:938 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:26:938 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:26:938 -> RLB_SPI: CMDW	82	
12:00:26:938 -> RLB_SPI: SI		FF	FF	FF	
12:00:26:938 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:30:839 -> RLB_SPI: CMDR	C0	
12:00:30:839 -> RLB_SPI: SI		0	0	
12:00:30:839 -> RLB_SPI: SO	D4	54	54	
12:00:30:839 -> RLB_SPI: CMDR	12	
12:00:30:839 -> RLB_SPI: SI		0	0	0	
12:00:30:839 -> RLB_SPI: SO	D4	D4	0	2	
12:00:30:839 -> RLB_SPI: CMDR	11	
12:00:30:839 -> RLB_SPI: SI		0	0	
12:00:30:839 -> RLB_SPI: SO	D4	D4	0	
12:00:30:840 -> RLB_SPI: CMDR	13	
12:00:30:840 -> RLB_SPI: SI		0	0	0	
12:00:30:840 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:30:840 -> RLB_SPI: CMDR	1E	FF	
12:00:30:840 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:30:840 -> RLB_SPI: SO	D4	D4	D4	ED	D4	60	23	39	58	23	76	18	FC	F8	FD	20	48	FE	AC	FB	FF	1	BF	AA	0	0	0	0	0	0	
12:00:30:840 -> RLB_SPI: CMDW	2	
12:00:30:840 -> RLB_SPI: SI		43	FF	
12:00:30:840 -> RLB_SPI: SO	D4	D4	D4	
12:00:30:841 -> RLB_SPI: CMDR	14	
12:00:30:841 -> RLB_SPI: SI		0	0	0	0	
12:00:30:841 -> RLB_SPI: SO	D4	D4	2	B0	CC	
12:00:30:841 -> RLB_SPI: CMDW	8	
12:00:30:841 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:30:841 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:30:841 -> RLB_SPI: CMDW	8F	
12:00:30:841 -> RLB_SPI: SI		0	0	
12:00:30:842 -> RLB_SPI: SO	D4	D4	D4	
12:00:30:842 -> RLB_SPI: CMDW	2	
12:00:30:842 -> RLB_SPI: SI		43	FF	
12:00:30:842 -> RLB_SPI: SO	D2	D2	D2	
12:00:30:842 -> RLB_SPI: CMDR	11	
12:00:30:842 -> RLB_SPI: SI		0	0	
12:00:30:842 -> RLB_SPI: SO	D2	D2	0	
12:00:30:842 -> RLB_SPI: CMDW	8C	
12:00:30:842 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:30:842 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:30:842 -> RLB_SPI: CMDW	82	
12:00:30:842 -> RLB_SPI: SI		FF	FF	FF	
12:00:30:843 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:38:942 -> RLB_SPI: CMDR	C0	
12:00:38:942 -> RLB_SPI: SI		0	0	
12:00:38:942 -> RLB_SPI: SO	D4	54	54	
12:00:38:942 -> RLB_SPI: CMDR	12	
12:00:38:942 -> RLB_SPI: SI		0	0	0	
12:00:38:942 -> RLB_SPI: SO	D4	D4	0	2	
12:00:38:943 -> RLB_SPI: CMDR	11	
12:00:38:943 -> RLB_SPI: SI		0	0	
12:00:38:943 -> RLB_SPI: SO	D4	D4	0	
12:00:38:943 -> RLB_SPI: CMDR	13	
12:00:38:943 -> RLB_SPI: SI		0	0	0	
12:00:38:943 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:38:943 -> RLB_SPI: CMDR	1E	FF	
12:00:38:943 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:38:943 -> RLB_SPI: SO	D4	D4	D4	ED	D4	6F	59	79	38	83	A2	18	FE	DD	FE	4	88	10	36	B4	FF	F0	F4	AA	0	0	1	2	50	8	
12:00:38:943 -> RLB_SPI: CMDW	2	
12:00:38:943 -> RLB_SPI: SI		43	FF	
12:00:38:943 -> RLB_SPI: SO	D4	D4	D4	
12:00:38:944 -> RLB_SPI: CMDR	14	
12:00:38:944 -> RLB_SPI: SI		0	0	0	0	
12:00:38:944 -> RLB_SPI: SO	D4	D4	2	C5	CC	
12:00:38:944 -> RLB_SPI: CMDW	8	
12:00:38:944 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:38:944 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:38:944 -> RLB_SPI: CMDW	8F	
12:00:38:944 -> RLB_SPI: SI		0	0	
12:00:38:944 -> RLB_SPI: SO	D4	D4	D4	
12:00:38:945 -> RLB_SPI: CMDW	2	
12:00:38:945 -> RLB_SPI: SI		43	FF	
12:00:38:945 -> RLB_SPI: SO	D2	D2	D2	
12:00:38:945 -> RLB_SPI: CMDR	11	
12:00:38:945 -> RLB_SPI: SI		0	0	
12:00:38:945 -> RLB_SPI: SO	D2	D2	0	
12:00:38:945 -> RLB_SPI: CMDW	8C	
12:00:38:945 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:38:945 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:38:946 -> RLB_SPI: CMDW	82	
12:00:38:946 -> RLB_SPI: SI		FF	FF	FF	
12:00:38:946 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:42:846 -> RLB_SPI: CMDR	C0	
12:00:42:846 -> RLB_SPI: SI		0	0	
12:00:42:846 -> RLB_SPI: SO	D4	54	54	
12:00:42:846 -> RLB_SPI: CMDR	12	
12:00:42:846 -> RLB_SPI: SI		0	0	0	
12:00:42:846 -> RLB_SPI: SO	D4	D4	0	2	
12:00:42:847 -> RLB_SPI: CMDR	11	
12:00:42:847 -> RLB_SPI: SI		0	0	
12:00:42:847 -> RLB_SPI: SO	D4	D4	0	
12:00:42:847 -> RLB_SPI: CMDR	13	
12:00:42:847 -> RLB_SPI: SI		0	0	0	
12:00:42:847 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:42:847 -> RLB_SPI: CMDR	1E	FF	
12:00:42:847 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:42:847 -> RLB_SPI: SO	D4	D4	D4	ED	D4	5D	52	39	58	23	76	18	FC	9B	FC	24	68	10	30	96	FF	F0	D9	AA	0	0	0	0	0	0	
12:00:42:848 -> RLB_SPI: CMDW	2	
12:00:42:848 -> RLB_SPI: SI		43	FF	
12:00:42:848 -> RLB_SPI: SO	D4	D4	D4	
12:00:42:849 -> RLB_SPI: CMDR	14	
12:00:42:849 -> RLB_SPI: SI		0	0	0	0	
12:00:42:849 -> RLB_SPI: SO	D4	D4	2	AB	CF	
12:00:42:849 -> RLB_SPI: CMDW	8	
12:00:42:849 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:42:849 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:42:849 -> RLB_SPI: CMDW	8F	
12:00:42:849 -> RLB_SPI: SI		0	0	
12:00:42:849 -> RLB_SPI: SO	D4	D4	D4	
12:00:42:849 -> RLB_SPI: CMDW	2	
12:00:42:849 -> RLB_SPI: SI		43	FF	
12:00:42:849 -> RLB_SPI: SO	D2	D2	D2	
12:00:42:849 -> RLB_SPI: CMDR	11	
12:00:42:849 -> RLB_SPI: SI		0	0	
12:00:42:849 -> RLB_SPI: SO	D2	D2	0	
12:00:42:850 -> RLB_SPI: CMDW	8C	
12:00:42:850 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:42:850 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:42:850 -> RLB_SPI: CMDW	82	
12:00:42:850 -> RLB_SPI: SI		FF	FF	FF	
12:00:42:850 -> RLB_SPI: SO	D2	D2	D2	D2	
12:00:54:849 -> RLB_SPI: CMDR	C0	
12:00:54:849 -> RLB_SPI: SI		0	0	
12:00:54:849 -> RLB_SPI: SO	D4	54	54	
12:00:54:850 -> RLB_SPI: CMDR	12	
12:00:54:850 -> RLB_SPI: SI		0	0	0	
12:00:54:850 -> RLB_SPI: SO	D4	D4	0	2	
12:00:54:850 -> RLB_SPI: CMDR	11	
12:00:54:850 -> RLB_SPI: SI		0	0	
12:00:54:850 -> RLB_SPI: SO	D4	D4	0	
12:00:54:850 -> RLB_SPI: CMDR	13	
12:00:54:850 -> RLB_SPI: SI		0	0	0	
12:00:54:850 -> RLB_SPI: SO	D4	D4	FF	FF	
12:00:54:850 -> RLB_SPI: CMDR	1E	FF	
12:00:54:850 -> RLB_SPI: SI			0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	
12:00:54:850 -> RLB_SPI: SO	D4	D4	D4	ED	D4	D6	25	39	58	23	76	18	FC	7B	FC	25	58	FE	AC	FB	FF	1	28	AA	0	0	0	0	0	0	
12:00:54:850 -> RLB_SPI: CMDW	2	
12:00:54:850 -> RLB_SPI: SI		43	FF	
12:00:54:850 -> RLB_SPI: SO	D4	D4	D4	
12:00:54:850 -> RLB_SPI: CMDR	14	
12:00:54:850 -> RLB_SPI: SI		0	0	0	0	
12:00:54:850 -> RLB_SPI: SO	D4	D4	2	A9	CB	
12:00:54:851 -> RLB_SPI: CMDW	8	
12:00:54:851 -> RLB_SPI: SI		2	72	0	2	0	0	0	0	
12:00:54:851 -> RLB_SPI: SO	D4	D4	D4	D4	D4	D4	D4	D4	D4	
12:00:54:851 -> RLB_SPI: CMDW	8F	
12:00:54:851 -> RLB_SPI: SI		0	0	
12:00:54:851 -> RLB_SPI: SO	D4	D4	D4	
12:00:54:851 -> RLB_SPI: CMDW	2	
12:00:54:851 -> RLB_SPI: SI		43	FF	
12:00:54:851 -> RLB_SPI: SO	D2	D2	D2	
12:00:54:852 -> RLB_SPI: CMDR	11	
12:00:54:852 -> RLB_SPI: SI		0	0	
12:00:54:852 -> RLB_SPI: SO	D2	D2	0	
12:00:54:852 -> RLB_SPI: CMDW	8C	
12:00:54:852 -> RLB_SPI: SI		0	20	5	10	0	0	FF	1	0	
12:00:54:852 -> RLB_SPI: SO	D2	D2	D2	D2	D2	D2	D2	D2	D2	D2	
12:00:54:852 -> RLB_SPI: CMDW	82	
12:00:54:852 -> RLB_SPI: SI		FF	FF	FF	
12:00:54:853 -> RLB_SPI: SO	D2	D2	D2	D2