Debug: 6 13 log.c:251 handle_log_output_command(): set log_output to "log.txt"
Debug: 7 13 options.c:346 parse_cmdline_args(): ARGV[0] = "openocd"
Debug: 8 13 options.c:346 parse_cmdline_args(): ARGV[1] = "-f"
Debug: 9 13 options.c:346 parse_cmdline_args(): ARGV[2] = "board/esp32s3-builtin.cfg"
Debug: 10 13 options.c:346 parse_cmdline_args(): ARGV[3] = "-c"
Debug: 11 13 options.c:346 parse_cmdline_args(): ARGV[4] = "esp stub_log on"
Debug: 12 13 options.c:346 parse_cmdline_args(): ARGV[5] = "-d3"
Debug: 13 13 options.c:346 parse_cmdline_args(): ARGV[6] = "-l"
Debug: 14 13 options.c:346 parse_cmdline_args(): ARGV[7] = "log.txt"
Debug: 15 13 options.c:233 add_default_dirs(): bindir=/builds/idf/openocd-esp32/_build/../openocd-esp32/bin
Debug: 16 13 options.c:234 add_default_dirs(): pkgdatadir=/builds/idf/openocd-esp32/_build/../openocd-esp32/share/openocd
Debug: 17 13 options.c:235 add_default_dirs(): exepath=C:/Espressif/tools/openocd-esp32/v0.12.0-esp32-20240318/openocd-esp32/bin
Debug: 18 13 options.c:236 add_default_dirs(): bin2data=../share/openocd
Debug: 19 13 configuration.c:33 add_script_search_dir(): adding C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts
Debug: 20 13 configuration.c:33 add_script_search_dir(): adding C:/Users/Attila/AppData/Roaming/OpenOCD
Debug: 21 13 configuration.c:33 add_script_search_dir(): adding C:/Espressif/tools/openocd-esp32/v0.12.0-esp32-20240318/openocd-esp32/bin/../share/openocd/site
Debug: 22 13 configuration.c:33 add_script_search_dir(): adding C:/Espressif/tools/openocd-esp32/v0.12.0-esp32-20240318/openocd-esp32/bin/../share/openocd/scripts
Debug: 23 13 command.c:152 script_debug(): command - ocd_find board/esp32s3-builtin.cfg
Debug: 24 13 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/board/esp32s3-builtin.cfg
Debug: 25 13 command.c:152 script_debug(): command - ocd_find interface/esp_usb_jtag.cfg
Debug: 26 13 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/interface/esp_usb_jtag.cfg
Debug: 27 13 command.c:152 script_debug(): command - adapter driver esp_usb_jtag
Info : 28 13 transport.c:106 allow_transports(): only one transport option; autoselecting 'jtag'
Debug: 29 13 command.c:152 script_debug(): command - espusbjtag vid_pid 0x303a 0x1001
Info : 30 13 esp_usb_jtag.c:901 esp_usb_jtag_vid_pid(): esp_usb_jtag: VID set to 0x303a and PID to 0x1001
Debug: 31 13 command.c:152 script_debug(): command - espusbjtag caps_descriptor 0x2000
Info : 32 13 esp_usb_jtag.c:912 esp_usb_jtag_caps_descriptor(): esp_usb_jtag: capabilities descriptor set to 0x2000
Debug: 33 13 command.c:152 script_debug(): command - adapter speed 40000
Debug: 34 13 adapter.c:250 adapter_config_khz(): handle adapter khz
Debug: 35 13 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 36 13 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 37 13 command.c:152 script_debug(): command - ocd_find target/esp32s3.cfg
Debug: 38 27 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/target/esp32s3.cfg
Debug: 39 27 command.c:152 script_debug(): command - ocd_find target/esp_common.cfg
Debug: 40 27 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/target/esp_common.cfg
Debug: 41 28 command.c:152 script_debug(): command - ocd_find bitsbytes.tcl
Debug: 42 28 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/bitsbytes.tcl
Debug: 43 28 command.c:152 script_debug(): command - ocd_find memory.tcl
Debug: 44 28 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/memory.tcl
Debug: 45 28 command.c:152 script_debug(): command - ocd_find mmr_helpers.tcl
Debug: 46 29 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/mmr_helpers.tcl
Debug: 47 29 command.c:152 script_debug(): command - ocd_find target/esp_version.cfg
Debug: 48 29 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/target/esp_version.cfg
Debug: 49 29 command.c:152 script_debug(): command - version
Debug: 50 29 command.c:152 script_debug(): command - add_help_text program_esp write an image to flash, address is only required for binary images. verify, reset, exit, compress, restore_clock and encrypt are optional
Debug: 51 29 command.c:152 script_debug(): command - add_usage_text program_esp <filename> [address] [verify] [reset] [exit] [compress] [no_clock_boost] [restore_clock] [encrypt]
Debug: 52 29 command.c:152 script_debug(): command - add_help_text program_esp_bins write all the images at address specified in flasher_args.json generated while building idf project
Debug: 53 29 command.c:152 script_debug(): command - add_usage_text program_esp_bins <build_dir> flasher_args.json [verify] [reset] [exit] [compress] [no_clock_boost] [restore_clock]
Debug: 54 29 command.c:152 script_debug(): command - add_help_text esp_get_mac Print MAC address of the chip. Use a `format` argument to return formatted MAC value
Debug: 55 29 command.c:152 script_debug(): command - add_usage_text esp_get_mac [format]
Debug: 56 29 command.c:152 script_debug(): command - jtag newtap esp32s3 cpu0 -irlen 5 -expected-id 0x120034e5
Debug: 57 29 tcl.c:402 handle_jtag_newtap_args(): Creating New Tap, Chip: esp32s3, Tap: cpu0, Dotted: esp32s3.cpu0, 4 params
Debug: 58 29 core.c:1476 jtag_tap_init(): Created Tap: esp32s3.cpu0 @ abs position 0, irlen 5, capture: 0x1 mask: 0x3
Debug: 59 29 command.c:152 script_debug(): command - jtag newtap esp32s3 cpu1 -irlen 5 -expected-id 0x120034e5
Debug: 60 29 tcl.c:402 handle_jtag_newtap_args(): Creating New Tap, Chip: esp32s3, Tap: cpu1, Dotted: esp32s3.cpu1, 4 params
Debug: 61 29 core.c:1476 jtag_tap_init(): Created Tap: esp32s3.cpu1 @ abs position 1, irlen 5, capture: 0x1 mask: 0x3
Debug: 62 29 command.c:152 script_debug(): command - target create esp32s3.cpu0 esp32s3 -chain-position esp32s3.cpu0 -coreid 0 -rtos FreeRTOS
Debug: 63 29 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 64 29 FreeRTOS.c:1431 freertos_create(): freertos_create
Debug: 65 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 66 29 command.c:258 register_command(): command 'esp32s3.cpu0 esp' is already registered
Debug: 67 29 command.c:152 script_debug(): command - target create esp32s3.cpu1 esp32s3 -chain-position esp32s3.cpu1 -coreid 1 -rtos FreeRTOS
Debug: 68 29 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 69 29 FreeRTOS.c:1431 freertos_create(): freertos_create
Debug: 70 29 command.c:258 register_command(): command 'xtensa' is already registered
Debug: 71 29 command.c:258 register_command(): command 'xtensa xtdef' is already registered
Debug: 72 29 command.c:258 register_command(): command 'xtensa xtopt' is already registered
Debug: 73 29 command.c:258 register_command(): command 'xtensa xtmem' is already registered
Debug: 74 29 command.c:258 register_command(): command 'xtensa xtmmu' is already registered
Debug: 75 29 command.c:258 register_command(): command 'xtensa xtmpu' is already registered
Debug: 76 29 command.c:258 register_command(): command 'xtensa xtreg' is already registered
Debug: 77 29 command.c:258 register_command(): command 'xtensa xtregs' is already registered
Debug: 78 29 command.c:258 register_command(): command 'xtensa xtregfmt' is already registered
Debug: 79 29 command.c:258 register_command(): command 'xtensa set_permissive' is already registered
Debug: 80 29 command.c:258 register_command(): command 'xtensa maskisr' is already registered
Debug: 81 29 command.c:258 register_command(): command 'xtensa smpbreak' is already registered
Debug: 82 29 command.c:258 register_command(): command 'xtensa perfmon_enable' is already registered
Debug: 83 29 command.c:258 register_command(): command 'xtensa perfmon_dump' is already registered
Debug: 84 29 command.c:258 register_command(): command 'xtensa tracestart' is already registered
Debug: 85 29 command.c:258 register_command(): command 'xtensa tracestop' is already registered
Debug: 86 29 command.c:258 register_command(): command 'xtensa tracedump' is already registered
Debug: 87 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 88 29 command.c:258 register_command(): command 'esp gdb_detach_handler' is already registered
Debug: 89 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 90 29 command.c:258 register_command(): command 'esp apptrace' is already registered
Debug: 91 29 command.c:258 register_command(): command 'esp sysview' is already registered
Debug: 92 29 command.c:258 register_command(): command 'esp sysview_mcore' is already registered
Debug: 93 29 command.c:258 register_command(): command 'esp gcov' is already registered
Debug: 94 29 command.c:258 register_command(): command 'esp32' is already registered
Debug: 95 29 command.c:258 register_command(): command 'esp32 smp' is already registered
Debug: 96 29 command.c:258 register_command(): command 'esp32 smp_gdb' is already registered
Debug: 97 29 command.c:258 register_command(): command 'arm' is already registered
Debug: 98 29 command.c:258 register_command(): command 'arm semihosting' is already registered
Debug: 99 29 command.c:258 register_command(): command 'arm semihosting_redirect' is already registered
Debug: 100 29 command.c:258 register_command(): command 'arm semihosting_cmdline' is already registered
Debug: 101 29 command.c:258 register_command(): command 'arm semihosting_fileio' is already registered
Debug: 102 29 command.c:258 register_command(): command 'arm semihosting_resexit' is already registered
Debug: 103 29 command.c:258 register_command(): command 'arm semihosting_read_user_param' is already registered
Debug: 104 29 command.c:258 register_command(): command 'arm semihosting_basedir' is already registered
Debug: 105 29 command.c:258 register_command(): command 'esp32s3.cpu1 esp' is already registered
Debug: 106 29 command.c:152 script_debug(): command - target smp esp32s3.cpu0 esp32s3.cpu1
Debug: 107 29 target.c:6018 handle_target_smp(): 2
Debug: 108 29 target.c:5974 create_target_list_node(): esp32s3.cpu0 
Debug: 109 29 target.c:5974 create_target_list_node(): esp32s3.cpu1 
Debug: 110 29 command.c:152 script_debug(): command - esp32s3.cpu0 configure -work-area-phys 0x3FC9C000 -work-area-virt 0x3FC9C000 -work-area-size 0x24000 -work-area-backup 1
Debug: 111 29 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 112 29 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 113 29 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 114 29 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 115 29 command.c:152 script_debug(): command - flash bank esp32s3.cpu0.flash esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 116 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 117 29 tcl.c:1307 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 118 29 command.c:152 script_debug(): command - flash bank esp32s3.cpu0.irom esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 119 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 120 29 command.c:258 register_command(): command 'esp appimage_offset' is already registered
Debug: 121 29 command.c:258 register_command(): command 'esp compression' is already registered
Debug: 122 29 command.c:258 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 123 29 command.c:258 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 124 29 command.c:258 register_command(): command 'esp encrypt_binary' is already registered
Debug: 125 29 command.c:258 register_command(): command 'esp stub_log' is already registered
Debug: 126 29 command.c:258 register_command(): command 'esp32s3' is already registered
Debug: 127 29 command.c:258 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 128 29 command.c:258 register_command(): command 'esp32s3 compression' is already registered
Debug: 129 29 command.c:258 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 130 29 command.c:258 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 131 29 command.c:258 register_command(): command 'esp32s3 encrypt_binary' is already registered
Debug: 132 29 command.c:258 register_command(): command 'esp32s3 stub_log' is already registered
Debug: 133 29 tcl.c:1307 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 134 29 command.c:152 script_debug(): command - flash bank esp32s3.cpu0.drom esp32s3 0x0 0 0 0 esp32s3.cpu0
Debug: 135 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 136 29 command.c:258 register_command(): command 'esp appimage_offset' is already registered
Debug: 137 29 command.c:258 register_command(): command 'esp compression' is already registered
Debug: 138 29 command.c:258 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 139 29 command.c:258 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 140 29 command.c:258 register_command(): command 'esp encrypt_binary' is already registered
Debug: 141 29 command.c:258 register_command(): command 'esp stub_log' is already registered
Debug: 142 29 command.c:258 register_command(): command 'esp32s3' is already registered
Debug: 143 29 command.c:258 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 144 29 command.c:258 register_command(): command 'esp32s3 compression' is already registered
Debug: 145 29 command.c:258 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 146 29 command.c:258 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 147 29 command.c:258 register_command(): command 'esp32s3 encrypt_binary' is already registered
Debug: 148 29 command.c:258 register_command(): command 'esp32s3 stub_log' is already registered
Debug: 149 29 tcl.c:1307 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 150 29 command.c:152 script_debug(): command - flash bank esp32s3.cpu1.flash esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 151 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 152 29 command.c:258 register_command(): command 'esp appimage_offset' is already registered
Debug: 153 29 command.c:258 register_command(): command 'esp compression' is already registered
Debug: 154 29 command.c:258 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 155 29 command.c:258 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 156 29 command.c:258 register_command(): command 'esp encrypt_binary' is already registered
Debug: 157 29 command.c:258 register_command(): command 'esp stub_log' is already registered
Debug: 158 29 command.c:258 register_command(): command 'esp32s3' is already registered
Debug: 159 29 command.c:258 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 160 29 command.c:258 register_command(): command 'esp32s3 compression' is already registered
Debug: 161 29 command.c:258 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 162 29 command.c:258 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 163 29 command.c:258 register_command(): command 'esp32s3 encrypt_binary' is already registered
Debug: 164 29 command.c:258 register_command(): command 'esp32s3 stub_log' is already registered
Debug: 165 29 tcl.c:1307 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 166 29 command.c:152 script_debug(): command - flash bank esp32s3.cpu1.irom esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 167 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 168 29 command.c:258 register_command(): command 'esp appimage_offset' is already registered
Debug: 169 29 command.c:258 register_command(): command 'esp compression' is already registered
Debug: 170 29 command.c:258 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 171 29 command.c:258 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 172 29 command.c:258 register_command(): command 'esp encrypt_binary' is already registered
Debug: 173 29 command.c:258 register_command(): command 'esp stub_log' is already registered
Debug: 174 29 command.c:258 register_command(): command 'esp32s3' is already registered
Debug: 175 29 command.c:258 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 176 29 command.c:258 register_command(): command 'esp32s3 compression' is already registered
Debug: 177 29 command.c:258 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 178 29 command.c:258 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 179 29 command.c:258 register_command(): command 'esp32s3 encrypt_binary' is already registered
Debug: 180 29 command.c:258 register_command(): command 'esp32s3 stub_log' is already registered
Debug: 181 29 tcl.c:1307 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 182 29 command.c:152 script_debug(): command - flash bank esp32s3.cpu1.drom esp32s3 0x0 0 0 0 esp32s3.cpu1
Debug: 183 29 command.c:258 register_command(): command 'esp' is already registered
Debug: 184 29 command.c:258 register_command(): command 'esp appimage_offset' is already registered
Debug: 185 29 command.c:258 register_command(): command 'esp compression' is already registered
Debug: 186 29 command.c:258 register_command(): command 'esp verify_bank_hash' is already registered
Debug: 187 29 command.c:258 register_command(): command 'esp flash_stub_clock_boost' is already registered
Debug: 188 29 command.c:258 register_command(): command 'esp encrypt_binary' is already registered
Debug: 189 29 command.c:258 register_command(): command 'esp stub_log' is already registered
Debug: 190 29 command.c:258 register_command(): command 'esp32s3' is already registered
Debug: 191 29 command.c:258 register_command(): command 'esp32s3 appimage_offset' is already registered
Debug: 192 29 command.c:258 register_command(): command 'esp32s3 compression' is already registered
Debug: 193 29 command.c:258 register_command(): command 'esp32s3 verify_bank_hash' is already registered
Debug: 194 29 command.c:258 register_command(): command 'esp32s3 flash_stub_clock_boost' is already registered
Debug: 195 29 command.c:258 register_command(): command 'esp32s3 encrypt_binary' is already registered
Debug: 196 29 command.c:258 register_command(): command 'esp32s3 stub_log' is already registered
Debug: 197 29 tcl.c:1307 handle_flash_bank_command(): 'esp32s3' driver usage field missing
Debug: 198 29 command.c:152 script_debug(): command - esp32s3.cpu0 configure -event examine-end 
		# Need to enable to set 'semihosting_basedir'
		arm semihosting enable
		arm semihosting_resexit enable
		if { [info exists _SEMIHOST_BASEDIR] } {
			if { $_SEMIHOST_BASEDIR != "" } {
				arm semihosting_basedir $_SEMIHOST_BASEDIR
			}
		}
	
Debug: 199 29 command.c:152 script_debug(): command - esp32s3.cpu1 configure -event examine-end 
			# Need to enable to set 'semihosting_basedir'
			arm semihosting enable
			arm semihosting_resexit enable
			if { [info exists _SEMIHOST_BASEDIR] } {
				if { $_SEMIHOST_BASEDIR != "" } {
					arm semihosting_basedir $_SEMIHOST_BASEDIR
				}
			}
		
Debug: 200 29 command.c:152 script_debug(): command - esp32s3.cpu0 configure -event reset-assert-post 
		global _ESP_SOC_RESET
		$_ESP_SOC_RESET
	
Debug: 201 29 command.c:152 script_debug(): command - esp32s3.cpu1 configure -event reset-assert-post 
			global _ESP_SOC_RESET
			$_ESP_SOC_RESET
		
Debug: 202 29 command.c:152 script_debug(): command - esp32s3.cpu0 configure -event gdb-attach 
		if { $_ESP_SMP_BREAK != 0 } {
			$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
		}
		# necessary to auto-probe flash bank when GDB is connected and generate proper memory map
		halt 1000
		if { [$_ESP_MEMPROT_IS_ENABLED] } {
			# 'reset halt' to disable memory protection and allow flasher to work correctly
			echo "Memory protection is enabled. Reset target to disable it..."
			reset halt
		}

		if { $_ESP_ARCH == "riscv" } {
			# by default mask interrupts while stepping
			riscv set_maskisr steponly
		}
	
Debug: 203 29 command.c:152 script_debug(): command - esp32s3.cpu1 configure -event gdb-attach 
			if { $_ESP_SMP_BREAK != 0 } {
				$_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
			}
			# necessary to auto-probe flash bank when GDB is connected
			halt 1000
			if { [$_ESP_MEMPROT_IS_ENABLED] } {
				# 'reset halt' to disable memory protection and allow flasher to work correctly
				echo "Memory protection is enabled. Reset target to disable it..."
				reset halt
			}
		
Debug: 204 29 command.c:152 script_debug(): command - esp32s3.cpu0 configure -event gdb-detach 
		$_TARGETNAME_0 esp gdb_detach_handler
	
Debug: 205 29 command.c:152 script_debug(): command - esp32s3.cpu1 configure -event gdb-detach 
			$_TARGETNAME_1 esp gdb_detach_handler
		
Debug: 206 29 command.c:152 script_debug(): command - esp32s3.cpu0 xtensa maskisr on
Debug: 207 29 command.c:152 script_debug(): command - esp32s3.cpu0 xtensa smpbreak BreakIn BreakOut
Debug: 208 29 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=1
Debug: 209 29 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu1] set smpbreak=30000, state=1
Debug: 210 29 command.c:152 script_debug(): command - ocd_find target/xtensa-core-esp32s3.cfg
Debug: 211 29 configuration.c:88 find_file(): found C:\Espressif\tools\openocd-esp32\v0.12.0-esp32-20240318\openocd-esp32\share\openocd\scripts/target/xtensa-core-esp32s3.cfg
Debug: 212 29 command.c:152 script_debug(): command - xtensa xtdef LX
Debug: 213 29 command.c:152 script_debug(): command - xtensa xtopt arnum 64
Debug: 214 29 command.c:152 script_debug(): command - xtensa xtopt windowed 1
Debug: 215 29 command.c:152 script_debug(): command - xtensa xtopt exceptions 1
Debug: 216 29 command.c:152 script_debug(): command - xtensa xtopt hipriints 1
Debug: 217 29 command.c:152 script_debug(): command - xtensa xtopt intlevels 6
Debug: 218 29 command.c:152 script_debug(): command - xtensa xtopt excmlevel 3
Debug: 219 29 command.c:152 script_debug(): command - xtensa xtmem irom 0x42000000 0x2000000
Debug: 220 29 command.c:152 script_debug(): command - xtensa xtmem irom 0x40000000 0x60000
Debug: 221 29 command.c:152 script_debug(): command - xtensa xtmem iram 0x40370000 0x70000
Debug: 222 29 command.c:152 script_debug(): command - xtensa xtmem iram 0x600FE000 0x2000
Debug: 223 29 command.c:152 script_debug(): command - xtensa xtmem drom 0x3C000000 0x1000000
Debug: 224 29 command.c:152 script_debug(): command - xtensa xtmem drom 0x3FF00000 0x20000
Debug: 225 29 command.c:152 script_debug(): command - xtensa xtmem dram 0x3FC88000 0x78000
Debug: 226 29 command.c:152 script_debug(): command - xtensa xtmem dram 0x600FE000 0x2000
Debug: 227 29 command.c:152 script_debug(): command - xtensa xtmem dram 0x50000000 0x2000
Debug: 228 29 command.c:152 script_debug(): command - xtensa xtmem dram 0x60000000 0x10000000
Debug: 229 29 command.c:152 script_debug(): command - xtensa xtopt debuglevel 6
Debug: 230 29 command.c:152 script_debug(): command - xtensa xtopt ibreaknum 2
Debug: 231 29 command.c:152 script_debug(): command - xtensa xtopt dbreaknum 2
Debug: 232 29 command.c:152 script_debug(): command - xtensa xtopt tracemem 0x4000
Debug: 233 29 command.c:152 script_debug(): command - xtensa xtopt tracememrev 0
Debug: 234 29 command.c:152 script_debug(): command - xtensa xtopt perfcount 2
Debug: 235 29 command.c:152 script_debug(): command - xtensa xtregs 228
Debug: 236 29 command.c:152 script_debug(): command - xtensa xtregfmt contiguous 128
Debug: 237 29 command.c:152 script_debug(): command - xtensa xtreg pc 0x0020
Debug: 238 29 command.c:152 script_debug(): command - xtensa xtreg ar0 0x0100
Debug: 239 29 command.c:152 script_debug(): command - xtensa xtreg ar1 0x0101
Debug: 240 29 command.c:152 script_debug(): command - xtensa xtreg ar2 0x0102
Debug: 241 29 command.c:152 script_debug(): command - xtensa xtreg ar3 0x0103
Debug: 242 29 command.c:152 script_debug(): command - xtensa xtreg ar4 0x0104
Debug: 243 29 command.c:152 script_debug(): command - xtensa xtreg ar5 0x0105
Debug: 244 29 command.c:152 script_debug(): command - xtensa xtreg ar6 0x0106
Debug: 245 29 command.c:152 script_debug(): command - xtensa xtreg ar7 0x0107
Debug: 246 29 command.c:152 script_debug(): command - xtensa xtreg ar8 0x0108
Debug: 247 29 command.c:152 script_debug(): command - xtensa xtreg ar9 0x0109
Debug: 248 41 command.c:152 script_debug(): command - xtensa xtreg ar10 0x010a
Debug: 249 41 command.c:152 script_debug(): command - xtensa xtreg ar11 0x010b
Debug: 250 41 command.c:152 script_debug(): command - xtensa xtreg ar12 0x010c
Debug: 251 41 command.c:152 script_debug(): command - xtensa xtreg ar13 0x010d
Debug: 252 41 command.c:152 script_debug(): command - xtensa xtreg ar14 0x010e
Debug: 253 41 command.c:152 script_debug(): command - xtensa xtreg ar15 0x010f
Debug: 254 41 command.c:152 script_debug(): command - xtensa xtreg ar16 0x0110
Debug: 255 41 command.c:152 script_debug(): command - xtensa xtreg ar17 0x0111
Debug: 256 41 command.c:152 script_debug(): command - xtensa xtreg ar18 0x0112
Debug: 257 41 command.c:152 script_debug(): command - xtensa xtreg ar19 0x0113
Debug: 258 41 command.c:152 script_debug(): command - xtensa xtreg ar20 0x0114
Debug: 259 41 command.c:152 script_debug(): command - xtensa xtreg ar21 0x0115
Debug: 260 41 command.c:152 script_debug(): command - xtensa xtreg ar22 0x0116
Debug: 261 41 command.c:152 script_debug(): command - xtensa xtreg ar23 0x0117
Debug: 262 41 command.c:152 script_debug(): command - xtensa xtreg ar24 0x0118
Debug: 263 41 command.c:152 script_debug(): command - xtensa xtreg ar25 0x0119
Debug: 264 41 command.c:152 script_debug(): command - xtensa xtreg ar26 0x011a
Debug: 265 41 command.c:152 script_debug(): command - xtensa xtreg ar27 0x011b
Debug: 266 41 command.c:152 script_debug(): command - xtensa xtreg ar28 0x011c
Debug: 267 41 command.c:152 script_debug(): command - xtensa xtreg ar29 0x011d
Debug: 268 41 command.c:152 script_debug(): command - xtensa xtreg ar30 0x011e
Debug: 269 41 command.c:152 script_debug(): command - xtensa xtreg ar31 0x011f
Debug: 270 41 command.c:152 script_debug(): command - xtensa xtreg ar32 0x0120
Debug: 271 41 command.c:152 script_debug(): command - xtensa xtreg ar33 0x0121
Debug: 272 41 command.c:152 script_debug(): command - xtensa xtreg ar34 0x0122
Debug: 273 41 command.c:152 script_debug(): command - xtensa xtreg ar35 0x0123
Debug: 274 41 command.c:152 script_debug(): command - xtensa xtreg ar36 0x0124
Debug: 275 41 command.c:152 script_debug(): command - xtensa xtreg ar37 0x0125
Debug: 276 41 command.c:152 script_debug(): command - xtensa xtreg ar38 0x0126
Debug: 277 41 command.c:152 script_debug(): command - xtensa xtreg ar39 0x0127
Debug: 278 41 command.c:152 script_debug(): command - xtensa xtreg ar40 0x0128
Debug: 279 41 command.c:152 script_debug(): command - xtensa xtreg ar41 0x0129
Debug: 280 41 command.c:152 script_debug(): command - xtensa xtreg ar42 0x012a
Debug: 281 41 command.c:152 script_debug(): command - xtensa xtreg ar43 0x012b
Debug: 282 41 command.c:152 script_debug(): command - xtensa xtreg ar44 0x012c
Debug: 283 41 command.c:152 script_debug(): command - xtensa xtreg ar45 0x012d
Debug: 284 41 command.c:152 script_debug(): command - xtensa xtreg ar46 0x012e
Debug: 285 41 command.c:152 script_debug(): command - xtensa xtreg ar47 0x012f
Debug: 286 41 command.c:152 script_debug(): command - xtensa xtreg ar48 0x0130
Debug: 287 41 command.c:152 script_debug(): command - xtensa xtreg ar49 0x0131
Debug: 288 43 command.c:152 script_debug(): command - xtensa xtreg ar50 0x0132
Debug: 289 43 command.c:152 script_debug(): command - xtensa xtreg ar51 0x0133
Debug: 290 43 command.c:152 script_debug(): command - xtensa xtreg ar52 0x0134
Debug: 291 43 command.c:152 script_debug(): command - xtensa xtreg ar53 0x0135
Debug: 292 43 command.c:152 script_debug(): command - xtensa xtreg ar54 0x0136
Debug: 293 43 command.c:152 script_debug(): command - xtensa xtreg ar55 0x0137
Debug: 294 43 command.c:152 script_debug(): command - xtensa xtreg ar56 0x0138
Debug: 295 43 command.c:152 script_debug(): command - xtensa xtreg ar57 0x0139
Debug: 296 43 command.c:152 script_debug(): command - xtensa xtreg ar58 0x013a
Debug: 297 43 command.c:152 script_debug(): command - xtensa xtreg ar59 0x013b
Debug: 298 43 command.c:152 script_debug(): command - xtensa xtreg ar60 0x013c
Debug: 299 43 command.c:152 script_debug(): command - xtensa xtreg ar61 0x013d
Debug: 300 43 command.c:152 script_debug(): command - xtensa xtreg ar62 0x013e
Debug: 301 43 command.c:152 script_debug(): command - xtensa xtreg ar63 0x013f
Debug: 302 44 command.c:152 script_debug(): command - xtensa xtreg lbeg 0x0200
Debug: 303 44 command.c:152 script_debug(): command - xtensa xtreg lend 0x0201
Debug: 304 44 command.c:152 script_debug(): command - xtensa xtreg lcount 0x0202
Debug: 305 44 command.c:152 script_debug(): command - xtensa xtreg sar 0x0203
Debug: 306 44 command.c:152 script_debug(): command - xtensa xtreg windowbase 0x0248
Debug: 307 44 command.c:152 script_debug(): command - xtensa xtreg windowstart 0x0249
Debug: 308 44 command.c:152 script_debug(): command - xtensa xtreg configid0 0x02b0
Debug: 309 44 command.c:152 script_debug(): command - xtensa xtreg configid1 0x02d0
Debug: 310 44 command.c:152 script_debug(): command - xtensa xtreg ps 0x02e6
Debug: 311 44 command.c:152 script_debug(): command - xtensa xtreg threadptr 0x03e7
Debug: 312 44 command.c:152 script_debug(): command - xtensa xtreg br 0x0204
Debug: 313 44 command.c:152 script_debug(): command - xtensa xtreg scompare1 0x020c
Debug: 314 44 command.c:152 script_debug(): command - xtensa xtreg acclo 0x0210
Debug: 315 44 command.c:152 script_debug(): command - xtensa xtreg acchi 0x0211
Debug: 316 44 command.c:152 script_debug(): command - xtensa xtreg m0 0x0220
Debug: 317 44 command.c:152 script_debug(): command - xtensa xtreg m1 0x0221
Debug: 318 44 command.c:152 script_debug(): command - xtensa xtreg m2 0x0222
Debug: 319 44 command.c:152 script_debug(): command - xtensa xtreg m3 0x0223
Debug: 320 44 command.c:152 script_debug(): command - xtensa xtreg gpio_out 0x030c
Debug: 321 44 command.c:152 script_debug(): command - xtensa xtreg f0 0x0030
Debug: 322 44 command.c:152 script_debug(): command - xtensa xtreg f1 0x0031
Debug: 323 44 command.c:152 script_debug(): command - xtensa xtreg f2 0x0032
Debug: 324 44 command.c:152 script_debug(): command - xtensa xtreg f3 0x0033
Debug: 325 44 command.c:152 script_debug(): command - xtensa xtreg f4 0x0034
Debug: 326 44 command.c:152 script_debug(): command - xtensa xtreg f5 0x0035
Debug: 327 44 command.c:152 script_debug(): command - xtensa xtreg f6 0x0036
Debug: 328 44 command.c:152 script_debug(): command - xtensa xtreg f7 0x0037
Debug: 329 44 command.c:152 script_debug(): command - xtensa xtreg f8 0x0038
Debug: 330 44 command.c:152 script_debug(): command - xtensa xtreg f9 0x0039
Debug: 331 44 command.c:152 script_debug(): command - xtensa xtreg f10 0x003a
Debug: 332 44 command.c:152 script_debug(): command - xtensa xtreg f11 0x003b
Debug: 333 44 command.c:152 script_debug(): command - xtensa xtreg f12 0x003c
Debug: 334 44 command.c:152 script_debug(): command - xtensa xtreg f13 0x003d
Debug: 335 44 command.c:152 script_debug(): command - xtensa xtreg f14 0x003e
Debug: 336 44 command.c:152 script_debug(): command - xtensa xtreg f15 0x003f
Debug: 337 44 command.c:152 script_debug(): command - xtensa xtreg fcr 0x03e8
Debug: 338 44 command.c:152 script_debug(): command - xtensa xtreg fsr 0x03e9
Debug: 339 44 command.c:152 script_debug(): command - xtensa xtreg accx_0 0x0300
Debug: 340 44 command.c:152 script_debug(): command - xtensa xtreg accx_1 0x0301
Debug: 341 44 command.c:152 script_debug(): command - xtensa xtreg qacc_h_0 0x0302
Debug: 342 44 command.c:152 script_debug(): command - xtensa xtreg qacc_h_1 0x0303
Debug: 343 44 command.c:152 script_debug(): command - xtensa xtreg qacc_h_2 0x0304
Debug: 344 44 command.c:152 script_debug(): command - xtensa xtreg qacc_h_3 0x0305
Debug: 345 44 command.c:152 script_debug(): command - xtensa xtreg qacc_h_4 0x0306
Debug: 346 44 command.c:152 script_debug(): command - xtensa xtreg qacc_l_0 0x0307
Debug: 347 44 command.c:152 script_debug(): command - xtensa xtreg qacc_l_1 0x0308
Debug: 348 44 command.c:152 script_debug(): command - xtensa xtreg qacc_l_2 0x0309
Debug: 349 44 command.c:152 script_debug(): command - xtensa xtreg qacc_l_3 0x030a
Debug: 350 44 command.c:152 script_debug(): command - xtensa xtreg qacc_l_4 0x030b
Debug: 351 44 command.c:152 script_debug(): command - xtensa xtreg sar_byte 0x030d
Debug: 352 44 command.c:152 script_debug(): command - xtensa xtreg fft_bit_width 0x030e
Debug: 353 44 command.c:152 script_debug(): command - xtensa xtreg ua_state_0 0x030f
Debug: 354 44 command.c:152 script_debug(): command - xtensa xtreg ua_state_1 0x0310
Debug: 355 44 command.c:152 script_debug(): command - xtensa xtreg ua_state_2 0x0311
Debug: 356 44 command.c:152 script_debug(): command - xtensa xtreg ua_state_3 0x0312
Debug: 357 44 command.c:152 script_debug(): command - xtensa xtreg q0 0x1008
Debug: 358 44 command.c:152 script_debug(): command - xtensa xtreg q1 0x1009
Debug: 359 44 command.c:152 script_debug(): command - xtensa xtreg q2 0x100a
Debug: 360 44 command.c:152 script_debug(): command - xtensa xtreg q3 0x100b
Debug: 361 44 command.c:152 script_debug(): command - xtensa xtreg q4 0x100c
Debug: 362 44 command.c:152 script_debug(): command - xtensa xtreg q5 0x100d
Debug: 363 44 command.c:152 script_debug(): command - xtensa xtreg q6 0x100e
Debug: 364 44 command.c:152 script_debug(): command - xtensa xtreg q7 0x100f
Debug: 365 44 command.c:152 script_debug(): command - xtensa xtreg mmid 0x0259
Debug: 366 44 command.c:152 script_debug(): command - xtensa xtreg ibreakenable 0x0260
Debug: 367 44 command.c:152 script_debug(): command - xtensa xtreg memctl 0x0261
Debug: 368 44 command.c:152 script_debug(): command - xtensa xtreg atomctl 0x0263
Debug: 369 44 command.c:152 script_debug(): command - xtensa xtreg ddr 0x0268
Debug: 370 44 command.c:152 script_debug(): command - xtensa xtreg ibreaka0 0x0280
Debug: 371 44 command.c:152 script_debug(): command - xtensa xtreg ibreaka1 0x0281
Debug: 372 44 command.c:152 script_debug(): command - xtensa xtreg dbreaka0 0x0290
Debug: 373 44 command.c:152 script_debug(): command - xtensa xtreg dbreaka1 0x0291
Debug: 374 44 command.c:152 script_debug(): command - xtensa xtreg dbreakc0 0x02a0
Debug: 375 44 command.c:152 script_debug(): command - xtensa xtreg dbreakc1 0x02a1
Debug: 376 44 command.c:152 script_debug(): command - xtensa xtreg epc1 0x02b1
Debug: 377 44 command.c:152 script_debug(): command - xtensa xtreg epc2 0x02b2
Debug: 378 44 command.c:152 script_debug(): command - xtensa xtreg epc3 0x02b3
Debug: 379 44 command.c:152 script_debug(): command - xtensa xtreg epc4 0x02b4
Debug: 380 44 command.c:152 script_debug(): command - xtensa xtreg epc5 0x02b5
Debug: 381 44 command.c:152 script_debug(): command - xtensa xtreg epc6 0x02b6
Debug: 382 44 command.c:152 script_debug(): command - xtensa xtreg epc7 0x02b7
Debug: 383 44 command.c:152 script_debug(): command - xtensa xtreg depc 0x02c0
Debug: 384 44 command.c:152 script_debug(): command - xtensa xtreg eps2 0x02c2
Debug: 385 44 command.c:152 script_debug(): command - xtensa xtreg eps3 0x02c3
Debug: 386 44 command.c:152 script_debug(): command - xtensa xtreg eps4 0x02c4
Debug: 387 44 command.c:152 script_debug(): command - xtensa xtreg eps5 0x02c5
Debug: 388 44 command.c:152 script_debug(): command - xtensa xtreg eps6 0x02c6
Debug: 389 44 xtensa.c:3914 xtensa_cmd_xtreg_do(): Setting PS (eps6) index to 172
Debug: 390 44 xtensa.c:3914 xtensa_cmd_xtreg_do(): Setting PS (eps6) index to 172
Debug: 391 44 command.c:152 script_debug(): command - xtensa xtreg eps7 0x02c7
Debug: 392 44 command.c:152 script_debug(): command - xtensa xtreg excsave1 0x02d1
Debug: 393 44 command.c:152 script_debug(): command - xtensa xtreg excsave2 0x02d2
Debug: 394 44 command.c:152 script_debug(): command - xtensa xtreg excsave3 0x02d3
Debug: 395 44 command.c:152 script_debug(): command - xtensa xtreg excsave4 0x02d4
Debug: 396 44 command.c:152 script_debug(): command - xtensa xtreg excsave5 0x02d5
Debug: 397 44 command.c:152 script_debug(): command - xtensa xtreg excsave6 0x02d6
Debug: 398 44 command.c:152 script_debug(): command - xtensa xtreg excsave7 0x02d7
Debug: 399 44 command.c:152 script_debug(): command - xtensa xtreg cpenable 0x02e0
Debug: 400 44 command.c:152 script_debug(): command - xtensa xtreg interrupt 0x02e2
Debug: 401 44 command.c:152 script_debug(): command - xtensa xtreg intset 0x02e2
Debug: 402 44 command.c:152 script_debug(): command - xtensa xtreg intclear 0x02e3
Debug: 403 44 command.c:152 script_debug(): command - xtensa xtreg intenable 0x02e4
Debug: 404 44 command.c:152 script_debug(): command - xtensa xtreg vecbase 0x02e7
Debug: 405 44 command.c:152 script_debug(): command - xtensa xtreg exccause 0x02e8
Debug: 406 44 command.c:152 script_debug(): command - xtensa xtreg debugcause 0x02e9
Debug: 407 44 command.c:152 script_debug(): command - xtensa xtreg ccount 0x02ea
Debug: 408 44 command.c:152 script_debug(): command - xtensa xtreg prid 0x02eb
Debug: 409 44 command.c:152 script_debug(): command - xtensa xtreg icount 0x02ec
Debug: 410 44 command.c:152 script_debug(): command - xtensa xtreg icountlevel 0x02ed
Debug: 411 44 command.c:152 script_debug(): command - xtensa xtreg excvaddr 0x02ee
Debug: 412 44 command.c:152 script_debug(): command - xtensa xtreg ccompare0 0x02f0
Debug: 413 44 command.c:152 script_debug(): command - xtensa xtreg ccompare1 0x02f1
Debug: 414 44 command.c:152 script_debug(): command - xtensa xtreg ccompare2 0x02f2
Debug: 415 44 command.c:152 script_debug(): command - xtensa xtreg misc0 0x02f4
Debug: 416 44 command.c:152 script_debug(): command - xtensa xtreg misc1 0x02f5
Debug: 417 44 command.c:152 script_debug(): command - xtensa xtreg misc2 0x02f6
Debug: 418 44 command.c:152 script_debug(): command - xtensa xtreg misc3 0x02f7
Debug: 419 44 command.c:152 script_debug(): command - xtensa xtreg pwrctl 0x2028
Debug: 420 44 command.c:152 script_debug(): command - xtensa xtreg pwrstat 0x2029
Debug: 421 44 command.c:152 script_debug(): command - xtensa xtreg eristat 0x202a
Debug: 422 44 command.c:152 script_debug(): command - xtensa xtreg cs_itctrl 0x202b
Debug: 423 44 command.c:152 script_debug(): command - xtensa xtreg cs_claimset 0x202c
Debug: 424 44 command.c:152 script_debug(): command - xtensa xtreg cs_claimclr 0x202d
Debug: 425 44 command.c:152 script_debug(): command - xtensa xtreg cs_lockaccess 0x202e
Debug: 426 44 command.c:152 script_debug(): command - xtensa xtreg cs_lockstatus 0x202f
Debug: 427 44 command.c:152 script_debug(): command - xtensa xtreg cs_authstatus 0x2030
Debug: 428 44 command.c:152 script_debug(): command - xtensa xtreg fault_info 0x203f
Debug: 429 44 command.c:152 script_debug(): command - xtensa xtreg trax_id 0x2040
Debug: 430 44 command.c:152 script_debug(): command - xtensa xtreg trax_control 0x2041
Debug: 431 44 command.c:152 script_debug(): command - xtensa xtreg trax_status 0x2042
Debug: 432 44 command.c:152 script_debug(): command - xtensa xtreg trax_data 0x2043
Debug: 433 44 command.c:152 script_debug(): command - xtensa xtreg trax_address 0x2044
Debug: 434 44 command.c:152 script_debug(): command - xtensa xtreg trax_pctrigger 0x2045
Debug: 435 44 command.c:152 script_debug(): command - xtensa xtreg trax_pcmatch 0x2046
Debug: 436 44 command.c:152 script_debug(): command - xtensa xtreg trax_delay 0x2047
Debug: 437 44 command.c:152 script_debug(): command - xtensa xtreg trax_memstart 0x2048
Debug: 438 44 command.c:152 script_debug(): command - xtensa xtreg trax_memend 0x2049
Debug: 439 44 command.c:152 script_debug(): command - xtensa xtreg pmg 0x2057
Debug: 440 44 command.c:152 script_debug(): command - xtensa xtreg pmpc 0x2058
Debug: 441 44 command.c:152 script_debug(): command - xtensa xtreg pm0 0x2059
Debug: 442 44 command.c:152 script_debug(): command - xtensa xtreg pm1 0x205a
Debug: 443 44 command.c:152 script_debug(): command - xtensa xtreg pmctrl0 0x205b
Debug: 444 44 command.c:152 script_debug(): command - xtensa xtreg pmctrl1 0x205c
Debug: 445 44 command.c:152 script_debug(): command - xtensa xtreg pmstat0 0x205d
Debug: 446 44 command.c:152 script_debug(): command - xtensa xtreg pmstat1 0x205e
Debug: 447 44 command.c:152 script_debug(): command - xtensa xtreg ocdid 0x205f
Debug: 448 44 command.c:152 script_debug(): command - xtensa xtreg ocd_dcrclr 0x2060
Debug: 449 44 command.c:152 script_debug(): command - xtensa xtreg ocd_dcrset 0x2061
Debug: 450 44 command.c:152 script_debug(): command - xtensa xtreg ocd_dsr 0x2062
Debug: 451 44 command.c:152 script_debug(): command - xtensa xtreg a0 0x0000
Debug: 452 44 command.c:152 script_debug(): command - xtensa xtreg a1 0x0001
Debug: 453 44 command.c:152 script_debug(): command - xtensa xtreg a2 0x0002
Debug: 454 44 command.c:152 script_debug(): command - xtensa xtreg a3 0x0003
Debug: 455 44 command.c:152 script_debug(): command - xtensa xtreg a4 0x0004
Debug: 456 44 command.c:152 script_debug(): command - xtensa xtreg a5 0x0005
Debug: 457 44 command.c:152 script_debug(): command - xtensa xtreg a6 0x0006
Debug: 458 44 command.c:152 script_debug(): command - xtensa xtreg a7 0x0007
Debug: 459 44 command.c:152 script_debug(): command - xtensa xtreg a8 0x0008
Debug: 460 44 command.c:152 script_debug(): command - xtensa xtreg a9 0x0009
Debug: 461 44 command.c:152 script_debug(): command - xtensa xtreg a10 0x000a
Debug: 462 44 command.c:152 script_debug(): command - xtensa xtreg a11 0x000b
Debug: 463 44 command.c:152 script_debug(): command - xtensa xtreg a12 0x000c
Debug: 464 44 command.c:152 script_debug(): command - xtensa xtreg a13 0x000d
Debug: 465 44 command.c:152 script_debug(): command - xtensa xtreg a14 0x000e
Debug: 466 44 command.c:152 script_debug(): command - xtensa xtreg a15 0x000f
Debug: 467 44 command.c:152 script_debug(): command - esp stub_log on
Info : 468 44 esp_flash.c:1636 esp_algo_flash_parse_cmd_stub_log(): [esp32s3.cpu0] Stub logs enabled!
Info : 469 44 esp_flash.c:1636 esp_algo_flash_parse_cmd_stub_log(): [esp32s3.cpu1] Stub logs enabled!
Info : 470 44 server.c:298 add_service(): Listening on port 6666 for tcl connections
Info : 471 44 server.c:298 add_service(): Listening on port 4444 for telnet connections
Debug: 472 44 command.c:152 script_debug(): command - init
Debug: 473 44 command.c:152 script_debug(): command - target init
Debug: 474 44 command.c:152 script_debug(): command - target names
Debug: 475 44 command.c:152 script_debug(): command - esp32s3.cpu0 cget -event gdb-flash-erase-start
Debug: 476 44 command.c:152 script_debug(): command - esp32s3.cpu0 configure -event gdb-flash-erase-start reset init
Debug: 477 44 command.c:152 script_debug(): command - esp32s3.cpu0 cget -event gdb-flash-write-end
Debug: 478 44 command.c:152 script_debug(): command - esp32s3.cpu0 configure -event gdb-flash-write-end reset halt
Debug: 479 44 command.c:152 script_debug(): command - esp32s3.cpu0 cget -event gdb-attach
Debug: 480 44 command.c:152 script_debug(): command - esp32s3.cpu1 cget -event gdb-flash-erase-start
Debug: 481 44 command.c:152 script_debug(): command - esp32s3.cpu1 configure -event gdb-flash-erase-start reset init
Debug: 482 44 command.c:152 script_debug(): command - esp32s3.cpu1 cget -event gdb-flash-write-end
Debug: 483 44 command.c:152 script_debug(): command - esp32s3.cpu1 configure -event gdb-flash-write-end reset halt
Debug: 484 44 command.c:152 script_debug(): command - esp32s3.cpu1 cget -event gdb-attach
Debug: 485 44 target.c:1593 handle_target_init_command(): Initializing targets...
Debug: 486 44 xtensa.c:2932 xtensa_build_reg_cache(): [esp32s3.cpu0] xtensa->total_regs_num 228 reg_list_size 228 xtensa->dbregs_num 8291
Debug: 487 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pc              , dbreg_num 0x02ff
Debug: 488 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar0             , dbreg_num 0x0100
Debug: 489 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar1             , dbreg_num 0x0101
Debug: 490 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar2             , dbreg_num 0x0102
Debug: 491 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar3             , dbreg_num 0x0103
Debug: 492 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar4             , dbreg_num 0x0104
Debug: 493 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar5             , dbreg_num 0x0105
Debug: 494 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar6             , dbreg_num 0x0106
Debug: 495 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar7             , dbreg_num 0x0107
Debug: 496 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar8             , dbreg_num 0x0108
Debug: 497 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar9             , dbreg_num 0x0109
Debug: 498 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar10            , dbreg_num 0x010a
Debug: 499 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar11            , dbreg_num 0x010b
Debug: 500 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar12            , dbreg_num 0x010c
Debug: 501 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar13            , dbreg_num 0x010d
Debug: 502 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar14            , dbreg_num 0x010e
Debug: 503 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar15            , dbreg_num 0x010f
Debug: 504 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar16            , dbreg_num 0x0110
Debug: 505 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar17            , dbreg_num 0x0111
Debug: 506 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar18            , dbreg_num 0x0112
Debug: 507 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar19            , dbreg_num 0x0113
Debug: 508 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar20            , dbreg_num 0x0114
Debug: 509 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar21            , dbreg_num 0x0115
Debug: 510 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar22            , dbreg_num 0x0116
Debug: 511 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar23            , dbreg_num 0x0117
Debug: 512 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar24            , dbreg_num 0x0118
Debug: 513 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar25            , dbreg_num 0x0119
Debug: 514 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar26            , dbreg_num 0x011a
Debug: 515 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar27            , dbreg_num 0x011b
Debug: 516 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar28            , dbreg_num 0x011c
Debug: 517 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar29            , dbreg_num 0x011d
Debug: 518 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar30            , dbreg_num 0x011e
Debug: 519 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar31            , dbreg_num 0x011f
Debug: 520 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar32            , dbreg_num 0x0120
Debug: 521 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar33            , dbreg_num 0x0121
Debug: 522 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar34            , dbreg_num 0x0122
Debug: 523 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar35            , dbreg_num 0x0123
Debug: 524 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar36            , dbreg_num 0x0124
Debug: 525 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar37            , dbreg_num 0x0125
Debug: 526 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar38            , dbreg_num 0x0126
Debug: 527 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar39            , dbreg_num 0x0127
Debug: 528 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar40            , dbreg_num 0x0128
Debug: 529 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar41            , dbreg_num 0x0129
Debug: 530 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar42            , dbreg_num 0x012a
Debug: 531 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar43            , dbreg_num 0x012b
Debug: 532 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar44            , dbreg_num 0x012c
Debug: 533 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar45            , dbreg_num 0x012d
Debug: 534 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar46            , dbreg_num 0x012e
Debug: 535 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar47            , dbreg_num 0x012f
Debug: 536 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar48            , dbreg_num 0x0130
Debug: 537 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar49            , dbreg_num 0x0131
Debug: 538 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar50            , dbreg_num 0x0132
Debug: 539 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar51            , dbreg_num 0x0133
Debug: 540 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar52            , dbreg_num 0x0134
Debug: 541 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar53            , dbreg_num 0x0135
Debug: 542 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar54            , dbreg_num 0x0136
Debug: 543 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar55            , dbreg_num 0x0137
Debug: 544 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar56            , dbreg_num 0x0138
Debug: 545 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar57            , dbreg_num 0x0139
Debug: 546 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar58            , dbreg_num 0x013a
Debug: 547 55 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar59            , dbreg_num 0x013b
Debug: 548 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar60            , dbreg_num 0x013c
Debug: 549 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar61            , dbreg_num 0x013d
Debug: 550 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar62            , dbreg_num 0x013e
Debug: 551 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ar63            , dbreg_num 0x013f
Debug: 552 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: lbeg            , dbreg_num 0x0200
Debug: 553 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: lend            , dbreg_num 0x0201
Debug: 554 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: lcount          , dbreg_num 0x0202
Debug: 555 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: sar             , dbreg_num 0x0203
Debug: 556 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: windowbase      , dbreg_num 0x0248
Debug: 557 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: windowstart     , dbreg_num 0x0249
Debug: 558 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: configid0       , dbreg_num 0x02b0
Debug: 559 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: configid1       , dbreg_num 0x02d0
Debug: 560 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ps              , dbreg_num 0x02e6
Debug: 561 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: threadptr       , dbreg_num 0x03e7
Debug: 562 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: br              , dbreg_num 0x0204
Debug: 563 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: scompare1       , dbreg_num 0x020c
Debug: 564 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: acclo           , dbreg_num 0x0210
Debug: 565 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: acchi           , dbreg_num 0x0211
Debug: 566 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: m0              , dbreg_num 0x0220
Debug: 567 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: m1              , dbreg_num 0x0221
Debug: 568 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: m2              , dbreg_num 0x0222
Debug: 569 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: m3              , dbreg_num 0x0223
Debug: 570 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: gpio_out        , dbreg_num 0x030c
Debug: 571 59 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f0              , dbreg_num 0x0030
Debug: 572 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f1              , dbreg_num 0x0031
Debug: 573 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f2              , dbreg_num 0x0032
Debug: 574 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f3              , dbreg_num 0x0033
Debug: 575 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f4              , dbreg_num 0x0034
Debug: 576 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f5              , dbreg_num 0x0035
Debug: 577 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f6              , dbreg_num 0x0036
Debug: 578 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f7              , dbreg_num 0x0037
Debug: 579 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f8              , dbreg_num 0x0038
Debug: 580 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f9              , dbreg_num 0x0039
Debug: 581 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f10             , dbreg_num 0x003a
Debug: 582 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f11             , dbreg_num 0x003b
Debug: 583 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f12             , dbreg_num 0x003c
Debug: 584 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f13             , dbreg_num 0x003d
Debug: 585 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f14             , dbreg_num 0x003e
Debug: 586 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: f15             , dbreg_num 0x003f
Debug: 587 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: fcr             , dbreg_num 0x03e8
Debug: 588 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: fsr             , dbreg_num 0x03e9
Debug: 589 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: accx_0          , dbreg_num 0x0300
Debug: 590 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: accx_1          , dbreg_num 0x0301
Debug: 591 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_h_0        , dbreg_num 0x0302
Debug: 592 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_h_1        , dbreg_num 0x0303
Debug: 593 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_h_2        , dbreg_num 0x0304
Debug: 594 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_h_3        , dbreg_num 0x0305
Debug: 595 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_h_4        , dbreg_num 0x0306
Debug: 596 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_l_0        , dbreg_num 0x0307
Debug: 597 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_l_1        , dbreg_num 0x0308
Debug: 598 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_l_2        , dbreg_num 0x0309
Debug: 599 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_l_3        , dbreg_num 0x030a
Debug: 600 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: qacc_l_4        , dbreg_num 0x030b
Debug: 601 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: sar_byte        , dbreg_num 0x030d
Debug: 602 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: fft_bit_width   , dbreg_num 0x030e
Debug: 603 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ua_state_0      , dbreg_num 0x030f
Debug: 604 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ua_state_1      , dbreg_num 0x0310
Debug: 605 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ua_state_2      , dbreg_num 0x0311
Debug: 606 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ua_state_3      , dbreg_num 0x0312
Debug: 607 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q0              , dbreg_num 0x1008
Debug: 608 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q1              , dbreg_num 0x1009
Debug: 609 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q2              , dbreg_num 0x100a
Debug: 610 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q3              , dbreg_num 0x100b
Debug: 611 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q4              , dbreg_num 0x100c
Debug: 612 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q5              , dbreg_num 0x100d
Debug: 613 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q6              , dbreg_num 0x100e
Debug: 614 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: q7              , dbreg_num 0x100f
Debug: 615 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: mmid            , dbreg_num 0x0259
Debug: 616 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ibreakenable    , dbreg_num 0x0260
Debug: 617 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: memctl          , dbreg_num 0x0261
Debug: 618 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: atomctl         , dbreg_num 0x0263
Debug: 619 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ddr             , dbreg_num 0x0268
Debug: 620 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ibreaka0        , dbreg_num 0x0280
Debug: 621 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ibreaka1        , dbreg_num 0x0281
Debug: 622 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: dbreaka0        , dbreg_num 0x0290
Debug: 623 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: dbreaka1        , dbreg_num 0x0291
Debug: 624 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: dbreakc0        , dbreg_num 0x02a0
Debug: 625 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: dbreakc1        , dbreg_num 0x02a1
Debug: 626 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: epc1            , dbreg_num 0x02b1
Debug: 627 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: epc2            , dbreg_num 0x02b2
Debug: 628 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: epc3            , dbreg_num 0x02b3
Debug: 629 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: epc4            , dbreg_num 0x02b4
Debug: 630 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: epc5            , dbreg_num 0x02b5
Debug: 631 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: epc6            , dbreg_num 0x02b6
Debug: 632 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: epc7            , dbreg_num 0x02b7
Debug: 633 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: depc            , dbreg_num 0x02c0
Debug: 634 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: eps2            , dbreg_num 0x02c2
Debug: 635 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: eps3            , dbreg_num 0x02c3
Debug: 636 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: eps4            , dbreg_num 0x02c4
Debug: 637 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: eps5            , dbreg_num 0x02c5
Debug: 638 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: eps6            , dbreg_num 0x02c6
Debug: 639 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: eps7            , dbreg_num 0x02c7
Debug: 640 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excsave1        , dbreg_num 0x02d1
Debug: 641 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excsave2        , dbreg_num 0x02d2
Debug: 642 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excsave3        , dbreg_num 0x02d3
Debug: 643 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excsave4        , dbreg_num 0x02d4
Debug: 644 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excsave5        , dbreg_num 0x02d5
Debug: 645 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excsave6        , dbreg_num 0x02d6
Debug: 646 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excsave7        , dbreg_num 0x02d7
Debug: 647 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: cpenable        , dbreg_num 0x02e0
Debug: 648 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: interrupt       , dbreg_num 0x02e2
Debug: 649 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: intset          , dbreg_num 0x02e2
Debug: 650 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: intclear        , dbreg_num 0x02e3
Debug: 651 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: intenable       , dbreg_num 0x02e4
Debug: 652 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: vecbase         , dbreg_num 0x02e7
Debug: 653 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: exccause        , dbreg_num 0x02e8
Debug: 654 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: debugcause      , dbreg_num 0x02e9
Debug: 655 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ccount          , dbreg_num 0x02ea
Debug: 656 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: prid            , dbreg_num 0x02eb
Debug: 657 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: icount          , dbreg_num 0x02ec
Debug: 658 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: icountlevel     , dbreg_num 0x02ed
Debug: 659 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: excvaddr        , dbreg_num 0x02ee
Debug: 660 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ccompare0       , dbreg_num 0x02f0
Debug: 661 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ccompare1       , dbreg_num 0x02f1
Debug: 662 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ccompare2       , dbreg_num 0x02f2
Debug: 663 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: misc0           , dbreg_num 0x02f4
Debug: 664 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: misc1           , dbreg_num 0x02f5
Debug: 665 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: misc2           , dbreg_num 0x02f6
Debug: 666 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: misc3           , dbreg_num 0x02f7
Debug: 667 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pwrctl          , dbreg_num 0x2028
Debug: 668 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pwrstat         , dbreg_num 0x2029
Debug: 669 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: eristat         , dbreg_num 0x202a
Debug: 670 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: cs_itctrl       , dbreg_num 0x202b
Debug: 671 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: cs_claimset     , dbreg_num 0x202c
Debug: 672 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: cs_claimclr     , dbreg_num 0x202d
Debug: 673 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: cs_lockaccess   , dbreg_num 0x202e
Debug: 674 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: cs_lockstatus   , dbreg_num 0x202f
Debug: 675 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: cs_authstatus   , dbreg_num 0x2030
Debug: 676 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: fault_info      , dbreg_num 0x203f
Debug: 677 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_id         , dbreg_num 0x2040
Debug: 678 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_control    , dbreg_num 0x2041
Debug: 679 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_status     , dbreg_num 0x2042
Debug: 680 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_data       , dbreg_num 0x2043
Debug: 681 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_address    , dbreg_num 0x2044
Debug: 682 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_pctrigger  , dbreg_num 0x2045
Debug: 683 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_pcmatch    , dbreg_num 0x2046
Debug: 684 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_delay      , dbreg_num 0x2047
Debug: 685 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_memstart   , dbreg_num 0x2048
Debug: 686 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: trax_memend     , dbreg_num 0x2049
Debug: 687 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pmg             , dbreg_num 0x2057
Debug: 688 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pmpc            , dbreg_num 0x2058
Debug: 689 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pm0             , dbreg_num 0x2059
Debug: 690 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pm1             , dbreg_num 0x205a
Debug: 691 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pmctrl0         , dbreg_num 0x205b
Debug: 692 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pmctrl1         , dbreg_num 0x205c
Debug: 693 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pmstat0         , dbreg_num 0x205d
Debug: 694 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: pmstat1         , dbreg_num 0x205e
Debug: 695 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ocdid           , dbreg_num 0x205f
Debug: 696 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ocd_dcrclr      , dbreg_num 0x2060
Debug: 697 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ocd_dcrset      , dbreg_num 0x2061
Debug: 698 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: ocd_dsr         , dbreg_num 0x2062
Debug: 699 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a0              , dbreg_num 0x0001
Debug: 700 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a1              , dbreg_num 0x0002
Debug: 701 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a2              , dbreg_num 0x0003
Debug: 702 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a3              , dbreg_num 0x0004
Debug: 703 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a4              , dbreg_num 0x0005
Debug: 704 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a5              , dbreg_num 0x0006
Debug: 705 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a6              , dbreg_num 0x0007
Debug: 706 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a7              , dbreg_num 0x0008
Debug: 707 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a8              , dbreg_num 0x0009
Debug: 708 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a9              , dbreg_num 0x000a
Debug: 709 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a10             , dbreg_num 0x000b
Debug: 710 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a11             , dbreg_num 0x000c
Debug: 711 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a12             , dbreg_num 0x000d
Debug: 712 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a13             , dbreg_num 0x000e
Debug: 713 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a14             , dbreg_num 0x000f
Debug: 714 61 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu0] POPULATE contiguous regs list: a15             , dbreg_num 0x0010
Debug: 715 61 semihosting_common.c:105 semihosting_common_init():  
Debug: 716 61 semihosting_common.c:105 semihosting_common_init():  
Debug: 717 61 xtensa.c:2932 xtensa_build_reg_cache(): [esp32s3.cpu1] xtensa->total_regs_num 228 reg_list_size 228 xtensa->dbregs_num 8291
Debug: 718 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pc              , dbreg_num 0x02ff
Debug: 719 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar0             , dbreg_num 0x0100
Debug: 720 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar1             , dbreg_num 0x0101
Debug: 721 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar2             , dbreg_num 0x0102
Debug: 722 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar3             , dbreg_num 0x0103
Debug: 723 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar4             , dbreg_num 0x0104
Debug: 724 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar5             , dbreg_num 0x0105
Debug: 725 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar6             , dbreg_num 0x0106
Debug: 726 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar7             , dbreg_num 0x0107
Debug: 727 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar8             , dbreg_num 0x0108
Debug: 728 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar9             , dbreg_num 0x0109
Debug: 729 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar10            , dbreg_num 0x010a
Debug: 730 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar11            , dbreg_num 0x010b
Debug: 731 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar12            , dbreg_num 0x010c
Debug: 732 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar13            , dbreg_num 0x010d
Debug: 733 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar14            , dbreg_num 0x010e
Debug: 734 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar15            , dbreg_num 0x010f
Debug: 735 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar16            , dbreg_num 0x0110
Debug: 736 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar17            , dbreg_num 0x0111
Debug: 737 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar18            , dbreg_num 0x0112
Debug: 738 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar19            , dbreg_num 0x0113
Debug: 739 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar20            , dbreg_num 0x0114
Debug: 740 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar21            , dbreg_num 0x0115
Debug: 741 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar22            , dbreg_num 0x0116
Debug: 742 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar23            , dbreg_num 0x0117
Debug: 743 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar24            , dbreg_num 0x0118
Debug: 744 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar25            , dbreg_num 0x0119
Debug: 745 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar26            , dbreg_num 0x011a
Debug: 746 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar27            , dbreg_num 0x011b
Debug: 747 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar28            , dbreg_num 0x011c
Debug: 748 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar29            , dbreg_num 0x011d
Debug: 749 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar30            , dbreg_num 0x011e
Debug: 750 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar31            , dbreg_num 0x011f
Debug: 751 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar32            , dbreg_num 0x0120
Debug: 752 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar33            , dbreg_num 0x0121
Debug: 753 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar34            , dbreg_num 0x0122
Debug: 754 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar35            , dbreg_num 0x0123
Debug: 755 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar36            , dbreg_num 0x0124
Debug: 756 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar37            , dbreg_num 0x0125
Debug: 757 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar38            , dbreg_num 0x0126
Debug: 758 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar39            , dbreg_num 0x0127
Debug: 759 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar40            , dbreg_num 0x0128
Debug: 760 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar41            , dbreg_num 0x0129
Debug: 761 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar42            , dbreg_num 0x012a
Debug: 762 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar43            , dbreg_num 0x012b
Debug: 763 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar44            , dbreg_num 0x012c
Debug: 764 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar45            , dbreg_num 0x012d
Debug: 765 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar46            , dbreg_num 0x012e
Debug: 766 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar47            , dbreg_num 0x012f
Debug: 767 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar48            , dbreg_num 0x0130
Debug: 768 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar49            , dbreg_num 0x0131
Debug: 769 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar50            , dbreg_num 0x0132
Debug: 770 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar51            , dbreg_num 0x0133
Debug: 771 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar52            , dbreg_num 0x0134
Debug: 772 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar53            , dbreg_num 0x0135
Debug: 773 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar54            , dbreg_num 0x0136
Debug: 774 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar55            , dbreg_num 0x0137
Debug: 775 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar56            , dbreg_num 0x0138
Debug: 776 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar57            , dbreg_num 0x0139
Debug: 777 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar58            , dbreg_num 0x013a
Debug: 778 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar59            , dbreg_num 0x013b
Debug: 779 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar60            , dbreg_num 0x013c
Debug: 780 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar61            , dbreg_num 0x013d
Debug: 781 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar62            , dbreg_num 0x013e
Debug: 782 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ar63            , dbreg_num 0x013f
Debug: 783 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: lbeg            , dbreg_num 0x0200
Debug: 784 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: lend            , dbreg_num 0x0201
Debug: 785 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: lcount          , dbreg_num 0x0202
Debug: 786 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: sar             , dbreg_num 0x0203
Debug: 787 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: windowbase      , dbreg_num 0x0248
Debug: 788 68 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: windowstart     , dbreg_num 0x0249
Debug: 789 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: configid0       , dbreg_num 0x02b0
Debug: 790 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: configid1       , dbreg_num 0x02d0
Debug: 791 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ps              , dbreg_num 0x02e6
Debug: 792 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: threadptr       , dbreg_num 0x03e7
Debug: 793 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: br              , dbreg_num 0x0204
Debug: 794 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: scompare1       , dbreg_num 0x020c
Debug: 795 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: acclo           , dbreg_num 0x0210
Debug: 796 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: acchi           , dbreg_num 0x0211
Debug: 797 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: m0              , dbreg_num 0x0220
Debug: 798 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: m1              , dbreg_num 0x0221
Debug: 799 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: m2              , dbreg_num 0x0222
Debug: 800 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: m3              , dbreg_num 0x0223
Debug: 801 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: gpio_out        , dbreg_num 0x030c
Debug: 802 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f0              , dbreg_num 0x0030
Debug: 803 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f1              , dbreg_num 0x0031
Debug: 804 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f2              , dbreg_num 0x0032
Debug: 805 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f3              , dbreg_num 0x0033
Debug: 806 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f4              , dbreg_num 0x0034
Debug: 807 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f5              , dbreg_num 0x0035
Debug: 808 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f6              , dbreg_num 0x0036
Debug: 809 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f7              , dbreg_num 0x0037
Debug: 810 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f8              , dbreg_num 0x0038
Debug: 811 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f9              , dbreg_num 0x0039
Debug: 812 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f10             , dbreg_num 0x003a
Debug: 813 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f11             , dbreg_num 0x003b
Debug: 814 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f12             , dbreg_num 0x003c
Debug: 815 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f13             , dbreg_num 0x003d
Debug: 816 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f14             , dbreg_num 0x003e
Debug: 817 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: f15             , dbreg_num 0x003f
Debug: 818 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: fcr             , dbreg_num 0x03e8
Debug: 819 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: fsr             , dbreg_num 0x03e9
Debug: 820 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: accx_0          , dbreg_num 0x0300
Debug: 821 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: accx_1          , dbreg_num 0x0301
Debug: 822 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_h_0        , dbreg_num 0x0302
Debug: 823 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_h_1        , dbreg_num 0x0303
Debug: 824 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_h_2        , dbreg_num 0x0304
Debug: 825 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_h_3        , dbreg_num 0x0305
Debug: 826 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_h_4        , dbreg_num 0x0306
Debug: 827 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_l_0        , dbreg_num 0x0307
Debug: 828 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_l_1        , dbreg_num 0x0308
Debug: 829 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_l_2        , dbreg_num 0x0309
Debug: 830 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_l_3        , dbreg_num 0x030a
Debug: 831 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: qacc_l_4        , dbreg_num 0x030b
Debug: 832 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: sar_byte        , dbreg_num 0x030d
Debug: 833 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: fft_bit_width   , dbreg_num 0x030e
Debug: 834 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ua_state_0      , dbreg_num 0x030f
Debug: 835 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ua_state_1      , dbreg_num 0x0310
Debug: 836 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ua_state_2      , dbreg_num 0x0311
Debug: 837 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ua_state_3      , dbreg_num 0x0312
Debug: 838 72 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q0              , dbreg_num 0x1008
Debug: 839 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q1              , dbreg_num 0x1009
Debug: 840 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q2              , dbreg_num 0x100a
Debug: 841 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q3              , dbreg_num 0x100b
Debug: 842 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q4              , dbreg_num 0x100c
Debug: 843 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q5              , dbreg_num 0x100d
Debug: 844 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q6              , dbreg_num 0x100e
Debug: 845 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: q7              , dbreg_num 0x100f
Debug: 846 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: mmid            , dbreg_num 0x0259
Debug: 847 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ibreakenable    , dbreg_num 0x0260
Debug: 848 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: memctl          , dbreg_num 0x0261
Debug: 849 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: atomctl         , dbreg_num 0x0263
Debug: 850 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ddr             , dbreg_num 0x0268
Debug: 851 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ibreaka0        , dbreg_num 0x0280
Debug: 852 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ibreaka1        , dbreg_num 0x0281
Debug: 853 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: dbreaka0        , dbreg_num 0x0290
Debug: 854 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: dbreaka1        , dbreg_num 0x0291
Debug: 855 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: dbreakc0        , dbreg_num 0x02a0
Debug: 856 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: dbreakc1        , dbreg_num 0x02a1
Debug: 857 75 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: epc1            , dbreg_num 0x02b1
Debug: 858 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: epc2            , dbreg_num 0x02b2
Debug: 859 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: epc3            , dbreg_num 0x02b3
Debug: 860 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: epc4            , dbreg_num 0x02b4
Debug: 861 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: epc5            , dbreg_num 0x02b5
Debug: 862 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: epc6            , dbreg_num 0x02b6
Debug: 863 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: epc7            , dbreg_num 0x02b7
Debug: 864 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: depc            , dbreg_num 0x02c0
Debug: 865 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: eps2            , dbreg_num 0x02c2
Debug: 866 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: eps3            , dbreg_num 0x02c3
Debug: 867 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: eps4            , dbreg_num 0x02c4
Debug: 868 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: eps5            , dbreg_num 0x02c5
Debug: 869 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: eps6            , dbreg_num 0x02c6
Debug: 870 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: eps7            , dbreg_num 0x02c7
Debug: 871 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excsave1        , dbreg_num 0x02d1
Debug: 872 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excsave2        , dbreg_num 0x02d2
Debug: 873 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excsave3        , dbreg_num 0x02d3
Debug: 874 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excsave4        , dbreg_num 0x02d4
Debug: 875 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excsave5        , dbreg_num 0x02d5
Debug: 876 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excsave6        , dbreg_num 0x02d6
Debug: 877 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excsave7        , dbreg_num 0x02d7
Debug: 878 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: cpenable        , dbreg_num 0x02e0
Debug: 879 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: interrupt       , dbreg_num 0x02e2
Debug: 880 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: intset          , dbreg_num 0x02e2
Debug: 881 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: intclear        , dbreg_num 0x02e3
Debug: 882 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: intenable       , dbreg_num 0x02e4
Debug: 883 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: vecbase         , dbreg_num 0x02e7
Debug: 884 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: exccause        , dbreg_num 0x02e8
Debug: 885 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: debugcause      , dbreg_num 0x02e9
Debug: 886 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ccount          , dbreg_num 0x02ea
Debug: 887 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: prid            , dbreg_num 0x02eb
Debug: 888 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: icount          , dbreg_num 0x02ec
Debug: 889 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: icountlevel     , dbreg_num 0x02ed
Debug: 890 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: excvaddr        , dbreg_num 0x02ee
Debug: 891 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ccompare0       , dbreg_num 0x02f0
Debug: 892 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ccompare1       , dbreg_num 0x02f1
Debug: 893 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ccompare2       , dbreg_num 0x02f2
Debug: 894 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: misc0           , dbreg_num 0x02f4
Debug: 895 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: misc1           , dbreg_num 0x02f5
Debug: 896 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: misc2           , dbreg_num 0x02f6
Debug: 897 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: misc3           , dbreg_num 0x02f7
Debug: 898 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pwrctl          , dbreg_num 0x2028
Debug: 899 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pwrstat         , dbreg_num 0x2029
Debug: 900 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: eristat         , dbreg_num 0x202a
Debug: 901 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: cs_itctrl       , dbreg_num 0x202b
Debug: 902 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: cs_claimset     , dbreg_num 0x202c
Debug: 903 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: cs_claimclr     , dbreg_num 0x202d
Debug: 904 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: cs_lockaccess   , dbreg_num 0x202e
Debug: 905 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: cs_lockstatus   , dbreg_num 0x202f
Debug: 906 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: cs_authstatus   , dbreg_num 0x2030
Debug: 907 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: fault_info      , dbreg_num 0x203f
Debug: 908 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_id         , dbreg_num 0x2040
Debug: 909 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_control    , dbreg_num 0x2041
Debug: 910 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_status     , dbreg_num 0x2042
Debug: 911 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_data       , dbreg_num 0x2043
Debug: 912 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_address    , dbreg_num 0x2044
Debug: 913 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_pctrigger  , dbreg_num 0x2045
Debug: 914 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_pcmatch    , dbreg_num 0x2046
Debug: 915 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_delay      , dbreg_num 0x2047
Debug: 916 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_memstart   , dbreg_num 0x2048
Debug: 917 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: trax_memend     , dbreg_num 0x2049
Debug: 918 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pmg             , dbreg_num 0x2057
Debug: 919 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pmpc            , dbreg_num 0x2058
Debug: 920 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pm0             , dbreg_num 0x2059
Debug: 921 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pm1             , dbreg_num 0x205a
Debug: 922 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pmctrl0         , dbreg_num 0x205b
Debug: 923 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pmctrl1         , dbreg_num 0x205c
Debug: 924 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pmstat0         , dbreg_num 0x205d
Debug: 925 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: pmstat1         , dbreg_num 0x205e
Debug: 926 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ocdid           , dbreg_num 0x205f
Debug: 927 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ocd_dcrclr      , dbreg_num 0x2060
Debug: 928 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ocd_dcrset      , dbreg_num 0x2061
Debug: 929 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: ocd_dsr         , dbreg_num 0x2062
Debug: 930 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a0              , dbreg_num 0x0001
Debug: 931 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a1              , dbreg_num 0x0002
Debug: 932 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a2              , dbreg_num 0x0003
Debug: 933 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a3              , dbreg_num 0x0004
Debug: 934 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a4              , dbreg_num 0x0005
Debug: 935 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a5              , dbreg_num 0x0006
Debug: 936 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a6              , dbreg_num 0x0007
Debug: 937 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a7              , dbreg_num 0x0008
Debug: 938 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a8              , dbreg_num 0x0009
Debug: 939 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a9              , dbreg_num 0x000a
Debug: 940 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a10             , dbreg_num 0x000b
Debug: 941 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a11             , dbreg_num 0x000c
Debug: 942 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a12             , dbreg_num 0x000d
Debug: 943 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a13             , dbreg_num 0x000e
Debug: 944 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a14             , dbreg_num 0x000f
Debug: 945 76 xtensa.c:2978 xtensa_build_reg_cache(): [esp32s3.cpu1] POPULATE contiguous regs list: a15             , dbreg_num 0x0010
Debug: 946 76 semihosting_common.c:105 semihosting_common_init():  
Debug: 947 76 semihosting_common.c:105 semihosting_common_init():  
Info : 948 108 esp_usb_jtag.c:661 esp_usb_jtag_init(): esp_usb_jtag: serial (34:85:18:A5:2D:30)
Debug: 949 108 libusb_helper.c:343 jtag_libusb_choose_interface(): usb ep out 02
Debug: 950 108 libusb_helper.c:343 jtag_libusb_choose_interface(): usb ep in 83
Debug: 951 108 libusb_helper.c:351 jtag_libusb_choose_interface(): Claiming interface 2
Info : 952 108 esp_usb_jtag.c:738 esp_usb_jtag_init(): esp_usb_jtag: Device found. Base speed 40000KHz, div range 1 to 255
Debug: 953 108 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 954 112 adapter.c:218 adapter_khz_to_speed(): have adapter set up
Debug: 955 112 esp_usb_jtag.c:798 esp_usb_jtag_khz(): Divisor for 40000 KHz with base clock of 40000 khz is 1
Debug: 956 112 esp_usb_jtag.c:814 esp_usb_jtag_speed(): esp_usb_jtag: setting divisor 1
Debug: 957 112 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 958 112 adapter.c:218 adapter_khz_to_speed(): have adapter set up
Debug: 959 112 esp_usb_jtag.c:798 esp_usb_jtag_khz(): Divisor for 40000 KHz with base clock of 40000 khz is 1
Info : 960 112 adapter.c:178 adapter_init(): clock speed 40000 kHz
Debug: 961 112 openocd.c:133 handle_init_command(): Debug Adapter init complete
Debug: 962 112 command.c:152 script_debug(): command - transport init
Debug: 963 112 transport.c:218 handle_transport_init(): handle_transport_init
Debug: 964 112 core.c:716 legacy_jtag_add_reset(): SRST line released
Debug: 965 112 core.c:740 legacy_jtag_add_reset(): TRST line released
Debug: 966 112 core.c:326 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 967 112 command.c:152 script_debug(): command - jtag arp_init
Debug: 968 112 core.c:1507 jtag_init_inner(): Init JTAG chain
Debug: 969 112 core.c:326 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 970 112 core.c:1232 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 971 112 core.c:326 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 972 112 core.c:1131 jtag_examine_chain_display(): JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : 973 112 core.c:1131 jtag_examine_chain_display(): JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Debug: 974 112 core.c:1362 jtag_validate_ircapture(): IR capture validation scan
Debug: 975 112 core.c:1420 jtag_validate_ircapture(): esp32s3.cpu0: IR capture 0x01
Debug: 976 112 core.c:1420 jtag_validate_ircapture(): esp32s3.cpu1: IR capture 0x01
Debug: 977 112 command.c:152 script_debug(): command - dap init
Debug: 978 112 arm_dap.c:95 dap_init_all(): Initializing all DAPs ...
Debug: 979 112 openocd.c:150 handle_init_command(): Examining targets...
Debug: 980 112 target.c:679 target_examine_one(): [esp32s3.cpu0] Examination started
Debug: 981 112 target.c:1781 target_call_event_callbacks(): target event 19 (examine-start) for core esp32s3.cpu0
Debug: 982 112 xtensa.c:825 xtensa_examine(): [esp32s3.cpu0] examine
Debug: 983 112 xtensa.c:843 xtensa_examine(): [esp32s3.cpu0] OCD_ID = 0b339fd2
Debug: 984 112 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 985 112 target.c:1781 target_call_event_callbacks(): target event 21 (examine-end) for core esp32s3.cpu0
Debug: 986 112 target.c:4679 target_handle_event(): target: esp32s3.cpu0 (esp32s3) event: 21 (examine-end) action: 
		# Need to enable to set 'semihosting_basedir'
		arm semihosting enable
		arm semihosting_resexit enable
		if { [info exists _SEMIHOST_BASEDIR] } {
			if { $_SEMIHOST_BASEDIR != "" } {
				arm semihosting_basedir $_SEMIHOST_BASEDIR
			}
		}
	
Debug: 987 112 command.c:152 script_debug(): command - arm semihosting enable
Debug: 988 112 esp_xtensa_semihosting.c:26 esp_xtensa_semihosting_setup(): [esp32s3.cpu0] semihosting enable=1
Debug: 989 112 command.c:152 script_debug(): command - arm semihosting_resexit enable
Debug: 990 112 command.c:152 script_debug(): command - arm semihosting_basedir .
Info : 991 112 target.c:695 target_examine_one(): [esp32s3.cpu0] Examination succeed
Debug: 992 112 target.c:679 target_examine_one(): [esp32s3.cpu1] Examination started
Debug: 993 112 target.c:1781 target_call_event_callbacks(): target event 19 (examine-start) for core esp32s3.cpu1
Debug: 994 112 xtensa.c:825 xtensa_examine(): [esp32s3.cpu1] examine
Debug: 995 112 xtensa.c:843 xtensa_examine(): [esp32s3.cpu1] OCD_ID = 0b339fd2
Debug: 996 112 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu1] write smpbreak set=0x30000 clear=0x600000
Debug: 997 112 target.c:1781 target_call_event_callbacks(): target event 21 (examine-end) for core esp32s3.cpu1
Debug: 998 112 target.c:4679 target_handle_event(): target: esp32s3.cpu1 (esp32s3) event: 21 (examine-end) action: 
			# Need to enable to set 'semihosting_basedir'
			arm semihosting enable
			arm semihosting_resexit enable
			if { [info exists _SEMIHOST_BASEDIR] } {
				if { $_SEMIHOST_BASEDIR != "" } {
					arm semihosting_basedir $_SEMIHOST_BASEDIR
				}
			}
		
Debug: 999 112 command.c:152 script_debug(): command - arm semihosting enable
Debug: 1000 112 esp_xtensa_semihosting.c:26 esp_xtensa_semihosting_setup(): [esp32s3.cpu1] semihosting enable=1
Debug: 1001 112 command.c:152 script_debug(): command - arm semihosting_resexit enable
Debug: 1002 112 command.c:152 script_debug(): command - arm semihosting_basedir .
Info : 1003 112 target.c:695 target_examine_one(): [esp32s3.cpu1] Examination succeed
Debug: 1004 112 command.c:152 script_debug(): command - flash init
Debug: 1005 112 tcl.c:1364 handle_flash_init_command(): Initializing flash devices...
Debug: 1006 112 command.c:152 script_debug(): command - nand init
Debug: 1007 112 tcl.c:484 handle_nand_init_command(): Initializing NAND devices...
Debug: 1008 112 command.c:152 script_debug(): command - pld init
Debug: 1009 112 pld.c:337 handle_pld_init_command(): Initializing PLDs...
Debug: 1010 112 command.c:152 script_debug(): command - tpiu init
Info : 1011 112 gdb_server.c:3807 gdb_target_start(): starting gdb server for esp32s3.cpu0 on 3333
Info : 1012 112 server.c:298 add_service(): Listening on port 3333 for gdb connections
Debug: 1013 112 command.c:152 script_debug(): command - target names
Debug: 1014 186 xtensa.c:2255 xtensa_poll(): [esp32s3.cpu0] DSR has changed: was 0x00000000 now 0x8080cc11
Debug: 1015 186 xtensa.c:1167 xtensa_fetch_all_regs(): [esp32s3.cpu0] start
Debug: 1016 186 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1017 201 xtensa.c:1246 xtensa_fetch_all_regs(): [esp32s3.cpu0] CPENABLE: was 0xff, all enabled
Debug: 1018 217 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1019 217 xtensa.c:2295 xtensa_poll(): [esp32s3.cpu0] Target halted, pc=0x40000400, debug_reason=00000001, oldstate=00000001
Debug: 1020 217 xtensa.c:2299 xtensa_poll(): [esp32s3.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11
Info : 1021 217 xtensa.c:2301 xtensa_poll(): [esp32s3.cpu0] Target halted, PC=0x40000400, debug_reason=00000001
Debug: 1022 217 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x0 clear=0x630000
Debug: 1023 217 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=0, state=2
Debug: 1024 217 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1025 217 target.c:2570 target_read_u32(): address: 0x60008038, value: 0x0030f0c3
Info : 1026 217 esp_xtensa.c:264 esp_xtensa_reset_reason_read(): [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Debug: 1027 217 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 1028 217 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=2
Debug: 1029 217 esp_xtensa_smp.c:226 esp_xtensa_smp_poll(): [esp32s3.cpu0] Check for unexamined cores after reset
Debug: 1030 217 esp_xtensa_smp.c:316 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32s3.cpu0'
Info : 1031 232 esp_xtensa_smp.c:321 esp_xtensa_smp_update_halt_gdb(): Set GDB target to 'esp32s3.cpu0'
Debug: 1032 232 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu0'
Debug: 1033 232 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu1'
Debug: 1034 232 esp_xtensa_smp.c:344 esp_xtensa_smp_update_halt_gdb(): Poll target 'esp32s3.cpu1'
Debug: 1035 232 xtensa.c:2255 xtensa_poll(): [esp32s3.cpu1] DSR has changed: was 0x00000000 now 0x8080cc11
Debug: 1036 232 xtensa.c:1167 xtensa_fetch_all_regs(): [esp32s3.cpu1] start
Debug: 1037 232 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1038 232 xtensa.c:1246 xtensa_fetch_all_regs(): [esp32s3.cpu1] CPENABLE: was 0xff, all enabled
Debug: 1039 264 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1040 264 xtensa.c:2295 xtensa_poll(): [esp32s3.cpu1] Target halted, pc=0x40000400, debug_reason=00000000, oldstate=00000001
Debug: 1041 264 xtensa.c:2299 xtensa_poll(): [esp32s3.cpu1] Halt reason=0x00000020, exc_cause=0, dsr=0x8080cc11
Info : 1042 264 xtensa.c:2301 xtensa_poll(): [esp32s3.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Debug: 1043 265 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1044 266 target.c:2570 target_read_u32(): address: 0x60008038, value: 0x0030f0c3
Info : 1045 266 esp_xtensa.c:264 esp_xtensa_reset_reason_read(): [esp32s3.cpu1] Reset cause (3) - (Software core reset)
Debug: 1046 266 target.c:2658 target_write_u32(): address: 0x6001f064, value: 0x50d83aa1
Debug: 1047 266 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1048 266 target.c:2658 target_write_u32(): address: 0x6001f048, value: 0x00000000
Debug: 1049 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1050 267 target.c:2658 target_write_u32(): address: 0x60020064, value: 0x50d83aa1
Debug: 1051 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1052 267 target.c:2658 target_write_u32(): address: 0x60020048, value: 0x00000000
Debug: 1053 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1054 267 target.c:2658 target_write_u32(): address: 0x600080b0, value: 0x50d83aa1
Debug: 1055 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1056 267 target.c:2658 target_write_u32(): address: 0x60008098, value: 0x00000000
Debug: 1057 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1058 267 target.c:2658 target_write_u32(): address: 0x600080b4, value: 0x8f1d312a
Debug: 1059 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1060 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1061 267 target.c:2570 target_read_u32(): address: 0x600080b0, value: 0x50d83aa1
Debug: 1062 267 target.c:2658 target_write_u32(): address: 0x600080b0, value: 0xd0d83aa1
Debug: 1063 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu1] DSR (8080CC11)
Debug: 1064 267 esp_xtensa.c:143 esp_xtensa_print_exception_reason(): [esp32s3.cpu1] EPS=0x1F EXCM=1
Debug: 1065 267 target.c:1781 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32s3.cpu1
Debug: 1066 267 target.c:1781 target_call_event_callbacks(): target event 1 (halted) for core esp32s3.cpu1
Debug: 1067 267 esp_xtensa_smp.c:375 esp_xtensa_smp_update_halt_gdb(): exit
Debug: 1068 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1069 267 target.c:2658 target_write_u32(): address: 0x6001f064, value: 0x50d83aa1
Debug: 1070 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1071 267 target.c:2658 target_write_u32(): address: 0x6001f048, value: 0x00000000
Debug: 1072 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1073 267 target.c:2658 target_write_u32(): address: 0x60020064, value: 0x50d83aa1
Debug: 1074 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1075 267 target.c:2658 target_write_u32(): address: 0x60020048, value: 0x00000000
Debug: 1076 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1077 267 target.c:2658 target_write_u32(): address: 0x600080b0, value: 0x50d83aa1
Debug: 1078 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1079 267 target.c:2658 target_write_u32(): address: 0x60008098, value: 0x00000000
Debug: 1080 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1081 267 target.c:2658 target_write_u32(): address: 0x600080b4, value: 0x8f1d312a
Debug: 1082 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1083 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1084 267 target.c:2570 target_read_u32(): address: 0x600080b0, value: 0x50d83aa1
Debug: 1085 267 target.c:2658 target_write_u32(): address: 0x600080b0, value: 0xd0d83aa1
Debug: 1086 267 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1087 267 esp_xtensa.c:143 esp_xtensa_print_exception_reason(): [esp32s3.cpu0] EPS=0x1F EXCM=1
Debug: 1088 267 esp_xtensa.c:143 esp_xtensa_print_exception_reason(): [esp32s3.cpu1] EPS=0x1F EXCM=1
Debug: 1089 267 target.c:1781 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32s3.cpu0
Debug: 1090 267 target.c:1781 target_call_event_callbacks(): target event 1 (halted) for core esp32s3.cpu0
Debug: 1091 267 esp_xtensa_smp.c:226 esp_xtensa_smp_poll(): [esp32s3.cpu1] Check for unexamined cores after reset
Info : 1092 64068 server.c:90 add_connection(): accepting 'gdb' connection on tcp/3333
Debug: 1093 64068 breakpoints.c:328 breakpoint_remove_all_internal(): [esp32s3.cpu0] Delete all breakpoints
Debug: 1094 64068 breakpoints.c:328 breakpoint_remove_all_internal(): [esp32s3.cpu1] Delete all breakpoints
Debug: 1095 64068 breakpoints.c:655 watchpoint_clear_target(): Delete all watchpoints for target: esp32s3.cpu0
Debug: 1096 64081 target.c:1781 target_call_event_callbacks(): target event 22 (gdb-attach) for core esp32s3.cpu0
Debug: 1097 64081 target.c:4679 target_handle_event(): target: esp32s3.cpu0 (esp32s3) event: 22 (gdb-attach) action: 
		if { $_ESP_SMP_BREAK != 0 } {
			$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
		}
		# necessary to auto-probe flash bank when GDB is connected and generate proper memory map
		halt 1000
		if { [$_ESP_MEMPROT_IS_ENABLED] } {
			# 'reset halt' to disable memory protection and allow flasher to work correctly
			echo "Memory protection is enabled. Reset target to disable it..."
			reset halt
		}

		if { $_ESP_ARCH == "riscv" } {
			# by default mask interrupts while stepping
			riscv set_maskisr steponly
		}
	
Debug: 1098 64082 command.c:152 script_debug(): command - esp32s3.cpu0 xtensa smpbreak BreakIn BreakOut
Debug: 1099 64082 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 1100 64083 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=2
Debug: 1101 64083 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu1] write smpbreak set=0x30000 clear=0x600000
Debug: 1102 64083 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu1] set smpbreak=30000, state=2
Debug: 1103 64083 command.c:152 script_debug(): command - halt 1000
Debug: 1104 64084 target.c:3251 handle_halt_command(): -
Debug: 1105 64084 xtensa.c:1482 xtensa_halt(): [esp32s3.cpu0] start
Debug: 1106 64084 xtensa.c:1484 xtensa_halt(): [esp32s3.cpu0] target was already halted
Debug: 1107 64086 command.c:152 script_debug(): command - read_memory 0x600C10C0 32 1
Debug: 1108 64086 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1109 64086 command.c:152 script_debug(): command - read_memory 0x600C1124 32 1
Debug: 1110 64087 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1111 64087 command.c:152 script_debug(): command - read_memory 0x600C11D0 32 1
Debug: 1112 64088 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1113 64088 command.c:152 script_debug(): command - read_memory 0x600C10D8 32 1
Debug: 1114 64089 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1115 64089 command.c:152 script_debug(): command - read_memory 0x600C10FC 32 1
Debug: 1116 64090 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1117 64090 command.c:152 script_debug(): command - read_memory 0x600C10E4 32 1
Debug: 1118 64091 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1119 64091 command.c:152 script_debug(): command - read_memory 0x600C10F0 32 1
Debug: 1120 64091 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1121 64091 command.c:152 script_debug(): command - read_memory 0x600C1104 32 1
Debug: 1122 64092 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1123 64092 command.c:152 script_debug(): command - read_memory 0x600C1114 32 1
Debug: 1124 64093 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1125 64093 command.c:152 script_debug(): command - read_memory 0x600C119C 32 1
Debug: 1126 64093 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1127 64093 command.c:152 script_debug(): command - read_memory 0x600C1248 32 1
Debug: 1128 64095 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1129 64095 FreeRTOS.c:1404 freertos_clean(): freertos_clean
Debug: 1130 64095 FreeRTOS.c:899 freertos_update_threads(): freertos_update_threads
Warn : 1131 64095 FreeRTOS.c:907 freertos_update_threads(): No symbols for FreeRTOS!
Debug: 1132 64095 esp_flash.c:960 esp_algo_flash_probe(): Flash size = 0 KB @ 0x00000000 'esp32s3.cpu0' - 'halted'
Debug: 1133 64095 esp_flash.c:245 esp_algo_flasher_algorithm_init(): base=00000000 set=0
Debug: 1134 64095 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1135 64095 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x0 clear=0x630000
Debug: 1136 64095 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=0, state=2
Debug: 1137 64095 esp_algorithm.c:325 esp_algorithm_load_func_image(): stub: base 0x0, start 0x4038dc68, 2 sections
Debug: 1138 64095 esp_algorithm.c:354 esp_algorithm_load_func_image(): addr 0x00000000, sz 12474, flags 1
Debug: 1139 64095 target.c:1986 target_alloc_working_area_try(): MMU disabled, using physical address for working memory 0x3fc9c000
Debug: 1140 64095 target.c:2039 target_alloc_working_area_try(): allocated new working area of 12476 bytes at address 0x3fc9c000
Debug: 1141 64243 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1142 64243 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1143 64243 target.c:1907 print_wa_layout():    0x3fc9f0bc-0x3fcbffff (134980 bytes)
Debug: 1144 64244 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c000
Debug: 1145 64255 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1146 64256 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c400
Debug: 1147 64268 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1148 64268 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c800
Debug: 1149 64282 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1150 64282 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9cc00
Debug: 1151 64294 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1152 64295 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d000
Debug: 1153 64307 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1154 64307 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d400
Debug: 1155 64322 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1156 64322 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d800
Debug: 1157 64333 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1158 64333 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9dc00
Debug: 1159 64345 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1160 64345 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e000
Debug: 1161 64358 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1162 64358 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e400
Debug: 1163 64372 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1164 64372 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e800
Debug: 1165 64385 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1166 64385 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9ec00
Debug: 1167 64398 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1168 64398 target.c:2351 target_write_buffer(): writing buffer of 186 byte at 0x3fc9f000
Debug: 1169 64399 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1170 64404 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1171 64404 target.c:2039 target_alloc_working_area_try(): allocated new working area of 28 bytes at address 0x3fc9f0bc
Debug: 1172 64405 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1173 64405 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1174 64406 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1175 64406 target.c:1907 print_wa_layout():    0x3fc9f0d8-0x3fcbffff (134952 bytes)
Debug: 1176 64406 esp_algorithm.c:412 esp_algorithm_load_func_image(): Write tramp to addr 0x3fc9f0bc, sz 28
Debug: 1177 64406 target.c:2351 target_write_buffer(): writing buffer of 28 byte at 0x3fc9f0bc
Debug: 1178 64407 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1179 64407 esp_algorithm.c:423 esp_algorithm_load_func_image(): Tramp mapped to addr 0x4038f0bc
Debug: 1180 64407 target.c:2039 target_alloc_working_area_try(): allocated new working area of 3880 bytes at address 0x3fc9f0d8
Debug: 1181 64408 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1182 64408 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1183 64408 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1184 64408 target.c:1907 print_wa_layout():    0x3fca0000-0x3fcbffff (131072 bytes)
Debug: 1185 64408 esp_algorithm.c:448 esp_algorithm_load_func_image(): addr 0x00000000, sz 4362, flags 0
Debug: 1186 64408 esp_algorithm.c:452 esp_algorithm_load_func_image(): DATA sec size 4362 -> 4364
Debug: 1187 64408 esp_algorithm.c:454 esp_algorithm_load_func_image(): BSS sec size 4373 -> 4376
Debug: 1188 64408 target.c:2039 target_alloc_working_area_try(): allocated new working area of 8740 bytes at address 0x3fca0000
Debug: 1189 64511 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1190 64512 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1191 64512 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1192 64512 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1193 64512 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1194 64512 target.c:1907 print_wa_layout():    0x3fca2224-0x3fcbffff (122332 bytes)
Debug: 1195 64512 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0000
Debug: 1196 64524 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1197 64525 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0400
Debug: 1198 64538 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1199 64538 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0800
Debug: 1200 64552 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1201 64552 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0c00
Debug: 1202 64565 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1203 64566 target.c:2351 target_write_buffer(): writing buffer of 266 byte at 0x3fca1000
Debug: 1204 64567 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1205 64570 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1206 64570 target.c:2039 target_alloc_working_area_try(): allocated new working area of 1300 bytes at address 0x3fca2224
Debug: 1207 64587 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1208 64587 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1209 64587 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1210 64587 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1211 64587 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1212 64587 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 1213 64587 target.c:1907 print_wa_layout():    0x3fca2738-0x3fcbffff (121032 bytes)
Debug: 1214 64587 esp_algorithm.c:495 esp_algorithm_load_func_image(): Stub loaded in 492.216 ms
Debug: 1215 64587 esp_xtensa_algorithm.c:101 esp_xtensa_algo_init(): reg params count 9 (6/3).
Debug: 1216 64587 esp_xtensa_algorithm.c:47 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Check stack addr 0x3fca2738
Debug: 1217 64587 esp_xtensa_algorithm.c:50 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Adjust stack addr to 0x3fca2730
Debug: 1218 64587 esp_xtensa_algorithm.c:116 esp_xtensa_algo_init(): Set arg[0] = 5 (a2)
Debug: 1219 64587 esp_xtensa_algorithm.c:125 esp_xtensa_algo_init(): Set arg[1] = -1 (a3)
Debug: 1220 64588 esp_xtensa_algorithm.c:125 esp_xtensa_algo_init(): Set arg[2] = 0 (a4)
Debug: 1221 64588 target.c:2039 target_alloc_working_area_try(): allocated new working area of 28 bytes at address 0x3fca2738
Debug: 1222 64589 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1223 64589 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1224 64589 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1225 64589 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1226 64589 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1227 64589 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 1228 64589 target.c:1907 print_wa_layout(): b* 0x3fca2738-0x3fca2753 (28 bytes)
Debug: 1229 64589 target.c:1907 print_wa_layout():    0x3fca2754-0x3fcbffff (121004 bytes)
Debug: 1230 64589 esp_algorithm.c:96 esp_algorithm_run_image(): Algorithm start @ 0x4038f0bc, stack 1300 bytes @ 0x3fca2738
Debug: 1231 64589 xtensa.c:1591 xtensa_resume(): [esp32s3.cpu0] start
Debug: 1232 64589 xtensa.c:1519 xtensa_prepare_resume(): [esp32s3.cpu0] current=0 address=0x4038f0bc, handle_breakpoints=1, debug_execution=1)
Debug: 1233 64589 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 1234 64589 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 4038F0BC
Debug: 1235 64589 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowbase (72) val 00000000
Debug: 1236 64589 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowstart (73) val 00000001
Debug: 1237 64589 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 00060025
Debug: 1238 64589 xtensa.c:677 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg cpenable (224) val 000000FF
Debug: 1239 64591 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1240 64591 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a0 value 00000000, num =1
Debug: 1241 64591 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 3FCA2720, num =2
Debug: 1242 64591 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a2 value 00000005, num =3
Debug: 1243 64591 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value FFFFFFFF, num =4
Debug: 1244 64591 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a4 value 3FCA2738, num =5
Debug: 1245 64591 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 4038DC68, num =9
Debug: 1246 64592 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1247 64592 xtensa.c:1572 xtensa_do_resume(): [esp32s3.cpu0] start
Debug: 1248 64594 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC01)
Debug: 1249 64594 target.c:1781 target_call_event_callbacks(): target event 2 (resumed) for core esp32s3.cpu0
Debug: 1250 64594 esp_algorithm.c:117 esp_algorithm_run_image(): Wait algorithm completion
Debug: 1251 64595 target.c:3230 target_wait_state(): waiting for target halted...
Debug: 1252 64607 xtensa.c:2255 xtensa_poll(): [esp32s3.cpu0] DSR has changed: was 0x8080cc01 now 0x8080cc11
Debug: 1253 64607 xtensa.c:1167 xtensa_fetch_all_regs(): [esp32s3.cpu0] start
Debug: 1254 64616 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1255 64616 xtensa.c:1246 xtensa_fetch_all_regs(): [esp32s3.cpu0] CPENABLE: was 0xff, all enabled
Debug: 1256 64634 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1257 64634 xtensa.c:2295 xtensa_poll(): [esp32s3.cpu0] Target halted, pc=0x4038f0d2, debug_reason=00000001, oldstate=00000004
Debug: 1258 64634 xtensa.c:2299 xtensa_poll(): [esp32s3.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11
Info : 1259 64634 xtensa.c:2301 xtensa_poll(): [esp32s3.cpu0] Target halted, PC=0x4038F0D2, debug_reason=00000001
Debug: 1260 64635 esp_xtensa_smp.c:316 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32s3.cpu0'
Debug: 1261 64635 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu0'
Debug: 1262 64635 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu1'
Debug: 1263 64635 esp_xtensa_smp.c:375 esp_xtensa_smp_update_halt_gdb(): exit
Debug: 1264 64635 target.c:1781 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32s3.cpu0
Debug: 1265 64635 xtensa.c:2787 xtensa_wait_algorithm(): Read mem params
Debug: 1266 64635 xtensa.c:2789 xtensa_wait_algorithm(): Check mem param @ 0x3fca2738
Debug: 1267 64635 xtensa.c:2791 xtensa_wait_algorithm(): Read mem param @ 0x3fca2738
Debug: 1268 64635 target.c:2416 target_read_buffer(): reading buffer of 28 byte at 0x3fca2738
Debug: 1269 64637 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1270 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ccount: 0x00040d4b -> 0x00000003
Debug: 1271 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register eps6: 0x00060225 -> 0x0000001f
Debug: 1272 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register epc6: 0x4038f0d2 -> 0x40000400
Debug: 1273 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register epc1: 0x4038ec1e -> 0x00000000
Debug: 1274 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register sar: 0x00000005 -> 0x00000000
Debug: 1275 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lcount: 0xffffffff -> 0x00000000
Debug: 1276 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lend: 0x4038ed0e -> 0x00000000
Debug: 1277 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lbeg: 0x4038ecf8 -> 0x00000000
Debug: 1278 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a14: 0x00110000 -> 0x00000000
Debug: 1279 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a13: 0x02000000 -> 0x00000000
Debug: 1280 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a11: 0x00000005 -> 0x00000000
Debug: 1281 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a9: 0x3fca2640 -> 0x00000000
Debug: 1282 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a8: 0x8038f0d0 -> 0x00000000
Debug: 1283 64637 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a4: 0x3fca2738 -> 0x00000000
Debug: 1284 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x3fca2738
Debug: 1285 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a1: 0x3fca2720 -> 0x00000000
Debug: 1286 64638 xtensa.c:2811 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000008
Debug: 1287 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar60: 0x20000000 -> 0x00000000
Debug: 1288 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar58: 0x3fca1a4b -> 0x00000000
Debug: 1289 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar57: 0x3fca1200 -> 0x00000000
Debug: 1290 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar56: 0x0000084c -> 0x00000000
Debug: 1291 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar55: 0x3fca2498 -> 0x00000000
Debug: 1292 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar50: 0x3fca1a5a -> 0x00000000
Debug: 1293 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar49: 0x3fca1200 -> 0x00000000
Debug: 1294 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar48: 0x0000085b -> 0x00000000
Debug: 1295 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar47: 0x3fca24e8 -> 0x00000000
Debug: 1296 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar45: 0x00000063 -> 0x00000000
Debug: 1297 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar44: 0x3fca2538 -> 0x00000000
Debug: 1298 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar43: 0x3fca2538 -> 0x00000000
Debug: 1299 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar42: 0x0000000a -> 0x00000000
Debug: 1300 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar41: 0x3fca2530 -> 0x00000000
Debug: 1301 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar39: 0x3fca2521 -> 0x00000000
Debug: 1302 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar38: 0x3ff1ab87 -> 0x00000000
Debug: 1303 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar37: 0x00000030 -> 0x00000000
Debug: 1304 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar36: 0x3fca2571 -> 0x00000000
Debug: 1305 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar35: 0x3fca2571 -> 0x00000000
Debug: 1306 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar33: 0x3fca2550 -> 0x00000000
Debug: 1307 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar32: 0x80044186 -> 0x00000000
Debug: 1308 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar31: 0xfffffffe -> 0x00000000
Debug: 1309 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar30: 0x00000008 -> 0x00000000
Debug: 1310 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar29: 0x3fca2571 -> 0x00000000
Debug: 1311 64638 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar28: 0xffffffff -> 0x00000000
Debug: 1312 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar27: 0x3fca0e7a -> 0x00000000
Debug: 1313 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar26: 0x0000000f -> 0x00000000
Debug: 1314 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar25: 0x3fca2570 -> 0x00000000
Debug: 1315 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar23: 0x3fca266c -> 0x00000000
Debug: 1316 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar22: 0x00000005 -> 0x00000000
Debug: 1317 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar21: 0x3fca2204 -> 0x00000000
Debug: 1318 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar20: 0x00000002 -> 0x00000000
Debug: 1319 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar19: 0x3fca0e6a -> 0x00000000
Debug: 1320 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar18: 0x0000000f -> 0x00000000
Debug: 1321 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar17: 0x3fca25f0 -> 0x00000000
Debug: 1322 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar16: 0x8038ebd4 -> 0x00000000
Debug: 1323 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar14: 0x00110000 -> 0x00000000
Debug: 1324 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar13: 0x02000000 -> 0x00000000
Debug: 1325 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar11: 0x00000005 -> 0x00000000
Debug: 1326 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar9: 0x3fca2640 -> 0x00000000
Debug: 1327 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar8: 0x8038f0d0 -> 0x00000000
Debug: 1328 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar4: 0x3fca2738 -> 0x00000000
Debug: 1329 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x3fca2738
Debug: 1330 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar1: 0x3fca2720 -> 0x00000000
Debug: 1331 64639 xtensa.c:2820 xtensa_wait_algorithm(): restoring register pc: 0x4038f0d2 -> 0x40000400
Debug: 1332 64639 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 1333 64639 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 40000400
Debug: 1334 64639 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lbeg (0) val 00000000
Debug: 1335 64640 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lend (1) val 00000000
Debug: 1336 64640 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lcount (2) val 00000000
Debug: 1337 64640 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg sar (3) val 00000000
Debug: 1338 64640 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg epc1 (177) val 00000000
Debug: 1339 64640 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg epc6 (182) val 40000400
Debug: 1340 64640 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 0000001F
Debug: 1341 64640 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ccount (234) val 00000003
Debug: 1342 64640 xtensa.c:677 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg cpenable (224) val 000000FF
Debug: 1343 64642 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1344 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 00000000, num =2
Debug: 1345 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value 3FCA2738, num =4
Debug: 1346 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a4 value 00000000, num =5
Debug: 1347 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 00000000, num =9
Debug: 1348 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a9 value 00000000, num =10
Debug: 1349 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a11 value 00000000, num =12
Debug: 1350 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a13 value 00000000, num =14
Debug: 1351 64642 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a14 value 00000000, num =15
Debug: 1352 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar1 value 00000000, num =1
Debug: 1353 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar3 value 3FCA2738, num =3
Debug: 1354 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar4 value 00000000, num =4
Debug: 1355 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar8 value 00000000, num =8
Debug: 1356 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar9 value 00000000, num =9
Debug: 1357 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar11 value 00000000, num =11
Debug: 1358 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar13 value 00000000, num =13
Debug: 1359 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar14 value 00000000, num =14
Debug: 1360 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar16 value 00000000, num =16
Debug: 1361 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar17 value 00000000, num =17
Debug: 1362 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar18 value 00000000, num =18
Debug: 1363 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar19 value 00000000, num =19
Debug: 1364 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar20 value 00000000, num =20
Debug: 1365 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar21 value 00000000, num =21
Debug: 1366 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar22 value 00000000, num =22
Debug: 1367 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar23 value 00000000, num =23
Debug: 1368 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar25 value 00000000, num =25
Debug: 1369 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar26 value 00000000, num =26
Debug: 1370 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar27 value 00000000, num =27
Debug: 1371 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar28 value 00000000, num =28
Debug: 1372 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar29 value 00000000, num =29
Debug: 1373 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar30 value 00000000, num =30
Debug: 1374 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar31 value 00000000, num =31
Debug: 1375 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar32 value 00000000, num =32
Debug: 1376 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar33 value 00000000, num =33
Debug: 1377 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar35 value 00000000, num =35
Debug: 1378 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar36 value 00000000, num =36
Debug: 1379 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar37 value 00000000, num =37
Debug: 1380 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar38 value 00000000, num =38
Debug: 1381 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar39 value 00000000, num =39
Debug: 1382 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar41 value 00000000, num =41
Debug: 1383 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar42 value 00000000, num =42
Debug: 1384 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar43 value 00000000, num =43
Debug: 1385 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar44 value 00000000, num =44
Debug: 1386 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar45 value 00000000, num =45
Debug: 1387 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar47 value 00000000, num =47
Debug: 1388 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar48 value 00000000, num =48
Debug: 1389 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar49 value 00000000, num =49
Debug: 1390 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar50 value 00000000, num =50
Debug: 1391 64642 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar55 value 00000000, num =55
Debug: 1392 64643 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar56 value 00000000, num =56
Debug: 1393 64643 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar57 value 00000000, num =57
Debug: 1394 64643 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar58 value 00000000, num =58
Debug: 1395 64643 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar60 value 00000000, num =60
Debug: 1396 64647 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1397 64648 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1398 64648 target.c:2570 target_read_u32(): address: 0x3fca1200, value: 0x0000085b
Debug: 1399 64674 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
STUB_D: cpu_freq:160 Mhz
STUB_D: DATA 0x3fca0000..0x3fca110a
STUB_D: BSS 0x3fca110c..0x3fca2221
STUB_D: cmd 5:FLASH_MAP_GET
STUB_D: stub_flash_handler arg1 ffffffff, arg2 1070212920
STUB_I: Flash state prepared...
STUB_D: stub_flash_get_size: ENTER
STUB_D: flash c28039, cs 2000000, bs 10000, ss 1000, ps 100, sm ffff
STUB_D: Flash ID read 3980c2
STUB_D: Flash ID 39, size 32768 KB
STUB_D: stub_flash_get_size: ENTER
STUB_D: flash c28039, cs 2000000, bs 10000, ss 1000, ps 100, sm ffff
STUB_D: Flash ID read 3980c2
STUB_D: Flash ID 39, size 32768 KB
STUB_D: stub_flash_get_map: 0xffffffff 0x3fca2738
STUB_D: start_page: 2 map_src: 0 map_size: 8020 page_cnt: 1 flash_page: 0 map_ptr: 3c028000
STUB_D: Found partition 0, m 0x50aa, t 0x1, st 0x2, l 'nvs'
STUB_D: start_page: 2 map_src: 0 map_size: 8040 page_cnt: 1 flash_page: 0 map_ptr: 3c028020
STUB_D: Found partition 1, m 0x50aa, t 0x1, st 0x1, l 'phy_init'
STUB_D: start_page: 2 map_src: 0 map_size: 8060 page_cnt: 1 flash_page: 0 map_ptr: 3c028040
STUB_D: Found partition 2, m 0x50aa, t 0x0, st 0x0, l 'factory'
STUB_I: Found app partition: 'factory' 1024 KB @ 0x10000
STUB_D: start_page: 2 map_src: 10000 map_size: 18 page_cnt: 1 flash_page: 1 map_ptr: 3c020000
STUB_I: Found app image: magic 0xe9, 5 segments, entry @ 0x403752dc
STUB_D: start_page: 2 map_src: 10000 map_size: 20 page_cnt: 1 flash_page: 1 map_ptr: 3c020018
STUB_I: App segment 0: 41736 bytes @ 0x3c020020
STUB_I: Mapped segment 0: 41736 bytes @ 0x10020 -> 0x3c020020
STUB_D: start_page: 2 map_src: 10000 map_size: a330 page_cnt: 1 flash_page: 1 map_ptr: 3c02a328
STUB_I: App segment 1: 10820 bytes @ 0x3fc92200
STUB_D: start_page: 2 map_src: 10000 map_size: cd7c page_cnt: 1 flash_page: 1 map_ptr: 3c02cd74
STUB_I: App segment 2: 12956 bytes @ 0x40374000
STUB_D: start_page: 2 map_src: 20000 map_size: 20 page_cnt: 1 flash_page: 2 map_ptr: 3c020018
STUB_I: App segment 3: 96092 bytes @ 0x42000020
STUB_I: Mapped segment 1: 96092 bytes @ 0x20020 -> 0x42000020
STUB_D: start_page: 2 map_src: 30000 map_size: 7784 page_cnt: 1 flash_page: 3 map_ptr: 3c02777c
STUB_I: App segment 4: 44832 bytes @ 0x4037729c
STUB_D: exit 0
Debug: 1401 64675 esp_algorithm.c:136 esp_algorithm_run_image(): Got algorithm RC 0x0
Debug: 1402 64675 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1403 64676 target.c:2107 target_free_working_area_restore(): freed 28 bytes of working area at address 0x3fca2738
Debug: 1404 64676 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1405 64676 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1406 64676 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1407 64676 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1408 64676 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 1409 64676 target.c:1907 print_wa_layout():    0x3fca2738-0x3fcbffff (121032 bytes)
Debug: 1410 64676 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 1411 64826 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1412 64828 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1413 64936 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1414 64953 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1415 64954 target.c:1907 print_wa_layout():    0x3fc9c000-0x3fcbffff (147456 bytes)
Debug: 1416 64954 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 1417 64955 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=2
Info : 1418 64955 esp_flash.c:418 esp_algo_flash_get_mappings(): Flash mapping 0: 0x10020 -> 0x3c020020, 40 KB
Info : 1419 64955 esp_flash.c:418 esp_algo_flash_get_mappings(): Flash mapping 1: 0x20020 -> 0x42000020, 93 KB
Debug: 1420 64955 esp_flash.c:245 esp_algo_flasher_algorithm_init(): base=00000000 set=0
Debug: 1421 64957 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1422 64957 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x0 clear=0x630000
Debug: 1423 64957 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=0, state=2
Debug: 1424 64957 esp_algorithm.c:325 esp_algorithm_load_func_image(): stub: base 0x0, start 0x4038dc68, 2 sections
Debug: 1425 64957 esp_algorithm.c:354 esp_algorithm_load_func_image(): addr 0x00000000, sz 12474, flags 1
Debug: 1426 64957 target.c:1986 target_alloc_working_area_try(): MMU disabled, using physical address for working memory 0x3fc9c000
Debug: 1427 64957 target.c:2039 target_alloc_working_area_try(): allocated new working area of 12476 bytes at address 0x3fc9c000
Debug: 1428 65115 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1429 65116 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1430 65116 target.c:1907 print_wa_layout():    0x3fc9f0bc-0x3fcbffff (134980 bytes)
Debug: 1431 65116 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c000
Debug: 1432 65128 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1433 65129 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c400
Debug: 1434 65141 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1435 65141 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c800
Debug: 1436 65155 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1437 65155 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9cc00
Debug: 1438 65168 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1439 65168 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d000
Debug: 1440 65181 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1441 65181 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d400
Debug: 1442 65193 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1443 65193 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d800
Debug: 1444 65206 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1445 65206 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9dc00
Debug: 1446 65218 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1447 65219 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e000
Debug: 1448 65232 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1449 65232 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e400
Debug: 1450 65244 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1451 65244 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e800
Debug: 1452 65256 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1453 65256 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9ec00
Debug: 1454 65269 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1455 65269 target.c:2351 target_write_buffer(): writing buffer of 186 byte at 0x3fc9f000
Debug: 1456 65271 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1457 65273 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1458 65273 target.c:2039 target_alloc_working_area_try(): allocated new working area of 28 bytes at address 0x3fc9f0bc
Debug: 1459 65274 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1460 65274 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1461 65274 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1462 65275 target.c:1907 print_wa_layout():    0x3fc9f0d8-0x3fcbffff (134952 bytes)
Debug: 1463 65275 esp_algorithm.c:412 esp_algorithm_load_func_image(): Write tramp to addr 0x3fc9f0bc, sz 28
Debug: 1464 65275 target.c:2351 target_write_buffer(): writing buffer of 28 byte at 0x3fc9f0bc
Debug: 1465 65276 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1466 65276 esp_algorithm.c:423 esp_algorithm_load_func_image(): Tramp mapped to addr 0x4038f0bc
Debug: 1467 65276 target.c:2039 target_alloc_working_area_try(): allocated new working area of 3880 bytes at address 0x3fc9f0d8
Debug: 1468 65276 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1469 65276 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1470 65276 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1471 65276 target.c:1907 print_wa_layout():    0x3fca0000-0x3fcbffff (131072 bytes)
Debug: 1472 65276 esp_algorithm.c:448 esp_algorithm_load_func_image(): addr 0x00000000, sz 4362, flags 0
Debug: 1473 65276 esp_algorithm.c:452 esp_algorithm_load_func_image(): DATA sec size 4362 -> 4364
Debug: 1474 65276 esp_algorithm.c:454 esp_algorithm_load_func_image(): BSS sec size 4373 -> 4376
Debug: 1475 65276 target.c:2039 target_alloc_working_area_try(): allocated new working area of 8740 bytes at address 0x3fca0000
Debug: 1476 65379 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1477 65379 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1478 65379 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1479 65379 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1480 65379 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1481 65379 target.c:1907 print_wa_layout():    0x3fca2224-0x3fcbffff (122332 bytes)
Debug: 1482 65379 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0000
Debug: 1483 65392 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1484 65392 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0400
Debug: 1485 65406 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1486 65407 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0800
Debug: 1487 65420 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1488 65420 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0c00
Debug: 1489 65432 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1490 65433 target.c:2351 target_write_buffer(): writing buffer of 266 byte at 0x3fca1000
Debug: 1491 65434 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1492 65437 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1493 65437 target.c:2039 target_alloc_working_area_try(): allocated new working area of 1024 bytes at address 0x3fca2224
Debug: 1494 65455 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1495 65455 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1496 65455 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1497 65456 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1498 65456 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1499 65456 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2623 (1024 bytes)
Debug: 1500 65456 target.c:1907 print_wa_layout():    0x3fca2624-0x3fcbffff (121308 bytes)
Debug: 1501 65456 esp_algorithm.c:495 esp_algorithm_load_func_image(): Stub loaded in 498.797 ms
Debug: 1502 65456 esp_xtensa_algorithm.c:101 esp_xtensa_algo_init(): reg params count 7 (6/1).
Debug: 1503 65457 esp_xtensa_algorithm.c:47 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Check stack addr 0x3fca2624
Debug: 1504 65457 esp_xtensa_algorithm.c:50 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Adjust stack addr to 0x3fca2620
Debug: 1505 65457 esp_xtensa_algorithm.c:116 esp_xtensa_algo_init(): Set arg[0] = 4 (a2)
Debug: 1506 65457 esp_algorithm.c:96 esp_algorithm_run_image(): Algorithm start @ 0x4038f0bc, stack 1024 bytes @ 0x3fca2624
Debug: 1507 65457 xtensa.c:1591 xtensa_resume(): [esp32s3.cpu0] start
Debug: 1508 65457 xtensa.c:1519 xtensa_prepare_resume(): [esp32s3.cpu0] current=0 address=0x4038f0bc, handle_breakpoints=1, debug_execution=1)
Debug: 1509 65457 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 1510 65458 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 4038F0BC
Debug: 1511 65458 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowbase (72) val 00000000
Debug: 1512 65458 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowstart (73) val 00000001
Debug: 1513 65458 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 00060025
Debug: 1514 65459 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1515 65459 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a0 value 00000000, num =1
Debug: 1516 65459 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 3FCA2610, num =2
Debug: 1517 65459 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a2 value 00000004, num =3
Debug: 1518 65460 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value 3FCA2738, num =4
Debug: 1519 65460 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 4038DC68, num =9
Debug: 1520 65461 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1521 65461 xtensa.c:1572 xtensa_do_resume(): [esp32s3.cpu0] start
Debug: 1522 65462 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC01)
Debug: 1523 65462 target.c:1781 target_call_event_callbacks(): target event 2 (resumed) for core esp32s3.cpu0
Debug: 1524 65462 esp_algorithm.c:117 esp_algorithm_run_image(): Wait algorithm completion
Debug: 1525 65463 target.c:3230 target_wait_state(): waiting for target halted...
Debug: 1526 65464 xtensa.c:2255 xtensa_poll(): [esp32s3.cpu0] DSR has changed: was 0x8080cc01 now 0x8080cc11
Debug: 1527 65465 xtensa.c:1167 xtensa_fetch_all_regs(): [esp32s3.cpu0] start
Debug: 1528 65475 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1529 65475 xtensa.c:1246 xtensa_fetch_all_regs(): [esp32s3.cpu0] CPENABLE: was 0xff, all enabled
Debug: 1530 65495 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1531 65495 xtensa.c:2295 xtensa_poll(): [esp32s3.cpu0] Target halted, pc=0x4038f0d2, debug_reason=00000001, oldstate=00000004
Debug: 1532 65495 xtensa.c:2299 xtensa_poll(): [esp32s3.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11
Info : 1533 65495 xtensa.c:2301 xtensa_poll(): [esp32s3.cpu0] Target halted, PC=0x4038F0D2, debug_reason=00000001
Debug: 1534 65496 esp_xtensa_smp.c:316 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32s3.cpu0'
Debug: 1535 65496 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu0'
Debug: 1536 65496 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu1'
Debug: 1537 65496 esp_xtensa_smp.c:375 esp_xtensa_smp_update_halt_gdb(): exit
Debug: 1538 65496 target.c:1781 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32s3.cpu0
Debug: 1539 65496 xtensa.c:2787 xtensa_wait_algorithm(): Read mem params
Debug: 1540 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ccount: 0x0000b3e5 -> 0x00000003
Debug: 1541 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f
Debug: 1542 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register epc6: 0x4038f0d2 -> 0x40000400
Debug: 1543 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register sar: 0x00000004 -> 0x00000000
Debug: 1544 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a14: 0x00000005 -> 0x00000000
Debug: 1545 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a12: 0x3fca2738 -> 0x00000000
Debug: 1546 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a11: 0x00000005 -> 0x00000000
Debug: 1547 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a10: 0x02000000 -> 0x00000000
Debug: 1548 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a9: 0x3fca2530 -> 0x00000000
Debug: 1549 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a8: 0x8038f0d0 -> 0x00000000
Debug: 1550 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a2: 0x02000000 -> 0x00000000
Debug: 1551 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a1: 0x3fca2610 -> 0x00000000
Debug: 1552 65496 xtensa.c:2811 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000008
Debug: 1553 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar60: 0x30000000 -> 0x00000000
Debug: 1554 65496 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar58: 0x3fca1371 -> 0x00000000
Debug: 1555 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar57: 0x3fca1200 -> 0x00000000
Debug: 1556 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar56: 0x00000172 -> 0x00000000
Debug: 1557 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar52: 0x30000000 -> 0x00000000
Debug: 1558 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar50: 0x3fca1387 -> 0x00000000
Debug: 1559 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar49: 0x3fca1200 -> 0x00000000
Debug: 1560 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar48: 0x00000188 -> 0x00000000
Debug: 1561 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar47: 0x3fca23e5 -> 0x00000000
Debug: 1562 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar42: 0x0000000a -> 0x00000000
Debug: 1563 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar41: 0x3fca2420 -> 0x00000000
Debug: 1564 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar39: 0x3fca2418 -> 0x00000000
Debug: 1565 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar37: 0x00000032 -> 0x00000000
Debug: 1566 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar36: 0x3fca2468 -> 0x00000000
Debug: 1567 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar35: 0x3fca2468 -> 0x00000000
Debug: 1568 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar33: 0x3fca2440 -> 0x00000000
Debug: 1569 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar32: 0x80044186 -> 0x00000000
Debug: 1570 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar31: 0xfffffff7 -> 0x00000000
Debug: 1571 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar30: 0x00000008 -> 0x00000000
Debug: 1572 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar29: 0x3fca2468 -> 0x00000000
Debug: 1573 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar28: 0xffffffff -> 0x00000000
Debug: 1574 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar27: 0x3fca0e7a -> 0x00000000
Debug: 1575 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar26: 0x00000016 -> 0x00000000
Debug: 1576 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar25: 0x3fca2460 -> 0x00000000
Debug: 1577 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar21: 0x00000027 -> 0x00000000
Debug: 1578 65497 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar20: 0x3fca2204 -> 0x00000000
Debug: 1579 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar19: 0x3fca0e6a -> 0x00000000
Debug: 1580 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar18: 0x00000016 -> 0x00000000
Debug: 1581 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar17: 0x3fca24e0 -> 0x00000000
Debug: 1582 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar16: 0x8038ebd4 -> 0x00000000
Debug: 1583 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar14: 0x00000005 -> 0x00000000
Debug: 1584 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar12: 0x3fca2738 -> 0x00000000
Debug: 1585 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar11: 0x00000005 -> 0x00000000
Debug: 1586 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar10: 0x02000000 -> 0x00000000
Debug: 1587 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar9: 0x3fca2530 -> 0x00000000
Debug: 1588 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar8: 0x8038f0d0 -> 0x00000000
Debug: 1589 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar2: 0x02000000 -> 0x00000000
Debug: 1590 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar1: 0x3fca2610 -> 0x00000000
Debug: 1591 65499 xtensa.c:2820 xtensa_wait_algorithm(): restoring register pc: 0x4038f0d2 -> 0x40000400
Debug: 1592 65499 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 1593 65499 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 40000400
Debug: 1594 65499 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg sar (3) val 00000000
Debug: 1595 65499 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg epc6 (182) val 40000400
Debug: 1596 65499 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 0000001F
Debug: 1597 65499 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ccount (234) val 00000003
Debug: 1598 65499 xtensa.c:677 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg cpenable (224) val 000000FF
Debug: 1599 65500 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1600 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 00000000, num =2
Debug: 1601 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a2 value 00000000, num =3
Debug: 1602 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value 3FCA2738, num =4
Debug: 1603 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 00000000, num =9
Debug: 1604 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a9 value 00000000, num =10
Debug: 1605 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a10 value 00000000, num =11
Debug: 1606 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a11 value 00000000, num =12
Debug: 1607 65500 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a12 value 00000000, num =13
Debug: 1608 65501 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a14 value 00000000, num =15
Debug: 1609 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar1 value 00000000, num =1
Debug: 1610 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar2 value 00000000, num =2
Debug: 1611 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar8 value 00000000, num =8
Debug: 1612 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar9 value 00000000, num =9
Debug: 1613 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar10 value 00000000, num =10
Debug: 1614 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar11 value 00000000, num =11
Debug: 1615 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar12 value 00000000, num =12
Debug: 1616 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar14 value 00000000, num =14
Debug: 1617 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar16 value 00000000, num =16
Debug: 1618 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar17 value 00000000, num =17
Debug: 1619 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar18 value 00000000, num =18
Debug: 1620 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar19 value 00000000, num =19
Debug: 1621 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar20 value 00000000, num =20
Debug: 1622 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar21 value 00000000, num =21
Debug: 1623 65501 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar25 value 00000000, num =25
Debug: 1624 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar26 value 00000000, num =26
Debug: 1625 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar27 value 00000000, num =27
Debug: 1626 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar28 value 00000000, num =28
Debug: 1627 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar29 value 00000000, num =29
Debug: 1628 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar30 value 00000000, num =30
Debug: 1629 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar31 value 00000000, num =31
Debug: 1630 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar32 value 00000000, num =32
Debug: 1631 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar33 value 00000000, num =33
Debug: 1632 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar35 value 00000000, num =35
Debug: 1633 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar36 value 00000000, num =36
Debug: 1634 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar37 value 00000000, num =37
Debug: 1635 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar39 value 00000000, num =39
Debug: 1636 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar41 value 00000000, num =41
Debug: 1637 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar42 value 00000000, num =42
Debug: 1638 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar47 value 00000000, num =47
Debug: 1639 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar48 value 00000000, num =48
Debug: 1640 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar49 value 00000000, num =49
Debug: 1641 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar50 value 00000000, num =50
Debug: 1642 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar52 value 00000000, num =52
Debug: 1643 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar56 value 00000000, num =56
Debug: 1644 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar57 value 00000000, num =57
Debug: 1645 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar58 value 00000000, num =58
Debug: 1646 65503 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar60 value 00000000, num =60
Debug: 1647 65507 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1648 65507 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1649 65507 target.c:2570 target_read_u32(): address: 0x3fca1200, value: 0x00000188
Debug: 1650 65513 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
STUB_D: cpu_freq:160 Mhz
STUB_D: DATA 0x3fca0000..0x3fca110a
STUB_D: BSS 0x3fca110c..0x3fca2221
STUB_D: cmd 4:FLASH_SIZE
STUB_D: stub_flash_handler arg1 3fca2738, arg2 0
STUB_I: Flash state prepared...
STUB_D: stub_flash_get_size: ENTER
STUB_D: flash c28039, cs 2000000, bs 10000, ss 1000, ps 100, sm ffff
STUB_D: Flash ID read 3980c2
STUB_D: Flash ID 39, size 32768 KB
STUB_D: exit 33554432
Debug: 1652 65513 esp_algorithm.c:136 esp_algorithm_run_image(): Got algorithm RC 0x2000000
Debug: 1653 65513 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 1654 65663 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1655 65665 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1656 65771 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1657 65787 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1658 65787 target.c:1907 print_wa_layout():    0x3fc9c000-0x3fcbffff (147456 bytes)
Debug: 1659 65787 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 1660 65787 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=2
Debug: 1661 65788 esp_flash.c:350 esp_algo_flash_get_size(): esp_algo_flash_get_size size 0x2000000
Info : 1662 65788 esp_flash.c:1010 esp_algo_flash_probe(): Auto-detected flash bank 'esp32s3.cpu0.flash' size 32768 KB
Info : 1663 65788 esp_flash.c:1012 esp_algo_flash_probe(): Using flash bank 'esp32s3.cpu0.flash' size 32768 KB
Debug: 1664 65788 esp_flash.c:1029 esp_algo_flash_probe(): allocated 8192 sectors
Debug: 1665 65788 esp_flash.c:960 esp_algo_flash_probe(): Flash size = 0 KB @ 0x00000000 'esp32s3.cpu0' - 'halted'
Debug: 1666 65788 esp_flash.c:245 esp_algo_flasher_algorithm_init(): base=00000000 set=0
Debug: 1667 65790 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1668 65790 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x0 clear=0x630000
Debug: 1669 65790 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=0, state=2
Debug: 1670 65790 esp_algorithm.c:325 esp_algorithm_load_func_image(): stub: base 0x0, start 0x4038dc68, 2 sections
Debug: 1671 65790 esp_algorithm.c:354 esp_algorithm_load_func_image(): addr 0x00000000, sz 12474, flags 1
Debug: 1672 65790 target.c:1986 target_alloc_working_area_try(): MMU disabled, using physical address for working memory 0x3fc9c000
Debug: 1673 65790 target.c:2039 target_alloc_working_area_try(): allocated new working area of 12476 bytes at address 0x3fc9c000
Debug: 1674 65949 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1675 65949 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1676 65949 target.c:1907 print_wa_layout():    0x3fc9f0bc-0x3fcbffff (134980 bytes)
Debug: 1677 65949 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c000
Debug: 1678 65961 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1679 65961 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c400
Debug: 1680 65973 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1681 65973 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c800
Debug: 1682 65985 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1683 65985 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9cc00
Debug: 1684 65997 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1685 65997 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d000
Debug: 1686 66009 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1687 66009 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d400
Debug: 1688 66021 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1689 66021 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d800
Debug: 1690 66034 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1691 66034 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9dc00
Debug: 1692 66046 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1693 66047 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e000
Debug: 1694 66059 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1695 66060 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e400
Debug: 1696 66072 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1697 66072 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e800
Debug: 1698 66086 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1699 66086 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9ec00
Debug: 1700 66099 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1701 66099 target.c:2351 target_write_buffer(): writing buffer of 186 byte at 0x3fc9f000
Debug: 1702 66100 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1703 66103 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1704 66103 target.c:2039 target_alloc_working_area_try(): allocated new working area of 28 bytes at address 0x3fc9f0bc
Debug: 1705 66104 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1706 66104 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1707 66104 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1708 66105 target.c:1907 print_wa_layout():    0x3fc9f0d8-0x3fcbffff (134952 bytes)
Debug: 1709 66105 esp_algorithm.c:412 esp_algorithm_load_func_image(): Write tramp to addr 0x3fc9f0bc, sz 28
Debug: 1710 66105 target.c:2351 target_write_buffer(): writing buffer of 28 byte at 0x3fc9f0bc
Debug: 1711 66106 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1712 66106 esp_algorithm.c:423 esp_algorithm_load_func_image(): Tramp mapped to addr 0x4038f0bc
Debug: 1713 66106 target.c:2039 target_alloc_working_area_try(): allocated new working area of 3880 bytes at address 0x3fc9f0d8
Debug: 1714 66106 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1715 66106 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1716 66106 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1717 66107 target.c:1907 print_wa_layout():    0x3fca0000-0x3fcbffff (131072 bytes)
Debug: 1718 66107 esp_algorithm.c:448 esp_algorithm_load_func_image(): addr 0x00000000, sz 4362, flags 0
Debug: 1719 66107 esp_algorithm.c:452 esp_algorithm_load_func_image(): DATA sec size 4362 -> 4364
Debug: 1720 66107 esp_algorithm.c:454 esp_algorithm_load_func_image(): BSS sec size 4373 -> 4376
Debug: 1721 66107 target.c:2039 target_alloc_working_area_try(): allocated new working area of 8740 bytes at address 0x3fca0000
Debug: 1722 66211 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1723 66212 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1724 66212 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1725 66212 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1726 66212 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1727 66212 target.c:1907 print_wa_layout():    0x3fca2224-0x3fcbffff (122332 bytes)
Debug: 1728 66212 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0000
Debug: 1729 66225 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1730 66225 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0400
Debug: 1731 66238 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1732 66238 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0800
Debug: 1733 66251 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1734 66252 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0c00
Debug: 1735 66265 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1736 66265 target.c:2351 target_write_buffer(): writing buffer of 266 byte at 0x3fca1000
Debug: 1737 66266 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1738 66271 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1739 66271 target.c:2039 target_alloc_working_area_try(): allocated new working area of 1300 bytes at address 0x3fca2224
Debug: 1740 66289 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1741 66289 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1742 66289 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1743 66289 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1744 66289 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1745 66289 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 1746 66290 target.c:1907 print_wa_layout():    0x3fca2738-0x3fcbffff (121032 bytes)
Debug: 1747 66290 esp_algorithm.c:495 esp_algorithm_load_func_image(): Stub loaded in 500.471 ms
Debug: 1748 66290 esp_xtensa_algorithm.c:101 esp_xtensa_algo_init(): reg params count 9 (6/3).
Debug: 1749 66290 esp_xtensa_algorithm.c:47 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Check stack addr 0x3fca2738
Debug: 1750 66290 esp_xtensa_algorithm.c:50 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Adjust stack addr to 0x3fca2730
Debug: 1751 66290 esp_xtensa_algorithm.c:116 esp_xtensa_algo_init(): Set arg[0] = 5 (a2)
Debug: 1752 66290 esp_xtensa_algorithm.c:125 esp_xtensa_algo_init(): Set arg[1] = -1 (a3)
Debug: 1753 66290 esp_xtensa_algorithm.c:125 esp_xtensa_algo_init(): Set arg[2] = 0 (a4)
Debug: 1754 66290 target.c:2039 target_alloc_working_area_try(): allocated new working area of 28 bytes at address 0x3fca2738
Debug: 1755 66291 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1756 66291 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1757 66291 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1758 66291 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1759 66291 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1760 66291 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 1761 66291 target.c:1907 print_wa_layout(): b* 0x3fca2738-0x3fca2753 (28 bytes)
Debug: 1762 66291 target.c:1907 print_wa_layout():    0x3fca2754-0x3fcbffff (121004 bytes)
Debug: 1763 66291 esp_algorithm.c:96 esp_algorithm_run_image(): Algorithm start @ 0x4038f0bc, stack 1300 bytes @ 0x3fca2738
Debug: 1764 66291 xtensa.c:1591 xtensa_resume(): [esp32s3.cpu0] start
Debug: 1765 66291 xtensa.c:1519 xtensa_prepare_resume(): [esp32s3.cpu0] current=0 address=0x4038f0bc, handle_breakpoints=1, debug_execution=1)
Debug: 1766 66291 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 1767 66291 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 4038F0BC
Debug: 1768 66291 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowbase (72) val 00000000
Debug: 1769 66291 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowstart (73) val 00000001
Debug: 1770 66291 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 00060025
Debug: 1771 66294 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1772 66294 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a0 value 00000000, num =1
Debug: 1773 66294 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 3FCA2720, num =2
Debug: 1774 66294 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a2 value 00000005, num =3
Debug: 1775 66294 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value FFFFFFFF, num =4
Debug: 1776 66294 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a4 value 3FCA2738, num =5
Debug: 1777 66294 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 4038DC68, num =9
Debug: 1778 66295 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1779 66295 xtensa.c:1572 xtensa_do_resume(): [esp32s3.cpu0] start
Debug: 1780 66296 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC01)
Debug: 1781 66296 target.c:1781 target_call_event_callbacks(): target event 2 (resumed) for core esp32s3.cpu0
Debug: 1782 66296 esp_algorithm.c:117 esp_algorithm_run_image(): Wait algorithm completion
Debug: 1783 66297 target.c:3230 target_wait_state(): waiting for target halted...
Debug: 1784 66309 xtensa.c:2255 xtensa_poll(): [esp32s3.cpu0] DSR has changed: was 0x8080cc01 now 0x8080cc11
Debug: 1785 66309 xtensa.c:1167 xtensa_fetch_all_regs(): [esp32s3.cpu0] start
Debug: 1786 66318 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1787 66319 xtensa.c:1246 xtensa_fetch_all_regs(): [esp32s3.cpu0] CPENABLE: was 0xff, all enabled
Debug: 1788 66336 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1789 66336 xtensa.c:2295 xtensa_poll(): [esp32s3.cpu0] Target halted, pc=0x4038f0d2, debug_reason=00000001, oldstate=00000004
Debug: 1790 66337 xtensa.c:2299 xtensa_poll(): [esp32s3.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11
Info : 1791 66337 xtensa.c:2301 xtensa_poll(): [esp32s3.cpu0] Target halted, PC=0x4038F0D2, debug_reason=00000001
Debug: 1792 66337 esp_xtensa_smp.c:316 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32s3.cpu0'
Debug: 1793 66337 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu0'
Debug: 1794 66337 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu1'
Debug: 1795 66337 esp_xtensa_smp.c:375 esp_xtensa_smp_update_halt_gdb(): exit
Debug: 1796 66337 target.c:1781 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32s3.cpu0
Debug: 1797 66337 xtensa.c:2787 xtensa_wait_algorithm(): Read mem params
Debug: 1798 66337 xtensa.c:2789 xtensa_wait_algorithm(): Check mem param @ 0x3fca2738
Debug: 1799 66337 xtensa.c:2791 xtensa_wait_algorithm(): Read mem param @ 0x3fca2738
Debug: 1800 66337 target.c:2416 target_read_buffer(): reading buffer of 28 byte at 0x3fca2738
Debug: 1801 66339 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1802 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ccount: 0x00040d4b -> 0x00000003
Debug: 1803 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register eps6: 0x00060225 -> 0x0000001f
Debug: 1804 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register epc6: 0x4038f0d2 -> 0x40000400
Debug: 1805 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register epc1: 0x4038ec1e -> 0x00000000
Debug: 1806 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register sar: 0x00000005 -> 0x00000000
Debug: 1807 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lcount: 0xffffffff -> 0x00000000
Debug: 1808 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lend: 0x4038ed0e -> 0x00000000
Debug: 1809 66339 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lbeg: 0x4038ecf8 -> 0x00000000
Debug: 1810 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a14: 0x00110000 -> 0x00000000
Debug: 1811 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a13: 0x02000000 -> 0x00000000
Debug: 1812 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a11: 0x00000005 -> 0x00000000
Debug: 1813 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a9: 0x3fca2640 -> 0x00000000
Debug: 1814 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a8: 0x8038f0d0 -> 0x00000000
Debug: 1815 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a4: 0x3fca2738 -> 0x00000000
Debug: 1816 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x3fca2738
Debug: 1817 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a1: 0x3fca2720 -> 0x00000000
Debug: 1818 66340 xtensa.c:2811 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000008
Debug: 1819 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar60: 0x20000000 -> 0x00000000
Debug: 1820 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar58: 0x3fca1a4b -> 0x00000000
Debug: 1821 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar57: 0x3fca1200 -> 0x00000000
Debug: 1822 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar56: 0x0000084c -> 0x00000000
Debug: 1823 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar55: 0x3fca2498 -> 0x00000000
Debug: 1824 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar50: 0x3fca1a5a -> 0x00000000
Debug: 1825 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar49: 0x3fca1200 -> 0x00000000
Debug: 1826 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar48: 0x0000085b -> 0x00000000
Debug: 1827 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar47: 0x3fca24e8 -> 0x00000000
Debug: 1828 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar45: 0x00000063 -> 0x00000000
Debug: 1829 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar44: 0x3fca2538 -> 0x00000000
Debug: 1830 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar43: 0x3fca2538 -> 0x00000000
Debug: 1831 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar42: 0x0000000a -> 0x00000000
Debug: 1832 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar41: 0x3fca2530 -> 0x00000000
Debug: 1833 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar39: 0x3fca2521 -> 0x00000000
Debug: 1834 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar38: 0x3ff1ab87 -> 0x00000000
Debug: 1835 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar37: 0x00000030 -> 0x00000000
Debug: 1836 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar36: 0x3fca2571 -> 0x00000000
Debug: 1837 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar35: 0x3fca2571 -> 0x00000000
Debug: 1838 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar33: 0x3fca2550 -> 0x00000000
Debug: 1839 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar32: 0x80044186 -> 0x00000000
Debug: 1840 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar31: 0xfffffffe -> 0x00000000
Debug: 1841 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar30: 0x00000008 -> 0x00000000
Debug: 1842 66340 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar29: 0x3fca2571 -> 0x00000000
Debug: 1843 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar28: 0xffffffff -> 0x00000000
Debug: 1844 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar27: 0x3fca0e7a -> 0x00000000
Debug: 1845 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar26: 0x0000000f -> 0x00000000
Debug: 1846 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar25: 0x3fca2570 -> 0x00000000
Debug: 1847 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar23: 0x3fca266c -> 0x00000000
Debug: 1848 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar22: 0x00000005 -> 0x00000000
Debug: 1849 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar21: 0x3fca2204 -> 0x00000000
Debug: 1850 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar20: 0x00000002 -> 0x00000000
Debug: 1851 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar19: 0x3fca0e6a -> 0x00000000
Debug: 1852 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar18: 0x0000000f -> 0x00000000
Debug: 1853 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar17: 0x3fca25f0 -> 0x00000000
Debug: 1854 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar16: 0x8038ebd4 -> 0x00000000
Debug: 1855 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar14: 0x00110000 -> 0x00000000
Debug: 1856 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar13: 0x02000000 -> 0x00000000
Debug: 1857 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar11: 0x00000005 -> 0x00000000
Debug: 1858 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar9: 0x3fca2640 -> 0x00000000
Debug: 1859 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar8: 0x8038f0d0 -> 0x00000000
Debug: 1860 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar4: 0x3fca2738 -> 0x00000000
Debug: 1861 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x3fca2738
Debug: 1862 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar1: 0x3fca2720 -> 0x00000000
Debug: 1863 66341 xtensa.c:2820 xtensa_wait_algorithm(): restoring register pc: 0x4038f0d2 -> 0x40000400
Debug: 1864 66341 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 1865 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 40000400
Debug: 1866 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lbeg (0) val 00000000
Debug: 1867 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lend (1) val 00000000
Debug: 1868 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lcount (2) val 00000000
Debug: 1869 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg sar (3) val 00000000
Debug: 1870 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg epc1 (177) val 00000000
Debug: 1871 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg epc6 (182) val 40000400
Debug: 1872 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 0000001F
Debug: 1873 66341 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ccount (234) val 00000003
Debug: 1874 66341 xtensa.c:677 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg cpenable (224) val 000000FF
Debug: 1875 66344 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1876 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 00000000, num =2
Debug: 1877 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value 3FCA2738, num =4
Debug: 1878 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a4 value 00000000, num =5
Debug: 1879 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 00000000, num =9
Debug: 1880 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a9 value 00000000, num =10
Debug: 1881 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a11 value 00000000, num =12
Debug: 1882 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a13 value 00000000, num =14
Debug: 1883 66344 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a14 value 00000000, num =15
Debug: 1884 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar1 value 00000000, num =1
Debug: 1885 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar3 value 3FCA2738, num =3
Debug: 1886 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar4 value 00000000, num =4
Debug: 1887 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar8 value 00000000, num =8
Debug: 1888 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar9 value 00000000, num =9
Debug: 1889 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar11 value 00000000, num =11
Debug: 1890 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar13 value 00000000, num =13
Debug: 1891 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar14 value 00000000, num =14
Debug: 1892 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar16 value 00000000, num =16
Debug: 1893 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar17 value 00000000, num =17
Debug: 1894 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar18 value 00000000, num =18
Debug: 1895 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar19 value 00000000, num =19
Debug: 1896 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar20 value 00000000, num =20
Debug: 1897 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar21 value 00000000, num =21
Debug: 1898 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar22 value 00000000, num =22
Debug: 1899 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar23 value 00000000, num =23
Debug: 1900 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar25 value 00000000, num =25
Debug: 1901 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar26 value 00000000, num =26
Debug: 1902 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar27 value 00000000, num =27
Debug: 1903 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar28 value 00000000, num =28
Debug: 1904 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar29 value 00000000, num =29
Debug: 1905 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar30 value 00000000, num =30
Debug: 1906 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar31 value 00000000, num =31
Debug: 1907 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar32 value 00000000, num =32
Debug: 1908 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar33 value 00000000, num =33
Debug: 1909 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar35 value 00000000, num =35
Debug: 1910 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar36 value 00000000, num =36
Debug: 1911 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar37 value 00000000, num =37
Debug: 1912 66344 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar38 value 00000000, num =38
Debug: 1913 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar39 value 00000000, num =39
Debug: 1914 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar41 value 00000000, num =41
Debug: 1915 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar42 value 00000000, num =42
Debug: 1916 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar43 value 00000000, num =43
Debug: 1917 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar44 value 00000000, num =44
Debug: 1918 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar45 value 00000000, num =45
Debug: 1919 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar47 value 00000000, num =47
Debug: 1920 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar48 value 00000000, num =48
Debug: 1921 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar49 value 00000000, num =49
Debug: 1922 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar50 value 00000000, num =50
Debug: 1923 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar55 value 00000000, num =55
Debug: 1924 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar56 value 00000000, num =56
Debug: 1925 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar57 value 00000000, num =57
Debug: 1926 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar58 value 00000000, num =58
Debug: 1927 66345 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar60 value 00000000, num =60
Debug: 1928 66350 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1929 66351 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1930 66351 target.c:2570 target_read_u32(): address: 0x3fca1200, value: 0x0000085b
Debug: 1931 66376 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
STUB_D: cpu_freq:160 Mhz
STUB_D: DATA 0x3fca0000..0x3fca110a
STUB_D: BSS 0x3fca110c..0x3fca2221
STUB_D: cmd 5:FLASH_MAP_GET
STUB_D: stub_flash_handler arg1 ffffffff, arg2 1070212920
STUB_I: Flash state prepared...
STUB_D: stub_flash_get_size: ENTER
STUB_D: flash c28039, cs 2000000, bs 10000, ss 1000, ps 100, sm ffff
STUB_D: Flash ID read 3980c2
STUB_D: Flash ID 39, size 32768 KB
STUB_D: stub_flash_get_size: ENTER
STUB_D: flash c28039, cs 2000000, bs 10000, ss 1000, ps 100, sm ffff
STUB_D: Flash ID read 3980c2
STUB_D: Flash ID 39, size 32768 KB
STUB_D: stub_flash_get_map: 0xffffffff 0x3fca2738
STUB_D: start_page: 2 map_src: 0 map_size: 8020 page_cnt: 1 flash_page: 0 map_ptr: 3c028000
STUB_D: Found partition 0, m 0x50aa, t 0x1, st 0x2, l 'nvs'
STUB_D: start_page: 2 map_src: 0 map_size: 8040 page_cnt: 1 flash_page: 0 map_ptr: 3c028020
STUB_D: Found partition 1, m 0x50aa, t 0x1, st 0x1, l 'phy_init'
STUB_D: start_page: 2 map_src: 0 map_size: 8060 page_cnt: 1 flash_page: 0 map_ptr: 3c028040
STUB_D: Found partition 2, m 0x50aa, t 0x0, st 0x0, l 'factory'
STUB_I: Found app partition: 'factory' 1024 KB @ 0x10000
STUB_D: start_page: 2 map_src: 10000 map_size: 18 page_cnt: 1 flash_page: 1 map_ptr: 3c020000
STUB_I: Found app image: magic 0xe9, 5 segments, entry @ 0x403752dc
STUB_D: start_page: 2 map_src: 10000 map_size: 20 page_cnt: 1 flash_page: 1 map_ptr: 3c020018
STUB_I: App segment 0: 41736 bytes @ 0x3c020020
STUB_I: Mapped segment 0: 41736 bytes @ 0x10020 -> 0x3c020020
STUB_D: start_page: 2 map_src: 10000 map_size: a330 page_cnt: 1 flash_page: 1 map_ptr: 3c02a328
STUB_I: App segment 1: 10820 bytes @ 0x3fc92200
STUB_D: start_page: 2 map_src: 10000 map_size: cd7c page_cnt: 1 flash_page: 1 map_ptr: 3c02cd74
STUB_I: App segment 2: 12956 bytes @ 0x40374000
STUB_D: start_page: 2 map_src: 20000 map_size: 20 page_cnt: 1 flash_page: 2 map_ptr: 3c020018
STUB_I: App segment 3: 96092 bytes @ 0x42000020
STUB_I: Mapped segment 1: 96092 bytes @ 0x20020 -> 0x42000020
STUB_D: start_page: 2 map_src: 30000 map_size: 7784 page_cnt: 1 flash_page: 3 map_ptr: 3c02777c
STUB_I: App segment 4: 44832 bytes @ 0x4037729c
STUB_D: exit 0
Debug: 1933 66376 esp_algorithm.c:136 esp_algorithm_run_image(): Got algorithm RC 0x0
Debug: 1934 66377 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1935 66377 target.c:2107 target_free_working_area_restore(): freed 28 bytes of working area at address 0x3fca2738
Debug: 1936 66377 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1937 66377 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1938 66377 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 1939 66377 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 1940 66377 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 1941 66377 target.c:1907 print_wa_layout():    0x3fca2738-0x3fcbffff (121032 bytes)
Debug: 1942 66377 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 1943 66531 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1944 66533 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1945 66638 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1946 66654 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1947 66654 target.c:1907 print_wa_layout():    0x3fc9c000-0x3fcbffff (147456 bytes)
Debug: 1948 66654 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 1949 66654 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=2
Info : 1950 66654 esp_flash.c:418 esp_algo_flash_get_mappings(): Flash mapping 0: 0x10020 -> 0x3c020020, 40 KB
Info : 1951 66654 esp_flash.c:418 esp_algo_flash_get_mappings(): Flash mapping 1: 0x20020 -> 0x42000020, 93 KB
Info : 1952 66654 esp_flash.c:1012 esp_algo_flash_probe(): Using flash bank 'esp32s3.cpu0.irom' size 96 KB
Debug: 1953 66654 esp_flash.c:1029 esp_algo_flash_probe(): allocated 24 sectors
Debug: 1954 66654 esp_flash.c:960 esp_algo_flash_probe(): Flash size = 0 KB @ 0x00000000 'esp32s3.cpu0' - 'halted'
Debug: 1955 66654 esp_flash.c:245 esp_algo_flasher_algorithm_init(): base=00000000 set=0
Debug: 1956 66656 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1957 66656 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x0 clear=0x630000
Debug: 1958 66656 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=0, state=2
Debug: 1959 66656 esp_algorithm.c:325 esp_algorithm_load_func_image(): stub: base 0x0, start 0x4038dc68, 2 sections
Debug: 1960 66656 esp_algorithm.c:354 esp_algorithm_load_func_image(): addr 0x00000000, sz 12474, flags 1
Debug: 1961 66656 target.c:1986 target_alloc_working_area_try(): MMU disabled, using physical address for working memory 0x3fc9c000
Debug: 1962 66656 target.c:2039 target_alloc_working_area_try(): allocated new working area of 12476 bytes at address 0x3fc9c000
Debug: 1963 66815 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1964 66815 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1965 66815 target.c:1907 print_wa_layout():    0x3fc9f0bc-0x3fcbffff (134980 bytes)
Debug: 1966 66815 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c000
Debug: 1967 66827 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1968 66827 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c400
Debug: 1969 66840 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1970 66840 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9c800
Debug: 1971 66853 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1972 66853 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9cc00
Debug: 1973 66865 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1974 66865 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d000
Debug: 1975 66878 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1976 66878 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d400
Debug: 1977 66891 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1978 66891 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9d800
Debug: 1979 66903 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1980 66903 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9dc00
Debug: 1981 66916 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1982 66916 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e000
Debug: 1983 66929 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1984 66929 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e400
Debug: 1985 66941 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1986 66942 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9e800
Debug: 1987 66954 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1988 66954 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fc9ec00
Debug: 1989 66968 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1990 66968 target.c:2351 target_write_buffer(): writing buffer of 186 byte at 0x3fc9f000
Debug: 1991 66969 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1992 66973 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1993 66973 target.c:2039 target_alloc_working_area_try(): allocated new working area of 28 bytes at address 0x3fc9f0bc
Debug: 1994 66974 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 1995 66974 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 1996 66974 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 1997 66974 target.c:1907 print_wa_layout():    0x3fc9f0d8-0x3fcbffff (134952 bytes)
Debug: 1998 66974 esp_algorithm.c:412 esp_algorithm_load_func_image(): Write tramp to addr 0x3fc9f0bc, sz 28
Debug: 1999 66974 target.c:2351 target_write_buffer(): writing buffer of 28 byte at 0x3fc9f0bc
Debug: 2000 66976 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2001 66976 esp_algorithm.c:423 esp_algorithm_load_func_image(): Tramp mapped to addr 0x4038f0bc
Debug: 2002 66976 target.c:2039 target_alloc_working_area_try(): allocated new working area of 3880 bytes at address 0x3fc9f0d8
Debug: 2003 66976 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 2004 66976 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 2005 66976 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 2006 66976 target.c:1907 print_wa_layout():    0x3fca0000-0x3fcbffff (131072 bytes)
Debug: 2007 66976 esp_algorithm.c:448 esp_algorithm_load_func_image(): addr 0x00000000, sz 4362, flags 0
Debug: 2008 66976 esp_algorithm.c:452 esp_algorithm_load_func_image(): DATA sec size 4362 -> 4364
Debug: 2009 66976 esp_algorithm.c:454 esp_algorithm_load_func_image(): BSS sec size 4373 -> 4376
Debug: 2010 66976 target.c:2039 target_alloc_working_area_try(): allocated new working area of 8740 bytes at address 0x3fca0000
Debug: 2011 67079 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2012 67079 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 2013 67080 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 2014 67080 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 2015 67080 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 2016 67080 target.c:1907 print_wa_layout():    0x3fca2224-0x3fcbffff (122332 bytes)
Debug: 2017 67080 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0000
Debug: 2018 67091 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2019 67091 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0400
Debug: 2020 67104 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2021 67104 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0800
Debug: 2022 67116 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2023 67117 target.c:2351 target_write_buffer(): writing buffer of 1024 byte at 0x3fca0c00
Debug: 2024 67128 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2025 67128 target.c:2351 target_write_buffer(): writing buffer of 266 byte at 0x3fca1000
Debug: 2026 67130 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2027 67134 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2028 67134 target.c:2039 target_alloc_working_area_try(): allocated new working area of 1300 bytes at address 0x3fca2224
Debug: 2029 67153 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2030 67153 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 2031 67153 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 2032 67153 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 2033 67153 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 2034 67153 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 2035 67153 target.c:1907 print_wa_layout():    0x3fca2738-0x3fcbffff (121032 bytes)
Debug: 2036 67153 esp_algorithm.c:495 esp_algorithm_load_func_image(): Stub loaded in 497.029 ms
Debug: 2037 67153 esp_xtensa_algorithm.c:101 esp_xtensa_algo_init(): reg params count 9 (6/3).
Debug: 2038 67153 esp_xtensa_algorithm.c:47 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Check stack addr 0x3fca2738
Debug: 2039 67153 esp_xtensa_algorithm.c:50 esp_xtensa_algo_regs_init_start(): [esp32s3.cpu0] Adjust stack addr to 0x3fca2730
Debug: 2040 67153 esp_xtensa_algorithm.c:116 esp_xtensa_algo_init(): Set arg[0] = 5 (a2)
Debug: 2041 67153 esp_xtensa_algorithm.c:125 esp_xtensa_algo_init(): Set arg[1] = -1 (a3)
Debug: 2042 67153 esp_xtensa_algorithm.c:125 esp_xtensa_algo_init(): Set arg[2] = 0 (a4)
Debug: 2043 67153 target.c:2039 target_alloc_working_area_try(): allocated new working area of 28 bytes at address 0x3fca2738
Debug: 2044 67154 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2045 67154 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 2046 67154 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 2047 67154 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 2048 67154 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 2049 67154 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 2050 67154 target.c:1907 print_wa_layout(): b* 0x3fca2738-0x3fca2753 (28 bytes)
Debug: 2051 67154 target.c:1907 print_wa_layout():    0x3fca2754-0x3fcbffff (121004 bytes)
Debug: 2052 67154 esp_algorithm.c:96 esp_algorithm_run_image(): Algorithm start @ 0x4038f0bc, stack 1300 bytes @ 0x3fca2738
Debug: 2053 67154 xtensa.c:1591 xtensa_resume(): [esp32s3.cpu0] start
Debug: 2054 67154 xtensa.c:1519 xtensa_prepare_resume(): [esp32s3.cpu0] current=0 address=0x4038f0bc, handle_breakpoints=1, debug_execution=1)
Debug: 2055 67154 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 2056 67154 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 4038F0BC
Debug: 2057 67154 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowbase (72) val 00000000
Debug: 2058 67154 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg windowstart (73) val 00000001
Debug: 2059 67154 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 00060025
Debug: 2060 67156 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2061 67156 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a0 value 00000000, num =1
Debug: 2062 67156 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 3FCA2720, num =2
Debug: 2063 67156 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a2 value 00000005, num =3
Debug: 2064 67156 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value FFFFFFFF, num =4
Debug: 2065 67156 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a4 value 3FCA2738, num =5
Debug: 2066 67156 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 4038DC68, num =9
Debug: 2067 67157 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2068 67157 xtensa.c:1572 xtensa_do_resume(): [esp32s3.cpu0] start
Debug: 2069 67158 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC01)
Debug: 2070 67158 target.c:1781 target_call_event_callbacks(): target event 2 (resumed) for core esp32s3.cpu0
Debug: 2071 67158 esp_algorithm.c:117 esp_algorithm_run_image(): Wait algorithm completion
Debug: 2072 67159 target.c:3230 target_wait_state(): waiting for target halted...
Debug: 2073 67171 xtensa.c:2255 xtensa_poll(): [esp32s3.cpu0] DSR has changed: was 0x8080cc01 now 0x8080cc11
Debug: 2074 67171 xtensa.c:1167 xtensa_fetch_all_regs(): [esp32s3.cpu0] start
Debug: 2075 67180 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2076 67180 xtensa.c:1246 xtensa_fetch_all_regs(): [esp32s3.cpu0] CPENABLE: was 0xff, all enabled
Debug: 2077 67202 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2078 67203 xtensa.c:2295 xtensa_poll(): [esp32s3.cpu0] Target halted, pc=0x4038f0d2, debug_reason=00000001, oldstate=00000004
Debug: 2079 67203 xtensa.c:2299 xtensa_poll(): [esp32s3.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11
Info : 2080 67203 xtensa.c:2301 xtensa_poll(): [esp32s3.cpu0] Target halted, PC=0x4038F0D2, debug_reason=00000001
Debug: 2081 67203 esp_xtensa_smp.c:316 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32s3.cpu0'
Debug: 2082 67204 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu0'
Debug: 2083 67204 esp_xtensa_smp.c:330 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32s3.cpu1'
Debug: 2084 67204 esp_xtensa_smp.c:375 esp_xtensa_smp_update_halt_gdb(): exit
Debug: 2085 67204 target.c:1781 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32s3.cpu0
Debug: 2086 67204 xtensa.c:2787 xtensa_wait_algorithm(): Read mem params
Debug: 2087 67204 xtensa.c:2789 xtensa_wait_algorithm(): Check mem param @ 0x3fca2738
Debug: 2088 67204 xtensa.c:2791 xtensa_wait_algorithm(): Read mem param @ 0x3fca2738
Debug: 2089 67204 target.c:2416 target_read_buffer(): reading buffer of 28 byte at 0x3fca2738
Debug: 2090 67205 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2091 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ccount: 0x00040d4b -> 0x00000003
Debug: 2092 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register eps6: 0x00060225 -> 0x0000001f
Debug: 2093 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register epc6: 0x4038f0d2 -> 0x40000400
Debug: 2094 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register epc1: 0x4038ec1e -> 0x00000000
Debug: 2095 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register sar: 0x00000005 -> 0x00000000
Debug: 2096 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lcount: 0xffffffff -> 0x00000000
Debug: 2097 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lend: 0x4038ed0e -> 0x00000000
Debug: 2098 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register lbeg: 0x4038ecf8 -> 0x00000000
Debug: 2099 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a14: 0x00110000 -> 0x00000000
Debug: 2100 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a13: 0x02000000 -> 0x00000000
Debug: 2101 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a11: 0x00000005 -> 0x00000000
Debug: 2102 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a9: 0x3fca2640 -> 0x00000000
Debug: 2103 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a8: 0x8038f0d0 -> 0x00000000
Debug: 2104 67205 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a4: 0x3fca2738 -> 0x00000000
Debug: 2105 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x3fca2738
Debug: 2106 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register a1: 0x3fca2720 -> 0x00000000
Debug: 2107 67206 xtensa.c:2811 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000008
Debug: 2108 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar60: 0x20000000 -> 0x00000000
Debug: 2109 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar58: 0x3fca1a4b -> 0x00000000
Debug: 2110 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar57: 0x3fca1200 -> 0x00000000
Debug: 2111 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar56: 0x0000084c -> 0x00000000
Debug: 2112 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar55: 0x3fca2498 -> 0x00000000
Debug: 2113 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar50: 0x3fca1a5a -> 0x00000000
Debug: 2114 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar49: 0x3fca1200 -> 0x00000000
Debug: 2115 67206 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar48: 0x0000085b -> 0x00000000
Debug: 2116 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar47: 0x3fca24e8 -> 0x00000000
Debug: 2117 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar45: 0x00000063 -> 0x00000000
Debug: 2118 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar44: 0x3fca2538 -> 0x00000000
Debug: 2119 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar43: 0x3fca2538 -> 0x00000000
Debug: 2120 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar42: 0x0000000a -> 0x00000000
Debug: 2121 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar41: 0x3fca2530 -> 0x00000000
Debug: 2122 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar39: 0x3fca2521 -> 0x00000000
Debug: 2123 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar38: 0x3ff1ab87 -> 0x00000000
Debug: 2124 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar37: 0x00000030 -> 0x00000000
Debug: 2125 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar36: 0x3fca2571 -> 0x00000000
Debug: 2126 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar35: 0x3fca2571 -> 0x00000000
Debug: 2127 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar33: 0x3fca2550 -> 0x00000000
Debug: 2128 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar32: 0x80044186 -> 0x00000000
Debug: 2129 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar31: 0xfffffffe -> 0x00000000
Debug: 2130 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar30: 0x00000008 -> 0x00000000
Debug: 2131 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar29: 0x3fca2571 -> 0x00000000
Debug: 2132 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar28: 0xffffffff -> 0x00000000
Debug: 2133 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar27: 0x3fca0e7a -> 0x00000000
Debug: 2134 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar26: 0x0000000f -> 0x00000000
Debug: 2135 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar25: 0x3fca2570 -> 0x00000000
Debug: 2136 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar23: 0x3fca266c -> 0x00000000
Debug: 2137 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar22: 0x00000005 -> 0x00000000
Debug: 2138 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar21: 0x3fca2204 -> 0x00000000
Debug: 2139 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar20: 0x00000002 -> 0x00000000
Debug: 2140 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar19: 0x3fca0e6a -> 0x00000000
Debug: 2141 67207 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar18: 0x0000000f -> 0x00000000
Debug: 2142 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar17: 0x3fca25f0 -> 0x00000000
Debug: 2143 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar16: 0x8038ebd4 -> 0x00000000
Debug: 2144 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar14: 0x00110000 -> 0x00000000
Debug: 2145 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar13: 0x02000000 -> 0x00000000
Debug: 2146 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar11: 0x00000005 -> 0x00000000
Debug: 2147 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar9: 0x3fca2640 -> 0x00000000
Debug: 2148 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar8: 0x8038f0d0 -> 0x00000000
Debug: 2149 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar4: 0x3fca2738 -> 0x00000000
Debug: 2150 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x3fca2738
Debug: 2151 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register ar1: 0x3fca2720 -> 0x00000000
Debug: 2152 67208 xtensa.c:2820 xtensa_wait_algorithm(): restoring register pc: 0x4038f0d2 -> 0x40000400
Debug: 2153 67208 xtensa.c:612 xtensa_write_dirty_registers(): [esp32s3.cpu0] start
Debug: 2154 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg pc (255) val 40000400
Debug: 2155 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lbeg (0) val 00000000
Debug: 2156 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lend (1) val 00000000
Debug: 2157 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg lcount (2) val 00000000
Debug: 2158 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg sar (3) val 00000000
Debug: 2159 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg epc1 (177) val 00000000
Debug: 2160 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg epc6 (182) val 40000400
Debug: 2161 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg eps6 (198) val 0000001F
Debug: 2162 67208 xtensa.c:632 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ccount (234) val 00000003
Debug: 2163 67208 xtensa.c:677 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg cpenable (224) val 000000FF
Debug: 2164 67210 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2165 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a1 value 00000000, num =2
Debug: 2166 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a3 value 3FCA2738, num =4
Debug: 2167 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a4 value 00000000, num =5
Debug: 2168 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a8 value 00000000, num =9
Debug: 2169 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a9 value 00000000, num =10
Debug: 2170 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a11 value 00000000, num =12
Debug: 2171 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a13 value 00000000, num =14
Debug: 2172 67210 xtensa.c:743 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg a14 value 00000000, num =15
Debug: 2173 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar1 value 00000000, num =1
Debug: 2174 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar3 value 3FCA2738, num =3
Debug: 2175 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar4 value 00000000, num =4
Debug: 2176 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar8 value 00000000, num =8
Debug: 2177 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar9 value 00000000, num =9
Debug: 2178 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar11 value 00000000, num =11
Debug: 2179 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar13 value 00000000, num =13
Debug: 2180 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar14 value 00000000, num =14
Debug: 2181 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar16 value 00000000, num =16
Debug: 2182 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar17 value 00000000, num =17
Debug: 2183 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar18 value 00000000, num =18
Debug: 2184 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar19 value 00000000, num =19
Debug: 2185 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar20 value 00000000, num =20
Debug: 2186 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar21 value 00000000, num =21
Debug: 2187 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar22 value 00000000, num =22
Debug: 2188 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar23 value 00000000, num =23
Debug: 2189 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar25 value 00000000, num =25
Debug: 2190 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar26 value 00000000, num =26
Debug: 2191 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar27 value 00000000, num =27
Debug: 2192 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar28 value 00000000, num =28
Debug: 2193 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar29 value 00000000, num =29
Debug: 2194 67210 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar30 value 00000000, num =30
Debug: 2195 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar31 value 00000000, num =31
Debug: 2196 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar32 value 00000000, num =32
Debug: 2197 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar33 value 00000000, num =33
Debug: 2198 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar35 value 00000000, num =35
Debug: 2199 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar36 value 00000000, num =36
Debug: 2200 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar37 value 00000000, num =37
Debug: 2201 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar38 value 00000000, num =38
Debug: 2202 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar39 value 00000000, num =39
Debug: 2203 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar41 value 00000000, num =41
Debug: 2204 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar42 value 00000000, num =42
Debug: 2205 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar43 value 00000000, num =43
Debug: 2206 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar44 value 00000000, num =44
Debug: 2207 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar45 value 00000000, num =45
Debug: 2208 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar47 value 00000000, num =47
Debug: 2209 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar48 value 00000000, num =48
Debug: 2210 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar49 value 00000000, num =49
Debug: 2211 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar50 value 00000000, num =50
Debug: 2212 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar55 value 00000000, num =55
Debug: 2213 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar56 value 00000000, num =56
Debug: 2214 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar57 value 00000000, num =57
Debug: 2215 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar58 value 00000000, num =58
Debug: 2216 67212 xtensa.c:771 xtensa_write_dirty_registers(): [esp32s3.cpu0] Writing back reg ar60 value 00000000, num =60
Debug: 2217 67216 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2218 67217 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2219 67217 target.c:2570 target_read_u32(): address: 0x3fca1200, value: 0x0000085b
Debug: 2220 67243 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
STUB_D: cpu_freq:160 Mhz
STUB_D: DATA 0x3fca0000..0x3fca110a
STUB_D: BSS 0x3fca110c..0x3fca2221
STUB_D: cmd 5:FLASH_MAP_GET
STUB_D: stub_flash_handler arg1 ffffffff, arg2 1070212920
STUB_I: Flash state prepared...
STUB_D: stub_flash_get_size: ENTER
STUB_D: flash c28039, cs 2000000, bs 10000, ss 1000, ps 100, sm ffff
STUB_D: Flash ID read 3980c2
STUB_D: Flash ID 39, size 32768 KB
STUB_D: stub_flash_get_size: ENTER
STUB_D: flash c28039, cs 2000000, bs 10000, ss 1000, ps 100, sm ffff
STUB_D: Flash ID read 3980c2
STUB_D: Flash ID 39, size 32768 KB
STUB_D: stub_flash_get_map: 0xffffffff 0x3fca2738
STUB_D: start_page: 2 map_src: 0 map_size: 8020 page_cnt: 1 flash_page: 0 map_ptr: 3c028000
STUB_D: Found partition 0, m 0x50aa, t 0x1, st 0x2, l 'nvs'
STUB_D: start_page: 2 map_src: 0 map_size: 8040 page_cnt: 1 flash_page: 0 map_ptr: 3c028020
STUB_D: Found partition 1, m 0x50aa, t 0x1, st 0x1, l 'phy_init'
STUB_D: start_page: 2 map_src: 0 map_size: 8060 page_cnt: 1 flash_page: 0 map_ptr: 3c028040
STUB_D: Found partition 2, m 0x50aa, t 0x0, st 0x0, l 'factory'
STUB_I: Found app partition: 'factory' 1024 KB @ 0x10000
STUB_D: start_page: 2 map_src: 10000 map_size: 18 page_cnt: 1 flash_page: 1 map_ptr: 3c020000
STUB_I: Found app image: magic 0xe9, 5 segments, entry @ 0x403752dc
STUB_D: start_page: 2 map_src: 10000 map_size: 20 page_cnt: 1 flash_page: 1 map_ptr: 3c020018
STUB_I: App segment 0: 41736 bytes @ 0x3c020020
STUB_I: Mapped segment 0: 41736 bytes @ 0x10020 -> 0x3c020020
STUB_D: start_page: 2 map_src: 10000 map_size: a330 page_cnt: 1 flash_page: 1 map_ptr: 3c02a328
STUB_I: App segment 1: 10820 bytes @ 0x3fc92200
STUB_D: start_page: 2 map_src: 10000 map_size: cd7c page_cnt: 1 flash_page: 1 map_ptr: 3c02cd74
STUB_I: App segment 2: 12956 bytes @ 0x40374000
STUB_D: start_page: 2 map_src: 20000 map_size: 20 page_cnt: 1 flash_page: 2 map_ptr: 3c020018
STUB_I: App segment 3: 96092 bytes @ 0x42000020
STUB_I: Mapped segment 1: 96092 bytes @ 0x20020 -> 0x42000020
STUB_D: start_page: 2 map_src: 30000 map_size: 7784 page_cnt: 1 flash_page: 3 map_ptr: 3c02777c
STUB_I: App segment 4: 44832 bytes @ 0x4037729c
STUB_D: exit 0
Debug: 2222 67243 esp_algorithm.c:136 esp_algorithm_run_image(): Got algorithm RC 0x0
Debug: 2223 67244 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2224 67245 target.c:2107 target_free_working_area_restore(): freed 28 bytes of working area at address 0x3fca2738
Debug: 2225 67245 target.c:1907 print_wa_layout(): b* 0x3fc9c000-0x3fc9f0bb (12476 bytes)
Debug: 2226 67245 target.c:1907 print_wa_layout(): b* 0x3fc9f0bc-0x3fc9f0d7 (28 bytes)
Debug: 2227 67245 target.c:1907 print_wa_layout():  * 0x3fc9f0d8-0x3fc9ffff (3880 bytes)
Debug: 2228 67245 target.c:1907 print_wa_layout(): b* 0x3fca0000-0x3fca2223 (8740 bytes)
Debug: 2229 67245 target.c:1907 print_wa_layout(): b* 0x3fca2224-0x3fca2737 (1300 bytes)
Debug: 2230 67245 target.c:1907 print_wa_layout():    0x3fca2738-0x3fcbffff (121032 bytes)
Debug: 2231 67245 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 2232 67400 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2233 67402 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2234 67509 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2235 67526 xtensa.c:958 xtensa_core_status_check(): [esp32s3.cpu0] DSR (8080CC11)
Debug: 2236 67526 target.c:1907 print_wa_layout():    0x3fc9c000-0x3fcbffff (147456 bytes)
Debug: 2237 67526 xtensa.c:870 xtensa_smpbreak_write(): [esp32s3.cpu0] write smpbreak set=0x30000 clear=0x600000
Debug: 2238 67527 xtensa.c:886 xtensa_smpbreak_set(): [esp32s3.cpu0] set smpbreak=30000, state=2
Info : 2239 67527 esp_flash.c:418 esp_algo_flash_get_mappings(): Flash mapping 0: 0x10020 -> 0x3c020020, 40 KB
Info : 2240 67527 esp_flash.c:418 esp_algo_flash_get_mappings(): Flash mapping 1: 0x20020 -> 0x42000020, 93 KB
Info : 2241 67527 esp_flash.c:1012 esp_algo_flash_probe(): Using flash bank 'esp32s3.cpu0.drom' size 44 KB
Debug: 2242 67527 esp_flash.c:1029 esp_algo_flash_probe(): allocated 11 sectors
Info : 2243 67527 gdb_server.c:1059 gdb_new_connection(): New GDB Connection: 1, Target esp32s3.cpu0, state: halted
Debug: 2244 67528 gdb_server.c:379 gdb_log_incoming_packet(): [esp32s3.cpu0] {1} received packet: qSupported:multiprocess+;swbreak+;hwbreak+;qRelocInsn+;fork-events+;vfork-events+;exec-events+;vContSupported+;QThreadEvents+;no-resumed+;memory-tagging+
Debug: 2245 67528 xtensa.c:1420 xtensa_get_gdb_reg_list(): reg_class=0, num_regs=228
Debug: 2246 67528 gdb_server.c:397 gdb_log_outgoing_packet(): [esp32s3.cpu0] {1} sending packet: $PacketSize=4000;qXfer:memory-map:read+;qXfer:features:read+;qXfer:threads:read+;QStartNoAckMode+;vContSupported+#02
Error: 2247 67528 gdb_server.c:505 gdb_put_packet_inner(): GDB missing ack(2) - assumed good
Debug: 2248 67528 gdb_server.c:379 gdb_log_incoming_packet(): [esp32s3.cpu0] {1} received packet: qSupported:multiprocess+;swbreak+;hwbreak+;qRelocInsn+;fork-events+;vfork-events+;exec-events+;vContSupported+;QThreadEvents+;no-resumed+;memory-tagging+
Debug: 2249 67528 xtensa.c:1420 xtensa_get_gdb_reg_list(): reg_class=0, num_regs=228
Debug: 2250 67528 gdb_server.c:397 gdb_log_outgoing_packet(): [esp32s3.cpu0] {1} sending packet: $PacketSize=4000;qXfer:memory-map:read+;qXfer:features:read+;qXfer:threads:read+;QStartNoAckMode+;vContSupported+#02
Debug: 2251 67528 gdb_server.c:379 gdb_log_incoming_packet(): [esp32s3.cpu0] {1} received packet: +
Debug: 2252 67528 gdb_server.c:379 gdb_log_incoming_packet(): [esp32s3.cpu0] {1} received packet: vCont?
Debug: 2253 67528 gdb_server.c:397 gdb_log_outgoing_packet(): [esp32s3.cpu0] {1} sending packet: $vCont;c;C;s;S#62
Debug: 2254 67528 gdb_server.c:379 gdb_log_incoming_packet(): [esp32s3.cpu0] {1} received packet: +
Debug: 2255 67528 gdb_server.c:379 gdb_log_incoming_packet(): [esp32s3.cpu0] {1} received packet: vMustReplyEmpty
Debug: 2256 67528 gdb_server.c:397 gdb_log_outgoing_packet(): [esp32s3.cpu0] {1} sending packet: $#00
Warn : 2257 67528 gdb_server.c:345 gdb_write(): Error writing to GDB socket. Dropping the connection.
Debug: 2258 67528 gdb_server.c:1105 gdb_connection_closed(): {1} GDB Close, Target: esp32s3.cpu0, state: halted, gdb_actual_connections=0
Debug: 2259 67528 target.c:1781 target_call_event_callbacks(): target event 8 (gdb-end) for core esp32s3.cpu0
Debug: 2260 67528 target.c:1781 target_call_event_callbacks(): target event 23 (gdb-detach) for core esp32s3.cpu0
Debug: 2261 67528 target.c:4679 target_handle_event(): target: esp32s3.cpu0 (esp32s3) event: 23 (gdb-detach) action: 
		$_TARGETNAME_0 esp gdb_detach_handler
	
Debug: 2262 67528 command.c:152 script_debug(): command - esp32s3.cpu0 esp gdb_detach_handler
Info : 2263 67535 server.c:575 server_loop(): dropped 'gdb' connection
Debug: 2264 76815 server.c:607 sig_handler(): Terminating on Signal 2
Debug: 2265 76914 command.c:152 script_debug(): command - shutdown
User : 2266 76914 server.c:758 handle_shutdown_command(): shutdown command invoked
Debug: 2267 76914 breakpoints.c:328 breakpoint_remove_all_internal(): [esp32s3.cpu0] Delete all breakpoints
Debug: 2268 76914 breakpoints.c:328 breakpoint_remove_all_internal(): [esp32s3.cpu1] Delete all breakpoints
Debug: 2269 76914 esp_xtensa.c:198 esp_xtensa_target_deinit(): start
Debug: 2270 76914 xtensa.c:3423 xtensa_target_deinit(): start
Debug: 2271 76915 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas
Debug: 2272 76915 breakpoints.c:328 breakpoint_remove_all_internal(): [esp32s3.cpu1] Delete all breakpoints
Debug: 2273 76915 esp_xtensa.c:198 esp_xtensa_target_deinit(): start
Debug: 2274 76915 xtensa.c:3423 xtensa_target_deinit(): start
Debug: 2275 76916 target.c:2135 target_free_all_working_areas_restore(): freeing all working areas