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playmodm.txt
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1 ; ****************************************************************************
2 ; playmod2.asm (for MSDOS)
3 ; ----------------------------------------------------------------------------
4 ; PLAYMOD2.COM ! ICH AC97 MOD PLAYER & VGA DEMO program by Erdogan TAN
5 ;
6 ; 18/02/2017
7 ;
8 ; [ Last Modification: 20/05/2024 ]
9 ;
10 ; Derived from source code of 'PLAYWAV.COM' ('PLAYWAV.ASM') by Erdogan Tan
11 ; (17/02/2017)
12 ; Modified from 'PLAYMOD.COM' ('playmod.asm') source code
13 ; VIA VT8237 MOD PLAYER & VGA DEMO program by Erdogan TAN
14 ; (15/02/2017)
15 ;
16 ; Derived from source code of 'PLAY.EXE' (TINYPLAY) by Carlos Hasan (1993)
17 ; PLAY.EXE: PLAY.ASM, MODLOAD.ASM, MODPLAY.ASM, SB.ASM
18 ;
19 ; Assembler: NASM 2.11
20 ; ----------------------------------------------------------------------------
21 ; nasm playmod2.asm -l playmod2.lst -o PLAYMOD2.COM
22 ; ****************************************************************************
23
24 ; Tiny MOD Player v0.1b by Carlos Hasan.
25 ; July 14th, 1993.
26
27 ;=============================================================================
28 ; PLAYWAV.ASM / PLAYER.ASM / TINYPLAY.ASM
29 ;=============================================================================
30 ; Audio controller, codec & PCI functions are derived from '.wav file player
31 ; for DOS' source code by Jeff Leyda (PLAYER.EXE), Sep 02, 2002.
32
33 ; TUNELOOP version ; 12/05/2024
34 ; PLAYMODM.ASM (15/04/2024)
35
36 [BITS 16]
37 [org 100h]
38
39 Start:
40 00000000 E8CC00 call DetectICH ; Detect AC97 Audio Device
41 GetFileName: ; Parse the Command line...
42 00000003 BE8000 mov si, 80h
43 00000006 8A1C mov bl, [si]
44 00000008 30FF xor bh, bh
45 0000000A 43 inc bx
46 0000000B C60000 mov byte [si+bx], 0 ; make AsciiZ filename.
47 0000000E 46 inc si
48 ScanName:
49 0000000F AC lodsb
50 00000010 84C0 test al, al
51 00000012 0F84AF00 je pmsg_2017
52 00000016 3C20 cmp al, 20h
53 00000018 74F5 je short ScanName ; scan start of name.
54 0000001A 89F7 mov di, si
55 0000001C 4F dec di
56 ScanPeriod:
57 0000001D AC lodsb
58 0000001E 3C2E cmp al, '.' ; if period NOT found,
59 00000020 7410 je short PrintMesg ; then add a .MOD extension.
60 00000022 84C0 test al, al
61 00000024 75F7 jnz short ScanPeriod
62 00000026 4E dec si
63 SetExt:
64 ;mov byte [si+0], '.'
65 ;mov byte [si+1], 'M'
66 ;mov byte [si+2], 'O'
67 ;mov byte [si+3], 'D'
68 00000027 66C7042E4D4F44 mov dword [si], '.MOD'
69 0000002E C6440400 mov byte [si+4], 0
70
71 PrintMesg:
72 00000032 B80009 mov ax, 0900h ; Prints the Credits Text.
73 ;lea dx, [Credits]
74 00000035 BA[0E0E] mov dx, Credits
75 00000038 CD21 int 21h
76
77 ; 13/05/2024
78 0000003A E8320C call write_ac97_dev_info
79 0000003D B80009 mov ax, 0900h ; Prints the Credits Text.
80 00000040 BA[3F0E] mov dx, CRLF
81 00000043 CD21 int 21h
82 LoadMod:
83 ; es:di = Filename address
84 00000045 06 push es
85 00000046 57 push di
86 00000047 E84A05 call LoadModule ; Load the MODule...
87
88 0000004A 833E[FA60]00 cmp word [ErrorInfo], 0 ; any error loading?
89 0000004F 740A je short init_codec
90
91 00000051 B80009 mov ax, 0900h ; yes, print error and Exit.
92 ;lea dx, [ErrorMesg]
93 00000054 BA[420E] mov dx, ErrorMesg
94 00000057 CD21 int 21h
95 00000059 EB63 jmp Exit
96
97 init_codec:
98 ; 13/05/2024
99 ;call write_ac97_dev_info
100
101 ; 08/05/2024
102 ; 17/02/2017
103 ;mov dx, [stats_cmd]
104 ;or dl, IO_ENA+BM_ENA ; enable IO and bus master
105 ;call pciRegWrite16 ; pciRegWrite8
106
107 ; 18/02/2017
108 ;mov word [sample_rate], 22050 ; Mixing at 22.050 kHz
109 ; 14/05/2024
110 0000005B C706[3865]C05D mov word [sample_rate], 24000
111
112 ; 08/05/2024
113 ; (48 kHZ mixing is necessary
114 ; if the AC97 hardware/codec has not got VRA feature)
115 ; ((or frequency converting code would be needed))
116 ;mov word [sample_rate], 48000 ; Mixing at 48 kHz
117
118 ; setup the Codec (actually mixer registers)
119 00000061 E8FD01 call codecConfig ; unmute codec, set rates.
120 00000064 731A jnc short PlayNow
121
122 _codec_err:
123 00000066 0E push cs
124 00000067 1F pop ds
125 00000068 BA[7100] mov dx, CodecErrMsg
126 0000006B B409 mov ah, 9
127 0000006D CD21 int 21h
128 0000006F EB4D jmp Exit
129
130 00000071 436F64656320457272- CodecErrMsg db "Codec Error!"
130 0000007A 6F7221
131 0000007D 0D0A24 db CR,LF,"$"
132 PlayNow:
133 00000080 B8[F80F] mov ax, BdlBuffer
134 00000083 A3[E60F] mov [BDL_BUFFER], ax
135
136 00000086 B8[F810] mov ax, DmaBuffer ; DmaBuffer (4096 bytes) buff addr
137 00000089 A3[E80F] mov [DMA_BUFFER1], ax ; 2048 byte half buffer 1
138
139 0000008C 050028 add ax, BUFFERSIZE ; code/current segment
140 0000008F A3[EA0F] mov [DMA_BUFFER2], ax ; 2048 byte half buffer 2
141
142 ;mov word [MixSpeed], 22050 ; Mixing at 22.050 kHz
143
144 00000092 E8CD0A call StartPlaying
145
146 00000095 B81300 mov ax, 0013h ; Set Mode 320x200x256
147 00000098 CD10 int 10h
148
149 0000009A B98000 mov cx, 128 ; Make a lookup table
150 0000009D 31DB xor bx, bx ; for fastest pixel
151 0000009F BA002D mov dx, 320*(100-64) ; addressing.
152 MakeOfs:
153 000000A2 8997[00C2] mov [RowOfs+bx], dx
154 000000A6 8997[02C2] mov [RowOfs+bx+2], dx
155 000000AA 81C24001 add dx, 320
156 000000AE 83C304 add bx, 4
157 000000B1 E2EF loop MakeOfs
158
159 ; Note: Normally IRQ 0 calls the ModPlay Polling at 18.2Hz thru
160 ; the software interrupt 1Ch. If the IRQ 0 is disabled, then
161 ; the INT 1Ch MUST BE CALLED at least MixSpeed/1024 times per
162 ; second, or the module will sound "looped".
163 ; Because we need better sync with the ModPlayer to draw the scope,
164 ; the polling is called from my routine, and then the irq 0 must be
165 ; disabled. The [DmaBuffer] points to the current buffer of 8-bit
166 ; samples played by the Sound Blaster. Note that some samples are
167 ; discarded in the next code, just for fun!
168
169 ;in al, 21h ; disable irq 0!
170 ;or al, 00000001b
171 ;out 21h, al
172
173 000000B3 E87503 call ModPlay ; 13/02/2017
174
175 ;in al, 21h ; enable irq 0!
176 ;and al, 11111110b
177 ;out 21h, al
178
179 000000B6 B80300 mov ax, 0003h ; Set Text Mode 80x25x16
180 000000B9 CD10 int 10h
181
182 000000BB E8250B call StopPlaying ; STOP!
183 Exit:
184 ;call FreeModule ; Free MODule core.
185 error_exit:
186 000000BE B8004C mov ax, 4C00h ; Bye!
187 000000C1 CD21 int 21h
188 here:
189 000000C3 EBFE jmp short here
190
191 pmsg_2017:
192 000000C5 B80009 mov ax, 0900h ; Prints the Credits Text.
193 ;lea dx, [msg_2017]
194 000000C8 BA[AE0D] mov dx, msg_2017
195 000000CB CD21 int 21h
196 000000CD EBEF jmp short Exit
197
198 DetectICH:
199 ; 18/02/2017
200 ; Detech Intel ICH based AC97 Audio Device
201 000000CF E84E01 call pciFindDevice ; AC97.ASM (PLAYWAV.COM)
202 000000D2 733F jnc short _1
203
204 ; couldn't find the audio device!
205 ;push cs
206 ;pop ds
207 000000D4 BA[DD00] mov dx, noDevMsg
208 000000D7 B409 mov ah, 9
209 000000D9 CD21 int 21h
210 000000DB EBE1 jmp short error_exit
211
212 000000DD 4572726F723A20556E- noDevMsg db "Error: Unable to find Intel ICH based audio device!",CR,LF,"$"
212 000000E6 61626C6520746F2066-
212 000000EF 696E6420496E74656C-
212 000000F8 204943482062617365-
212 00000101 6420617564696F2064-
212 0000010A 6576696365210D0A24
213
214 _1:
215 ; 18/02/2017
216 ; eax = BUS/DEV/FN
217 ; 00000000BBBBBBBBDDDDDFFF00000000
218 ; edx = DEV/VENDOR
219 ; DDDDDDDDDDDDDDDDVVVVVVVVVVVVVVVV
220
221 00000113 66A3[EE0F] mov [bus_dev_fn], eax
222 00000117 668916[F20F] mov [dev_vendor], edx
223
224 ; get ICH base address regs for mixer and bus master
225
226 0000011C B010 mov al, NAMBAR_REG
227 0000011E E87100 call pciRegRead16 ; read PCI registers 10-11
228 ;and dx, IO_ADDR_MASK ; mask off BIT0
229 ; 14/05/2024
230 00000121 80E2FE and dl, 0FEh
231
232 00000124 8916[D80F] mov [NAMBAR], dx ; save audio mixer base addr
233
234 00000128 B014 mov al, NABMBAR_REG
235 0000012A E86500 call pciRegRead16
236 ;and dx, IO_ADDR_MASK
237 ;/14/05/2024
238 0000012D 80E2C0 and dl, 0C0h
239
240 00000130 8916[DA0F] mov [NABMBAR], dx ; save bus master base addr
241
242 ; 08/05/2024
243 ; 06/11/2023
244 ;; init controller
245 ;; 17/02/2017
246 ;mov al, PCI_CMD_REG ; command register (04h)
247 ;call pciRegRead16 ; pciRegRead8
248 ;
249 ;; eax = BUS/DEV/FN/REG
250 ;; dx = PCI Command Register Content ; 17/02/2017
251 ;; 00000000CCCCCCCC
252 ;mov [stats_cmd], dx
253 ;
254 ; 06/11/2023
255 ;mov al, PCI_IO_BASE ; IO base address register (10h)
256 ;call pciRegRead32
257 ;
258 ;and dx, 0FFC0h ; IO_ADDR_MASK (0FFFE) ?
259 ;mov [ac97_io_base], dx
260
261 00000134 B03C mov al, AC97_INT_LINE ; Interrupt line register (3Ch)
262 00000136 E85100 call pciRegRead8 ; 17/02/2017
263
264 00000139 8816[EC0F] mov [ac97_int_ln_reg], dl
265
266 ; 12/05/2024 (tuneloop version)
267 %if 0
268 ; 28/11/2016
269 ;mov bx, 1 ; 08/05/2024
270 xor dh, dh ; 17/02/2017
271 ; 10/11/2023
272 ;mov cx, dx
273 ;shl bx, cl
274
275 ; 04/11/2023
276 cli
277
278 ;not bx
279 in al, 0A1h ; irq 8-15
280 mov ah, al
281 in al, 21h ; irq 0-7
282
283 ; 04/11/2023
284 ; save IRQ status
285 mov [IRQ_status], ax
286
287 ; 08/05/2024
288 ;mov dx, 4D1h ;8259 ELCR1
289 ;in al, dx
290 ;mov ah, al
291 ;mov dx, 4D0h
292 ;in al, dx
293 ;;or ax, bx
294 ;bts ax, cx
295 ;mov dx, 4D0h
296 ;out dx, al ;set level-triggered mode
297 ;mov al, ah
298 ;mov dx, 4D1h
299 ;out dx, al ;set level-triggered mode
300
301 ; 24/11/2016 - Erdogan Tan
302 ;mov bx, cx
303 ; 10/11/2023
304 mov bx, dx
305 mov bl, [bx+irq_int]
306 shl bx, 2 ; * 4
307
308 ; set up interrupt vector
309 ; 30/11/2016
310 push es
311 xor ax, ax
312 mov es, ax
313 ; 04/11/2023
314 ; save interrupt vector
315 mov ax, [es:bx]
316 mov [IRQ_vector], ax
317 mov ax, [es:bx+2]
318 mov [IRQ_vector+2], ax
319
320 mov word [es:bx], ac97_int_handler
321 mov ax, cs
322 mov [es:bx+2], ax
323 pop es
324
325 ; 04/11/2023
326 sti
327 %endif
328 0000013D C3 retn
329
330 ; 12/05/2024 (tuneloop version)
331 %if 0
332
333 ac97_int_handler:
334 ; 11/05/2024
335 ; 11/11/2023
336 ; 10/11/2023
337 ; 17/02/2016
338 push eax ; 11/11/2023
339 push dx
340 ; 05/11/2023
341 ;push cx
342 ;push bx
343 ;push si
344 ;push di
345
346 ; 10/11/2023
347 ; EOI at first
348 mov al, 20h
349 test byte [ac97_int_ln_reg], 8
350 jz short _ih_0
351 out 0A0h, al ; 20h ; EOI
352 _ih_0:
353 out 20h, al ; 20h ; EOI
354
355 ; 11/11/2023
356 ; 09/11/2023
357 mov dx, GLOB_STS_REG
358 add dx, [NABMBAR]
359 in eax, dx
360
361 ; 12/05/2024
362 ; 09/11/2023,
363 ;cmp eax, 0FFFFFFFFh ; -1
364 ;je short _ih_2
365
366 ; 12/05/2024
367 ;test al, 40h ; PCM Out Interrupt
368 ;jnz short _ih_1
369
370 ;test eax, eax
371 ;jz short _ih_2
372 ; 12/05/2024
373 test ax, PCM_OUT_IRQ+BCIS
374 jnz short _ih_1
375
376 ;mov dx, GLOB_STS_REG
377 ;add dx, [NABMBAR]
378 out dx, eax
379 jmp short _ih_2
380
381 ; .....
382 ;mov al, 1
383 ; 10/11/2023
384 ;mov [tLoop], al ; 1
385
386 ;cmp [inside], al ; 1
387 ;jnb short _ih_3 ; busy
388
389 ;mov [inside], al ; 1
390 ;
391 ;; 09/11/2023
392 ;mov dx, [NABMBAR]
393 ;add dx, PO_SR_REG ; set pointer to Status reg
394 ;in al, dx
395 ;; 10/11/2023
396 ;;;out dx, eax
397 ;;out dx, al ; clear interrupt event
398 ; ; (by writing 1 to same bits)
399 ;
400 ;;mov [pcm_irq_status], al ; 05/11/2023
401 ;test al, BCIS ; Buffer Completion Interrupt Status (Bit 3)
402 ;jz short _ih_2
403 ; .....
404
405 _ih_1:
406 ; 11/11/2023
407 push eax
408
409 ;mov ax, 1Ch ; FIFOE(=16)+BCIS(=8)+LVBCI(=4)
410 ;mov dx, PO_SR_REG
411 ;add dx, [NABMBAR]
412 ;out dx, ax
413
414 ; 10/11/2023
415 ; 28/11/2016 - Erdogan Tan
416 call tuneLoop
417
418 ; 11/11/2023
419 pop eax
420 mov dx, GLOB_STS_REG
421 add dx, [NABMBAR]
422 out dx, eax
423 _ih_2:
424 ; 11/11/2023
425 mov dx, [NABMBAR]
426 add dx, PO_SR_REG ; set pointer to Status reg
427 mov ax, 1Ch
428 out dx, ax
429
430 ; ; 10/11/2023
431 ; mov al, 20h
432 ; test byte [ac97_int_ln_reg], 8
433 ; jz short _ih_3
434 ; out 0A0h, al ; 20h ; EOI
435 ;_ih_3:
436 ; out 20h, al ; 20h ; EOI
437 ;_ih_4:
438 ;mov byte [inside], 0
439 ;pop di
440 ;pop si
441 ;pop bx
442 ;pop cx
443 pop dx
444 pop eax ; 11/11/2023
445 iret
446
447 %endif
448
449 ;=============================================================================
450 ; PCI.ASM
451 ;=============================================================================
452
453 ; EQUATES
454
455 ;constants of stuff that seem hard to remember at times.
456
457 TRUE EQU 1
458 FALSE EQU 0
459
460 ENABLED EQU 1
461 DISABLED EQU 0
462
463 BIT0 EQU 1
464 BIT1 EQU 2
465 BIT2 EQU 4
466 BIT3 EQU 8
467 BIT4 EQU 10h
468 BIT5 EQU 20h
469 BIT6 EQU 40h
470 BIT7 EQU 80h
471 BIT8 EQU 100h
472 BIT9 EQU 200h
473 BIT10 EQU 400h
474 BIT11 EQU 800h
475 BIT12 EQU 1000h
476 BIT13 EQU 2000h
477 BIT14 EQU 4000h
478 BIT15 EQU 8000h
479 BIT16 EQU 10000h
480 BIT17 EQU 20000h
481 BIT18 EQU 40000h
482 BIT19 EQU 80000h
483 BIT20 EQU 100000h
484 BIT21 EQU 200000h
485 BIT22 EQU 400000h
486 BIT23 EQU 800000h
487 BIT24 EQU 1000000h
488 BIT25 EQU 2000000h
489 BIT26 EQU 4000000h
490 BIT27 EQU 8000000h
491 BIT28 EQU 10000000h
492 BIT29 EQU 20000000h
493 BIT30 EQU 40000000h
494 BIT31 EQU 80000000h
495
496 ;special characters
497 NUL EQU 0
498 NULL EQU 0
499 BELL EQU 07
500 BS EQU 08
501 TAB EQU 09
502 LF EQU 10
503 CR EQU 13
504 ESCAPE EQU 27 ;ESC is a reserved word....
505
506
507 ;file stuff
508 READONLY EQU BIT0
509 HIDDEN EQU BIT1
510 SYSTEM EQU BIT2
511 VOLUME EQU BIT3 ;ignored for file access
512 DIRECTORY EQU BIT4 ;must be 0 for file access
513 ARCHIVE EQU BIT5
514 SHAREABLE EQU BIT7 ;for novell networks
515 OPEN EQU 2 ; open existing file
516 CREATE EQU 1 ; create new file
517
518
519 ; PCI equates
520 ; PCI function address (PFA)
521 ; bit 31 = 1
522 ; bit 23:16 = bus number (0-255)
523 ; bit 15:11 = device number (0-31)
524 ; bit 10:8 = function number (0-7)
525 ; bit 7:0 = register number (0-255)
526
527 IO_ADDR_MASK EQU 0FFFEh ; mask off bit 0 for reading BARs
528 PCI_INDEX_PORT EQU 0CF8h
529 PCI_DATA_PORT EQU 0CFCh
530 PCI32 EQU BIT31 ; bitflag to signal 32bit access
531 PCI16 EQU BIT30 ; bitflag for 16bit access
532
533 PCI_FN0 EQU 0 << 8
534 PCI_FN1 EQU 1 << 8
535 PCI_FN2 EQU 2 << 8
536 PCI_FN3 EQU 3 << 8
537 PCI_FN4 EQU 4 << 8
538 PCI_FN5 EQU 5 << 8
539 PCI_FN6 EQU 6 << 8
540 PCI_FN7 EQU 7 << 8
541
542 PCI_CMD_REG EQU 04h ; reg 04, command reg
543 IO_ENA EQU BIT0 ; i/o decode enable
544 MEM_ENA EQU BIT1 ; memory decode enable
545 BM_ENA EQU BIT2 ; bus master enable
546
547 ; CODE
548
549 ; AC97.ASM
550 ; PCI device register reader/writers.
551 ; NASM version: Erdogan Tan (29/11/2016)
552 ; Last Update: 17/02/2017
553
554 ;===============================================================
555 ; 8/16/32bit PCI reader
556 ;
557 ; Entry: EAX=PCI Bus/Device/fn/register number
558 ; BIT30 set if 32 bit access requested
559 ; BIT29 set if 16 bit access requested
560 ; otherwise defaults to 8bit read
561 ;
562 ; Exit: DL,DX,EDX register data depending on requested read size
563 ;
564 ; Note: this routine is meant to be called via pciRegRead8, pciRegread16,
565 ; or pciRegRead32, listed below.
566 ;
567 ; Note2: don't attempt to read 32bits of data from a non dword aligned reg
568 ; number. Likewise, don't do 16bit reads from non word aligned reg #
569 ;
570 pciRegRead:
571 0000013E 6653 push ebx
572 00000140 51 push cx
573 00000141 6689C3 mov ebx, eax ; save eax, dh
574 00000144 88F1 mov cl, dh
575 00000146 6625FFFFFFBF and eax, (~PCI32)+PCI16 ; clear out data size request
576 0000014C 660D00000080 or eax, BIT31 ; make a PCI access request
577 00000152 24FC and al, ~3 ; NOT 3 ; force index to be dword
578
579 00000154 BAF80C mov dx, PCI_INDEX_PORT
580 00000157 66EF out dx, eax ; write PCI selector
581
582 00000159 BAFC0C mov dx, PCI_DATA_PORT
583 0000015C 88D8 mov al, bl
584 0000015E 2403 and al, 3 ; figure out which port to
585 00000160 00C2 add dl, al ; read to
586
587 00000162 66ED in eax, dx ; do 32bit read
588 00000164 66F7C300000080 test ebx, PCI32
589 0000016B 7403 jz short _pregr1
590
591 0000016D 6689C2 mov edx, eax ; return 32bits of data
592 _pregr1:
593 00000170 89C2 mov dx, ax ; return 16bits of data
594 00000172 66F7C3000000C0 test ebx, PCI32+PCI16
595 00000179 7502 jnz short _pregr2
596 0000017B 88CE mov dh, cl ; restore dh for 8 bit read
597 _pregr2:
598 0000017D 6689D8 mov eax, ebx ; restore eax
599 00000180 6625FFFFFFBF and eax, (~PCI32)+PCI16 ; clear out data size request
600 00000186 59 pop cx
601 00000187 665B pop ebx
602 00000189 C3 retn
603
604 pciRegRead8:
605 0000018A 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 8 bit read size
606 00000190 EBAC jmp short pciRegRead ; call generic PCI access
607
608 pciRegRead16:
609 00000192 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 16 bit read size
610 00000198 660D00000040 or eax, PCI16 ; call generic PCI access
611 0000019E EB9E jmp short pciRegRead
612
613 pciRegRead32:
614 000001A0 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 32 bit read size
615 000001A6 660D00000080 or eax, PCI32 ; call generic PCI access
616 000001AC EB90 jmp short pciRegRead
617
618 ;===============================================================
619 ; 8/16/32bit PCI writer
620 ;
621 ; Entry: EAX=PCI Bus/Device/fn/register number
622 ; BIT31 set if 32 bit access requested
623 ; BIT30 set if 16 bit access requested
624 ; otherwise defaults to 8bit read
625 ; DL/DX/EDX data to write depending on size
626 ;
627 ;
628 ; note: this routine is meant to be called via pciRegWrite8, pciRegWrite16,
629 ; or pciRegWrite32 as detailed below.
630 ;
631 ; Note2: don't attempt to write 32bits of data from a non dword aligned reg
632 ; number. Likewise, don't do 16bit writes from non word aligned reg #
633 ;
634 pciRegWrite:
635 000001AE 6653 push ebx
636 000001B0 51 push cx
637 000001B1 6689C3 mov ebx, eax ; save eax, dx
638 000001B4 89D1 mov cx, dx
639 000001B6 660D00000080 or eax, BIT31 ; make a PCI access request
640 000001BC 6625FFFFFFBF and eax, ~PCI16 ; NOT PCI16 ; clear out data size request
641 000001C2 24FC and al, ~3 ; NOT 3 ; force index to be dword
642
643 000001C4 BAF80C mov dx, PCI_INDEX_PORT
644 000001C7 66EF out dx, eax ; write PCI selector
645
646 000001C9 BAFC0C mov dx, PCI_DATA_PORT
647 000001CC 88D8 mov al, bl
648 000001CE 2403 and al, 3 ; figure out which port to
649 000001D0 00C2 add dl, al ; write to
650
651 000001D2 6689D0 mov eax, edx ; put data into eax
652 000001D5 89C8 mov ax, cx
653
654 000001D7 EE out dx, al
655 000001D8 66F7C3000000C0 test ebx, PCI16+PCI32 ; only 8bit access? bail
656 000001DF 740C jz short _pregw1
657
658 000001E1 EF out dx, ax ; write 16 bit value
659 000001E2 66F7C300000040 test ebx, PCI16 ; 16bit requested? bail
660 000001E9 7502 jnz short _pregw1
661
662 000001EB 66EF out dx, eax ; write full 32bit
663 _pregw1:
664 000001ED 6689D8 mov eax, ebx ; restore eax
665 000001F0 6625FFFFFFBF and eax, (~PCI32)+PCI16 ; clear out data size request
666 000001F6 89CA mov dx, cx ; restore dx
667 000001F8 59 pop cx
668 000001F9 665B pop ebx
669 000001FB C3 ret
670
671 pciRegWrite8:
672 000001FC 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 8 bit write size
673 00000202 EBAA jmp short pciRegWrite ; call generic PCI access
674
675 pciRegWrite16:
676 00000204 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 16 bit write size
677 0000020A 660D00000040 or eax, PCI16 ; call generic PCI access
678 00000210 EB9C jmp short pciRegWrite
679
680 pciRegWrite32:
681 00000212 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 32 bit write size
682 00000218 660D00000080 or eax, PCI32 ; call generic PCI access
683 0000021E EB8E jmp short pciRegWrite
684
685 ; AC97.ASM (PLAYWAV.COM)
686 ; 17/02/2017 (Modifed by Erdogan Tan for various ICH device IDs)
687 ;===============================================================
688 ; PCIFindDevice: scan through PCI space looking for a device+vendor ID
689 ;
690 ; ENTRY: none
691 ;; Entry: EAX=Device+Vendor ID
692 ;
693 ; Exit: EAX=PCI address if device found
694 ; EDX=Device+Vendor ID
695 ; CY clear if found, set if not found. EAX invalid if CY set.
696 ;
697 ; [old stackless] Destroys: ebx, esi, edi, cl
698 ;
699 pciFindDevice:
700 ;push cx
701 ;push eax ; *
702 ;push esi
703 ;push edi
704
705 ;mov esi, eax ; save off vend+device ID
706
707 ; 17/02/2017
708 00000220 BE[D70E] mov si, valid_ids ; address of Valid ICH (AC97) Device IDs
709 00000223 B91500 mov cx, valid_id_count
710 pfd_0:
711 00000226 66BF00FFFF7F mov edi, (80000000h - 100h) ; start with bus 0, dev 0 func 0
712 nextPCIdevice:
713 0000022C 6681C700010000 add edi, 100h
714 00000233 6681FF00F8FF80 cmp edi, 80FFF800h ; scanned all devices?
715 ;stc
716 ;je short PCIScanExit ; not found
717 0000023A 720D jb short pfd_1
718 0000023C 66BF00000080 mov edi, 80000000h
719 00000242 83C604 add si, 4 ; scan for next device ID
720 00000245 E202 loop pfd_1
721 00000247 F9 stc
722 ;jmp short PCIScanExit
723 00000248 C3 retn
724 pfd_1:
725 00000249 6689F8 mov eax, edi ; read PCI registers
726 0000024C E851FF call pciRegRead32
727 ;cmp edx, esi ; found device?
728 0000024F 663B14 cmp edx, dword [si]
729 00000252 75D8 jne short nextPCIdevice
730 ;clc
731 PCIScanExit:
732 ;pushf
733 00000254 66B800000080 mov eax, BIT31
734 0000025A 66F7D0 not eax
735 0000025D 6621F8 and eax, edi ; return only bus/dev/fn #
736 ;popf
737
738 ;pop edi
739 ;pop esi
740 ;pop edx ; *
741 ;pop cx
742 00000260 C3 retn
743
744 ;=============================================================================
745 ; CODEC.ASM
746 ;=============================================================================
747
748 ; EQUATES
749
750 ;Codec registers.
751 ;
752 ;Not all codecs are created equal. Refer to the spec for your specific codec.
753 ;
754 ;All registers are 16bits wide. Access to codec registers over the AC97 link
755 ;is defined by the OEM.
756 ;
757 ;Secondary codec's are accessed by ORing in BIT7 of all register accesses.
758 ;
759
760 ; each codec/mixer register is 16bits
761
762 CODEC_RESET_REG equ 00 ; reset codec
763 CODEC_MASTER_VOL_REG equ 02 ; master volume
764 CODEC_HP_VOL_REG equ 04 ; headphone volume
765 CODEC_MASTER_MONO_VOL_REG equ 06 ; master mono volume
766 CODEC_MASTER_TONE_REG equ 08 ; master tone (R+L)
767 CODEC_PCBEEP_VOL_REG equ 0ah ; PC beep volume
768 CODEC_PHONE_VOL_REG equ 0bh ; phone volume
769 CODEC_MIC_VOL_REG equ 0eh ; MIC volume
770 CODEC_LINE_IN_VOL_REG equ 10h ; line input volume
771 CODEC_CD_VOL_REG equ 12h ; CD volume
772 CODEC_VID_VOL_REG equ 14h ; video volume
773 CODEC_AUX_VOL_REG equ 16h ; aux volume
774 CODEC_PCM_OUT_REG equ 18h ; PCM output volume
775 CODEC_RECORD_SELECT_REG equ 1ah ; record select input
776 CODEC_RECORD_VOL_REG equ 1ch ; record volume
777 CODEC_RECORD_MIC_VOL_REG equ 1eh ; record mic volume
778 CODEC_GP_REG equ 20h ; general purpose
779 CODEC_3D_CONTROL_REG equ 22h ; 3D control
780 ; 24h is reserved
781 CODEC_POWER_CTRL_REG equ 26h ; powerdown control
782 CODEC_EXT_AUDIO_REG equ 28h ; extended audio
783 CODEC_EXT_AUDIO_CTRL_REG equ 2ah ; extended audio control
784 CODEC_PCM_FRONT_DACRATE_REG equ 2ch ; PCM out sample rate
785 CODEC_PCM_SURND_DACRATE_REG equ 2eh ; surround sound sample rate
786 CODEC_PCM_LFE_DACRATE_REG equ 30h ; LFE sample rate
787 CODEC_LR_ADCRATE_REG equ 32h ; PCM in sample rate
788 CODEC_MIC_ADCRATE_REG equ 34h ; mic in sample rate
789
790 ; registers 36-7a are reserved on the ICH
791
792 CODEC_VENDORID1_REG equ 7ch ; codec vendor ID 1
793 CODEC_VENDORID2_REG equ 7eh ; codec vendor ID 2
794
795 ; Mixer registers 0 through 51h reside in the ICH and are not forwarded over
796 ; the AC97 link to the codec, which I think is a little weird. Looks like
797 ; the ICH makes it so you don't need a fully functional codec to play audio?
798 ;
799 ; whenever 2 codecs are present in the system, use BIT7 to access the 2nd
800 ; set of registers, ie 80h-feh
801
802 PRIMARY_CODEC equ 0 ; 0-7F for primary codec
803 SECONDARY_CODEC equ BIT7 ; 80-8f registers for 2ndary
804
805 SAMPLE_RATE_441khz equ 44100 ; 44.1Khz (cd quality) rate
806
807 ; ----------------------------------------------------------------------------
808 ; 17/02/2017
809 PCI_IO_BASE equ 10h ; = NAMBAR register offset
810 AC97_INT_LINE equ 3Ch ; AC97 Interrupt Line register offset
811
812 ; ----------------------------------------------------------------------------
813 ; ICH2AC97.INC
814 ; ----------------------------------------------------------------------------
815
816 ; PCI stuff
817
818 ; Intel ICH2 equates. It is assumed that ICH0 and plain ole ICH are compatible.
819
820 INTEL_VID equ 8086h ; Intel's PCI vendor ID
821
822 ; 08/05/2024
823 ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
824 SIS_VID equ 1039h
825 NVIDIA_VID equ 10DEh ; Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source c.
826 AMD_VID equ 1022h
827
828 ICH_DID equ 2415h ; ICH device ID
829 ICH0_DID equ 2425h ; ICH0
830 ICH2_DID equ 2445h ; ICH2 I think there are more ICHes.
831 ; they all should be compatible.
832 ; 08/05/2024
833 ; 17/02/2017 (Erdogan Tan, ref: ALSA Device IDs, ALSA project)
834 ICH3_DID equ 2485h ; ICH3
835 ICH4_DID equ 24C5h ; ICH4
836 ICH5_DID equ 24D5h ; ICH5
837 ICH6_DID equ 266Eh ; ICH6
838 ESB6300_DID equ 25A6h ; 6300ESB
839 ESB631X_DID equ 2698h ; 631XESB
840 ICH7_DID equ 27DEh ; ICH7
841 ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
842 MX82440_DID equ 7195h
843 SI7012_DID equ 7012h
844 NFORCE_DID equ 01B1h
845 NFORCE2_DID equ 006Ah
846 AMD8111_DID equ 746Dh
847 AMD768_DID equ 7445h
848 ; 03/11/2023 - Erdogan Tan - Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source code
849 CK804_DID equ 0059h
850 MCP04_DID equ 003Ah
851 CK8_DID equ 008Ah
852 NFORCE3_DID equ 00DAh
853 CK8S_DID equ 00EAh
854
855 NAMBAR_REG equ 10h ; native audio mixer BAR
856 NAM_SIZE equ 256 ; 256 bytes required.
857
858 NABMBAR_REG equ 14h ; native audio bus mastering BAR
859 NABM_SIZE equ 64 ; 64 bytes
860
861 ; BUS master registers, accessed via NABMBAR+offset
862
863 ; ICH supports 3 different types of register sets for three types of things
864 ; it can do, thus:
865 ;
866 ; PCM in (for recording) aka PI
867 ; PCM out (for playback) aka PO
868 ; MIC in (for recording) aka MC
869
870 PI_BDBAR_REG equ 0 ; PCM in buffer descriptor BAR
871 PO_BDBAR_REG equ 10h ; PCM out buffer descriptor BAR
872 MC_BDBAR_REG equ 20h ; MIC in buffer descriptor BAR
873
874 ; each buffer descriptor BAR holds a pointer which has entries to the buffer
875 ; contents of the .WAV file we're going to play. Each entry is 8 bytes long
876 ; (more on that later) and can contain 32 entries total, so each BAR is
877 ; 256 bytes in length, thus:
878
879 BDL_SIZE equ 32*8 ; Buffer Descriptor List size
880 INDEX_MASK equ 31 ; indexes must be 0-31
881
882
883
884 PI_CIV_REG equ 4 ; PCM in current Index value (RO)
885 PO_CIV_REG equ 14h ; PCM out current Index value (RO)
886 MC_CIV_REG equ 24h ; MIC in current Index value (RO)
887 ;8bit read only
888 ; each current index value is simply a pointer showing us which buffer
889 ; (0-31) the codec is currently processing. Once this counter hits 31, it
890 ; wraps back to 0.
891 ; this can be handy to know, as once it hits 31, we're almost out of data to
892 ; play back or room to record!
893
894
895 PI_LVI_REG equ 5 ; PCM in Last Valid Index
896 PO_LVI_REG equ 15h ; PCM out Last Valid Index
897 MC_LVI_REG equ 25h ; MIC in Last Valid Index
898 ;8bit read/write
899 ; The Last Valid Index is a number (0-31) to let the codec know what buffer
900 ; number to stop on after processing. It could be very nasty to play audio
901 ; from buffers that aren't filled with the audio we want to play.
902
903
904 PI_SR_REG equ 6 ; PCM in Status register
905 PO_SR_REG equ 16h ; PCM out Status register
906 MC_SR_REG equ 26h ; MIC in Status register
907 ;16bit read/write
908 ; status registers. Bitfields follow:
909
910 FIFO_ERR equ BIT4 ; FIFO Over/Underrun W1TC.
911
912 BCIS equ BIT3 ; buffer completion interrupt status.
913 ; Set whenever the last sample in ANY
914 ; buffer is finished. Bit is only
915 ; set when the Interrupt on Complete
916 ; (BIT4 of control reg) is set.
917
918 LVBCI equ BIT2 ; Set whenever the codec has processed
919 ; the last buffer in the buffer list.
920 ; Will fire an interrupt if IOC bit is
921 ; set. Probably set after the last
922 ; sample in the last buffer is
923 ; processed. W1TC
924
925 ;
926 CELV equ BIT1 ; Current buffer == last valid.
927 ; Bit is RO and remains set until LVI is
928 ; cleared. Probably set up the start
929 ; of processing for the last buffer.
930
931
932 DCH equ BIT0 ; DMA controller halted.
933 ; set whenever audio stream is stopped
934 ; or something else goes wrong.
935
936 PI_PICB_REG equ 8 ; PCM in position in current buffer(RO)
937 PO_PICB_REG equ 18h ; PCM out position in current buffer(RO)
938 MC_PICB_REG equ 28h ; MIC in position in current buffer (RO)
939 ;16bit read only
940 ; position in current buffer regs show the number of dwords left to be
941 ; processed in the current buffer.
942 ;
943
944 PI_PIV_REG equ 0ah ; PCM in Prefected index value
945 PO_PIV_REG equ 1ah ; PCM out Prefected index value
946 MC_PIV_REG equ 2ah ; MIC in Prefected index value
947 ;8bit, read only
948 ; Prefetched index value register.
949 ; tells which buffer number (0-31) has be prefetched. I'd imagine this
950 ; value follows the current index value fairly closely. (CIV+1)
951 ;
952
953 PI_CR_REG equ 0bh ; PCM in Control Register
954 PO_CR_REG equ 1bh ; PCM out Control Register
955 MC_CR_REG equ 2bh ; MIC in Control Register
956 ; 8bit
957 ; Control register *MUST* only be accessed as an 8bit value.
958 ; Control register. See bitfields below.
959 ;
960
961 IOCE equ BIT4 ; interrupt on complete enable.
962 ; set this bit if you want an intrtpt
963 ; to fire whenever LVBCI is set.
964 FEIFE equ BIT3 ; set if you want an interrupt to fire
965 ; whenever there is a FIFO (over or
966 ; under) error.
967 LVBIE equ BIT2 ; last valid buffer interrupt enable.
968 ; set if you want an interrupt to fire
969 ; whenever the completion of the last
970 ; valid buffer.
971 RR equ BIT1 ; reset registers. Nukes all regs
972 ; except bits 4:2 of this register.
973 ; Only set this bit if BIT 0 is 0
974 RPBM equ BIT0 ; Run/Pause
975 ; set this bit to start the codec!
976
977
978 GLOB_CNT_REG equ 2ch ; Global control register
979 SEC_RES_EN equ BIT5 ; secondary codec resume event
980 ; interrupt enable. Not used here.
981 PRI_RES_EN equ BIT4 ; ditto for primary. Not used here.
982 ACLINK_OFF equ BIT3 ; Turn off the AC97 link
983 ACWARM_RESET equ BIT2 ; Awaken the AC97 link from sleep.
984 ; registers preserved, bit self clears
985 ACCOLD_RESET equ BIT1 ; Reset everything in the AC97 and
986 ; reset all registers. Not self clearing
987
988 GPIIE equ BIT0 ; GPI Interrupt enable.
989 ; set if you want an interrupt to
990 ; fire upon ANY of the bits in the
991 ; GPI (general pursose inputs?) not used.
992
993 GLOB_STS_REG equ 30h ; Global Status register (RO)
994