diff --git a/.github/workflows/pages.yml b/.github/workflows/pages.yml deleted file mode 100644 index f9b29303..00000000 --- a/.github/workflows/pages.yml +++ /dev/null @@ -1,50 +0,0 @@ -# Sample workflow for building and deploying a Doxygen site to GitHub Pages -name: Deploy Doxygen site to Pages - -on: - push: - branches: ["main"] - workflow_dispatch: - -permissions: - contents: read - pages: write - id-token: write - -concurrency: - group: "pages" - cancel-in-progress: true - -jobs: - build: - runs-on: ubuntu-latest - steps: - - name: Checkout - uses: actions/checkout@v3 - - name: Setup Doxygen - run: | - sudo apt update - sudo apt install doxygen - - name: Setup Pages - id: pages - uses: actions/configure-pages@v2 - - name: Build with Jekyll - # Outputs to the './_site' directory by default - run: | - cd doc - doxygen - - name: Upload artifact - uses: actions/upload-pages-artifact@v1 - with: - path: "html" - - deploy: - environment: - name: github-pages - url: ${{ steps.deployment.outputs.page_url }} - runs-on: ubuntu-latest - needs: build - steps: - - name: Deploy to GitHub Pages - id: deployment - uses: actions/deploy-pages@v1 diff --git a/doc/.gitignore b/doc/.gitignore deleted file mode 100644 index 2ec816f3..00000000 --- a/doc/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -html -latex diff --git a/doc/Doxyfile b/doc/Doxyfile deleted file mode 100644 index 48f22574..00000000 --- a/doc/Doxyfile +++ /dev/null @@ -1,15 +0,0 @@ -PROJECT_NAME = "pico-ice" -PROJECT_BRIEF = RaspberryPi Pico with an iCE40 FPGA -OPTIMIZE_OUTPUT_FOR_C = YES -SHOW_FILES = NO -SHOW_NAMESPACES = NO -INPUT = ../ ../doc/ ../include -EXCLUDE = ../CONTRIBUTING.md ../LICENSE.md ../CHANGELOG.md ../README.md -IMAGE_PATH = images pinout -USE_MDFILE_AS_MAINPAGE = index.md -HTML_FOOTER = footer.html -HTML_EXTRA_STYLESHEET = doxygen-awesome-css/doxygen-awesome.css -HTML_COLORSTYLE = LIGHT -DISABLE_INDEX = NO -GENERATE_TREEVIEW = YES -FULL_SIDEBAR = YES diff --git a/doc/DoxygenLayout.xml b/doc/DoxygenLayout.xml deleted file mode 100644 index 46c82f4c..00000000 --- a/doc/DoxygenLayout.xml +++ /dev/null @@ -1,9 +0,0 @@ - - - - - - - - - diff --git a/doc/doxygen-awesome-css b/doc/doxygen-awesome-css deleted file mode 160000 index df88fe4f..00000000 --- a/doc/doxygen-awesome-css +++ /dev/null @@ -1 +0,0 @@ -Subproject commit df88fe4fdd97714fadfd3ef17de0b4401f804052 diff --git a/doc/favicon.ico b/doc/favicon.ico deleted file mode 100644 index 166ad755..00000000 Binary files a/doc/favicon.ico and /dev/null differ diff --git a/doc/footer.html b/doc/footer.html deleted file mode 100644 index 2db43cd6..00000000 --- a/doc/footer.html +++ /dev/null @@ -1,2 +0,0 @@ -
-

tinyVision.ai

diff --git a/doc/getting_started.md b/doc/getting_started.md deleted file mode 100644 index bdcd90f7..00000000 --- a/doc/getting_started.md +++ /dev/null @@ -1,125 +0,0 @@ -# Getting Started - -Once you receive the board, you would be able to plug via USB and see the RGB LED blinking. -You might want to update the default firmware to make sure to have the latest bugfixes: - - -## Default Firmware - -[source](https://github.com/tinyvision-ai-inc/pico-ice/blob/main/Firmware/pico-ice-default/) - -[download](https://github.com/tinyvision-ai-inc/pico-ice/releases/) - -To provide the various USB programming methods and allow to boot the FPGA, a -default firmware is loaded onto the RP2040 (Pico part of the pico-ice). - -It provides: - -- A first USB-UART (#0) is used for the and a REPL command line interface - for now only showing help message and version information. - -- A second USB-UART (#1) is used for mirroring everything between - this USB interface UART TX on RP0 with ICE27, UART RX on RP1 with ICE25. - -- A third USB-UART (#2) is exchanging data with the main SPI bus onboard - ([doc](https://pico-ice.tinyvision.ai/ice_usb.html#usb-spi-fpgasramflash-forwarding)). - -- A 12 MHz clock is exported from the RP2040 pin 24 toward the iCE40 pin 35. - -- An USB DFU interface allows programming through [dfu-utils](https://dfu-util.sourceforge.net/) - as shipped with [oss-cad-suite](https://github.com/YosysHQ/oss-cad-suite-build). - -- An USB MSC interface allows programming the board by copying a file to an USB device - ([doc](https://pico-ice.tinyvision.ai/programming_the_fpga.html#using-a-drag-drop-or-file-copy-scheme)). - -See [Programing the MCU](md_programming__the__mcu.html) for how to load this firmware file. - - -## Soldering the Pmods - -In case you ordered the board without the [Pmod](md_pmods.html) connectors soldered, -you would need to solder them in to plug something onto the board. -For instance like this: - -![pmod install after soldering](images/pico_ice_pmod_install.jpg) - - -## Using the SDK - -The [RP2040](https://www.raspberrypi.com/products/rp2040/specifications/) on the -pico-ice can be programmed with either custom C firmware, or languages such as -[MicroPython](https://micropython.org/download/RPI_PICO/), -[CircuitPython](https://circuitpython.org/board/raspberry_pi_pico/), -[Go](https://tinygo.org/docs/reference/microcontrollers/pico/), -[Rust](https://docs.rs/rp2040/latest/rp2040/), -[JavaScript](https://kalumajs.org/), -[ZeptoForth](https://github.com/tabemann/zeptoforth), -[Mecrisp Forth](https://wellys.com/posts/rp2040_forth/), -... - -Currently C/C++ programming is best suported through the pico-ice-sdk: -a Raspberry Pi [pico-sdk](https://github.com/raspberrypi/pico-sdk/) library. - -This is a guide for how to build application running on the RP2040 microcontroller. - -The [pico-ice-sdk](https://github.com/tinyvision-ai-inc/pico-ice-sdk/) provides an API for communicating with the pico-ice hardware, also allowing to use the Raspberry Pi [pico-sdk](https://github.com/raspberrypi/pico-sdk/) directly. - -The pico-ice-sdk is organised as a normal pico-sdk project with `pico_ice` custom board. - -The [examples](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/examples/) show how everything can be to get started. - -Here is how to turn an example into a new project: - -```bash -# copy the whole example directory -cp -r pico-ice-sdk/examples/pico_usb_uart my-new-pico-ice-firmware -cd my-new-pico-ice-firmware - -# turn it into a git repository -git init -git remote add origin git@github.com:your-username/my-new-pico-ice-firmware - -# replace the two symlinks by git submodules -rm pico-sdk pico-ice-sdk -git submodule add https://github.com/raspberrypi/pico-sdk -git submodule add https://github.com/tinyvision-ai-inc/pico-ice-sdk - -# fetch the submodules (using --recursive is very slow) -git -C pico-ice-sdk submodule update --init -git -C pico-sdk submodule update --init lib/tinyusb - -# you can now build it as a CMake project -mkdir build && cd build -cmake .. && make -``` - -You can now edit the name of the project in the CMakeLists.txt, add new sources, and change the code. - - -## Troubleshooting - -Feel free to join the [chat server](https://discord.gg/sb2kwc66) to ask for help. - - -### Using some RP2040 peripheral cause various bugs. - -In order to power the FPGA, some peripherals and GPIO pins are in use by the pico-ice-sdk. -In case both the firmware and SDK use the same peripheral, it is possible to use another free peripheral instance, or if none left, disable the feature of the SDK -The `ice_init()` is responsible for setting-up all peripherals used by the SDK. -Instead, calling manually each `ice_init_()` of interest permits to select what to enable or not in the board, and therefore keeping some more peripherals for the user. - - -### Error: C++ compiler not installed on this system - -The pico-sdk is written in C, but uses a single C++ file to enable C++ support in the SDK. -This means you need a working C++ cross compiler, often named `arm-none-eabi-g++`. - -Even if this binary is present in your system, it might not be a full C++ installation. -If you do not need C++ and want to work around this bug, you can disable the C++ support -in the pico-sdk. From your project repo: - -```shell -$ cd build -$ cmake .. # download the SDK if not yet done -$ sed -i '/new_delete.cpp/ d' _deps/pico-sdk-src/src/rp2_common/pico_standard_link/CMakeLists.txt -$ cmake .. # rebuild the Makefile with the fix -``` diff --git a/doc/images/favicon.ico b/doc/images/favicon.ico deleted file mode 100644 index c52afc83..00000000 Binary files a/doc/images/favicon.ico and /dev/null differ diff --git a/doc/images/favicon.png b/doc/images/favicon.png deleted file mode 100644 index 1fea199d..00000000 Binary files a/doc/images/favicon.png and /dev/null differ diff --git a/doc/images/pico_ice.drawio b/doc/images/pico_ice.drawio deleted file mode 100644 index 63d329d3..00000000 --- a/doc/images/pico_ice.drawio +++ /dev/null @@ -1 +0,0 @@ -7Vxbe5pKFP01PuoHDBd9jJq0PU0aTzxNm770IzIqLTIGxqj59WeQQS4zoig4mNaHBDYwwtprX2bvwQbozVYfPHM+vUMWdBqKZK0aoN9QFFkyVPIvkKxDSUfTQsHEs61QJMWCof0GoyupdGFb0KeyUIQRcrA9TwtHyHXhCKdkpuehZfq0MXKslGBuTiAjGI5Mh5V+sy08DaVtTYrlH6E9mUbfLEv0yMyMTqYCf2paaJkQgesG6HkI4XBrtupBJwAvwsW4f7r7uTB+LB+H6KXzCXl9PG6Gg90UuWT7CB50cblDg3DoV9NZULxACzwSyW3/nj41XkdQemjhWjAYTm6A7nJqYzicm6Pg6JKQh8imeObQwwfeM322V+hhuEpojD7DB4hmEHtrcgo92qHaoHTUIu0sY+UaVDRN6FWnMpPSabIdOIaMbFDUCiCoMzBBixCQ7iIPT9EEuaZzHUu7MZAS2YvPuUVoTuH7BTFeU2syFxilwSWYeuvv9PrNzlOw01K0aL+/Sh7tr+mej00PXwVmRQQjx/R9exSJb2xnO/7Kxt8T28nRyW48eLATjV1M4z5aeCOYcx71O+TOJjBvPOqOAtRz+eNBx8T2a9ot8OiwuZRgZK4TJ8yR7WKfYct2/OMJJMtCGEQ1LLW0hI7lXAXHrGtpKd6VQzpB/IkCVXkEOsmfyArjkoeDT1yK3JrPJFin1Go69sQNUCYYQo8IAsdqk2h4RQ/MbMsKGQR9+8183owXKIkSnAyudRtav4A+drnwbUyn35IKmzzX3pRaqg70lH+naBQz3tlqEDxNPHLbSA0K0tej8dgnFDnNttHPfmf279vy6dG++ueL7rhvmh75poQuew4a/RZp8GmXnu/Rd4WZQlHGRS7MWPt7ihaHGjuXHzrDjwcYUbEW/DCOI4jxlyHFGfK5p9++rl6H4IfiwebH1//uJ2pTEsmFhP6Pzw7kEqgAXStzBpGclSrW/a/Z/OllqT8/DY0m6Kvfvk2acufMuSc/umXnRKquJnnHnA/03PPJRngHpaa5KuvqBoqkkjvRHYJx99kjW5Ng684eeYikDthDjkOSmFpOQxUpjaHSZuehssKZiMplzES5wQT8nUdUMY/QWGfAhV+p1TSCzTzt3rUqfR1on1mLuxl8uKqnmalCzYz7DG0G2ZddE7SzVYEShZ/CIfdshmQcmICptTIkg1G3ekeQkb7cP5C/NwS8aT1NR+5oKdMRXint1NFwLsBuogJVaTMXShCpBSRAje3E+ooK0lxT1QyJwnunV/FS01JrMbkwXp4lg7r1PGRVrNWmiw1lNT3KNltwkfFOZluC/YUZXDa4u+/X00Ay9rHdF2YfbPYdYNisPZBapjIAgGgkhbRXBTmMajqZTLDeho9IyVnt7QjWZTVFxASPk+oUlxFwDp1gCatw5952suE5JZhYRFZ7hwmUdOK7LQuewWFyjUvMYoJS2kBVGAoXo0PnU8ISM26zQVHEqvaEWu3ZuzonqV1YITfvrhPe8euw26unN8zk4cAQ7AwVBrv2ZsY/HD5c3dUTQtUQV7Xjup3O5WVr5Xuq4z0RF9PaV8L53W7WFTHcmBDVz0+0jcLrxrKzVlVSGJvROTajBEypCCt5P1ZkGHvuw/2+xvTn4cr4sb0KrKo7Ri7uIQd5m4HAzeYTyAljefKJZ1o2jK+hLPcQJrRB7k6S59Pg8E5EWj2yFsGe0I/Gqqcy3bBh4c/VjarVSzds9ZHVDZM2JvQRwE/DinwEcHtdbRIWjkuJZCeWaNLLVeVMbA/jS04zJfKL+cOUV+bhQ8qu+PkTVQmOVB6QhCqPrWCfpjwfe+g3TDhAafPJKR7sqx0UpMP+xXxyPXgTKbx9HG8yuVA0BzoXb9gVzZXx5ogF7QU5szeRj1IJ0ZzhJ1pKORTKMrFqCrVZxpyxziU3Tihhnmf6WP9Cf+5tJ3zDYOFPnxcYkzw3q3OSv+JsVy7pCijUybSaig5/B4qX26eZlMnmt86nmEaPb8CqisJJyHmTWdkoYzLLfQeB48JrXwI6YUHk2avVue8W1O791x3pav47BZwVY9W+g5CLaTUz/6p8AtDk1o7ldclV0AbPJ1TkyhW2vEUm7lLoKRXp9rr/15+HqGT6w3x/zivol+PP8xpcCeXJLeWSfvRB1Vn+n7UpohxQphJSCs+WDbZTgj3ZA2hXhNTxPYN84I9HSmBToMroI7TufOktAdYj/rGaqVlDQFA/oF415PfQDhDUDaiXIi+zGfBuegEHtwLqQZqL7gS8i0bAoX0ApR6EeU9tALZY3A1+aTHLoUsrKxSb1bAM2q4zr7IsTHbjn7UMFRr/OCi4/h8= \ No newline at end of file diff --git a/doc/images/pico_ice_back.jpg b/doc/images/pico_ice_back.jpg deleted file mode 100644 index db2105d4..00000000 Binary files a/doc/images/pico_ice_back.jpg and /dev/null differ diff --git a/doc/images/pico_ice_blocks.png b/doc/images/pico_ice_blocks.png deleted file mode 100644 index 9c213fe4..00000000 Binary files a/doc/images/pico_ice_blocks.png and /dev/null differ diff --git a/doc/images/pico_ice_front.jpg b/doc/images/pico_ice_front.jpg deleted file mode 100644 index 3867d2ec..00000000 Binary files a/doc/images/pico_ice_front.jpg and /dev/null differ diff --git a/doc/images/pico_ice_pmod_install.jpg b/doc/images/pico_ice_pmod_install.jpg deleted file mode 100644 index 37516cf8..00000000 Binary files a/doc/images/pico_ice_pmod_install.jpg and /dev/null differ diff --git a/doc/images/pico_ice_reset_button.jpg b/doc/images/pico_ice_reset_button.jpg deleted file mode 100644 index f432fb0b..00000000 Binary files a/doc/images/pico_ice_reset_button.jpg and /dev/null differ diff --git a/doc/index.md b/doc/index.md deleted file mode 100644 index 60eab69f..00000000 --- a/doc/index.md +++ /dev/null @@ -1,39 +0,0 @@ -[Doc](http://pico-ice.tinyvision.ai/) -| [Hardware](https://github.com/tinyvision-ai-inc/pico-ice) -| [Software](https://github.com/tinyvision-ai-inc/pico-ice-sdk) -| [Schematic](https://raw.githubusercontent.com/tinyvision-ai-inc/pico-ice/main/Board/Rev3/pico-ice.pdf) -| [Assembly](https://htmlpreview.github.io/?https://github.com/tinyvision-ai-inc/pico-ice/blob/main/Board/Rev3/bom/ibom.html) -| [Discord](https://discord.gg/t2CzbAYeD2) - -[![Elecrow](https://media-cdn.elecrow.com/media/webp_image/logo/stores/1/ELECROW_LOGO.webp)](https://www.elecrow.com/pico-ice-rp2040-plus-lattice-ice40up5k-fpga.html) -[![LectronZ](https://lectronz.com/static/badges/buy-it-on-lectronz-medium.png)](https://lectronz.com/stores/tinyvision-ai-store) -[![Tindie](https://d2ss6ovg47m0r5.cloudfront.net/badges/tindie-smalls.png)](https://www.tindie.com/stores/tinyvision_ai/?ref=offsite_badges&utm_source=sellers_vr2045&utm_medium=badges&utm_campaign=badge_small%22%3E) - -The pico-ice is a small, low cost board with the Raspberry Pi Pico processor ([RP2040](https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html)) and a Lattice Semiconductor [iCE40UP5K](https://www.latticesemi.com/en/Products/FPGAandCPLD/iCE40UltraPlus) FPGA. The board features independent flash for the FPGA and RP2040, low power SSRAM, a couple of pushbuttons and a 3 color LED with _all_ FPGA and RP2040 pins brought out to easy to use 0.1" header pins (arranged as Pmod's) for fast prototyping. - -![](images/pico_ice_front.jpg) -![](images/pico_ice_back.jpg) - -Board Hardware Features: - -* Raspberry Pi RP2040 processor -* Lattice UltraPlus ICE40UP5K FPGA with 5.3k LUTs, 1Mb SPRAM, 120Kb DPRAM, 8 Multipliers -* _ALL_ RP2040 and 32 FPGA GPIO on 0.1” headers -* 4MB SPI Flash -* 8MB low power qSPI SRAM -* RGB LED, shared between the RP2040 and FPGA -* 2 pushbuttons, 1 dedicated and 1 primarily for processor reset during development but can be repurposed for user applications when not used for reset -* On board 3.3V and 1.2V Regulators, can supply 3.3V to your project -* Open source schematic and layout using KiCAD design tools -* 4 layer board with a solid ground plane for good signal integrity - -Board Firmware features: - -* FPGA clock supplied by the RP2040, easy to program FPGA clock under SW control -* RP2040 can program the FPGA in various ways -* Examples for communicating to the FPGA from USB to UART or SPI -* Support for ultra low power sleeep mode: can shut down the RP2040 and FPGA while keeping the SRAM powered - -![](images/pico_ice_blocks.png) - -[OSHW US002140](https://certification.oshwa.org/us002140.html) | Certified open source hardware | oshwa.org/cert diff --git a/doc/learn.md b/doc/learn.md deleted file mode 100644 index a8b0796d..00000000 --- a/doc/learn.md +++ /dev/null @@ -1,301 +0,0 @@ -# Learning FPGA Design - -A large number of resources exists for learning FPGA design. - -Some of them have been collected and aggregated on this page. - -An online class was held by tinyVision.ai, and is available freely: - -- [Hands-on-FPGA-class](https://github.com/tinyvision-ai-inc/Hands-on-FPGA-class/) - -## Video format - -- [Digi-Key Intro to FPGA](https://www.youtube.com/watch?v=lLg1AgA2Xoo) - Starts with defining FPGA and covers HDLs, programming flow etc. - New to FPGAs? Start here! - -- [SystemVerilog in 5 minutes](https://www.bilibili.com/video/BV1Rr4y1z7Dv?p=1) - Serie of concise and focused descriptions of the SystemVerilog language. - -- [VLSI Chaps](https://youtube.com/channel/UCzvXC7WbnaWs5FZ5djO8cag) - Discussion and explanation of ASICs, VLISI, but also SystemVerilog. - -- [Digital to FPGA 101](https://youtu.be/FcFbFTbngrw) - design a circuit in digital convert into verilog and run it on an ice40 FPGA (like Upduino_v3.1). - -## Examples - -- [icebreaker-verilog-examples](https://github.com/icebreaker-fpga/icebreaker-verilog-examples) - A collection of examples using Makefiles for iCE40 boards. - Can be used for the `pico-ice` with minor adaptations. - -- [Xark's upduino-example](https://github.com/XarkLabs/upduino-example/tree/master) - An example for how to use a Makefile for building a Verilog. - Can be used for the `pico-ice` with minor adaptations. - -- [tnt's ice40-playground](https://github.com/smunaut/ice40-playground/) - S. Munaut's examples for the iCE40. - -- [Librecores](https://www.librecores.org/) - Index of open source cores (Verilog, VHDL...) projects. Good Verilog examples. - -- [Upduino v2 icestorm examples](https://github.com/osresearch/up5k) - large collection of very useful code, and a good overview. Upduino v2 only. - -## General tutorials - -- [Hobbyist's guide to FPGAs](https://hackaday.io/project/27550-the-hobbyists-guide-to-fpgas) - FPGA tutorials, theory of design articles, hands-on labs targeted towards hobbyists. - -- [VHDL Wiz](https://vhdlwhiz.com/) - Community offering tutoring focused on VHDL. - -- [Hardware as Code](https://www.hackster.io/sthibault/hardware-as-code-part-i-an-introduction-48bacb) - A 5-part tutorial series using the UPduino as an example. - -- [fpga 101 fpgas for beginners](https://www.nandland.com/articles/fpga-101-fpgas-for-beginners.html) - Tutorial explaining concepts and practice with videos and articles. - -- [Alchitry](https://alchitry.com/) - Tutorial focused on the Artix 7 Alchitry boards. - -- [Fomu Workshop](https://workshop.fomu.im/en/latest/) - Workshop by FOMU the ICE40 FPGA that fits on an USB port. - -- [Open FPGA Verilog Tutorial](https://github.com/Obijuan/open-fpga-verilog-tutorial/wiki) - Excellent tutorial series for beginners and the more experienced. - -- [Atadiat](https://atadiat.com/en/) - Introduction about FPGA in both English and Arabic languages. - -- [Verilog Tutorial for beginners](http://www.referencedesigner.com/tutorials/verilog/verilog_01.php) - Verilog Tutorial Series. - -- [CircuitVerse](https://learn.circuitverse.org/) - Teaching verilog through an interactive book with challenges along the way. - -- [ASIC-World Tutorial on Verilog](https://www.asic-world.com/verilog/veritut.html) - Introduction to Verilog oriented toward ASICs and chip design. - -- [FPGA-4-fun](https://www.fpga4fun.com/) - Tutorials covering many practical problems with FPGAs. - Lots of info and very well put together - -- [Lattice IceCube2 Tutorial](https://hsel.co.uk/2018/05/21/lattice-ice40-ultra-plus-fpga-gnarly-grey-upduino-tutorial-1-the-basics/) - A tutorial on Lattice's IceCube2 software/ide. - IceCube2 is no longer recommended, replaced by Radiant - -- [VLSI Chaps](https://youtube.com/channel/UCzvXC7WbnaWs5FZ5djO8cag) - Discussion and explanation of ASICs, VLISI, but also SystemVerilog. - -- [Digital to FPGA 101](https://youtu.be/FcFbFTbngrw) - design a circuit in digital convert into verilog and run it on an ice40 FPGA (like Upduino_v3.1). - -- [Verilog Tutorial](http://www.asic-world.com/verilog/veritut.html) - Tutorial series on verilog with example code. - all examples are synthesizable in icarus verilog simulator - -- [CFU Playground](https://cfu-playground.readthedocs.io/en/latest/) - The "Crash Course on Everything" is a good introduction - -- [VHDL in an hour](https://www.jopdesign.com/teaching/VHDL.pdf) - Fast paced but practical guide to VHDL. - longest hour ever - -- [First look at Prog. Logic](https://www.allaboutcircuits.com/technical-articles/a-microcontroller-enthusiast-first-look-at-programmable-logic/) - Getting started w/FPGAs article series 1. - -- [Sparkfun So you want to learn FPGAs](https://www.sparkfun.com/news/1203) - Sparkfun article introducing to FPGAs. - -- [ZIPCPU](http://zipcpu.com/) - Articles by Gisselquist explaining design,verification, and more. - -- [FPGA Workshop](https://github.com/ranzbak/fpga-workshop) - Basic FPGA development for absolute beginners featuring the Upduino V2. - -- [Upduino FPGA Tutorial](https://blog.idorobots.org/entries/upduino-fpga-tutorial.html) - UPduino FPGA tutorial using APIO. - -- [Installing the Icestorm Toolchain](https://www.youtube.com/watch?v=Bfhnu9XUzLs) - Guide on getting comfortable with a Makefile-based development process for Icestorm/Yosys and Verilog. - -- [Explanation of essential Verilog concepts](https://vanhunteradams.com/DE1/Lorenz/Verilog.html) - Several pitfalls and myths debunked about the Verilog language, as part of an introduction. - -## Specific topic - -- [clock domain crossing](http://fpgacpu.ca/fpga/handshake.html) - Sending data across modules of two different clock domain: clock domain crossing. - -- [lowRISC Verilog Coding Style](https://github.com/lowRISC/style-guides/blob/master/VerilogCodingStyle.md) - Set of rules for formatting and organizing Verilog code. - Not difficult per-se, but problem encountered after initial discovery of Verilog is over - -- [Interfacing FPGAs to an ADC’s Digital Data Output](https://www.analog.com/en/technical-articles/interfacing-fpgas-to-an-adcs-digital-data-output.html) - Article from Analog Design exploring the topic of ADC/DAC <-> FPGA interface. - -- [RISC-V on an ICE40 FPGA](https://pingu98.wordpress.com/2019/04/08/) - A very detailed blog on implementing a RISC-V in the FPGA. - -- [RISC-V on an iCE40 FPGA](https://github.com/BrunoLevy/learn-fpga) - by the author of the relatively high-performance yet tiny RISC-V core FemtoRV. - -## Wiki - -- [VHDL Wiz Terminology](https://vhdlwhiz.com/terminology/) - Glossary of many concepts. - -- [VHDL Wiz Terminology](https://vhdlwhiz.com/terminology/) - Glossary of many concepts. - -- [Hamsterworks wiki](https://web.archive.org/web/20190115080828/http://hamsterworks.co.nz/mediawiki/index.php/Main_Page) - Introduction to FPGAs focused on VHDL. - The site is offline, but an archive of the content is still available. - -- [VerilogGuide](https://verilogguide.readthedocs.io/) - Wiki/Book for learning Verilog from the ground up. - Uses Quartus and ModelSim-Altera Starter instead of the open source toolchain - -- [Chipress](https://chipress.online/) - Collection of explanations targetted at aspiring ASICs engineers. - Many of the topics are related - -- [ChipVerify](https://www.chipverify.com/) - Wiki covering much of Verilog and SystemVerilog syntax. - -- [FPGA key](https://www.fpgakey.com/) - Community focused on providing resources to learn FPGAs. - -## Simulators - -- [EDA playground](https://www.edaplayground.com/home) - Online IDE and simulator, quickest way to get started without a dev board. - -- [Verilator](https://www.veripool.org/verilator/) - Simulator for Verilog code. - Convert the simulation to a C++ code library that exposes signals as C variables. - -- [Icarus Verilog](http://iverilog.icarus.com/) - Simulator for Verilog code. - -- [Digital](https://github.com/hneemann/Digital/releases) - digital logic circuit simulator based on logisim. - Alternative: https://github.com/logisim-evolution/logisim-evolution - -- [HDL Bits](https://hdlbits.01xz.net/wiki/Main_Page) - Interactive (in browser) verilog syntax lessons. - initially assumes no prior knowledge of HDLs but quickly ramps up difficulty - -## Toolchains - -- [oss-tabby-cad](https://github.com/YosysHQ/oss-cad-suite-build) - A complete toolchain based on top of Yosys. - -- [Yosys](https://yosyshq.net/yosys/) - The central tool connecting the languages front-end and back-ends. - -- [GHDL](https://ghdl.github.io/ghdl/) - Simulator for VHDL code. - -- [MixedSim](https://www.isotel.eu/mixedsim/) - Tool building on top of ngspice for simulating circuits. - -- [verilog to routing](https://verilogtorouting.org/) - Open-Source toolchain alternative to YoSys. - -- [open FPGA](https://github.com/azonenberg/openfpga) - Older toolchain for CPLD. - -- [FASM](https://fasm.readthedocs.io/en/latest/) - Low-level format aiming to be a de-facto industry standard for FPGA toolchains. - -## Courses - -- [Hands-on FPGA class](https://github.com/tinyvision-ai-inc/Hands-on-FPGA-class/) - A 8-week class was given by tinyVision.ai for getting started with FPGAs. - -- [Intel FPGA Academy](https://fpgacademy.org/courses.html) - Digital logic/FPGA courses by Intel. - requires .edu email (contact intel for access without .edu email but response may vary) - -- [fpga4fun FPGAs 1 - What are they?](https://www.fpga4fun.com/FPGAinfo1.html) - Intro to FPGA lesson 1. - Link is forr lesson 1 of intro to FPGA but the entire site is dedicated to learning FPGAs - -- [WTFpga Workshop](https://github.com/icebreaker-fpga/wtfpga) - Guided discovery of FPGA through the IceBreaker board. - -- [IceBreaker Workshop](https://github.com/icebreaker-fpga/icebreaker-workshop) - Course focused on getting started through the IceBreaker board. - -- [Intro to Digital Logic Circuits](http://www.ece.tufts.edu/es/4/) - University course by Steven Bell that assumes little/no prior knowledge of FPGAs. - Features the Upduino v3 and "Digital Design and Computer Architecture arm edition" - -- [Digital System Design (DSD) Spring 2009](http://www.ee.ic.ac.uk/pcheung/teaching/ee3_DSD/) - Course introducing FPGAs to students. - -- [MIT 6.205 Course](https://fpga.mit.edu/6205/F22) - Requires log-in to access the whole content, but good introductory text. - -## Other lists - -- [F4PGA Link list](https://github.com/f4pga/ideas/issues/52) - Another project aiming to collect links. - -- [FPGA Design Elements](http://fpgacpu.ca/fpga/index.html) - coding style and notes about various building blocks/design principles. - Fantastic list of resources/code examples etc - -- [HDL Simulators](https://en.wikipedia.org/wiki/List_of_HDL_simulators) - Wikipedia list of simulators for HDLs. - -- [sv-tests results](https://chipsalliance.github.io/sv-tests-results/) - Table summarizing support for all SystemVerilog (and Verilog) features support in various tool.. - Useful to check compatibility of a toolchain - -## Books - -- [PLD World E-books](http://ebook.pldworld.com/_eBook/FPGA%EF%BC%8FHDL/-Eng-/) - ebooks about all things HDL/FPGA/PLD etc. - -- [Digital systems design using VHDL](https://www.pdfdrive.com/digital-systems-design-using-vhdl-d166870425.html) - VHDL/digital design textbook by Charles H. Roth Jr & Lizy K. John. - -- [FPGAs now what?](https://xess.com/static/media/appnotes/FpgasNowWhatBook.pdf) - FPGA e-book that employs a hands on/learn by doing approach. - -- [SystemVerilog RTL Modeling, Simulation, Verification](https://systemverilog.dev/) - Online book on SystemVerilog using Cadence tools or EDA Playground. - Work in progress - -- [Digital Logic Pocket Data Book](https://www.ti.com/lit/ug/scyd013b/scyd013b.pdf) - pinout/reference for TI Logic ICs (74xx series etc). - Not exactly FPGA related, but useful for configuring the FPGA like common logic ICs - -## Organizations - -- [Build an FPGA from 7400 series ICs](http://blog.notdot.net/2012/10/Build-your-own-FPGA) - DIY FPGA competition submission and source. - https://github.com/arachnid/dfpga - -- [Libre-SOC](https://libre-soc.org/) - Open source high performance CPU/GPU/VPU on a chip. - Focused on high performance open-sourced OpenPOWER architecture - -- [F4PGA](https://f4pga.org/) - Umbrella project based on Yosys for synthesis of code toward an HDL.. - Good place to first learn about toolchains, but some dead links - -## Research papers - -- [Sunburst design whitepapers](http://www.sunburst-design.com/papers/) - reference papers on coding standard etc.. - Range of difficulties - -## Games - -- [NandGame](https://nandgame.com/) - Browser based puzzle game about logic gates. - serves as litmus test to determine familiarity with digital logic. Good for visual learners diff --git a/doc/pinout.md b/doc/pinout.md deleted file mode 100644 index 1b64c775..00000000 --- a/doc/pinout.md +++ /dev/null @@ -1,26 +0,0 @@ -# Pinout Diagram - -![pinout diagram](pinout.svg) - -[SVG](pinout.svg) -| [PNG](pinout.png) -| [RP2040](https://www.raspberrypi.com/documentation/pico-sdk/hardware.html#autotoc_md0) -| [ICE40](https://www.latticesemi.com/view_document?document_id=51971) - - -## With RTL on the iCE40 - -The wafer names `IOB_6a`, `IOT_8b`... as well as the pin number `ICE_2`, `ICE_3`, `ICE_4`... -can be used from the RTL by picking them from this [PCF file](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/rtl/pico_ice.pcf). - -For Amaranth, until this gets upstreamed, the various board resources including its pins are defined on -[`pico_ice.py`](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/amaranth/pico_ice.py). - - -## With code on the RP2040 - -The FPGA pins and other signals are defined in [`pico_ice.h`](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/include/boards/pico_ice.h). - -The PMOD pins can also be accessed from -[`pmod.h`](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/include/pmod.h) and -[`ice_pmod.h`](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/include/ice_pmod.h). diff --git a/doc/pinout/Makefile b/doc/pinout/Makefile deleted file mode 100644 index c1d70d36..00000000 --- a/doc/pinout/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -all: - rm -f pinout.svg pinout.png - python3 -m pinout.manager --export pinout_diagram.py pinout.svg - chromium --headless --screenshot --window-size=1112,1010 pinout.svg - mv screenshot.png pinout.png diff --git a/doc/pinout/data.py b/doc/pinout/data.py deleted file mode 100644 index 109183ec..00000000 --- a/doc/pinout/data.py +++ /dev/null @@ -1,209 +0,0 @@ -legend = [ - ("RP2040 pin", "pin_rpi"), - ("~R ~G ~B: LED", "pin_rpi"), - ("~0 ~1 ~2 ~3: ADC", "pin_rpi"), - ("CK0 CK2 CK3: clock", "pin_rpi"), - ("iCE40 pin", "pin_ice"), - ("SS SCK SI SO: SPI", "pin_ice"), - ("FIO2 FIO3: QSPI", "pin_ice"), - ("PB: Push Button", "pin_ice"), - ("Pmod 1: ICE Pmod", "pmod"), - ("Pmod 2: ICE Pmod", "pmod"), - ("Pmod 3: RP-ICE Pmod", "pmod"), - ("Pmod 4: RP Pmod", "pmod"), - ("Ground pin", "gnd"), - ("Power pin", "pwr"), -] - -def double(label, type, x): - return (label, type, {"body": {"width": 166, "x": x}}) - -def row_2_2(name1, type1, name2, type2): - return [ - (name1, type1, {"body": {"width": 166, "x": 6}}), - (name2, type2, {"body": {"width": 166, "x": 20}}), - ] - -def row_2_2_pmod(pmod, name1, type1, name2, type2): - return [ - (name1, type1, {"body": {"width": 166, "x": 6}}), - (name2, type2, {"body": {"width": 166, "x": 20}}), - (pmod, "pmod", {"body": {"width": 20, "x": 0}}), - ] - -def row_1_1_1_1(name1, type1, name2, type2, name3, type3, name4, type4): - return [ - (name1, type1), - (name2, type2), - (name3, type3, {"body": {"x": 20}}), - (name4, type4), - ] - -def row_1_1_1_1_pmod(pmod, name1, type1, name2, type2, name3, type3, name4, type4): - return [ - (name1, type1), - (name2, type2), - (name3, type3, {"body": {"x": 20}}), - (name4, type4), - (pmod, "pmod", {"body": {"width": 20, "x": 0}}), - ] - -def row_2_1_1(name1, type1, name2, type2, name3, type3): - return [ - (name1, type1, {"body": {"width": 166, "x": 6}}), - (name2, type2, {"body": {"x": 20}}), - (name3, type3), - ] - -def row_1_1_2(name1, type1, name2, type2, name3, type3, name4, type4): - return [ - (name1, type1, {"body": {"x": 6}}), - (name2, type2, {"body": {"x": 6}}), - (name3, type3, {"body": {"width": 166, "x": 20}}), - ] - -# The pins will appear swapped left/right -left_header = [ - row_2_2( - "INNER ROW","l", "OUTTER ROW","l", - ), - row_1_1_1_1( - "iCE40","l", "RP2040","l", "iCE40","l", "RP2040","l" - ), - row_1_1_1_1( - "CRESET","pin_ice", "RP27 ~1","pin_rpi", "ICE12 FIO2","pin_ice", "","pin_rpi" - ), - row_2_1_1( - "GND","gnd", "ICE13 FIO3","pin_ice", "","pin_rpi" - ), - row_2_2_pmod("2", - "3V3","pwr", "3V3","pwr" - ), - row_2_2( - "GND","gnd", "GND","gnd" - ), - row_1_1_1_1( - "ICE31","pin_ice", "","pin_rpi", "ICE28","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE34","pin_ice", "","pin_rpi", "ICE32","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE38","pin_ice", "","pin_rpi", "ICE36","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE43","pin_ice", "","pin_rpi", "ICE42","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE35","pin_ice", "RP24 CK2","pin_rpi", "ICE37 SS","pin_ice", "RP14","pin_rpi" - ), - row_1_1_1_1( - "ICE6","pin_ice", "","pin_rpi", "ICE11","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE9","pin_ice", "","pin_rpi", "ICE10 PB","pin_ice", "","pin_rpi" - ), - row_2_2_pmod("1", - "VIO2","pwr", "VIO2","pwr" - ), - row_2_2( - "GND","gnd", "GND","gnd" - ), - row_1_1_1_1( - "ICE45","pin_ice", "","pin_rpi", "ICE44","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE47","pin_ice", "","pin_rpi", "ICE46","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE2","pin_ice", "","pin_rpi", "ICE48","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "ICE4","pin_ice", "","pin_rpi", "ICE3","pin_ice", "","pin_rpi" - ), - row_1_1_1_1( - "","pin_ice", "RESET","pin_rpi", "","pin_ice", "SWDIO","pin_rpi" - ), - row_2_1_1( - "GND","gnd", "","pin_ice", "SWCLK","pin_rpi" - ), - row_1_1_1_1( - "","pin_ice", "USBBOOT","pin_rpi", "","pin_ice", "RP25 CK3","pin_rpi" - ), -] - -right_header = [ - row_2_2( - "INNER ROW","l", "OUTTER ROW","l" - ), - row_1_1_1_1( - "RP2040","l", "iCE40","l", "RP2040","l", "iCE40","l" - ), - row_1_1_1_1( - "RP9","pin_rpi", "ICE16 SS","pin_ice", "RP8","pin_rpi", "ICE14 SO","pin_ice" - ), - row_1_1_1_1( - "RP11","pin_rpi", "ICE17 SI","pin_ice", "RP10","pin_rpi", "ICE15 SCK","pin_ice" - ), - row_1_1_1_1_pmod("3", - "RP1","pin_rpi", "ICE25","pin_ice", "RP5","pin_rpi", "ICE23","pin_ice" - ), - row_1_1_1_1( - "RP3","pin_rpi", "ICE19","pin_ice", "RP7","pin_rpi", "ICE18","pin_ice" - ), - row_1_1_1_1( - "RP0","pin_rpi", "ICE27","pin_ice", "RP4","pin_rpi", "ICE26","pin_ice" - ), - row_1_1_1_1( - "RP2","pin_rpi", "ICE21","pin_ice", "RP6","pin_rpi", "ICE20","pin_ice" - ), - row_2_2( - "GND","gnd", "GND","gnd" - ), - row_2_2( - "3V3","pwr", "3V3","pwr" - ), - row_1_1_1_1( - "RP26 ~0","pin_rpi", "CDONE","pin_ice", "RP15 ~B","pin_rpi", "RGB1","pin_ice" - ), - row_1_1_1_1( - "RP28 ~2","pin_rpi", "","pin_ice", "RP13 ~R","pin_rpi", "RGB2","pin_ice" - ), - row_1_1_1_1( - "RP29 ~3","pin_rpi", "","pin_ice", "RP12 ~G","pin_rpi", "RGB0","pin_ice" - ), - row_1_1_1_1_pmod("4", - "RP17","pin_rpi", "","pin_ice", "RP21","pin_rpi", "","pin_ice" - ), - row_1_1_1_1( - "RP19","pin_rpi", "","pin_ice", "RP23 CK0","pin_rpi", "","pin_ice" - ), - row_1_1_1_1( - "RP16","pin_rpi", "","pin_ice", "RP20","pin_rpi", "","pin_ice" - ), - row_1_1_1_1( - "RP18","pin_rpi", "","pin_ice", "RP22","pin_rpi", "","pin_ice" - ), - row_2_2( - "GND","gnd", "GND","gnd" - ), - row_2_2( - "3V3","pwr", "3V3","pwr" - ), - row_2_2( - "3V3","pwr", "VCC","pwr" - ), - row_2_1_1( - "3V3_SBY","pin_rpi", "PWR_EN","pin_rpi", "","pin_ice" - ), - row_2_2( - "VBUS","pwr", "GND","gnd" - ), -] - -title = "pico-ice" - -description = """A small, low cost board featuring: -- a Raspberry Pi Pico processor (RP2040) -- a Lattice Semiconductor iCE40UP5K FPGA -pico-ice.tinyvision.ai""" diff --git a/doc/pinout/pico_ice_front.png b/doc/pinout/pico_ice_front.png deleted file mode 100644 index 801f3ee6..00000000 Binary files a/doc/pinout/pico_ice_front.png and /dev/null differ diff --git a/doc/pinout/pinout.png b/doc/pinout/pinout.png deleted file mode 100644 index 0b031139..00000000 Binary files a/doc/pinout/pinout.png and /dev/null differ diff --git a/doc/pinout/pinout.svg b/doc/pinout/pinout.svg deleted file mode 100644 index 631fa8b4..00000000 --- a/doc/pinout/pinout.svg +++ /dev/null @@ -1,9297 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - INNER ROW - - - - OUTTER ROW - - - - - - iCE40 - - - - RP2040 - - - - iCE40 - - - - RP2040 - - - - - - CRESET - - - - RP27 ~1 - - - - ICE12 FIO2 - - - - - - - - - - GND - - - - ICE13 FIO3 - - - - - - - - - - 3V3 - - - - 3V3 - - - - 2 - - - - - - GND - - - - GND - - - - - - ICE31 - - - - - - - - ICE28 - - - - - - - - - - ICE34 - - - - - - - - ICE32 - - - - - - - - - - ICE38 - - - - - - - - ICE36 - - - - - - - - - - ICE43 - - - - - - - - ICE42 - - - - - - - - - - ICE35 - - - - RP24 CK2 - - - - ICE37 SS - - - - RP14 - - - - - - ICE6 - - - - - - - - ICE11 - - - - - - - - - - ICE9 - - - - - - - - ICE10 PB - - - - - - - - - - VIO2 - - - - VIO2 - - - - 1 - - - - - - GND - - - - GND - - - - - - ICE45 - - - - - - - - ICE44 - - - - - - - - - - ICE47 - - - - - - - - ICE46 - - - - - - - - - - ICE2 - - - - - - - - ICE48 - - - - - - - - - - ICE4 - - - - - - - - ICE3 - - - - - - - - - - - - - - RESET - - - - - - - - SWDIO - - - - - - GND - - - - - - - - SWCLK - - - - - - - - - - USBBOOT - - - - - - - - RP25 CK3 - - - - - - - - INNER ROW - - - - OUTTER ROW - - - - - - RP2040 - - - - iCE40 - - - - RP2040 - - - - iCE40 - - - - - - RP9 - - - - ICE16 SS - - - - RP8 - - - - ICE14 SO - - - - - - RP11 - - - - ICE17 SI - - - - RP10 - - - - ICE15 SCK - - - - - - RP1 - - - - ICE25 - - - - RP5 - - - - ICE23 - - - - 3 - - - - - - RP3 - - - - ICE19 - - - - RP7 - - - - ICE18 - - - - - - RP0 - - - - ICE27 - - - - RP4 - - - - ICE26 - - - - - - RP2 - - - - ICE21 - - - - RP6 - - - - ICE20 - - - - - - GND - - - - GND - - - - - - 3V3 - - - - 3V3 - - - - - - RP26 ~0 - - - - CDONE - - - - RP15 ~B - - - - RGB1 - - - - - - RP28 ~2 - - - - - - - - RP13 ~R - - - - RGB2 - - - - - - RP29 ~3 - - - - - - - - RP12 ~G - - - - RGB0 - - - - - - RP17 - - - - - - - - RP21 - - - - - - - - 4 - - - - - - RP19 - - - - - - - - RP23 CK0 - - - - - - - - - - RP16 - - - - - - - - RP20 - - - - - - - - - - RP18 - - - - - - - - RP22 - - - - - - - - - - GND - - - - GND - - - - - - 3V3 - - - - 3V3 - - - - - - 3V3 - - - - VCC - - - - - - 3V3_SBY - - - - PWR_EN - - - - - - - - - - VBUS - - - - GND - - - - - - - - - pico-ice - - - - A small, low cost board featuring: - - - a Raspberry Pi Pico processor (RP2040) - - - a Lattice Semiconductor iCE40UP5K FPGA - - pico-ice.tinyvision.ai - - - - - - - RP2040 pin - - - - - - ~R ~G ~B: LED - - - - - - ~0 ~1 ~2 ~3: ADC - - - - - - CK0 CK2 CK3: clock - - - - - - iCE40 pin - - - - - - SS SCK SI SO: SPI - - - - - - FIO2 FIO3: QSPI - - - - - - PB: Push Button - - - - - - Pmod 1: ICE Pmod - - - - - - Pmod 2: ICE Pmod - - - - - - Pmod 3: RP-ICE Pmod - - - - - - Pmod 4: RP Pmod - - - - - - Ground pin - - - - - - Power pin - - - - - - - \ No newline at end of file diff --git a/doc/pinout/pinout_diagram.py b/doc/pinout/pinout_diagram.py deleted file mode 100644 index faaa2128..00000000 --- a/doc/pinout/pinout_diagram.py +++ /dev/null @@ -1,131 +0,0 @@ -from pinout.core import Group, Image -from pinout.components.layout import Diagram_2Rows -from pinout.components.pinlabel import PinLabelGroup, PinLabel -from pinout.components.text import TextBlock -from pinout.components import leaderline as lline -from pinout.components.legend import Legend - - -# Import data for the diagram -import data - -# Create a new diagram -# The Diagram_2Rows class provides 2 panels, -# 'panel_01' and 'panel_02', to insert components into. -diagram = Diagram_2Rows(1112, 1010, 880, "diagram") - -# Add a stylesheet -diagram.add_stylesheet("styles.css", embed=True) - -# Create a group to hold the pinout-diagram components. -graphic = diagram.panel_01.add(Group(400, 42)) - -# Add and embed an image -hardware = graphic.add(Image("pico_ice_front.png", x=-50, y=-70, embed=True)) - -# Measure and record key locations with the hardware Image instance -pin_pitch_v = 34.9 -pin_start_y = 63 -hardware.add_coord("left", 100, pin_start_y) -hardware.add_coord("right", 307, pin_start_y) -# Other (x,y) pairs can also be stored here -hardware.add_coord("pin_pitch_v", 0, pin_pitch_v) - -graphic.add( - PinLabel( - content="", - x=hardware.coord("right").x, - y=hardware.coord("right").y, - tag="pmod", - body={"x": 57, "y": 227, "width": 370, "height": 210}, - ) -) -graphic.add( - PinLabel( - content="", - x=hardware.coord("right").x, - y=hardware.coord("right").y, - tag="pmod", - body={"x": 57, "y": 541, "width": 370, "height": 210}, - ) -) -graphic.add( - PinLabel( - content="", - x=hardware.coord("left").x, - y=hardware.coord("left").y, - tag="pmod", - body={"x": -(370 + 57), "y": 227, "width": 370, "height": 210}, - ) -) -graphic.add( - PinLabel( - content="", - x=hardware.coord("left").x, - y=hardware.coord("left").y, - tag="pmod", - body={"x": -(370 + 57), "y": 541, "width": 370, "height": 210}, - ) -) - -# Create pinlabels on the left header -graphic.add( - PinLabelGroup( - x=hardware.coord("left").x, - y=hardware.coord("left").y, - pin_pitch=hardware.coord("pin_pitch_v", raw=True), - label_start=(60, 0), - label_pitch=(0, pin_pitch_v), - scale=(-1, 1), - labels=data.left_header, - ) -) - -# Create pinlabels on the left header -graphic.add( - PinLabelGroup( - x=hardware.coord("right").x, - y=hardware.coord("right").y, - pin_pitch=hardware.coord("pin_pitch_v", raw=True), - label_start=(60, 0), - label_pitch=(0, pin_pitch_v), - scale=(1, 1), - labels=data.right_header, - ) -) - - -# Create a title and description text-blocks -title_block = diagram.panel_02.add( - TextBlock( - data.title, - x=20, - y=30, - line_height=18, - tag="panel title_block", - ) -) -diagram.panel_02.add( - TextBlock( - data.description, - x=20, - y=60, - width=title_block.width, - height=diagram.panel_02.height - title_block.height, - line_height=18, - tag="panel text_block", - ) -) - -# Create a legend -legend = diagram.panel_02.add( - Legend( - data.legend, - x=340, - y=8, - max_height=132, - ) -) - -# Export the diagram via commandline: -# >>> py -m pinout.manager --export pinout_diagram.py diagram.svg diff --git a/doc/pinout/styles.css b/doc/pinout/styles.css deleted file mode 100644 index 705c5742..00000000 --- a/doc/pinout/styles.css +++ /dev/null @@ -1,90 +0,0 @@ -text { - font-family: Verdana, Georgia, sans-serif; - font-size: 14px; - font-weight: normal; -} - -.pinlabel__leader{ - stroke-width: 2; - fill: none; -} -.pinlabel__text{ - dominant-baseline: central; - fill: #fff; - font-weight: bold; - stroke-width: 0; - text-anchor: middle; -} - -.pmod .pinlabel__body{ - fill: hsl(0 0% 60%); -} -.pmod .swatch__body { - fill: hsl(0 0% 60%); -} - -.pin_rpi .pinlabel__body{ - fill: hsl(290 100% 25%); -} -.pin_rpi .pinlabel__leader{ - stroke: hsl(290 100% 25%); -} -.pin_rpi .swatch__body { - fill: hsl(290 100% 25%); -} - -.pin_ice .pinlabel__body{ - fill: hsl(320 100% 25%); -} -.pin_ice .pinlabel__leader{ - stroke: hsl(320 100% 25%); -} -.pin_ice .swatch__body { - fill: hsl(320 100% 25%); -} - -.pwr .pinlabel__body{ - fill: hsl(0 100% 25%); -} -.pwr .pinlabel__leader{ - stroke: hsl(0 100% 25%); -} -.pwr .swatch__body { - fill: hsl(0 100% 25%); -} - -.gnd .pinlabel__body{ - fill: hsl(0 0% 0%); -} -.gnd .pinlabel__leader{ - stroke: hsl(0 0% 0%); -} -.gnd .swatch__body { - fill: hsl(0 0% 0%); -} - -.panel__inner { - fill: #fff; -} -.panel__outer { - fill: #333; -} -.panel--info .panel__inner{ - fill: #f4f4f4; -} - -.legendentry text { - dominant-baseline: central; -} - -.h1 { - font-size: 26px; - font-weight: bold; - font-style: italic; -} -.italic{ - font-style: italic; -} -.strong{ - font-weight: bold; -} diff --git a/doc/pmods.md b/doc/pmods.md deleted file mode 100644 index 885288c1..00000000 --- a/doc/pmods.md +++ /dev/null @@ -1,90 +0,0 @@ -# Using Pmods - -The Pmod Connection system is using a grid of 2 rows and 6 columns of pins. - -It was designed by Digilent to offer something compatible with both classical jumper wires used on breadboards, -and a standardised pinout that supports multiple protocols on the same connector. - -This is popular on FPGA boards as it permits them to support any protocol over -the same connector with the right pinout, rarely possible on MCUs. - -This standard is documented [here](https://reference.digilentinc.com/_media/reference/pmod/pmodoledrgb/pmodoledrgb_sch.pdf). - -## Pmod in the pico-ice - -Here is an [example of how to solder](md_getting__started.html#autotoc_md2) the Pmod connectors. - -There are 4 Pmod connectors in the pico-ice, numbered clockwise from 1 to 4 starting from the USB connector. - -- 2 connected ot the iCE40 -- 1 connected to both the RP2040 and iCE40 -- 1 connected to the RP2040 - -The pinout of the RP2040 is made to be compatible with SPI0, -with the other protocols that may be bit-banged or implemented with PIO to be pin-compatible. - -For the iCE40, the pin numbers are available from -[pico_ice.pcf](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/rtl/pico_ice.pcf). - -For the RP2040, the pin numbers are available from -[ice_pmod.h](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/include/ice_pmod.h). - -You can then use any of the pinout declaration described -[here](https://github.com/tinyvision-ai-inc/pico-ice-sdk/blob/main/include/pmod.h). - -``` -// Use the pins from their GPIO names -gpio_init(ice_pmod_3.gpio.io1); -gpio_init(ice_pmod_3.gpio.io2); -gpio_init(ice_pmod_3.gpio.io3); -gpio_init(ice_pmod_3.gpio.io4); -gpio_init(ice_pmod_3.gpio.io7); -gpio_init(ice_pmod_3.gpio.io8); -gpio_init(ice_pmod_3.gpio.io9); -gpio_init(ice_pmod_3.gpio.io10); - -// Use the pins from their I²C names -gpio_init(ice_pmod_3.i2c.sda); -gpio_init(ice_pmod_3.i2c.scl); - -// Use the pins from their UART names -gpio_init(ice_pmod_3.i2c.tx); -gpio_init(ice_pmod_3.i2c.rx); - -// Use the pins from their SPI names -gpio_set_function(ice_pmod_3.spi.copi, FUNC_SPI); -gpio_set_function(ice_pmod_3.spi.cipo, FUNC_SPI); -gpio_set_function(ice_pmod_3.spi.clk, FUNC_SPI); - -// Access the top or bottom row individually -gpio_set_function(ice_pmod_3.row.top.spi.copi, FUNC_SPI); -gpio_set_function(ice_pmod_3.row.bottom.spi.copi, FUNC_SPI); - -[...] -``` - - -## Pmod Modules - -There are many Pmod vendors, and this page attempts to enumerate as many as possible. - -If you have made a Pmod module, let us know and we would add it to this list! - -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- diff --git a/doc/programming_the_fpga.md b/doc/programming_the_fpga.md deleted file mode 100644 index ec25ed49..00000000 --- a/doc/programming_the_fpga.md +++ /dev/null @@ -1,181 +0,0 @@ -# Programming the iCE40 FPGA - -The FPGA normally boots from a dedicated serial NOR flash. -This flash can be programmed by the Pico processor which exposes the flash to the host OS as either a removable drive or a DFU endpoint. - -On Windows, while the RaspberryPi guide mentions using Visual Studio Code with a plugin a an IDE, better results were obtained by using the [WSL2 environment](https://learn.microsoft.com/en-us/windows/wsl/install). - - -## Using a drag and drop file copy - -You would need a compiler toolchain installed for building the [UF2 Utils](https://github.com/tinyvision-ai-inc/uf2-utils) on your system. -On Windows, you can use instead, -which contains [uf2conv.py](https://github.com/microsoft/uf2/blob/master/utils/uf2conv.md). - -Out of the box, the [default firmware](https://github.com/tinyvision-ai-inc/pico-ice/releases/) should already be present on your board. -You can skip step 1 if this is the case. - -1. If you changed the default firwmare, [program](md_programming__the__mcu.html) it again onto the RP2040. - You can also integrate the FPGA programming code in your own firmware with [ice_usb](group__ice__usb.html). - -2. Install or build the [UF2 Utils](https://github.com/tinyvision-ai-inc/uf2-utils), - and a [blinky example](https://github.com/tinyvision-ai-inc/UPduino-v3.0/blob/master/RTL/blink_led/rgb_blink.bin) for any iCE40 board. - -3. Convert the binary bitstream `rgb_blink.bin` into an UF2 `rgb_blink.uf2` with the UF2 Utils: - - ```shell - $ bin2uf2 -o rgb_blink.uf2 rgb_blink.bin - ``` - -4. Connect the pico-ice via USB and lookup the USB drive named `pico-ice`. Open it. - -5. You can copy the `rgb_blink.uf2` file to that drive you just attached. - As soon as you copy the file over,t he pico-ice will reboot and allow the FPGA to come up depending on the code running in the Pico processor. - - -## Using the DFU mode - -1. If you changed the default firwmare, [program](md_programming__the__mcu.html) it again onto the RP2040. - You can also integrate the FPGA programming code in your own firmware with [ice_usb](group__ice__usb.html). - -2. Install the DFU utilities. - - a. For Windows, [yosys-hq tabby-cad](https://www.yosyshq.com/tabby-cad-datasheet): - double-clicking on `start.bat` on the OSS CAD Suite installation opens a prompt with the dfu-util command available. - - b. For other systems you can install the [dfu-util](https://repology.org/project/dfu-util/versions) package. - -3. Check whether the Pico is recognized as a DFU device: `dfu-util -l`. - This should list the pico-ice as a DFU device: - - ``` - Found DFU: [1209:b1c0] ver=0100, devnum=105, cfg=1, intf=0, path="1-4.4", alt=1, name="iCE40 DFU (flash)", serial="DE62A435436F5939" - Found DFU: [1209:b1c0] ver=0100, devnum=105, cfg=1, intf=0, path="1-4.4", alt=0, name="iCE40 DFU (CRAM)", serial="DE62A435436F5939" - ``` - -4. Download the FPGA bin file to the pico-ice. - The Pico can be rebooted as soon as the download succeeds with the `-R` flag. - - ``` - $ dfu-util -a 1 -D rgb_blink.bin - ``` - -## Using APIO - -The [APIO](https://github.com/FPGAwars/apio) project is a command line tool to fetch and use -the [oss-cad-suite](https://github.com/YosysHQ/oss-cad-suite-build) FPGA toolchain based -on [Yosys](https://github.com/YosysHQ/). - -It will bring an up-to-date build environment running quickly. - -On Windows, you will first need to setup the `libusbK` driver for `pico-ice DFU (CRAM)` -[with Zadig](https://zadig.akeo.ie/) or [with UsbDriverTool](https://visualgdb.com/UsbDriverTool/) -([doc](https://github.com/FPGAwars/apio/wiki/Quick-start)). - -``` -# Download the latest APIO dev version (with pico-ice support): -pip3 install git+https://github.com/FPGAwars/apio - -# Download and install oss-cad-suite -apio install -a - -# Build a new directory with a "blinky" example project inside -mkdir pico-ice-blinky; cd pico-ice-blinky -apio examples -f iCE40-UP5K/blink - -# Set the board to "pico-ice" -apio init --sayyes --board pico-ice - -# Build the project using yosys/nextpnr -apio build - -# Plug your pico-ice board and upload the blinky project to it -apio upload -``` - -If `apio upload` fails, it is also possible to convert the `.bin` file to `.uf2` -with [uf2-utils](https://github.com/tinyvision-ai-inc/uf2-utils/) -or [uf2conv.py](https://github.com/microsoft/uf2/blob/master/utils/uf2conv.md): -[doc](md_programming__the__fpga.html#autotoc_md28). - - -## Using OSS CAD Suite - -The [OSS CAD Suite](https://github.com/YosysHQ/oss-cad-suite-build) project is a pre-compiled package of several tools. -It provides a complete solution for building, debugging, simulating, uploading Hardware Description Language (HDL). -It is based on [Yosys](https://github.com/YosysHQ/). - -As explained on the [installation](https://github.com/YosysHQ/oss-cad-suite-build#installation) instructions, -you can download it and extract it to a directory of your choice. - -Several pico-ice-sdk [examples](https://github.com/tinyvision-ai-inc/pico-ice-sdk/tree/main/examples) rely on a -`$OSS_CAD_SUITE` variable set to the full path where you extracted these files. - -On Windows, you can run these examples from the cygwin environment, -under which you can navigate to the example repositories and try them. - -If you used `apio` to install OSS CAD Suite, -then you can use the APIO install directory as well: -`export OSS_CAD_SUITE="$HOME/.apio/packages/tools-oss-cad-suite/"`. - - -## F.A.Q. - -### Q: Why is specifying the OSS_CAD_SUITE directory needed? - -APIO installs OSS-CAD-Suite, but it is not possible to directly call the commands from the shell environment -so it is needed to provide the full path to the binaries to execute them. - -With OSS-CAD-Suite, there is a script to source in the current shell environment to avoid this, but if the user forgets, then nothing works. - - -## Troubleshooting - -### Checking the CDONE pin - -Once the FPGA bitfile transfers over using the DFU protocol, -the Pico will check for whether the DONE pin goes high indicating a successful boot. -This would make the CDONE green LED bright. - -If this doesnt happen for whatever reason, -the DFU utility will throw an error indicating that this did not succeed. - -### Booting the FPGA with custom firmware - -The user writing a custom firmware with the pico-ice-sdk should take care of starting the FPGA from the MCU. -Review the [pico_fpga](https://github.com/tinyvision-ai-inc/pico-ice-sdk/tree/main/examples/pico_fpga) example -for how this can be done, as well as the [ice_fpga](group__ice__fpga.html) library documentation. - -The USB DFU provided as part of the pico-ice-sdk must also be enabled for the DFU interface to show-up. -The [pico_usb_uart example](https://github.com/tinyvision-ai-inc/pico-ice-sdk/tree/main/examples/pico_usb_uart) project have it enabled by default. - -### Cannot open DFU device 1209:b1c0 found on devnum 61 (LIBUSB_ERROR_NOT_FOUND) - -This error might occur when a communication error occurs. - -- On Windows operating system, the device needs to be declared with [Zadig](https://zadig.akeo.ie/) as described [here](https://github.com/pbatard/libwdi/wiki/Zadig#basic-usage). - Make sure to select the pico-ice device on the list rather than any other to avoid erasing your system's USB drivers. - -- On Linux operating system, it might need to be allowed with an udev rule, - or `dfu-util` might need to be run as super user. - -### dfu-util is stuck while uploading before anything could be sent - -This could be due that there was no response from the flash chip, and the RP2040 is endlessy waiting the write confirmation. - -If you had an earlier board, it could be due to the fact the TX and RX pins were swapped, and do not work for the old board anymore. - -### Flashing an UF2 file does not change the memory neither restart the board - -The UF2 file format contains the destination addresses of each block. -In case you used other tools than those provided, -it is possible that that the addresses were outside the valid range of the flash chip. -Try to copy the CURRENT.UF2 to NEW.UF2 upon that same directory, and unmount the device. -This should trigger a restart of the device. -This restart device should appear from the debug UART: `board_dfu_complete: rebooting`. - -### Device's firmware is corrupt. It cannot return to run-time (non-DFU) operations. - -This message sometimes comes from `dfu-util` when the `-R` flag is not used. -With the `-R` flag, the pico-ice will reboot at the end of the transfer, -and DFU-util should not complain anymore. diff --git a/doc/programming_the_mcu.md b/doc/programming_the_mcu.md deleted file mode 100644 index 041e54b7..00000000 --- a/doc/programming_the_mcu.md +++ /dev/null @@ -1,31 +0,0 @@ -# Programming the RP2040 MCU - -To upload a new firmware image on the PR2040 (the "pico" part of "pico-ice"), you need to switch to that RP2040 UF2 bootloader mode instead of the FPGA UF2 mode. - -You can do that by connecting a jumper between the `BT` pin a `Gnd` pin, then press the `RESET` button: - -1. Connect the `USB_BOOT` pin to ground. For instance with a pair of tweezers, a jumper, or an uncoated paper clip. - -2. Press and release the "RESET" button. The RP2040 now bypasses its firmware, and runs the RP2040 factory bootloader (from internal ROM) instead. - -3. Disconnect the `USB_BOOT` pin from ground. - -4. Look for an USB drive named `RPI-RP2` and mount it, open it, and check that there are only 2 files in it: `INFO.HTML` and `INFO_UF2.TXT`. - If you also have an `CURRENT.UF2`, this means you found the FPGA flashing interface, and need to retry steps 1 and 2. - -5. Copy the `.uf2` firmware file onto the USB drive. - -6. Eject the USB drive. - At this step, the firmware should be uploaded and running. - -![photo of which pins to short](images/pico_ice_reset_button.jpg) - - -## Troubleshooting - - -### RPI-RP2 is still visible after step 6 - -This means the device remained in "bootloader" mode. -One thing to check is that the `USB_BOOT` pin (marked `BT` on the board) is not connected to anything anymore, -then try to reset the board.