diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index 941c30ecbea2..57819513073c 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -38,6 +38,7 @@ jobs:
docker_syncd_rpc_image: no
syncd_rpc_image: no
platform_rpc: no
+ ss_image: no
${{ if parameters.qemuOrCrossBuild }}:
SONIC_SLAVE_DOCKER_DRIVER: 'vfs'
CACHE_MODE: 'none'
@@ -81,7 +82,7 @@ jobs:
variables:
dbg_image: yes
- - name: innovium
+ - name: marvell-teralynx
variables:
dbg_image: yes
@@ -106,6 +107,7 @@ jobs:
- name: mellanox
variables:
dbg_image: yes
+ ss_image: yes
docker_syncd_rpc_image: yes
syncd_rpc_image: yes
platform_rpc: mlnx
@@ -162,6 +164,10 @@ jobs:
make $BUILD_OPTIONS INSTALL_DEBUG_TOOLS=y target/sonic-$(GROUP_NAME).bin
mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-dbg.bin
fi
+ if [ $(ss_image) == yes ]; then
+ make $BUILD_OPTIONS SMARTSWITCH=1 INCLUDE_DHCP_SERVER=y target/sonic-$(GROUP_NAME).bin
+ mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-smartswitch.bin
+ fi
if [ $(swi_image) == yes ]; then
make $BUILD_OPTIONS ENABLE_IMAGE_SIGNATURE=y target/sonic-aboot-$(GROUP_NAME).swi
fi
@@ -182,6 +188,9 @@ jobs:
make $BUILD_OPTIONS ENABLE_SYNCD_RPC=y target/sonic-$(GROUP_NAME).bin
mv target/sonic-mellanox.bin target/sonic-$(GROUP_NAME)-rpc.bin
fi
+ if [ $(GROUP_NAME) == nvidia-bluefield ]; then
+ make $BUILD_OPTIONS target/sonic-$(GROUP_NAME).bfb
+ fi
make $BUILD_OPTIONS target/sonic-$(GROUP_NAME).bin
fi
displayName: "Build sonic image"
diff --git a/.azure-pipelines/template-variables.yml b/.azure-pipelines/template-variables.yml
index 934693196807..e8aa4f60c604 100644
--- a/.azure-pipelines/template-variables.yml
+++ b/.azure-pipelines/template-variables.yml
@@ -1,6 +1,6 @@
variables:
DEFAULT_CONTAINER_REGISTRY: 'publicmirror.azurecr.io'
- COMMON_LIB_BUILD_ENVS: 'bullseye'
+ COMMON_LIB_BUILD_ENVS: 'bookworm'
SONIC_SLAVE_DOCKER_DRIVER: 'overlay2'
SONIC_BUILD_RETRY_COUNT: 3
SONIC_BUILD_RETRY_INTERVAL: 600
diff --git a/.github/workflows/protect-file.yml b/.github/workflows/protect-file.yml
new file mode 100644
index 000000000000..bc7e0ae1de1a
--- /dev/null
+++ b/.github/workflows/protect-file.yml
@@ -0,0 +1,37 @@
+name: Protect certain files to avoid further changes
+
+on:
+ push:
+ branches:
+ - 'master'
+ - '202[2-9][0-9][0-9]'
+ pull_request:
+ branches:
+ - 'master'
+ - '202[2-9][0-9][0-9]'
+
+jobs:
+ check-file:
+ runs-on: ubuntu-latest
+ steps:
+ - name: Checkout repository
+ uses: actions/checkout@v3
+
+ - name: Fetch base branch
+ run: |
+ git fetch origin ${GITHUB_BASE_REF}
+
+ - name: Check protected files
+ run: |
+ echo "Starting file check step"
+ protected_files=('src/sonic-config-engine/minigraph.py' 'files/build_templates/init_cfg.json.j2')
+ base_branch=$(git rev-parse origin/${GITHUB_BASE_REF})
+
+ for protected_file in "${protected_files[@]}"; do
+ echo "Checking ${protected_file}"
+ if git diff --name-only $base_branch | grep -q "^${protected_file}\$"; then
+ echo "Error: You are trying to modify ${protected_file}, which is protected."
+ exit 1
+ fi
+ done
+ echo "No changes detected in protected files"
diff --git a/.gitmodules b/.gitmodules
index d559a7417b0e..f8d10f3af4ab 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -46,7 +46,7 @@
[submodule "src/sonic-frr/frr"]
path = src/sonic-frr/frr
url = https://github.com/sonic-net/sonic-frr.git
- branch = frr/8.5
+ branch = frr-10.0.1
[submodule "platform/p4/p4-hlir/p4-hlir-v1.1"]
path = platform/p4/p4-hlir/p4-hlir-v1.1
url = https://github.com/p4lang/p4-hlir.git
@@ -124,9 +124,12 @@
[submodule "platform/marvell/sonic-platform-marvell"]
path = platform/marvell/sonic-platform-marvell
url = https://github.com/Marvell-switching/sonic-platform-arm64.git
-[submodule "platform/innovium/sonic-platform-marvell"]
- path = platform/innovium/sonic-platform-marvell
- url = https://github.com/Marvell-switching/sonic-platform-marvell
+[submodule "src/sonic-stp"]
+ path = src/sonic-stp
+ url = https://github.com/sonic-net/sonic-stp
+[submodule "platform/marvell-teralynx/sonic-platform-marvell-teralynx"]
+ path = platform/marvell-teralynx/sonic-platform-marvell-teralynx
+ url = https://github.com/Marvell-switching/sonic-platform-marvell.git
[submodule "platform/vpp"]
path = platform/vpp
- url = https://github.com/sonic-net/sonic-platform-vpp.git
+ url = https://github.com/sonic-net/sonic-platform-vpp.git
\ No newline at end of file
diff --git a/Makefile.work b/Makefile.work
index 6079906a1005..fe14eebaedc7 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -61,6 +61,9 @@
# * SONIC_PTF_ENV_PY_VER: Python version for PTF image
# * Default: mixed
# * Values: mixed,py3
+# * ENABLE_MULTIDB: Enable multiple redis database instances.
+# * Default: unset
+# * Values: y
###############################################################################
SHELL = /bin/bash
@@ -532,10 +535,12 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \
SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD=$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) \
SONIC_INCLUDE_SYSTEM_TELEMETRY=$(INCLUDE_SYSTEM_TELEMETRY) \
SONIC_INCLUDE_SYSTEM_GNMI=$(INCLUDE_SYSTEM_GNMI) \
+ SONIC_INCLUDE_SYSTEM_BMP=$(INCLUDE_SYSTEM_BMP) \
SONIC_INCLUDE_SYSTEM_EVENTD=$(INCLUDE_SYSTEM_EVENTD) \
INCLUDE_DHCP_RELAY=$(INCLUDE_DHCP_RELAY) \
INCLUDE_DHCP_SERVER=$(INCLUDE_DHCP_SERVER) \
INCLUDE_MACSEC=$(INCLUDE_MACSEC) \
+ INCLUDE_ICCPD=$(INCLUDE_ICCPD) \
SONIC_INCLUDE_RESTAPI=$(INCLUDE_RESTAPI) \
SONIC_INCLUDE_MUX=$(INCLUDE_MUX) \
ENABLE_TRANSLIB_WRITE=$(ENABLE_TRANSLIB_WRITE) \
@@ -570,6 +575,7 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \
BUILD_PROCESS_TIMEOUT=$(BUILD_PROCESS_TIMEOUT) \
LEGACY_SONIC_MGMT_DOCKER=$(LEGACY_SONIC_MGMT_DOCKER) \
SONIC_PTF_ENV_PY_VER=$(SONIC_PTF_ENV_PY_VER) \
+ ENABLE_MULTIDB=$(ENABLE_MULTIDB) \
$(SONIC_OVERRIDE_BUILD_VARS)
.PHONY: sonic-slave-build sonic-slave-bash init reset
diff --git a/README.md b/README.md
index 2488f972df41..aebacea58ca4 100644
--- a/README.md
+++ b/README.md
@@ -3,7 +3,7 @@
[![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=master&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=master)
[![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=master&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=master)
[![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=master&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=master)
-[![Innovium](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.innovium?branchName=master&label=Innovium)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master)
+[![Marvell-Teralynx](https://dev.azure.com/mssonic/build/_apis/build/status/marvell-teralynx/Azure.sonic-buildimage.official.marvell-teralynx?branchName=master&label=Marvell-Teralynx)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master)
[![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=master&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=master)
[![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=master&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master)
[![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=master&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master)
@@ -215,7 +215,7 @@ The supported ASIC vendors are:
* PLATFORM=centec
* PLATFORM=nephos
* PLATFORM=nvidia-bluefield
-* PLATFORM=innovium
+* PLATFORM=marvell-teralynx
* PLATFORM=vs
## Usage for ARM Architecture
@@ -373,8 +373,8 @@ on the SAI version for each SONiC release.
and Mellanox switch ASIC (gzip tar archive)
* docker-syncd-nephos.gz: docker image for the daemon to sync database
and Nephos switch ASIC (gzip tar archive)
- * docker-syncd-invm.gz: docker image for the daemon to sync database
- and Innovium switch ASIC (gzip tar archive)
+ * docker-syncd-mrvl-teralynx.gz: docker image for the daemon to sync database
+ and Marvell-Teralynx switch ASIC (gzip tar archive)
* docker-sonic-p4.gz: docker image for all-in-one for p4 software switch
(gzip tar archive)
* docker-sonic-vs.gz: docker image for all-in-one for software virtual switch
diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index 3956a7c94448..4af6d03fea36 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -70,6 +70,8 @@ stages:
- name: broadcom
variables:
swi_image: yes
+ docker_syncd_rpc_image: yes
+ platform_rpc: brcm
INCLUDE_RESTAPI: y
- name: mellanox
variables:
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm
index ae51822fc619..027509541e29 100644
--- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm
@@ -19,6 +19,7 @@ bcm_device:
0:
global:
pktio_mode: 1
+ default_cpu_tx_queue: 7
vlan_flooding_l2mc_num_reserved: 0
ipv6_lpm_128b_enable: 1
shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm
index b1f524185899..a196ad2a2bc0 100644
--- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm
@@ -23,6 +23,7 @@ bcm_device:
0:
global:
pktio_mode: 1
+ default_cpu_tx_queue: 7
vlan_flooding_l2mc_num_reserved: 0
ipv6_lpm_128b_enable: 1
shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm
index 65b289963d79..f4f77baf443a 100644
--- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm
@@ -23,6 +23,7 @@ bcm_device:
0:
global:
pktio_mode: 1
+ default_cpu_tx_queue: 7
vlan_flooding_l2mc_num_reserved: 0
ipv6_lpm_128b_enable: 1
shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
deleted file mode 120000
index d8e2cb69d236..000000000000
--- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
+++ /dev/null
@@ -1 +0,0 @@
-../../x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
new file mode 100644
index 000000000000..11bfbc5b6811
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
@@ -0,0 +1,379 @@
+
+
+ CSDK-BH
+ retimer
+
+ 0
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
+ 2
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
+ 3
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
+ 4
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
+ 5
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
+ 6
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
+ 7
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ bypass
+
+
+
+
+
+
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json
new file mode 100644
index 000000000000..2ec71a30a6c8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json
@@ -0,0 +1,4790 @@
+{
+ "PORT_MEDIA_SETTINGS": {
+ "1": {
+ "Default": {
+ "main": {
+ "lane0": "0x9a",
+ "lane1": "0x9a",
+ "lane2": "0x9a",
+ "lane3": "0x9a",
+ "lane4": "0x9a",
+ "lane5": "0x9a",
+ "lane6": "0x9a",
+ "lane7": "0x9a"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post2": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "post3": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "pre1": {
+ "lane0": "0xfffffff4",
+ "lane1": "0xfffffff4",
+ "lane2": "0xfffffff4",
+ "lane3": "0xfffffff4",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff4",
+ "lane6": "0xfffffff4",
+ "lane7": "0xfffffff4"
+ },
+ "pre2": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "pre3": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ }
+ }
+ },
+ "2": {
+ "Default": {
+ "main": {
+ "lane0": "0x9a",
+ "lane1": "0x9a",
+ "lane2": "0x9a",
+ "lane3": "0x9a",
+ "lane4": "0x9a",
+ "lane5": "0x9a",
+ "lane6": "0x9a",
+ "lane7": "0x9a"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post2": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "post3": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "pre1": {
+ "lane0": "0xfffffff4",
+ "lane1": "0xfffffff4",
+ "lane2": "0xfffffff4",
+ "lane3": "0xfffffff4",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff4",
+ "lane6": "0xfffffff4",
+ "lane7": "0xfffffff4"
+ },
+ "pre2": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "pre3": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
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+ "lane0": "0x9a",
+ "lane1": "0x9a",
+ "lane2": "0x9a",
+ "lane3": "0x9a",
+ "lane4": "0x9a",
+ "lane5": "0x9a",
+ "lane6": "0x9a",
+ "lane7": "0x9a"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post2": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "post3": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "pre1": {
+ "lane0": "0xfffffff4",
+ "lane1": "0xfffffff4",
+ "lane2": "0xfffffff4",
+ "lane3": "0xfffffff4",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff4",
+ "lane6": "0xfffffff4",
+ "lane7": "0xfffffff4"
+ },
+ "pre2": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ },
+ "pre3": {
+ "lane0": "0x0",
+ "lane1": "0x0",
+ "lane2": "0x0",
+ "lane3": "0x0",
+ "lane4": "0x0",
+ "lane5": "0x0",
+ "lane6": "0x0",
+ "lane7": "0x0"
+ }
+ }
+ },
+ "65": {
+ "Default": {
+ "main": {
+ "lane0": "0x32"
+ },
+ "post1": {
+ "lane0": "0x5"
+ },
+ "post2": {
+ "lane0": "0x0"
+ },
+ "post3": {
+ "lane0": "0x0"
+ },
+ "pre1": {
+ "lane0": "0x5"
+ },
+ "pre2": {
+ "lane0": "0x0"
+ },
+ "pre3": {
+ "lane0": "0x0"
+ }
+ }
+ },
+ "66": {
+ "Default": {
+ "main": {
+ "lane0": "0x32"
+ },
+ "post1": {
+ "lane0": "0x5"
+ },
+ "post2": {
+ "lane0": "0x0"
+ },
+ "post3": {
+ "lane0": "0x0"
+ },
+ "pre1": {
+ "lane0": "0x5"
+ },
+ "pre2": {
+ "lane0": "0x0"
+ },
+ "pre3": {
+ "lane0": "0x0"
+ }
+ }
+ }
+ }
+}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini
index c7bdcf79be6a..ef35708de118 100644
--- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini
@@ -1,67 +1,67 @@
# name lanes alias index speed fec
-Ethernet0 9,10,11,12,13,14,15,16 Ethernet1/1 1 400000 rs
-Ethernet8 5,6,7,8,9,10,11,12 Ethernet2/1 2 400000 rs
-Ethernet16 25,26,27,28,29,30,31,32 Ethernet3/1 3 400000 rs
-Ethernet24 17,18,19,20,21,22,23,24 Ethernet4/1 4 400000 rs
-Ethernet32 41,42,43,44,45,46,47,48 Ethernet5/1 5 400000 rs
-Ethernet40 33,34,35,36,37,38,39,40 Ethernet6/1 6 400000 rs
-Ethernet48 57,58,59,60,61,62,63,64 Ethernet7/1 7 400000 rs
-Ethernet56 49,50,51,52,53,54,55,56 Ethernet8/1 8 400000 rs
-Ethernet64 73,74,75,76,77,78,79,80 Ethernet9/1 9 400000 rs
-Ethernet72 65,66,67,68,69,70,71,72 Ethernet10/1 10 400000 rs
-Ethernet80 89,90,91,92,93,94,95,96 Ethernet11/1 11 400000 rs
-Ethernet88 81,82,83,84,85,86,87,88 Ethernet12/1 12 400000 rs
-Ethernet96 105,106,107,108,109,110,111,112 Ethernet13/1 13 400000 rs
-Ethernet104 97,98,99,100,101,102,103,104 Ethernet14/1 14 400000 rs
-Ethernet112 121,122,123,124,125,126,127,128 Ethernet15/1 15 400000 rs
-Ethernet120 117,118,119,120,121,122,123,124 Ethernet16/1 16 400000 rs
-Ethernet128 141,142,143,144,145,146,147,148 Ethernet17/1 17 400000 rs
-Ethernet136 129,130,131,132,133,134,135,136 Ethernet18/1 18 400000 rs
-Ethernet144 153,154,155,156,157,158,159,160 Ethernet19/1 19 400000 rs
-Ethernet152 145,146,147,148,149,150,151,152 Ethernet20/1 20 400000 rs
-Ethernet160 169,170,171,172,173,174,175,176 Ethernet21/1 21 400000 rs
-Ethernet168 161,162,163,164,165,166,167,168 Ethernet22/1 22 400000 rs
-Ethernet176 185,186,187,188,189,190,191,192 Ethernet23/1 23 400000 rs
-Ethernet184 177,178,179,180,181,182,183,184 Ethernet24/1 24 400000 rs
-Ethernet192 201,202,203,204,205,206,207,208 Ethernet25/1 25 400000 rs
-Ethernet200 193,194,195,196,197,198,199,200 Ethernet26/1 26 400000 rs
-Ethernet208 217,218,219,220,221,222,223,224 Ethernet27/1 27 400000 rs
-Ethernet216 209,210,211,212,213,214,215,216 Ethernet28/1 28 400000 rs
-Ethernet224 233,234,235,236,237,238,239,240 Ethernet29/1 29 400000 rs
-Ethernet232 225,226,227,228,229,230,231,232 Ethernet30/1 30 400000 rs
-Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 31 400000 rs
-Ethernet248 253,254,255,256,257,258,259,260 Ethernet32/1 32 400000 rs
+Ethernet0 17,18,19,20,21,22,23,24 Ethernet1/1 1 400000 rs
+Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 2 400000 rs
+Ethernet16 49,50,51,52,53,54,55,56 Ethernet3/1 3 400000 rs
+Ethernet24 33,34,35,36,37,38,39,40 Ethernet4/1 4 400000 rs
+Ethernet32 81,82,83,84,85,86,87,88 Ethernet5/1 5 400000 rs
+Ethernet40 65,66,67,68,69,70,71,72 Ethernet6/1 6 400000 rs
+Ethernet48 113,114,115,116,117,118,119,120 Ethernet7/1 7 400000 rs
+Ethernet56 97,98,99,100,101,102,103,104 Ethernet8/1 8 400000 rs
+Ethernet64 145,146,147,148,149,150,151,152 Ethernet9/1 9 400000 rs
+Ethernet72 129,130,131,132,133,134,135,136 Ethernet10/1 10 400000 rs
+Ethernet80 177,178,179,180,181,182,183,184 Ethernet11/1 11 400000 rs
+Ethernet88 161,162,163,164,165,166,167,168 Ethernet12/1 12 400000 rs
+Ethernet96 209,210,211,212,213,214,215,216 Ethernet13/1 13 400000 rs
+Ethernet104 193,194,195,196,197,198,199,200 Ethernet14/1 14 400000 rs
+Ethernet112 241,242,243,244,245,246,247,248 Ethernet15/1 15 400000 rs
+Ethernet120 233,234,235,236,237,238,239,240 Ethernet16/1 16 400000 rs
+Ethernet128 281,282,283,284,285,286,287,288 Ethernet17/1 17 400000 rs
+Ethernet136 257,258,259,260,261,262,263,264 Ethernet18/1 18 400000 rs
+Ethernet144 305,306,307,308,309,310,311,312 Ethernet19/1 19 400000 rs
+Ethernet152 289,290,291,292,293,294,295,296 Ethernet20/1 20 400000 rs
+Ethernet160 337,338,339,340,341,342,343,344 Ethernet21/1 21 400000 rs
+Ethernet168 321,322,323,324,325,326,327,328 Ethernet22/1 22 400000 rs
+Ethernet176 369,370,371,372,373,374,375,376 Ethernet23/1 23 400000 rs
+Ethernet184 353,354,355,356,357,358,359,360 Ethernet24/1 24 400000 rs
+Ethernet192 401,402,403,404,405,406,407,408 Ethernet25/1 25 400000 rs
+Ethernet200 385,386,387,388,389,390,391,392 Ethernet26/1 26 400000 rs
+Ethernet208 433,434,435,436,437,438,439,440 Ethernet27/1 27 400000 rs
+Ethernet216 417,418,419,420,421,422,423,424 Ethernet28/1 28 400000 rs
+Ethernet224 465,466,467,468,469,470,471,472 Ethernet29/1 29 400000 rs
+Ethernet232 449,450,451,452,453,454,455,456 Ethernet30/1 30 400000 rs
+Ethernet240 481,482,483,484,485,486,487,488 Ethernet31/1 31 400000 rs
+Ethernet248 505,506,507,508,509,510,511,512 Ethernet32/1 32 400000 rs
Ethernet256 1,2,3,4,5,6,7,8 Ethernet33/1 33 400000 rs
-Ethernet264 13,14,15,16,17,18,19,20 Ethernet34/1 34 400000 rs
-Ethernet272 29,30,31,32,33,34,35,36 Ethernet35/1 35 400000 rs
-Ethernet280 21,22,23,24,25,26,27,28 Ethernet36/1 36 400000 rs
-Ethernet288 45,46,47,48,49,50,51,52 Ethernet37/1 37 400000 rs
-Ethernet296 37,38,39,40,41,42,43,44 Ethernet38/1 38 400000 rs
-Ethernet304 61,62,63,64,65,66,67,68 Ethernet39/1 39 400000 rs
-Ethernet312 53,54,55,56,57,58,59,60 Ethernet40/1 40 400000 rs
-Ethernet320 77,78,79,80,81,82,83,84 Ethernet41/1 41 400000 rs
-Ethernet328 69,70,71,72,73,74,75,76 Ethernet42/1 42 400000 rs
-Ethernet336 93,94,95,96,97,98,99,100 Ethernet43/1 43 400000 rs
-Ethernet344 85,86,87,88,89,90,91,92 Ethernet44/1 44 400000 rs
-Ethernet352 109,110,111,112,113,114,115,116 Ethernet45/1 45 400000 rs
-Ethernet360 101,102,103,104,105,106,107,108 Ethernet46/1 46 400000 rs
-Ethernet368 125,126,127,128,129,130,131,132 Ethernet47/1 47 400000 rs
-Ethernet376 113,114,115,116,117,118,119,120 Ethernet48/1 48 400000 rs
-Ethernet384 137,138,139,140,141,142,143,144 Ethernet49/1 49 400000 rs
-Ethernet392 133,134,135,136,137,138,139,140 Ethernet50/1 50 400000 rs
-Ethernet400 157,158,159,160,161,162,163,164 Ethernet51/1 51 400000 rs
-Ethernet408 149,150,151,152,153,154,155,156 Ethernet52/1 52 400000 rs
-Ethernet416 173,174,175,176,177,178,179,180 Ethernet53/1 53 400000 rs
-Ethernet424 165,166,167,168,169,170,171,172 Ethernet54/1 54 400000 rs
-Ethernet432 189,190,191,192,193,194,195,196 Ethernet55/1 55 400000 rs
-Ethernet440 181,182,183,184,185,186,187,188 Ethernet56/1 56 400000 rs
-Ethernet448 205,206,207,208,209,210,211,212 Ethernet57/1 57 400000 rs
-Ethernet456 197,198,199,200,201,202,203,204 Ethernet58/1 58 400000 rs
-Ethernet464 221,222,223,224,225,226,227,228 Ethernet59/1 59 400000 rs
-Ethernet472 213,214,215,216,217,218,219,220 Ethernet60/1 60 400000 rs
-Ethernet480 237,238,239,240,241,242,243,244 Ethernet61/1 61 400000 rs
-Ethernet488 229,230,231,232,233,234,235,236 Ethernet62/1 62 400000 rs
-Ethernet496 249,250,251,252,253,254,255,256 Ethernet63/1 63 400000 rs
-Ethernet504 245,246,247,248,249,250,251,252 Ethernet64/1 64 400000 rs
-Ethernet512 258 Ethernet65 65 10000 none
-Ethernet513 257 Ethernet66 66 10000 none
+Ethernet264 25,26,27,28,29,30,31,32 Ethernet34/1 34 400000 rs
+Ethernet272 57,58,59,60,61,62,63,64 Ethernet35/1 35 400000 rs
+Ethernet280 41,42,43,44,45,46,47,48 Ethernet36/1 36 400000 rs
+Ethernet288 89,90,91,92,93,94,95,96 Ethernet37/1 37 400000 rs
+Ethernet296 73,74,75,76,77,78,79,80 Ethernet38/1 38 400000 rs
+Ethernet304 121,122,123,124,125,126,127,128 Ethernet39/1 39 400000 rs
+Ethernet312 105,106,107,108,109,110,111,112 Ethernet40/1 40 400000 rs
+Ethernet320 153,154,155,156,157,158,159,160 Ethernet41/1 41 400000 rs
+Ethernet328 137,138,139,140,141,142,143,144 Ethernet42/1 42 400000 rs
+Ethernet336 185,186,187,188,189,190,191,192 Ethernet43/1 43 400000 rs
+Ethernet344 169,170,171,172,173,174,175,176 Ethernet44/1 44 400000 rs
+Ethernet352 217,218,219,220,221,222,223,224 Ethernet45/1 45 400000 rs
+Ethernet360 201,202,203,204,205,206,207,208 Ethernet46/1 46 400000 rs
+Ethernet368 249,250,251,252,253,254,255,256 Ethernet47/1 47 400000 rs
+Ethernet376 225,226,227,228,229,230,231,232 Ethernet48/1 48 400000 rs
+Ethernet384 273,274,275,276,277,278,279,280 Ethernet49/1 49 400000 rs
+Ethernet392 265,266,267,268,269,270,271,272 Ethernet50/1 50 400000 rs
+Ethernet400 313,314,315,316,317,318,319,320 Ethernet51/1 51 400000 rs
+Ethernet408 297,298,299,300,301,302,303,304 Ethernet52/1 52 400000 rs
+Ethernet416 345,346,347,348,349,350,351,352 Ethernet53/1 53 400000 rs
+Ethernet424 329,330,331,332,333,334,335,336 Ethernet54/1 54 400000 rs
+Ethernet432 377,378,379,380,381,382,383,384 Ethernet55/1 55 400000 rs
+Ethernet440 361,362,363,364,365,366,367,368 Ethernet56/1 56 400000 rs
+Ethernet448 409,410,411,412,413,414,415,416 Ethernet57/1 57 400000 rs
+Ethernet456 393,394,395,396,397,398,399,400 Ethernet58/1 58 400000 rs
+Ethernet464 441,442,443,444,445,446,447,448 Ethernet59/1 59 400000 rs
+Ethernet472 425,426,427,428,429,430,431,432 Ethernet60/1 60 400000 rs
+Ethernet480 473,474,475,476,477,478,479,480 Ethernet61/1 61 400000 rs
+Ethernet488 457,458,459,460,461,462,463,464 Ethernet62/1 62 400000 rs
+Ethernet496 497,498,499,500,501,502,503,504 Ethernet63/1 63 400000 rs
+Ethernet504 489,490,491,492,493,494,495,496 Ethernet64/1 64 400000 rs
+Ethernet512 515 Ethernet65 65 10000 none
+Ethernet513 513 Ethernet66 66 10000 none
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm
index 1d5894498362..ec5f4d9f0f4a 100644
--- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm
@@ -23,6 +23,7 @@ bcm_device:
0:
global:
pktio_mode: 1
+ default_cpu_tx_queue: 7
vlan_flooding_l2mc_num_reserved: 0
ipv6_lpm_128b_enable: 1
shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_64s/platform.json b/device/arista/x86_64-arista_7060dx5_64s/platform.json
index fa89a17687b5..a006f48dae4c 100644
--- a/device/arista/x86_64-arista_7060dx5_64s/platform.json
+++ b/device/arista/x86_64-arista_7060dx5_64s/platform.json
@@ -1,7 +1,20 @@
{
"chassis": {
"name": "DCS-7060DX5-64S",
- "components": [],
+ "components": [
+ {
+ "name": "Aboot()"
+ },
+ {
+ "name": "Scd(addr=0000:00:18.7)"
+ },
+ {
+ "name": "Scd(addr=0000:01:00.0)"
+ },
+ {
+ "name": "LorikeetSysCpld(addr=13-0023)"
+ }
+ ],
"fans": [],
"fan_drawers": [
{
@@ -40,24 +53,30 @@
"psus": [
{
"name": "psu1",
- "fans": []
+ "fans": [
+ {
+ "name": "psu1/1",
+ "speed": {
+ "controllable": false
+ }
+ }
+ ]
},
{
"name": "psu2",
- "fans": []
+ "fans": [
+ {
+ "name": "psu2/1",
+ "speed": {
+ "controllable": false
+ }
+ }
+ ]
}
],
"thermals": [
{
- "name": "Board sensor",
- "controllable": false
- },
- {
- "name": "TH4 exhaust temp sensor",
- "controllable": false
- },
- {
- "name": "Inlet temp sensor",
+ "name": "Cpu temp sensor",
"controllable": false
},
{
@@ -65,35 +84,23 @@
"controllable": false
},
{
- "name": "Back panel temp sensor",
+ "name": "Back-panel temp sensor",
"controllable": false
},
{
- "name": "Front panel temp sensor",
+ "name": "Switch card",
"controllable": false
},
{
- "name": "Power supply 1 hotspot sensor",
+ "name": "Air outlet",
"controllable": false
},
{
- "name": "Power supply 1 inlet temp sensor",
+ "name": "Air inlet",
"controllable": false
},
{
- "name": "Power supply 1 exhaust temp sensor",
- "controllable": false
- },
- {
- "name": "Power supply 2 hotspot sensor",
- "controllable": false
- },
- {
- "name": "Power supply 2 inlet temp sensor",
- "controllable": false
- },
- {
- "name": "Power supply 2 exhaust temp sensor",
+ "name": "Front-panel temp sensor",
"controllable": false
}
],
@@ -301,7 +308,7 @@
"interfaces": {
"Ethernet0": {
"index": "1,1,1,1,1,1,1,1",
- "lanes": "9,10,11,12,13,14,15,16",
+ "lanes": "17,18,19,20,21,22,23,24",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet1/1"
@@ -330,7 +337,7 @@
},
"Ethernet8": {
"index": "2,2,2,2,2,2,2,2",
- "lanes": "5,6,7,8,9,10,11,12",
+ "lanes": "9,10,11,12,13,14,15,16",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet2/1"
@@ -359,7 +366,7 @@
},
"Ethernet16": {
"index": "3,3,3,3,3,3,3,3",
- "lanes": "25,26,27,28,29,30,31,32",
+ "lanes": "49,50,51,52,53,54,55,56",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet3/1"
@@ -388,7 +395,7 @@
},
"Ethernet24": {
"index": "4,4,4,4,4,4,4,4",
- "lanes": "17,18,19,20,21,22,23,24",
+ "lanes": "33,34,35,36,37,38,39,40",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet4/1"
@@ -417,7 +424,7 @@
},
"Ethernet32": {
"index": "5,5,5,5,5,5,5,5",
- "lanes": "41,42,43,44,45,46,47,48",
+ "lanes": "81,82,83,84,85,86,87,88",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet5/1"
@@ -446,7 +453,7 @@
},
"Ethernet40": {
"index": "6,6,6,6,6,6,6,6",
- "lanes": "33,34,35,36,37,38,39,40",
+ "lanes": "65,66,67,68,69,70,71,72",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet6/1"
@@ -475,7 +482,7 @@
},
"Ethernet48": {
"index": "7,7,7,7,7,7,7,7",
- "lanes": "57,58,59,60,61,62,63,64",
+ "lanes": "113,114,115,116,117,118,119,120",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet7/1"
@@ -504,7 +511,7 @@
},
"Ethernet56": {
"index": "8,8,8,8,8,8,8,8",
- "lanes": "49,50,51,52,53,54,55,56",
+ "lanes": "97,98,99,100,101,102,103,104",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet8/1"
@@ -533,7 +540,7 @@
},
"Ethernet64": {
"index": "9,9,9,9,9,9,9,9",
- "lanes": "73,74,75,76,77,78,79,80",
+ "lanes": "145,146,147,148,149,150,151,152",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet9/1"
@@ -562,7 +569,7 @@
},
"Ethernet72": {
"index": "10,10,10,10,10,10,10,10",
- "lanes": "65,66,67,68,69,70,71,72",
+ "lanes": "129,130,131,132,133,134,135,136",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet10/1"
@@ -591,7 +598,7 @@
},
"Ethernet80": {
"index": "11,11,11,11,11,11,11,11",
- "lanes": "89,90,91,92,93,94,95,96",
+ "lanes": "177,178,179,180,181,182,183,184",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet11/1"
@@ -620,7 +627,7 @@
},
"Ethernet88": {
"index": "12,12,12,12,12,12,12,12",
- "lanes": "81,82,83,84,85,86,87,88",
+ "lanes": "161,162,163,164,165,166,167,168",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet12/1"
@@ -649,7 +656,7 @@
},
"Ethernet96": {
"index": "13,13,13,13,13,13,13,13",
- "lanes": "105,106,107,108,109,110,111,112",
+ "lanes": "209,210,211,212,213,214,215,216",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet13/1"
@@ -678,7 +685,7 @@
},
"Ethernet104": {
"index": "14,14,14,14,14,14,14,14",
- "lanes": "97,98,99,100,101,102,103,104",
+ "lanes": "193,194,195,196,197,198,199,200",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet14/1"
@@ -707,7 +714,7 @@
},
"Ethernet112": {
"index": "15,15,15,15,15,15,15,15",
- "lanes": "121,122,123,124,125,126,127,128",
+ "lanes": "241,242,243,244,245,246,247,248",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet15/1"
@@ -736,7 +743,7 @@
},
"Ethernet120": {
"index": "16,16,16,16,16,16,16,16",
- "lanes": "117,118,119,120,121,122,123,124",
+ "lanes": "233,234,235,236,237,238,239,240",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet16/1"
@@ -765,7 +772,7 @@
},
"Ethernet128": {
"index": "17,17,17,17,17,17,17,17",
- "lanes": "141,142,143,144,145,146,147,148",
+ "lanes": "281,282,283,284,285,286,287,288",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet17/1"
@@ -794,7 +801,7 @@
},
"Ethernet136": {
"index": "18,18,18,18,18,18,18,18",
- "lanes": "129,130,131,132,133,134,135,136",
+ "lanes": "257,258,259,260,261,262,263,264",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet18/1"
@@ -823,7 +830,7 @@
},
"Ethernet144": {
"index": "19,19,19,19,19,19,19,19",
- "lanes": "153,154,155,156,157,158,159,160",
+ "lanes": "305,306,307,308,309,310,311,312",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet19/1"
@@ -852,7 +859,7 @@
},
"Ethernet152": {
"index": "20,20,20,20,20,20,20,20",
- "lanes": "145,146,147,148,149,150,151,152",
+ "lanes": "289,290,291,292,293,294,295,296",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet20/1"
@@ -881,7 +888,7 @@
},
"Ethernet160": {
"index": "21,21,21,21,21,21,21,21",
- "lanes": "169,170,171,172,173,174,175,176",
+ "lanes": "337,338,339,340,341,342,343,344",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet21/1"
@@ -910,7 +917,7 @@
},
"Ethernet168": {
"index": "22,22,22,22,22,22,22,22",
- "lanes": "161,162,163,164,165,166,167,168",
+ "lanes": "321,322,323,324,325,326,327,328",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet22/1"
@@ -939,7 +946,7 @@
},
"Ethernet176": {
"index": "23,23,23,23,23,23,23,23",
- "lanes": "185,186,187,188,189,190,191,192",
+ "lanes": "369,370,371,372,373,374,375,376",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet23/1"
@@ -968,7 +975,7 @@
},
"Ethernet184": {
"index": "24,24,24,24,24,24,24,24",
- "lanes": "177,178,179,180,181,182,183,184",
+ "lanes": "353,354,355,356,357,358,359,360",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet24/1"
@@ -997,7 +1004,7 @@
},
"Ethernet192": {
"index": "25,25,25,25,25,25,25,25",
- "lanes": "201,202,203,204,205,206,207,208",
+ "lanes": "401,402,403,404,405,406,407,408",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet25/1"
@@ -1026,7 +1033,7 @@
},
"Ethernet200": {
"index": "26,26,26,26,26,26,26,26",
- "lanes": "193,194,195,196,197,198,199,200",
+ "lanes": "385,386,387,388,389,390,391,392",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet26/1"
@@ -1055,7 +1062,7 @@
},
"Ethernet208": {
"index": "27,27,27,27,27,27,27,27",
- "lanes": "217,218,219,220,221,222,223,224",
+ "lanes": "433,434,435,436,437,438,439,440",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet27/1"
@@ -1084,7 +1091,7 @@
},
"Ethernet216": {
"index": "28,28,28,28,28,28,28,28",
- "lanes": "209,210,211,212,213,214,215,216",
+ "lanes": "417,418,419,420,421,422,423,424",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet28/1"
@@ -1113,7 +1120,7 @@
},
"Ethernet224": {
"index": "29,29,29,29,29,29,29,29",
- "lanes": "233,234,235,236,237,238,239,240",
+ "lanes": "465,466,467,468,469,470,471,472",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet29/1"
@@ -1142,7 +1149,7 @@
},
"Ethernet232": {
"index": "30,30,30,30,30,30,30,30",
- "lanes": "225,226,227,228,229,230,231,232",
+ "lanes": "449,450,451,452,453,454,455,456",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet30/1"
@@ -1171,7 +1178,7 @@
},
"Ethernet240": {
"index": "31,31,31,31,31,31,31,31",
- "lanes": "241,242,243,244,245,246,247,248",
+ "lanes": "481,482,483,484,485,486,487,488",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet31/1"
@@ -1200,7 +1207,7 @@
},
"Ethernet248": {
"index": "32,32,32,32,32,32,32,32",
- "lanes": "253,254,255,256,257,258,259,260",
+ "lanes": "505,506,507,508,509,510,511,512",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet32/1"
@@ -1258,7 +1265,7 @@
},
"Ethernet264": {
"index": "34,34,34,34,34,34,34,34",
- "lanes": "13,14,15,16,17,18,19,20",
+ "lanes": "25,26,27,28,29,30,31,32",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet34/1"
@@ -1287,7 +1294,7 @@
},
"Ethernet272": {
"index": "35,35,35,35,35,35,35,35",
- "lanes": "29,30,31,32,33,34,35,36",
+ "lanes": "57,58,59,60,61,62,63,64",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet35/1"
@@ -1316,7 +1323,7 @@
},
"Ethernet280": {
"index": "36,36,36,36,36,36,36,36",
- "lanes": "21,22,23,24,25,26,27,28",
+ "lanes": "41,42,43,44,45,46,47,48",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet36/1"
@@ -1345,7 +1352,7 @@
},
"Ethernet288": {
"index": "37,37,37,37,37,37,37,37",
- "lanes": "45,46,47,48,49,50,51,52",
+ "lanes": "89,90,91,92,93,94,95,96",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet37/1"
@@ -1374,7 +1381,7 @@
},
"Ethernet296": {
"index": "38,38,38,38,38,38,38,38",
- "lanes": "37,38,39,40,41,42,43,44",
+ "lanes": "73,74,75,76,77,78,79,80",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet38/1"
@@ -1403,7 +1410,7 @@
},
"Ethernet304": {
"index": "39,39,39,39,39,39,39,39",
- "lanes": "61,62,63,64,65,66,67,68",
+ "lanes": "121,122,123,124,125,126,127,128",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet39/1"
@@ -1432,7 +1439,7 @@
},
"Ethernet312": {
"index": "40,40,40,40,40,40,40,40",
- "lanes": "53,54,55,56,57,58,59,60",
+ "lanes": "105,106,107,108,109,110,111,112",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet40/1"
@@ -1461,7 +1468,7 @@
},
"Ethernet320": {
"index": "41,41,41,41,41,41,41,41",
- "lanes": "77,78,79,80,81,82,83,84",
+ "lanes": "153,154,155,156,157,158,159,160",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet41/1"
@@ -1490,7 +1497,7 @@
},
"Ethernet328": {
"index": "42,42,42,42,42,42,42,42",
- "lanes": "69,70,71,72,73,74,75,76",
+ "lanes": "137,138,139,140,141,142,143,144",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet42/1"
@@ -1519,7 +1526,7 @@
},
"Ethernet336": {
"index": "43,43,43,43,43,43,43,43",
- "lanes": "93,94,95,96,97,98,99,100",
+ "lanes": "185,186,187,188,189,190,191,192",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet43/1"
@@ -1548,7 +1555,7 @@
},
"Ethernet344": {
"index": "44,44,44,44,44,44,44,44",
- "lanes": "85,86,87,88,89,90,91,92",
+ "lanes": "169,170,171,172,173,174,175,176",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet44/1"
@@ -1577,7 +1584,7 @@
},
"Ethernet352": {
"index": "45,45,45,45,45,45,45,45",
- "lanes": "109,110,111,112,113,114,115,116",
+ "lanes": "217,218,219,220,221,222,223,224",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet45/1"
@@ -1606,7 +1613,7 @@
},
"Ethernet360": {
"index": "46,46,46,46,46,46,46,46",
- "lanes": "101,102,103,104,105,106,107,108",
+ "lanes": "201,202,203,204,205,206,207,208",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet46/1"
@@ -1635,7 +1642,7 @@
},
"Ethernet368": {
"index": "47,47,47,47,47,47,47,47",
- "lanes": "125,126,127,128,129,130,131,132",
+ "lanes": "249,250,251,252,253,254,255,256",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet47/1"
@@ -1664,7 +1671,7 @@
},
"Ethernet376": {
"index": "48,48,48,48,48,48,48,48",
- "lanes": "113,114,115,116,117,118,119,120",
+ "lanes": "225,226,227,228,229,230,231,232",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet48/1"
@@ -1693,7 +1700,7 @@
},
"Ethernet384": {
"index": "49,49,49,49,49,49,49,49",
- "lanes": "137,138,139,140,141,142,143,144",
+ "lanes": "273,274,275,276,277,278,279,280",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet49/1"
@@ -1722,7 +1729,7 @@
},
"Ethernet392": {
"index": "50,50,50,50,50,50,50,50",
- "lanes": "133,134,135,136,137,138,139,140",
+ "lanes": "265,266,267,268,269,270,271,272",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet50/1"
@@ -1751,7 +1758,7 @@
},
"Ethernet400": {
"index": "51,51,51,51,51,51,51,51",
- "lanes": "157,158,159,160,161,162,163,164",
+ "lanes": "313,314,315,316,317,318,319,320",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet51/1"
@@ -1780,7 +1787,7 @@
},
"Ethernet408": {
"index": "52,52,52,52,52,52,52,52",
- "lanes": "149,150,151,152,153,154,155,156",
+ "lanes": "297,298,299,300,301,302,303,304",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet52/1"
@@ -1809,7 +1816,7 @@
},
"Ethernet416": {
"index": "53,53,53,53,53,53,53,53",
- "lanes": "173,174,175,176,177,178,179,180",
+ "lanes": "345,346,347,348,349,350,351,352",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet53/1"
@@ -1838,7 +1845,7 @@
},
"Ethernet424": {
"index": "54,54,54,54,54,54,54,54",
- "lanes": "165,166,167,168,169,170,171,172",
+ "lanes": "329,330,331,332,333,334,335,336",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet54/1"
@@ -1867,7 +1874,7 @@
},
"Ethernet432": {
"index": "55,55,55,55,55,55,55,55",
- "lanes": "189,190,191,192,193,194,195,196",
+ "lanes": "377,378,379,380,381,382,383,384",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet55/1"
@@ -1896,7 +1903,7 @@
},
"Ethernet440": {
"index": "56,56,56,56,56,56,56,56",
- "lanes": "181,182,183,184,185,186,187,188",
+ "lanes": "361,362,363,364,365,366,367,368",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet56/1"
@@ -1925,7 +1932,7 @@
},
"Ethernet448": {
"index": "57,57,57,57,57,57,57,57",
- "lanes": "205,206,207,208,209,210,211,212",
+ "lanes": "409,410,411,412,413,414,415,416",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet57/1"
@@ -1954,7 +1961,7 @@
},
"Ethernet456": {
"index": "58,58,58,58,58,58,58,58",
- "lanes": "197,198,199,200,201,202,203,204",
+ "lanes": "393,394,395,396,397,398,399,400",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet58/1"
@@ -1983,7 +1990,7 @@
},
"Ethernet464": {
"index": "59,59,59,59,59,59,59,59",
- "lanes": "221,222,223,224,225,226,227,228",
+ "lanes": "441,442,443,444,445,446,447,448",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet59/1"
@@ -2012,7 +2019,7 @@
},
"Ethernet472": {
"index": "60,60,60,60,60,60,60,60",
- "lanes": "213,214,215,216,217,218,219,220",
+ "lanes": "425,426,427,428,429,430,431,432",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet60/1"
@@ -2041,7 +2048,7 @@
},
"Ethernet480": {
"index": "61,61,61,61,61,61,61,61",
- "lanes": "237,238,239,240,241,242,243,244",
+ "lanes": "473,474,475,476,477,478,479,480",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet61/1"
@@ -2070,7 +2077,7 @@
},
"Ethernet488": {
"index": "62,62,62,62,62,62,62,62",
- "lanes": "229,230,231,232,233,234,235,236",
+ "lanes": "457,458,459,460,461,462,463,464",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet62/1"
@@ -2099,7 +2106,7 @@
},
"Ethernet496": {
"index": "63,63,63,63,63,63,63,63",
- "lanes": "249,250,251,252,253,254,255,256",
+ "lanes": "497,498,499,500,501,502,503,504",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet63/1"
@@ -2128,7 +2135,7 @@
},
"Ethernet504": {
"index": "64,64,64,64,64,64,64,64",
- "lanes": "245,246,247,248,249,250,251,252",
+ "lanes": "489,490,491,492,493,494,495,496",
"breakout_modes": {
"1x400G[200G,100G,50G,40G,25G,10G]": [
"Ethernet64/1"
@@ -2157,7 +2164,7 @@
},
"Ethernet512": {
"index": "65",
- "lanes": "258",
+ "lanes": "515",
"breakout_modes": {
"1x10G": [
"Ethernet65"
@@ -2166,7 +2173,7 @@
},
"Ethernet513": {
"index": "66",
- "lanes": "257",
+ "lanes": "513",
"breakout_modes": {
"1x10G": [
"Ethernet66"
diff --git a/device/arista/x86_64-arista_7060dx5_64s/platform_components.json b/device/arista/x86_64-arista_7060dx5_64s/platform_components.json
new file mode 100644
index 000000000000..2012dc63aa49
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_64s/platform_components.json
@@ -0,0 +1,12 @@
+{
+ "chassis": {
+ "DCS-7060DX5-64S": {
+ "component": {
+ "Aboot()": {},
+ "Scd(addr=0000:00:18.7)": {},
+ "Scd(addr=0000:01:00.0)": {},
+ "LorikeetSysCpld(addr=13-0023)": {}
+ }
+ }
+ }
+}
diff --git a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json
index b6d090ec6ef0..853ad935e8c3 100644
--- a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json
+++ b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json
@@ -5,7 +5,7 @@
"name": "phy1_1",
"address": "1",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy1_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
@@ -18,7 +18,7 @@
"name": "phy1_2",
"address": "2",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy2_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
@@ -31,7 +31,7 @@
"name": "phy2_1",
"address": "3",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy3_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
@@ -44,7 +44,7 @@
"name": "phy2_2",
"address": "4",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy4_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
@@ -57,7 +57,7 @@
"name": "phy3_1",
"address": "5",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy5_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
@@ -70,7 +70,7 @@
"name": "phy3_2",
"address": "6",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy6_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
@@ -83,7 +83,7 @@
"name": "phy4_1",
"address": "7",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy7_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
@@ -96,7 +96,7 @@
"name": "phy4_2",
"address": "8",
"lib_name": "",
- "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+ "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
"config_file": "/usr/share/sonic/hwsku/phy8_config.json",
"sai_init_config_file": "",
"phy_access": "mdio",
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index eecb986fdb45..f9dc4cea1df0 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -1947,7 +1947,7 @@ device:
THRESHOLD_MODE: LOSSY_AND_LOSSLESS
TM_SCHEDULER_CONFIG:
- NUM_MC_Q: NUM_MC_Q_2
+ NUM_MC_Q: NUM_MC_Q_4
...
@@ -2144,7 +2144,7 @@ device:
TM_PORT_MC_Q_TO_SERVICE_POOL:
?
PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
- TM_MC_Q_ID: [[0,1]]
+ TM_MC_Q_ID: [[0,3]]
:
USE_QGROUP_MIN: 0
@@ -2161,7 +2161,7 @@ device:
?
# uplink, downlink and loopback ports, 2 MC queues
PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
- TM_MC_Q_ID: [[0,1]]
+ TM_MC_Q_ID: [[0,3]]
:
MIN_GUARANTEE_CELLS: 0
SHARED_LIMITS: 1
@@ -2622,7 +2622,7 @@ device:
TM_PORT_UC_Q_TO_SERVICE_POOL:
?
PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
- TM_UC_Q_ID: [0,1,2,5,6,8,9]
+ TM_UC_Q_ID: [0,1,2,5,6]
:
USE_QGROUP_MIN: 0
TM_EGR_SERVICE_POOL_ID: 0
@@ -2648,7 +2648,7 @@ device:
TM_EGR_SERVICE_POOL_ID: 1
?
PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
- TM_MC_Q_ID: [[0,1]]
+ TM_MC_Q_ID: [[0,3]]
:
USE_QGROUP_MIN: 0
TM_EGR_SERVICE_POOL_ID: 0
@@ -2676,23 +2676,6 @@ device:
YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
RED_LIMIT_CELLS_STATIC: 0
RED_LIMIT_DYNAMIC: PERCENTAGE_625
- ?
- PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
- TM_UC_Q_ID: [8,9]
- :
- MIN_GUARANTEE_CELLS: 0
- SHARED_LIMITS: 1
- DYNAMIC_SHARED_LIMITS: 1
- SHARED_LIMIT_CELLS_STATIC: 0
- SHARED_LIMIT_DYNAMIC: ALPHA_1
- DYNAMIC_GROUP: MID_PRI_GROUP
- RESUME_OFFSET_CELLS: 2
- COLOR_SPECIFIC_LIMITS: 0
- COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
- YELLOW_LIMIT_CELLS_STATIC: 0
- YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
- RED_LIMIT_CELLS_STATIC: 0
- RED_LIMIT_DYNAMIC: PERCENTAGE_625
?
PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
TM_UC_Q_ID: [3,4]
@@ -2724,23 +2707,6 @@ device:
YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
RED_LIMIT_CELLS_STATIC: 0
RED_LIMIT_DYNAMIC: PERCENTAGE_625
- ?
- PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
- TM_UC_Q_ID: [8,9]
- :
- MIN_GUARANTEE_CELLS: 0
- SHARED_LIMITS: 1
- DYNAMIC_SHARED_LIMITS: 1
- SHARED_LIMIT_CELLS_STATIC: 0
- SHARED_LIMIT_DYNAMIC: ALPHA_1
- DYNAMIC_GROUP: MID_PRI_GROUP
- RESUME_OFFSET_CELLS: 2
- COLOR_SPECIFIC_LIMITS: 0
- COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
- YELLOW_LIMIT_CELLS_STATIC: 0
- YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
- RED_LIMIT_CELLS_STATIC: 0
- RED_LIMIT_DYNAMIC: PERCENTAGE_625
?
PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
TM_UC_Q_ID: [3,4]
@@ -2778,7 +2744,7 @@ device:
RESUME_OFFSET_CELLS: 2
?
PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
- TM_MC_Q_ID: [0,1]
+ TM_MC_Q_ID: [0,3]
SHARED_LIMIT_DYNAMIC: ALPHA_2
:
SHARED_LIMITS: 1
diff --git a/device/arista/x86_64-arista_7800_sup/chassisdb.conf b/device/arista/x86_64-arista_7800_sup/chassisdb.conf
index ebf71d01b165..f336d0cdb994 100644
--- a/device/arista/x86_64-arista_7800_sup/chassisdb.conf
+++ b/device/arista/x86_64-arista_7800_sup/chassisdb.conf
@@ -3,4 +3,4 @@ chassis_db_address=127.100.1.1
midplane_subnet=127.100.0.0/16
lag_id_start=1
-lag_id_end=1024
+lag_id_end=1023
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
index b036683d1dba..38ee97c304e8 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
@@ -22,7 +22,7 @@
"size": "6441610000",
"type": "both",
"mode": "dynamic",
- "xoff": "20761804"
+ "xoff": "1056256819"
}
},
"BUFFER_PROFILE": {
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf
new file mode 100644
index 000000000000..2a0a236a8afe
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf
new file mode 100644
index 000000000000..150337493256
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf
new file mode 100644
index 000000000000..2a0a236a8afe
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf
new file mode 100644
index 000000000000..150337493256
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf
new file mode 100644
index 000000000000..2a0a236a8afe
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf
new file mode 100644
index 000000000000..150337493256
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json b/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json
index e31cf596f380..a5d08afdc367 100644
--- a/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json
+++ b/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json
@@ -1,5 +1,6 @@
{
"skip_fancontrol": true,
- "skip_pcied": true
+ "skip_pcied": true,
+ "enable_xcvrd_sff_mgr": true
}
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm
new file mode 100644
index 000000000000..18009ef9f3e7
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm
@@ -0,0 +1,9 @@
+[Low Inheritance Precedence]
+mem_cache_enable=1
+l3_mem_entries=16384
+l3_alpm_enable=0
+riot_enable=0
+l2xmsg_mode=1
+l2_mem_entries=32768
+lpm_scaling_enable=0
+ipv6_lpm_128b_enable=0x1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm
new file mode 100644
index 000000000000..574ba37ba09c
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm
@@ -0,0 +1,25 @@
+[Low Inheritance Precedence]
+sai_tunnel_support=1
+flow_init_mode=1
+riot_enable=1
+vlan_xlate_1_mem_entries=16384
+vlan_xlate_2_mem_entries=2048
+mem_cache_enable=1
+sai_load_hw_config=/usr/lib/cancun/
+l2_entry_used_as_my_station=1
+core_clock_frequency=893
+use_all_splithorizon_groups=1
+riot_overlay_l3_intf_mem_size=4096
+riot_overlay_l3_egress_mem_size=8192
+l3_ecmp_levels=2
+riot_overlay_ecmp_resilient_hash_size=16384
+mpls_mem_entries=2048
+sai_fast_convergence_support=1
+bcm_num_cos=8
+sai_brcm_sonic_trap_group=1
+host_as_route_disable=1
+multi_hash_recurse_depth_l3=6
+sai_stats_support_mask=0x1
+
+# CPU Tx HW replication
+sai_hostif_netif_iff_up_set=1
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm
index 9dc71f839d16..0f71fda24322 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm
@@ -1,12 +1,32 @@
-mem_cache_enable=0
+[Low Inheritance Precedence]
+mem_cache_enable=1
+flow_init_mode=1
+mpls_mem_entries=16384
+vlan_xlate_1_mem_entries=65536
+vlan_xlate_2_mem_entries=16384
+riot_enable=1
ifp_inports_support_enable=1
ipv6_lpm_128b_enable=0x1
l3_max_ecmp_mode=1
lpm_scaling_enable=0
bcm_num_cos=10
-default_cpu_tx_queue=9
mmu_lossless=0
host_as_route_disable=1
sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
sai_fast_convergence_support=1
-flow_init_mode=1
+sai_load_hw_config=/usr/lib/cancun/
+sai_nbr_bcast_ifp_optimized=1
+sai_brcm_sonic_acl_enhancements=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+l2_entry_used_as_my_station=1
+multi_hash_recurse_depth_l3=3
+sai_stats_support_mask=0x1
+
+#l3 common setting
+riot_overlay_ecmp_resilient_hash_size=16384
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_l3_intf_mem_size=8192
+
+l3_alpm_ipv6_128b_bkt_rsvd=1
+l3_ecmp_levels=2
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm
new file mode 100644
index 000000000000..55f78671c2e9
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm
@@ -0,0 +1,19 @@
+[Low Inheritance Precedence]
+sai_tunnel_support: 1
+riot_enable: 1
+pktio_mode: 1
+vlan_flooding_l2mc_num_reserved: 0
+shared_block_mask_section: uc_bc
+ctr_evict_enable: 0
+sai_brcm_sonic_acl_enhancements: 1
+sai_field_group_auto_prioritize: 1
+sai_modify_hash_flexdigest: 1
+sai_fast_convergence_support: 1
+sai_port_queue_ecn_counter: 1
+l2_table_default_view: 1
+flexctr_action_reserved_ipmc_hitbit: 1
+default_cpu_tx_queue: 7
+max_vp_lags: 1024
+multi_network_groups: 1
+bcm_tunnel_term_compatible_mode: 1
+use_all_splithorizon_groups: 1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm
index 01d767530da3..3093c2fce147 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm
@@ -1,6 +1,10 @@
+[Low Inheritance Precedence]
mmu_lossless=0
#PTP
-num_queues_pci=24
+num_queues_pci=30
num_queues_uc0=1
num_queues_uc1=19
sai_fast_convergence_support=1
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm
index 1439c8d875a5..84cc04f9e295 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm
@@ -1,8 +1,53 @@
-mem_cache_enable=0
+[Low Inheritance Precedence]
+mem_cache_enable=1
+mpls_mem_entries=16384
+vlan_xlate_1_mem_entries=65536
+vlan_xlate_2_mem_entries=16384
+flow_init_mode=1
+sai_tunnel_support=1
ifp_inports_support_enable=1
ipv6_lpm_128b_enable=0x1
l3_max_ecmp_mode=1
lpm_scaling_enable=0
bcm_num_cos=10
-default_cpu_tx_queue=9
mmu_lossless=0
+sai_nbr_bcast_ifp_optimized=1
+l2_entry_used_as_my_station=1
+multi_hash_recurse_depth_l3=3
+# Drop monitor and IFA configuration
+flowtracker_enable=2
+flowtracker_max_flows=48000
+flowtracker_drop_monitor_enable=1
+flowtracker_export_interval_usecs=1000000
+flowtracker_max_export_pkt_length=9000
+flowtracker_fsp_reinject_max_length=128
+host_as_route_disable=1
+num_queues_pci=46
+num_queues_uc0=1
+num_queues_uc1=1
+sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
+ifa_enable=1
+sai_load_hw_config=/usr/lib/cancun/
+sai_fast_convergence_support=1
+sai_brcm_sonic_acl_enhancements=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+sai_stats_support_mask=0x1
+
+# MMU Lossless configurations
+sai_optimized_mmu=1
+sai_mmu_tc_to_pg_config=1
+buf.map.egress_pool0.ingress_pool=0
+buf.map.egress_pool1.ingress_pool=0
+buf.map.egress_pool2.ingress_pool=1
+
+#Tunnels
+use_all_splithorizon_groups=1
+bcm_tunnel_term_compatible_mode=1
+
+#RIOT Enable
+riot_enable=1
+riot_overlay_l3_intf_mem_size=8192
+riot_overlay_l3_egress_mem_size=32768
+l3_ecmp_levels=2
+riot_overlay_ecmp_resilient_hash_size=16384
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm
new file mode 100644
index 000000000000..39d8492228fe
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm
@@ -0,0 +1,18 @@
+[Low Inheritance Precedence]
+sai_tunnel_support: 1
+l2_table_default_view: 1
+riot_enable: 1
+pktio_mode: 1
+vlan_flooding_l2mc_num_reserved: 0
+shared_block_mask_section: uc_bc
+ctr_evict_enable: 0
+sai_brcm_sonic_acl_enhancements: 1
+sai_field_group_auto_prioritize: 1
+sai_modify_hash_flexdigest: 1
+sai_fast_convergence_support: 1
+sai_port_queue_ecn_counter: 1
+flexctr_action_reserved_ipmc_hitbit: 1
+default_cpu_tx_queue: 7
+multi_network_groups: 1
+bcm_tunnel_term_compatible_mode: 1
+use_all_splithorizon_groups: 1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm
index e8b5b7d88517..48c1330831e2 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm
@@ -1,9 +1,13 @@
+[Low Inheritance Precedence]
mmu_lossless=0
bcm_num_cos=10
default_cpu_tx_queue=9
#PTP
-num_queues_pci=24
+num_queues_pci=30
num_queues_uc0=1
num_queues_uc1=1
sai_fast_convergence_support=1
-
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+sai_stats_support_mask=0x1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm
index 039932b58f20..b9c9474190da 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm
@@ -1,5 +1,8 @@
-schan_intr_enable=0
+[Low Inheritance Precedence]
l2xmsg_mode=1
+max_vp_lags=0
+flow_init_mode=1
+schan_intr_enable=0
mmu_lossless=0
arl_clean_timeout_usec=15000000
asf_mem_profile=2
@@ -9,12 +12,10 @@ cdma_timeout_usec=15000000
dma_desc_timeout_usec=15000000
ipv6_lpm_128b_enable=1
lpm_scaling_enable=0
-max_vp_lags=0
miim_intr_enable=0
module_64ports=1
oversubscribe_mode=1
bcm_num_cos=10
-default_cpu_tx_queue=9
# Drop monitor configuration
flowtracker_enable=2
flowtracker_max_flows=48000
@@ -22,10 +23,12 @@ flowtracker_drop_monitor_enable=1
flowtracker_export_interval_usecs=1000000
flowtracker_max_export_pkt_length=9000
flowtracker_fsp_reinject_max_length=128
-flow_init_mode=1
num_queues_pci=46
num_queues_uc0=1
num_queues_uc1=1
sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
sai_fast_convergence_support=1
-
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+sai_stats_support_mask=0x1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm
index 460fb5186b4a..4dad54ceb1a4 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm
@@ -1,10 +1,12 @@
+[Low Inheritance Precedence]
+l2xmsg_mode.0=1
+flow_init_mode=1
phy_null=1
pll_bypass=1
core_clock_frequency=1325
dpr_clock_frequency=1000
device_clock_frequency=1325
port_flex_enable=1
-l2xmsg_mode.0=1
mmu_port_num_mc_queue.0=1
module_64ports.0=1
multicast_l2_range.0=511
@@ -19,10 +21,14 @@ flowtracker_drop_monitor_enable=1
flowtracker_export_interval_usecs=1000000
flowtracker_max_export_pkt_length=9000
flowtracker_fsp_reinject_max_length=128
-flow_init_mode=1
num_queues_pci=46
num_queues_uc0=1
num_queues_uc1=1
sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
sai_fast_convergence_support=1
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+# MMU Lossless configurations
+sai_optimized_mmu=1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm
new file mode 100644
index 000000000000..90954d6332fe
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm
@@ -0,0 +1,19 @@
+[Low Inheritance Precedence]
+sai_tunnel_support: 2
+#System Configs
+pktio_mode: 1
+pfc_deadlock_seq_control : 1
+default_cpu_tx_queue: 7
+vlan_flooding_l2mc_num_reserved: 0
+shared_block_mask_section: uc_bc
+
+#L3 Configs
+ipv6_lpm_128b_enable: 1
+skip_protocol_default_entries: 1
+l3_alpm_template: 1
+l3_alpm_hit_skip: 1
+l3_ecmp_member_first_lkup_mem_size: 12288
+l3_intf_vlan_split_egress : 1
+bcm_tunnel_term_compatible_mode: 1
+sai_field_group_auto_prioritize: 1
+sai_port_queue_ecn_counter: 1
diff --git a/device/celestica/x86_64-cel_midstone-r0/platform_asic b/device/celestica/x86_64-cel_midstone-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/celestica/x86_64-cel_midstone-r0/platform_asic
+++ b/device/celestica/x86_64-cel_midstone-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/delta/x86_64-delta_agc032-r0/platform_asic b/device/delta/x86_64-delta_agc032-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/delta/x86_64-delta_agc032-r0/platform_asic
+++ b/device/delta/x86_64-delta_agc032-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..b9aabeb8706b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+e48527ad3f7bc5db09ec1fe078eba9a1
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..80434c00be65
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml
@@ -0,0 +1,3990 @@
+
+
+
+
+
+ std-string
+ string
+ standard string.
+ 1
+ 100
+
+
+ board-callback-type
+ enumeration
+ Specifies os/ext drv callback types.
+
+ linux-static
+ Linux Static
+ 0
+
+
+ linux-shared
+ Linux Shared Lib mode
+ 1
+
+
+ external
+ External Os
+ 3
+
+
+ freeBsd
+ Free BSD
+ 4
+
+
+
+ board-pp-map-type
+ enumeration
+ Specifies pci info types.
+
+ fixed
+ Fixed
+ 0
+
+
+ autoscan
+ Auto scan
+ 1
+
+
+
+ board-pp-interface-channel-type
+ enumeration
+ Specifies channel interface type.
+
+ pci
+ PCI
+ 0
+
+
+ smi
+ SMI
+ 1
+
+
+ twsi
+ TWSI
+ 2
+
+
+
+ board-pp-as-type
+ enumeration
+ Specifies Address space type.
+
+ 4_regions
+ address-space 4 regions
+ 0
+
+
+ 8_regions
+ address-space 8 regions
+ 1
+
+
+ atu
+ address translation unit
+ 2
+
+
+
+ device-id-type
+ uint32
+ Device ID 0..1
+ 0
+ 1
+
+
+ port-mapping-type
+ enumeration
+ Specifies port map type.
+
+ ethernet_mac
+ ETHERNET_MAC
+ 0
+
+
+ cpu_sdma
+ CPU_SDMA
+ 1
+
+
+
+ interface-num-type
+ uint32
+ Interface number
+ 0
+ 1023
+
+
+ txq-port-number-type
+ uint32
+ TXq port number
+ 0
+ 99
+
+
+ phy-smi-interface-type
+ uint32
+ Phy SMI interface type.
+ 0
+ 3
+
+
+ phy-xsmi-interface-type
+ uint32
+ Phy XSMI interface type.
+ 0
+ 15
+
+
+ phy-type
+ enumeration
+ Specifies the PHY Part Identifier.
+
+ NA
+ No Phy
+ 0
+
+
+ alaska-88E1680
+ Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.
+ 1
+
+
+ alaska-88E1780
+ Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver
+ 2
+
+
+ alaska-88E2540
+ Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support
+ 3
+
+
+ alaska-88E2580
+ Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support
+ 4
+
+
+ alaska-88E2780
+ Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support
+ 5
+
+
+
+ physical-port-num-type
+ uint32
+ PHYSICAL PORT NUM
+ 0
+ 1023
+
+
+ led-stream-port-type
+ enumeration
+ Specifies the ledstream port type.
+
+ PORT_TYPE_TRI_SPEED
+ tri-speed port.
+ 1
+
+
+ PORT_TYPE_XG
+ XG port.
+ 2
+
+
+
+ led-stream-blink-select-type
+ enumeration
+ Specifies the LED stream blink select type.
+
+ BLINK_SELECT_0
+ Blink 0 signal.
+ 1
+
+
+ BLINK_SELECT_1
+ Blink 1 signal
+ 2
+
+
+
+ led-stream-order-mode-type
+ enumeration
+ Specifies the LED stream ordering mode.
+
+ ORDER_MODE_BY_PORT
+ the indication order is arranged by port.
+ 1
+
+
+ ORDER_MODE_BY_CLASS
+ the indication order is arranged by class.
+ 2
+
+
+
+ led-stream-blink-duty-cycle-type
+ enumeration
+ Specifies the LED stream blink cycle duty cycle type.
+
+ BLINK_DUTY_CYCLE_0
+ 25% on, 75% off.
+ 1
+
+
+ BLINK_DUTY_CYCLE_1
+ 50% on, 50% off.
+ 2
+
+
+ BLINK_DUTY_CYCLE_2
+ 50% on, 50% off.
+ 3
+
+
+ BLINK_DUTY_CYCLE_3
+ 75% on, 25% off.
+ 4
+
+
+
+ led-stream-blink-duration-type
+ enumeration
+ Specifies the LED stream blink period type.
+
+ BLINK_DURATION_0
+ BLINK_DURATION_0.
+ 1
+
+
+ BLINK_DURATION_1
+ BLINK_DURATION_1.
+ 2
+
+
+ BLINK_DURATION_2
+ BLINK_DURATION_2.
+ 3
+
+
+ BLINK_DURATION_3
+ BLINK_DURATION_3.
+ 4
+
+
+ BLINK_DURATION_4
+ BLINK_DURATION_4.
+ 5
+
+
+ BLINK_DURATION_5
+ BLINK_DURATION_5.
+ 6
+
+
+ BLINK_DURATION_6
+ (APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .
+ 7
+
+
+ BLINK_DURATION_7
+ APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).
+ 8
+
+
+
+ led-stream-pulse-stretch-type
+ enumeration
+ Specifies the LED stream length of stretching for dynamic signals.
+
+ PULSE_STRETCH_0_NO
+ PULSE_STRETCH_0_NO.
+ 1
+
+
+ PULSE_STRETCH_1
+ PULSE_STRETCH_1.
+ 2
+
+
+ PULSE_STRETCH_2
+ PULSE_STRETCH_2.
+ 3
+
+
+ PULSE_STRETCH_3
+ PULSE_STRETCH_3.
+ 4
+
+
+ PULSE_STRETCH_4
+ PULSE_STRETCH_4.
+ 5
+
+
+ PULSE_STRETCH_5
+ PULSE_STRETCH_5.
+ 6
+
+
+ PULSE_STRETCH_6
+ (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).
+ 7
+
+
+ PULSE_STRETCH_7
+ (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).
+ 8
+
+
+
+ led-stream-clock-out-frequency-type
+ enumeration
+ Specifies the LED stream blink cycle duty cycle type.
+
+ _CLOCK_OUT_FREQUENCY_500
+ 500 KHz LED clock frequency.
+ 1
+
+
+ CLOCK_OUT_FREQUENCY_1000
+ 1 MHz LED clock frequency.
+ 2
+
+
+ CLOCK_OUT_FREQUENCY_2000
+ 2 MHz LED clock frequency.
+ 3
+
+
+ CLOCK_OUT_FREQUENCY_3000
+ 3 MHz LED clock frequency.
+ 4
+
+
+
+ led-stream-class5-select-type
+ enumeration
+ Specifies the LED stream indication displayed on class5 (for dual-media port/phy).
+
+ CLASS_5_SELECT_HALF_DUPLEX
+ Half Duplex is displayed on class5.
+ 1
+
+
+ CLASS_5_SELECT_FIBER_LINK_UP
+ If port is a dual media port, Fiber Link Up is displayed on class5.
+ 2
+
+
+
+ led-stream-class13-select-type
+ enumeration
+ Specifies the LED stream indication displayed on class13 (for dual-media port/phy).
+
+ CLASS_13_SELECT_LINK_DOWN
+ Link Down is displayed on class13.
+ 1
+
+
+ CLASS_13_SELECT_COPPER_LINK_UP
+ If port is a dual media port, Copper Link Up is displayed on class13.
+ 2
+
+
+
+ led-class-num-type
+ uint32
+ Led Class number
+ 0
+ 11
+
+
+ boolean-type
+ enumeration
+ Boolean 32 bits , due to bing endian
+
+ false
+ False
+ 0
+
+
+ true
+ True
+ 1
+
+
+
+ bus-id-type
+ uint32
+ Bus Id Type, PCI/SMI
+ 0
+ 255
+
+
+ function-id-type
+ uint32
+ Function Id Type, PCI/SMI
+ 0
+ 255
+
+
+ domain-type
+ uint32
+ Domain, PCI/SMI
+ 0
+ 255
+
+
+ led-interface-type
+ uint32
+ Led interface
+ 0
+ 255
+
+
+ led-position-type
+ uint32
+ Led position
+ 0
+ 63
+
+
+ serdes-lane-type
+ uint32
+ serdes lane
+ 0
+ 7
+
+
+ cpu-type
+ enumeration
+ The CPU Internal/External
+
+ external
+ Extrenal connected CPU
+ 0
+
+
+ internal
+ Internal CPU
+ 1
+
+
+
+ led-stream-clock-frequency-type
+ uint32
+ Led Clock Frequency Sip6
+ 500
+ 80000
+
+
+ led-unit-type
+ uint32
+ Led units
+ 1
+ 16
+
+
+ led-unit-or-no-unit-type
+ uint32
+ Led units, 0 for no Unit
+ 0
+ 16
+
+
+ led-group-type
+ uint32
+ Led Group
+ 0
+ 1
+
+
+ led-stream-force-data-type
+ string
+ A hexadecimal string with octets represented as hex digits
+separated by colons. The canonical representation uses
+lowercase characters.
+ 3
+ 11
+
+
+ bit-type
+ uint32
+ Bit range 0..31
+ 0
+ 31
+
+
+ bit-size-type
+ uint32
+ Bit leng 1..32
+ 1
+ 32
+
+
+ led-sip-type
+ enumeration
+ The LED scehme
+
+ na
+ NA
+ 0
+
+
+ sip5
+ SIP5: AC3x
+ 5
+
+
+ sip6
+ SIP6: Falcon, AC5x
+ 6
+
+
+
+ port-cscd-type
+ enumeration
+ Specifies the cascade port type.
+
+ DSA_1_WORD
+ DSA Regular
+ 0
+
+
+ DSA_2_WORDS
+ DSA Extended
+ 1
+
+
+ NETWORK
+ Network.
+ 2
+
+
+ DSA_3_WORDS
+ DSA 3 Words
+ 3
+
+
+ DSA_4_WORD
+ DSA 4 Words
+ 4
+
+
+
+ trunk-cscd-type
+ uint32
+ Specifies the Cascade Trunk id.
+ 0
+ 127
+
+
+ port-trunk-cscd-type
+ enumeration
+ Specifies the cascade port type.
+
+ cscdPort
+ Cascade port
+ 0
+
+
+ cscdTrunk
+ Csacde trunk
+ 1
+
+
+
+ hash-cscd-type
+ enumeration
+ Specifies the hash used by cascade trunk.
+
+ pkt
+ Hash based on packet
+ 0
+
+
+ srcPort
+ Hash based on source port
+ 1
+
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ mpp-num-type
+ uint8
+ Specifies the MPP pin number.
+ 0
+ 63
+
+
+ mpp-select-type
+ uint8
+ Specifies the MPP pin value.
+ 0
+ 15
+
+
+ ASIC_Falcon
+ Falcon-3.2T-128x25G
+ linux-static
+ linux-static
+ autoscan
+ external
+ pci
+ atu
+
+ 0
+ 0
+ ASK-PP-F3_2T-128x25G.xml
+ ASK-L1-F3_2T-128x25G.xml
+ sip6
+
+ 0
+
+ ethernet_mac
+ 0
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 1
+
+ ethernet_mac
+ 1
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 2
+
+ ethernet_mac
+ 2
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 3
+
+ ethernet_mac
+ 3
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 4
+
+ ethernet_mac
+ 4
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 5
+
+ ethernet_mac
+ 5
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 6
+
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+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 72
+
+ ethernet_mac
+ 69
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 71
+
+ ethernet_mac
+ 68
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 131
+
+ ethernet_mac
+ 128
+ false
+
+
+ NA
+
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 132
+
+ ethernet_mac
+ 135
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 63
+
+ cpu_sdma
+ 136
+ false
+
+
+
+ 133
+
+ cpu_sdma
+ 137
+ false
+
+
+
+ 134
+
+ cpu_sdma
+ 138
+ false
+
+
+
+ 135
+
+ cpu_sdma
+ 139
+ false
+
+
+
+ 7
+ true
+ false
+
+
+ 1
+ true
+ false
+
+
+ 6
+ true
+ true
+
+
+ 0
+ true
+ false
+
+
+ 5
+ true
+ false
+
+
+ 3
+ true
+ true
+
+
+ 4
+ true
+ true
+
+
+ 2
+ false
+ false
+
+
+ 8
+ false
+ true
+
+
+ 14
+ false
+ false
+
+
+ 9
+ false
+ false
+
+
+ 15
+ false
+ true
+
+
+ 10
+ false
+ true
+
+
+ 12
+ false
+ true
+
+
+ 11
+ true
+ false
+
+
+ 13
+ false
+ true
+
+
+ 23
+ false
+ false
+
+
+ 17
+ false
+ false
+
+
+ 22
+ true
+ false
+
+
+ 16
+ false
+ true
+
+
+ 21
+ false
+ false
+
+
+ 19
+ true
+ true
+
+
+ 20
+ true
+ false
+
+
+ 18
+ false
+ true
+
+
+ 24
+ false
+ false
+
+
+ 30
+ false
+ false
+
+
+ 25
+ false
+ true
+
+
+ 31
+ false
+ false
+
+
+ 26
+ true
+ false
+
+
+ 28
+ false
+ true
+
+
+ 27
+ false
+ true
+
+
+ 29
+ false
+ true
+
+
+ 39
+ false
+ false
+
+
+ 33
+ true
+ false
+
+
+ 38
+ false
+ false
+
+
+ 32
+ false
+ false
+
+
+ 37
+ true
+ false
+
+
+ 35
+ true
+ true
+
+
+ 36
+ true
+ false
+
+
+ 34
+ false
+ false
+
+
+ 40
+ false
+ false
+
+
+ 41
+ true
+ true
+
+
+ 46
+ true
+ true
+
+
+ 47
+ true
+ true
+
+
+ 42
+ true
+ false
+
+
+ 44
+ false
+ false
+
+
+ 43
+ false
+ true
+
+
+ 45
+ true
+ false
+
+
+ 55
+ false
+ false
+
+
+ 49
+ true
+ false
+
+
+ 54
+ true
+ true
+
+
+ 48
+ false
+ true
+
+
+ 53
+ true
+ false
+
+
+ 51
+ false
+ true
+
+
+ 52
+ false
+ true
+
+
+ 50
+ false
+ true
+
+
+ 56
+ false
+ false
+
+
+ 62
+ true
+ false
+
+
+ 57
+ false
+ true
+
+
+ 63
+ true
+ true
+
+
+ 58
+ false
+ false
+
+
+ 60
+ false
+ true
+
+
+ 59
+ false
+ true
+
+
+ 61
+ false
+ true
+
+
+ 71
+ false
+ false
+
+
+ 65
+ true
+ false
+
+
+ 70
+ false
+ true
+
+
+ 64
+ true
+ true
+
+
+ 69
+ true
+ false
+
+
+ 67
+ true
+ true
+
+
+ 68
+ true
+ true
+
+
+ 66
+ true
+ true
+
+
+ 72
+ true
+ false
+
+
+ 78
+ false
+ false
+
+
+ 73
+ false
+ true
+
+
+ 79
+ true
+ true
+
+
+ 74
+ true
+ false
+
+
+ 76
+ true
+ true
+
+
+ 75
+ true
+ true
+
+
+ 77
+ false
+ true
+
+
+ 87
+ false
+ false
+
+
+ 81
+ false
+ false
+
+
+ 86
+ false
+ false
+
+
+ 80
+ true
+ false
+
+
+ 85
+ false
+ true
+
+
+ 83
+ true
+ true
+
+
+ 84
+ true
+ false
+
+
+ 82
+ false
+ false
+
+
+ 88
+ true
+ false
+
+
+ 94
+ true
+ false
+
+
+ 89
+ false
+ false
+
+
+ 95
+ true
+ false
+
+
+ 90
+ true
+ false
+
+
+ 92
+ false
+ true
+
+
+ 91
+ false
+ false
+
+
+ 93
+ false
+ false
+
+
+ 103
+ true
+ false
+
+
+ 97
+ true
+ false
+
+
+ 102
+ true
+ false
+
+
+ 96
+ true
+ true
+
+
+ 101
+ true
+ false
+
+
+ 99
+ true
+ true
+
+
+ 100
+ true
+ true
+
+
+ 98
+ false
+ true
+
+
+ 104
+ true
+ false
+
+
+ 110
+ false
+ false
+
+
+ 105
+ true
+ true
+
+
+ 111
+ true
+ false
+
+
+ 106
+ true
+ false
+
+
+ 108
+ false
+ false
+
+
+ 107
+ false
+ true
+
+
+ 109
+ true
+ false
+
+
+ 119
+ true
+ false
+
+
+ 113
+ true
+ true
+
+
+ 118
+ true
+ true
+
+
+ 112
+ true
+ false
+
+
+ 117
+ true
+ false
+
+
+ 115
+ false
+ false
+
+
+ 116
+ true
+ false
+
+
+ 114
+ false
+ false
+
+
+ 120
+ false
+ false
+
+
+ 126
+ false
+ false
+
+
+ 121
+ false
+ true
+
+
+ 127
+ false
+ true
+
+
+ 122
+ true
+ false
+
+
+ 124
+ false
+ true
+
+
+ 123
+ false
+ true
+
+
+ 125
+ false
+ true
+
+
+ 128
+ false
+ true
+
+
+ 135
+ true
+ false
+
+
+ 0
+
+ ORDER_MODE_BY_CLASS
+ BLINK_DUTY_CYCLE_0
+ BLINK_DURATION_0
+ BLINK_DUTY_CYCLE_0
+ BLINK_DURATION_1
+ PULSE_STRETCH_1
+ false
+ 1627
+ false
+
+ 1
+ 64
+ 66
+ false
+
+
+ 2
+ 64
+ 65
+ false
+
+
+ 3
+ 64
+ 65
+ false
+
+
+ 4
+ 64
+ 66
+ false
+
+
+ 5
+ 64
+ 66
+ false
+
+
+ 6
+ 64
+ 65
+ false
+
+
+ 7
+ 64
+ 65
+ false
+
+
+ 8
+ 64
+ 66
+ false
+
+
+
+ 0
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 1
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 2
+ PORT_TYPE_XG
+ true
+ BLINK_SELECT_0
+ false
+ true
+ true
+
+
+ 3
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 4
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 5
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+
+ /tmp/cpss_uds
+
+ 8
+
+ MAP0
+
+ 7
+
+
+ 1
+
+
+ 6
+
+
+ 0
+
+
+ 5
+
+
+ 3
+
+
+ 4
+
+
+ 2
+
+
+
+ MAP1
+
+ 0
+
+
+ 6
+
+
+ 1
+
+
+ 7
+
+
+ 2
+
+
+ 4
+
+
+ 3
+
+
+ 5
+
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..084f63926d4c
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+baf77e7f450def2266516782d159cbb4
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7a2208bf90ec
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml
@@ -0,0 +1,1891 @@
+
+
+
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ interface-mode-type
+ enumeration
+ Specifies supported Interface modes
+
+ 1000BASE_X
+ 1G
+ 6
+
+
+ SGMII
+ 1G , 2.5G
+ 3
+
+
+ QSGMII
+ 1G
+ 13
+
+
+ KR
+ 10G, 12G, 20G, 40G, 100G
+ 16
+
+
+ SR_LR
+ 5G, 10G, 12G, 20G, 40G
+ 20
+
+
+ KR2
+
+ 27
+
+
+ KR4
+
+ 28
+
+
+ SR_LR2
+
+ 29
+
+
+ SR_LR4
+ 100G
+ 30
+
+
+ KR_C
+ CONSORTIUM - 25G
+ 32
+
+
+ CR_C
+ CONSORTIUM - 25G
+ 33
+
+
+ KR2_C
+ CONSORTIUM - 50G
+ 34
+
+
+ CR2_C
+ CONSORTIUM - 50G
+ 35
+
+
+ CR
+
+ 36
+
+
+ CR2
+
+ 37
+
+
+ CR4
+
+ 38
+
+
+ KR_S
+
+ 39
+
+
+ CR_S
+
+ 40
+
+
+ KR8
+
+ 41
+
+
+ CR8
+
+ 42
+
+
+ SR_LR8
+
+ 43
+
+
+ USX_10G_QXGMII
+
+ 51
+
+
+ USX_20G_QXGMII
+
+ 52
+
+
+ USX_OUSGMII
+
+ 53
+
+
+ USX_20G_OXGMII
+
+ 54
+
+
+ NA
+
+ 57
+
+
+
+ port-speed-type
+ enumeration
+ Specifies supported speeds
+
+ 1G
+ 1G
+ 2
+
+
+ 10G
+ 10G
+ 3
+
+
+ 2500M
+ 2.5G
+ 5
+
+
+ 5G
+ 5G
+ 6
+
+
+ 25G
+ 25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E
+ 21
+
+
+ 40G
+ 40G
+ 9
+
+
+ 50G
+ 50G
+ 14
+
+
+ 100G
+ 100G
+ 13
+
+
+ 200G
+ 200G
+ 24
+
+
+ 400G
+ 400G
+ 25
+
+
+ NA
+ NA
+ 35
+
+
+
+ fec-type
+ enumeration
+ Rx parameter type
+
+ enabled
+ Enabled
+ 0
+
+
+ disabled
+ Disabled
+ 1
+
+
+ rs_enabled
+ RS FEC enabled
+ 2
+
+
+ both_enabled
+ Both enabled
+ 3
+
+
+ rs_544_514_enabled
+ RS FEC 544 and 514
+ 4
+
+
+
+ physical-port-num-type
+ uint32
+ PHYSICAL PORT NUM
+ 0
+ 1023
+
+
+ tx-param-type
+ enumeration
+ Tx parameter type
+
+ pre
+ pre
+ 0
+
+
+ post
+ post
+ 1
+
+
+ peak
+ peak
+ 2
+
+
+
+ rx-param-type
+ enumeration
+ Rx parameter type
+
+ dataRate
+ dataRate
+ 0
+
+
+ res1Sel
+ res1Sel
+ 1
+
+
+ res2Sel
+ res2Sel
+ 2
+
+
+ cap1Sel
+ cap1Sel
+ 3
+
+
+ cap2Sel
+ cap2Sel
+ 4
+
+
+ minCap
+ minCap
+ 5
+
+
+ minCapN
+ minCapN
+ 6
+
+
+ sumfBoostTargetC0
+ sumfBoostTargetC0
+ 7
+
+
+ sumfBoostTargetC1
+ sumfBoostTargetC1
+ 8
+
+
+ sumfBoostTargetC2
+ sumfBoostTargetC2
+ 9
+
+
+ midpointPhaseOs0
+ midpointPhaseOs0
+ 10
+
+
+ midpointPhaseOs1
+ midpointPhaseOs1
+ 11
+
+
+ midpointPhaseOs2
+ midpointPhaseOs2
+ 12
+
+
+ selmufi
+ selmufi
+ 13
+
+
+ selmuff
+ selmuff
+ 14
+
+
+ selmupi
+ selmupi
+ 15
+
+
+ selmupf
+ selmupf
+ 16
+
+
+ midpointLargeThresKLane
+ midpointLargeThresKLane
+ 17
+
+
+ midpointSmallThresKLane
+ midpointSmallThresKLane
+ 18
+
+
+ midpointLargeThresCLane
+ midpointLargeThresCLane
+ 19
+
+
+ midpointSmallThresCLane
+ midpointSmallThresCLane
+ 20
+
+
+ inxSumfMidpointAdatptiveEnLane
+ inxSumfMidpointAdatptiveEnLane
+ 21
+
+
+ dfeResF0aHighThresInitLane
+ dfeResF0aHighThresInitLane
+ 22
+
+
+ dfeResF0aHighThresEndLane
+ dfeResF0aHighThresEndLane
+ 23
+
+
+ squelch
+ squelch
+ 24
+
+
+ align90
+ align90
+ 25
+
+
+ sampler
+ sampler
+ 26
+
+
+ slewRateCtrl0
+ slewRateCtrl0
+ 27
+
+
+ slewRateCtrl1
+ slewRateCtrl1
+ 28
+
+
+ EO
+ EO
+ 29
+
+
+ minCap1
+ minCap1
+ 30
+
+
+ maxCap1
+ maxCap1
+ 31
+
+
+ minRes1
+ minRes1
+ 32
+
+
+ maxRes1
+ maxRes1
+ 33
+
+
+
+ boolean-type
+ enumeration
+ Boolean 32 bits , due to big endian
+
+ false
+ False
+ 0
+
+
+ true
+ True
+ 1
+
+
+
+ serdes-type
+ enumeration
+ Serdes Type
+
+ NA
+ No serdes
+ 0
+
+
+ AVAGO
+ AVAGO
+ 1
+
+
+ COMPHY
+ COMPHY
+ 2
+
+
+ COMPHY_C12G
+ COMPHY_C12G
+ 3
+
+
+ COMPHY_C28G
+ COMPHY_C28G
+ 4
+
+
+ COMPHY_C112G
+ COMPHY_C112G
+ 5
+
+
+
+ phy-serdes-type
+ enumeration
+ Phy Serdes Type
+
+ NA
+ No serdes
+ 0
+
+
+ COMPHY
+ COMPHY
+ 1
+
+
+ COMPHY_C28G
+ COMPHY_C28G
+ 2
+
+
+
+ port-interconnect-profile-type
+ enumeration
+ Enumerator of interconnect profile.
+
+ profile_default
+ Profile Default
+ 0
+
+
+ profile_1
+ Profile 1
+ 1
+
+
+ profile_2
+ Profile 2
+ 2
+
+
+
+ ASIC_Falcon
+
+
+ 100GR2
+
+ CR2
+ 100G
+ rs_544_514_enabled
+
+
+ KR2
+ 100G
+ rs_544_514_enabled
+
+
+ SR_LR2
+ 100G
+ rs_544_514_enabled
+
+
+ SR_LR2
+ 50G
+ rs_enabled
+
+
+ CR2
+ 50G
+ rs_enabled
+
+
+ KR2
+ 50G
+ rs_enabled
+
+
+ CR2
+ 100G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR2
+ 100G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ CR2
+ 50G
+ rs_enabled
+ rs_enabled
+
+
+ KR2
+ 50G
+ rs_enabled
+ rs_enabled
+
+
+
+ 100GR4
+
+ CR4
+ 100G
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+
+
+ SR_LR4
+ 100G
+ rs_enabled
+
+
+ CR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+
+ 10GR1
+
+ KR
+ 10G
+ enabled
+
+
+ SR_LR
+ 10G
+ enabled
+
+
+ KR
+ 10G
+ enabled
+ enabled
+
+
+
+ 10GR1Fix
+
+ KR
+ 10G
+ disabled
+
+
+
+ 200GR4
+
+ CR4
+ 200G
+ rs_544_514_enabled
+
+
+ SR_LR4
+ 100G
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+
+
+ CR4
+ 100G
+ rs_enabled
+
+
+ KR4
+ 200G
+ rs_544_514_enabled
+
+
+ SR_LR4
+ 200G
+ rs_544_514_enabled
+
+
+ CR4
+ 200G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR4
+ 200G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ CR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+
+ 25GR1
+
+ CR
+ 25G
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+
+
+ SR_LR
+ 25G
+ rs_enabled
+
+
+ SR_LR
+ 10G
+ enabled
+
+
+ CR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+ enabled
+
+
+
+ 400GR8
+
+ CR8
+ 400G
+ rs_544_514_enabled
+
+
+ KR8
+ 400G
+ rs_544_514_enabled
+
+
+ SR_LR8
+ 400G
+ rs_544_514_enabled
+
+
+ CR8
+ 400G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR8
+ 400G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+
+ 50GR1
+
+ CR
+ 50G
+ rs_544_514_enabled
+
+
+ KR
+ 50G
+ rs_544_514_enabled
+
+
+ CR
+ 25G
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+
+
+ SR_LR
+ 50G
+ rs_544_514_enabled
+
+
+ SR_LR
+ 25G
+ rs_enabled
+
+
+ SR_LR
+ 10G
+ enabled
+
+
+ CR
+ 50G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR
+ 50G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ CR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+ enabled
+
+
+
+
+
+ 0
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 0
+ 25GR1
+
+ 100GR4
+
+
+
+ 1
+ 25GR1
+
+
+
+
+
+ 2
+ 25GR1
+
+
+
+
+
+ 3
+ 25GR1
+
+
+
+
+
+ 4
+ 25GR1
+
+ 100GR4
+
+
+
+ 5
+ 25GR1
+
+
+
+
+
+ 6
+ 25GR1
+
+
+
+
+
+ 7
+ 25GR1
+
+
+
+
+
+
+ 8
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 8
+ 25GR1
+
+ 100GR4
+
+
+
+ 9
+ 25GR1
+
+
+
+
+
+ 10
+ 25GR1
+
+
+
+
+
+ 11
+ 25GR1
+
+
+
+
+
+ 12
+ 25GR1
+
+ 100GR4
+
+
+
+ 13
+ 25GR1
+
+
+
+
+
+ 14
+ 25GR1
+
+
+
+
+
+ 15
+ 25GR1
+
+
+
+
+
+
+ 16
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 16
+ 25GR1
+
+ 100GR4
+
+
+
+ 17
+ 25GR1
+
+
+
+
+
+ 18
+ 25GR1
+
+
+
+
+
+ 19
+ 25GR1
+
+
+
+
+
+ 20
+ 25GR1
+
+ 100GR4
+
+
+
+ 21
+ 25GR1
+
+
+
+
+
+ 22
+ 25GR1
+
+
+
+
+
+ 23
+ 25GR1
+
+
+
+
+
+
+ 24
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 24
+ 25GR1
+
+ 100GR4
+
+
+
+ 25
+ 25GR1
+
+
+
+
+
+ 26
+ 25GR1
+
+
+
+
+
+ 27
+ 25GR1
+
+
+
+
+
+ 28
+ 25GR1
+
+ 100GR4
+
+
+
+ 29
+ 25GR1
+
+
+
+
+
+ 30
+ 25GR1
+
+
+
+
+
+ 31
+ 25GR1
+
+
+
+
+
+
+ 32
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 32
+ 25GR1
+
+ 100GR4
+
+
+
+ 33
+ 25GR1
+
+
+
+
+
+ 34
+ 25GR1
+
+
+
+
+
+ 35
+ 25GR1
+
+
+
+
+
+ 36
+ 25GR1
+
+ 100GR4
+
+
+
+ 37
+ 25GR1
+
+
+
+
+
+ 38
+ 25GR1
+
+
+
+
+
+ 39
+ 25GR1
+
+
+
+
+
+
+ 40
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 40
+ 25GR1
+
+ 100GR4
+
+
+
+ 41
+ 25GR1
+
+
+
+
+
+ 42
+ 25GR1
+
+
+
+
+
+ 43
+ 25GR1
+
+
+
+
+
+ 44
+ 25GR1
+
+ 100GR4
+
+
+
+ 45
+ 25GR1
+
+
+
+
+
+ 46
+ 25GR1
+
+
+
+
+
+ 47
+ 25GR1
+
+
+
+
+
+
+ 48
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 48
+ 25GR1
+
+ 100GR4
+
+
+
+ 49
+ 25GR1
+
+
+
+
+
+ 50
+ 25GR1
+
+
+
+
+
+ 51
+ 25GR1
+
+
+
+
+
+ 52
+ 25GR1
+
+ 100GR4
+
+
+
+ 53
+ 25GR1
+
+
+
+
+
+ 54
+ 25GR1
+
+
+
+
+
+ 55
+ 25GR1
+
+
+
+
+
+
+ 56
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 56
+ 25GR1
+
+ 100GR4
+
+
+
+ 57
+ 25GR1
+
+
+
+
+
+ 58
+ 25GR1
+
+
+
+
+
+ 59
+ 25GR1
+
+
+
+
+
+ 60
+ 25GR1
+
+ 100GR4
+
+
+
+ 64
+ 25GR1
+
+
+
+
+
+ 65
+ 25GR1
+
+
+
+
+
+ 66
+ 25GR1
+
+
+
+
+
+
+ 67
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 67
+ 25GR1
+
+ 100GR4
+
+
+
+ 68
+ 25GR1
+
+
+
+
+
+ 69
+ 25GR1
+
+
+
+
+
+ 70
+ 25GR1
+
+
+
+
+
+ 71
+ 25GR1
+
+ 100GR4
+
+
+
+ 72
+ 25GR1
+
+
+
+
+
+ 73
+ 25GR1
+
+
+
+
+
+ 74
+ 25GR1
+
+
+
+
+
+
+ 75
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 75
+ 25GR1
+
+ 100GR4
+
+
+
+ 76
+ 25GR1
+
+
+
+
+
+ 77
+ 25GR1
+
+
+
+
+
+ 78
+ 25GR1
+
+
+
+
+
+ 79
+ 25GR1
+
+ 100GR4
+
+
+
+ 80
+ 25GR1
+
+
+
+
+
+ 81
+ 25GR1
+
+
+
+
+
+ 82
+ 25GR1
+
+
+
+
+
+
+ 83
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 83
+ 25GR1
+
+ 100GR4
+
+
+
+ 84
+ 25GR1
+
+
+
+
+
+ 85
+ 25GR1
+
+
+
+
+
+ 86
+ 25GR1
+
+
+
+
+
+ 87
+ 25GR1
+
+ 100GR4
+
+
+
+ 88
+ 25GR1
+
+
+
+
+
+ 89
+ 25GR1
+
+
+
+
+
+ 90
+ 25GR1
+
+
+
+
+
+
+ 91
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 91
+ 25GR1
+
+ 100GR4
+
+
+
+ 92
+ 25GR1
+
+
+
+
+
+ 93
+ 25GR1
+
+
+
+
+
+ 94
+ 25GR1
+
+
+
+
+
+ 95
+ 25GR1
+
+ 100GR4
+
+
+
+ 96
+ 25GR1
+
+
+
+
+
+ 97
+ 25GR1
+
+
+
+
+
+ 98
+ 25GR1
+
+
+
+
+
+
+ 99
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 99
+ 25GR1
+
+ 100GR4
+
+
+
+ 100
+ 25GR1
+
+
+
+
+
+ 101
+ 25GR1
+
+
+
+
+
+ 102
+ 25GR1
+
+
+
+
+
+ 103
+ 25GR1
+
+ 100GR4
+
+
+
+ 104
+ 25GR1
+
+
+
+
+
+ 105
+ 25GR1
+
+
+
+
+
+ 106
+ 25GR1
+
+
+
+
+
+
+ 107
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 107
+ 25GR1
+
+ 100GR4
+
+
+
+ 108
+ 25GR1
+
+
+
+
+
+ 109
+ 25GR1
+
+
+
+
+
+ 110
+ 25GR1
+
+
+
+
+
+ 111
+ 25GR1
+
+ 100GR4
+
+
+
+ 112
+ 25GR1
+
+
+
+
+
+ 113
+ 25GR1
+
+
+
+
+
+ 114
+ 25GR1
+
+
+
+
+
+
+ 115
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 115
+ 25GR1
+
+ 100GR4
+
+
+
+ 116
+ 25GR1
+
+
+
+
+
+ 117
+ 25GR1
+
+
+
+
+
+ 118
+ 25GR1
+
+
+
+
+
+ 119
+ 25GR1
+
+ 100GR4
+
+
+
+ 120
+ 25GR1
+
+
+
+
+
+ 121
+ 25GR1
+
+
+
+
+
+ 122
+ 25GR1
+
+
+
+
+
+
+ 123
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 123
+ 25GR1
+
+ 100GR4
+
+
+
+ 124
+ 25GR1
+
+
+
+
+
+ 125
+ 25GR1
+
+
+
+
+
+ 126
+ 25GR1
+
+
+
+
+
+ 127
+ 25GR1
+
+ 100GR4
+
+
+
+ 128
+ 25GR1
+
+
+
+
+
+ 129
+ 25GR1
+
+
+
+
+
+ 130
+ 25GR1
+
+
+
+
+
+
+ 131
+ AVAGO
+ profile_default
+ 10GR1Fix
+ false
+
+
+ 132
+ AVAGO
+ profile_default
+ 10GR1Fix
+ false
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..4c6962b96910
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+9699d7ac6395ccab96dec333c782dc1d
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7cd85e016983
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml
@@ -0,0 +1,1180 @@
+
+
+
+
+
+ std-string
+ string
+ standard string.
+ 1
+ 100
+
+
+ queue-id-type
+ uint32
+ Queue id
+ 0
+ 7
+
+
+ precent-type
+ uint32
+ Precent
+ 0
+ 100
+
+
+ phaThreadId-type
+ uint32
+ Thread id
+ 1
+ 255
+
+
+ routing-mode-type
+ enumeration
+ Specifies routing mode.
+
+ POLICY_BASED_ROUTING_ONLY
+ PBR only
+ 0
+
+
+ TCAM_ROUTER_BASED
+ Router engine or PBR
+ 1
+
+
+
+ shared-table-mode-type
+ enumeration
+ Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)
+
+ MID_L3_MID_L2_NO_EM
+ MID_L3_MID_L2_NO_EM
+ 0
+
+
+ MID_L3_MID_L2_MIN_EM
+ MID_L3_MID_L2_MIN_EM
+ 1
+
+
+ LOW_MAX_L3_MID_LOW_L2_NO_EM
+ LOW_MAX_L3_MID_LOW_L2_NO_EM
+ 2
+
+
+ MAX_L3_MIN_L2_NO_EM
+ MAX_L3_MIN_L2_NO_EM
+ 3
+
+
+
+ pha-firmware-image-id-type
+ enumeration
+ Specifies supported Pha image id
+
+ DEFAULT
+ Default PHA firmware image ID
+ 0
+
+
+ 01
+ 01 firmware image ID
+ 1
+
+
+ 02
+ 02 PHA firmware image ID
+ 2
+
+
+
+ pha-firmware-thread-type
+ enumeration
+ Specifies supported Pha thread type
+
+ IOAM_INGRESS_SWITCH_IPV4
+ IOAM_INGRESS_SWITCH_IPV4
+ 1
+
+
+ IOAM_INGRESS_SWITCH_IPV6
+ IOAM_INGRESS_SWITCH_IPV6
+ 2
+
+
+ IOAM_TRANSIT_SWITCH_IPV4
+ IOAM_TRANSIT_SWITCH_IPV4
+ 3
+
+
+ IOAM_TRANSIT_SWITCH_IPV6
+ IOAM_TRANSIT_SWITCH_IPV6
+ 4
+
+
+ INT_IOAM_MIRRORING
+ INT_IOAM_MIRRORING
+ 5
+
+
+ INT_IOAM_EGRESS_SWITCH
+ INT_IOAM_EGRESS_SWITCH
+ 6
+
+
+ MPLS_SR_NO_EL
+ MPLS_SR_NO_EL
+ 7
+
+
+ MPLS_SR_ONE_EL
+ MPLS_SR_ONE_EL
+ 8
+
+
+ MPLS_SR_TWO_EL
+ MPLS_SR_TWO_EL
+ 9
+
+
+ MPLS_SR_THREE_EL
+ MPLS_SR_THREE_EL
+ 10
+
+
+ UNIFIED_SR
+ UNIFIED_SR
+ 11
+
+
+ CLASSIFIER_NSH_OVER_ETHERNET
+ CLASSIFIER_NSH_OVER_ETHERNET
+ 12
+
+
+ CLASSIFIER_NSH_OVER_VXLAN_GPE
+ CLASSIFIER_NSH_OVER_VXLAN_GPE
+ 13
+
+
+ SFF_NSH_VXLAN_GPE_TO_ETHERNET
+ SFF_NSH_VXLAN_GPE_TO_ETHERNET
+ 14
+
+
+ SFF_NSH_ETHERNET_TO_VXLAN_GPE
+ SFF_NSH_ETHERNET_TO_VXLAN_GPE
+ 15
+
+
+ IOAM_EGRESS_SWITCH_IPV6
+ IOAM_EGRESS_SWITCH_IPV6
+ 16
+
+
+ SRV6_END_NODE
+ SRV6_END_NODE
+ 17
+
+
+ SRV6_PENULTIMATE_END_NODE
+ SRV6_PENULTIMATE_END_NODE
+ 18
+
+
+ SRV6_SRC_NODE_1_SEGMENT
+ SRV6_SRC_NODE_1_SEGMENT
+ 19
+
+
+ SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS
+ SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS
+ 20
+
+
+ SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS
+ SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS
+ 21
+
+
+ SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS
+ SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS
+ 22
+
+
+ SGT_NETWORK_ADD_MSB
+ SGT_NETWORK_ADD_MSB
+ 23
+
+
+ SGT_NETWORK_FIX
+ SGT_NETWORK_FIX
+ 24
+
+
+ SGT_NETWORK_REMOVE
+ SGT_NETWORK_REMOVE
+ 25
+
+
+ SGT_EDSA_FIX
+ SGT_EDSA_FIX
+ 26
+
+
+ SGT_EDSA_REMOVE
+ SGT_EDSA_REMOVE
+ 27
+
+
+ SGT_GBP_FIX_IPV4
+ SGT_GBP_FIX_IPV4
+ 28
+
+
+ SGT_GBP_FIX_IPV6
+ SGT_GBP_FIX_IPV6
+ 29
+
+
+ SGT_GBP_REMOVE_IPV4
+ SGT_GBP_REMOVE_IPV4
+ 30
+
+
+ SGT_GBP_REMOVE_IPV6
+ SGT_GBP_REMOVE_IPV6
+ 31
+
+
+ PTP_PHY_1_STEP
+ PTP_PHY_1_STEP
+ 32
+
+
+ EGRESS_MIRRORING_METADATA
+ EGRESS_MIRRORING_METADATA
+ 33
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4
+ 34
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6
+ 35
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4
+ 36
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6
+ 37
+
+
+ CC_ERSPAN_TYPE_II_SRC_DEV
+ CC_ERSPAN_TYPE_II_SRC_DEV
+ 38
+
+
+ VXLAN_GBP_SOURCE_GROUP_POLICY_ID
+ VXLAN_GBP_SOURCE_GROUP_POLICY_ID
+ 39
+
+
+ SRV6_BEST_EFFORT
+ SRV6_BEST_EFFORT
+ 40
+
+
+ SRV6_SRC_NODE_1_CONTAINER
+ SRV6_SRC_NODE_1_CONTAINER
+ 41
+
+
+ SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS
+ SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS
+ 42
+
+
+ SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS
+ SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS
+ 43
+
+
+ SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS
+ SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS
+ 44
+
+
+ SRV6_END_NODE_COC32_GSID
+ SRV6_END_NODE_COC32_GSID
+ 45
+
+
+ IPV4_TTL_INCREMENT
+ IPV4_TTL_INCREMENT
+ 46
+
+
+ IPV6_HOP_LIMIT_INCREMENT
+ IPV6_HOP_LIMIT_INCREMENT
+ 47
+
+
+ CLEAR_OUTGOING_MTAG_COMMAND
+ CLEAR_OUTGOING_MTAG_COMMAND
+ 48
+
+
+ SFLOW_V5_IPV4
+ SFLOW_V5_IPV4
+ 49
+
+
+ SFLOW_V5_IPV6
+ SFLOW_V5_IPV6
+ 50
+
+
+ SLS
+ SLS
+ 51
+
+
+
+ trunk-member-mode-type
+ enumeration
+ Specifies supported Pha image id
+
+ NATIVE
+ NATIVE
+* the trunk members are filled
+* according to the order given by application.
+* Regular trunk may hold max of 8 members.
+* Cascade trunk may hold :
+* max of 64 members
+ 0
+
+
+ FLEX
+ FLEX
+* A mode to allows flexibility for
+* each Regular trunk to state it's max number of members (before starting to add members).
+* (this mode not effect 'cascade trunk' members)
+* Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+* Cascade trunk may hold : max of 64 members.
+ 2
+
+
+
+ number-physical-port-type
+ enumeration
+ AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024
+
+ no-ports
+ no-ports
+ 0
+
+
+ 64-ports
+ 64-ports
+ 64
+
+
+ 128-ports
+ 128-ports
+ 128
+
+
+ 256-ports
+ 256-ports
+ 256
+
+
+ 512-ports
+ 512-ports
+ 512
+
+
+ 1024-ports
+ 1024-ports
+ 1024
+
+
+
+ serdes-ref-clock-type
+ enumeration
+ Specifies serdes refernce clock.
+
+ external_25_single_ended
+ EXTERNAL_25_SINGLE_ENDED
+ 0
+
+
+ external_125_single_ended
+ EXTERNAL_125_SINGLE_ENDED
+ 1
+
+
+ external_125_diff
+ EXTERNAL_125_DIFF
+ 2
+
+
+ external_156_25_single_ended
+ EXTERNAL_156_25_SINGLE_ENDED
+ 3
+
+
+ external_156_25_diff
+ EXTERNAL_156_25_DIFF
+ 4
+
+
+ internal_125
+ INTERNAL_125
+ 5
+
+
+
+ cpu-port-id-type
+ uint32
+ CPU port id
+ 0
+ 7
+
+
+ rx-buffer-size-type
+ uint32
+ Rx Buffer size
+ 64
+ 10240
+
+
+ tx-sdma-queue-mode-type
+ enumeration
+ Specifies TX queue mode.
+
+ Normal
+ Application
+ 0
+
+
+ Packet_Generator
+ Traffic generator
+ 1
+
+
+
+ alloc-method-type
+ enumeration
+ Specifies Buffers allocation method.
+
+ Dynamic_Alloc
+ Dynamic
+ 0
+
+
+ Static_Alloc
+ Static
+ 1
+
+
+
+ au_mesage_lenght-type
+ enumeration
+ Specifies Buffers allocation method.
+
+ 4_words
+ 4 Words
+ 0
+
+
+ 8_words
+ 8 Words
+ 1
+
+
+
+ boolean-type
+ enumeration
+ Boolean 32 bits , due to bing endian
+
+ false
+ False
+ 0
+
+
+ true
+ True
+ 1
+
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ ASIC_Falcon
+
+ Falcon-3.2
+
+ 4294967295
+ external_25_single_ended
+ 2
+ 60
+ 256-ports
+ false
+ true
+ 0
+
+
+ true
+
+ 4096
+
+
+ 2048
+
+
+
+ 0
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 6
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 7
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 6
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 7
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 6
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 7
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 6
+ Static_Alloc
+ Packet_Generator
+ 256
+ 256
+ 144
+
+
+ 3
+ 7
+ Static_Alloc
+ Packet_Generator
+ 1
+ 1
+ 3032
+
+
+
+ false
+ false
+ false
+ 0
+ 8_words
+ false
+
+
+
+ TCAM_ROUTER_BASED
+ 0
+ MID_L3_MID_L2_NO_EM
+ false
+
+
+ true
+ true
+ true
+ true
+ true
+ true
+
+ 1023
+ FLEX
+
+ true
+ true
+ true
+ true
+
+ false
+ 02
+ 0
+
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..cfa1a375d83b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+88cbf08802a5d41b605a8dd83f2c5139
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..635a099a35aa
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml
@@ -0,0 +1,900 @@
+
+
+
+
+
+ device-id-type
+ uint32
+ Device ID 0..1
+ 0
+ 1
+
+
+ port-id-type
+ uint32
+ Interface number
+ 0
+ 1023
+
+
+ logDest-type
+ enumeration
+ Logging Feature Options
+
+ SAI_LOG_SYSLOG
+ SYSLOG {Syslog service should be running to use this option}
+ 0
+
+
+ SAI_LOG_CONSOLE
+ CONSOLE
+ 1
+
+
+ SAI_LOG_FILE
+ FILE {Warning !!! Use with caution. Can cause disk full issues}
+ 2
+
+
+
+ InDropCounter-type
+ enumeration
+ Router In Drop Reason Feature Options
+
+ TTL_HOPLIMIT_EXCEEDED
+ Router In Drop Counters track TTL & Hop Limit Exceeded Packets
+ 0
+
+
+ ROUTE_BLACKHOLE
+ Router In Drop Counters track Route Black Hole Packets
+ 1
+
+
+
+ Feature-enable
+ enumeration
+ Feature Enabled/Disabled
+
+ Disabled
+ Disabled
+ 0
+
+
+ Enabled
+ Enabled
+ 1
+
+
+
+ log-dest-file-path-type
+ string
+ A string with path to file for logging feature
+ 2
+ 30
+
+
+ acl-feature-name-type
+ enumeration
+
+
+ port-sFlow
+ SFlow over Port
+ 0
+
+
+ port-counters-ipv4-ipv6
+ Port ipv4/ipv6 counters
+ 1
+
+
+ control-acl
+ ACLs for control packet handling
+ 2
+
+
+ debug-counter-acl
+ ACLs for Debug Counters
+ 3
+
+
+
+ ingress-acl-stage-type
+ enumeration
+
+
+ disabled
+ Feature not enabled
+ 0
+
+
+ IPCL0
+ Stage IPCL0
+ 1
+
+
+ IPCL1
+ Stage IPCL1
+ 2
+
+
+
+ egress-acl-stage-type
+ enumeration
+
+
+ disabled
+ Feature not enabled
+ 0
+
+
+ EPCL0
+ Stage EPCL0
+ 2
+
+
+
+ feature-priority-type
+ uint32
+ Feature priority
+ 2
+ 15
+
+
+ hit-number-type
+ uint32
+ Hit/lookup number
+ 0
+ 3
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ ASIC_Falcon
+ ASK-Board-F3_2T-128x25G.xml
+
+
+ 0
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+
+ 2
+ 0
+ 2
+
+
+ 3
+ 0
+ 3
+
+
+ 4
+ 0
+ 4
+
+
+ 5
+ 0
+ 5
+
+
+ 6
+ 0
+ 6
+
+
+ 7
+ 0
+ 7
+
+
+ 8
+ 0
+ 8
+
+
+ 9
+ 0
+ 9
+
+
+ 10
+ 0
+ 10
+
+
+ 11
+ 0
+ 11
+
+
+ 12
+ 0
+ 12
+
+
+ 13
+ 0
+ 13
+
+
+ 14
+ 0
+ 14
+
+
+ 15
+ 0
+ 15
+
+
+ 16
+ 0
+ 16
+
+
+ 17
+ 0
+ 17
+
+
+ 18
+ 0
+ 18
+
+
+ 19
+ 0
+ 19
+
+
+ 20
+ 0
+ 20
+
+
+ 21
+ 0
+ 21
+
+
+ 22
+ 0
+ 22
+
+
+ 23
+ 0
+ 23
+
+
+ 24
+ 0
+ 24
+
+
+ 25
+ 0
+ 25
+
+
+ 26
+ 0
+ 26
+
+
+ 27
+ 0
+ 27
+
+
+ 28
+ 0
+ 28
+
+
+ 29
+ 0
+ 29
+
+
+ 30
+ 0
+ 30
+
+
+ 31
+ 0
+ 31
+
+
+ 32
+ 0
+ 32
+
+
+ 33
+ 0
+ 33
+
+
+ 34
+ 0
+ 34
+
+
+ 35
+ 0
+ 35
+
+
+ 36
+ 0
+ 36
+
+
+ 37
+ 0
+ 37
+
+
+ 38
+ 0
+ 38
+
+
+ 39
+ 0
+ 39
+
+
+ 40
+ 0
+ 40
+
+
+ 41
+ 0
+ 41
+
+
+ 42
+ 0
+ 42
+
+
+ 43
+ 0
+ 43
+
+
+ 44
+ 0
+ 44
+
+
+ 45
+ 0
+ 45
+
+
+ 46
+ 0
+ 46
+
+
+ 47
+ 0
+ 47
+
+
+ 48
+ 0
+ 48
+
+
+ 49
+ 0
+ 49
+
+
+ 50
+ 0
+ 50
+
+
+ 51
+ 0
+ 51
+
+
+ 52
+ 0
+ 52
+
+
+ 53
+ 0
+ 53
+
+
+ 54
+ 0
+ 54
+
+
+ 55
+ 0
+ 55
+
+
+ 56
+ 0
+ 56
+
+
+ 57
+ 0
+ 57
+
+
+ 58
+ 0
+ 58
+
+
+ 59
+ 0
+ 59
+
+
+ 60
+ 0
+ 60
+
+
+ 61
+ 0
+ 64
+
+
+ 62
+ 0
+ 65
+
+
+ 63
+ 0
+ 66
+
+
+ 64
+ 0
+ 67
+
+
+ 65
+ 0
+ 68
+
+
+ 66
+ 0
+ 69
+
+
+ 67
+ 0
+ 70
+
+
+ 68
+ 0
+ 71
+
+
+ 69
+ 0
+ 72
+
+
+ 70
+ 0
+ 73
+
+
+ 71
+ 0
+ 74
+
+
+ 72
+ 0
+ 75
+
+
+ 73
+ 0
+ 76
+
+
+ 74
+ 0
+ 77
+
+
+ 75
+ 0
+ 78
+
+
+ 76
+ 0
+ 79
+
+
+ 77
+ 0
+ 80
+
+
+ 78
+ 0
+ 81
+
+
+ 79
+ 0
+ 82
+
+
+ 80
+ 0
+ 83
+
+
+ 81
+ 0
+ 84
+
+
+ 82
+ 0
+ 85
+
+
+ 83
+ 0
+ 86
+
+
+ 84
+ 0
+ 87
+
+
+ 85
+ 0
+ 88
+
+
+ 86
+ 0
+ 89
+
+
+ 87
+ 0
+ 90
+
+
+ 88
+ 0
+ 91
+
+
+ 89
+ 0
+ 92
+
+
+ 90
+ 0
+ 93
+
+
+ 91
+ 0
+ 94
+
+
+ 92
+ 0
+ 95
+
+
+ 93
+ 0
+ 96
+
+
+ 94
+ 0
+ 97
+
+
+ 95
+ 0
+ 98
+
+
+ 96
+ 0
+ 99
+
+
+ 97
+ 0
+ 100
+
+
+ 98
+ 0
+ 101
+
+
+ 99
+ 0
+ 102
+
+
+ 100
+ 0
+ 103
+
+
+ 101
+ 0
+ 104
+
+
+ 102
+ 0
+ 105
+
+
+ 103
+ 0
+ 106
+
+
+ 104
+ 0
+ 107
+
+
+ 105
+ 0
+ 108
+
+
+ 106
+ 0
+ 109
+
+
+ 107
+ 0
+ 110
+
+
+ 108
+ 0
+ 111
+
+
+ 109
+ 0
+ 112
+
+
+ 110
+ 0
+ 113
+
+
+ 111
+ 0
+ 114
+
+
+ 112
+ 0
+ 115
+
+
+ 113
+ 0
+ 116
+
+
+ 114
+ 0
+ 117
+
+
+ 115
+ 0
+ 118
+
+
+ 116
+ 0
+ 119
+
+
+ 117
+ 0
+ 120
+
+
+ 118
+ 0
+ 121
+
+
+ 119
+ 0
+ 122
+
+
+ 120
+ 0
+ 123
+
+
+ 121
+ 0
+ 124
+
+
+ 122
+ 0
+ 125
+
+
+ 123
+ 0
+ 126
+
+
+ 124
+ 0
+ 127
+
+
+ 125
+ 0
+ 128
+
+
+ 126
+ 0
+ 129
+
+
+ 127
+ 0
+ 130
+
+
+ 128
+ 0
+ 131
+
+
+ 129
+ 0
+ 132
+
+
+
+ 8
+ 0
+ 0
+ 64
+ 8
+ 8
+ 1024
+ 0
+ 0
+
+
+
+ 0
+
+
+ Enabled
+ Enabled
+
+
+ Enabled
+
+
+
+ SAI_LOG_SYSLOG
+
+
+ control-acl
+ 3
+
+ IPCL0
+ 1
+
+
+ EPCL0
+ 0
+
+
+
+ port-sFlow
+ 4
+
+ IPCL0
+ 0
+
+
+ EPCL0
+ 0
+
+
+
+ port-counters-ipv4-ipv6
+ 5
+
+ IPCL0
+ 3
+
+
+ EPCL0
+ 0
+
+
+
+ debug-counter-acl
+ 2
+
+ IPCL0
+ 1
+
+
+ EPCL0
+ 0
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+ "BUFFER_POOL": {
+ "ingress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "ingress"
+ },
+ "ingress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "ingress"
+ },
+ "egress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "egress"
+ },
+ "egress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "egress"
+ }
+ },
+ "BUFFER_PROFILE": {
+ "egress_lossless_profile": {
+ "pool": "egress_pool1",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "egress_lossy_profile": {
+ "pool": "egress_pool2",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "ingress_lossless_profile": {
+ "pool": "ingress_pool1",
+ "size": "0",
+ "dynamic_th": "-3"
+ },
+ "ingress_lossy_profile": {
+ "pool": "ingress_pool2",
+ "size": "0",
+ "dynamic_th": "-3"
+ }
+ },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+ "BUFFER_POOL": {
+ "ingress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "ingress"
+ },
+ "ingress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "ingress"
+ },
+ "egress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "egress"
+ },
+ "egress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "egress"
+ }
+ },
+ "BUFFER_PROFILE": {
+ "egress_lossless_profile": {
+ "pool": "egress_pool1",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "egress_lossy_profile": {
+ "pool": "egress_pool2",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "ingress_lossless_profile": {
+ "pool": "ingress_pool1",
+ "size": "0",
+ "dynamic_th": "-3"
+ },
+ "ingress_lossy_profile": {
+ "pool": "ingress_pool2",
+ "size": "0",
+ "dynamic_th": "-3"
+ }
+ },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..8bea3894c083
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+ "DEVICE_METADATA": {
+ "localhost": {
+ "create_only_config_db_buffers": "true"
+ }
+ }
+}
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json
new file mode 100644
index 000000000000..f6745e836052
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json
@@ -0,0 +1,204 @@
+{
+ "interfaces": {
+ "Ethernet0": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet4": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet8": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet12": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet16": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet20": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet24": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet28": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet32": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet36": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet40": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet44": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet48": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet52": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet56": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet60": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet64": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet68": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet72": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet76": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet80": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet84": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet88": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet92": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet96": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet100": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet104": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet108": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet112": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet116": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet120": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet124": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet128": {
+ "default_brkout_mode": "1x10G",
+ "autoneg": "off"
+ },
+ "Ethernet129": {
+ "default_brkout_mode": "1x10G",
+ "autoneg": "off"
+ }
+ }
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini
new file mode 100644
index 000000000000..85d256856fb8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini
@@ -0,0 +1,131 @@
+# name lanes alias speed autoneg fec index
+Ethernet0 0 Eth1/1 25000 on none 1
+Ethernet1 1 Eth1/2 25000 on none 1
+Ethernet2 2 Eth1/3 25000 on none 1
+Ethernet3 3 Eth1/4 25000 on none 1
+Ethernet4 4 Eth1/5 25000 on none 1
+Ethernet5 5 Eth1/6 25000 on none 1
+Ethernet6 6 Eth1/7 25000 on none 1
+Ethernet7 7 Eth1/8 25000 on none 1
+Ethernet8 8 Eth2/1 25000 on none 2
+Ethernet9 9 Eth2/2 25000 on none 2
+Ethernet10 10 Eth2/3 25000 on none 2
+Ethernet11 11 Eth2/4 25000 on none 2
+Ethernet12 12 Eth2/5 25000 on none 2
+Ethernet13 13 Eth2/6 25000 on none 2
+Ethernet14 14 Eth2/7 25000 on none 2
+Ethernet15 15 Eth2/8 25000 on none 2
+Ethernet16 16 Eth3/1 25000 on none 3
+Ethernet17 17 Eth3/2 25000 on none 3
+Ethernet18 18 Eth3/3 25000 on none 3
+Ethernet19 19 Eth3/4 25000 on none 3
+Ethernet20 20 Eth3/5 25000 on none 3
+Ethernet21 21 Eth3/6 25000 on none 3
+Ethernet22 22 Eth3/7 25000 on none 3
+Ethernet23 23 Eth3/8 25000 on none 3
+Ethernet24 24 Eth4/1 25000 on none 4
+Ethernet25 25 Eth4/2 25000 on none 4
+Ethernet26 26 Eth4/3 25000 on none 4
+Ethernet27 27 Eth4/4 25000 on none 4
+Ethernet28 28 Eth4/5 25000 on none 4
+Ethernet29 29 Eth4/6 25000 on none 4
+Ethernet30 30 Eth4/7 25000 on none 4
+Ethernet31 31 Eth4/8 25000 on none 4
+Ethernet32 32 Eth5/1 25000 on none 5
+Ethernet33 33 Eth5/2 25000 on none 5
+Ethernet34 34 Eth5/3 25000 on none 5
+Ethernet35 35 Eth5/4 25000 on none 5
+Ethernet36 36 Eth5/5 25000 on none 5
+Ethernet37 37 Eth5/6 25000 on none 5
+Ethernet38 38 Eth5/7 25000 on none 5
+Ethernet39 39 Eth5/8 25000 on none 5
+Ethernet40 40 Eth6/1 25000 on none 6
+Ethernet41 41 Eth6/2 25000 on none 6
+Ethernet42 42 Eth6/3 25000 on none 6
+Ethernet43 43 Eth6/4 25000 on none 6
+Ethernet44 44 Eth6/5 25000 on none 6
+Ethernet45 45 Eth6/6 25000 on none 6
+Ethernet46 46 Eth6/7 25000 on none 6
+Ethernet47 47 Eth6/8 25000 on none 6
+Ethernet48 48 Eth7/1 25000 on none 7
+Ethernet49 49 Eth7/2 25000 on none 7
+Ethernet50 50 Eth7/3 25000 on none 7
+Ethernet51 51 Eth7/4 25000 on none 7
+Ethernet52 52 Eth7/5 25000 on none 7
+Ethernet53 53 Eth7/6 25000 on none 7
+Ethernet54 54 Eth7/7 25000 on none 7
+Ethernet55 55 Eth7/8 25000 on none 7
+Ethernet56 56 Eth8/1 25000 on none 8
+Ethernet57 57 Eth8/2 25000 on none 8
+Ethernet58 58 Eth8/3 25000 on none 8
+Ethernet59 59 Eth8/4 25000 on none 8
+Ethernet60 60 Eth8/5 25000 on none 8
+Ethernet61 61 Eth8/6 25000 on none 8
+Ethernet62 62 Eth8/7 25000 on none 8
+Ethernet63 63 Eth8/8 25000 on none 8
+Ethernet64 64 Eth9/1 25000 on none 9
+Ethernet65 65 Eth9/2 25000 on none 9
+Ethernet66 66 Eth9/3 25000 on none 9
+Ethernet67 67 Eth9/4 25000 on none 9
+Ethernet68 68 Eth9/5 25000 on none 9
+Ethernet69 69 Eth9/6 25000 on none 9
+Ethernet70 70 Eth9/7 25000 on none 9
+Ethernet71 71 Eth9/8 25000 on none 9
+Ethernet72 72 Eth10/1 25000 on none 10
+Ethernet73 73 Eth10/2 25000 on none 10
+Ethernet74 74 Eth10/3 25000 on none 10
+Ethernet75 75 Eth10/4 25000 on none 10
+Ethernet76 76 Eth10/5 25000 on none 10
+Ethernet77 77 Eth10/6 25000 on none 10
+Ethernet78 78 Eth10/7 25000 on none 10
+Ethernet79 79 Eth10/8 25000 on none 10
+Ethernet80 80 Eth11/1 25000 on none 11
+Ethernet81 81 Eth11/2 25000 on none 11
+Ethernet82 82 Eth11/3 25000 on none 11
+Ethernet83 83 Eth11/4 25000 on none 11
+Ethernet84 84 Eth11/5 25000 on none 11
+Ethernet85 85 Eth11/6 25000 on none 11
+Ethernet86 86 Eth11/7 25000 on none 11
+Ethernet87 87 Eth11/8 25000 on none 11
+Ethernet88 88 Eth12/1 25000 on none 12
+Ethernet89 89 Eth12/2 25000 on none 12
+Ethernet90 90 Eth12/3 25000 on none 12
+Ethernet91 91 Eth12/4 25000 on none 12
+Ethernet92 92 Eth12/5 25000 on none 12
+Ethernet93 93 Eth12/6 25000 on none 12
+Ethernet94 94 Eth12/7 25000 on none 12
+Ethernet95 95 Eth12/8 25000 on none 12
+Ethernet96 96 Eth13/1 25000 on none 13
+Ethernet97 97 Eth13/2 25000 on none 13
+Ethernet98 98 Eth13/3 25000 on none 13
+Ethernet99 99 Eth13/4 25000 on none 13
+Ethernet100 100 Eth13/5 25000 on none 13
+Ethernet101 101 Eth13/6 25000 on none 13
+Ethernet102 102 Eth13/7 25000 on none 13
+Ethernet103 103 Eth13/8 25000 on none 13
+Ethernet104 104 Eth14/1 25000 on none 14
+Ethernet105 105 Eth14/2 25000 on none 14
+Ethernet106 106 Eth14/3 25000 on none 14
+Ethernet107 107 Eth14/4 25000 on none 14
+Ethernet108 108 Eth14/5 25000 on none 14
+Ethernet109 109 Eth14/6 25000 on none 14
+Ethernet110 110 Eth14/7 25000 on none 14
+Ethernet111 111 Eth14/8 25000 on none 14
+Ethernet112 112 Eth15/1 25000 on none 15
+Ethernet113 113 Eth15/2 25000 on none 15
+Ethernet114 114 Eth15/3 25000 on none 15
+Ethernet115 115 Eth15/4 25000 on none 15
+Ethernet116 116 Eth15/5 25000 on none 15
+Ethernet117 117 Eth15/6 25000 on none 15
+Ethernet118 118 Eth15/7 25000 on none 15
+Ethernet119 119 Eth15/8 25000 on none 15
+Ethernet120 120 Eth16/1 25000 on none 16
+Ethernet121 121 Eth16/2 25000 on none 16
+Ethernet122 122 Eth16/3 25000 on none 16
+Ethernet123 123 Eth16/4 25000 on none 16
+Ethernet124 124 Eth16/5 25000 on none 16
+Ethernet125 125 Eth16/6 25000 on none 16
+Ethernet126 126 Eth16/7 25000 on none 16
+Ethernet127 127 Eth16/8 25000 on none 16
+Ethernet128 128 Eth17 10000 off none 129
+Ethernet129 129 Eth17 10000 off none 130
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini
new file mode 100644
index 000000000000..c2f77685ad0a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile
new file mode 100644
index 000000000000..2477a839e09e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC128x25G
+switchProfile=/usr/share/sonic/hwsku/SAI-F3_2T-128x25G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..b9aabeb8706b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+e48527ad3f7bc5db09ec1fe078eba9a1
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..80434c00be65
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml
@@ -0,0 +1,3990 @@
+
+
+
+
+
+ std-string
+ string
+ standard string.
+ 1
+ 100
+
+
+ board-callback-type
+ enumeration
+ Specifies os/ext drv callback types.
+
+ linux-static
+ Linux Static
+ 0
+
+
+ linux-shared
+ Linux Shared Lib mode
+ 1
+
+
+ external
+ External Os
+ 3
+
+
+ freeBsd
+ Free BSD
+ 4
+
+
+
+ board-pp-map-type
+ enumeration
+ Specifies pci info types.
+
+ fixed
+ Fixed
+ 0
+
+
+ autoscan
+ Auto scan
+ 1
+
+
+
+ board-pp-interface-channel-type
+ enumeration
+ Specifies channel interface type.
+
+ pci
+ PCI
+ 0
+
+
+ smi
+ SMI
+ 1
+
+
+ twsi
+ TWSI
+ 2
+
+
+
+ board-pp-as-type
+ enumeration
+ Specifies Address space type.
+
+ 4_regions
+ address-space 4 regions
+ 0
+
+
+ 8_regions
+ address-space 8 regions
+ 1
+
+
+ atu
+ address translation unit
+ 2
+
+
+
+ device-id-type
+ uint32
+ Device ID 0..1
+ 0
+ 1
+
+
+ port-mapping-type
+ enumeration
+ Specifies port map type.
+
+ ethernet_mac
+ ETHERNET_MAC
+ 0
+
+
+ cpu_sdma
+ CPU_SDMA
+ 1
+
+
+
+ interface-num-type
+ uint32
+ Interface number
+ 0
+ 1023
+
+
+ txq-port-number-type
+ uint32
+ TXq port number
+ 0
+ 99
+
+
+ phy-smi-interface-type
+ uint32
+ Phy SMI interface type.
+ 0
+ 3
+
+
+ phy-xsmi-interface-type
+ uint32
+ Phy XSMI interface type.
+ 0
+ 15
+
+
+ phy-type
+ enumeration
+ Specifies the PHY Part Identifier.
+
+ NA
+ No Phy
+ 0
+
+
+ alaska-88E1680
+ Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.
+ 1
+
+
+ alaska-88E1780
+ Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver
+ 2
+
+
+ alaska-88E2540
+ Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support
+ 3
+
+
+ alaska-88E2580
+ Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support
+ 4
+
+
+ alaska-88E2780
+ Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support
+ 5
+
+
+
+ physical-port-num-type
+ uint32
+ PHYSICAL PORT NUM
+ 0
+ 1023
+
+
+ led-stream-port-type
+ enumeration
+ Specifies the ledstream port type.
+
+ PORT_TYPE_TRI_SPEED
+ tri-speed port.
+ 1
+
+
+ PORT_TYPE_XG
+ XG port.
+ 2
+
+
+
+ led-stream-blink-select-type
+ enumeration
+ Specifies the LED stream blink select type.
+
+ BLINK_SELECT_0
+ Blink 0 signal.
+ 1
+
+
+ BLINK_SELECT_1
+ Blink 1 signal
+ 2
+
+
+
+ led-stream-order-mode-type
+ enumeration
+ Specifies the LED stream ordering mode.
+
+ ORDER_MODE_BY_PORT
+ the indication order is arranged by port.
+ 1
+
+
+ ORDER_MODE_BY_CLASS
+ the indication order is arranged by class.
+ 2
+
+
+
+ led-stream-blink-duty-cycle-type
+ enumeration
+ Specifies the LED stream blink cycle duty cycle type.
+
+ BLINK_DUTY_CYCLE_0
+ 25% on, 75% off.
+ 1
+
+
+ BLINK_DUTY_CYCLE_1
+ 50% on, 50% off.
+ 2
+
+
+ BLINK_DUTY_CYCLE_2
+ 50% on, 50% off.
+ 3
+
+
+ BLINK_DUTY_CYCLE_3
+ 75% on, 25% off.
+ 4
+
+
+
+ led-stream-blink-duration-type
+ enumeration
+ Specifies the LED stream blink period type.
+
+ BLINK_DURATION_0
+ BLINK_DURATION_0.
+ 1
+
+
+ BLINK_DURATION_1
+ BLINK_DURATION_1.
+ 2
+
+
+ BLINK_DURATION_2
+ BLINK_DURATION_2.
+ 3
+
+
+ BLINK_DURATION_3
+ BLINK_DURATION_3.
+ 4
+
+
+ BLINK_DURATION_4
+ BLINK_DURATION_4.
+ 5
+
+
+ BLINK_DURATION_5
+ BLINK_DURATION_5.
+ 6
+
+
+ BLINK_DURATION_6
+ (APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .
+ 7
+
+
+ BLINK_DURATION_7
+ APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).
+ 8
+
+
+
+ led-stream-pulse-stretch-type
+ enumeration
+ Specifies the LED stream length of stretching for dynamic signals.
+
+ PULSE_STRETCH_0_NO
+ PULSE_STRETCH_0_NO.
+ 1
+
+
+ PULSE_STRETCH_1
+ PULSE_STRETCH_1.
+ 2
+
+
+ PULSE_STRETCH_2
+ PULSE_STRETCH_2.
+ 3
+
+
+ PULSE_STRETCH_3
+ PULSE_STRETCH_3.
+ 4
+
+
+ PULSE_STRETCH_4
+ PULSE_STRETCH_4.
+ 5
+
+
+ PULSE_STRETCH_5
+ PULSE_STRETCH_5.
+ 6
+
+
+ PULSE_STRETCH_6
+ (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).
+ 7
+
+
+ PULSE_STRETCH_7
+ (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).
+ 8
+
+
+
+ led-stream-clock-out-frequency-type
+ enumeration
+ Specifies the LED stream blink cycle duty cycle type.
+
+ _CLOCK_OUT_FREQUENCY_500
+ 500 KHz LED clock frequency.
+ 1
+
+
+ CLOCK_OUT_FREQUENCY_1000
+ 1 MHz LED clock frequency.
+ 2
+
+
+ CLOCK_OUT_FREQUENCY_2000
+ 2 MHz LED clock frequency.
+ 3
+
+
+ CLOCK_OUT_FREQUENCY_3000
+ 3 MHz LED clock frequency.
+ 4
+
+
+
+ led-stream-class5-select-type
+ enumeration
+ Specifies the LED stream indication displayed on class5 (for dual-media port/phy).
+
+ CLASS_5_SELECT_HALF_DUPLEX
+ Half Duplex is displayed on class5.
+ 1
+
+
+ CLASS_5_SELECT_FIBER_LINK_UP
+ If port is a dual media port, Fiber Link Up is displayed on class5.
+ 2
+
+
+
+ led-stream-class13-select-type
+ enumeration
+ Specifies the LED stream indication displayed on class13 (for dual-media port/phy).
+
+ CLASS_13_SELECT_LINK_DOWN
+ Link Down is displayed on class13.
+ 1
+
+
+ CLASS_13_SELECT_COPPER_LINK_UP
+ If port is a dual media port, Copper Link Up is displayed on class13.
+ 2
+
+
+
+ led-class-num-type
+ uint32
+ Led Class number
+ 0
+ 11
+
+
+ boolean-type
+ enumeration
+ Boolean 32 bits , due to bing endian
+
+ false
+ False
+ 0
+
+
+ true
+ True
+ 1
+
+
+
+ bus-id-type
+ uint32
+ Bus Id Type, PCI/SMI
+ 0
+ 255
+
+
+ function-id-type
+ uint32
+ Function Id Type, PCI/SMI
+ 0
+ 255
+
+
+ domain-type
+ uint32
+ Domain, PCI/SMI
+ 0
+ 255
+
+
+ led-interface-type
+ uint32
+ Led interface
+ 0
+ 255
+
+
+ led-position-type
+ uint32
+ Led position
+ 0
+ 63
+
+
+ serdes-lane-type
+ uint32
+ serdes lane
+ 0
+ 7
+
+
+ cpu-type
+ enumeration
+ The CPU Internal/External
+
+ external
+ Extrenal connected CPU
+ 0
+
+
+ internal
+ Internal CPU
+ 1
+
+
+
+ led-stream-clock-frequency-type
+ uint32
+ Led Clock Frequency Sip6
+ 500
+ 80000
+
+
+ led-unit-type
+ uint32
+ Led units
+ 1
+ 16
+
+
+ led-unit-or-no-unit-type
+ uint32
+ Led units, 0 for no Unit
+ 0
+ 16
+
+
+ led-group-type
+ uint32
+ Led Group
+ 0
+ 1
+
+
+ led-stream-force-data-type
+ string
+ A hexadecimal string with octets represented as hex digits
+separated by colons. The canonical representation uses
+lowercase characters.
+ 3
+ 11
+
+
+ bit-type
+ uint32
+ Bit range 0..31
+ 0
+ 31
+
+
+ bit-size-type
+ uint32
+ Bit leng 1..32
+ 1
+ 32
+
+
+ led-sip-type
+ enumeration
+ The LED scehme
+
+ na
+ NA
+ 0
+
+
+ sip5
+ SIP5: AC3x
+ 5
+
+
+ sip6
+ SIP6: Falcon, AC5x
+ 6
+
+
+
+ port-cscd-type
+ enumeration
+ Specifies the cascade port type.
+
+ DSA_1_WORD
+ DSA Regular
+ 0
+
+
+ DSA_2_WORDS
+ DSA Extended
+ 1
+
+
+ NETWORK
+ Network.
+ 2
+
+
+ DSA_3_WORDS
+ DSA 3 Words
+ 3
+
+
+ DSA_4_WORD
+ DSA 4 Words
+ 4
+
+
+
+ trunk-cscd-type
+ uint32
+ Specifies the Cascade Trunk id.
+ 0
+ 127
+
+
+ port-trunk-cscd-type
+ enumeration
+ Specifies the cascade port type.
+
+ cscdPort
+ Cascade port
+ 0
+
+
+ cscdTrunk
+ Csacde trunk
+ 1
+
+
+
+ hash-cscd-type
+ enumeration
+ Specifies the hash used by cascade trunk.
+
+ pkt
+ Hash based on packet
+ 0
+
+
+ srcPort
+ Hash based on source port
+ 1
+
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ mpp-num-type
+ uint8
+ Specifies the MPP pin number.
+ 0
+ 63
+
+
+ mpp-select-type
+ uint8
+ Specifies the MPP pin value.
+ 0
+ 15
+
+
+ ASIC_Falcon
+ Falcon-3.2T-128x25G
+ linux-static
+ linux-static
+ autoscan
+ external
+ pci
+ atu
+
+ 0
+ 0
+ ASK-PP-F3_2T-128x25G.xml
+ ASK-L1-F3_2T-128x25G.xml
+ sip6
+
+ 0
+
+ ethernet_mac
+ 0
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 1
+
+ ethernet_mac
+ 1
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 2
+
+ ethernet_mac
+ 2
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 3
+
+ ethernet_mac
+ 3
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 4
+
+ ethernet_mac
+ 4
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 5
+
+ ethernet_mac
+ 5
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 6
+
+ ethernet_mac
+ 6
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 7
+
+ ethernet_mac
+ 7
+ false
+
+
+ NA
+
+
+
+ false
+
+
+
+ 8
+
+ ethernet_mac
+ 8
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 9
+
+ ethernet_mac
+ 9
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 10
+
+ ethernet_mac
+ 10
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 11
+
+ ethernet_mac
+ 11
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 12
+
+ ethernet_mac
+ 12
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 13
+
+ ethernet_mac
+ 13
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 14
+
+ ethernet_mac
+ 14
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 15
+
+ ethernet_mac
+ 15
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 16
+
+ ethernet_mac
+ 16
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 17
+
+ ethernet_mac
+ 17
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 18
+
+ ethernet_mac
+ 18
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 19
+
+ ethernet_mac
+ 19
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 20
+
+ ethernet_mac
+ 20
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 21
+
+ ethernet_mac
+ 21
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 22
+
+ ethernet_mac
+ 22
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 23
+
+ ethernet_mac
+ 23
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 24
+
+ ethernet_mac
+ 24
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 25
+
+ ethernet_mac
+ 25
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 26
+
+ ethernet_mac
+ 26
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 27
+
+ ethernet_mac
+ 27
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 28
+
+ ethernet_mac
+ 28
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 29
+
+ ethernet_mac
+ 29
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 30
+
+ ethernet_mac
+ 30
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 31
+
+ ethernet_mac
+ 31
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 32
+
+ ethernet_mac
+ 32
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 33
+
+ ethernet_mac
+ 33
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 34
+
+ ethernet_mac
+ 34
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 35
+
+ ethernet_mac
+ 35
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 36
+
+ ethernet_mac
+ 36
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 37
+
+ ethernet_mac
+ 37
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 38
+
+ ethernet_mac
+ 38
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 39
+
+ ethernet_mac
+ 39
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 40
+
+ ethernet_mac
+ 40
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 41
+
+ ethernet_mac
+ 41
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 42
+
+ ethernet_mac
+ 42
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 43
+
+ ethernet_mac
+ 43
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 44
+
+ ethernet_mac
+ 44
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 45
+
+ ethernet_mac
+ 45
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 46
+
+ ethernet_mac
+ 46
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 47
+
+ ethernet_mac
+ 47
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 48
+
+ ethernet_mac
+ 48
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 49
+
+ ethernet_mac
+ 49
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 50
+
+ ethernet_mac
+ 50
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 51
+
+ ethernet_mac
+ 51
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 52
+
+ ethernet_mac
+ 52
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 53
+
+ ethernet_mac
+ 53
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 54
+
+ ethernet_mac
+ 54
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 55
+
+ ethernet_mac
+ 55
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 56
+
+ ethernet_mac
+ 56
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 57
+
+ ethernet_mac
+ 57
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 58
+
+ ethernet_mac
+ 58
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 59
+
+ ethernet_mac
+ 59
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 60
+
+ ethernet_mac
+ 60
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 64
+
+ ethernet_mac
+ 61
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 65
+
+ ethernet_mac
+ 62
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 66
+
+ ethernet_mac
+ 63
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 67
+
+ ethernet_mac
+ 64
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 68
+
+ ethernet_mac
+ 65
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 69
+
+ ethernet_mac
+ 66
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 70
+
+ ethernet_mac
+ 67
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 130
+
+ ethernet_mac
+ 127
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 129
+
+ ethernet_mac
+ 126
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 128
+
+ ethernet_mac
+ 125
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 127
+
+ ethernet_mac
+ 124
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 126
+
+ ethernet_mac
+ 123
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 125
+
+ ethernet_mac
+ 122
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 124
+
+ ethernet_mac
+ 121
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 123
+
+ ethernet_mac
+ 120
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 122
+
+ ethernet_mac
+ 119
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 121
+
+ ethernet_mac
+ 118
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 120
+
+ ethernet_mac
+ 117
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 119
+
+ ethernet_mac
+ 116
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 118
+
+ ethernet_mac
+ 115
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 117
+
+ ethernet_mac
+ 114
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 116
+
+ ethernet_mac
+ 113
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 115
+
+ ethernet_mac
+ 112
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 114
+
+ ethernet_mac
+ 111
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 113
+
+ ethernet_mac
+ 110
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 112
+
+ ethernet_mac
+ 109
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 111
+
+ ethernet_mac
+ 108
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 110
+
+ ethernet_mac
+ 107
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 109
+
+ ethernet_mac
+ 106
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 108
+
+ ethernet_mac
+ 105
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 107
+
+ ethernet_mac
+ 104
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 106
+
+ ethernet_mac
+ 103
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 105
+
+ ethernet_mac
+ 102
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 104
+
+ ethernet_mac
+ 101
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 103
+
+ ethernet_mac
+ 100
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 102
+
+ ethernet_mac
+ 99
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 101
+
+ ethernet_mac
+ 98
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 100
+
+ ethernet_mac
+ 97
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 99
+
+ ethernet_mac
+ 96
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 98
+
+ ethernet_mac
+ 95
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 97
+
+ ethernet_mac
+ 94
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 96
+
+ ethernet_mac
+ 93
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 95
+
+ ethernet_mac
+ 92
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 94
+
+ ethernet_mac
+ 91
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 93
+
+ ethernet_mac
+ 90
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 92
+
+ ethernet_mac
+ 89
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 91
+
+ ethernet_mac
+ 88
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 90
+
+ ethernet_mac
+ 87
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 89
+
+ ethernet_mac
+ 86
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 88
+
+ ethernet_mac
+ 85
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 87
+
+ ethernet_mac
+ 84
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 86
+
+ ethernet_mac
+ 83
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 85
+
+ ethernet_mac
+ 82
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 84
+
+ ethernet_mac
+ 81
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 83
+
+ ethernet_mac
+ 80
+ false
+
+
+ NA
+
+ MAP0
+
+ 0
+
+ 2
+ true
+
+ false
+
+
+
+ 82
+
+ ethernet_mac
+ 79
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 81
+
+ ethernet_mac
+ 78
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 80
+
+ ethernet_mac
+ 77
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 79
+
+ ethernet_mac
+ 76
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 78
+
+ ethernet_mac
+ 75
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 77
+
+ ethernet_mac
+ 74
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 76
+
+ ethernet_mac
+ 73
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 75
+
+ ethernet_mac
+ 72
+ false
+
+
+ NA
+
+ MAP1
+
+ 1
+
+ 2
+ true
+
+ false
+
+
+
+ 74
+
+ ethernet_mac
+ 71
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 73
+
+ ethernet_mac
+ 70
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 72
+
+ ethernet_mac
+ 69
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 71
+
+ ethernet_mac
+ 68
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 131
+
+ ethernet_mac
+ 128
+ false
+
+
+ NA
+
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 132
+
+ ethernet_mac
+ 135
+ false
+
+
+ NA
+
+
+
+
+ 2
+ true
+
+ false
+
+
+
+ 63
+
+ cpu_sdma
+ 136
+ false
+
+
+
+ 133
+
+ cpu_sdma
+ 137
+ false
+
+
+
+ 134
+
+ cpu_sdma
+ 138
+ false
+
+
+
+ 135
+
+ cpu_sdma
+ 139
+ false
+
+
+
+ 7
+ true
+ false
+
+
+ 1
+ true
+ false
+
+
+ 6
+ true
+ true
+
+
+ 0
+ true
+ false
+
+
+ 5
+ true
+ false
+
+
+ 3
+ true
+ true
+
+
+ 4
+ true
+ true
+
+
+ 2
+ false
+ false
+
+
+ 8
+ false
+ true
+
+
+ 14
+ false
+ false
+
+
+ 9
+ false
+ false
+
+
+ 15
+ false
+ true
+
+
+ 10
+ false
+ true
+
+
+ 12
+ false
+ true
+
+
+ 11
+ true
+ false
+
+
+ 13
+ false
+ true
+
+
+ 23
+ false
+ false
+
+
+ 17
+ false
+ false
+
+
+ 22
+ true
+ false
+
+
+ 16
+ false
+ true
+
+
+ 21
+ false
+ false
+
+
+ 19
+ true
+ true
+
+
+ 20
+ true
+ false
+
+
+ 18
+ false
+ true
+
+
+ 24
+ false
+ false
+
+
+ 30
+ false
+ false
+
+
+ 25
+ false
+ true
+
+
+ 31
+ false
+ false
+
+
+ 26
+ true
+ false
+
+
+ 28
+ false
+ true
+
+
+ 27
+ false
+ true
+
+
+ 29
+ false
+ true
+
+
+ 39
+ false
+ false
+
+
+ 33
+ true
+ false
+
+
+ 38
+ false
+ false
+
+
+ 32
+ false
+ false
+
+
+ 37
+ true
+ false
+
+
+ 35
+ true
+ true
+
+
+ 36
+ true
+ false
+
+
+ 34
+ false
+ false
+
+
+ 40
+ false
+ false
+
+
+ 41
+ true
+ true
+
+
+ 46
+ true
+ true
+
+
+ 47
+ true
+ true
+
+
+ 42
+ true
+ false
+
+
+ 44
+ false
+ false
+
+
+ 43
+ false
+ true
+
+
+ 45
+ true
+ false
+
+
+ 55
+ false
+ false
+
+
+ 49
+ true
+ false
+
+
+ 54
+ true
+ true
+
+
+ 48
+ false
+ true
+
+
+ 53
+ true
+ false
+
+
+ 51
+ false
+ true
+
+
+ 52
+ false
+ true
+
+
+ 50
+ false
+ true
+
+
+ 56
+ false
+ false
+
+
+ 62
+ true
+ false
+
+
+ 57
+ false
+ true
+
+
+ 63
+ true
+ true
+
+
+ 58
+ false
+ false
+
+
+ 60
+ false
+ true
+
+
+ 59
+ false
+ true
+
+
+ 61
+ false
+ true
+
+
+ 71
+ false
+ false
+
+
+ 65
+ true
+ false
+
+
+ 70
+ false
+ true
+
+
+ 64
+ true
+ true
+
+
+ 69
+ true
+ false
+
+
+ 67
+ true
+ true
+
+
+ 68
+ true
+ true
+
+
+ 66
+ true
+ true
+
+
+ 72
+ true
+ false
+
+
+ 78
+ false
+ false
+
+
+ 73
+ false
+ true
+
+
+ 79
+ true
+ true
+
+
+ 74
+ true
+ false
+
+
+ 76
+ true
+ true
+
+
+ 75
+ true
+ true
+
+
+ 77
+ false
+ true
+
+
+ 87
+ false
+ false
+
+
+ 81
+ false
+ false
+
+
+ 86
+ false
+ false
+
+
+ 80
+ true
+ false
+
+
+ 85
+ false
+ true
+
+
+ 83
+ true
+ true
+
+
+ 84
+ true
+ false
+
+
+ 82
+ false
+ false
+
+
+ 88
+ true
+ false
+
+
+ 94
+ true
+ false
+
+
+ 89
+ false
+ false
+
+
+ 95
+ true
+ false
+
+
+ 90
+ true
+ false
+
+
+ 92
+ false
+ true
+
+
+ 91
+ false
+ false
+
+
+ 93
+ false
+ false
+
+
+ 103
+ true
+ false
+
+
+ 97
+ true
+ false
+
+
+ 102
+ true
+ false
+
+
+ 96
+ true
+ true
+
+
+ 101
+ true
+ false
+
+
+ 99
+ true
+ true
+
+
+ 100
+ true
+ true
+
+
+ 98
+ false
+ true
+
+
+ 104
+ true
+ false
+
+
+ 110
+ false
+ false
+
+
+ 105
+ true
+ true
+
+
+ 111
+ true
+ false
+
+
+ 106
+ true
+ false
+
+
+ 108
+ false
+ false
+
+
+ 107
+ false
+ true
+
+
+ 109
+ true
+ false
+
+
+ 119
+ true
+ false
+
+
+ 113
+ true
+ true
+
+
+ 118
+ true
+ true
+
+
+ 112
+ true
+ false
+
+
+ 117
+ true
+ false
+
+
+ 115
+ false
+ false
+
+
+ 116
+ true
+ false
+
+
+ 114
+ false
+ false
+
+
+ 120
+ false
+ false
+
+
+ 126
+ false
+ false
+
+
+ 121
+ false
+ true
+
+
+ 127
+ false
+ true
+
+
+ 122
+ true
+ false
+
+
+ 124
+ false
+ true
+
+
+ 123
+ false
+ true
+
+
+ 125
+ false
+ true
+
+
+ 128
+ false
+ true
+
+
+ 135
+ true
+ false
+
+
+ 0
+
+ ORDER_MODE_BY_CLASS
+ BLINK_DUTY_CYCLE_0
+ BLINK_DURATION_0
+ BLINK_DUTY_CYCLE_0
+ BLINK_DURATION_1
+ PULSE_STRETCH_1
+ false
+ 1627
+ false
+
+ 1
+ 64
+ 66
+ false
+
+
+ 2
+ 64
+ 65
+ false
+
+
+ 3
+ 64
+ 65
+ false
+
+
+ 4
+ 64
+ 66
+ false
+
+
+ 5
+ 64
+ 66
+ false
+
+
+ 6
+ 64
+ 65
+ false
+
+
+ 7
+ 64
+ 65
+ false
+
+
+ 8
+ 64
+ 66
+ false
+
+
+
+ 0
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 1
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 2
+ PORT_TYPE_XG
+ true
+ BLINK_SELECT_0
+ false
+ true
+ true
+
+
+ 3
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 4
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+ 5
+ PORT_TYPE_XG
+ false
+ BLINK_SELECT_0
+ false
+ true
+ false
+
+
+
+ /tmp/cpss_uds
+
+ 8
+
+ MAP0
+
+ 7
+
+
+ 1
+
+
+ 6
+
+
+ 0
+
+
+ 5
+
+
+ 3
+
+
+ 4
+
+
+ 2
+
+
+
+ MAP1
+
+ 0
+
+
+ 6
+
+
+ 1
+
+
+ 7
+
+
+ 2
+
+
+ 4
+
+
+ 3
+
+
+ 5
+
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..084f63926d4c
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+baf77e7f450def2266516782d159cbb4
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7a2208bf90ec
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml
@@ -0,0 +1,1891 @@
+
+
+
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ interface-mode-type
+ enumeration
+ Specifies supported Interface modes
+
+ 1000BASE_X
+ 1G
+ 6
+
+
+ SGMII
+ 1G , 2.5G
+ 3
+
+
+ QSGMII
+ 1G
+ 13
+
+
+ KR
+ 10G, 12G, 20G, 40G, 100G
+ 16
+
+
+ SR_LR
+ 5G, 10G, 12G, 20G, 40G
+ 20
+
+
+ KR2
+
+ 27
+
+
+ KR4
+
+ 28
+
+
+ SR_LR2
+
+ 29
+
+
+ SR_LR4
+ 100G
+ 30
+
+
+ KR_C
+ CONSORTIUM - 25G
+ 32
+
+
+ CR_C
+ CONSORTIUM - 25G
+ 33
+
+
+ KR2_C
+ CONSORTIUM - 50G
+ 34
+
+
+ CR2_C
+ CONSORTIUM - 50G
+ 35
+
+
+ CR
+
+ 36
+
+
+ CR2
+
+ 37
+
+
+ CR4
+
+ 38
+
+
+ KR_S
+
+ 39
+
+
+ CR_S
+
+ 40
+
+
+ KR8
+
+ 41
+
+
+ CR8
+
+ 42
+
+
+ SR_LR8
+
+ 43
+
+
+ USX_10G_QXGMII
+
+ 51
+
+
+ USX_20G_QXGMII
+
+ 52
+
+
+ USX_OUSGMII
+
+ 53
+
+
+ USX_20G_OXGMII
+
+ 54
+
+
+ NA
+
+ 57
+
+
+
+ port-speed-type
+ enumeration
+ Specifies supported speeds
+
+ 1G
+ 1G
+ 2
+
+
+ 10G
+ 10G
+ 3
+
+
+ 2500M
+ 2.5G
+ 5
+
+
+ 5G
+ 5G
+ 6
+
+
+ 25G
+ 25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E
+ 21
+
+
+ 40G
+ 40G
+ 9
+
+
+ 50G
+ 50G
+ 14
+
+
+ 100G
+ 100G
+ 13
+
+
+ 200G
+ 200G
+ 24
+
+
+ 400G
+ 400G
+ 25
+
+
+ NA
+ NA
+ 35
+
+
+
+ fec-type
+ enumeration
+ Rx parameter type
+
+ enabled
+ Enabled
+ 0
+
+
+ disabled
+ Disabled
+ 1
+
+
+ rs_enabled
+ RS FEC enabled
+ 2
+
+
+ both_enabled
+ Both enabled
+ 3
+
+
+ rs_544_514_enabled
+ RS FEC 544 and 514
+ 4
+
+
+
+ physical-port-num-type
+ uint32
+ PHYSICAL PORT NUM
+ 0
+ 1023
+
+
+ tx-param-type
+ enumeration
+ Tx parameter type
+
+ pre
+ pre
+ 0
+
+
+ post
+ post
+ 1
+
+
+ peak
+ peak
+ 2
+
+
+
+ rx-param-type
+ enumeration
+ Rx parameter type
+
+ dataRate
+ dataRate
+ 0
+
+
+ res1Sel
+ res1Sel
+ 1
+
+
+ res2Sel
+ res2Sel
+ 2
+
+
+ cap1Sel
+ cap1Sel
+ 3
+
+
+ cap2Sel
+ cap2Sel
+ 4
+
+
+ minCap
+ minCap
+ 5
+
+
+ minCapN
+ minCapN
+ 6
+
+
+ sumfBoostTargetC0
+ sumfBoostTargetC0
+ 7
+
+
+ sumfBoostTargetC1
+ sumfBoostTargetC1
+ 8
+
+
+ sumfBoostTargetC2
+ sumfBoostTargetC2
+ 9
+
+
+ midpointPhaseOs0
+ midpointPhaseOs0
+ 10
+
+
+ midpointPhaseOs1
+ midpointPhaseOs1
+ 11
+
+
+ midpointPhaseOs2
+ midpointPhaseOs2
+ 12
+
+
+ selmufi
+ selmufi
+ 13
+
+
+ selmuff
+ selmuff
+ 14
+
+
+ selmupi
+ selmupi
+ 15
+
+
+ selmupf
+ selmupf
+ 16
+
+
+ midpointLargeThresKLane
+ midpointLargeThresKLane
+ 17
+
+
+ midpointSmallThresKLane
+ midpointSmallThresKLane
+ 18
+
+
+ midpointLargeThresCLane
+ midpointLargeThresCLane
+ 19
+
+
+ midpointSmallThresCLane
+ midpointSmallThresCLane
+ 20
+
+
+ inxSumfMidpointAdatptiveEnLane
+ inxSumfMidpointAdatptiveEnLane
+ 21
+
+
+ dfeResF0aHighThresInitLane
+ dfeResF0aHighThresInitLane
+ 22
+
+
+ dfeResF0aHighThresEndLane
+ dfeResF0aHighThresEndLane
+ 23
+
+
+ squelch
+ squelch
+ 24
+
+
+ align90
+ align90
+ 25
+
+
+ sampler
+ sampler
+ 26
+
+
+ slewRateCtrl0
+ slewRateCtrl0
+ 27
+
+
+ slewRateCtrl1
+ slewRateCtrl1
+ 28
+
+
+ EO
+ EO
+ 29
+
+
+ minCap1
+ minCap1
+ 30
+
+
+ maxCap1
+ maxCap1
+ 31
+
+
+ minRes1
+ minRes1
+ 32
+
+
+ maxRes1
+ maxRes1
+ 33
+
+
+
+ boolean-type
+ enumeration
+ Boolean 32 bits , due to big endian
+
+ false
+ False
+ 0
+
+
+ true
+ True
+ 1
+
+
+
+ serdes-type
+ enumeration
+ Serdes Type
+
+ NA
+ No serdes
+ 0
+
+
+ AVAGO
+ AVAGO
+ 1
+
+
+ COMPHY
+ COMPHY
+ 2
+
+
+ COMPHY_C12G
+ COMPHY_C12G
+ 3
+
+
+ COMPHY_C28G
+ COMPHY_C28G
+ 4
+
+
+ COMPHY_C112G
+ COMPHY_C112G
+ 5
+
+
+
+ phy-serdes-type
+ enumeration
+ Phy Serdes Type
+
+ NA
+ No serdes
+ 0
+
+
+ COMPHY
+ COMPHY
+ 1
+
+
+ COMPHY_C28G
+ COMPHY_C28G
+ 2
+
+
+
+ port-interconnect-profile-type
+ enumeration
+ Enumerator of interconnect profile.
+
+ profile_default
+ Profile Default
+ 0
+
+
+ profile_1
+ Profile 1
+ 1
+
+
+ profile_2
+ Profile 2
+ 2
+
+
+
+ ASIC_Falcon
+
+
+ 100GR2
+
+ CR2
+ 100G
+ rs_544_514_enabled
+
+
+ KR2
+ 100G
+ rs_544_514_enabled
+
+
+ SR_LR2
+ 100G
+ rs_544_514_enabled
+
+
+ SR_LR2
+ 50G
+ rs_enabled
+
+
+ CR2
+ 50G
+ rs_enabled
+
+
+ KR2
+ 50G
+ rs_enabled
+
+
+ CR2
+ 100G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR2
+ 100G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ CR2
+ 50G
+ rs_enabled
+ rs_enabled
+
+
+ KR2
+ 50G
+ rs_enabled
+ rs_enabled
+
+
+
+ 100GR4
+
+ CR4
+ 100G
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+
+
+ SR_LR4
+ 100G
+ rs_enabled
+
+
+ CR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+
+ 10GR1
+
+ KR
+ 10G
+ enabled
+
+
+ SR_LR
+ 10G
+ enabled
+
+
+ KR
+ 10G
+ enabled
+ enabled
+
+
+
+ 10GR1Fix
+
+ KR
+ 10G
+ disabled
+
+
+
+ 200GR4
+
+ CR4
+ 200G
+ rs_544_514_enabled
+
+
+ SR_LR4
+ 100G
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+
+
+ CR4
+ 100G
+ rs_enabled
+
+
+ KR4
+ 200G
+ rs_544_514_enabled
+
+
+ SR_LR4
+ 200G
+ rs_544_514_enabled
+
+
+ CR4
+ 200G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR4
+ 200G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ CR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+ KR4
+ 100G
+ rs_enabled
+ rs_enabled
+
+
+
+ 25GR1
+
+ CR
+ 25G
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+
+
+ SR_LR
+ 25G
+ rs_enabled
+
+
+ SR_LR
+ 10G
+ enabled
+
+
+ CR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+ enabled
+
+
+
+ 400GR8
+
+ CR8
+ 400G
+ rs_544_514_enabled
+
+
+ KR8
+ 400G
+ rs_544_514_enabled
+
+
+ SR_LR8
+ 400G
+ rs_544_514_enabled
+
+
+ CR8
+ 400G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR8
+ 400G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+
+ 50GR1
+
+ CR
+ 50G
+ rs_544_514_enabled
+
+
+ KR
+ 50G
+ rs_544_514_enabled
+
+
+ CR
+ 25G
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+
+
+ SR_LR
+ 50G
+ rs_544_514_enabled
+
+
+ SR_LR
+ 25G
+ rs_enabled
+
+
+ SR_LR
+ 10G
+ enabled
+
+
+ CR
+ 50G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ KR
+ 50G
+ rs_544_514_enabled
+ rs_544_514_enabled
+
+
+ CR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 25G
+ rs_enabled
+ rs_enabled
+
+
+ KR
+ 10G
+ enabled
+ enabled
+
+
+
+
+
+ 0
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 0
+ 25GR1
+
+ 100GR4
+
+
+
+ 1
+ 25GR1
+
+
+
+
+
+ 2
+ 25GR1
+
+
+
+
+
+ 3
+ 25GR1
+
+
+
+
+
+ 4
+ 25GR1
+
+ 100GR4
+
+
+
+ 5
+ 25GR1
+
+
+
+
+
+ 6
+ 25GR1
+
+
+
+
+
+ 7
+ 25GR1
+
+
+
+
+
+
+ 8
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 8
+ 25GR1
+
+ 100GR4
+
+
+
+ 9
+ 25GR1
+
+
+
+
+
+ 10
+ 25GR1
+
+
+
+
+
+ 11
+ 25GR1
+
+
+
+
+
+ 12
+ 25GR1
+
+ 100GR4
+
+
+
+ 13
+ 25GR1
+
+
+
+
+
+ 14
+ 25GR1
+
+
+
+
+
+ 15
+ 25GR1
+
+
+
+
+
+
+ 16
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 16
+ 25GR1
+
+ 100GR4
+
+
+
+ 17
+ 25GR1
+
+
+
+
+
+ 18
+ 25GR1
+
+
+
+
+
+ 19
+ 25GR1
+
+
+
+
+
+ 20
+ 25GR1
+
+ 100GR4
+
+
+
+ 21
+ 25GR1
+
+
+
+
+
+ 22
+ 25GR1
+
+
+
+
+
+ 23
+ 25GR1
+
+
+
+
+
+
+ 24
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 24
+ 25GR1
+
+ 100GR4
+
+
+
+ 25
+ 25GR1
+
+
+
+
+
+ 26
+ 25GR1
+
+
+
+
+
+ 27
+ 25GR1
+
+
+
+
+
+ 28
+ 25GR1
+
+ 100GR4
+
+
+
+ 29
+ 25GR1
+
+
+
+
+
+ 30
+ 25GR1
+
+
+
+
+
+ 31
+ 25GR1
+
+
+
+
+
+
+ 32
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 32
+ 25GR1
+
+ 100GR4
+
+
+
+ 33
+ 25GR1
+
+
+
+
+
+ 34
+ 25GR1
+
+
+
+
+
+ 35
+ 25GR1
+
+
+
+
+
+ 36
+ 25GR1
+
+ 100GR4
+
+
+
+ 37
+ 25GR1
+
+
+
+
+
+ 38
+ 25GR1
+
+
+
+
+
+ 39
+ 25GR1
+
+
+
+
+
+
+ 40
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 40
+ 25GR1
+
+ 100GR4
+
+
+
+ 41
+ 25GR1
+
+
+
+
+
+ 42
+ 25GR1
+
+
+
+
+
+ 43
+ 25GR1
+
+
+
+
+
+ 44
+ 25GR1
+
+ 100GR4
+
+
+
+ 45
+ 25GR1
+
+
+
+
+
+ 46
+ 25GR1
+
+
+
+
+
+ 47
+ 25GR1
+
+
+
+
+
+
+ 48
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 48
+ 25GR1
+
+ 100GR4
+
+
+
+ 49
+ 25GR1
+
+
+
+
+
+ 50
+ 25GR1
+
+
+
+
+
+ 51
+ 25GR1
+
+
+
+
+
+ 52
+ 25GR1
+
+ 100GR4
+
+
+
+ 53
+ 25GR1
+
+
+
+
+
+ 54
+ 25GR1
+
+
+
+
+
+ 55
+ 25GR1
+
+
+
+
+
+
+ 56
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 56
+ 25GR1
+
+ 100GR4
+
+
+
+ 57
+ 25GR1
+
+
+
+
+
+ 58
+ 25GR1
+
+
+
+
+
+ 59
+ 25GR1
+
+
+
+
+
+ 60
+ 25GR1
+
+ 100GR4
+
+
+
+ 64
+ 25GR1
+
+
+
+
+
+ 65
+ 25GR1
+
+
+
+
+
+ 66
+ 25GR1
+
+
+
+
+
+
+ 67
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 67
+ 25GR1
+
+ 100GR4
+
+
+
+ 68
+ 25GR1
+
+
+
+
+
+ 69
+ 25GR1
+
+
+
+
+
+ 70
+ 25GR1
+
+
+
+
+
+ 71
+ 25GR1
+
+ 100GR4
+
+
+
+ 72
+ 25GR1
+
+
+
+
+
+ 73
+ 25GR1
+
+
+
+
+
+ 74
+ 25GR1
+
+
+
+
+
+
+ 75
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 75
+ 25GR1
+
+ 100GR4
+
+
+
+ 76
+ 25GR1
+
+
+
+
+
+ 77
+ 25GR1
+
+
+
+
+
+ 78
+ 25GR1
+
+
+
+
+
+ 79
+ 25GR1
+
+ 100GR4
+
+
+
+ 80
+ 25GR1
+
+
+
+
+
+ 81
+ 25GR1
+
+
+
+
+
+ 82
+ 25GR1
+
+
+
+
+
+
+ 83
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 83
+ 25GR1
+
+ 100GR4
+
+
+
+ 84
+ 25GR1
+
+
+
+
+
+ 85
+ 25GR1
+
+
+
+
+
+ 86
+ 25GR1
+
+
+
+
+
+ 87
+ 25GR1
+
+ 100GR4
+
+
+
+ 88
+ 25GR1
+
+
+
+
+
+ 89
+ 25GR1
+
+
+
+
+
+ 90
+ 25GR1
+
+
+
+
+
+
+ 91
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 91
+ 25GR1
+
+ 100GR4
+
+
+
+ 92
+ 25GR1
+
+
+
+
+
+ 93
+ 25GR1
+
+
+
+
+
+ 94
+ 25GR1
+
+
+
+
+
+ 95
+ 25GR1
+
+ 100GR4
+
+
+
+ 96
+ 25GR1
+
+
+
+
+
+ 97
+ 25GR1
+
+
+
+
+
+ 98
+ 25GR1
+
+
+
+
+
+
+ 99
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 99
+ 25GR1
+
+ 100GR4
+
+
+
+ 100
+ 25GR1
+
+
+
+
+
+ 101
+ 25GR1
+
+
+
+
+
+ 102
+ 25GR1
+
+
+
+
+
+ 103
+ 25GR1
+
+ 100GR4
+
+
+
+ 104
+ 25GR1
+
+
+
+
+
+ 105
+ 25GR1
+
+
+
+
+
+ 106
+ 25GR1
+
+
+
+
+
+
+ 107
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 107
+ 25GR1
+
+ 100GR4
+
+
+
+ 108
+ 25GR1
+
+
+
+
+
+ 109
+ 25GR1
+
+
+
+
+
+ 110
+ 25GR1
+
+
+
+
+
+ 111
+ 25GR1
+
+ 100GR4
+
+
+
+ 112
+ 25GR1
+
+
+
+
+
+ 113
+ 25GR1
+
+
+
+
+
+ 114
+ 25GR1
+
+
+
+
+
+
+ 115
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 115
+ 25GR1
+
+ 100GR4
+
+
+
+ 116
+ 25GR1
+
+
+
+
+
+ 117
+ 25GR1
+
+
+
+
+
+ 118
+ 25GR1
+
+
+
+
+
+ 119
+ 25GR1
+
+ 100GR4
+
+
+
+ 120
+ 25GR1
+
+
+
+
+
+ 121
+ 25GR1
+
+
+
+
+
+ 122
+ 25GR1
+
+
+
+
+
+
+ 123
+ AVAGO
+ profile_default
+ 100GR4
+ true
+
+ 123
+ 25GR1
+
+ 100GR4
+
+
+
+ 124
+ 25GR1
+
+
+
+
+
+ 125
+ 25GR1
+
+
+
+
+
+ 126
+ 25GR1
+
+
+
+
+
+ 127
+ 25GR1
+
+ 100GR4
+
+
+
+ 128
+ 25GR1
+
+
+
+
+
+ 129
+ 25GR1
+
+
+
+
+
+ 130
+ 25GR1
+
+
+
+
+
+
+ 131
+ AVAGO
+ profile_default
+ 10GR1Fix
+ false
+
+
+ 132
+ AVAGO
+ profile_default
+ 10GR1Fix
+ false
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..4c6962b96910
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+9699d7ac6395ccab96dec333c782dc1d
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7cd85e016983
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml
@@ -0,0 +1,1180 @@
+
+
+
+
+
+ std-string
+ string
+ standard string.
+ 1
+ 100
+
+
+ queue-id-type
+ uint32
+ Queue id
+ 0
+ 7
+
+
+ precent-type
+ uint32
+ Precent
+ 0
+ 100
+
+
+ phaThreadId-type
+ uint32
+ Thread id
+ 1
+ 255
+
+
+ routing-mode-type
+ enumeration
+ Specifies routing mode.
+
+ POLICY_BASED_ROUTING_ONLY
+ PBR only
+ 0
+
+
+ TCAM_ROUTER_BASED
+ Router engine or PBR
+ 1
+
+
+
+ shared-table-mode-type
+ enumeration
+ Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)
+
+ MID_L3_MID_L2_NO_EM
+ MID_L3_MID_L2_NO_EM
+ 0
+
+
+ MID_L3_MID_L2_MIN_EM
+ MID_L3_MID_L2_MIN_EM
+ 1
+
+
+ LOW_MAX_L3_MID_LOW_L2_NO_EM
+ LOW_MAX_L3_MID_LOW_L2_NO_EM
+ 2
+
+
+ MAX_L3_MIN_L2_NO_EM
+ MAX_L3_MIN_L2_NO_EM
+ 3
+
+
+
+ pha-firmware-image-id-type
+ enumeration
+ Specifies supported Pha image id
+
+ DEFAULT
+ Default PHA firmware image ID
+ 0
+
+
+ 01
+ 01 firmware image ID
+ 1
+
+
+ 02
+ 02 PHA firmware image ID
+ 2
+
+
+
+ pha-firmware-thread-type
+ enumeration
+ Specifies supported Pha thread type
+
+ IOAM_INGRESS_SWITCH_IPV4
+ IOAM_INGRESS_SWITCH_IPV4
+ 1
+
+
+ IOAM_INGRESS_SWITCH_IPV6
+ IOAM_INGRESS_SWITCH_IPV6
+ 2
+
+
+ IOAM_TRANSIT_SWITCH_IPV4
+ IOAM_TRANSIT_SWITCH_IPV4
+ 3
+
+
+ IOAM_TRANSIT_SWITCH_IPV6
+ IOAM_TRANSIT_SWITCH_IPV6
+ 4
+
+
+ INT_IOAM_MIRRORING
+ INT_IOAM_MIRRORING
+ 5
+
+
+ INT_IOAM_EGRESS_SWITCH
+ INT_IOAM_EGRESS_SWITCH
+ 6
+
+
+ MPLS_SR_NO_EL
+ MPLS_SR_NO_EL
+ 7
+
+
+ MPLS_SR_ONE_EL
+ MPLS_SR_ONE_EL
+ 8
+
+
+ MPLS_SR_TWO_EL
+ MPLS_SR_TWO_EL
+ 9
+
+
+ MPLS_SR_THREE_EL
+ MPLS_SR_THREE_EL
+ 10
+
+
+ UNIFIED_SR
+ UNIFIED_SR
+ 11
+
+
+ CLASSIFIER_NSH_OVER_ETHERNET
+ CLASSIFIER_NSH_OVER_ETHERNET
+ 12
+
+
+ CLASSIFIER_NSH_OVER_VXLAN_GPE
+ CLASSIFIER_NSH_OVER_VXLAN_GPE
+ 13
+
+
+ SFF_NSH_VXLAN_GPE_TO_ETHERNET
+ SFF_NSH_VXLAN_GPE_TO_ETHERNET
+ 14
+
+
+ SFF_NSH_ETHERNET_TO_VXLAN_GPE
+ SFF_NSH_ETHERNET_TO_VXLAN_GPE
+ 15
+
+
+ IOAM_EGRESS_SWITCH_IPV6
+ IOAM_EGRESS_SWITCH_IPV6
+ 16
+
+
+ SRV6_END_NODE
+ SRV6_END_NODE
+ 17
+
+
+ SRV6_PENULTIMATE_END_NODE
+ SRV6_PENULTIMATE_END_NODE
+ 18
+
+
+ SRV6_SRC_NODE_1_SEGMENT
+ SRV6_SRC_NODE_1_SEGMENT
+ 19
+
+
+ SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS
+ SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS
+ 20
+
+
+ SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS
+ SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS
+ 21
+
+
+ SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS
+ SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS
+ 22
+
+
+ SGT_NETWORK_ADD_MSB
+ SGT_NETWORK_ADD_MSB
+ 23
+
+
+ SGT_NETWORK_FIX
+ SGT_NETWORK_FIX
+ 24
+
+
+ SGT_NETWORK_REMOVE
+ SGT_NETWORK_REMOVE
+ 25
+
+
+ SGT_EDSA_FIX
+ SGT_EDSA_FIX
+ 26
+
+
+ SGT_EDSA_REMOVE
+ SGT_EDSA_REMOVE
+ 27
+
+
+ SGT_GBP_FIX_IPV4
+ SGT_GBP_FIX_IPV4
+ 28
+
+
+ SGT_GBP_FIX_IPV6
+ SGT_GBP_FIX_IPV6
+ 29
+
+
+ SGT_GBP_REMOVE_IPV4
+ SGT_GBP_REMOVE_IPV4
+ 30
+
+
+ SGT_GBP_REMOVE_IPV6
+ SGT_GBP_REMOVE_IPV6
+ 31
+
+
+ PTP_PHY_1_STEP
+ PTP_PHY_1_STEP
+ 32
+
+
+ EGRESS_MIRRORING_METADATA
+ EGRESS_MIRRORING_METADATA
+ 33
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4
+ 34
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6
+ CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6
+ 35
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4
+ 36
+
+
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6
+ CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6
+ 37
+
+
+ CC_ERSPAN_TYPE_II_SRC_DEV
+ CC_ERSPAN_TYPE_II_SRC_DEV
+ 38
+
+
+ VXLAN_GBP_SOURCE_GROUP_POLICY_ID
+ VXLAN_GBP_SOURCE_GROUP_POLICY_ID
+ 39
+
+
+ SRV6_BEST_EFFORT
+ SRV6_BEST_EFFORT
+ 40
+
+
+ SRV6_SRC_NODE_1_CONTAINER
+ SRV6_SRC_NODE_1_CONTAINER
+ 41
+
+
+ SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS
+ SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS
+ 42
+
+
+ SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS
+ SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS
+ 43
+
+
+ SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS
+ SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS
+ 44
+
+
+ SRV6_END_NODE_COC32_GSID
+ SRV6_END_NODE_COC32_GSID
+ 45
+
+
+ IPV4_TTL_INCREMENT
+ IPV4_TTL_INCREMENT
+ 46
+
+
+ IPV6_HOP_LIMIT_INCREMENT
+ IPV6_HOP_LIMIT_INCREMENT
+ 47
+
+
+ CLEAR_OUTGOING_MTAG_COMMAND
+ CLEAR_OUTGOING_MTAG_COMMAND
+ 48
+
+
+ SFLOW_V5_IPV4
+ SFLOW_V5_IPV4
+ 49
+
+
+ SFLOW_V5_IPV6
+ SFLOW_V5_IPV6
+ 50
+
+
+ SLS
+ SLS
+ 51
+
+
+
+ trunk-member-mode-type
+ enumeration
+ Specifies supported Pha image id
+
+ NATIVE
+ NATIVE
+* the trunk members are filled
+* according to the order given by application.
+* Regular trunk may hold max of 8 members.
+* Cascade trunk may hold :
+* max of 64 members
+ 0
+
+
+ FLEX
+ FLEX
+* A mode to allows flexibility for
+* each Regular trunk to state it's max number of members (before starting to add members).
+* (this mode not effect 'cascade trunk' members)
+* Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+* Cascade trunk may hold : max of 64 members.
+ 2
+
+
+
+ number-physical-port-type
+ enumeration
+ AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024
+
+ no-ports
+ no-ports
+ 0
+
+
+ 64-ports
+ 64-ports
+ 64
+
+
+ 128-ports
+ 128-ports
+ 128
+
+
+ 256-ports
+ 256-ports
+ 256
+
+
+ 512-ports
+ 512-ports
+ 512
+
+
+ 1024-ports
+ 1024-ports
+ 1024
+
+
+
+ serdes-ref-clock-type
+ enumeration
+ Specifies serdes refernce clock.
+
+ external_25_single_ended
+ EXTERNAL_25_SINGLE_ENDED
+ 0
+
+
+ external_125_single_ended
+ EXTERNAL_125_SINGLE_ENDED
+ 1
+
+
+ external_125_diff
+ EXTERNAL_125_DIFF
+ 2
+
+
+ external_156_25_single_ended
+ EXTERNAL_156_25_SINGLE_ENDED
+ 3
+
+
+ external_156_25_diff
+ EXTERNAL_156_25_DIFF
+ 4
+
+
+ internal_125
+ INTERNAL_125
+ 5
+
+
+
+ cpu-port-id-type
+ uint32
+ CPU port id
+ 0
+ 7
+
+
+ rx-buffer-size-type
+ uint32
+ Rx Buffer size
+ 64
+ 10240
+
+
+ tx-sdma-queue-mode-type
+ enumeration
+ Specifies TX queue mode.
+
+ Normal
+ Application
+ 0
+
+
+ Packet_Generator
+ Traffic generator
+ 1
+
+
+
+ alloc-method-type
+ enumeration
+ Specifies Buffers allocation method.
+
+ Dynamic_Alloc
+ Dynamic
+ 0
+
+
+ Static_Alloc
+ Static
+ 1
+
+
+
+ au_mesage_lenght-type
+ enumeration
+ Specifies Buffers allocation method.
+
+ 4_words
+ 4 Words
+ 0
+
+
+ 8_words
+ 8 Words
+ 1
+
+
+
+ boolean-type
+ enumeration
+ Boolean 32 bits , due to bing endian
+
+ false
+ False
+ 0
+
+
+ true
+ True
+ 1
+
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ ASIC_Falcon
+
+ Falcon-3.2
+
+ 4294967295
+ external_25_single_ended
+ 2
+ 60
+ 256-ports
+ false
+ true
+ 0
+
+
+ true
+
+ 4096
+
+
+ 2048
+
+
+
+ 0
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 3
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 2
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 1
+ 0
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 7
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 6
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 5
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 4
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 3
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 2
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 1
+ Static_Alloc
+ 20
+ 20
+ 2048
+ 0
+
+
+ 0
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 6
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 0
+ 7
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 6
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 1
+ 7
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 6
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 2
+ 7
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 0
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 1
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 2
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 3
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 4
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 5
+ Static_Alloc
+ Normal
+ 20
+ 0
+ 128
+
+
+ 3
+ 6
+ Static_Alloc
+ Packet_Generator
+ 256
+ 256
+ 144
+
+
+ 3
+ 7
+ Static_Alloc
+ Packet_Generator
+ 1
+ 1
+ 3032
+
+
+
+ false
+ false
+ false
+ 0
+ 8_words
+ false
+
+
+
+ TCAM_ROUTER_BASED
+ 0
+ MID_L3_MID_L2_NO_EM
+ false
+
+
+ true
+ true
+ true
+ true
+ true
+ true
+
+ 1023
+ FLEX
+
+ true
+ true
+ true
+ true
+
+ false
+ 02
+ 0
+
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..cfa1a375d83b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+88cbf08802a5d41b605a8dd83f2c5139
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..635a099a35aa
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml
@@ -0,0 +1,900 @@
+
+
+
+
+
+ device-id-type
+ uint32
+ Device ID 0..1
+ 0
+ 1
+
+
+ port-id-type
+ uint32
+ Interface number
+ 0
+ 1023
+
+
+ logDest-type
+ enumeration
+ Logging Feature Options
+
+ SAI_LOG_SYSLOG
+ SYSLOG {Syslog service should be running to use this option}
+ 0
+
+
+ SAI_LOG_CONSOLE
+ CONSOLE
+ 1
+
+
+ SAI_LOG_FILE
+ FILE {Warning !!! Use with caution. Can cause disk full issues}
+ 2
+
+
+
+ InDropCounter-type
+ enumeration
+ Router In Drop Reason Feature Options
+
+ TTL_HOPLIMIT_EXCEEDED
+ Router In Drop Counters track TTL & Hop Limit Exceeded Packets
+ 0
+
+
+ ROUTE_BLACKHOLE
+ Router In Drop Counters track Route Black Hole Packets
+ 1
+
+
+
+ Feature-enable
+ enumeration
+ Feature Enabled/Disabled
+
+ Disabled
+ Disabled
+ 0
+
+
+ Enabled
+ Enabled
+ 1
+
+
+
+ log-dest-file-path-type
+ string
+ A string with path to file for logging feature
+ 2
+ 30
+
+
+ acl-feature-name-type
+ enumeration
+
+
+ port-sFlow
+ SFlow over Port
+ 0
+
+
+ port-counters-ipv4-ipv6
+ Port ipv4/ipv6 counters
+ 1
+
+
+ control-acl
+ ACLs for control packet handling
+ 2
+
+
+ debug-counter-acl
+ ACLs for Debug Counters
+ 3
+
+
+
+ ingress-acl-stage-type
+ enumeration
+
+
+ disabled
+ Feature not enabled
+ 0
+
+
+ IPCL0
+ Stage IPCL0
+ 1
+
+
+ IPCL1
+ Stage IPCL1
+ 2
+
+
+
+ egress-acl-stage-type
+ enumeration
+
+
+ disabled
+ Feature not enabled
+ 0
+
+
+ EPCL0
+ Stage EPCL0
+ 2
+
+
+
+ feature-priority-type
+ uint32
+ Feature priority
+ 2
+ 15
+
+
+ hit-number-type
+ uint32
+ Hit/lookup number
+ 0
+ 3
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
+
+ ASIC_Falcon
+ ASK-Board-F3_2T-128x25G.xml
+
+
+ 0
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+
+ 2
+ 0
+ 2
+
+
+ 3
+ 0
+ 3
+
+
+ 4
+ 0
+ 4
+
+
+ 5
+ 0
+ 5
+
+
+ 6
+ 0
+ 6
+
+
+ 7
+ 0
+ 7
+
+
+ 8
+ 0
+ 8
+
+
+ 9
+ 0
+ 9
+
+
+ 10
+ 0
+ 10
+
+
+ 11
+ 0
+ 11
+
+
+ 12
+ 0
+ 12
+
+
+ 13
+ 0
+ 13
+
+
+ 14
+ 0
+ 14
+
+
+ 15
+ 0
+ 15
+
+
+ 16
+ 0
+ 16
+
+
+ 17
+ 0
+ 17
+
+
+ 18
+ 0
+ 18
+
+
+ 19
+ 0
+ 19
+
+
+ 20
+ 0
+ 20
+
+
+ 21
+ 0
+ 21
+
+
+ 22
+ 0
+ 22
+
+
+ 23
+ 0
+ 23
+
+
+ 24
+ 0
+ 24
+
+
+ 25
+ 0
+ 25
+
+
+ 26
+ 0
+ 26
+
+
+ 27
+ 0
+ 27
+
+
+ 28
+ 0
+ 28
+
+
+ 29
+ 0
+ 29
+
+
+ 30
+ 0
+ 30
+
+
+ 31
+ 0
+ 31
+
+
+ 32
+ 0
+ 32
+
+
+ 33
+ 0
+ 33
+
+
+ 34
+ 0
+ 34
+
+
+ 35
+ 0
+ 35
+
+
+ 36
+ 0
+ 36
+
+
+ 37
+ 0
+ 37
+
+
+ 38
+ 0
+ 38
+
+
+ 39
+ 0
+ 39
+
+
+ 40
+ 0
+ 40
+
+
+ 41
+ 0
+ 41
+
+
+ 42
+ 0
+ 42
+
+
+ 43
+ 0
+ 43
+
+
+ 44
+ 0
+ 44
+
+
+ 45
+ 0
+ 45
+
+
+ 46
+ 0
+ 46
+
+
+ 47
+ 0
+ 47
+
+
+ 48
+ 0
+ 48
+
+
+ 49
+ 0
+ 49
+
+
+ 50
+ 0
+ 50
+
+
+ 51
+ 0
+ 51
+
+
+ 52
+ 0
+ 52
+
+
+ 53
+ 0
+ 53
+
+
+ 54
+ 0
+ 54
+
+
+ 55
+ 0
+ 55
+
+
+ 56
+ 0
+ 56
+
+
+ 57
+ 0
+ 57
+
+
+ 58
+ 0
+ 58
+
+
+ 59
+ 0
+ 59
+
+
+ 60
+ 0
+ 60
+
+
+ 61
+ 0
+ 64
+
+
+ 62
+ 0
+ 65
+
+
+ 63
+ 0
+ 66
+
+
+ 64
+ 0
+ 67
+
+
+ 65
+ 0
+ 68
+
+
+ 66
+ 0
+ 69
+
+
+ 67
+ 0
+ 70
+
+
+ 68
+ 0
+ 71
+
+
+ 69
+ 0
+ 72
+
+
+ 70
+ 0
+ 73
+
+
+ 71
+ 0
+ 74
+
+
+ 72
+ 0
+ 75
+
+
+ 73
+ 0
+ 76
+
+
+ 74
+ 0
+ 77
+
+
+ 75
+ 0
+ 78
+
+
+ 76
+ 0
+ 79
+
+
+ 77
+ 0
+ 80
+
+
+ 78
+ 0
+ 81
+
+
+ 79
+ 0
+ 82
+
+
+ 80
+ 0
+ 83
+
+
+ 81
+ 0
+ 84
+
+
+ 82
+ 0
+ 85
+
+
+ 83
+ 0
+ 86
+
+
+ 84
+ 0
+ 87
+
+
+ 85
+ 0
+ 88
+
+
+ 86
+ 0
+ 89
+
+
+ 87
+ 0
+ 90
+
+
+ 88
+ 0
+ 91
+
+
+ 89
+ 0
+ 92
+
+
+ 90
+ 0
+ 93
+
+
+ 91
+ 0
+ 94
+
+
+ 92
+ 0
+ 95
+
+
+ 93
+ 0
+ 96
+
+
+ 94
+ 0
+ 97
+
+
+ 95
+ 0
+ 98
+
+
+ 96
+ 0
+ 99
+
+
+ 97
+ 0
+ 100
+
+
+ 98
+ 0
+ 101
+
+
+ 99
+ 0
+ 102
+
+
+ 100
+ 0
+ 103
+
+
+ 101
+ 0
+ 104
+
+
+ 102
+ 0
+ 105
+
+
+ 103
+ 0
+ 106
+
+
+ 104
+ 0
+ 107
+
+
+ 105
+ 0
+ 108
+
+
+ 106
+ 0
+ 109
+
+
+ 107
+ 0
+ 110
+
+
+ 108
+ 0
+ 111
+
+
+ 109
+ 0
+ 112
+
+
+ 110
+ 0
+ 113
+
+
+ 111
+ 0
+ 114
+
+
+ 112
+ 0
+ 115
+
+
+ 113
+ 0
+ 116
+
+
+ 114
+ 0
+ 117
+
+
+ 115
+ 0
+ 118
+
+
+ 116
+ 0
+ 119
+
+
+ 117
+ 0
+ 120
+
+
+ 118
+ 0
+ 121
+
+
+ 119
+ 0
+ 122
+
+
+ 120
+ 0
+ 123
+
+
+ 121
+ 0
+ 124
+
+
+ 122
+ 0
+ 125
+
+
+ 123
+ 0
+ 126
+
+
+ 124
+ 0
+ 127
+
+
+ 125
+ 0
+ 128
+
+
+ 126
+ 0
+ 129
+
+
+ 127
+ 0
+ 130
+
+
+ 128
+ 0
+ 131
+
+
+ 129
+ 0
+ 132
+
+
+
+ 8
+ 0
+ 0
+ 64
+ 8
+ 8
+ 1024
+ 0
+ 0
+
+
+
+ 0
+
+
+ Enabled
+ Enabled
+
+
+ Enabled
+
+
+
+ SAI_LOG_SYSLOG
+
+
+ control-acl
+ 3
+
+ IPCL0
+ 1
+
+
+ EPCL0
+ 0
+
+
+
+ port-sFlow
+ 4
+
+ IPCL0
+ 0
+
+
+ EPCL0
+ 0
+
+
+
+ port-counters-ipv4-ipv6
+ 5
+
+ IPCL0
+ 3
+
+
+ EPCL0
+ 0
+
+
+
+ debug-counter-acl
+ 2
+
+ IPCL0
+ 1
+
+
+ EPCL0
+ 0
+
+
+
+
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+ "BUFFER_POOL": {
+ "ingress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "ingress"
+ },
+ "ingress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "ingress"
+ },
+ "egress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "egress"
+ },
+ "egress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "egress"
+ }
+ },
+ "BUFFER_PROFILE": {
+ "egress_lossless_profile": {
+ "pool": "egress_pool1",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "egress_lossy_profile": {
+ "pool": "egress_pool2",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "ingress_lossless_profile": {
+ "pool": "ingress_pool1",
+ "size": "0",
+ "dynamic_th": "-3"
+ },
+ "ingress_lossy_profile": {
+ "pool": "ingress_pool2",
+ "size": "0",
+ "dynamic_th": "-3"
+ }
+ },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+ "BUFFER_POOL": {
+ "ingress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "ingress"
+ },
+ "ingress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "ingress"
+ },
+ "egress_pool1": {
+ "mode": "dynamic",
+ "size": "10500000",
+ "type": "egress"
+ },
+ "egress_pool2": {
+ "mode": "dynamic",
+ "size": "1000000",
+ "type": "egress"
+ }
+ },
+ "BUFFER_PROFILE": {
+ "egress_lossless_profile": {
+ "pool": "egress_pool1",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "egress_lossy_profile": {
+ "pool": "egress_pool2",
+ "size": "0",
+ "dynamic_th": "1"
+ },
+ "ingress_lossless_profile": {
+ "pool": "ingress_pool1",
+ "size": "0",
+ "dynamic_th": "-3"
+ },
+ "ingress_lossy_profile": {
+ "pool": "ingress_pool2",
+ "size": "0",
+ "dynamic_th": "-3"
+ }
+ },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..8bea3894c083
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+ "DEVICE_METADATA": {
+ "localhost": {
+ "create_only_config_db_buffers": "true"
+ }
+ }
+}
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json
new file mode 100644
index 000000000000..f6745e836052
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json
@@ -0,0 +1,204 @@
+{
+ "interfaces": {
+ "Ethernet0": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet4": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet8": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet12": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet16": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet20": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet24": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet28": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet32": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet36": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet40": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet44": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet48": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet52": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet56": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet60": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet64": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet68": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet72": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet76": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet80": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet84": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet88": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet92": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet96": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet100": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet104": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet108": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet112": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet116": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet120": {
+ "default_brkout_mode": "2x100G",
+ "subport": "1",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet124": {
+ "default_brkout_mode": "2x100G",
+ "subport": "2",
+ "autoneg": "on",
+ "fec": "none"
+ },
+ "Ethernet128": {
+ "default_brkout_mode": "1x10G",
+ "autoneg": "off"
+ },
+ "Ethernet129": {
+ "default_brkout_mode": "1x10G",
+ "autoneg": "off"
+ }
+ }
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini
new file mode 100644
index 000000000000..85d256856fb8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini
@@ -0,0 +1,131 @@
+# name lanes alias speed autoneg fec index
+Ethernet0 0 Eth1/1 25000 on none 1
+Ethernet1 1 Eth1/2 25000 on none 1
+Ethernet2 2 Eth1/3 25000 on none 1
+Ethernet3 3 Eth1/4 25000 on none 1
+Ethernet4 4 Eth1/5 25000 on none 1
+Ethernet5 5 Eth1/6 25000 on none 1
+Ethernet6 6 Eth1/7 25000 on none 1
+Ethernet7 7 Eth1/8 25000 on none 1
+Ethernet8 8 Eth2/1 25000 on none 2
+Ethernet9 9 Eth2/2 25000 on none 2
+Ethernet10 10 Eth2/3 25000 on none 2
+Ethernet11 11 Eth2/4 25000 on none 2
+Ethernet12 12 Eth2/5 25000 on none 2
+Ethernet13 13 Eth2/6 25000 on none 2
+Ethernet14 14 Eth2/7 25000 on none 2
+Ethernet15 15 Eth2/8 25000 on none 2
+Ethernet16 16 Eth3/1 25000 on none 3
+Ethernet17 17 Eth3/2 25000 on none 3
+Ethernet18 18 Eth3/3 25000 on none 3
+Ethernet19 19 Eth3/4 25000 on none 3
+Ethernet20 20 Eth3/5 25000 on none 3
+Ethernet21 21 Eth3/6 25000 on none 3
+Ethernet22 22 Eth3/7 25000 on none 3
+Ethernet23 23 Eth3/8 25000 on none 3
+Ethernet24 24 Eth4/1 25000 on none 4
+Ethernet25 25 Eth4/2 25000 on none 4
+Ethernet26 26 Eth4/3 25000 on none 4
+Ethernet27 27 Eth4/4 25000 on none 4
+Ethernet28 28 Eth4/5 25000 on none 4
+Ethernet29 29 Eth4/6 25000 on none 4
+Ethernet30 30 Eth4/7 25000 on none 4
+Ethernet31 31 Eth4/8 25000 on none 4
+Ethernet32 32 Eth5/1 25000 on none 5
+Ethernet33 33 Eth5/2 25000 on none 5
+Ethernet34 34 Eth5/3 25000 on none 5
+Ethernet35 35 Eth5/4 25000 on none 5
+Ethernet36 36 Eth5/5 25000 on none 5
+Ethernet37 37 Eth5/6 25000 on none 5
+Ethernet38 38 Eth5/7 25000 on none 5
+Ethernet39 39 Eth5/8 25000 on none 5
+Ethernet40 40 Eth6/1 25000 on none 6
+Ethernet41 41 Eth6/2 25000 on none 6
+Ethernet42 42 Eth6/3 25000 on none 6
+Ethernet43 43 Eth6/4 25000 on none 6
+Ethernet44 44 Eth6/5 25000 on none 6
+Ethernet45 45 Eth6/6 25000 on none 6
+Ethernet46 46 Eth6/7 25000 on none 6
+Ethernet47 47 Eth6/8 25000 on none 6
+Ethernet48 48 Eth7/1 25000 on none 7
+Ethernet49 49 Eth7/2 25000 on none 7
+Ethernet50 50 Eth7/3 25000 on none 7
+Ethernet51 51 Eth7/4 25000 on none 7
+Ethernet52 52 Eth7/5 25000 on none 7
+Ethernet53 53 Eth7/6 25000 on none 7
+Ethernet54 54 Eth7/7 25000 on none 7
+Ethernet55 55 Eth7/8 25000 on none 7
+Ethernet56 56 Eth8/1 25000 on none 8
+Ethernet57 57 Eth8/2 25000 on none 8
+Ethernet58 58 Eth8/3 25000 on none 8
+Ethernet59 59 Eth8/4 25000 on none 8
+Ethernet60 60 Eth8/5 25000 on none 8
+Ethernet61 61 Eth8/6 25000 on none 8
+Ethernet62 62 Eth8/7 25000 on none 8
+Ethernet63 63 Eth8/8 25000 on none 8
+Ethernet64 64 Eth9/1 25000 on none 9
+Ethernet65 65 Eth9/2 25000 on none 9
+Ethernet66 66 Eth9/3 25000 on none 9
+Ethernet67 67 Eth9/4 25000 on none 9
+Ethernet68 68 Eth9/5 25000 on none 9
+Ethernet69 69 Eth9/6 25000 on none 9
+Ethernet70 70 Eth9/7 25000 on none 9
+Ethernet71 71 Eth9/8 25000 on none 9
+Ethernet72 72 Eth10/1 25000 on none 10
+Ethernet73 73 Eth10/2 25000 on none 10
+Ethernet74 74 Eth10/3 25000 on none 10
+Ethernet75 75 Eth10/4 25000 on none 10
+Ethernet76 76 Eth10/5 25000 on none 10
+Ethernet77 77 Eth10/6 25000 on none 10
+Ethernet78 78 Eth10/7 25000 on none 10
+Ethernet79 79 Eth10/8 25000 on none 10
+Ethernet80 80 Eth11/1 25000 on none 11
+Ethernet81 81 Eth11/2 25000 on none 11
+Ethernet82 82 Eth11/3 25000 on none 11
+Ethernet83 83 Eth11/4 25000 on none 11
+Ethernet84 84 Eth11/5 25000 on none 11
+Ethernet85 85 Eth11/6 25000 on none 11
+Ethernet86 86 Eth11/7 25000 on none 11
+Ethernet87 87 Eth11/8 25000 on none 11
+Ethernet88 88 Eth12/1 25000 on none 12
+Ethernet89 89 Eth12/2 25000 on none 12
+Ethernet90 90 Eth12/3 25000 on none 12
+Ethernet91 91 Eth12/4 25000 on none 12
+Ethernet92 92 Eth12/5 25000 on none 12
+Ethernet93 93 Eth12/6 25000 on none 12
+Ethernet94 94 Eth12/7 25000 on none 12
+Ethernet95 95 Eth12/8 25000 on none 12
+Ethernet96 96 Eth13/1 25000 on none 13
+Ethernet97 97 Eth13/2 25000 on none 13
+Ethernet98 98 Eth13/3 25000 on none 13
+Ethernet99 99 Eth13/4 25000 on none 13
+Ethernet100 100 Eth13/5 25000 on none 13
+Ethernet101 101 Eth13/6 25000 on none 13
+Ethernet102 102 Eth13/7 25000 on none 13
+Ethernet103 103 Eth13/8 25000 on none 13
+Ethernet104 104 Eth14/1 25000 on none 14
+Ethernet105 105 Eth14/2 25000 on none 14
+Ethernet106 106 Eth14/3 25000 on none 14
+Ethernet107 107 Eth14/4 25000 on none 14
+Ethernet108 108 Eth14/5 25000 on none 14
+Ethernet109 109 Eth14/6 25000 on none 14
+Ethernet110 110 Eth14/7 25000 on none 14
+Ethernet111 111 Eth14/8 25000 on none 14
+Ethernet112 112 Eth15/1 25000 on none 15
+Ethernet113 113 Eth15/2 25000 on none 15
+Ethernet114 114 Eth15/3 25000 on none 15
+Ethernet115 115 Eth15/4 25000 on none 15
+Ethernet116 116 Eth15/5 25000 on none 15
+Ethernet117 117 Eth15/6 25000 on none 15
+Ethernet118 118 Eth15/7 25000 on none 15
+Ethernet119 119 Eth15/8 25000 on none 15
+Ethernet120 120 Eth16/1 25000 on none 16
+Ethernet121 121 Eth16/2 25000 on none 16
+Ethernet122 122 Eth16/3 25000 on none 16
+Ethernet123 123 Eth16/4 25000 on none 16
+Ethernet124 124 Eth16/5 25000 on none 16
+Ethernet125 125 Eth16/6 25000 on none 16
+Ethernet126 126 Eth16/7 25000 on none 16
+Ethernet127 127 Eth16/8 25000 on none 16
+Ethernet128 128 Eth17 10000 off none 129
+Ethernet129 129 Eth17 10000 off none 130
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini
new file mode 100644
index 000000000000..c2f77685ad0a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile
new file mode 100644
index 000000000000..2477a839e09e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC128x25G
+switchProfile=/usr/share/sonic/hwsku/SAI-F3_2T-128x25G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku
new file mode 100644
index 000000000000..a88ea359eef8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku
@@ -0,0 +1 @@
+db98cx8522_10cc t1
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json
new file mode 100644
index 000000000000..205de6cf42f1
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json
@@ -0,0 +1,146 @@
+{
+ "interfaces": {
+ "Ethernet0": {
+ "breakout_modes": {
+ "2x100G": ["Eth1/1", "Eth1/2"],
+ "8x25G[10G]": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4", "Eth1/5", "Eth1/6", "Eth1/7", "Eth1/8"]
+ },
+ "index": "1,1,1,1,1,1,1,1",
+ "lanes": "0,1,2,3,4,5,6,7"
+ },
+ "Ethernet8": {
+ "breakout_modes": {
+ "2x100G": ["Eth2/1", "Eth2/2"],
+ "8x50G[10G]": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4", "Eth2/5", "Eth2/6", "Eth2/7", "Eth2/8"]
+ },
+ "index": "2,2,2,2,2,2,2,2",
+ "lanes": "8,9,10,11,12,13,14,15"
+ },
+ "Ethernet16": {
+ "breakout_modes": {
+ "2x100G": ["Eth3/1", "Eth3/2"],
+ "8x50G[10G]": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4", "Eth3/5", "Eth3/6", "Eth3/7", "Eth3/8"]
+ },
+ "index": "3,3,3,3,3,3,3,3",
+ "lanes": "16,17,18,19,20,21,22,23"
+ },
+ "Ethernet24": {
+ "breakout_modes": {
+ "2x100G": ["Eth4/1", "Eth4/2"],
+ "8x50G[10G]": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4", "Eth4/5", "Eth4/6", "Eth4/7", "Eth4/8"]
+ },
+ "index": "4,4,4,4,4,4,4,4",
+ "lanes": "24,25,26,27,28,29,30,31"
+ },
+ "Ethernet32": {
+ "breakout_modes": {
+ "2x100G": ["Eth5/1", "Eth5/2"],
+ "8x50G[10G]": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4", "Eth5/5", "Eth5/6", "Eth5/7", "Eth5/8"]
+ },
+ "index": "5,5,5,5,5,5,5,5",
+ "lanes": "32,33,34,35,36,37,38,39"
+ },
+ "Ethernet40": {
+ "breakout_modes": {
+ "2x100G": ["Eth6/1", "Eth6/2"],
+ "8x50G[10G]": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4", "Eth6/5", "Eth6/6", "Eth6/7", "Eth6/8"]
+ },
+ "index": "6,6,6,6,6,6,6,6",
+ "lanes": "40,41,42,43,44,45,46,47"
+ },
+ "Ethernet48": {
+ "breakout_modes": {
+ "2x100G": ["Eth7/1", "Eth7/2"],
+ "8x50G[10G]": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4", "Eth7/5", "Eth7/6", "Eth7/7", "Eth7/8"]
+ },
+ "index": "7,7,7,7,7,7,7,7",
+ "lanes": "48,49,50,51,52,53,54,55"
+ },
+ "Ethernet56": {
+ "breakout_modes": {
+ "2x100G": ["Eth8/1", "Eth8/2"],
+ "8x50G[10G]": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4", "Eth8/5", "Eth8/6", "Eth8/7", "Eth8/8"]
+ },
+ "index": "8,8,8,8,8,8,8,8",
+ "lanes": "56,57,58,59,60,61,62,63"
+ },
+ "Ethernet64": {
+ "breakout_modes": {
+ "2x100G": ["Eth9/1", "Eth9/2"],
+ "8x50G[10G]": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4", "Eth9/5", "Eth9/6", "Eth9/7", "Eth9/8"]
+ },
+ "index": "9,9,9,9,9,9,9,9",
+ "lanes": "64,65,66,67,68,69,70,71"
+ },
+ "Ethernet72": {
+ "breakout_modes": {
+ "2x100G": ["Eth10/1", "Eth10/2"],
+ "8x50G[10G]": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4", "Eth10/5", "Eth10/6", "Eth10/7", "Eth10/8"]
+ },
+ "index": "10,10,10,10,10,10,10,10",
+ "lanes": "72,73,74,75,76,77,78,79"
+ },
+ "Ethernet80": {
+ "breakout_modes": {
+ "2x100G": ["Eth11/1", "Eth11/2"],
+ "8x50G[10G]": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4", "Eth11/5", "Eth11/6", "Eth11/7", "Eth11/8"]
+ },
+ "index": "11,11,11,11,11,11,11,11",
+ "lanes": "80,81,82,83,84,85,86,87"
+ },
+ "Ethernet88": {
+ "breakout_modes": {
+ "2x100G": ["Eth12/1", "Eth12/2"],
+ "8x50G[10G]": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4", "Eth12/5", "Eth12/6", "Eth12/7", "Eth12/8"]
+ },
+ "index": "12,12,12,12,12,12,12,12",
+ "lanes": "88,89,90,91,92,93,94,95"
+ },
+ "Ethernet96": {
+ "breakout_modes": {
+ "2x100G": ["Eth13/1", "Eth13/2"],
+ "8x50G[10G]": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4", "Eth13/5", "Eth13/6", "Eth13/7", "Eth13/8"]
+ },
+ "index": "13,13,13,13,13,13,13,13",
+ "lanes": "96,97,98,99,100,101,102,103"
+ },
+ "Ethernet104": {
+ "breakout_modes": {
+ "2x100G": ["Eth14/1", "Eth14/2"],
+ "8x50G[10G]": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4", "Eth14/5", "Eth14/6", "Eth14/7", "Eth14/8"]
+ },
+ "index": "14,14,14,14,14,14,14,14",
+ "lanes": "104,105,106,107,108,109,110,111"
+ },
+ "Ethernet112": {
+ "breakout_modes": {
+ "2x100G": ["Eth15/1", "Eth15/2"],
+ "8x50G[10G]": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4", "Eth15/5", "Eth15/6", "Eth15/7", "Eth15/8"]
+ },
+ "index": "15,15,15,15,15,15,15,15",
+ "lanes": "112,113,114,115,116,117,118,119"
+ },
+ "Ethernet120": {
+ "breakout_modes": {
+ "2x100G": ["Eth16/1", "Eth16/2"],
+ "8x50G[10G]": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4", "Eth16/5", "Eth16/6", "Eth16/7", "Eth16/8"]
+ },
+ "index": "16,16,16,16,16,16,16,16",
+ "lanes": "120,121,122,123,124,125,126,127"
+ },
+ "Ethernet128":{
+ "breakout_modes": {
+ "1x10G": ["Eth17"]
+ },
+ "index": "17",
+ "lanes": "128"
+ },
+ "Ethernet129":{
+ "breakout_modes": {
+ "1x10G": ["Eth18"]
+ },
+ "index": "18",
+ "lanes": "129"
+ }
+ }
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
new file mode 100644
index 000000000000..a554752878b7
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
@@ -0,0 +1 @@
+marvell
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..39deb88be078
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json
@@ -0,0 +1,8 @@
+{
+ "skip_ledd": true,
+ "skip_pcied": true,
+ "skip_thermalctld": true,
+ "skip_psud": true,
+ "skip_xcvrd": true,
+ "skip_syseepromd": true
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..79c17103bf76
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json
@@ -0,0 +1,10 @@
+{
+ "services_to_ignore": [],
+ "devices_to_ignore": [
+ "asic",
+ "psu.temperature",
+ "fan",
+ "psu"
+ ],
+ "user_defined_checkers": []
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
index dbc19c9baabf..8ffea7b92f8e 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
@@ -2,6 +2,7 @@
"skip_ledd": true,
"skip_fancontrol": true,
"delay_xcvrd": true,
- "skip_xcvrd_cmis_mgr": true
+ "skip_xcvrd_cmis_mgr": true,
+ "delay_non_critical_daemon": true
}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
index d2a798d25fce..c9370bd6d7f4 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
@@ -653,6 +653,10 @@
"interface": {
"Ethernet224": "Ethernet0"
},
+ "serial-console": {
+ "device": "ttyUSB0",
+ "baud-rate": "115200"
+ },
"rshim_info": "rshim0",
"bus_info": "0000:08:00.0"
},
@@ -661,6 +665,10 @@
"interface": {
"Ethernet232": "Ethernet0"
},
+ "serial-console": {
+ "device": "ttyUSB1",
+ "baud-rate": "115200"
+ },
"rshim_info": "rshim1",
"bus_info": "0000:07:00.0"
},
@@ -669,6 +677,10 @@
"interface": {
"Ethernet240": "Ethernet0"
},
+ "serial-console": {
+ "device": "ttyUSB2",
+ "baud-rate": "115200"
+ },
"rshim_info": "rshim2",
"bus_info": "0000:01:00.0"
},
@@ -677,6 +689,10 @@
"interface": {
"Ethernet248": "Ethernet0"
},
+ "serial-console": {
+ "device": "ttyUSB3",
+ "baud-rate": "115200"
+ },
"rshim_info": "rshim3",
"bus_info": "0000:02:00.0"
}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2
new file mode 120000
index 000000000000..add8bf8bb7c2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2
new file mode 100644
index 000000000000..05f6cd29a50c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2
@@ -0,0 +1,310 @@
+{#
+ SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+ Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ SPDX-License-Identifier: Apache-2.0
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+#}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+ "BUFFER_POOL": {
+ {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%}
+ "ingress_zero_pool" : {
+ "mode": "static",
+ "type": "ingress",
+ "size": "0"
+ },
+ {% endif -%}
+ "ingress_lossless_pool": {
+ {% if dynamic_mode is not defined -%}
+ "size": "{{ ingress_lossless_pool_size }}",
+ "xoff": "{{ ingress_lossless_pool_xoff }}",
+ {% endif -%}
+ "type": "ingress",
+ "mode": "dynamic"
+ },
+ "egress_lossless_pool": {
+ "size": "{{ egress_lossless_pool_size }}",
+ "type": "egress",
+ "mode": "dynamic"
+ },
+ "egress_lossy_pool": {
+ {% if dynamic_mode is not defined -%}
+ "size": "{{ egress_lossy_pool_size }}",
+ {% endif -%}
+ "type": "egress",
+ "mode": "dynamic"
+ }
+ },
+ "BUFFER_PROFILE": {
+ {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%}
+ "ingress_lossy_pg_zero_profile" : {
+ "pool":"ingress_zero_pool",
+ "size":"0",
+ "static_th":"0"
+ },
+ "ingress_lossless_zero_profile" : {
+ "pool":"ingress_lossless_pool",
+ "size":"0",
+ "dynamic_th":"-8"
+ },
+ "egress_lossless_zero_profile" : {
+ "pool":"egress_lossless_pool",
+ "size":"0",
+ "dynamic_th":"-8"
+ },
+ "egress_lossy_zero_profile" : {
+ "pool":"egress_lossy_pool",
+ "size":"0",
+ "dynamic_th":"-8"
+ },
+ {% endif -%}
+ "ingress_lossless_profile": {
+ "pool":"ingress_lossless_pool",
+ "size":"0",
+ "dynamic_th":"7"
+ },
+ "ingress_lossy_profile": {
+ "pool":"ingress_lossless_pool",
+ "size":"0",
+ "dynamic_th":"3"
+ },
+ "egress_lossless_profile": {
+ "pool":"egress_lossless_pool",
+ "size":"0",
+ "dynamic_th":"7"
+ },
+ "egress_lossy_profile": {
+ "pool":"egress_lossy_pool",
+ "size":"9216",
+ "dynamic_th":"7"
+ },
+ "q_lossy_profile": {
+ "pool":"egress_lossy_pool",
+ "size":"0",
+ "dynamic_th":"3"
+ }
+ },
+{%- endmacro %}
+
+{%- macro generate_profile_lists(port_names_active, port_names_inactive) %}
+ "BUFFER_PORT_INGRESS_PROFILE_LIST": {
+{% for port in port_names_active.split(',') %}
+ "{{ port }}": {
+ "profile_list" : "ingress_lossless_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% if port_names_inactive|length > 0 %}
+,
+{% for port in port_names_inactive.split(',') %}
+ "{{ port }}": {
+{% if dynamic_mode is defined %}
+ "profile_list" : "ingress_lossless_profile"
+{% else %}
+ "profile_list" : "ingress_lossless_zero_profile"
+{% endif %}
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+ },
+ "BUFFER_PORT_EGRESS_PROFILE_LIST": {
+{% for port in port_names_active.split(',') %}
+ "{{ port }}": {
+ "profile_list" : "egress_lossless_profile,egress_lossy_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% if port_names_inactive|length > 0 %}
+,
+{% for port in port_names_inactive.split(',') %}
+ "{{ port }}": {
+{% if dynamic_mode is defined %}
+ "profile_list" : "egress_lossless_profile,egress_lossy_profile"
+{% else %}
+ "profile_list" : "egress_lossless_zero_profile,egress_lossy_zero_profile"
+{% endif %}
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+ }
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) %}
+ "BUFFER_QUEUE": {
+{% set q_loop = namespace(last_valid=false) %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+ "{{ port }}|3-4": {
+ "profile" : "egress_lossless_profile"
+ },
+{% endif %}
+{% endfor %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+ "{{ port }}|0-2": {
+ "profile" : "q_lossy_profile"
+ },
+{% endif %}
+{% endfor %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+ "{{ port }}|5-7": {
+{% else %}
+ "{{ port }}|5-6": {
+{% endif %}
+ "profile" : "q_lossy_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% set q_loop.last_valid = true %}
+{% else %}
+{% set q_loop.last_valid = false %}
+{% endif %}
+{% endfor %}
+{% if port_names_extra_queues|length > 0 %}
+{% if q_loop.last_valid %},{% endif %}
+{% for port in port_names_extra_queues.split(',') %}
+ "{{ port }}|0-1": {
+ "profile" : "q_lossy_profile"
+ },
+ "{{ port }}|2-4": {
+ "profile" : "egress_lossless_profile"
+ },
+ "{{ port }}|5": {
+ "profile" : "q_lossy_profile"
+ },
+ "{{ port }}|6": {
+ "profile" : "egress_lossless_profile"
+ },
+ "{{ port }}|7": {
+ "profile" : "q_lossy_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% if port_names_inactive|length > 0 %}
+,
+{% if dynamic_mode is defined %}
+{% for port in port_names_inactive.split(',') %}
+ "{{ port }}|3-4": {
+ "profile" : "egress_lossless_profile"
+ },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+ "{{ port }}|0-2": {
+ "profile" : "q_lossy_profile"
+ },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+ "{{ port }}|5-7": {
+{% else %}
+ "{{ port }}|5-6": {
+{% endif %}
+ "profile" : "q_lossy_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% else %}
+{% for port in port_names_inactive.split(',') %}
+ "{{ port }}|3-4": {
+ "profile" : "egress_lossless_zero_profile"
+ },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+ "{{ port }}|0-2": {
+ "profile" : "egress_lossy_zero_profile"
+ },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+ "{{ port }}|5-7": {
+{% else %}
+ "{{ port }}|5-6": {
+{% endif %}
+ "profile" : "egress_lossy_zero_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% endif %}
+ }
+{%- endmacro %}
+
+{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %}
+{{ generate_queue_buffers_with_extra_lossless_queues(port_names_active, "", port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+ "BUFFER_PG": {
+{% set pg_loop = namespace(last_valid=false) %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_pgs.split(',') %}
+{% if dynamic_mode is defined %}
+ "{{ port }}|3-4": {
+ "profile" : "NULL"
+ },
+{% endif %}
+ "{{ port }}|0": {
+ "profile" : "ingress_lossy_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% set pg_loop.last_valid = true %}
+{% else %}
+{% set pg_loop.last_valid = false %}
+{% endif %}
+{% endfor %}
+{% if port_names_extra_pgs|length > 0 %}
+{% if pg_loop.last_valid %},{% endif %}
+{% for port in port_names_extra_pgs.split(',') %}
+{% if dynamic_mode is defined %}
+ "{{ port }}|2-4": {
+ "profile" : "NULL"
+ },
+ "{{ port }}|6": {
+ "profile" : "NULL"
+ },
+{% endif %}
+ "{{ port }}|0": {
+ "profile" : "ingress_lossy_profile"
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% if port_names_inactive|length > 0 %}
+{%- for port in port_names_inactive.split(',') %}
+ {%- if loop.first -%},{%- endif -%}
+{% if dynamic_mode is defined %}
+ "{{ port }}|3-4": {
+ "profile" : "NULL"
+ },
+{% endif %}
+ "{{ port }}|0": {
+{% if dynamic_mode is defined %}
+ "profile" : "ingress_lossy_profile"
+{% else %}
+ "profile" : "ingress_lossy_pg_zero_profile"
+{% endif %}
+ }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+ }
+{%- endmacro %}
+
+{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %}
+{{ generate_pg_profiles_with_extra_lossless_pgs(port_names_active, "", port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..c20859c33f34
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
@@ -0,0 +1,48 @@
+{#
+ SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+ Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ Apache-2.0
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size = '113722268' %}
+{% set ingress_lossless_pool_xoff = '19062784' %}
+{% set egress_lossless_pool_size = '158229504' %}
+{% set egress_lossy_pool_size = '113722268' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..94ba1b680915
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
@@ -0,0 +1,55 @@
+{#
+ SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+ Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ Apache-2.0
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+#}
+{% set default_cable = '250m' %}
+{% set ingress_lossless_pool_size = '113722368' %}
+{% set ingress_lossless_pool_xoff = '19062784' %}
+{% set egress_lossless_pool_size = '158229504' %}
+{% set egress_lossy_pool_size = '113722368' %}
+
+{%-set ports2cable = {
+ 'torrouter_server' : '40m',
+ 'leafrouter_torrouter' : '250m',
+ 'spinerouter_leafrouter' : '1000m'
+ }
+-%}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2
new file mode 120000
index 000000000000..8c4117c66214
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..6feb156714fe
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+ "DEVICE_METADATA": {
+ "localhost": {
+ "create_only_config_db_buffers": "true"
+ }
+ }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json
new file mode 120000
index 000000000000..2f4f358b3ba1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json
new file mode 120000
index 000000000000..f0e582a4d772
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini
new file mode 100644
index 000000000000..a87d3445ed35
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini
@@ -0,0 +1,51 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+# PG lossless profiles.
+# speed cable size xon xoff threshold
+ 10000 5m 19456 19456 20480 0
+ 25000 5m 19456 19456 21504 0
+ 40000 5m 19456 19456 24576 0
+ 50000 5m 19456 19456 26624 0
+ 100000 5m 19456 19456 44032 0
+ 200000 5m 19456 19456 50176 0
+ 400000 5m 19456 19456 86016 0
+ 800000 5m 38912 38912 95232 0
+ 10000 40m 19456 19456 20480 0
+ 25000 40m 19456 19456 22528 0
+ 40000 40m 19456 19456 25600 0
+ 50000 40m 19456 19456 28672 0
+ 100000 40m 19456 19456 49152 0
+ 200000 40m 19456 19456 60416 0
+ 400000 40m 19456 19456 104448 0
+ 800000 40m 38912 38912 132096 0
+ 10000 250m 19456 19456 14336 0
+ 25000 250m 19456 19456 20480 0
+ 40000 250m 19456 19456 28672 0
+ 50000 250m 19456 19456 33792 0
+ 100000 250m 19456 19456 68608 0
+ 200000 250m 19456 19456 107520 0
+ 400000 250m 19456 19456 208896 0
+ 800000 250m 38912 38912 349184 0
+ 10000 1000m 19456 19456 24576 0
+ 25000 1000m 19456 19456 46080 0
+ 40000 1000m 19456 19456 68608 0
+ 50000 1000m 19456 19456 83968 0
+ 100000 1000m 19456 19456 168960 0
+ 200000 1000m 19456 19456 308224 0
+ 400000 1000m 19456 19456 610304 0
+ 800000 1000m 38912 38912 1153024 0
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json
new file mode 100644
index 000000000000..281b96b71cc6
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json
@@ -0,0 +1,5 @@
+{
+ "skip_ledd": true,
+ "skip_fancontrol": true,
+ "skip_xcvrd_cmis_mgr": false
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini
new file mode 100644
index 000000000000..2cc6ff80714f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini
@@ -0,0 +1,252 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name lanes alias index speed fec autoneg subport
+Ethernet0 0 etp1a 1 100000 rs off 1
+Ethernet1 1 etp1b 1 100000 rs off 2
+Ethernet2 2 etp1c 1 100000 rs off 3
+Ethernet3 3 etp1d 1 100000 rs off 4
+Ethernet4 4 etp1e 1 100000 rs off 5
+Ethernet5 5 etp1f 1 100000 rs off 6
+Ethernet6 6 etp1g 1 100000 rs off 7
+Ethernet7 7 etp1h 1 100000 rs off 8
+Ethernet16 16 etp3a 3 100000 rs off 1
+Ethernet17 17 etp3b 3 100000 rs off 2
+Ethernet18 18 etp3c 3 100000 rs off 3
+Ethernet19 19 etp3d 3 100000 rs off 4
+Ethernet20 20 etp3e 3 100000 rs off 5
+Ethernet21 21 etp3f 3 100000 rs off 6
+Ethernet22 22 etp3g 3 100000 rs off 7
+Ethernet23 23 etp3h 3 100000 rs off 8
+Ethernet32 32 etp5a 5 100000 rs off 1
+Ethernet33 33 etp5b 5 100000 rs off 2
+Ethernet34 34 etp5c 5 100000 rs off 3
+Ethernet35 35 etp5d 5 100000 rs off 4
+Ethernet36 36 etp5e 5 100000 rs off 5
+Ethernet37 37 etp5f 5 100000 rs off 6
+Ethernet38 38 etp5g 5 100000 rs off 7
+Ethernet39 39 etp5h 5 100000 rs off 8
+Ethernet48 48 etp7a 7 100000 rs off 1
+Ethernet49 49 etp7b 7 100000 rs off 2
+Ethernet50 50 etp7c 7 100000 rs off 3
+Ethernet51 51 etp7d 7 100000 rs off 4
+Ethernet52 52 etp7e 7 100000 rs off 5
+Ethernet53 53 etp7f 7 100000 rs off 6
+Ethernet54 54 etp7g 7 100000 rs off 7
+Ethernet55 55 etp7h 7 100000 rs off 8
+Ethernet64 64 etp9a 9 100000 rs off 1
+Ethernet65 65 etp9b 9 100000 rs off 2
+Ethernet66 66 etp9c 9 100000 rs off 3
+Ethernet67 67 etp9d 9 100000 rs off 4
+Ethernet68 68 etp9e 9 100000 rs off 5
+Ethernet69 69 etp9f 9 100000 rs off 6
+Ethernet70 70 etp9g 9 100000 rs off 7
+Ethernet71 71 etp9h 9 100000 rs off 8
+Ethernet80 80 etp11a 11 100000 rs off 1
+Ethernet81 81 etp11b 11 100000 rs off 2
+Ethernet82 82 etp11c 11 100000 rs off 3
+Ethernet83 83 etp11d 11 100000 rs off 4
+Ethernet84 84 etp11e 11 100000 rs off 5
+Ethernet85 85 etp11f 11 100000 rs off 6
+Ethernet86 86 etp11g 11 100000 rs off 7
+Ethernet87 87 etp11h 11 100000 rs off 8
+Ethernet96 96,97,98,99 etp13a 13 400000 rs off 1
+Ethernet100 100,101,102,103 etp13b 13 400000 rs off 2
+Ethernet112 112 etp15a 15 100000 rs off 1
+Ethernet113 113 etp15b 15 100000 rs off 2
+Ethernet114 114 etp15c 15 100000 rs off 3
+Ethernet115 115 etp15d 15 100000 rs off 4
+Ethernet116 116 etp15e 15 100000 rs off 5
+Ethernet117 117 etp15f 15 100000 rs off 6
+Ethernet118 118 etp15g 15 100000 rs off 7
+Ethernet119 119 etp15h 15 100000 rs off 8
+Ethernet128 128,129,130,131 etp17a 17 400000 rs off 1
+Ethernet132 132,133,134,135 etp17b 17 400000 rs off 2
+Ethernet144 144 etp19a 19 100000 rs off 1
+Ethernet145 145 etp19b 19 100000 rs off 2
+Ethernet146 146 etp19c 19 100000 rs off 3
+Ethernet147 147 etp19d 19 100000 rs off 4
+Ethernet148 148 etp19e 19 100000 rs off 5
+Ethernet149 149 etp19f 19 100000 rs off 6
+Ethernet150 150 etp19g 19 100000 rs off 7
+Ethernet151 151 etp19h 19 100000 rs off 8
+Ethernet160 160 etp21a 21 100000 rs off 1
+Ethernet161 161 etp21b 21 100000 rs off 2
+Ethernet162 162 etp21c 21 100000 rs off 3
+Ethernet163 163 etp21d 21 100000 rs off 4
+Ethernet164 164 etp21e 21 100000 rs off 5
+Ethernet165 165 etp21f 21 100000 rs off 6
+Ethernet166 166 etp21g 21 100000 rs off 7
+Ethernet167 167 etp21h 21 100000 rs off 8
+Ethernet176 176 etp23a 23 100000 rs off 1
+Ethernet177 177 etp23b 23 100000 rs off 2
+Ethernet178 178 etp23c 23 100000 rs off 3
+Ethernet179 179 etp23d 23 100000 rs off 4
+Ethernet180 180 etp23e 23 100000 rs off 5
+Ethernet181 181 etp23f 23 100000 rs off 6
+Ethernet182 182 etp23g 23 100000 rs off 7
+Ethernet183 183 etp23h 23 100000 rs off 8
+Ethernet192 192 etp25a 25 100000 rs off 1
+Ethernet193 193 etp25b 25 100000 rs off 2
+Ethernet194 194 etp25c 25 100000 rs off 3
+Ethernet195 195 etp25d 25 100000 rs off 4
+Ethernet196 196 etp25e 25 100000 rs off 5
+Ethernet197 197 etp25f 25 100000 rs off 6
+Ethernet198 198 etp25g 25 100000 rs off 7
+Ethernet199 199 etp25h 25 100000 rs off 8
+Ethernet208 208 etp27a 27 100000 rs off 1
+Ethernet209 209 etp27b 27 100000 rs off 2
+Ethernet210 210 etp27c 27 100000 rs off 3
+Ethernet211 211 etp27d 27 100000 rs off 4
+Ethernet212 212 etp27e 27 100000 rs off 5
+Ethernet213 213 etp27f 27 100000 rs off 6
+Ethernet214 214 etp27g 27 100000 rs off 7
+Ethernet215 215 etp27h 27 100000 rs off 8
+Ethernet224 224 etp29a 29 100000 rs off 1
+Ethernet225 225 etp29b 29 100000 rs off 2
+Ethernet226 226 etp29c 29 100000 rs off 3
+Ethernet227 227 etp29d 29 100000 rs off 4
+Ethernet228 228 etp29e 29 100000 rs off 5
+Ethernet229 229 etp29f 29 100000 rs off 6
+Ethernet230 230 etp29g 29 100000 rs off 7
+Ethernet231 231 etp29h 29 100000 rs off 8
+Ethernet240 240 etp31a 31 100000 rs off 1
+Ethernet241 241 etp31b 31 100000 rs off 2
+Ethernet242 242 etp31c 31 100000 rs off 3
+Ethernet243 243 etp31d 31 100000 rs off 4
+Ethernet244 244 etp31e 31 100000 rs off 5
+Ethernet245 245 etp31f 31 100000 rs off 6
+Ethernet246 246 etp31g 31 100000 rs off 7
+Ethernet247 247 etp31h 31 100000 rs off 8
+Ethernet256 256 etp33a 33 100000 rs off 1
+Ethernet257 257 etp33b 33 100000 rs off 2
+Ethernet258 258 etp33c 33 100000 rs off 3
+Ethernet259 259 etp33d 33 100000 rs off 4
+Ethernet260 260 etp33e 33 100000 rs off 5
+Ethernet261 261 etp33f 33 100000 rs off 6
+Ethernet262 262 etp33g 33 100000 rs off 7
+Ethernet263 263 etp33h 33 100000 rs off 8
+Ethernet272 272 etp35a 35 100000 rs off 1
+Ethernet273 273 etp35b 35 100000 rs off 2
+Ethernet274 274 etp35c 35 100000 rs off 3
+Ethernet275 275 etp35d 35 100000 rs off 4
+Ethernet276 276 etp35e 35 100000 rs off 5
+Ethernet277 277 etp35f 35 100000 rs off 6
+Ethernet278 278 etp35g 35 100000 rs off 7
+Ethernet279 279 etp35h 35 100000 rs off 8
+Ethernet288 288 etp37a 37 100000 rs off 1
+Ethernet289 289 etp37b 37 100000 rs off 2
+Ethernet290 290 etp37c 37 100000 rs off 3
+Ethernet291 291 etp37d 37 100000 rs off 4
+Ethernet292 292 etp37e 37 100000 rs off 5
+Ethernet293 293 etp37f 37 100000 rs off 6
+Ethernet294 294 etp37g 37 100000 rs off 7
+Ethernet295 295 etp37h 37 100000 rs off 8
+Ethernet304 304 etp39a 39 100000 rs off 1
+Ethernet305 305 etp39b 39 100000 rs off 2
+Ethernet306 306 etp39c 39 100000 rs off 3
+Ethernet307 307 etp39d 39 100000 rs off 4
+Ethernet308 308 etp39e 39 100000 rs off 5
+Ethernet309 309 etp39f 39 100000 rs off 6
+Ethernet310 310 etp39g 39 100000 rs off 7
+Ethernet311 311 etp39h 39 100000 rs off 8
+Ethernet320 320 etp41a 41 100000 rs off 1
+Ethernet321 321 etp41b 41 100000 rs off 2
+Ethernet322 322 etp41c 41 100000 rs off 3
+Ethernet323 323 etp41d 41 100000 rs off 4
+Ethernet324 324 etp41e 41 100000 rs off 5
+Ethernet325 325 etp41f 41 100000 rs off 6
+Ethernet326 326 etp41g 41 100000 rs off 7
+Ethernet327 327 etp41h 41 100000 rs off 8
+Ethernet336 336 etp43a 43 100000 rs off 1
+Ethernet337 337 etp43b 43 100000 rs off 2
+Ethernet338 338 etp43c 43 100000 rs off 3
+Ethernet339 339 etp43d 43 100000 rs off 4
+Ethernet340 340 etp43e 43 100000 rs off 5
+Ethernet341 341 etp43f 43 100000 rs off 6
+Ethernet342 342 etp43g 43 100000 rs off 7
+Ethernet343 343 etp43h 43 100000 rs off 8
+Ethernet352 352,353,354,355 etp45a 45 400000 rs off 1
+Ethernet356 356,357,358,359 etp45b 45 400000 rs off 2
+Ethernet368 368 etp47a 47 100000 rs off 1
+Ethernet369 369 etp47b 47 100000 rs off 2
+Ethernet370 370 etp47c 47 100000 rs off 3
+Ethernet371 371 etp47d 47 100000 rs off 4
+Ethernet372 372 etp47e 47 100000 rs off 5
+Ethernet373 373 etp47f 47 100000 rs off 6
+Ethernet374 374 etp47g 47 100000 rs off 7
+Ethernet375 375 etp47h 47 100000 rs off 8
+Ethernet384 384,385,386,387 etp49a 49 400000 rs off 1
+Ethernet388 388,389,390,391 etp49b 49 400000 rs off 2
+Ethernet400 400 etp51a 51 100000 rs off 1
+Ethernet401 401 etp51b 51 100000 rs off 2
+Ethernet402 402 etp51c 51 100000 rs off 3
+Ethernet403 403 etp51d 51 100000 rs off 4
+Ethernet404 404 etp51e 51 100000 rs off 5
+Ethernet405 405 etp51f 51 100000 rs off 6
+Ethernet406 406 etp51g 51 100000 rs off 7
+Ethernet407 407 etp51h 51 100000 rs off 8
+Ethernet416 416 etp53a 53 100000 rs off 1
+Ethernet417 417 etp53b 53 100000 rs off 2
+Ethernet418 418 etp53c 53 100000 rs off 3
+Ethernet419 419 etp53d 53 100000 rs off 4
+Ethernet420 420 etp53e 53 100000 rs off 5
+Ethernet421 421 etp53f 53 100000 rs off 6
+Ethernet422 422 etp53g 53 100000 rs off 7
+Ethernet423 423 etp53h 53 100000 rs off 8
+Ethernet432 432 etp55a 55 100000 rs off 1
+Ethernet433 433 etp55b 55 100000 rs off 2
+Ethernet434 434 etp55c 55 100000 rs off 3
+Ethernet435 435 etp55d 55 100000 rs off 4
+Ethernet436 436 etp55e 55 100000 rs off 5
+Ethernet437 437 etp55f 55 100000 rs off 6
+Ethernet438 438 etp55g 55 100000 rs off 7
+Ethernet439 439 etp55h 55 100000 rs off 8
+Ethernet448 448 etp57a 57 100000 rs off 1
+Ethernet449 449 etp57b 57 100000 rs off 2
+Ethernet450 450 etp57c 57 100000 rs off 3
+Ethernet451 451 etp57d 57 100000 rs off 4
+Ethernet452 452 etp57e 57 100000 rs off 5
+Ethernet453 453 etp57f 57 100000 rs off 6
+Ethernet454 454 etp57g 57 100000 rs off 7
+Ethernet455 455 etp57h 57 100000 rs off 8
+Ethernet464 464 etp59a 59 100000 rs off 1
+Ethernet465 465 etp59b 59 100000 rs off 2
+Ethernet466 466 etp59c 59 100000 rs off 3
+Ethernet467 467 etp59d 59 100000 rs off 4
+Ethernet468 468 etp59e 59 100000 rs off 5
+Ethernet469 469 etp59f 59 100000 rs off 6
+Ethernet470 470 etp59g 59 100000 rs off 7
+Ethernet471 471 etp59h 59 100000 rs off 8
+Ethernet480 480 etp61a 61 100000 rs off 1
+Ethernet481 481 etp61b 61 100000 rs off 2
+Ethernet482 482 etp61c 61 100000 rs off 3
+Ethernet483 483 etp61d 61 100000 rs off 4
+Ethernet484 484 etp61e 61 100000 rs off 5
+Ethernet485 485 etp61f 61 100000 rs off 6
+Ethernet486 486 etp61g 61 100000 rs off 7
+Ethernet487 487 etp61h 61 100000 rs off 8
+Ethernet496 496 etp63a 63 100000 rs off 1
+Ethernet497 497 etp63b 63 100000 rs off 2
+Ethernet498 498 etp63c 63 100000 rs off 3
+Ethernet499 499 etp63d 63 100000 rs off 4
+Ethernet500 500 etp63e 63 100000 rs off 5
+Ethernet501 501 etp63f 63 100000 rs off 6
+Ethernet502 502 etp63g 63 100000 rs off 7
+Ethernet503 503 etp63h 63 100000 rs off 8
+Ethernet512 512 etp65 65 10000 rs
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2
new file mode 120000
index 000000000000..eccf286dc879
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
new file mode 100644
index 000000000000..271c8cf70fd8
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
@@ -0,0 +1,4 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml
+SAI_INDEPENDENT_MODULE_MODE=1
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml
new file mode 100644
index 000000000000..8a97aefdc615
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml
@@ -0,0 +1,561 @@
+
+
+
+
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+ 00:02:03:04:05:00
+
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+ 0
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+ 65
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+ 8
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+ 8
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+ 8
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+ 8
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+ 3
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+ 8
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+ 8
+ 23
+ 3
+ 262144
+ 8
+
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+ 8
+ 17
+ 3
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+ 8
+
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+ 8
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+ 3
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+ 8
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+ 8
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+ 3
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+ 8
+
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+ 8
+ 19
+ 3
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+ 8
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+ 3
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+ 8
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+ 8
+ 13
+ 3
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+ 8
+
+
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+ 8
+ 15
+ 3
+ 262144
+ 8
+
+
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+ 8
+ 14
+ 3
+ 262144
+ 8
+
+
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+ 8
+ 8
+ 3
+ 262144
+ 8
+
+
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+ 8
+ 9
+ 3
+ 262144
+ 8
+
+
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+ 8
+ 11
+ 3
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+ 8
+
+
+ 221
+ 8
+ 10
+ 3
+ 262144
+ 8
+
+
+ 225
+ 8
+ 4
+ 3
+ 262144
+ 8
+
+
+ 229
+ 8
+ 5
+ 3
+ 262144
+ 8
+
+
+ 233
+ 8
+ 7
+ 3
+ 262144
+ 8
+
+
+ 237
+ 8
+ 6
+ 3
+ 262144
+ 8
+
+
+ 241
+ 8
+ 0
+ 3
+ 262144
+ 8
+
+
+ 245
+ 8
+ 1
+ 3
+ 262144
+ 8
+
+
+ 249
+ 8
+ 3
+ 3
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+ 8
+
+
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+ 8
+
+
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+ 1
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+ 64
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+
+
+
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups
new file mode 100644
index 000000000000..178f0575d049
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups
@@ -0,0 +1 @@
+QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
index 6b48c7b70adc..377d4116c10c 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
@@ -2,6 +2,316 @@
"GLOBAL_MEDIA_SETTINGS": {
"1-64": {
"OSFP-8X-sm_media_interface": {
+ "speed:100GAUI-1-L": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000005",
+ "lane1": "0x00000005",
+ "lane2": "0x00000005",
+ "lane3": "0x00000005",
+ "lane4": "0x00000005",
+ "lane5": "0x00000005",
+ "lane6": "0x00000005",
+ "lane7": "0x00000005"
+ },
+ "pre1": {
+ "lane0": "0xfffffff1",
+ "lane1": "0xfffffff1",
+ "lane2": "0xfffffff1",
+ "lane3": "0xfffffff1",
+ "lane4": "0xfffffff1",
+ "lane5": "0xfffffff1",
+ "lane6": "0xfffffff1",
+ "lane7": "0xfffffff1"
+ },
+ "main": {
+ "lane0": "0x0000002b",
+ "lane1": "0x0000002b",
+ "lane2": "0x0000002b",
+ "lane3": "0x0000002b",
+ "lane4": "0x0000002b",
+ "lane5": "0x0000002b",
+ "lane6": "0x0000002b",
+ "lane7": "0x0000002b"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "idriver": {
+ "lane0": "0x00000032",
+ "lane1": "0x00000032",
+ "lane2": "0x00000032",
+ "lane3": "0x00000032",
+ "lane4": "0x00000032",
+ "lane5": "0x00000032",
+ "lane6": "0x00000032",
+ "lane7": "0x00000032"
+ }
+ },
+ "speed:100GAUI-1-S": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000005",
+ "lane1": "0x00000005",
+ "lane2": "0x00000005",
+ "lane3": "0x00000005",
+ "lane4": "0x00000005",
+ "lane5": "0x00000005",
+ "lane6": "0x00000005",
+ "lane7": "0x00000005"
+ },
+ "pre1": {
+ "lane0": "0xfffffff1",
+ "lane1": "0xfffffff1",
+ "lane2": "0xfffffff1",
+ "lane3": "0xfffffff1",
+ "lane4": "0xfffffff1",
+ "lane5": "0xfffffff1",
+ "lane6": "0xfffffff1",
+ "lane7": "0xfffffff1"
+ },
+ "main": {
+ "lane0": "0x0000002b",
+ "lane1": "0x0000002b",
+ "lane2": "0x0000002b",
+ "lane3": "0x0000002b",
+ "lane4": "0x0000002b",
+ "lane5": "0x0000002b",
+ "lane6": "0x0000002b",
+ "lane7": "0x0000002b"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "idriver": {
+ "lane0": "0x00000032",
+ "lane1": "0x00000032",
+ "lane2": "0x00000032",
+ "lane3": "0x00000032",
+ "lane4": "0x00000032",
+ "lane5": "0x00000032",
+ "lane6": "0x00000032",
+ "lane7": "0x00000032"
+ }
+ },
+ "speed:200GAUI-2-S": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000005",
+ "lane1": "0x00000005",
+ "lane2": "0x00000005",
+ "lane3": "0x00000005",
+ "lane4": "0x00000005",
+ "lane5": "0x00000005",
+ "lane6": "0x00000005",
+ "lane7": "0x00000005"
+ },
+ "pre1": {
+ "lane0": "0xfffffff1",
+ "lane1": "0xfffffff1",
+ "lane2": "0xfffffff1",
+ "lane3": "0xfffffff1",
+ "lane4": "0xfffffff1",
+ "lane5": "0xfffffff1",
+ "lane6": "0xfffffff1",
+ "lane7": "0xfffffff1"
+ },
+ "main": {
+ "lane0": "0x0000002b",
+ "lane1": "0x0000002b",
+ "lane2": "0x0000002b",
+ "lane3": "0x0000002b",
+ "lane4": "0x0000002b",
+ "lane5": "0x0000002b",
+ "lane6": "0x0000002b",
+ "lane7": "0x0000002b"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "idriver": {
+ "lane0": "0x00000032",
+ "lane1": "0x00000032",
+ "lane2": "0x00000032",
+ "lane3": "0x00000032",
+ "lane4": "0x00000032",
+ "lane5": "0x00000032",
+ "lane6": "0x00000032",
+ "lane7": "0x00000032"
+ }
+ },
+ "speed:200GAUI-2-L": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000005",
+ "lane1": "0x00000005",
+ "lane2": "0x00000005",
+ "lane3": "0x00000005",
+ "lane4": "0x00000005",
+ "lane5": "0x00000005",
+ "lane6": "0x00000005",
+ "lane7": "0x00000005"
+ },
+ "pre1": {
+ "lane0": "0xfffffff1",
+ "lane1": "0xfffffff1",
+ "lane2": "0xfffffff1",
+ "lane3": "0xfffffff1",
+ "lane4": "0xfffffff1",
+ "lane5": "0xfffffff1",
+ "lane6": "0xfffffff1",
+ "lane7": "0xfffffff1"
+ },
+ "main": {
+ "lane0": "0x0000002b",
+ "lane1": "0x0000002b",
+ "lane2": "0x0000002b",
+ "lane3": "0x0000002b",
+ "lane4": "0x0000002b",
+ "lane5": "0x0000002b",
+ "lane6": "0x0000002b",
+ "lane7": "0x0000002b"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "idriver": {
+ "lane0": "0x00000032",
+ "lane1": "0x00000032",
+ "lane2": "0x00000032",
+ "lane3": "0x00000032",
+ "lane4": "0x00000032",
+ "lane5": "0x00000032",
+ "lane6": "0x00000032",
+ "lane7": "0x00000032"
+ }
+ },
+ "speed:200GAUI-4": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "main": {
+ "lane0": "0x0000003f",
+ "lane1": "0x0000003f",
+ "lane2": "0x0000003f",
+ "lane3": "0x0000003f",
+ "lane4": "0x0000003f",
+ "lane5": "0x0000003f",
+ "lane6": "0x0000003f",
+ "lane7": "0x0000003f"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "idriver": {
+ "lane0": "0x0000003f",
+ "lane1": "0x0000003f",
+ "lane2": "0x0000003f",
+ "lane3": "0x0000003f",
+ "lane4": "0x0000003f",
+ "lane5": "0x0000003f",
+ "lane6": "0x0000003f",
+ "lane7": "0x0000003f"
+ }
+ },
"speed:400GAUI-4-L": {
"pre3": {
"lane0": "0x00000000",
@@ -190,7 +500,7 @@
}
},
"OSFP-8X-nm_850_media_interface": {
- "speed:800G": {
+ "speed:800G": {
"pre3": {
"lane0": "0x00000000",
"lane1": "0x00000000",
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups
new file mode 100644
index 000000000000..178f0575d049
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups
@@ -0,0 +1 @@
+QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml
new file mode 100644
index 000000000000..0c0e1241b16c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml
@@ -0,0 +1,91 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## SPDX-License-Identifier: Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+- bus: '00'
+ dev: '00'
+ fn: '0'
+ id: '1237'
+ name: 'Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02)'
+- bus: '00'
+ dev: '01'
+ fn: '0'
+ id: '7000'
+ name: 'ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II]'
+- bus: '00'
+ dev: '01'
+ fn: '1'
+ id: '7010'
+ name: 'IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II]'
+- bus: '00'
+ dev: '01'
+ fn: '2'
+ id: '7020'
+ name: 'USB controller: Intel Corporation 82371SB PIIX3 USB [Natoma/Triton II] (rev
+ 01)'
+- bus: '00'
+ dev: '01'
+ fn: '3'
+ id: '7113'
+ name: 'Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03)'
+- bus: '00'
+ dev: '02'
+ fn: '0'
+ id: 00b8
+ name: 'VGA compatible controller: Cirrus Logic GD 5446'
+- bus: '00'
+ dev: '03'
+ fn: '0'
+ id: 100e
+ name: 'Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller
+ (rev 03)'
+- bus: '00'
+ dev: '04'
+ fn: '0'
+ id: '1002'
+ name: 'Unclassified device [00ff]: Red Hat, Inc. Virtio memory balloon'
+- bus: '00'
+ dev: '05'
+ fn: '0'
+ id: '1009'
+ name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem'
+- bus: '00'
+ dev: '06'
+ fn: '0'
+ id: '2922'
+ name: 'SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA
+ Controller [AHCI mode] (rev 02)'
+- bus: '00'
+ dev: '07'
+ fn: '0'
+ id: '0001'
+ name: 'PCI bridge: Red Hat, Inc. QEMU PCI-PCI bridge'
+- bus: '00'
+ dev: 0c
+ fn: '0'
+ id: '1009'
+ name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem'
+- bus: '00'
+ dev: 0e
+ fn: '0'
+ id: '1001'
+ name: 'System peripheral: NVIDIA Corporation GK110B [GeForce GTX TITAN Z] (rev 01)'
+- bus: '01'
+ dev: '10'
+ fn: '0'
+ id: cf82
+ name: 'Ethernet controller: Mellanox Technologies Spectrum-4L'
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
index d866c6a23ec2..755c7e03b629 100644
--- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
@@ -1,6 +1,6 @@
{
"chassis": {
- "name": "SN5600_SIMX",
+ "name": "SN5640_SIMX",
"components": [
{
"name": "ONIE"
@@ -634,6 +634,22 @@
"name": "xSFP module 64 Temp"
}
]
+ },
+ {
+ "name": "sfp65",
+ "thermals": [
+ {
+ "name": "xSFP module 65 Temp"
+ }
+ ]
+ },
+ {
+ "name": "sfp66",
+ "thermals": [
+ {
+ "name": "xSFP module 66 Temp"
+ }
+ ]
}
]
},
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf
new file mode 100644
index 000000000000..6ef2195aac57
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf
@@ -0,0 +1,494 @@
+##################################################################################
+# Copyright (c) 2019 - 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+#
+# Platform specific sensors config for SN5600
+##################################################################################
+
+# Temperature sensors
+chip "mlxsw-i2c-*-48"
+ label temp1 "Ambient ASIC Temp"
+
+chip "tmp102-i2c-6-49"
+ label temp1 "Ambient Fan Side Temp (air intake)"
+chip "adt75-i2c-6-49"
+ label temp1 "Ambient Fan Side Temp (air intake)"
+chip "stts751-i2c-6-49"
+ label temp1 "Ambient Fan Side Temp (air intake)"
+chip "tmp102-i2c-7-4a"
+ label temp1 "Ambient Port Side Temp (air exhaust)"
+chip "adt75-i2c-7-4a"
+ label temp1 "Ambient Port Side Temp (air exhaust)"
+chip "stts751-i2c-7-4a"
+ label temp1 "Ambient Port Side Temp (air exhaust)"
+chip "tmp411-i2c-7-4c"
+ label temp1 "Ambient External Temp"
+
+# Power controllers
+chip "mp2891-i2c-*-62"
+ label in1 "PMIC-1 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-1 VDD_M ADJ Rail (out1)"
+ ignore in3
+ label temp1 "PMIC-1 VDD_M ADJ Temp 1"
+ ignore temp2
+ label power1 "PMIC-1 13V5 VDD_M (in)"
+ label power2 "PMIC-1 VDD_M Rail Pwr (out1)"
+ ignore power3
+ label curr1 "PMIC-1 13V5 VDD_M Rail Curr (in1)"
+ label curr2 "PMIC-1 VDD_M Rail Curr (out1)"
+ ignore curr3
+ ignore curr4
+ ignore curr5
+ ignore curr6
+ ignore curr7
+ ignore curr8
+ ignore curr9
+ ignore curr10
+chip "xdpe1a2g7-i2c-*-62"
+ label in1 "PMIC-1 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-1 VDD_M ADJ Rail (out1)"
+ ignore in3
+ label temp1 "PMIC-1 VDD_M ADJ Temp 1"
+ ignore temp2
+ label power1 "PMIC-1 13V5 VDD_M (in)"
+ label power2 "PMIC-1 VDD_M Rail Pwr (out1)"
+ ignore power3
+ label curr1 "PMIC-1 13V5 VDD_M Rail Curr (in1)"
+ label curr2 "PMIC-1 VDD_M Rail Curr (out1)"
+ ignore curr3
+ ignore curr4
+ ignore curr5
+ ignore curr6
+ ignore curr7
+ ignore curr8
+ ignore curr9
+ ignore curr10
+
+chip "mp2891-i2c-*-63"
+ label in1 "PMIC-2 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-2 VDD_T0 ADJ Rail (out1)"
+ label in3 "PMIC-2 VDD_T1 ADJ Rail (out2)"
+ label temp1 "PMIC-2 VDD_T0 ADJ Temp 1"
+ label temp2 "PMIC-2 VDD_T1 ADJ Temp 2"
+ label power1 "PMIC-2 13V5 VDD_T0 VDD_T1 (in)"
+ label power2 "PMIC-2 VDD_T0 Rail Pwr (out1)"
+ label power3 "PMIC-2 VDD_T1 Rail Pwr (out2)"
+ label curr1 "PMIC-2 13V5 VDD_T0 VDD_T1 Rail Curr (in1)"
+ label curr2 "PMIC-2 VDD_T0 Rail Curr (out1)"
+ label curr3 "PMIC-2 VDD_T1 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-63"
+ label in1 "PMIC-2 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-2 VDD_T0 ADJ Rail (out1)"
+ label in3 "PMIC-2 VDD_T1 ADJ Rail (out2)"
+ label temp1 "PMIC-2 VDD_T0 ADJ Temp 1"
+ label temp2 "PMIC-2 VDD_T1 ADJ Temp 2"
+ label power1 "PMIC-2 13V5 VDD_T0 VDD_T1 (in)"
+ label power2 "PMIC-2 VDD_T0 Rail Pwr (out1)"
+ label power3 "PMIC-2 VDD_T1 Rail Pwr (out2)"
+ label curr1 "PMIC-2 13V5 VDD_T0 VDD_T1 Rail Curr (in1)"
+ label curr2 "PMIC-2 VDD_T0 Rail Curr (out1)"
+ label curr3 "PMIC-2 VDD_T1 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-64"
+ label in1 "PMIC-3 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-3 VDD_T2 ADJ Rail (out1)"
+ label in3 "PMIC-3 VDD_T3 ADJ Rail (out2)"
+ label temp1 "PMIC-3 VDD_T2 ADJ Temp 1"
+ label temp2 "PMIC-3 VDD_T3 ADJ Temp 2"
+ label power1 "PMIC-3 13V5 VDD_T2 VDD_T3 (in)"
+ label power2 "PMIC-3 VDD_T2 Rail Pwr (out1)"
+ label power3 "PMIC-3 VDD_T3 Rail Pwr (out2)"
+ label curr1 "PMIC-3 13V5 VDD_T2 VDD_T3 Rail Curr (in1)"
+ label curr2 "PMIC-3 VDD_T2 Rail Curr (out1)"
+ label curr3 "PMIC-3 VDD_T3 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-64"
+ label in1 "PMIC-3 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-3 VDD_T2 ADJ Rail (out1)"
+ label in3 "PMIC-3 VDD_T3 ADJ Rail (out2)"
+ label temp1 "PMIC-3 VDD_T2 ADJ Temp 1"
+ label temp2 "PMIC-3 VDD_T3 ADJ Temp 2"
+ label power1 "PMIC-3 13V5 VDD_T2 VDD_T3 (in)"
+ label power2 "PMIC-3 VDD_T2 Rail Pwr (out1)"
+ label power3 "PMIC-3 VDD_T3 Rail Pwr (out2)"
+ label curr1 "PMIC-3 13V5 VDD_T2 VDD_T3 Rail Curr (in1)"
+ label curr2 "PMIC-3 VDD_T2 Rail Curr (out1)"
+ label curr3 "PMIC-3 VDD_T3 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-65"
+ label in1 "PMIC-4 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-4 VDD_T4 ADJ Rail (out1)"
+ label in3 "PMIC-4 VDD_T5 ADJ Rail (out2)"
+ label temp1 "PMIC-4 VDD_T4 ADJ Temp 1"
+ label temp2 "PMIC-4 VDD_T5 ADJ Temp 2"
+ label power1 "PMIC-4 13V5 VDD_T4 VDD_T5 (in)"
+ label power2 "PMIC-4 VDD_T4 Rail Pwr (out1)"
+ label power3 "PMIC-4 VDD_T5 Rail Pwr (out2)"
+ label curr1 "PMIC-4 13V5 VDD_T4 VDD_T5 Rail Curr (in1)"
+ label curr2 "PMIC-4 VDD_T4 Rail Curr (out1)"
+ label curr3 "PMIC-4 VDD_T5 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-65"
+ label in1 "PMIC-4 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-4 VDD_T4 ADJ Rail (out1)"
+ label in3 "PMIC-4 VDD_T5 ADJ Rail (out2)"
+ label temp1 "PMIC-4 VDD_T4 ADJ Temp 1"
+ label temp2 "PMIC-4 VDD_T5 ADJ Temp 2"
+ label power1 "PMIC-4 13V5 VDD_T4 VDD_T5 (in)"
+ label power2 "PMIC-4 VDD_T4 Rail Pwr (out1)"
+ label power3 "PMIC-4 VDD_T5 Rail Pwr (out2)"
+ label curr1 "PMIC-4 13V5 VDD_T4 VDD_T5 Rail Curr (in1)"
+ label curr2 "PMIC-4 VDD_T4 Rail Curr (out1)"
+ label curr3 "PMIC-4 VDD_T5 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-66"
+ label in1 "PMIC-5 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-5 VDD_T6 ADJ Rail (out1)"
+ label in3 "PMIC-5 VDD_T7 ADJ Rail (out2)"
+ label temp1 "PMIC-5 VDD_T6 ADJ Temp 1"
+ label temp2 "PMIC-5 VDD_T7 ADJ Temp 2"
+ label power1 "PMIC-5 13V5 VDD_T6 VDD_T7 (in)"
+ label power2 "PMIC-5 VDD_T6 Rail Pwr (out1)"
+ label power3 "PMIC-5 VDD_T7 Rail Pwr (out2)"
+ label curr1 "PMIC-5 13V5 VDD_T6 VDD_T7 Rail Curr (in1)"
+ label curr2 "PMIC-5 VDD_T6 Rail Curr (out1)"
+ label curr3 "PMIC-5 VDD_T7 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-66"
+ label in1 "PMIC-5 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-5 VDD_T6 ADJ Rail (out1)"
+ label in3 "PMIC-5 VDD_T7 ADJ Rail (out2)"
+ label temp1 "PMIC-5 VDD_T6 ADJ Temp 1"
+ label temp2 "PMIC-5 VDD_T7 ADJ Temp 2"
+ label power1 "PMIC-5 13V5 VDD_T6 VDD_T7 (in)"
+ label power2 "PMIC-5 VDD_T6 Rail Pwr (out1)"
+ label power3 "PMIC-5 VDD_T7 Rail Pwr (out2)"
+ label curr1 "PMIC-5 13V5 VDD_T6 VDD_T7 Rail Curr (in1)"
+ label curr2 "PMIC-5 VDD_T6 Rail Curr (out1)"
+ label curr3 "PMIC-5 VDD_T7 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-67"
+ label in1 "PMIC-6 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-6 DVDD_T0 ADJ Rail (out1)"
+ label in3 "PMIC-6 DVDD_T1 ADJ Rail (out2)"
+ label temp1 "PMIC-6 DVDD_T0 ADJ Temp 1"
+ label temp2 "PMIC-6 DVDD_T1 ADJ Temp 2"
+ label power1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 (in)"
+ label power2 "PMIC-6 DVDD_T0 Rail Pwr (out1)"
+ label power3 "PMIC-6 DVDD_T1 Rail Pwr (out2)"
+ label curr1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 Rail Curr (in1)"
+ label curr2 "PMIC-6 DVDD_T0 Rail Curr (out1)"
+ label curr3 "PMIC-6 DVDD_T1 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-67"
+ label in1 "PMIC-6 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-6 DVDD_T0 ADJ Rail (out1)"
+ label in3 "PMIC-6 DVDD_T1 ADJ Rail (out2)"
+ label temp1 "PMIC-6 DVDD_T0 ADJ Temp 1"
+ label temp2 "PMIC-6 DVDD_T1 ADJ Temp 2"
+ label power1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 (in)"
+ label power2 "PMIC-6 DVDD_T0 Rail Pwr (out1)"
+ label power3 "PMIC-6 DVDD_T1 Rail Pwr (out2)"
+ label curr1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 Rail Curr (in1)"
+ label curr2 "PMIC-6 DVDD_T0 Rail Curr (out1)"
+ label curr3 "PMIC-6 DVDD_T1 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-68"
+ label in1 "PMIC-7 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-7 DVDD_T2 ADJ Rail (out1)"
+ label in3 "PMIC-7 DVDD_T3 ADJ Rail (out2)"
+ label temp1 "PMIC-7 DVDD_T2 ADJ Temp 1"
+ label temp2 "PMIC-7 DVDD_T3 ADJ Temp 2"
+ label power1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 (in)"
+ label power2 "PMIC-7 DVDD_T2 Rail Pwr (out1)"
+ label power3 "PMIC-7 DVDD_T3 Rail Pwr (out2)"
+ label curr1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 Rail Curr (in1)"
+ label curr2 "PMIC-7 DVDD_T2 Rail Curr (out1)"
+ label curr3 "PMIC-7 DVDD_T3 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-68"
+ label in1 "PMIC-7 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-7 DVDD_T2 ADJ Rail (out1)"
+ label in3 "PMIC-7 DVDD_T3 ADJ Rail (out2)"
+ label temp1 "PMIC-7 DVDD_T2 ADJ Temp 1"
+ label temp2 "PMIC-7 DVDD_T3 ADJ Temp 2"
+ label power1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 (in)"
+ label power2 "PMIC-7 DVDD_T2 Rail Pwr (out1)"
+ label power3 "PMIC-7 DVDD_T3 Rail Pwr (out2)"
+ label curr1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 Rail Curr (in1)"
+ label curr2 "PMIC-7 DVDD_T2 Rail Curr (out1)"
+ label curr3 "PMIC-7 DVDD_T3 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-69"
+ label in1 "PMIC-8 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-8 DVDD_T4 ADJ Rail (out1)"
+ label in3 "PMIC-8 DVDD_T5 ADJ Rail (out2)"
+ label temp1 "PMIC-8 DVDD_T4 ADJ Temp 1"
+ label temp2 "PMIC-8 DVDD_T5 ADJ Temp 2"
+ label power1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 (in)"
+ label power2 "PMIC-8 DVDD_T4 Rail Pwr (out1)"
+ label power3 "PMIC-8 DVDD_T5 Rail Pwr (out2)"
+ label curr1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 Rail Curr (in1)"
+ label curr2 "PMIC-8 DVDD_T4 Rail Curr (out1)"
+ label curr3 "PMIC-8 DVDD_T5 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-69"
+ label in1 "PMIC-8 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-8 DVDD_T4 ADJ Rail (out1)"
+ label in3 "PMIC-8 DVDD_T5 ADJ Rail (out2)"
+ label temp1 "PMIC-8 DVDD_T4 ADJ Temp 1"
+ label temp2 "PMIC-8 DVDD_T5 ADJ Temp 2"
+ label power1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 (in)"
+ label power2 "PMIC-8 DVDD_T4 Rail Pwr (out1)"
+ label power3 "PMIC-8 DVDD_T5 Rail Pwr (out2)"
+ label curr1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 Rail Curr (in1)"
+ label curr2 "PMIC-8 DVDD_T4 Rail Curr (out1)"
+ label curr3 "PMIC-8 DVDD_T5 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-6a"
+ label in1 "PMIC-9 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-9 DVDD_T6 ADJ Rail (out1)"
+ label in3 "PMIC-9 DVDD_T7 ADJ Rail (out2)"
+ label temp1 "PMIC-9 DVDD_T6 ADJ Temp 1"
+ label temp2 "PMIC-9 DVDD_T7 ADJ Temp 2"
+ label power1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 (in)"
+ label power2 "PMIC-9 DVDD_T6 Rail Pwr (out1)"
+ label power3 "PMIC-9 DVDD_T7 Rail Pwr (out2)"
+ label curr1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 Rail Curr (in1)"
+ label curr2 "PMIC-9 DVDD_T6 Rail Curr (out1)"
+ label curr3 "PMIC-9 DVDD_T7 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-6a"
+ label in1 "PMIC-9 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-9 DVDD_T6 ADJ Rail (out1)"
+ label in3 "PMIC-9 DVDD_T7 ADJ Rail (out2)"
+ label temp1 "PMIC-9 DVDD_T6 ADJ Temp 1"
+ label temp2 "PMIC-9 DVDD_T7 ADJ Temp 2"
+ label power1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 (in)"
+ label power2 "PMIC-9 DVDD_T6 Rail Pwr (out1)"
+ label power3 "PMIC-9 DVDD_T7 Rail Pwr (out2)"
+ label curr1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 Rail Curr (in1)"
+ label curr2 "PMIC-9 DVDD_T6 Rail Curr (out1)"
+ label curr3 "PMIC-9 DVDD_T7 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+chip "mp2891-i2c-*-6c"
+ label in1 "PMIC-10 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-10 HVDD_T03 1V2 Rail (out1)"
+ label in3 "PMIC-10 HVDD_T47 1V2 Rail (out2)"
+ label temp1 "PMIC-10 HVDD_T03 1V2 Temp 1"
+ label temp2 "PMIC-10 HVDD_T47 1V2 Temp 2"
+ label power1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 (in)"
+ label power2 "PMIC-10 HVDD_T03 Rail Pwr (out1)"
+ label power3 "PMIC-10 HVDD_T47 Rail Pwr (out2)"
+ label curr1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 Rail Curr (in1)"
+ label curr2 "PMIC-10 HVDD_T03 Rail Curr (out1)"
+ label curr3 "PMIC-10 HVDD_T47 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+ ignore curr7
+ ignore curr8
+ ignore curr9
+ ignore curr10
+ ignore curr11
+chip "xdpe1a2g7-i2c-*-6c"
+ label in1 "PMIC-10 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-10 HVDD_T03 1V2 Rail (out1)"
+ label in3 "PMIC-10 HVDD_T47 1V2 Rail (out2)"
+ label temp1 "PMIC-10 HVDD_T03 1V2 Temp 1"
+ label temp2 "PMIC-10 HVDD_T47 1V2 Temp 2"
+ label power1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 (in)"
+ label power2 "PMIC-10 HVDD_T03 Rail Pwr (out1)"
+ label power3 "PMIC-10 HVDD_T47 Rail Pwr (out2)"
+ label curr1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 Rail Curr (in1)"
+ label curr2 "PMIC-10 HVDD_T03 Rail Curr (out1)"
+ label curr3 "PMIC-10 HVDD_T47 Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+ ignore curr7
+ ignore curr8
+ ignore curr9
+ ignore curr10
+ ignore curr11
+
+chip "mp2891-i2c-*-6e"
+ label in1 "PMIC-11 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-11 VDDSCC 0V75 Rail (out1)"
+ label in3 "PMIC-11 DVDD_M ADJ Rail (out2)"
+ label temp1 "PMIC-11 VDDSCC 1V2 Temp 1"
+ label temp2 "PMIC-11 DVDD_M 0V75 Temp 2"
+ label power1 "PMIC-11 13V5 VDDSCC DVDD_M (in)"
+ label power2 "PMIC-11 VDDSCC Rail Pwr (out1)"
+ label power3 "PMIC-11 DVDD_M Rail Pwr (out2)"
+ label curr1 "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
+ label curr2 "PMIC-11 VDDSCC Rail Curr (out1)"
+ label curr3 "PMIC-11 DVDD_M Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+chip "xdpe1a2g7-i2c-*-6e"
+ label in1 "PMIC-11 PSU 13V5 Rail (in1)"
+ label in2 "PMIC-11 VDDSCC 0V75 Rail (out1)"
+ label in3 "PMIC-11 DVDD_M ADJ Rail (out2)"
+ label temp1 "PMIC-11 VDDSCC 1V2 Temp 1"
+ label temp2 "PMIC-11 DVDD_M 0V75 Temp 2"
+ label power1 "PMIC-11 13V5 VDDSCC DVDD_M (in)"
+ label power2 "PMIC-11 VDDSCC Rail Pwr (out1)"
+ label power3 "PMIC-11 DVDD_M Rail Pwr (out2)"
+ label curr1 "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
+ label curr2 "PMIC-11 VDDSCC Rail Curr (out1)"
+ label curr3 "PMIC-11 DVDD_M Rail Curr (out2)"
+ ignore curr4
+ ignore curr5
+ ignore curr6
+
+# Power supplies
+chip "dps460-i2c-*-59"
+ label in1 "PSU-1(L) 220V Rail (in)"
+ ignore in2
+ label in3 "PSU-1(L) 54V Rail (out)"
+ ignore fan2
+ ignore fan3
+ label fan1 "PSU-1(L) Fan 1"
+ label temp1 "PSU-1(L) Temp 1"
+ label temp2 "PSU-1(L) Temp 2"
+ label temp3 "PSU-1(L) Temp 3"
+ label power1 "PSU-1(L) 220V Rail Pwr (in)"
+ label power2 "PSU-1(L) 54V Rail Pwr (out)"
+ label curr1 "PSU-1(L) 220V Rail Curr (in)"
+ label curr2 "PSU-1(L) 54V Rail Curr (out)"
+ set power2_cap 0
+chip "dps460-i2c-*-58"
+ label in1 "PSU-2(R) 220V Rail (in)"
+ ignore in2
+ label in3 "PSU-2(R) 54V Rail (out)"
+ ignore fan2
+ ignore fan3
+ label fan1 "PSU-2(R) Fan 1"
+ label temp1 "PSU-2(R) Temp 1"
+ label temp2 "PSU-2(R) Temp 2"
+ label temp3 "PSU-2(R) Temp 3"
+ label power1 "PSU-2(R) 220V Rail Pwr (in)"
+ label power2 "PSU-2(R) 54V Rail Pwr (out)"
+ label curr1 "PSU-2(R) 220V Rail Curr (in)"
+ label curr2 "PSU-2(R) 54V Rail Curr (out)"
+ set power2_cap 0
+chip "dps460-i2c-*-5b"
+ label in1 "PSU-3(R) 220V Rail (in)"
+ ignore in2
+ label in3 "PSU-3(R) 54V Rail (out)"
+ ignore fan2
+ ignore fan3
+ label fan1 "PSU-3(R) Fan 1"
+ label temp1 "PSU-3(R) Temp 1"
+ label temp2 "PSU-3(R) Temp 2"
+ label temp3 "PSU-3(R) Temp 3"
+ label power1 "PSU-3(R) 220V Rail Pwr (in)"
+ label power2 "PSU-3(R) 54V Rail Pwr (out)"
+ label curr1 "PSU-3(R) 220V Rail Curr (in)"
+ label curr2 "PSU-3(R) 54V Rail Curr (out)"
+ set power2_cap 0
+chip "dps460-i2c-*-5a"
+ label in1 "PSU-4(R) 220V Rail (in)"
+ ignore in2
+ label in3 "PSU-4(R) 54V Rail (out)"
+ ignore fan2
+ ignore fan3
+ label fan1 "PSU-4(R) Fan 1"
+ label temp1 "PSU-4(R) Temp 1"
+ label temp2 "PSU-4(R) Temp 2"
+ label temp3 "PSU-4(R) Temp 3"
+ label power1 "PSU-4(R) 220V Rail Pwr (in)"
+ label power2 "PSU-4(R) 54V Rail Pwr (out)"
+ label curr1 "PSU-4(R) 220V Rail Curr (in)"
+ label curr2 "PSU-4(R) 54V Rail Curr (out)"
+ set power2_cap 0
+
+# AMD Comex
+bus "i2c-68" "i2c-9-mux (chan_id 6)"
+ chip "mp2855-i2c-*-69"
+ label in1 "PMIC-12 COMEX (in) VDDCR INPUT VOLT"
+ label in2 "PMIC-12 COMEX (out) VDDCR_CPU VOLT"
+ label in3 "PMIC-12 COMEX (out2) VDDCR_SOC VOLT"
+ label temp1 "PMIC-12 COMEX VDDCR_CPU PHASE TEMP"
+ label temp2 "PMIC-12 COMEX VDDCR_SOC PHASE TEMP"
+ label curr1 "PMIC-12 COMEX VDDCR_CPU CURR"
+ label curr2 "PMIC-12 COMEX VDDCR_SOC CURR"
+
+bus "i2c-69" "i2c-9-mux (chan_id 6)"
+ chip "mp2975-i2c-*-6a"
+ label in1 "PMIC-13 COMEX VDD_MEM INPUT VOLT"
+ label in2 "PMIC-13 COMEX VDD_MEM OUTPUT VOLT"
+ label temp1 "PMIC-13 COMEX VDD_MEM PHASE TEMP"
+ label curr1 "PMIC-13 COMEX VDD_MEM INPUT CURR"
+ label curr2 "PMIC-13 COMEX VDD_MEM OUTPUT CURR"
+ ignore curr3
+ ignore curr4
+ label power1 "PMIC-13 COMEX VDD_MEM INPUT POWER"
+ label power2 "PMIC-13 COMEX VDD_MEM OUTPUT POWER"
+
+#bus "i2c-0" "Synopsys DesignWare I2C adapter"
+chip "jc42-i2c-*-1a"
+ label temp1 "SODIMM1 Temp"
+
+chip "jc42-i2c-*-1b"
+ label temp1 "SODIMM2 Temp"
+
+chip "jc42-i2c-*-1e"
+ label temp1 "SODIMM3 Temp"
+
+chip "jc42-i2c-*-1f"
+ label temp1 "SODIMM4 Temp"
+
+chip "k10temp-pci-*"
+ label temp1 "CPU PACKAGE TEMP"
+ label temp2 "CPU DIE0 TEMP"
+
+chip "nvme-pci-*"
+ label temp1 "SSD Temp"
+ ignore temp2
+ ignore temp3
+
+chip "00000500400-mdio-5"
+ label temp1 "PHY TEMP"
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
new file mode 100644
index 000000000000..5401dfda99fd
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
@@ -0,0 +1,106 @@
+{
+ "interfaces": {
+ "Ethernet1": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet9": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet17": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet25": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet33": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet41": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet49": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet57": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet65": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet73": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet81": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet89": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet97": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet105": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet113": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet121": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet129": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet137": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet145": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet153": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet161": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet169": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet177": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet185": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet193": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet201": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet209": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet217": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet225": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet233": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet241": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet249": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet257": {
+ "default_brkout_mode": "1x10G"
+ },
+ "Ethernet258": {
+ "default_brkout_mode": "1x10G"
+ }
+ }
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini
new file mode 100644
index 000000000000..8d631e7cb034
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini
@@ -0,0 +1,35 @@
+# name lanes alias index speed
+Ethernet1 1,2,3,4,5,6,7,8 fourHundredGigE0/1 0 400000
+Ethernet9 9,10,11,12,13,14,15,16 fourHundredGigE0/2 1 400000
+Ethernet17 17,18,19,20,21,22,23,24 fourHundredGigE0/3 2 400000
+Ethernet25 25,26,27,28,29,30,31,32 fourHundredGigE0/4 3 400000
+Ethernet33 33,34,35,36,37,38,39,40 fourHundredGigE0/5 4 400000
+Ethernet41 41,42,43,44,45,46,47,48 fourHundredGigE0/6 5 400000
+Ethernet49 49,50,51,52,53,54,55,56 fourHundredGigE0/7 6 400000
+Ethernet57 57,58,59,60,61,62,63,64 fourHundredGigE0/8 7 400000
+Ethernet65 65,66,67,68,69,70,71,72 fourHundredGigE0/9 8 400000
+Ethernet73 73,74,75,76,77,78,79,80 fourHundredGigE0/10 9 400000
+Ethernet81 81,82,83,84,85,86,87,88 fourHundredGigE0/11 10 400000
+Ethernet89 89,90,91,92,93,94,95,96 fourHundredGigE0/12 11 400000
+Ethernet97 97,98,99,100,101,102,103,104 fourHundredGigE0/13 12 400000
+Ethernet105 105,106,107,108,109,110,111,112 fourHundredGigE0/14 13 400000
+Ethernet113 113,114,115,116,117,118,119,120 fourHundredGigE0/15 14 400000
+Ethernet121 121,122,123,124,125,126,127,128 fourHundredGigE0/16 15 400000
+Ethernet129 129,130,131,132,133,134,135,136 fourHundredGigE0/17 16 400000
+Ethernet137 137,138,139,140,141,142,143,144 fourHundredGigE0/18 17 400000
+Ethernet145 145,146,147,148,149,150,151,152 fourHundredGigE0/19 18 400000
+Ethernet153 153,154,155,156,157,158,159,160 fourHundredGigE0/20 19 400000
+Ethernet161 161,162,163,164,165,166,167,168 fourHundredGigE0/21 20 400000
+Ethernet169 169,170,171,172,173,174,175,176 fourHundredGigE0/22 21 400000
+Ethernet177 177,178,179,180,181,182,183,184 fourHundredGigE0/23 22 400000
+Ethernet185 185,186,187,188,189,190,191,192 fourHundredGigE0/24 23 400000
+Ethernet193 193,194,195,196,197,198,199,200 fourHundredGigE0/25 24 400000
+Ethernet201 201,202,203,204,205,206,207,208 fourHundredGigE0/26 25 400000
+Ethernet209 209,210,211,212,213,214,215,216 fourHundredGigE0/27 26 400000
+Ethernet217 217,218,219,220,221,222,223,224 fourHundredGigE0/28 27 400000
+Ethernet225 225,226,227,228,229,230,231,232 fourHundredGigE0/29 28 400000
+Ethernet233 233,234,235,236,237,238,239,240 fourHundredGigE0/30 29 400000
+Ethernet241 241,242,243,244,245,246,247,248 fourHundredGigE0/31 30 400000
+Ethernet249 249,250,251,252,253,254,255,256 fourHundredGigE0/32 31 400000
+Ethernet257 258 tenGigE0/33 32 10000
+Ethernet258 257 tenGigE0/34 33 10000
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile
new file mode 100644
index 000000000000..3f83ed12fa57
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-m2-w6920-32qc2x-32x400G.config.bcm
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm
new file mode 100644
index 000000000000..2fa4334222ca
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm
@@ -0,0 +1,350 @@
+#rate_ext_mdio_divisor=100
+scache_filename=/var/warmboot/wbscache
+stable_size=0x55000000
+stable_location=3
+warmboot_knet_shutdown_mode=1
+sai_postinit_cmd_file=/usr/share/sonic/platform/postinit_cmd_file.soc
+
+pcie_file=/usr/share/sonic/platform/pcie.cint
+capi_level=1
+#port_fec=3
+cfg_int_phy_ctrl.0=1
+mmu_port_num_mc_queue=2
+bcm_tunnel_term_compatible_mode=1
+pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe
+#serdes_tx_taps_ce=pam4:0:140:0:0:0:0
+ccm_dma_enable=0
+ccmdma_intr_enable=0
+ctr_evict_enable=0
+mem_cache_enable=0
+parity_correction=1
+parity_enable=1
+memlist_enable=1
+reglist_enable=1
+fpem_mem_entries=65536
+pll_bypass=1
+init_all_modules=0
+l3_mem_entries=16384
+l3_alpm_enable=2
+ipv6_lpm_128b_enable=0x1
+l3_max_ecmp_mode=1
+svi_my_station_optimization=1
+
+#mgmt
+portmap_38=257:10
+portmap_118=258:10
+
+portmap_1=1:400
+portmap_5=9:400
+portmap_9=17:400
+portmap_13=25:400
+
+portmap_20=33:400
+portmap_24=41:400
+portmap_28=49:400
+portmap_32=57:400
+
+portmap_40=65:400
+portmap_44=73:400
+portmap_48=81:400
+portmap_52=89:400
+
+portmap_60=97:400
+portmap_64=105:400
+portmap_68=113:400
+portmap_72=121:400
+
+portmap_80=129:400
+portmap_84=137:400
+portmap_88=145:400
+portmap_92=153:400
+
+portmap_100=161:400
+portmap_104=169:400
+portmap_108=177:400
+portmap_112=185:400
+
+portmap_120=193:400
+portmap_124=201:400
+portmap_128=209:400
+portmap_132=217:400
+
+portmap_140=225:400
+portmap_144=233:400
+portmap_148=241:400
+portmap_152=249:400
+
+phy_chain_rx_lane_map_physical{1.0}=0x67214530
+phy_chain_tx_lane_map_physical{1.0}=0x53762140
+phy_chain_rx_lane_map_physical{9.0}=0x43712650
+phy_chain_tx_lane_map_physical{9.0}=0x56327014
+phy_chain_rx_lane_map_physical{17.0}=0x40357216
+phy_chain_tx_lane_map_physical{17.0}=0x65320147
+phy_chain_rx_lane_map_physical{25.0}=0x50264137
+phy_chain_tx_lane_map_physical{25.0}=0x62107435
+phy_chain_rx_lane_map_physical{33.0}=0x26470153
+phy_chain_tx_lane_map_physical{33.0}=0x45216730
+phy_chain_rx_lane_map_physical{41.0}=0x21743056
+phy_chain_tx_lane_map_physical{41.0}=0x75036124
+phy_chain_rx_lane_map_physical{49.0}=0x25431760
+phy_chain_tx_lane_map_physical{49.0}=0x56320471
+phy_chain_rx_lane_map_physical{57.0}=0x71460235
+phy_chain_tx_lane_map_physical{57.0}=0x72314650
+phy_chain_rx_lane_map_physical{65.0}=0x64317520
+phy_chain_tx_lane_map_physical{65.0}=0x67304512
+phy_chain_rx_lane_map_physical{73.0}=0x15407236
+phy_chain_tx_lane_map_physical{73.0}=0x16245730
+phy_chain_rx_lane_map_physical{81.0}=0x04735261
+phy_chain_tx_lane_map_physical{81.0}=0x27365401
+phy_chain_rx_lane_map_physical{89.0}=0x61450372
+phy_chain_tx_lane_map_physical{89.0}=0x27514630
+phy_chain_rx_lane_map_physical{97.0}=0x05741362
+phy_chain_tx_lane_map_physical{97.0}=0x13624705
+phy_chain_rx_lane_map_physical{105.0}=0x10426735
+phy_chain_tx_lane_map_physical{105.0}=0x70124635
+phy_chain_rx_lane_map_physical{113.0}=0x34072651
+phy_chain_tx_lane_map_physical{113.0}=0x05712463
+phy_chain_rx_lane_map_physical{121.0}=0x34026517
+phy_chain_tx_lane_map_physical{121.0}=0x14052367
+phy_chain_rx_lane_map_physical{129.0}=0x76413205
+phy_chain_tx_lane_map_physical{129.0}=0x41720365
+phy_chain_rx_lane_map_physical{137.0}=0x72530146
+phy_chain_tx_lane_map_physical{137.0}=0x15437026
+phy_chain_rx_lane_map_physical{145.0}=0x02567413
+phy_chain_tx_lane_map_physical{145.0}=0x45217630
+phy_chain_rx_lane_map_physical{153.0}=0x14265370
+phy_chain_tx_lane_map_physical{153.0}=0x75106432
+phy_chain_rx_lane_map_physical{161.0}=0x53017462
+phy_chain_tx_lane_map_physical{161.0}=0x56104732
+phy_chain_rx_lane_map_physical{169.0}=0x50761243
+phy_chain_tx_lane_map_physical{169.0}=0x65237014
+phy_chain_rx_lane_map_physical{177.0}=0x37612450
+phy_chain_tx_lane_map_physical{177.0}=0x07124563
+phy_chain_rx_lane_map_physical{185.0}=0x31476205
+phy_chain_tx_lane_map_physical{185.0}=0x54236710
+phy_chain_rx_lane_map_physical{193.0}=0x52104763
+phy_chain_tx_lane_map_physical{193.0}=0x06137524
+phy_chain_rx_lane_map_physical{201.0}=0x01543762
+phy_chain_tx_lane_map_physical{201.0}=0x76512043
+phy_chain_rx_lane_map_physical{209.0}=0x10526743
+phy_chain_tx_lane_map_physical{209.0}=0x57204613
+phy_chain_rx_lane_map_physical{217.0}=0x30465172
+phy_chain_tx_lane_map_physical{217.0}=0x07315624
+phy_chain_rx_lane_map_physical{225.0}=0x05176324
+phy_chain_tx_lane_map_physical{225.0}=0x46213507
+phy_chain_rx_lane_map_physical{233.0}=0x23506147
+phy_chain_tx_lane_map_physical{233.0}=0x54376102
+phy_chain_rx_lane_map_physical{241.0}=0x34750612
+phy_chain_tx_lane_map_physical{241.0}=0x56214730
+phy_chain_rx_lane_map_physical{249.0}=0x74125603
+phy_chain_tx_lane_map_physical{249.0}=0x21053467
+
+
+serdes_core_rx_polarity_flip_physical{1}=0x6F
+serdes_core_tx_polarity_flip_physical{1}=0xCD
+serdes_core_rx_polarity_flip_physical{9}=0x36
+serdes_core_tx_polarity_flip_physical{9}=0x7C
+serdes_core_rx_polarity_flip_physical{17}=0x2D
+serdes_core_tx_polarity_flip_physical{17}=0xEB
+serdes_core_rx_polarity_flip_physical{25}=0x0B
+serdes_core_tx_polarity_flip_physical{25}=0xEE
+serdes_core_rx_polarity_flip_physical{33}=0xEB
+serdes_core_tx_polarity_flip_physical{33}=0x7C
+serdes_core_rx_polarity_flip_physical{41}=0x1B
+serdes_core_tx_polarity_flip_physical{41}=0x57
+serdes_core_rx_polarity_flip_physical{49}=0xA4
+serdes_core_tx_polarity_flip_physical{49}=0x0
+serdes_core_rx_polarity_flip_physical{57}=0x74
+serdes_core_tx_polarity_flip_physical{57}=0x54
+serdes_core_rx_polarity_flip_physical{65}=0x3C
+serdes_core_tx_polarity_flip_physical{65}=0xF4
+serdes_core_rx_polarity_flip_physical{73}=0xC7
+serdes_core_tx_polarity_flip_physical{73}=0x40
+serdes_core_rx_polarity_flip_physical{81}=0xD9
+serdes_core_tx_polarity_flip_physical{81}=0x51
+serdes_core_rx_polarity_flip_physical{89}=0xB6
+serdes_core_tx_polarity_flip_physical{89}=0x9C
+serdes_core_rx_polarity_flip_physical{97}=0x80
+serdes_core_tx_polarity_flip_physical{97}=0x84
+serdes_core_rx_polarity_flip_physical{105}=0xE8
+serdes_core_tx_polarity_flip_physical{105}=0x22
+serdes_core_rx_polarity_flip_physical{113}=0xCF
+serdes_core_tx_polarity_flip_physical{113}=0xF7
+serdes_core_rx_polarity_flip_physical{121}=0x73
+serdes_core_tx_polarity_flip_physical{121}=0x7B
+serdes_core_rx_polarity_flip_physical{129}=0x03
+serdes_core_tx_polarity_flip_physical{129}=0x45
+serdes_core_rx_polarity_flip_physical{137}=0x73
+serdes_core_tx_polarity_flip_physical{137}=0x3D
+serdes_core_rx_polarity_flip_physical{145}=0xBD
+serdes_core_tx_polarity_flip_physical{145}=0x72
+serdes_core_rx_polarity_flip_physical{153}=0xD2
+serdes_core_tx_polarity_flip_physical{153}=0xAE
+serdes_core_rx_polarity_flip_physical{161}=0x58
+serdes_core_tx_polarity_flip_physical{161}=0x0C
+serdes_core_rx_polarity_flip_physical{169}=0x75
+serdes_core_tx_polarity_flip_physical{169}=0x13
+serdes_core_rx_polarity_flip_physical{177}=0xAA
+serdes_core_tx_polarity_flip_physical{177}=0x4F
+serdes_core_rx_polarity_flip_physical{185}=0xA8
+serdes_core_tx_polarity_flip_physical{185}=0x96
+serdes_core_rx_polarity_flip_physical{193}=0x87
+serdes_core_tx_polarity_flip_physical{193}=0x17
+serdes_core_rx_polarity_flip_physical{201}=0x18
+serdes_core_tx_polarity_flip_physical{201}=0x13
+serdes_core_rx_polarity_flip_physical{209}=0x11
+serdes_core_tx_polarity_flip_physical{209}=0xB3
+serdes_core_rx_polarity_flip_physical{217}=0xF2
+serdes_core_tx_polarity_flip_physical{217}=0xB7
+serdes_core_rx_polarity_flip_physical{225}=0x78
+serdes_core_tx_polarity_flip_physical{225}=0xB6
+serdes_core_rx_polarity_flip_physical{233}=0x38
+serdes_core_tx_polarity_flip_physical{233}=0x6E
+serdes_core_rx_polarity_flip_physical{241}=0x60
+serdes_core_tx_polarity_flip_physical{241}=0x3C
+serdes_core_rx_polarity_flip_physical{249}=0x1A
+serdes_core_tx_polarity_flip_physical{249}=0xB1
+
+dport_map_port_1=1
+dport_map_port_2=2
+dport_map_port_3=3
+dport_map_port_4=4
+dport_map_port_5=5
+dport_map_port_6=6
+dport_map_port_7=7
+dport_map_port_8=8
+dport_map_port_9=9
+dport_map_port_10=10
+dport_map_port_11=11
+dport_map_port_12=12
+dport_map_port_13=13
+dport_map_port_14=14
+dport_map_port_15=15
+dport_map_port_16=16
+dport_map_port_20=17
+dport_map_port_21=18
+dport_map_port_22=19
+dport_map_port_23=20
+dport_map_port_24=21
+dport_map_port_25=22
+dport_map_port_26=23
+dport_map_port_27=24
+dport_map_port_28=25
+dport_map_port_29=26
+dport_map_port_30=27
+dport_map_port_31=28
+dport_map_port_32=29
+dport_map_port_33=30
+dport_map_port_34=31
+dport_map_port_35=32
+dport_map_port_40=33
+dport_map_port_41=34
+dport_map_port_42=35
+dport_map_port_43=36
+dport_map_port_44=37
+dport_map_port_45=38
+dport_map_port_46=39
+dport_map_port_47=40
+dport_map_port_48=41
+dport_map_port_49=42
+dport_map_port_50=43
+dport_map_port_51=44
+dport_map_port_52=45
+dport_map_port_53=46
+dport_map_port_54=47
+dport_map_port_55=48
+dport_map_port_60=49
+dport_map_port_61=50
+dport_map_port_62=51
+dport_map_port_63=52
+dport_map_port_64=53
+dport_map_port_65=54
+dport_map_port_66=55
+dport_map_port_67=56
+dport_map_port_68=57
+dport_map_port_69=58
+dport_map_port_70=59
+dport_map_port_71=60
+dport_map_port_72=61
+dport_map_port_73=62
+dport_map_port_74=63
+dport_map_port_75=64
+dport_map_port_80=65
+dport_map_port_81=66
+dport_map_port_82=67
+dport_map_port_83=68
+dport_map_port_84=69
+dport_map_port_85=70
+dport_map_port_86=71
+dport_map_port_87=72
+dport_map_port_88=73
+dport_map_port_89=74
+dport_map_port_90=75
+dport_map_port_91=76
+dport_map_port_92=77
+dport_map_port_93=78
+dport_map_port_94=79
+dport_map_port_95=80
+dport_map_port_100=81
+dport_map_port_101=82
+dport_map_port_102=83
+dport_map_port_103=84
+dport_map_port_104=85
+dport_map_port_105=86
+dport_map_port_106=87
+dport_map_port_107=88
+dport_map_port_108=89
+dport_map_port_109=90
+dport_map_port_110=91
+dport_map_port_111=92
+dport_map_port_112=93
+dport_map_port_113=94
+dport_map_port_114=95
+dport_map_port_115=96
+dport_map_port_120=97
+dport_map_port_121=98
+dport_map_port_122=99
+dport_map_port_123=100
+dport_map_port_124=101
+dport_map_port_125=102
+dport_map_port_126=103
+dport_map_port_127=104
+dport_map_port_128=105
+dport_map_port_129=106
+dport_map_port_130=107
+dport_map_port_131=108
+dport_map_port_132=109
+dport_map_port_133=110
+dport_map_port_134=111
+dport_map_port_135=112
+dport_map_port_140=113
+dport_map_port_141=114
+dport_map_port_142=115
+dport_map_port_143=116
+dport_map_port_144=117
+dport_map_port_145=118
+dport_map_port_146=119
+dport_map_port_147=120
+dport_map_port_148=121
+dport_map_port_149=122
+dport_map_port_150=123
+dport_map_port_151=124
+dport_map_port_152=125
+dport_map_port_153=126
+dport_map_port_154=127
+dport_map_port_155=128
+
+dport_map_port_118=129
+dport_map_port_38=130
+
+#firmware load, use fast load
+#load_firmware=0x2
+
+core_clock_frequency=1325
+dpr_clock_frequency=1000
+device_clock_frequency=1325
+port_flex_enable=1
+
+#RDMA
+sai_pfc_defaults_disable=1
+sai_optimized_mmu=1
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint
new file mode 100644
index 000000000000..e286d3cf42a6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint
@@ -0,0 +1,85 @@
+cint_reset();
+
+int cint_field_group_create(int unit, bcm_field_group_t grp)
+{
+ int rv;
+
+ bcm_field_qset_t qset;
+ bcm_field_aset_t aset;
+
+ BCM_FIELD_QSET_INIT(qset);
+ BCM_FIELD_QSET_ADD(qset,bcmFieldQualifyDstMac);
+ BCM_FIELD_QSET_ADD(qset, bcmFieldQualifyStageIngress);
+
+ BCM_FIELD_ASET_INIT(aset);
+ BCM_FIELD_ASET_ADD(aset, bcmFieldActionCopyToCpu);
+
+ rv = bcm_field_group_create_mode_id(unit, qset, 103, bcmFieldGroupModeAuto, grp);
+ if (rv != BCM_E_NONE) {
+ printf("bcm_field_group_create_mode_id failed, rv = %d\r\n", rv);
+ return -1;
+ }
+ printf("cint_field_group_create success!!!, rv = %d\r\n", rv);
+
+ bcm_field_group_dump(unit,grp);
+ return 0;
+}
+
+int cint_field_entry_create1(int unit, bcm_field_group_t grp,bcm_field_entry_t entry)
+{
+ int rv;
+ bcm_mac_t dst_mac = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+ bcm_mac_t mac_mask = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+ rv = bcm_field_entry_create_id(unit, grp, entry);
+ if (rv != BCM_E_NONE) {
+ printf("bcm_field_entry_create_id failed, rv = %d\r\n", rv);
+ return -1;
+ }
+
+
+ rv =bcm_field_qualify_DstMac(unit, entry, dst_mac, mac_mask);
+ if (rv != BCM_E_NONE) {
+ printf("bcm_field_qualify_DstMac failed,ret = %d\r\n", rv);
+ bcm_field_entry_destroy(unit, entry);
+ return -1;
+ }
+
+ rv = bcm_field_action_add(unit, entry, bcmFieldActionCopyToCpu, 1, 0);
+ if (rv != BCM_E_NONE) {
+ printf("bcm_field_action_add failed, rv = %d \r\n", rv);
+ bcm_field_entry_destroy(unit, entry);
+ return -1;
+ }
+
+ rv = bcm_field_action_add(unit, entry, bcmFieldActionDrop, 1, 0);
+ if (rv != BCM_E_NONE) {
+ printf("bcm_field_action_add failed, rv = %d \r\n", rv);
+ bcm_field_entry_destroy(unit, entry);
+ return -1;
+ }
+
+ rv = bcm_field_entry_install(unit, entry);
+ if (rv != BCM_E_NONE) {
+ printf("bcm_field_entry_install failed,ret = %d\r\n", rv);
+ bcm_field_entry_destroy(unit, entry);
+ return -1;
+ }
+
+ printf("********************* BEGIN ****************************\r\n");
+ bcm_field_entry_dump(unit, entry);
+ printf("*********************** END ****************************\r\n");
+
+ return 0;
+}
+
+cint_field_group_create(0,5);
+cint_field_entry_create1(0,5,2048);
+
+//bcm_field_entry_destroy(0, 2048);
+//bcm_field_group_destroy(0, 5);
+
+
+
+
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint
new file mode 100644
index 000000000000..33c8b64b83d2
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint
@@ -0,0 +1,2 @@
+bcm_field_entry_destroy(0, 2048);
+bcm_field_group_destroy(0, 5);
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py
new file mode 100644
index 000000000000..940c722ce467
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py
@@ -0,0 +1,135 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-
+import sys
+import os
+
+
+class CustFruException(Exception):
+ def __init__(self, message='custfrueerror', code=-100):
+ err = 'errcode: {0} message:{1}'.format(code, message)
+ Exception.__init__(self, err)
+ self.code = code
+ self.message = message
+
+
+class CustFru():
+ MAGIC_HEAD_INFO = 0x7a
+
+ _CUST_MAGIC_OFFSET = 0
+ _CUST_MAGIC_LEN = 1
+ _CUST_VERSION_OFFSET = 1
+ _CUST_VERSION_LEN = 6
+ _CUST_CRC_OFFSET = 7
+ _CUST_CRC_LEN = 1
+ _CUST_PRODUCT_NAME_OFFSET = 10
+ _CUST_PRODUCT_NAME_LEN = 17
+ _CUST_MANUFACTURER_OFFSET = 27
+ _CUST_MANUFACTURER_LEN = 7
+ _CUST_SERIAL_NUMBER_OFFSET = 34
+ _CUST_SERIAL_NUMBER_LEN = 25
+ _CUST_INPUT_TYPE_OFFSET = 78
+ _CUST_INPUT_TYPE_LEN = 2
+ _CUST_INPUT_OFFSET = 86
+ _CUST_INPUT_LEN = 15
+ _CUST_OUTPUT_OFFSET = 108
+ _CUST_OUTPUT_LEN = 11
+ _CUST_POWER_OFFSET = 200
+ _CUST_POWER_LEN = 10
+ _CUST_MANUFACTURER_DATE_OFFSET = 210
+ _CUST_MANUFACTURER_DATE_LEN = 3
+
+ def __init__(self):
+ self.magic = ""
+ self.version = ""
+ self.crc = ""
+ self.product_name = ""
+ self.manufacturer = ""
+ self.serial_number = ""
+ self.input_type = ""
+ self.input = ""
+ self.output = ""
+ self.power = ""
+ self.manufacturer_date = ""
+
+ def checksum(self, v):
+ result = 0
+ for item in v:
+ result += ord(item)
+ return (result & 0xff)
+
+ def decode(self, e2):
+ # header
+ e2_index = 0
+ head = ord(e2[0])
+ if head != self.MAGIC_HEAD_INFO:
+ raise CustFruException("Customization fru eeprom head info error, head:0x%x" % head, -10)
+ self.magic = "0x%02x" % self.MAGIC_HEAD_INFO
+
+ # version
+ version = "%s" % (e2[self._CUST_VERSION_OFFSET:self._CUST_VERSION_OFFSET + self._CUST_VERSION_LEN])
+ self.version = version.replace("\xff", "").strip()
+
+ # crc
+ crc_calc = self.checksum(e2[0:self._CUST_CRC_OFFSET])
+ if crc_calc != ord(e2[self._CUST_CRC_OFFSET]):
+ raise CustFruException("Customization fru eeprom crc check error, calc: 0x%x, read: 0x%x" % (crc_calc, ord(e2[self._CUST_CRC_OFFSET])), -10)
+ self.crc = crc_calc
+
+ # Product Name
+ product_name = "%s" % (e2[self._CUST_PRODUCT_NAME_OFFSET:self._CUST_PRODUCT_NAME_OFFSET + self._CUST_PRODUCT_NAME_LEN])
+ self.product_name = product_name.replace("\xff", "").strip()
+
+ # manufacturer
+ manufacturer = "%s" % (e2[self._CUST_MANUFACTURER_OFFSET:self._CUST_MANUFACTURER_OFFSET + self._CUST_MANUFACTURER_LEN])
+ self.manufacturer = manufacturer.strip()
+
+ # serial_number
+ serial_number = "%s" % (e2[self._CUST_SERIAL_NUMBER_OFFSET:self._CUST_SERIAL_NUMBER_OFFSET + self._CUST_SERIAL_NUMBER_LEN])
+ self.serial_number = serial_number.strip()
+
+ # input_type
+ input_type = "%s" % (e2[self._CUST_INPUT_TYPE_OFFSET:self._CUST_INPUT_TYPE_OFFSET + self._CUST_INPUT_TYPE_LEN])
+ self.input_type = input_type.strip()
+
+ # input
+ input = "%s" % (e2[self._CUST_INPUT_OFFSET:self._CUST_INPUT_OFFSET + self._CUST_INPUT_LEN])
+ self.input = input.strip()
+
+ # output
+ output = "%s" % (e2[self._CUST_OUTPUT_OFFSET:self._CUST_OUTPUT_OFFSET + self._CUST_OUTPUT_LEN])
+ self.output = output.strip()
+
+ # power
+ power = "%s" % (e2[self._CUST_POWER_OFFSET:self._CUST_POWER_OFFSET + self._CUST_POWER_LEN])
+ self.power = power.replace("\xff", "").strip()
+
+ # manufacturer_date
+ manufacturer_year = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET]) + 2000
+ manufacturer_month = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 1])
+ manufacturer_day = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 2])
+ self.manufacturer_date = "%04d-%02d-%02d" % (manufacturer_year, manufacturer_month, manufacturer_day)
+
+ return
+
+
+ def __str__(self):
+ formatstr = "Version : %s \n" \
+ "Product Name : %s \n" \
+ "Manufacturer : %s \n" \
+ "Serial Number : %s \n" \
+ "AC/DC Power Module : %s \n" \
+ "INPUT : %s \n" \
+ "OUTPUT : %s \n" \
+ "POWER : %s \n" \
+ "Manufacturer Date : %s \n"
+ str_tmp = formatstr % (self.version,
+ self.product_name,
+ self.manufacturer,
+ self.serial_number,
+ self.input_type,
+ self.input,
+ self.output,
+ self.power,
+ self.manufacturer_date)
+ return str_tmp.replace("\x00","")
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin
new file mode 100644
index 000000000000..ef5163140274
Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku
new file mode 100644
index 000000000000..b756112ae670
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku
@@ -0,0 +1 @@
+M2-W6920-32QC2X l2
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml
new file mode 100644
index 000000000000..665fb3342357
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml
@@ -0,0 +1,459 @@
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diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml
new file mode 100644
index 000000000000..2a4708da7a92
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml
@@ -0,0 +1,459 @@
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diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+ def __init__(self, message='fruerror', code=-100):
+ err = 'errcode: {0} message:{1}'.format(code, message)
+ Exception.__init__(self, err)
+ self.code = code
+ self.message = message
+
+
+def e_print(err):
+ print("ERROR: " + err)
+
+
+def d_print(debug_info):
+ if __DEBUG__ == "Y":
+ print(debug_info)
+
+
+class FruUtil():
+ @staticmethod
+ def decodeLength(value):
+ a = bitarray(8)
+ a.setall(True)
+ a[0:1] = 0
+ a[1:2] = 0
+ x = ord(a.tobytes())
+ return x & ord(value)
+
+ @staticmethod
+ def minToData():
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ endtime = datetime.now()
+ seconds = (endtime - starttime).total_seconds()
+ mins = seconds // 60
+ m = int(round(mins))
+ return m
+
+ @staticmethod
+ def getTimeFormat():
+ return datetime.now().strftime('%Y-%m-%d')
+
+ @staticmethod
+ def getTypeLength(value):
+ if value is None or len(value) == 0:
+ return 0
+ a = bitarray(8)
+ a.setall(False)
+ a[0:1] = 1
+ a[1:2] = 1
+ x = ord(a.tobytes())
+ return x | len(value)
+
+ @staticmethod
+ def checksum(b):
+ result = 0
+ for item in b:
+ result += ord(item)
+ return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+ SUGGESTED_SIZE_COMMON_HEADER = 8
+ SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+ SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+ SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+ SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+ INITVALUE = b'\x00'
+ resultvalue = INITVALUE * 256
+ COMMON_HEAD_VERSION = b'\x01'
+ __childList = None
+
+ def __init__(self, name="", size=0, offset=0):
+ self.__childList = []
+ self._offset = offset
+ self.name = name
+ self._size = size
+ self._isPresent = False
+ self._data = b'\x00' * size
+
+ @property
+ def childList(self):
+ return self.__childList
+
+ @childList.setter
+ def childList(self, value):
+ self.__childList = value
+
+ @property
+ def offset(self):
+ return self._offset
+
+ @offset.setter
+ def offset(self, value):
+ self._offset = value
+
+ @property
+ def size(self):
+ return self._size
+
+ @size.setter
+ def size(self, value):
+ self._size = value
+
+ @property
+ def data(self):
+ return self._data
+
+ @data.setter
+ def data(self, value):
+ self._data = value
+
+ @property
+ def isPresent(self):
+ return self._isPresent
+
+ @isPresent.setter
+ def isPresent(self, value):
+ self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+ pass
+
+
+class ChassisInfoArea(BaseArea):
+ pass
+
+
+class BoardInfoArea(BaseArea):
+ _boardTime = None
+ _fields = None
+ _mfg_date = None
+ areaversion = None
+ _boardversion = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "mfg_date : %s \n" \
+ "boardManufacturer : %s \n" \
+ "boardProductName : %s \n" \
+ "boardSerialNumber : %s \n" \
+ "boardPartNumber : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.boardversion), self.size,
+ self.language, self.getMfgRealData(),
+ self.boardManufacturer, self.boardProductName,
+ self.boardSerialNumber, self.boardPartNumber,
+ self.fruFileId)
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "boardextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["boardversion"] = ord(self.boardversion)
+ dic["boardlength"] = self.size
+ dic["boardlanguage"] = self.language
+ dic["boardmfg_date"] = self.getMfgRealData()
+ dic["boardManufacturer"] = self.boardManufacturer
+ dic["boardProductName"] = self.boardProductName
+ dic["boardSerialNumber"] = self.boardSerialNumber
+ dic["boardPartNumber"] = self.boardPartNumber
+ dic["boardfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index]
+ index += 1
+ d_print("decode length :%d class size:%d" %
+ ((ord(self.data[index]) * 8), self.size))
+ index += 2
+
+ timetmp = self.data[index: index + 3]
+ self.mfg_date = ord(timetmp[0]) | (
+ ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+ d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+ index += 3
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardProductName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardProductName:%s" % self.boardProductName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardPartNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if self.data[index] != chr(0xc1):
+ templen = FruUtil.decodeLength(self.data[index])
+ tmpval = self.data[index + 1: index + templen + 1]
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ else:
+ break
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("boardInfoArea version:%x" % ord(self.boardversion))
+ d_print("boardInfoArea length:%d" % self.size)
+ d_print("boardInfoArea language:%x" % self.language)
+ self.mfg_date = FruUtil.minToData()
+ d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+ self.data = chr(ord(self.boardversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ self.data += chr(self.mfg_date & 0xFF)
+ self.data += chr((self.mfg_date >> 8) & 0xFF)
+ self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+ d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+ typelength = FruUtil.getTypeLength(self.boardManufacturer)
+ self.data += chr(typelength)
+ self.data += self.boardManufacturer
+
+ d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+ self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+ self.data += self.boardProductName
+
+ d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+ self.data += self.boardSerialNumber
+
+ d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+ self.data += self.boardPartNumber
+
+ d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ d_print("self data:%d" % len(self.data))
+ d_print("self size:%d" % self.size)
+ d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+ # checksum
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+ def getMfgRealData(self):
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ mactime = starttime + timedelta(minutes=self.mfg_date)
+ return mactime
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def mfg_date(self):
+ return self._mfg_date
+
+ @mfg_date.setter
+ def mfg_date(self, val):
+ self._mfg_date = val
+
+ @property
+ def boardversion(self):
+ self._boardversion = self.COMMON_HEAD_VERSION
+ return self._boardversion
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, val):
+ self._FRUFileID = val
+
+ @property
+ def boardPartNumber(self):
+ return self._boardPartNumber
+
+ @boardPartNumber.setter
+ def boardPartNumber(self, val):
+ self._boardPartNumber = val
+
+ @property
+ def boardSerialNumber(self):
+ return self._boardSerialNumber
+
+ @boardSerialNumber.setter
+ def boardSerialNumber(self, val):
+ self._boardSerialNumber = val
+
+ @property
+ def boardProductName(self):
+ return self._boradProductName
+
+ @boardProductName.setter
+ def boardProductName(self, val):
+ self._boradProductName = val
+
+ @property
+ def boardManufacturer(self):
+ return self._boardManufacturer
+
+ @boardManufacturer.setter
+ def boardManufacturer(self, val):
+ self._boardManufacturer = val
+
+ @property
+ def boardTime(self):
+ return self._boardTime
+
+ @boardTime.setter
+ def boardTime(self, val):
+ self._boardTime = val
+
+ @property
+ def fields(self):
+ return self._fields
+
+ @fields.setter
+ def fields(self, val):
+ self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+ _productManufacturer = None
+ _productAssetTag = None
+ _FRUFileID = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "productManufacturer : %s \n" \
+ "productName : %s \n" \
+ "productPartModelName: %s \n" \
+ "productVersion : %s \n" \
+ "productSerialNumber : %s \n" \
+ "productAssetTag : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.areaversion), self.size,
+ self.language, self.productManufacturer,
+ self.productName, self.productPartModelName,
+ self.productVersion, self.productSerialNumber,
+ self.productAssetTag, self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "productextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["productversion"] = ord(self.areaversion)
+ dic["productlength"] = self.size
+ dic["productlanguage"] = self.language
+ dic["productManufacturer"] = self.productManufacturer
+ dic["productName"] = self.productName
+ dic["productPartModelName"] = self.productPartModelName
+ dic["productVersion"] = int(self.productVersion, 16)
+ dic["productSerialNumber"] = self.productSerialNumber
+ dic["productAssetTag"] = self.productAssetTag
+ dic["productfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index] # 0
+ index += 1
+ d_print("decode length %d" % (ord(self.data[index]) * 8))
+ d_print("class size %d" % self.size)
+ index += 2
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productName:%s" % self.productName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productPartModelName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productVersion = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productVersion:%s" % self.productVersion)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productAssetTag = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if self.data[index] != chr(0xc1) and index < self.size - 1:
+ templen = FruUtil.decodeLength(self.data[index])
+ if templen == 0:
+ break
+ tmpval = self.data[index + 1: index + templen + 1]
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ else:
+ break
+
+ @property
+ def productVersion(self):
+ return self._productVersion
+
+ @productVersion.setter
+ def productVersion(self, name):
+ self._productVersion = name
+
+ @property
+ def areaversion(self):
+ self._areaversion = self.COMMON_HEAD_VERSION
+ return self._areaversion
+
+ @areaversion.setter
+ def areaversion(self, name):
+ self._areaversion = name
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def productManufacturer(self):
+ return self._productManufacturer
+
+ @productManufacturer.setter
+ def productManufacturer(self, name):
+ self._productManufacturer = name
+
+ @property
+ def productName(self):
+ return self._productName
+
+ @productName.setter
+ def productName(self, name):
+ self._productName = name
+
+ @property
+ def productPartModelName(self):
+ return self._productPartModelName
+
+ @productPartModelName.setter
+ def productPartModelName(self, name):
+ self._productPartModelName = name
+
+ @property
+ def productSerialNumber(self):
+ return self._productSerialNumber
+
+ @productSerialNumber.setter
+ def productSerialNumber(self, name):
+ self._productSerialNumber = name
+
+ @property
+ def productAssetTag(self):
+ return self._productAssetTag
+
+ @productAssetTag.setter
+ def productAssetTag(self, name):
+ self._productAssetTag = name
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, name):
+ self._FRUFileID = name
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("product version:%x" % ord(self.areaversion))
+ d_print("product length:%d" % self.size)
+ d_print("product language:%x" % self.language)
+ self.data = chr(ord(self.areaversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ typelength = FruUtil.getTypeLength(self.productManufacturer)
+ self.data += chr(typelength)
+ self.data += self.productManufacturer
+
+ self.data += chr(FruUtil.getTypeLength(self.productName))
+ self.data += self.productName
+
+ self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+ self.data += self.productPartModelName
+
+ self.data += chr(FruUtil.getTypeLength(self.productVersion))
+ self.data += self.productVersion
+
+ self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+ self.data += self.productSerialNumber
+
+ self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+ if self.productAssetTag is not None:
+ self.data += self.productAssetTag
+
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+ d_print("self.data:%d" % len(self.data))
+ d_print("self.size:%d" % self.size)
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+ pass
+
+
+class Field(object):
+
+ def __init__(self, fieldType="ASCII", fieldData=""):
+ self.fieldData = fieldData
+ self.fieldType = fieldType
+
+ @property
+ def fieldType(self):
+ return self.fieldType
+
+ @property
+ def fieldData(self):
+ return self.fieldData
+
+
+class ipmifru(BaseArea):
+ _BoardInfoArea = None
+ _ProductInfoArea = None
+ _InternalUseArea = None
+ _ChassisInfoArea = None
+ _multiRecordArea = None
+ _productinfoAreaOffset = BaseArea.INITVALUE
+ _boardInfoAreaOffset = BaseArea.INITVALUE
+ _internalUserAreaOffset = BaseArea.INITVALUE
+ _chassicInfoAreaOffset = BaseArea.INITVALUE
+ _multiRecordAreaOffset = BaseArea.INITVALUE
+ _bindata = None
+ _bodybin = None
+ _version = BaseArea.COMMON_HEAD_VERSION
+ _zeroCheckSum = None
+ _frusize = 256
+
+ def __str__(self):
+ tmpstr = ""
+ if self.boardInfoArea.isPresent:
+ tmpstr += "\nboardinfoarea: \n"
+ tmpstr += self.boardInfoArea.__str__()
+ if self.productInfoArea.isPresent:
+ tmpstr += "\nproductinfoarea: \n"
+ tmpstr += self.productInfoArea.__str__()
+ return tmpstr
+
+ def decodeBin(self, eeprom):
+ commonHead = eeprom[0:8]
+ d_print("decode version %x" % ord(commonHead[0]))
+ if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+ raise FruException("HEAD VERSION error,not Fru format!", -10)
+ if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+ strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+ raise FruException(strtemp, -3)
+ if ord(commonHead[1]) != ord(self.INITVALUE):
+ d_print("Internal Use Area is present")
+ self.internalUseArea = InternalUseArea(
+ name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+ self.internalUseArea.isPresent = True
+ self.internalUserAreaOffset = ord(commonHead[1])
+ self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+ self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+ if ord(commonHead[2]) != ord(self.INITVALUE):
+ d_print("Chassis Info Area is present")
+ self.chassisInfoArea = ChassisInfoArea(
+ name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+ self.chassisInfoArea.isPresent = True
+ self.chassicInfoAreaOffset = ord(commonHead[2])
+ self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+ self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+ if ord(commonHead[3]) != ord(self.INITVALUE):
+ self.boardInfoArea = BoardInfoArea(
+ name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+ self.boardInfoArea.isPresent = True
+ self.boardInfoAreaOffset = ord(commonHead[3])
+ self.boardInfoArea.size = ord(
+ eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+ d_print("Board Info Area is present size:%d" %
+ (self.boardInfoArea.size))
+ self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+ self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+ if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+ strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \
+ (FruUtil.checksum(
+ self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.boardInfoArea.decodedata()
+ if ord(commonHead[4]) != ord(self.INITVALUE):
+ d_print("Product Info Area is present")
+ self.productInfoArea = ProductInfoArea(
+ name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+ self.productInfoArea.isPresent = True
+ self.productinfoAreaOffset = ord(commonHead[4])
+ d_print("length offset value: %02x" %
+ ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+ self.productInfoArea.size = ord(
+ eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+ d_print("Product Info Area is present size:%d" %
+ (self.productInfoArea.size))
+
+ self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+ self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+ if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+ strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.productInfoArea.decodedata()
+ if ord(commonHead[5]) != ord(self.INITVALUE):
+ self.multiRecordArea = MultiRecordArea(
+ name="MultiRecord record Area ")
+ d_print("MultiRecord record present")
+ self.multiRecordArea.isPresent = True
+ self.multiRecordAreaOffset = ord(commonHead[5])
+ self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+ self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+ def initDefault(self):
+ self.version = self.COMMON_HEAD_VERSION
+ self.internalUserAreaOffset = self.INITVALUE
+ self.chassicInfoAreaOffset = self.INITVALUE
+ self.boardInfoAreaOffset = self.INITVALUE
+ self.productinfoAreaOffset = self.INITVALUE
+ self.multiRecordAreaOffset = self.INITVALUE
+ self.zeroCheckSum = self.INITVALUE
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ self.productInfoArea = None
+ self.internalUseArea = None
+ self.boardInfoArea = None
+ self.chassisInfoArea = None
+ self.multiRecordArea = None
+ # self.recalcute()
+
+ @property
+ def version(self):
+ return self._version
+
+ @version.setter
+ def version(self, name):
+ self._version = name
+
+ @property
+ def internalUserAreaOffset(self):
+ return self._internalUserAreaOffset
+
+ @internalUserAreaOffset.setter
+ def internalUserAreaOffset(self, obj):
+ self._internalUserAreaOffset = obj
+
+ @property
+ def chassicInfoAreaOffset(self):
+ return self._chassicInfoAreaOffset
+
+ @chassicInfoAreaOffset.setter
+ def chassicInfoAreaOffset(self, obj):
+ self._chassicInfoAreaOffset = obj
+
+ @property
+ def productinfoAreaOffset(self):
+ return self._productinfoAreaOffset
+
+ @productinfoAreaOffset.setter
+ def productinfoAreaOffset(self, obj):
+ self._productinfoAreaOffset = obj
+
+ @property
+ def boardInfoAreaOffset(self):
+ return self._boardInfoAreaOffset
+
+ @boardInfoAreaOffset.setter
+ def boardInfoAreaOffset(self, obj):
+ self._boardInfoAreaOffset = obj
+
+ @property
+ def multiRecordAreaOffset(self):
+ return self._multiRecordAreaOffset
+
+ @multiRecordAreaOffset.setter
+ def multiRecordAreaOffset(self, obj):
+ self._multiRecordAreaOffset = obj
+
+ @property
+ def zeroCheckSum(self):
+ return self._zeroCheckSum
+
+ @zeroCheckSum.setter
+ def zeroCheckSum(self, obj):
+ self._zeroCheckSum = obj
+
+ @property
+ def productInfoArea(self):
+ return self._ProductInfoArea
+
+ @productInfoArea.setter
+ def productInfoArea(self, obj):
+ self._ProductInfoArea = obj
+
+ @property
+ def internalUseArea(self):
+ return self._InternalUseArea
+
+ @internalUseArea.setter
+ def internalUseArea(self, obj):
+ self.internalUseArea = obj
+
+ @property
+ def boardInfoArea(self):
+ return self._BoardInfoArea
+
+ @boardInfoArea.setter
+ def boardInfoArea(self, obj):
+ self._BoardInfoArea = obj
+
+ @property
+ def chassisInfoArea(self):
+ return self._ChassisInfoArea
+
+ @chassisInfoArea.setter
+ def chassisInfoArea(self, obj):
+ self._ChassisInfoArea = obj
+
+ @property
+ def multiRecordArea(self):
+ return self._multiRecordArea
+
+ @multiRecordArea.setter
+ def multiRecordArea(self, obj):
+ self._multiRecordArea = obj
+
+ @property
+ def bindata(self):
+ return self._bindata
+
+ @bindata.setter
+ def bindata(self, obj):
+ self._bindata = obj
+
+ @property
+ def bodybin(self):
+ return self._bodybin
+
+ @bodybin.setter
+ def bodybin(self, obj):
+ self._bodybin = obj
+
+ def recalcuteCommonHead(self):
+ self.bindata = ""
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ d_print("common Header %d" % self.offset)
+ d_print("fru eeprom size %d" % self._frusize)
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ self.internalUserAreaOffset = self.offset // 8
+ self.offset += self.internalUseArea.size
+ d_print("internalUseArea is present offset:%d" % self.offset)
+
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ self.chassicInfoAreaOffset = self.offset // 8
+ self.offset += self.chassisInfoArea.size
+ d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ self.boardInfoAreaOffset = self.offset // 8
+ self.offset += self.boardInfoArea.size
+ d_print("boardInfoArea is present offset:%d" % self.offset)
+ d_print("boardInfoArea is present size:%d" %
+ self.boardInfoArea.size)
+
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ self.productinfoAreaOffset = self.offset // 8
+ self.offset += self.productInfoArea.size
+ d_print("productInfoArea is present offset:%d" % self.offset)
+
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ self.multiRecordAreaOffset = self.offset // 8
+ d_print("multiRecordArea is present offset:%d" % self.offset)
+
+ if self.internalUserAreaOffset == self.INITVALUE:
+ self.internalUserAreaOffset = 0
+ if self.productinfoAreaOffset == self.INITVALUE:
+ self.productinfoAreaOffset = 0
+ if self.chassicInfoAreaOffset == self.INITVALUE:
+ self.chassicInfoAreaOffset = 0
+ if self.boardInfoAreaOffset == self.INITVALUE:
+ self.boardInfoAreaOffset = 0
+ if self.multiRecordAreaOffset == self.INITVALUE:
+ self.multiRecordAreaOffset = 0
+
+ self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+ - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+ d_print("zerochecksum:%x" % self.zeroCheckSum)
+ self.data = ""
+ self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+ self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+ self.bindata = self.data + self.bodybin
+ totallen = len(self.bindata)
+ d_print("totallen %d" % totallen)
+ if totallen < self._frusize:
+ self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+ else:
+ raise FruException('bin data more than %d' % self._frusize, -2)
+
+ def recalcutebin(self):
+ self.bodybin = ""
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ d_print("internalUseArea present")
+ self.bodybin += self.internalUseArea.data
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ d_print("chassisInfoArea present")
+ self.bodybin += self.chassisInfoArea.data
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ d_print("boardInfoArea present")
+ self.boardInfoArea.recalcute()
+ self.bodybin += self.boardInfoArea.data
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ d_print("productInfoAreapresent")
+ self.productInfoArea.recalcute()
+ self.bodybin += self.productInfoArea.data
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ d_print("multiRecordArea present")
+ self.bodybin += self.productInfoArea.data
+
+ def recalcute(self, fru_eeprom_size=256):
+ self._frusize = fru_eeprom_size
+ self.recalcutebin()
+ self.recalcuteCommonHead()
+
+ def setValue(self, area, field, value):
+ tmp_area = getattr(self, area, None)
+ if tmp_area is not None:
+ tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
new file mode 100644
index 000000000000..60549859fca5
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=i2c_ismt,i2c_i801,r8169,r8168,intel_spi_pci,sdhci_pci"
+CONSOLE_PORT=0xf060
+CONSOLE_DEV=0
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json
new file mode 100644
index 000000000000..865acd01a595
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json
@@ -0,0 +1,2078 @@
+{
+ "PORT_MEDIA_SETTINGS": {
+ "32": {
+ "Default": {
+ "pre1": {
+ "lane0": "0x00000000"
+ },
+ "main": {
+ "lane0": "0x00000030"
+ },
+ "post1": {
+ "lane0": "0x00000005"
+ }
+ }
+ },
+ "33": {
+ "Default": {
+ "pre1": {
+ "lane0": "0x00000000"
+ },
+ "main": {
+ "lane0": "0x00000034"
+ },
+ "post1": {
+ "lane0": "0x00000008"
+ }
+ }
+ },
+ "0": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004",
+ "lane4": "0x00000004",
+ "lane5": "0x00000004",
+ "lane6": "0x00000004",
+ "lane7": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008C",
+ "lane2": "0x0000008C",
+ "lane3": "0x0000008C",
+ "lane4": "0x0000008C",
+ "lane5": "0x0000008C",
+ "lane6": "0x0000008C",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "1": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004",
+ "lane4": "0x00000004",
+ "lane5": "0x00000004",
+ "lane6": "0x00000004",
+ "lane7": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x00000078",
+ "lane2": "0x0000008C",
+ "lane3": "0x00000088",
+ "lane4": "0x0000008C",
+ "lane5": "0x00000084",
+ "lane6": "0x0000008C",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "2": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0xffffffe8",
+ "lane1": "0xffffffe8",
+ "lane2": "0xffffffe8",
+ "lane3": "0xffffffe8",
+ "lane4": "0xffffffe8",
+ "lane5": "0xffffffe8",
+ "lane6": "0xffffffe8",
+ "lane7": "0xffffffe8"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "3": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000084",
+ "lane2": "0x00000090",
+ "lane3": "0x00000090",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "4": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000090",
+ "lane2": "0x00000090",
+ "lane3": "0x00000090",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "5": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000078",
+ "lane1": "0x00000078",
+ "lane2": "0x00000078",
+ "lane3": "0x00000078",
+ "lane4": "0x00000074",
+ "lane5": "0x00000078",
+ "lane6": "0x00000088",
+ "lane7": "0x0000007C"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "6": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x0000007C",
+ "lane1": "0x0000008C",
+ "lane2": "0x00000078",
+ "lane3": "0x00000074",
+ "lane4": "0x0000007C",
+ "lane5": "0x0000007C",
+ "lane6": "0x0000007C",
+ "lane7": "0x00000078"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
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+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x00000078",
+ "lane1": "0x00000074",
+ "lane2": "0x0000008C",
+ "lane3": "0x0000007C",
+ "lane4": "0x0000007C",
+ "lane5": "0x00000078",
+ "lane6": "0x00000090",
+ "lane7": "0x00000078"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "31": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000090",
+ "lane2": "0x00000088",
+ "lane3": "0x00000084",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ }
+ }
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py
new file mode 100644
index 000000000000..37ed2168e611
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py
@@ -0,0 +1,457 @@
+#!/usr/bin/python3
+# * onboard temperature sensors
+# * FAN trays
+# * PSU
+#
+import os
+import re
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+from cust_fru import CustFru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+ strtmp = ''
+ for value in val:
+ strtmp += chr(value)
+ return strtmp
+
+
+def typeTostr(val):
+ if isinstance(val, bytes):
+ strtmp = byteTostr(val)
+ return strtmp
+ return val
+
+
+def get_board_id():
+ if not os.path.exists(BOARD_ID_PATH):
+ return "NA"
+ with open(BOARD_ID_PATH) as fd:
+ id_str = fd.read().strip()
+ return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+ if not os.path.exists(BOARD_AIRFLOW_PATH):
+ return "NA"
+ with open(BOARD_AIRFLOW_PATH) as fd:
+ airflow_str = fd.read().strip()
+ data = json.loads(airflow_str)
+ airflow = data.get("board", "NA")
+ return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+ "dev_" + boardid + "_" + boardairflow + ".xml",
+ "dev_" + boardid + ".xml",
+ "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+ retval = "ERR"
+ val_list = []
+ msg = ""
+ ret = ""
+ fd = -1
+
+ if not os.path.exists(path):
+ return False, "%s %s not found" % (retval, path)
+
+ try:
+ fd = os.open(path, os.O_RDONLY)
+ os.lseek(fd, offset, os.SEEK_SET)
+ ret = os.read(fd, read_len)
+ for item in ret:
+ val_list.append(item)
+ except Exception as e:
+ msg = str(e)
+ return False, "%s %s" % (retval, msg)
+ finally:
+ if fd > 0:
+ os.close(fd)
+ return True, val_list
+
+
+def getPMCreg(location):
+ retval = 'ERR'
+ if not os.path.isfile(location):
+ return "%s %s notfound" % (retval, location)
+ try:
+ with open(location, 'r') as fd:
+ retval = fd.read()
+ except Exception as error:
+ return "ERR %s" % str(error)
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+ retval = 'ERR'
+ mb_reg_file = reg_name
+ filepath = glob.glob(mb_reg_file)
+ if len(filepath) == 0:
+ return "%s %s notfound" % (retval, mb_reg_file)
+ mb_reg_file = filepath[0]
+ if not os.path.isfile(mb_reg_file):
+ # print mb_reg_file, 'not found !'
+ return "%s %s notfound" % (retval, mb_reg_file)
+ try:
+ with open(mb_reg_file, 'rb') as fd:
+ retval = fd.read()
+ retval = typeTostr(retval)
+ except Exception as error:
+ retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+class checktype():
+ def __init__(self, test1):
+ self.test1 = test1
+
+ @staticmethod
+ def getValue(location, bit, data_type, coefficient=1, addend=0):
+ try:
+ value_t = get_pmc_register(location)
+ if value_t.startswith("ERR") or value_t.startswith("NA"):
+ return value_t
+ if data_type == 1:
+ return float('%.1f' % ((float(value_t) / 1000) + addend))
+ if data_type == 2:
+ return float('%.1f' % (float(value_t) / 100))
+ if data_type == 3:
+ psu_status = int(value_t, 16)
+ return (psu_status & (1 << bit)) >> bit
+ if data_type == 4:
+ return int(value_t, 10)
+ if data_type == 5:
+ return float('%.1f' % (float(value_t) / 1000 / 1000))
+ if data_type == 6:
+ return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+ return value_t
+ except Exception as e:
+ value_t = "ERR %s" % str(e)
+ return value_t
+
+ # fanFRU
+ @staticmethod
+ def decodeBinByValue(retval):
+ fru = ipmifru()
+ fru.decodeBin(retval)
+ return fru
+
+ @staticmethod
+ def getfruValue(prob_t, root, val):
+ try:
+ ret, binval_bytes = dev_file_read(val, 0, 256)
+ if ret is False:
+ return binval_bytes
+ binval = byteTostr(binval_bytes)
+ fanpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ fanpro['fan_type'] = ret.productInfoArea.productName
+ fanpro['hw_version'] = ret.productInfoArea.productVersion
+ fanpro['sn'] = ret.productInfoArea.productSerialNumber
+ fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+ fan_name = fanpro['fan_type'].strip()
+ if len(fan_display_name_dict) == 0:
+ return fanpro
+ if fan_name not in fan_display_name_dict:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+ else:
+ fanpro['fan_type'] = fan_display_name_dict[fan_name]
+ return fanpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getslotfruValue(val):
+ try:
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ slotpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+ slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+ slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+ return slotpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getpsufruValue(prob_t, root, val):
+ try:
+ psu_match = False
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ psupro = {}
+ ret = checktype.decodeBinByValue(binval)
+ psupro['type1'] = ret.productInfoArea.productPartModelName
+ psupro['sn'] = ret.productInfoArea.productSerialNumber
+ psupro['hw_version'] = ret.productInfoArea.productVersion
+ psu_dict = status.getDecodValue(root, "psutype")
+ psupro['type1'] = psupro['type1'].strip()
+ if len(psu_dict) == 0:
+ return psupro
+ for psu_name, display_name in psu_dict.items():
+ if psu_name.strip() == psupro['type1']:
+ psupro['type1'] = display_name
+ psu_match = True
+ break
+ if psu_match is not True:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+ return psupro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getpsucustfruValue(prob_t, root, val):
+ try:
+ psu_match = False
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ psupro = {}
+ custfru = CustFru()
+ custfru.decode(binval)
+ psupro['type1'] = custfru.product_name.strip()
+ psupro['sn'] = custfru.serial_number.strip().replace(chr(0), "")
+ psupro['hw_version'] = custfru.version.strip()
+ psu_dict = status.getDecodValue(root, "psutype")
+ psupro['type1'] = psupro['type1'].strip()
+ if len(psu_dict) == 0:
+ return psupro
+ for psu_name, display_name in psu_dict.items():
+ if psu_name.strip() == psupro['type1']:
+ psupro['type1'] = display_name
+ psu_match = True
+ break
+ if psu_match is not True:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+ return psupro
+ except Exception as error:
+ return "ERR " + str(error)
+
+
+class status():
+ def __init__(self, productname):
+ self.productname = productname
+
+ @staticmethod
+ def getETroot(filename):
+ tree = ET.parse(filename)
+ root = tree.getroot()
+ return root
+
+ @staticmethod
+ def getDecodValue(collection, decode):
+ decodes = collection.find('decode')
+ testdecode = decodes.find(decode)
+ test = {}
+ if testdecode is None:
+ return test
+ for neighbor in testdecode.iter('code'):
+ test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+ return test
+
+ @staticmethod
+ def getfileValue(location):
+ return checktype.getValue(location, " ", " ")
+
+ @staticmethod
+ def getETValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ prob_t = {}
+ prob_t.update(neighbor.attrib)
+ prob_t['errcode'] = 0
+ prob_t['errmsg'] = ''
+ for pros in neighbor.iter("property"):
+ ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+ if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+ fruval = checktype.getfruValue(prob_t, root, ret["location"])
+ if isinstance(fruval, str) and fruval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = fruval
+ break
+ prob_t.update(fruval)
+ continue
+
+ if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+ psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+ if isinstance(psuval, str) and psuval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = psuval
+ break
+ prob_t.update(psuval)
+ continue
+
+ if ret.get("name") == "psu" and ret.get('e2type') == 'custfru':
+ psuval = checktype.getpsucustfruValue(prob_t, root, ret["location"])
+ if isinstance(psuval, str) and psuval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = psuval
+ break
+ prob_t.update(psuval)
+ continue
+
+ if ret.get("gettype") == "config":
+ prob_t[ret["name"]] = ret["value"]
+ continue
+
+ if 'type' not in ret.keys():
+ val = "0"
+ else:
+ val = ret["type"]
+ if 'bit' not in ret.keys():
+ bit = "0"
+ else:
+ bit = ret["bit"]
+ if 'coefficient' not in ret.keys():
+ coefficient = 1
+ else:
+ coefficient = float(ret["coefficient"])
+ if 'addend' not in ret.keys():
+ addend = 0
+ else:
+ addend = float(ret["addend"])
+
+ s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+ if isinstance(s, str) and s.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = s
+ break
+ if 'default' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ prob_t['errmsg'] = rt[str(s)]
+ if str(s) != ret["default"]:
+ prob_t['errcode'] = -1
+ break
+ else:
+ if 'decode' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+ (s.replace("\x00", "").rstrip()))
+ else:
+ s = rt[str(s).replace("\x00", "").rstrip()]
+ name = ret["name"]
+ prob_t[name] = str(s)
+ a.append(prob_t)
+
+ @staticmethod
+ def getCPUValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ location = neighbor.attrib["location"]
+
+ filepath = glob.glob(location)
+ if len(filepath) == 0:
+ return
+ location = filepath[0]
+ L = []
+ for dirpath, dirnames, filenames in os.walk(location):
+ for file in filenames:
+ if file.endswith("_input"):
+ b = re.findall(r'temp(\d+)_input', file)
+ idx = int(b[0])
+ L.append(idx)
+ L = sorted(L)
+ for idx in L:
+ prob_t = {}
+ prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx))
+ prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000
+ prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000
+ prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000
+ prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000
+ a.append(prob_t)
+
+ @staticmethod
+ def getFileName():
+ fpath = os.path.dirname(os.path.realpath(__file__))
+ for file in DEV_XML_FILE_LIST:
+ xml = fpath + "/" + file
+ if os.path.exists(xml):
+ return xml
+ return fpath + "/" + CONFIG_NAME
+
+ @staticmethod
+ def checkFan(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "fan"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getTemp(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "temp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getPsu(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "psu"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getCustPsu(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "custpsu"
+ status.getETValue(ret, _filename, _tagname)
+
+
+ @staticmethod
+ def getcputemp(ret):
+ _filename = status.getFileName()
+ _tagname = "cpus"
+ status.getCPUValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getDcdc(ret):
+ _filename = status.getFileName()
+ _tagname = "dcdc"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmactemp(ret):
+ _filename = status.getFileName()
+ _tagname = "mactemp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmacpower(ret):
+ _filename = status.getFileName()
+ _tagname = "macpower"
+ status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
new file mode 100644
index 000000000000..e419f4032579
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
@@ -0,0 +1,159 @@
+- bus: '00'
+ dev: '00'
+ fn: '0'
+ id: '1980'
+ name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+ 11)'
+- bus: '00'
+ dev: '04'
+ fn: '0'
+ id: 19a1
+ name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+ (rev 11)'
+- bus: '00'
+ dev: '05'
+ fn: '0'
+ id: 19a2
+ name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+ Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+ dev: '06'
+ fn: '0'
+ id: 19a3
+ name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+ Root Port (rev 11)'
+- bus: '00'
+ dev: 09
+ fn: '0'
+ id: 19a4
+ name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+ Port #0 (rev 11)'
+- bus: '00'
+ dev: 0b
+ fn: '0'
+ id: 19a6
+ name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+ Port #2 (rev 11)'
+- bus: '00'
+ dev: 0e
+ fn: '0'
+ id: 19a8
+ name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+ Port #4 (rev 11)'
+- bus: '00'
+ dev: '10'
+ fn: '0'
+ id: 19aa
+ name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+ Port #6 (rev 11)'
+- bus: '00'
+ dev: '12'
+ fn: '0'
+ id: 19ac
+ name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+ - Host (rev 11)'
+- bus: '00'
+ dev: '14'
+ fn: '0'
+ id: 19c2
+ name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+ 1 (rev 11)'
+- bus: '00'
+ dev: '15'
+ fn: '0'
+ id: 19d0
+ name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+ Controller (rev 11)'
+- bus: '00'
+ dev: '17'
+ fn: '0'
+ id: 19d2
+ name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+ Root Port #1 (rev 11)'
+- bus: '00'
+ dev: '18'
+ fn: '0'
+ id: 19d3
+ name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+ HECI 1 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '0'
+ id: 19d8
+ name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+ (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '1'
+ id: 19d8
+ name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+ (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '2'
+ id: 19d8
+ name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+ (rev 11)'
+- bus: '00'
+ dev: 1c
+ fn: '0'
+ id: 19db
+ name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '0'
+ id: 19dc
+ name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+ 11)'
+- bus: '00'
+ dev: 1f
+ fn: '1'
+ id: 19dd
+ name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary
+ to Side Band (P2SB) Bridge (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '2'
+ id: 19de
+ name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+ Controller (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '4'
+ id: 19df
+ name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+ 11)'
+- bus: '00'
+ dev: 1f
+ fn: '5'
+ id: 19e0
+ name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+ SPI Controller (rev 11)'
+- bus: '01'
+ dev: '00'
+ fn: '0'
+ id: 19e2
+ name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+ (rev 11)'
+- bus: '02'
+ dev: '00'
+ fn: '0'
+ id: b980
+ name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)'
+- bus: '04'
+ dev: '00'
+ fn: '0'
+ id: '7011'
+ name: 'Memory controller: Xilinx Corporation Device 7011'
+- bus: '07'
+ dev: '00'
+ fn: '0'
+ id: 15c6
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+ 11)'
+- bus: '07'
+ dev: '00'
+ fn: '1'
+ id: 15c6
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+ 11)'
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json
new file mode 100644
index 000000000000..3d426398748e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json
@@ -0,0 +1,501 @@
+{
+ "chassis": {
+ "name": "M2-W6920-32QC2X",
+ "thermal_manager": false,
+ "status_led": {
+ "controllable": false,
+ "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+ },
+ "components": [
+ {
+ "name": "CPU_CPLD"
+ },
+ {
+ "name": "MAC_CPLD"
+ },
+ {
+ "name": "FAN_CPLD"
+ },
+ {
+ "name": "BASE_CPLD"
+ },
+ {
+ "name": "BIOS"
+ }
+ ],
+ "fans": [
+ {
+ "name": "Fantray1_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 40,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray2_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 40,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ }
+ ],
+ "fan_drawers":[
+ {
+ "name": "Fantray1",
+ "num_fans" : 1,
+ "status_led": {
+ "controllable": false,
+ "colors": ["amber", "green", "off"]
+ },
+ "fans": [
+ {
+ "name": "FanTray1_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 40,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray2",
+ "num_fans" : 1,
+ "status_led": {
+ "controllable": false,
+ "colors": ["amber", "green", "off"]
+ },
+ "fans": [
+ {
+ "name": "FanTray2_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 40,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ }
+ ],
+ "psus": [
+ {
+ "name": "Psu1",
+ "voltage": false,
+ "current": false,
+ "power": false,
+ "max_power": false,
+ "voltage_high_threshold": false,
+ "voltage_low_threshold": false,
+ "temperature": false,
+ "fans_target_speed": false,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU1_FAN1",
+ "speed": {
+ "controllable": false,
+ "minimum": 40,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Psu2",
+ "voltage": false,
+ "current": false,
+ "power": false,
+ "max_power": false,
+ "voltage_high_threshold": false,
+ "voltage_low_threshold": false,
+ "temperature": false,
+ "fans_target_speed": false,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU2_FAN1",
+ "speed": {
+ "controllable": false,
+ "minimum": 40,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ }
+ ],
+ "thermals": [
+ {
+ "name": "ASIC_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "CPU_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "INLET_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "OUTLET_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ }
+ ],
+ "modules": [],
+ "sfps": []
+ },
+ "interfaces": {
+ "Ethernet1": {
+ "index": "0,0,0,0,0,0,0,0",
+ "lanes": "1,2,3,4,5,6,7,8",
+ "breakout_modes": {
+ "1x400G": ["Eth1"],
+ "2x200G[100G]": ["Eth1/1", "Eth1/2"],
+ "4x100G": ["Eth1/1", "Eth1/2","Eth1/3", "Eth1/4"]
+ }
+ },
+ "Ethernet9": {
+ "index": "1,1,1,1,1,1,1,1",
+ "lanes": "9,10,11,12,13,14,15,16",
+ "breakout_modes": {
+ "1x400G": ["Eth2"],
+ "2x200G[100G]": ["Eth2/1", "Eth2/2"],
+ "4x100G": ["Eth2/1", "Eth2/2","Eth2/3", "Eth2/4"]
+ }
+ },
+ "Ethernet17": {
+ "index": "2,2,2,2,2,2,2,2",
+ "lanes": "17,18,19,20,21,22,23,24",
+ "breakout_modes": {
+ "1x400G": ["Eth3"],
+ "2x200G[100G]": ["Eth3/1", "Eth3/2"],
+ "4x100G": ["Eth3/1", "Eth3/2","Eth3/3", "Eth3/4"]
+ }
+ },
+ "Ethernet25": {
+ "index": "3,3,3,3,3,3,3,3",
+ "lanes": "25,26,27,28,29,30,31,32",
+ "breakout_modes": {
+ "1x400G": ["Eth4"],
+ "2x200G[100G]": ["Eth4/1", "Eth4/2"],
+ "4x100G": ["Eth4/1", "Eth4/2","Eth4/3", "Eth4/4"]
+ }
+ },
+ "Ethernet33": {
+ "index": "4,4,4,4,4,4,4,4",
+ "lanes": "33,34,35,36,37,38,39,40",
+ "breakout_modes": {
+ "1x400G": ["Eth5"],
+ "2x200G[100G]": ["Eth5/1", "Eth5/2"],
+ "4x100G": ["Eth5/1", "Eth5/2","Eth5/3", "Eth5/4"]
+ }
+ },
+ "Ethernet41": {
+ "index": "5,5,5,5,5,5,5,5",
+ "lanes": "41,42,43,44,45,46,47,48",
+ "breakout_modes": {
+ "1x400G": ["Eth6"],
+ "2x200G[100G]": ["Eth6/1", "Eth6/2"],
+ "4x100G": ["Eth6/1", "Eth6/2","Eth6/3", "Eth6/4"]
+ }
+ },
+ "Ethernet49": {
+ "index": "6,6,6,6,6,6,6,6",
+ "lanes": "49,50,51,52,53,54,55,56",
+ "breakout_modes": {
+ "1x400G": ["Eth7"],
+ "2x200G[100G]": ["Eth7/1", "Eth7/2"],
+ "4x100G": ["Eth7/1", "Eth7/2","Eth7/3", "Eth7/4"]
+ }
+ },
+ "Ethernet57": {
+ "index": "7,7,7,7,7,7,7,7",
+ "lanes": "57,58,59,60,61,62,63,64",
+ "breakout_modes": {
+ "1x400G": ["Eth8"],
+ "2x200G[100G]": ["Eth8/1", "Eth8/2"],
+ "4x100G": ["Eth8/1", "Eth8/2","Eth8/3", "Eth8/4"]
+ }
+ },
+ "Ethernet65": {
+ "index": "8,8,8,8,8,8,8,8",
+ "lanes": "65,66,67,68,69,70,71,72",
+ "breakout_modes": {
+ "1x400G": ["Eth9"],
+ "2x200G[100G]": ["Eth9/1", "Eth9/2"],
+ "4x100G": ["Eth9/1", "Eth9/2","Eth9/3", "Eth9/4"]
+ }
+ },
+ "Ethernet73": {
+ "index": "9,9,9,9,9,9,9,9",
+ "lanes": "73,74,75,76,77,78,79,80",
+ "breakout_modes": {
+ "1x400G": ["Eth10"],
+ "2x200G[100G]": ["Eth10/1", "Eth10/2"],
+ "4x100G": ["Eth10/1", "Eth10/2","Eth10/3", "Eth10/4"]
+ }
+ },
+ "Ethernet81": {
+ "index": "10,10,10,10,10,10,10,10",
+ "lanes": "81,82,83,84,85,86,87,88",
+ "breakout_modes": {
+ "1x400G": ["Eth11"],
+ "2x200G[100G]": ["Eth11/1", "Eth11/2"],
+ "4x100G": ["Eth11/1", "Eth11/2","Eth11/3", "Eth11/4"]
+ }
+ },
+ "Ethernet89": {
+ "index": "11,11,11,11,11,11,11,11",
+ "lanes": "89,90,91,92,93,94,95,96",
+ "breakout_modes": {
+ "1x400G": ["Eth12"],
+ "2x200G[100G]": ["Eth12/1", "Eth12/2"],
+ "4x100G": ["Eth12/1", "Eth12/2","Eth12/3", "Eth12/4"]
+ }
+ },
+ "Ethernet97": {
+ "index": "12,12,12,12,12,12,12,12",
+ "lanes": "97,98,99,100,101,102,103,104",
+ "breakout_modes": {
+ "1x400G": ["Eth13"],
+ "2x200G[100G]": ["Eth13/1", "Eth13/2"],
+ "4x100G": ["Eth13/1", "Eth13/2","Eth13/3", "Eth13/4"]
+ }
+ },
+ "Ethernet105": {
+ "index": "13,13,13,13,13,13,13,13",
+ "lanes": "105,106,107,108,109,110,111,112",
+ "breakout_modes": {
+ "1x400G": ["Eth14"],
+ "2x200G[100G]": ["Eth14/1", "Eth14/2"],
+ "4x100G": ["Eth14/1", "Eth14/2","Eth14/3", "Eth14/4"]
+ }
+ },
+ "Ethernet113": {
+ "index": "14,14,14,14,14,14,14,14",
+ "lanes": "113,114,115,116,117,118,119,120",
+ "breakout_modes": {
+ "1x400G": ["Eth15"],
+ "2x200G[100G]": ["Eth15/1", "Eth15/2"],
+ "4x100G": ["Eth15/1", "Eth15/2","Eth15/3", "Eth15/4"]
+ }
+ },
+ "Ethernet121": {
+ "index": "15,15,15,15,15,15,15,15",
+ "lanes": "121,122,123,124,125,126,127,128",
+ "breakout_modes": {
+ "1x400G": ["Eth16"],
+ "2x200G[100G]": ["Eth16/1", "Eth16/2"],
+ "4x100G": ["Eth16/1", "Eth16/2","Eth16/3", "Eth16/4"]
+ }
+ },
+ "Ethernet129": {
+ "index": "16,16,16,16,16,16,16,16",
+ "lanes": "129,130,131,132,133,134,135,136",
+ "breakout_modes": {
+ "1x400G": ["Eth17"],
+ "2x200G[100G]": ["Eth17/1", "Eth17/2"],
+ "4x100G": ["Eth17/1", "Eth17/2","Eth17/3", "Eth17/4"]
+ }
+ },
+ "Ethernet137": {
+ "index": "17,17,17,17,17,17,17,17",
+ "lanes": "137,138,139,140,141,142,143,144",
+ "breakout_modes": {
+ "1x400G": ["Eth18"],
+ "2x200G[100G]": ["Eth18/1", "Eth18/2"],
+ "4x100G": ["Eth18/1", "Eth18/2","Eth18/3", "Eth18/4"]
+ }
+ },
+ "Ethernet145": {
+ "index": "18,18,18,18,18,18,18,18",
+ "lanes": "145,146,147,148,149,150,151,152",
+ "breakout_modes": {
+ "1x400G": ["Eth19"],
+ "2x200G[100G]": ["Eth19/1", "Eth19/2"],
+ "4x100G": ["Eth19/1", "Eth19/2","Eth19/3", "Eth19/4"]
+ }
+ },
+ "Ethernet153": {
+ "index": "19,19,19,19,19,19,19,19",
+ "lanes": "153,154,155,156,157,158,159,160",
+ "breakout_modes": {
+ "1x400G": ["Eth20"],
+ "2x200G[100G]": ["Eth20/1", "Eth20/2"],
+ "4x100G": ["Eth20/1", "Eth20/2","Eth20/3", "Eth20/4"]
+ }
+ },
+ "Ethernet161": {
+ "index": "20,20,20,20,20,20,20,20",
+ "lanes": "161,162,163,164,165,166,167,168",
+ "breakout_modes": {
+ "1x400G": ["Eth21"],
+ "2x200G[100G]": ["Eth21/1", "Eth21/2"],
+ "4x100G": ["Eth21/1", "Eth21/2","Eth21/3", "Eth21/4"]
+ }
+ },
+ "Ethernet169": {
+ "index": "21,21,21,21,21,21,21,21",
+ "lanes": "169,170,171,172,173,174,175,176",
+ "breakout_modes": {
+ "1x400G": ["Eth22"],
+ "2x200G[100G]": ["Eth22/1", "Eth22/2"],
+ "4x100G": ["Eth22/1", "Eth22/2","Eth22/3", "Eth22/4"]
+ }
+ },
+ "Ethernet177": {
+ "index": "22,22,22,22,22,22,22,22",
+ "lanes": "177,178,179,180,181,182,183,184",
+ "breakout_modes": {
+ "1x400G": ["Eth23"],
+ "2x200G[100G]": ["Eth23/1", "Eth23/2"],
+ "4x100G": ["Eth23/1", "Eth23/2","Eth23/3", "Eth23/4"]
+ }
+ },
+ "Ethernet185": {
+ "index": "23,23,23,23,23,23,23,23",
+ "lanes": "185,186,187,188,189,190,191,192",
+ "breakout_modes": {
+ "1x400G": ["Eth24"],
+ "2x200G[100G]": ["Eth24/1", "Eth24/2"],
+ "4x100G": ["Eth24/1", "Eth24/2","Eth24/3", "Eth24/4"]
+ }
+ },
+ "Ethernet193": {
+ "index": "24,24,24,24,24,24,24,24",
+ "lanes": "193,194,195,196,197,198,199,200",
+ "breakout_modes": {
+ "1x400G": ["Eth25"],
+ "2x200G[100G]": ["Eth25/1", "Eth25/2"],
+ "4x100G": ["Eth25/1", "Eth25/2","Eth25/3", "Eth25/4"]
+ }
+ },
+ "Ethernet201": {
+ "index": "25,25,25,25,25,25,25,25",
+ "lanes": "201,202,203,204,205,206,207,208",
+ "breakout_modes": {
+ "1x400G": ["Eth26"],
+ "2x200G[100G]": ["Eth26/1", "Eth26/2"],
+ "4x100G": ["Eth26/1", "Eth26/2","Eth26/3", "Eth26/4"]
+ }
+ },
+ "Ethernet209": {
+ "index": "26,26,26,26,26,26,26,26",
+ "lanes": "209,210,211,212,213,214,215,216",
+ "breakout_modes": {
+ "1x400G": ["Eth27"],
+ "2x200G[100G]": ["Eth27/1", "Eth27/2"],
+ "4x100G": ["Eth27/1", "Eth27/2","Eth27/3", "Eth27/4"]
+ }
+ },
+ "Ethernet217": {
+ "index": "27,27,27,27,27,27,27,27",
+ "lanes": "217,218,219,220,221,222,223,224",
+ "breakout_modes": {
+ "1x400G": ["Eth28"],
+ "2x200G[100G]": ["Eth28/1", "Eth28/2"],
+ "4x100G": ["Eth28/1", "Eth28/2","Eth28/3", "Eth28/4"]
+ }
+ },
+ "Ethernet225": {
+ "index": "28,28,28,28,28,28,28,28",
+ "lanes": "225,226,227,228,229,230,231,232",
+ "breakout_modes": {
+ "1x400G": ["Eth29"],
+ "2x200G[100G]": ["Eth29/1", "Eth29/2"],
+ "4x100G": ["Eth29/1", "Eth29/2","Eth29/3", "Eth29/4"]
+ }
+ },
+ "Ethernet233": {
+ "index": "29,29,29,29,29,29,29,29",
+ "lanes": "233,234,235,236,237,238,239,240",
+ "breakout_modes": {
+ "1x400G": ["Eth30"],
+ "2x200G[100G]": ["Eth30/1", "Eth30/2"],
+ "4x100G": ["Eth30/1", "Eth30/2","Eth30/3", "Eth30/4"]
+ }
+ },
+ "Ethernet241": {
+ "index": "30,30,30,30,30,30,30,30",
+ "lanes": "241,242,243,244,245,246,247,248",
+ "breakout_modes": {
+ "1x400G": ["Eth31"],
+ "2x200G[100G]": ["Eth31/1", "Eth31/2"],
+ "4x100G": ["Eth31/1", "Eth31/2","Eth31/3", "Eth31/4"]
+ }
+ },
+ "Ethernet249": {
+ "index": "31,31,31,31,31,31,31,31",
+ "lanes": "249,250,251,252,253,254,255,256",
+ "breakout_modes": {
+ "1x400G": ["Eth32"],
+ "2x200G[100G]": ["Eth32/1", "Eth32/2"],
+ "4x100G": ["Eth32/1", "Eth32/2","Eth32/3", "Eth32/4"]
+ }
+ },
+ "Ethernet257": {
+ "index": "32",
+ "lanes": "258",
+ "breakout_modes": {
+ "1x10G": ["Eth33"]
+ }
+ },
+ "Ethernet258": {
+ "index": "33",
+ "lanes": "257",
+ "breakout_modes": {
+ "1x10G": ["Eth34"]
+ }
+ }
+ }
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json
new file mode 100644
index 000000000000..eb08e2563dea
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json
@@ -0,0 +1,16 @@
+{
+ "chassis": {
+ "M2-W6920-32QC2X": {
+ "component": {
+ "CPU_CPLD": { },
+ "CTRL_CPLD": { },
+ "MAC_CPLDA": { },
+ "MAC_CPLDB": { },
+ "FAN_CPLD": { },
+ "MAC_FPGA": { },
+ "BIOS": { }
+ }
+ }
+ }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf
new file mode 100644
index 000000000000..283e1c0ce710
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf
@@ -0,0 +1 @@
+usemsi=1
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..60d7298a6627
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py
@@ -0,0 +1,313 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+ import time
+ import subprocess
+ import re
+ import os
+ import threading
+ import traceback
+ from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+ raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+ """Platform-specific SfpUtil class"""
+
+ PORT_START = 0
+ PORT_END = 33
+ PORTS_IN_BLOCK = 34
+
+ EEPROM_OFFSET = 63
+ SFP_DEVICE_TYPE = "optoe2"
+ QSFP_DEVICE_TYPE = "optoe1"
+ QSFPDD_DEVICE_TYPE = "optoe3"
+ I2C_MAX_ATTEMPT = 3
+
+ _port_to_eeprom_mapping = {}
+ port_to_i2cbus_mapping ={}
+
+ sfp_ports_list = []
+ qsfp_ports_list = []
+ osfp_ports_list = []
+
+ @property
+ def port_start(self):
+ return self.PORT_START
+
+ @property
+ def port_end(self):
+ return self.PORT_END
+
+ @property
+ def qsfp_ports(self):
+ return self.qsfp_ports_list
+
+ @property
+ def osfp_ports(self):
+ return self.osfp_ports_list
+
+ @property
+ def port_to_eeprom_mapping(self):
+ return self._port_to_eeprom_mapping
+
+ def __init__(self):
+ self.sfp_ports_list = []
+ self.qsfp_ports_list = []
+ self.osfp_ports_list = []
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+
+ self.port_to_i2cbus_mapping[0] = 65
+ self.port_to_i2cbus_mapping[1] = 66
+ self.port_to_i2cbus_mapping[2] = 63
+ self.port_to_i2cbus_mapping[3] = 64
+ self.port_to_i2cbus_mapping[28] = 93
+ self.port_to_i2cbus_mapping[29] = 94
+ self.port_to_i2cbus_mapping[30] = 91
+ self.port_to_i2cbus_mapping[31] = 92
+ self.port_to_i2cbus_mapping[32] = 96
+ self.port_to_i2cbus_mapping[33] = 95
+
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ ret, sfp_type = self._get_sfp_type(x)
+ if (ret == True):
+ if sfp_type == "qsfp_dd":
+ self.osfp_ports_list.append(x)
+ elif sfp_type == "qsfp":
+ self.qsfp_ports_list.append(x)
+ elif sfp_type == "sfp":
+ self.sfp_ports_list.append(x)
+ SfpUtilBase.__init__(self)
+
+ def _sfp_read_file_path(self, file_path, offset, num_bytes):
+ attempts = 0
+ while attempts < self.I2C_MAX_ATTEMPT:
+ try:
+ file_path.seek(offset)
+ read_buf = file_path.read(num_bytes)
+ except:
+ attempts += 1
+ time.sleep(0.05)
+ else:
+ return True, read_buf
+ return False, None
+
+ def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+ """Tries to read the eeprom file to determine if the
+ device/sfp is present or not. If sfp present, the read returns
+ valid bytes. If not, read returns error 'Connection timed out"""
+
+ if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+ return False
+ else:
+ with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+ rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+ return rv
+
+ def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+ try:
+ sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+ # Write device address to new_device file
+ nd_file = open(sysfs_nd_path, "w")
+ nd_str = "%s %s" % (devtype, hex(devaddr))
+ nd_file.write(nd_str)
+ nd_file.close()
+
+ except Exception as err:
+ print("Error writing to new device file: %s" % str(err))
+ return 1
+ else:
+ return 0
+
+ def _get_port_eeprom_path(self, port_num, devid):
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ if port_num in self.port_to_eeprom_mapping.keys():
+ sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+ else:
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+ if i2c_adapter_id is None:
+ print("Error getting i2c bus num")
+ return None
+
+ # Get i2c virtual bus path for the sfp
+ sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+ str(i2c_adapter_id))
+
+ # If i2c bus for port does not exist
+ if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+ print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+ return None
+
+ sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+ str(i2c_adapter_id),
+ hex(devid)[-2:])
+
+ # If sfp device is not present on bus, Add it
+ if not os.path.exists(sysfs_sfp_i2c_client_path):
+ if port_num in self.qsfp_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+ elif port_num in self.osfp_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFPDD_DEVICE_TYPE)
+ else:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+ if ret != 0:
+ print("Error adding sfp device")
+ return None
+
+ sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+ return sysfs_sfp_i2c_client_eeprom_path
+
+ def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+ eeprom_raw = []
+ for i in range(0, num_bytes):
+ eeprom_raw.append("0x00")
+
+ rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+ if rv == False:
+ return None
+
+ try:
+ for n in range(0, num_bytes):
+ if isinstance(raw[n], str):
+ eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
+ elif isinstance(raw[n], int):
+ eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+ except Exception as e:
+ return None
+
+ return eeprom_raw
+
+ def get_eeprom_dom_raw(self, port_num):
+ if port_num in self.qsfp_ports:
+ # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+ return None
+ else:
+ # Read dom eeprom at addr 0x51
+ return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+ def get_presence(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+ cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1))
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ return False
+ if output == "1":
+ return True
+ return False
+
+ def get_low_power_mode(self, port_num):
+ # Check for invalid port_num
+
+ return True
+
+ def set_low_power_mode(self, port_num, lpmode):
+ # Check for invalid port_num
+
+ return True
+
+ def reset(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+
+ return True
+
+ def get_transceiver_change_event(self):
+ return False, {}
+
+ def _get_sfp_type(self, port_num):
+ try:
+ if self.get_presence(port_num) == False:
+ return False, None
+
+ eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+ if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'):
+ return True, "qsfp_dd"
+ elif (eeprom_raw[0] == '11' or eeprom_raw[0] == '0D'):
+ return True, "qsfp"
+ elif (eeprom_raw[0] == '03'):
+ return True, "sfp"
+ except Exception as e:
+ print(traceback.format_exc())
+
+ return False, None
+
+ def twos_comp(self, num, bits):
+ try:
+ if ((num & (1 << (bits - 1))) != 0):
+ num = num - (1 << bits)
+ return num
+ except Exception:
+ return 0
+
+ def get_highest_temperature(self):
+ offset = 0
+ hightest_temperature = -9999
+
+ presence_flag = False
+ read_eeprom_flag = False
+ temperature_valid_flag = False
+
+ for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if self.get_presence(port) == False:
+ continue
+
+ presence_flag = True
+
+ if port in self.osfp_ports:
+ offset = 14
+ elif port in self.qsfp_ports:
+ offset = 22
+ else:
+ offset = 96
+
+ eeprom_path = self._get_port_eeprom_path(port, 0x50)
+ try:
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ read_eeprom_flag = True
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+ msb = int(eeprom_raw[0], 16)
+ lsb = int(eeprom_raw[1], 16)
+
+ result = (msb << 8) | (lsb & 0xff)
+ result = self.twos_comp(result, 16)
+ result = float(result / 256.0)
+ if -50 <= result <= 200:
+ temperature_valid_flag = True
+ if hightest_temperature < result:
+ hightest_temperature = result
+ except Exception as e:
+ ##print(traceback.format_exc())
+ pass
+
+ # all port not presence
+ if presence_flag == False:
+ hightest_temperature = -10000
+
+ # all port read eeprom fail
+ elif read_eeprom_flag == False:
+ hightest_temperature = -9999
+
+ # all port temperature invalid
+ elif read_eeprom_flag == True and temperature_valid_flag == False:
+ hightest_temperature = -10000
+
+ hightest_temperature = round(hightest_temperature, 2)
+
+ return hightest_temperature
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+# - InnoDisk
+# - StorFly
+# - Virtium
+
+try:
+ import re
+ import os
+ import subprocess
+ from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+ raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+ """
+ Generic implementation of the SSD health API
+ """
+ model = NOT_AVAILABLE
+ serial = NOT_AVAILABLE
+ firmware = NOT_AVAILABLE
+ temperature = NOT_AVAILABLE
+ health = NOT_AVAILABLE
+ remaining_life = NOT_AVAILABLE
+ sata_rate = NOT_AVAILABLE
+ ssd_info = NOT_AVAILABLE
+ vendor_ssd_info = NOT_AVAILABLE
+
+ def __init__(self, diskdev):
+ self.vendor_ssd_utility = {
+ "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+ "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info },
+ "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }
+ }
+
+ """
+ The dict model_attr keys relate the vendors
+ LITEON : "ER2-GD","AF2MA31DTDLT"
+ Intel : "SSDSCKKB"
+ SMI : "SM619GXC"
+ samsung: "MZNLH"
+ ADATA : "IM2S3134N"
+ """
+ self.model_attr = {
+ "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+ "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+ "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+ "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+ "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+ }
+
+ self.key_list = list(self.model_attr.keys())
+ self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+ self.dev = diskdev
+ # Generic part
+ self.fetch_generic_ssd_info(diskdev)
+ self.parse_generic_ssd_info()
+ self.fetch_vendor_ssd_info(diskdev, "Generic")
+
+ # Known vendor part
+ if self.model:
+ model_short = self.model.split()[0]
+ if model_short in self.vendor_ssd_utility:
+ self.fetch_vendor_ssd_info(diskdev, model_short)
+ self.parse_vendor_ssd_info(model_short)
+ else:
+ # No handler registered for this disk model
+ pass
+ else:
+ # Failed to get disk model
+ self.model = "Unknown"
+
+ def _execute_shell(self, cmd):
+ process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+ output, error = process.communicate()
+ exit_code = process.returncode
+ if exit_code:
+ return None
+ return output
+
+ def _parse_re(self, pattern, buffer):
+ res_list = re.findall(pattern, str(buffer))
+ return res_list[0] if res_list else NOT_AVAILABLE
+
+ def fetch_generic_ssd_info(self, diskdev):
+ self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+ # Health and temperature values may be overwritten with vendor specific data
+ def parse_generic_ssd_info(self):
+ if "nvme" in self.dev:
+ self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+ health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+ if health_raw == NOT_AVAILABLE:
+ self.health = NOT_AVAILABLE
+ else:
+ health_raw = health_raw.split()[-1]
+ self.health = 100 - float(health_raw.strip('%'))
+
+ temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+ if temp_raw == NOT_AVAILABLE:
+ self.temperature = NOT_AVAILABLE
+ else:
+ temp_raw = temp_raw.split()[-2]
+ self.temperature = float(temp_raw)
+ else:
+ self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+ model_key = ""
+ for key in self.key_list:
+ if re.search(key, self.model):
+ model_key = key
+ break
+ if model_key != "":
+ self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+ self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+ self.health = self.remaining_life
+ # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+ if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+ avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+ self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+ if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT:
+ self.remaining_life = "Fail"
+ self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+ self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+ self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+ def parse_innodisk_info(self):
+ if self.vendor_ssd_info:
+ self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+ self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+ else:
+ if self.health == NOT_AVAILABLE:
+ health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+ self.health = health_raw.split()[-1]
+ if self.temperature == NOT_AVAILABLE:
+ temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+ self.temperature = temp_raw.split()[-6]
+
+ def parse_virtium_info(self):
+ if self.vendor_ssd_info:
+ self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ try:
+ self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+ except (ValueError, ZeroDivisionError):
+ # Invalid avg_erase_count or nand_endurance.
+ pass
+
+ def fetch_vendor_ssd_info(self, diskdev, model):
+ self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+ def parse_vendor_ssd_info(self, model):
+ self.vendor_ssd_utility[model]["parser"]()
+
+ def check_readonly2(self, partition, filesystem):
+ # parse mount cmd output info
+ mount_info = self._execute_shell(MOUNT_CMD)
+ for line in mount_info.split('\n'):
+ column_list = line.split()
+ if line == '':
+ continue
+ if column_list[0] == partition and column_list[2] == filesystem:
+ if column_list[5].split(',')[0][1:] == "ro":
+ return partition
+ else:
+ return NOT_AVAILABLE
+ return NOT_AVAILABLE
+
+ def check_readonly(self, partition, filesystem):
+ ret = os.access(filesystem, os.W_OK)
+ if ret == False:
+ return partition
+ else:
+ return NOT_AVAILABLE
+
+ def get_health(self):
+ """
+ Retrieves current disk health in percentages
+
+ Returns:
+ A float number of current ssd health
+ e.g. 83.5
+ """
+ if self.health == 'N/A':
+ return "NA"
+ else:
+ return float(self.health)
+
+ def get_temperature(self):
+ """
+ Retrieves current disk temperature in Celsius
+
+ Returns:
+ A float number of current temperature in Celsius
+ e.g. 40.1
+ """
+ if self.temperature == 'N/A':
+ return 'NA'
+ else:
+ return float(self.temperature)
+
+ def get_model(self):
+ """
+ Retrieves model for the given disk device
+
+ Returns:
+ A string holding disk model as provided by the manufacturer
+ """
+ return self.model
+
+ def get_firmware(self):
+ """
+ Retrieves firmware version for the given disk device
+
+ Returns:
+ A string holding disk firmware version as provided by the manufacturer
+ """
+ return self.firmware
+
+ def get_serial(self):
+ """
+ Retrieves serial number for the given disk device
+
+ Returns:
+ A string holding disk serial number as provided by the manufacturer
+ """
+ return self.serial
+ def get_sata_rate(self):
+ """
+ Retrieves SATA rate for the given disk device
+ Returns:
+ A string holding current SATA rate as provided by the manufacturer
+ """
+ return self.sata_rate
+ def get_remaining_life(self):
+ """
+ Retrieves remaining life for the given disk device
+ Returns:
+ A string holding disk remaining life as provided by the manufacturer
+ """
+ return self.remaining_life
+ def get_vendor_output(self):
+ """
+ Retrieves vendor specific data for the given disk device
+
+ Returns:
+ A string holding some vendor specific disk information
+ """
+ return self.vendor_ssd_info
+
+ def parse_id_number(self, id):
+ return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+ def get_readonly_partition(self):
+ """
+ Check the partition mount filesystem is readonly status,then output the result.
+ Returns:
+ The readonly partition list
+ """
+
+ ro_partition_list = []
+ partition_list = []
+
+ # parse fdisk cmd output info
+ disk_info = self._execute_shell(DISK_LIST_CMD)
+ begin_flag = False
+ for line in disk_info.split('\n'):
+ if line == "Device":
+ begin_flag = True
+ continue
+ if begin_flag:
+ if line != "":
+ partition_list.append(line)
+ else:
+ break
+
+ # parse df cmd output info
+ disk_free = self._execute_shell(DISK_FREE_CMD)
+ disk_dict = {}
+ line_num = 0
+ for line in disk_free.split('\n'):
+ line_num = line_num + 1
+ if line_num == 1 or line == "":
+ continue
+ column_list = line.split()
+ disk_dict[column_list[0]] = column_list[5]
+
+ # get partition which is readonly
+ for partition in partition_list:
+ if partition in disk_dict:
+ ret = self.check_readonly(partition, disk_dict[partition])
+ if (ret != NOT_AVAILABLE):
+ ro_partition_list.append(ret)
+
+ return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+ "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..fb86ee0a8e85
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc
@@ -0,0 +1,5 @@
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=cd,xe
+
diff --git a/platform/innovium/platform.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/system_health_monitoring_config.json
old mode 100755
new mode 100644
similarity index 100%
rename from platform/innovium/platform.conf
rename to device/micas/x86_64-micas_m2-w6920-32qc2x-r0/system_health_monitoring_config.json
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
new file mode 100644
index 000000000000..b958c147ecc7
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
@@ -0,0 +1,197 @@
+{
+ "interfaces": {
+ "Ethernet1": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet9": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet17": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet25": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet33": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet41": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet49": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet57": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet65": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet73": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet81": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet89": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet97": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet105": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet113": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet121": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet129": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet137": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet145": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet153": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet161": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet169": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet177": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet185": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet193": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet201": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet209": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet217": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet225": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet233": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet241": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet249": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet257": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet265": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet273": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet281": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet289": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet297": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet305": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet313": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet321": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet329": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet337": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet345": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet353": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet361": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet369": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet377": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet385": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet393": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet401": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet409": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet417": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet425": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet433": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet441": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet449": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet457": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet465": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet473": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet481": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet489": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet497": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet505": {
+ "default_brkout_mode": "1x400G"
+ }
+ }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
new file mode 100644
index 000000000000..d6bdd4bf54dc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
@@ -0,0 +1,65 @@
+# name lanes alias index speed
+Ethernet1 65,66,67,68,69,70,71,72 fourHundredGigE0/1 0 400000
+Ethernet9 69,70,71,72,73,74,75,76 fourHundredGigE0/2 1 400000
+Ethernet17 25,26,27,28,29,30,31,32 fourHundredGigE0/3 2 400000
+Ethernet25 21,22,23,24,25,26,27,28 fourHundredGigE0/4 3 400000
+Ethernet33 73,74,75,76,77,78,79,80 fourHundredGigE0/5 4 400000
+Ethernet41 77,78,79,80,81,82,83,84 fourHundredGigE0/6 5 400000
+Ethernet49 33,34,35,36,37,38,39,40 fourHundredGigE0/7 6 400000
+Ethernet57 29,30,31,32,33,34,35,36 fourHundredGigE0/8 7 400000
+Ethernet65 81,82,83,84,85,86,87,88 fourHundredGigE0/9 8 400000
+Ethernet73 85,86,87,88,89,90,91,92 fourHundredGigE0/10 9 400000
+Ethernet81 41,42,43,44,45,46,47,48 fourHundredGigE0/11 10 400000
+Ethernet89 37,38,39,40,41,42,43,44 fourHundredGigE0/12 11 400000
+Ethernet97 89,90,91,92,93,94,95,96 fourHundredGigE0/13 12 400000
+Ethernet105 93,94,95,96,97,98,99,100 fourHundredGigE0/14 13 400000
+Ethernet113 49,50,51,52,53,54,55,56 fourHundredGigE0/15 14 400000
+Ethernet121 45,46,47,48,49,50,51,52 fourHundredGigE0/16 15 400000
+Ethernet129 97,98,99,100,101,102,103,104 fourHundredGigE0/17 16 400000
+Ethernet137 101,102,103,104,105,106,107,108 fourHundredGigE0/18 17 400000
+Ethernet145 57,58,59,60,61,62,63,64 fourHundredGigE0/19 18 400000
+Ethernet153 53,54,55,56,57,58,59,60 fourHundredGigE0/20 19 400000
+Ethernet161 105,106,107,108,109,110,111,112 fourHundredGigE0/21 20 400000
+Ethernet169 109,110,111,112,113,114,115,116 fourHundredGigE0/22 21 400000
+Ethernet177 17,18,19,20,21,22,23,24 fourHundredGigE0/23 22 400000
+Ethernet185 61,62,63,64,65,66,67,68 fourHundredGigE0/24 23 400000
+Ethernet193 113,114,115,116,117,118,119,120 fourHundredGigE0/25 24 400000
+Ethernet201 117,118,119,120,121,122,123,124 fourHundredGigE0/26 25 400000
+Ethernet209 9,10,11,12,13,14,15,16 fourHundredGigE0/27 26 400000
+Ethernet217 13,14,15,16,17,18,19,20 fourHundredGigE0/28 27 400000
+Ethernet225 121,122,123,124,125,126,127,128 fourHundredGigE0/29 28 400000
+Ethernet233 125,126,127,128,129,130,131,132 fourHundredGigE0/30 29 400000
+Ethernet241 1,2,3,4,5,6,7,8 fourHundredGigE0/31 30 400000
+Ethernet249 5,6,7,8,9,10,11,12 fourHundredGigE0/32 31 400000
+Ethernet257 133,134,135,136,137,138,139,140 fourHundredGigE0/33 32 400000
+Ethernet265 129,130,131,132,133,134,135,136 fourHundredGigE0/34 33 400000
+Ethernet273 249,250,251,252,253,254,255,256 fourHundredGigE0/35 34 400000
+Ethernet281 253,254,255,256,257,258,259,260 fourHundredGigE0/36 35 400000
+Ethernet289 141,142,143,144,145,146,147,148 fourHundredGigE0/37 36 400000
+Ethernet297 137,138,139,140,141,142,143,144 fourHundredGigE0/38 37 400000
+Ethernet305 241,242,243,244,245,246,247,248 fourHundredGigE0/39 38 400000
+Ethernet313 245,246,247,248,249,250,251,252 fourHundredGigE0/40 39 400000
+Ethernet321 149,150,151,152,153,154,155,156 fourHundredGigE0/41 40 400000
+Ethernet329 145,146,147,148,149,150,151,152 fourHundredGigE0/42 41 400000
+Ethernet337 237,238,239,240,241,242,243,244 fourHundredGigE0/43 42 400000
+Ethernet345 197,198,199,200,201,202,203,204 fourHundredGigE0/44 43 400000
+Ethernet353 157,158,159,160,161,162,163,164 fourHundredGigE0/45 44 400000
+Ethernet361 153,154,155,156,157,158,159,160 fourHundredGigE0/46 45 400000
+Ethernet369 193,194,195,196,197,198,199,200 fourHundredGigE0/47 46 400000
+Ethernet377 205,206,207,208,209,210,211,212 fourHundredGigE0/48 47 400000
+Ethernet385 165,166,167,168,169,170,171,172 fourHundredGigE0/49 48 400000
+Ethernet393 161,162,163,164,165,166,167,168 fourHundredGigE0/50 49 400000
+Ethernet401 201,202,203,204,205,206,207,208 fourHundredGigE0/51 50 400000
+Ethernet409 213,214,215,216,217,218,219,220 fourHundredGigE0/52 51 400000
+Ethernet417 173,174,175,176,177,178,179,180 fourHundredGigE0/53 52 400000
+Ethernet425 169,170,171,172,173,174,175,176 fourHundredGigE0/54 53 400000
+Ethernet433 209,210,211,212,213,214,215,216 fourHundredGigE0/55 54 400000
+Ethernet441 221,222,223,224,225,226,227,228 fourHundredGigE0/56 55 400000
+Ethernet449 181,182,183,184,185,186,187,188 fourHundredGigE0/57 56 400000
+Ethernet457 177,178,179,180,181,182,183,184 fourHundredGigE0/58 57 400000
+Ethernet465 217,218,219,220,221,222,223,224 fourHundredGigE0/59 58 400000
+Ethernet473 229,230,231,232,233,234,235,236 fourHundredGigE0/60 59 400000
+Ethernet481 189,190,191,192,193,194,195,196 fourHundredGigE0/61 60 400000
+Ethernet489 185,186,187,188,189,190,191,192 fourHundredGigE0/62 61 400000
+Ethernet497 225,226,227,228,229,230,231,232 fourHundredGigE0/63 62 400000
+Ethernet505 233,234,235,236,237,238,239,240 fourHundredGigE0/64 63 400000
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile
new file mode 100644
index 000000000000..f5e660abcfd1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th4-m2-w6930-64qc-64x400G.config.yml
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
new file mode 100644
index 000000000000..d2b24e2cb1a4
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
@@ -0,0 +1,12951 @@
+---
+bcm_device:
+ 0:
+ global:
+ bcm_tunnel_term_compatible_mode: 1
+ vlan_flooding_l2mc_num_reserved: 2048
+ l3_alpm_template: 2
+ l3_alpm2_bnk_threshold: 100
+ svi_my_station_optimization: 1
+ sai_nbr_bcast_ifp_optimized: 2
+ uft_mode: 1
+ l3_enable: 1
+ l2_hitbit_enable: 0
+ pktio_mode: 1
+ warmboot_knet_shutdown_mode: 1
+ sai_pfc_defaults_disable: 1
+ sai_optimized_mmu: 1
+ sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+ sai_port_pmap_phy_lanes: 1
+...
+
+---
+device:
+ 0:
+ FP_CONFIG:
+ #FP_ING_OPERMODE: PIPE_UNIQUE
+ FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+
+---
+bcm_device:
+ 0:
+ port:
+ 68:
+ dport_map_port: 1
+ 69:
+ dport_map_port: 2
+ 70:
+ dport_map_port: 3
+ 71:
+ dport_map_port: 4
+ 72:
+ dport_map_port: 5
+ 73:
+ dport_map_port: 6
+ 74:
+ dport_map_port: 7
+ 75:
+ dport_map_port: 8
+ 25:
+ dport_map_port: 9
+ 26:
+ dport_map_port: 10
+ 27:
+ dport_map_port: 11
+ 28:
+ dport_map_port: 12
+ 21:
+ dport_map_port: 13
+ 22:
+ dport_map_port: 14
+ 23:
+ dport_map_port: 15
+ 24:
+ dport_map_port: 16
+ 76:
+ dport_map_port: 17
+ 77:
+ dport_map_port: 18
+ 78:
+ dport_map_port: 19
+ 79:
+ dport_map_port: 20
+ 80:
+ dport_map_port: 21
+ 81:
+ dport_map_port: 22
+ 82:
+ dport_map_port: 23
+ 83:
+ dport_map_port: 24
+ 34:
+ dport_map_port: 25
+ 35:
+ dport_map_port: 26
+ 36:
+ dport_map_port: 27
+ 37:
+ dport_map_port: 28
+ 29:
+ dport_map_port: 29
+ 30:
+ dport_map_port: 30
+ 31:
+ dport_map_port: 31
+ 32:
+ dport_map_port: 32
+ 85:
+ dport_map_port: 33
+ 86:
+ dport_map_port: 34
+ 87:
+ dport_map_port: 35
+ 88:
+ dport_map_port: 36
+ 89:
+ dport_map_port: 37
+ 90:
+ dport_map_port: 38
+ 91:
+ dport_map_port: 39
+ 92:
+ dport_map_port: 40
+ 42:
+ dport_map_port: 41
+ 43:
+ dport_map_port: 42
+ 44:
+ dport_map_port: 43
+ 45:
+ dport_map_port: 44
+ 38:
+ dport_map_port: 45
+ 39:
+ dport_map_port: 46
+ 40:
+ dport_map_port: 47
+ 41:
+ dport_map_port: 48
+ 93:
+ dport_map_port: 49
+ 94:
+ dport_map_port: 50
+ 95:
+ dport_map_port: 51
+ 96:
+ dport_map_port: 52
+ 97:
+ dport_map_port: 53
+ 98:
+ dport_map_port: 54
+ 99:
+ dport_map_port: 55
+ 100:
+ dport_map_port: 56
+ 51:
+ dport_map_port: 57
+ 52:
+ dport_map_port: 58
+ 53:
+ dport_map_port: 59
+ 54:
+ dport_map_port: 60
+ 46:
+ dport_map_port: 61
+ 47:
+ dport_map_port: 62
+ 48:
+ dport_map_port: 63
+ 49:
+ dport_map_port: 64
+ 102:
+ dport_map_port: 65
+ 103:
+ dport_map_port: 66
+ 104:
+ dport_map_port: 67
+ 105:
+ dport_map_port: 68
+ 106:
+ dport_map_port: 69
+ 107:
+ dport_map_port: 70
+ 108:
+ dport_map_port: 71
+ 109:
+ dport_map_port: 72
+ 59:
+ dport_map_port: 73
+ 60:
+ dport_map_port: 74
+ 61:
+ dport_map_port: 75
+ 62:
+ dport_map_port: 76
+ 55:
+ dport_map_port: 77
+ 56:
+ dport_map_port: 78
+ 57:
+ dport_map_port: 79
+ 58:
+ dport_map_port: 80
+ 110:
+ dport_map_port: 81
+ 111:
+ dport_map_port: 82
+ 112:
+ dport_map_port: 83
+ 113:
+ dport_map_port: 84
+ 114:
+ dport_map_port: 85
+ 115:
+ dport_map_port: 86
+ 116:
+ dport_map_port: 87
+ 117:
+ dport_map_port: 88
+ 17:
+ dport_map_port: 89
+ 18:
+ dport_map_port: 90
+ 19:
+ dport_map_port: 91
+ 20:
+ dport_map_port: 92
+ 63:
+ dport_map_port: 93
+ 64:
+ dport_map_port: 94
+ 65:
+ dport_map_port: 95
+ 66:
+ dport_map_port: 96
+ 119:
+ dport_map_port: 97
+ 120:
+ dport_map_port: 98
+ 121:
+ dport_map_port: 99
+ 122:
+ dport_map_port: 100
+ 123:
+ dport_map_port: 101
+ 124:
+ dport_map_port: 102
+ 125:
+ dport_map_port: 103
+ 126:
+ dport_map_port: 104
+ 9:
+ dport_map_port: 105
+ 10:
+ dport_map_port: 106
+ 11:
+ dport_map_port: 107
+ 12:
+ dport_map_port: 108
+ 13:
+ dport_map_port: 109
+ 14:
+ dport_map_port: 110
+ 15:
+ dport_map_port: 111
+ 16:
+ dport_map_port: 112
+ 127:
+ dport_map_port: 113
+ 128:
+ dport_map_port: 114
+ 129:
+ dport_map_port: 115
+ 130:
+ dport_map_port: 116
+ 131:
+ dport_map_port: 117
+ 132:
+ dport_map_port: 118
+ 133:
+ dport_map_port: 119
+ 134:
+ dport_map_port: 120
+ 1:
+ dport_map_port: 121
+ 2:
+ dport_map_port: 122
+ 3:
+ dport_map_port: 123
+ 4:
+ dport_map_port: 124
+ 5:
+ dport_map_port: 125
+ 6:
+ dport_map_port: 126
+ 7:
+ dport_map_port: 127
+ 8:
+ dport_map_port: 128
+ 140:
+ dport_map_port: 129
+ 141:
+ dport_map_port: 130
+ 142:
+ dport_map_port: 131
+ 143:
+ dport_map_port: 132
+ 136:
+ dport_map_port: 133
+ 137:
+ dport_map_port: 134
+ 138:
+ dport_map_port: 135
+ 139:
+ dport_map_port: 136
+ 263:
+ dport_map_port: 137
+ 264:
+ dport_map_port: 138
+ 265:
+ dport_map_port: 139
+ 266:
+ dport_map_port: 140
+ 267:
+ dport_map_port: 141
+ 268:
+ dport_map_port: 142
+ 269:
+ dport_map_port: 143
+ 270:
+ dport_map_port: 144
+ 148:
+ dport_map_port: 145
+ 149:
+ dport_map_port: 146
+ 150:
+ dport_map_port: 147
+ 151:
+ dport_map_port: 148
+ 144:
+ dport_map_port: 149
+ 145:
+ dport_map_port: 150
+ 146:
+ dport_map_port: 151
+ 147:
+ dport_map_port: 152
+ 255:
+ dport_map_port: 153
+ 256:
+ dport_map_port: 154
+ 257:
+ dport_map_port: 155
+ 258:
+ dport_map_port: 156
+ 259:
+ dport_map_port: 157
+ 260:
+ dport_map_port: 158
+ 261:
+ dport_map_port: 159
+ 262:
+ dport_map_port: 160
+ 157:
+ dport_map_port: 161
+ 158:
+ dport_map_port: 162
+ 159:
+ dport_map_port: 163
+ 160:
+ dport_map_port: 164
+ 153:
+ dport_map_port: 165
+ 154:
+ dport_map_port: 166
+ 155:
+ dport_map_port: 167
+ 156:
+ dport_map_port: 168
+ 250:
+ dport_map_port: 169
+ 251:
+ dport_map_port: 170
+ 252:
+ dport_map_port: 171
+ 253:
+ dport_map_port: 172
+ 208:
+ dport_map_port: 173
+ 209:
+ dport_map_port: 174
+ 210:
+ dport_map_port: 175
+ 211:
+ dport_map_port: 176
+ 165:
+ dport_map_port: 177
+ 166:
+ dport_map_port: 178
+ 167:
+ dport_map_port: 179
+ 168:
+ dport_map_port: 180
+ 161:
+ dport_map_port: 181
+ 162:
+ dport_map_port: 182
+ 163:
+ dport_map_port: 183
+ 164:
+ dport_map_port: 184
+ 204:
+ dport_map_port: 185
+ 205:
+ dport_map_port: 186
+ 206:
+ dport_map_port: 187
+ 207:
+ dport_map_port: 188
+ 216:
+ dport_map_port: 189
+ 217:
+ dport_map_port: 190
+ 218:
+ dport_map_port: 191
+ 219:
+ dport_map_port: 192
+ 174:
+ dport_map_port: 193
+ 175:
+ dport_map_port: 194
+ 176:
+ dport_map_port: 195
+ 177:
+ dport_map_port: 196
+ 170:
+ dport_map_port: 197
+ 171:
+ dport_map_port: 198
+ 172:
+ dport_map_port: 199
+ 173:
+ dport_map_port: 200
+ 212:
+ dport_map_port: 201
+ 213:
+ dport_map_port: 202
+ 214:
+ dport_map_port: 203
+ 215:
+ dport_map_port: 204
+ 225:
+ dport_map_port: 205
+ 226:
+ dport_map_port: 206
+ 227:
+ dport_map_port: 207
+ 228:
+ dport_map_port: 208
+ 182:
+ dport_map_port: 209
+ 183:
+ dport_map_port: 210
+ 184:
+ dport_map_port: 211
+ 185:
+ dport_map_port: 212
+ 178:
+ dport_map_port: 213
+ 179:
+ dport_map_port: 214
+ 180:
+ dport_map_port: 215
+ 181:
+ dport_map_port: 216
+ 221:
+ dport_map_port: 217
+ 222:
+ dport_map_port: 218
+ 223:
+ dport_map_port: 219
+ 224:
+ dport_map_port: 220
+ 233:
+ dport_map_port: 221
+ 234:
+ dport_map_port: 222
+ 235:
+ dport_map_port: 223
+ 236:
+ dport_map_port: 224
+ 191:
+ dport_map_port: 225
+ 192:
+ dport_map_port: 226
+ 193:
+ dport_map_port: 227
+ 194:
+ dport_map_port: 228
+ 187:
+ dport_map_port: 229
+ 188:
+ dport_map_port: 230
+ 189:
+ dport_map_port: 231
+ 190:
+ dport_map_port: 232
+ 229:
+ dport_map_port: 233
+ 230:
+ dport_map_port: 234
+ 231:
+ dport_map_port: 235
+ 232:
+ dport_map_port: 236
+ 242:
+ dport_map_port: 237
+ 243:
+ dport_map_port: 238
+ 244:
+ dport_map_port: 239
+ 245:
+ dport_map_port: 240
+ 199:
+ dport_map_port: 241
+ 200:
+ dport_map_port: 242
+ 201:
+ dport_map_port: 243
+ 202:
+ dport_map_port: 244
+ 195:
+ dport_map_port: 245
+ 196:
+ dport_map_port: 246
+ 197:
+ dport_map_port: 247
+ 198:
+ dport_map_port: 248
+ 238:
+ dport_map_port: 249
+ 239:
+ dport_map_port: 250
+ 240:
+ dport_map_port: 251
+ 241:
+ dport_map_port: 252
+ 246:
+ dport_map_port: 253
+ 247:
+ dport_map_port: 254
+ 248:
+ dport_map_port: 255
+ 249:
+ dport_map_port: 256
+...
+
+---
+device:
+ 0:
+ PORT_CONFIG:
+ PORT_SYSTEM_PROFILE_OPERMODE_PIPEUNIQUE: 1
+ PC_PM_CORE:
+ ?
+ PC_PM_ID: 1
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x65214703
+ TX_POLARITY_FLIP: 0x33
+ RX_LANE_MAP: 0x02463175
+ RX_POLARITY_FLIP: 0xc8
+
+ ?
+ PC_PM_ID: 2
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x13472065
+ TX_POLARITY_FLIP: 0x4c
+ RX_LANE_MAP: 0x13572064
+ RX_POLARITY_FLIP: 0xc8
+
+ ?
+ PC_PM_ID: 3
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x65214703
+ TX_POLARITY_FLIP: 0x33
+ RX_LANE_MAP: 0x02463175
+ RX_POLARITY_FLIP: 0xc8
+
+ ?
+ PC_PM_ID: 4
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57036421
+ TX_POLARITY_FLIP: 0x4c
+ RX_LANE_MAP: 0x20641357
+ RX_POLARITY_FLIP: 0x37
+
+ ?
+ PC_PM_ID: 5
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x16524307
+ TX_POLARITY_FLIP: 0x1b
+ RX_LANE_MAP: 0x03425617
+ RX_POLARITY_FLIP: 0x62
+
+ ?
+ PC_PM_ID: 6
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x12437560
+ TX_POLARITY_FLIP: 0x32
+ RX_LANE_MAP: 0x05243617
+ RX_POLARITY_FLIP: 0x37
+
+ ?
+ PC_PM_ID: 7
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x56204731
+ TX_POLARITY_FLIP: 0xaa
+ RX_LANE_MAP: 0x31642075
+ RX_POLARITY_FLIP: 0x26
+
+ ?
+ PC_PM_ID: 8
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23740165
+ TX_POLARITY_FLIP: 0xb3
+ RX_LANE_MAP: 0x46135702
+ RX_POLARITY_FLIP: 0x26
+
+ ?
+ PC_PM_ID: 9
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x56204731
+ TX_POLARITY_FLIP: 0xbb
+ RX_LANE_MAP: 0x31642075
+ RX_POLARITY_FLIP: 0xae
+
+ ?
+ PC_PM_ID: 10
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23740165
+ TX_POLARITY_FLIP: 0xae
+ RX_LANE_MAP: 0x26135704
+ RX_POLARITY_FLIP: 0xbf
+
+ ?
+ PC_PM_ID: 11
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x56204731
+ TX_POLARITY_FLIP: 0x33
+ RX_LANE_MAP: 0x31624075
+ RX_POLARITY_FLIP: 0xbf
+
+ ?
+ PC_PM_ID: 12
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23740165
+ TX_POLARITY_FLIP: 0xa2
+ RX_LANE_MAP: 0x46135702
+ RX_POLARITY_FLIP: 0xae
+
+ ?
+ PC_PM_ID: 13
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x56204731
+ TX_POLARITY_FLIP: 0xaa
+ RX_LANE_MAP: 0x31652074
+ RX_POLARITY_FLIP: 0x26
+ ?
+ PC_PM_ID: 14
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23740165
+ TX_POLARITY_FLIP: 0xb3
+ RX_LANE_MAP: 0x56234701
+ RX_POLARITY_FLIP: 0x26
+ ?
+ PC_PM_ID: 15
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x54260137
+ TX_POLARITY_FLIP: 0x40
+ RX_LANE_MAP: 0x56234701
+ RX_POLARITY_FLIP: 0x8e
+
+ ?
+ PC_PM_ID: 16
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23740165
+ TX_POLARITY_FLIP: 0x8f
+ RX_LANE_MAP: 0x43265107
+ RX_POLARITY_FLIP: 0x40
+ ?
+ PC_PM_ID: 17
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x50742361
+ TX_POLARITY_FLIP: 0xbb
+ RX_LANE_MAP: 0x43207651
+ RX_POLARITY_FLIP: 0x1b
+ ?
+ PC_PM_ID: 18
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76241530
+ TX_POLARITY_FLIP: 0x8e
+ RX_LANE_MAP: 0x21364075
+ RX_POLARITY_FLIP: 0xb
+ ?
+ PC_PM_ID: 19
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x50742361
+ TX_POLARITY_FLIP: 0x6a
+ RX_LANE_MAP: 0x62317540
+ RX_POLARITY_FLIP: 0xf9
+
+ ?
+ PC_PM_ID: 20
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76241530
+ TX_POLARITY_FLIP: 0xa2
+ RX_LANE_MAP: 0x53471026
+ RX_POLARITY_FLIP: 0xf3
+
+ ?
+ PC_PM_ID: 21
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x50742361
+ TX_POLARITY_FLIP: 0xfa
+ RX_LANE_MAP: 0x43206751
+ RX_POLARITY_FLIP: 0x7b
+
+ ?
+ PC_PM_ID: 22
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76241530
+ TX_POLARITY_FLIP: 0x9a
+ RX_LANE_MAP: 0x12364075
+ RX_POLARITY_FLIP: 0x12
+
+ ?
+ PC_PM_ID: 23
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x50742361
+ TX_POLARITY_FLIP: 0xbb
+ RX_LANE_MAP: 0x62317540
+ RX_POLARITY_FLIP: 0x9f
+
+ ?
+ PC_PM_ID: 24
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76241530
+ TX_POLARITY_FLIP: 0x2b
+ RX_LANE_MAP: 0x53471026
+ RX_POLARITY_FLIP: 0xb1
+
+ ?
+ PC_PM_ID: 25
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x27045361
+ TX_POLARITY_FLIP: 0xa
+ RX_LANE_MAP: 0x43206751
+ RX_POLARITY_FLIP: 0xf9
+
+ ?
+ PC_PM_ID: 26
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76241530
+ TX_POLARITY_FLIP: 0x87
+ RX_LANE_MAP: 0x21564073
+ RX_POLARITY_FLIP: 0xbb
+
+ ?
+ PC_PM_ID: 27
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x50742361
+ TX_POLARITY_FLIP: 0xb2
+ RX_LANE_MAP: 0x62317540
+ RX_POLARITY_FLIP: 0xff
+
+ ?
+ PC_PM_ID: 28
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76142503
+ TX_POLARITY_FLIP: 0xb1
+ RX_LANE_MAP: 0x53472016
+ RX_POLARITY_FLIP: 0x11
+
+ ?
+ PC_PM_ID: 29
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x63742051
+ TX_POLARITY_FLIP: 0xd4
+ RX_LANE_MAP: 0x70214653
+ RX_POLARITY_FLIP: 0x99
+
+ ?
+ PC_PM_ID: 30
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x02536174
+ TX_POLARITY_FLIP: 0x93
+ RX_LANE_MAP: 0x54730612
+ RX_POLARITY_FLIP: 0x4d
+
+ ?
+ PC_PM_ID: 31
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x27306415
+ TX_POLARITY_FLIP: 0xd4
+ RX_LANE_MAP: 0x61205347
+ RX_POLARITY_FLIP: 0xc2
+
+ ?
+ PC_PM_ID: 32
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x02536174
+ TX_POLARITY_FLIP: 0x93
+ RX_LANE_MAP: 0x27014653
+ RX_POLARITY_FLIP: 0xac
+ ?
+ PC_PM_ID: 33
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46172530
+ TX_POLARITY_FLIP: 0x17
+ RX_LANE_MAP: 0x01265347
+ RX_POLARITY_FLIP: 0x4d
+
+ ?
+ PC_PM_ID: 34
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x63742051
+ TX_POLARITY_FLIP: 0xd4
+ RX_LANE_MAP: 0x16472035
+ RX_POLARITY_FLIP: 0x66
+
+ ?
+ PC_PM_ID: 35
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x56172430
+ TX_POLARITY_FLIP: 0x36
+ RX_LANE_MAP: 0x23541706
+ RX_POLARITY_FLIP: 0x6c
+
+ ?
+ PC_PM_ID: 36
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x27306415
+ TX_POLARITY_FLIP: 0xd4
+ RX_LANE_MAP: 0x07463521
+ RX_POLARITY_FLIP: 0x39
+
+ ?
+ PC_PM_ID: 37
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14760325
+ TX_POLARITY_FLIP: 0x9e
+ RX_LANE_MAP: 0x47531620
+ RX_POLARITY_FLIP: 0xab
+
+ ?
+ PC_PM_ID: 38
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x05217634
+ TX_POLARITY_FLIP: 0xfa
+ RX_LANE_MAP: 0x25460137
+ RX_POLARITY_FLIP: 0xde
+
+ ?
+ PC_PM_ID: 39
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x24563017
+ TX_POLARITY_FLIP: 0xd3
+ RX_LANE_MAP: 0x35217640
+ RX_POLARITY_FLIP: 0x91
+
+ ?
+ PC_PM_ID: 40
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x05217634
+ TX_POLARITY_FLIP: 0xbb
+ RX_LANE_MAP: 0x04571326
+ RX_POLARITY_FLIP: 0x9f
+
+ ?
+ PC_PM_ID: 41
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x21743065
+ TX_POLARITY_FLIP: 0x33
+ RX_LANE_MAP: 0x47532610
+ RX_POLARITY_FLIP: 0x2b
+
+ ?
+ PC_PM_ID: 42
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x05217634
+ TX_POLARITY_FLIP: 0x22
+ RX_LANE_MAP: 0x25460137
+ RX_POLARITY_FLIP: 0x56
+
+ ?
+ PC_PM_ID: 43
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23714065
+ TX_POLARITY_FLIP: 0x87
+ RX_LANE_MAP: 0x35127640
+ RX_POLARITY_FLIP: 0x33
+
+ ?
+ PC_PM_ID: 44
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x05217634
+ TX_POLARITY_FLIP: 0xfa
+ RX_LANE_MAP: 0x04571326
+ RX_POLARITY_FLIP: 0xff
+
+ ?
+ PC_PM_ID: 45
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23714065
+ TX_POLARITY_FLIP: 0x3f
+ RX_LANE_MAP: 0x47532610
+ RX_POLARITY_FLIP: 0x33
+
+ ?
+ PC_PM_ID: 46
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x05217634
+ TX_POLARITY_FLIP: 0xf3
+ RX_LANE_MAP: 0x25460137
+ RX_POLARITY_FLIP: 0xb4
+
+ ?
+ PC_PM_ID: 47
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23714065
+ TX_POLARITY_FLIP: 0x8e
+ RX_LANE_MAP: 0x35217640
+ RX_POLARITY_FLIP: 0x71
+
+ ?
+ PC_PM_ID: 48
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x05217634
+ TX_POLARITY_FLIP: 0x6a
+ RX_LANE_MAP: 0x03561427
+ RX_POLARITY_FLIP: 0xf9
+
+ ?
+ PC_PM_ID: 49
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x13540267
+ TX_POLARITY_FLIP: 0x2b
+ RX_LANE_MAP: 0x10753264
+ RX_POLARITY_FLIP: 0x26
+
+ ?
+ PC_PM_ID: 50
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14706235
+ TX_POLARITY_FLIP: 0x62
+ RX_LANE_MAP: 0x56234701
+ RX_POLARITY_FLIP: 0x8f
+
+ ?
+ PC_PM_ID: 51
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x13740265
+ TX_POLARITY_FLIP: 0x33
+ RX_LANE_MAP: 0x56234701
+ RX_POLARITY_FLIP: 0x62
+
+ ?
+ PC_PM_ID: 52
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x56204731
+ TX_POLARITY_FLIP: 0xab
+ RX_LANE_MAP: 0x31652074
+ RX_POLARITY_FLIP: 0x26
+
+ ?
+ PC_PM_ID: 53
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x13740265
+ TX_POLARITY_FLIP: 0x22
+ RX_LANE_MAP: 0x46135702
+ RX_POLARITY_FLIP: 0xae
+
+ ?
+ PC_PM_ID: 54
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76204531
+ TX_POLARITY_FLIP: 0xb3
+ RX_LANE_MAP: 0x31624075
+ RX_POLARITY_FLIP: 0xbf
+
+ ?
+ PC_PM_ID: 55
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x13740265
+ TX_POLARITY_FLIP: 0xaa
+ RX_LANE_MAP: 0x26135704
+ RX_POLARITY_FLIP: 0xbf
+
+ ?
+ PC_PM_ID: 56
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76204531
+ TX_POLARITY_FLIP: 0xbf
+ RX_LANE_MAP: 0x31642075
+ RX_POLARITY_FLIP: 0xae
+
+ ?
+ PC_PM_ID: 57
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x13740265
+ TX_POLARITY_FLIP: 0x33
+ RX_LANE_MAP: 0x46135702
+ RX_POLARITY_FLIP: 0x26
+
+ ?
+ PC_PM_ID: 58
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76204531
+ TX_POLARITY_FLIP: 0xae
+ RX_LANE_MAP: 0x31642075
+ RX_POLARITY_FLIP: 0x26
+
+ ?
+ PC_PM_ID: 59
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46237015
+ TX_POLARITY_FLIP: 0xad
+ RX_LANE_MAP: 0x71634250
+ RX_POLARITY_FLIP: 0x37
+
+ ?
+ PC_PM_ID: 60
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x20347561
+ TX_POLARITY_FLIP: 0x27
+ RX_LANE_MAP: 0x04625137
+ RX_POLARITY_FLIP: 0x9d
+
+ ?
+ PC_PM_ID: 61
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x56127430
+ TX_POLARITY_FLIP: 0xcc
+ RX_LANE_MAP: 0x21650347
+ RX_POLARITY_FLIP: 0x37
+
+ ?
+ PC_PM_ID: 62
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x64305712
+ TX_POLARITY_FLIP: 0xb3
+ RX_LANE_MAP: 0x03472165
+ RX_POLARITY_FLIP: 0xc8
+
+ ?
+ PC_PM_ID: 63
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x12563074
+ TX_POLARITY_FLIP: 0xcc
+ RX_LANE_MAP: 0x12563074
+ RX_POLARITY_FLIP: 0xc8
+
+ ?
+ PC_PM_ID: 64
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x64305712
+ TX_POLARITY_FLIP: 0xb3
+ RX_LANE_MAP: 0x03472165
+ RX_POLARITY_FLIP: 0xc8
+
+...
+
+---
+device:
+ 0:
+ PC_PORT_PHYS_MAP:
+ ?
+ PORT_ID: 1
+ :
+ PC_PHYS_PORT_ID: 1
+ ?
+ PORT_ID: 5
+ :
+ PC_PHYS_PORT_ID: 5
+ ?
+ PORT_ID: 9
+ :
+ PC_PHYS_PORT_ID: 9
+ ?
+ PORT_ID: 13
+ :
+ PC_PHYS_PORT_ID: 13
+ ?
+ PORT_ID: 17
+ :
+ PC_PHYS_PORT_ID: 17
+ ?
+ PORT_ID: 21
+ :
+ PC_PHYS_PORT_ID: 21
+ ?
+ PORT_ID: 25
+ :
+ PC_PHYS_PORT_ID: 25
+ ?
+ PORT_ID: 29
+ :
+ PC_PHYS_PORT_ID: 29
+ ?
+ PORT_ID: 34
+ :
+ PC_PHYS_PORT_ID: 33
+ ?
+ PORT_ID: 38
+ :
+ PC_PHYS_PORT_ID: 37
+ ?
+ PORT_ID: 42
+ :
+ PC_PHYS_PORT_ID: 41
+ ?
+ PORT_ID: 46
+ :
+ PC_PHYS_PORT_ID: 45
+ ?
+ PORT_ID: 51
+ :
+ PC_PHYS_PORT_ID: 49
+ ?
+ PORT_ID: 55
+ :
+ PC_PHYS_PORT_ID: 53
+ ?
+ PORT_ID: 59
+ :
+ PC_PHYS_PORT_ID: 57
+ ?
+ PORT_ID: 63
+ :
+ PC_PHYS_PORT_ID: 61
+ ?
+ PORT_ID: 68
+ :
+ PC_PHYS_PORT_ID: 65
+ ?
+ PORT_ID: 72
+ :
+ PC_PHYS_PORT_ID: 69
+ ?
+ PORT_ID: 76
+ :
+ PC_PHYS_PORT_ID: 73
+ ?
+ PORT_ID: 80
+ :
+ PC_PHYS_PORT_ID: 77
+ ?
+ PORT_ID: 85
+ :
+ PC_PHYS_PORT_ID: 81
+ ?
+ PORT_ID: 89
+ :
+ PC_PHYS_PORT_ID: 85
+ ?
+ PORT_ID: 93
+ :
+ PC_PHYS_PORT_ID: 89
+ ?
+ PORT_ID: 97
+ :
+ PC_PHYS_PORT_ID: 93
+ ?
+ PORT_ID: 102
+ :
+ PC_PHYS_PORT_ID: 97
+ ?
+ PORT_ID: 106
+ :
+ PC_PHYS_PORT_ID: 101
+ ?
+ PORT_ID: 110
+ :
+ PC_PHYS_PORT_ID: 105
+ ?
+ PORT_ID: 114
+ :
+ PC_PHYS_PORT_ID: 109
+ ?
+ PORT_ID: 119
+ :
+ PC_PHYS_PORT_ID: 113
+ ?
+ PORT_ID: 123
+ :
+ PC_PHYS_PORT_ID: 117
+ ?
+ PORT_ID: 127
+ :
+ PC_PHYS_PORT_ID: 121
+ ?
+ PORT_ID: 131
+ :
+ PC_PHYS_PORT_ID: 125
+ ?
+ PORT_ID: 136
+ :
+ PC_PHYS_PORT_ID: 129
+ ?
+ PORT_ID: 140
+ :
+ PC_PHYS_PORT_ID: 133
+ ?
+ PORT_ID: 144
+ :
+ PC_PHYS_PORT_ID: 137
+ ?
+ PORT_ID: 148
+ :
+ PC_PHYS_PORT_ID: 141
+ ?
+ PORT_ID: 153
+ :
+ PC_PHYS_PORT_ID: 145
+ ?
+ PORT_ID: 157
+ :
+ PC_PHYS_PORT_ID: 149
+ ?
+ PORT_ID: 161
+ :
+ PC_PHYS_PORT_ID: 153
+ ?
+ PORT_ID: 165
+ :
+ PC_PHYS_PORT_ID: 157
+ ?
+ PORT_ID: 170
+ :
+ PC_PHYS_PORT_ID: 161
+ ?
+ PORT_ID: 174
+ :
+ PC_PHYS_PORT_ID: 165
+ ?
+ PORT_ID: 178
+ :
+ PC_PHYS_PORT_ID: 169
+ ?
+ PORT_ID: 182
+ :
+ PC_PHYS_PORT_ID: 173
+ ?
+ PORT_ID: 187
+ :
+ PC_PHYS_PORT_ID: 177
+ ?
+ PORT_ID: 191
+ :
+ PC_PHYS_PORT_ID: 181
+ ?
+ PORT_ID: 195
+ :
+ PC_PHYS_PORT_ID: 185
+ ?
+ PORT_ID: 199
+ :
+ PC_PHYS_PORT_ID: 189
+ ?
+ PORT_ID: 204
+ :
+ PC_PHYS_PORT_ID: 193
+ ?
+ PORT_ID: 208
+ :
+ PC_PHYS_PORT_ID: 197
+ ?
+ PORT_ID: 212
+ :
+ PC_PHYS_PORT_ID: 201
+ ?
+ PORT_ID: 216
+ :
+ PC_PHYS_PORT_ID: 205
+ ?
+ PORT_ID: 221
+ :
+ PC_PHYS_PORT_ID: 209
+ ?
+ PORT_ID: 225
+ :
+ PC_PHYS_PORT_ID: 213
+ ?
+ PORT_ID: 229
+ :
+ PC_PHYS_PORT_ID: 217
+ ?
+ PORT_ID: 233
+ :
+ PC_PHYS_PORT_ID: 221
+ ?
+ PORT_ID: 238
+ :
+ PC_PHYS_PORT_ID: 225
+ ?
+ PORT_ID: 242
+ :
+ PC_PHYS_PORT_ID: 229
+ ?
+ PORT_ID: 246
+ :
+ PC_PHYS_PORT_ID: 233
+ ?
+ PORT_ID: 250
+ :
+ PC_PHYS_PORT_ID: 237
+ ?
+ PORT_ID: 255
+ :
+ PC_PHYS_PORT_ID: 241
+ ?
+ PORT_ID: 259
+ :
+ PC_PHYS_PORT_ID: 245
+ ?
+ PORT_ID: 263
+ :
+ PC_PHYS_PORT_ID: 249
+ ?
+ PORT_ID: 267
+ :
+ PC_PHYS_PORT_ID: 253
+...
+
+---
+device:
+ 0:
+ PC_PORT:
+ ?
+ PORT_ID: [1, 5, 9, 13,
+ 17, 21, 25, 29,
+ 34, 38, 42, 46,
+ 51, 55, 59, 63,
+ 68, 72, 76, 80,
+ 85, 89, 93, 97,
+ 102, 106, 110, 114,
+ 119, 123, 127, 131,
+ 136, 140, 144, 148,
+ 153, 157, 161, 165,
+ 170, 174, 178, 182,
+ 187, 191, 195, 199,
+ 204, 208, 212, 216,
+ 221, 225, 229, 233,
+ 238, 242, 246, 250,
+ 255, 259, 263, 267]
+ :
+ ENABLE: 0
+ SPEED: 400000
+ NUM_LANES: 8
+ FEC_MODE: PC_FEC_RS544_2XN
+ MAX_FRAME_SIZE: 9416
+ LINK_TRAINING: 0
+...
+
+---
+device:
+ 0:
+ TM_SCHEDULER_CONFIG:
+ NUM_MC_Q: NUM_MC_Q_4
+
+...
+
+
+---
+device:
+ 0:
+ PC_TX_TAPS:
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 25
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 21
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 76
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 80
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 34
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 29
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 85
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 89
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 42
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 38
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 93
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 97
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 51
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 46
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 102
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 14
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 106
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 2
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 2
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 59
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 55
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 17
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 63
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 119
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 20
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 9
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 6
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 13
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 131
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 1
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 20
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 140
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 263
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 267
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 148
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 144
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 6
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 6
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 10
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 259
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 134
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 157
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 153
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 132
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 2
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 250
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 208
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 161
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 0
+ TX_POST_SIGN: 0
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 204
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 216
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 174
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 170
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 212
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 225
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 221
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 233
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 12
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 144
+ TX_POST: 2
+ TX_POST_SIGN: 1
+ TX_POST2: 0
+ TX_POST2_SIGN: 0
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 4
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 229
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 8
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 242
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 199
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 195
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 16
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 0
+ TX_POST3_SIGN: 0
+ TX_PRE: 8
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 12
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 238
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [0]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [1]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [2]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [3]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 140
+ TX_POST: 4
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [4]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [5]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [6]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 136
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 2
+ ?
+ PORT_ID: 246
+ LANE_INDEX: [7]
+ :
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TX_POST_AUTO: 0
+ TX_MAIN_AUTO: 0
+ TX_PRE_AUTO: 0
+ TX_PRE2_AUTO: 0
+ TX_POST2_AUTO: 0
+ TX_POST3_AUTO: 0
+ TX_AMP_AUTO: 0
+ TX_MAIN: 138
+ TX_POST: 8
+ TX_POST_SIGN: 1
+ TX_POST2: 4
+ TX_POST2_SIGN: 1
+ TX_POST3: 4
+ TX_POST3_SIGN: 1
+ TX_PRE: 16
+ TX_PRE_SIGN: 1
+ TX_PRE2: 0
+...
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin
new file mode 100644
index 000000000000..70920dd922cf
Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku b/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku
new file mode 100644
index 000000000000..1adddd2977c0
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku
@@ -0,0 +1 @@
+M2-W6930-64QC l2
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml
new file mode 100644
index 000000000000..5b1654e2bb90
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml
@@ -0,0 +1,562 @@
+
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+
+
+
+
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+ def __init__(self, message='fruerror', code=-100):
+ err = 'errcode: {0} message:{1}'.format(code, message)
+ Exception.__init__(self, err)
+ self.code = code
+ self.message = message
+
+
+def e_print(err):
+ print("ERROR: " + err)
+
+
+def d_print(debug_info):
+ if __DEBUG__ == "Y":
+ print(debug_info)
+
+
+class FruUtil():
+ @staticmethod
+ def decodeLength(value):
+ a = bitarray(8)
+ a.setall(True)
+ a[0:1] = 0
+ a[1:2] = 0
+ x = ord(a.tobytes())
+ return x & ord(value)
+
+ @staticmethod
+ def minToData():
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ endtime = datetime.now()
+ seconds = (endtime - starttime).total_seconds()
+ mins = seconds // 60
+ m = int(round(mins))
+ return m
+
+ @staticmethod
+ def getTimeFormat():
+ return datetime.now().strftime('%Y-%m-%d')
+
+ @staticmethod
+ def getTypeLength(value):
+ if value is None or len(value) == 0:
+ return 0
+ a = bitarray(8)
+ a.setall(False)
+ a[0:1] = 1
+ a[1:2] = 1
+ x = ord(a.tobytes())
+ return x | len(value)
+
+ @staticmethod
+ def checksum(b):
+ result = 0
+ for item in b:
+ result += ord(item)
+ return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+ SUGGESTED_SIZE_COMMON_HEADER = 8
+ SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+ SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+ SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+ SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+ INITVALUE = b'\x00'
+ resultvalue = INITVALUE * 256
+ COMMON_HEAD_VERSION = b'\x01'
+ __childList = None
+
+ def __init__(self, name="", size=0, offset=0):
+ self.__childList = []
+ self._offset = offset
+ self.name = name
+ self._size = size
+ self._isPresent = False
+ self._data = b'\x00' * size
+
+ @property
+ def childList(self):
+ return self.__childList
+
+ @childList.setter
+ def childList(self, value):
+ self.__childList = value
+
+ @property
+ def offset(self):
+ return self._offset
+
+ @offset.setter
+ def offset(self, value):
+ self._offset = value
+
+ @property
+ def size(self):
+ return self._size
+
+ @size.setter
+ def size(self, value):
+ self._size = value
+
+ @property
+ def data(self):
+ return self._data
+
+ @data.setter
+ def data(self, value):
+ self._data = value
+
+ @property
+ def isPresent(self):
+ return self._isPresent
+
+ @isPresent.setter
+ def isPresent(self, value):
+ self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+ pass
+
+
+class ChassisInfoArea(BaseArea):
+ pass
+
+
+class BoardInfoArea(BaseArea):
+ _boardTime = None
+ _fields = None
+ _mfg_date = None
+ areaversion = None
+ _boardversion = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "mfg_date : %s \n" \
+ "boardManufacturer : %s \n" \
+ "boardProductName : %s \n" \
+ "boardSerialNumber : %s \n" \
+ "boardPartNumber : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.boardversion), self.size,
+ self.language, self.getMfgRealData(),
+ self.boardManufacturer, self.boardProductName,
+ self.boardSerialNumber, self.boardPartNumber,
+ self.fruFileId)
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "boardextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["boardversion"] = ord(self.boardversion)
+ dic["boardlength"] = self.size
+ dic["boardlanguage"] = self.language
+ dic["boardmfg_date"] = self.getMfgRealData()
+ dic["boardManufacturer"] = self.boardManufacturer
+ dic["boardProductName"] = self.boardProductName
+ dic["boardSerialNumber"] = self.boardSerialNumber
+ dic["boardPartNumber"] = self.boardPartNumber
+ dic["boardfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index]
+ index += 1
+ d_print("decode length :%d class size:%d" %
+ ((ord(self.data[index]) * 8), self.size))
+ index += 2
+
+ timetmp = self.data[index: index + 3]
+ self.mfg_date = ord(timetmp[0]) | (
+ ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+ d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+ index += 3
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardProductName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardProductName:%s" % self.boardProductName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardPartNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if self.data[index] != chr(0xc1):
+ templen = FruUtil.decodeLength(self.data[index])
+ tmpval = self.data[index + 1: index + templen + 1]
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ else:
+ break
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("boardInfoArea version:%x" % ord(self.boardversion))
+ d_print("boardInfoArea length:%d" % self.size)
+ d_print("boardInfoArea language:%x" % self.language)
+ self.mfg_date = FruUtil.minToData()
+ d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+ self.data = chr(ord(self.boardversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ self.data += chr(self.mfg_date & 0xFF)
+ self.data += chr((self.mfg_date >> 8) & 0xFF)
+ self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+ d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+ typelength = FruUtil.getTypeLength(self.boardManufacturer)
+ self.data += chr(typelength)
+ self.data += self.boardManufacturer
+
+ d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+ self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+ self.data += self.boardProductName
+
+ d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+ self.data += self.boardSerialNumber
+
+ d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+ self.data += self.boardPartNumber
+
+ d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ d_print("self data:%d" % len(self.data))
+ d_print("self size:%d" % self.size)
+ d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+ # checksum
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+ def getMfgRealData(self):
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ mactime = starttime + timedelta(minutes=self.mfg_date)
+ return mactime
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def mfg_date(self):
+ return self._mfg_date
+
+ @mfg_date.setter
+ def mfg_date(self, val):
+ self._mfg_date = val
+
+ @property
+ def boardversion(self):
+ self._boardversion = self.COMMON_HEAD_VERSION
+ return self._boardversion
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, val):
+ self._FRUFileID = val
+
+ @property
+ def boardPartNumber(self):
+ return self._boardPartNumber
+
+ @boardPartNumber.setter
+ def boardPartNumber(self, val):
+ self._boardPartNumber = val
+
+ @property
+ def boardSerialNumber(self):
+ return self._boardSerialNumber
+
+ @boardSerialNumber.setter
+ def boardSerialNumber(self, val):
+ self._boardSerialNumber = val
+
+ @property
+ def boardProductName(self):
+ return self._boradProductName
+
+ @boardProductName.setter
+ def boardProductName(self, val):
+ self._boradProductName = val
+
+ @property
+ def boardManufacturer(self):
+ return self._boardManufacturer
+
+ @boardManufacturer.setter
+ def boardManufacturer(self, val):
+ self._boardManufacturer = val
+
+ @property
+ def boardTime(self):
+ return self._boardTime
+
+ @boardTime.setter
+ def boardTime(self, val):
+ self._boardTime = val
+
+ @property
+ def fields(self):
+ return self._fields
+
+ @fields.setter
+ def fields(self, val):
+ self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+ _productManufacturer = None
+ _productAssetTag = None
+ _FRUFileID = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "productManufacturer : %s \n" \
+ "productName : %s \n" \
+ "productPartModelName: %s \n" \
+ "productVersion : %s \n" \
+ "productSerialNumber : %s \n" \
+ "productAssetTag : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.areaversion), self.size,
+ self.language, self.productManufacturer,
+ self.productName, self.productPartModelName,
+ self.productVersion, self.productSerialNumber,
+ self.productAssetTag, self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "productextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["productversion"] = ord(self.areaversion)
+ dic["productlength"] = self.size
+ dic["productlanguage"] = self.language
+ dic["productManufacturer"] = self.productManufacturer
+ dic["productName"] = self.productName
+ dic["productPartModelName"] = self.productPartModelName
+ dic["productVersion"] = int(self.productVersion, 16)
+ dic["productSerialNumber"] = self.productSerialNumber
+ dic["productAssetTag"] = self.productAssetTag
+ dic["productfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index] # 0
+ index += 1
+ d_print("decode length %d" % (ord(self.data[index]) * 8))
+ d_print("class size %d" % self.size)
+ index += 2
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productName:%s" % self.productName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productPartModelName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productVersion = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productVersion:%s" % self.productVersion)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productAssetTag = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if self.data[index] != chr(0xc1) and index < self.size - 1:
+ templen = FruUtil.decodeLength(self.data[index])
+ if templen == 0:
+ break
+ tmpval = self.data[index + 1: index + templen + 1]
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ else:
+ break
+
+ @property
+ def productVersion(self):
+ return self._productVersion
+
+ @productVersion.setter
+ def productVersion(self, name):
+ self._productVersion = name
+
+ @property
+ def areaversion(self):
+ self._areaversion = self.COMMON_HEAD_VERSION
+ return self._areaversion
+
+ @areaversion.setter
+ def areaversion(self, name):
+ self._areaversion = name
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def productManufacturer(self):
+ return self._productManufacturer
+
+ @productManufacturer.setter
+ def productManufacturer(self, name):
+ self._productManufacturer = name
+
+ @property
+ def productName(self):
+ return self._productName
+
+ @productName.setter
+ def productName(self, name):
+ self._productName = name
+
+ @property
+ def productPartModelName(self):
+ return self._productPartModelName
+
+ @productPartModelName.setter
+ def productPartModelName(self, name):
+ self._productPartModelName = name
+
+ @property
+ def productSerialNumber(self):
+ return self._productSerialNumber
+
+ @productSerialNumber.setter
+ def productSerialNumber(self, name):
+ self._productSerialNumber = name
+
+ @property
+ def productAssetTag(self):
+ return self._productAssetTag
+
+ @productAssetTag.setter
+ def productAssetTag(self, name):
+ self._productAssetTag = name
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, name):
+ self._FRUFileID = name
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("product version:%x" % ord(self.areaversion))
+ d_print("product length:%d" % self.size)
+ d_print("product language:%x" % self.language)
+ self.data = chr(ord(self.areaversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ typelength = FruUtil.getTypeLength(self.productManufacturer)
+ self.data += chr(typelength)
+ self.data += self.productManufacturer
+
+ self.data += chr(FruUtil.getTypeLength(self.productName))
+ self.data += self.productName
+
+ self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+ self.data += self.productPartModelName
+
+ self.data += chr(FruUtil.getTypeLength(self.productVersion))
+ self.data += self.productVersion
+
+ self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+ self.data += self.productSerialNumber
+
+ self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+ if self.productAssetTag is not None:
+ self.data += self.productAssetTag
+
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+ d_print("self.data:%d" % len(self.data))
+ d_print("self.size:%d" % self.size)
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+ pass
+
+
+class Field(object):
+
+ def __init__(self, fieldType="ASCII", fieldData=""):
+ self.fieldData = fieldData
+ self.fieldType = fieldType
+
+ @property
+ def fieldType(self):
+ return self.fieldType
+
+ @property
+ def fieldData(self):
+ return self.fieldData
+
+
+class ipmifru(BaseArea):
+ _BoardInfoArea = None
+ _ProductInfoArea = None
+ _InternalUseArea = None
+ _ChassisInfoArea = None
+ _multiRecordArea = None
+ _productinfoAreaOffset = BaseArea.INITVALUE
+ _boardInfoAreaOffset = BaseArea.INITVALUE
+ _internalUserAreaOffset = BaseArea.INITVALUE
+ _chassicInfoAreaOffset = BaseArea.INITVALUE
+ _multiRecordAreaOffset = BaseArea.INITVALUE
+ _bindata = None
+ _bodybin = None
+ _version = BaseArea.COMMON_HEAD_VERSION
+ _zeroCheckSum = None
+ _frusize = 256
+
+ def __str__(self):
+ tmpstr = ""
+ if self.boardInfoArea.isPresent:
+ tmpstr += "\nboardinfoarea: \n"
+ tmpstr += self.boardInfoArea.__str__()
+ if self.productInfoArea.isPresent:
+ tmpstr += "\nproductinfoarea: \n"
+ tmpstr += self.productInfoArea.__str__()
+ return tmpstr
+
+ def decodeBin(self, eeprom):
+ commonHead = eeprom[0:8]
+ d_print("decode version %x" % ord(commonHead[0]))
+ if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+ raise FruException("HEAD VERSION error,not Fru format!", -10)
+ if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+ strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+ raise FruException(strtemp, -3)
+ if ord(commonHead[1]) != ord(self.INITVALUE):
+ d_print("Internal Use Area is present")
+ self.internalUseArea = InternalUseArea(
+ name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+ self.internalUseArea.isPresent = True
+ self.internalUserAreaOffset = ord(commonHead[1])
+ self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+ self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+ if ord(commonHead[2]) != ord(self.INITVALUE):
+ d_print("Chassis Info Area is present")
+ self.chassisInfoArea = ChassisInfoArea(
+ name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+ self.chassisInfoArea.isPresent = True
+ self.chassicInfoAreaOffset = ord(commonHead[2])
+ self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+ self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+ if ord(commonHead[3]) != ord(self.INITVALUE):
+ self.boardInfoArea = BoardInfoArea(
+ name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+ self.boardInfoArea.isPresent = True
+ self.boardInfoAreaOffset = ord(commonHead[3])
+ self.boardInfoArea.size = ord(
+ eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+ d_print("Board Info Area is present size:%d" %
+ (self.boardInfoArea.size))
+ self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+ self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+ if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+ strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \
+ (FruUtil.checksum(
+ self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.boardInfoArea.decodedata()
+ if ord(commonHead[4]) != ord(self.INITVALUE):
+ d_print("Product Info Area is present")
+ self.productInfoArea = ProductInfoArea(
+ name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+ self.productInfoArea.isPresent = True
+ self.productinfoAreaOffset = ord(commonHead[4])
+ d_print("length offset value: %02x" %
+ ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+ self.productInfoArea.size = ord(
+ eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+ d_print("Product Info Area is present size:%d" %
+ (self.productInfoArea.size))
+
+ self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+ self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+ if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+ strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.productInfoArea.decodedata()
+ if ord(commonHead[5]) != ord(self.INITVALUE):
+ self.multiRecordArea = MultiRecordArea(
+ name="MultiRecord record Area ")
+ d_print("MultiRecord record present")
+ self.multiRecordArea.isPresent = True
+ self.multiRecordAreaOffset = ord(commonHead[5])
+ self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+ self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+ def initDefault(self):
+ self.version = self.COMMON_HEAD_VERSION
+ self.internalUserAreaOffset = self.INITVALUE
+ self.chassicInfoAreaOffset = self.INITVALUE
+ self.boardInfoAreaOffset = self.INITVALUE
+ self.productinfoAreaOffset = self.INITVALUE
+ self.multiRecordAreaOffset = self.INITVALUE
+ self.zeroCheckSum = self.INITVALUE
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ self.productInfoArea = None
+ self.internalUseArea = None
+ self.boardInfoArea = None
+ self.chassisInfoArea = None
+ self.multiRecordArea = None
+ # self.recalcute()
+
+ @property
+ def version(self):
+ return self._version
+
+ @version.setter
+ def version(self, name):
+ self._version = name
+
+ @property
+ def internalUserAreaOffset(self):
+ return self._internalUserAreaOffset
+
+ @internalUserAreaOffset.setter
+ def internalUserAreaOffset(self, obj):
+ self._internalUserAreaOffset = obj
+
+ @property
+ def chassicInfoAreaOffset(self):
+ return self._chassicInfoAreaOffset
+
+ @chassicInfoAreaOffset.setter
+ def chassicInfoAreaOffset(self, obj):
+ self._chassicInfoAreaOffset = obj
+
+ @property
+ def productinfoAreaOffset(self):
+ return self._productinfoAreaOffset
+
+ @productinfoAreaOffset.setter
+ def productinfoAreaOffset(self, obj):
+ self._productinfoAreaOffset = obj
+
+ @property
+ def boardInfoAreaOffset(self):
+ return self._boardInfoAreaOffset
+
+ @boardInfoAreaOffset.setter
+ def boardInfoAreaOffset(self, obj):
+ self._boardInfoAreaOffset = obj
+
+ @property
+ def multiRecordAreaOffset(self):
+ return self._multiRecordAreaOffset
+
+ @multiRecordAreaOffset.setter
+ def multiRecordAreaOffset(self, obj):
+ self._multiRecordAreaOffset = obj
+
+ @property
+ def zeroCheckSum(self):
+ return self._zeroCheckSum
+
+ @zeroCheckSum.setter
+ def zeroCheckSum(self, obj):
+ self._zeroCheckSum = obj
+
+ @property
+ def productInfoArea(self):
+ return self._ProductInfoArea
+
+ @productInfoArea.setter
+ def productInfoArea(self, obj):
+ self._ProductInfoArea = obj
+
+ @property
+ def internalUseArea(self):
+ return self._InternalUseArea
+
+ @internalUseArea.setter
+ def internalUseArea(self, obj):
+ self.internalUseArea = obj
+
+ @property
+ def boardInfoArea(self):
+ return self._BoardInfoArea
+
+ @boardInfoArea.setter
+ def boardInfoArea(self, obj):
+ self._BoardInfoArea = obj
+
+ @property
+ def chassisInfoArea(self):
+ return self._ChassisInfoArea
+
+ @chassisInfoArea.setter
+ def chassisInfoArea(self, obj):
+ self._ChassisInfoArea = obj
+
+ @property
+ def multiRecordArea(self):
+ return self._multiRecordArea
+
+ @multiRecordArea.setter
+ def multiRecordArea(self, obj):
+ self._multiRecordArea = obj
+
+ @property
+ def bindata(self):
+ return self._bindata
+
+ @bindata.setter
+ def bindata(self, obj):
+ self._bindata = obj
+
+ @property
+ def bodybin(self):
+ return self._bodybin
+
+ @bodybin.setter
+ def bodybin(self, obj):
+ self._bodybin = obj
+
+ def recalcuteCommonHead(self):
+ self.bindata = ""
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ d_print("common Header %d" % self.offset)
+ d_print("fru eeprom size %d" % self._frusize)
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ self.internalUserAreaOffset = self.offset // 8
+ self.offset += self.internalUseArea.size
+ d_print("internalUseArea is present offset:%d" % self.offset)
+
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ self.chassicInfoAreaOffset = self.offset // 8
+ self.offset += self.chassisInfoArea.size
+ d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ self.boardInfoAreaOffset = self.offset // 8
+ self.offset += self.boardInfoArea.size
+ d_print("boardInfoArea is present offset:%d" % self.offset)
+ d_print("boardInfoArea is present size:%d" %
+ self.boardInfoArea.size)
+
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ self.productinfoAreaOffset = self.offset // 8
+ self.offset += self.productInfoArea.size
+ d_print("productInfoArea is present offset:%d" % self.offset)
+
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ self.multiRecordAreaOffset = self.offset // 8
+ d_print("multiRecordArea is present offset:%d" % self.offset)
+
+ if self.internalUserAreaOffset == self.INITVALUE:
+ self.internalUserAreaOffset = 0
+ if self.productinfoAreaOffset == self.INITVALUE:
+ self.productinfoAreaOffset = 0
+ if self.chassicInfoAreaOffset == self.INITVALUE:
+ self.chassicInfoAreaOffset = 0
+ if self.boardInfoAreaOffset == self.INITVALUE:
+ self.boardInfoAreaOffset = 0
+ if self.multiRecordAreaOffset == self.INITVALUE:
+ self.multiRecordAreaOffset = 0
+
+ self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+ - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+ d_print("zerochecksum:%x" % self.zeroCheckSum)
+ self.data = ""
+ self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+ self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+ self.bindata = self.data + self.bodybin
+ totallen = len(self.bindata)
+ d_print("totallen %d" % totallen)
+ if totallen < self._frusize:
+ self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+ else:
+ raise FruException('bin data more than %d' % self._frusize, -2)
+
+ def recalcutebin(self):
+ self.bodybin = ""
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ d_print("internalUseArea present")
+ self.bodybin += self.internalUseArea.data
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ d_print("chassisInfoArea present")
+ self.bodybin += self.chassisInfoArea.data
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ d_print("boardInfoArea present")
+ self.boardInfoArea.recalcute()
+ self.bodybin += self.boardInfoArea.data
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ d_print("productInfoAreapresent")
+ self.productInfoArea.recalcute()
+ self.bodybin += self.productInfoArea.data
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ d_print("multiRecordArea present")
+ self.bodybin += self.productInfoArea.data
+
+ def recalcute(self, fru_eeprom_size=256):
+ self._frusize = fru_eeprom_size
+ self.recalcutebin()
+ self.recalcuteCommonHead()
+
+ def setValue(self, area, field, value):
+ tmp_area = getattr(self, area, None)
+ if tmp_area is not None:
+ tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
new file mode 100644
index 000000000000..7a9fec8cc99c
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
@@ -0,0 +1,2 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json
new file mode 100644
index 000000000000..ae086bd70d54
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json
@@ -0,0 +1,4100 @@
+{
+ "PORT_MEDIA_SETTINGS": {
+ "0": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000090",
+ "lane2": "0x00000090",
+ "lane3": "0x00000090",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "1": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000090",
+ "lane2": "0x00000090",
+ "lane3": "0x00000090",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff4",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "2": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000002",
+ "lane2": "0x00000002",
+ "lane3": "0x00000002",
+ "lane4": "0x00000002",
+ "lane5": "0x00000002",
+ "lane6": "0x00000000",
+ "lane7": "0x00000002"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000084",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000084",
+ "lane5": "0x00000084",
+ "lane6": "0x00000084",
+ "lane7": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff4",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff4",
+ "lane6": "0xfffffff4",
+ "lane7": "0xfffffff4"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "3": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000002",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000002",
+ "lane5": "0x00000002",
+ "lane6": "0x00000002",
+ "lane7": "0x00000002"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x0000008C",
+ "lane2": "0x00000088",
+ "lane3": "0x0000008C",
+ "lane4": "0x00000084",
+ "lane5": "0x00000088",
+ "lane6": "0x00000084",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff4",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "4": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000090",
+ "lane2": "0x00000090",
+ "lane3": "0x00000090",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff4",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "5": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000090",
+ "lane2": "0x00000090",
+ "lane3": "0x00000090",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "6": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000002",
+ "lane2": "0x00000002",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000002",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff4",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff4"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x00000088",
+ "lane2": "0x0000008C",
+ "lane3": "0x0000008C",
+ "lane4": "0x0000008C",
+ "lane5": "0x0000008C",
+ "lane6": "0x00000088",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffff6",
+ "lane5": "0xfffffff6",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff6"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "7": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000002",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000002"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff4",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff4",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x0000008C",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff6",
+ "lane5": "0xfffffff6",
+ "lane6": "0xfffffff6",
+ "lane7": "0xfffffffc"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "8": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x00000090",
+ "lane1": "0x00000090",
+ "lane2": "0x00000090",
+ "lane3": "0x00000090",
+ "lane4": "0x00000090",
+ "lane5": "0x00000090",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff4",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
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+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000002",
+ "lane2": "0x00000002",
+ "lane3": "0x00000002",
+ "lane4": "0x00000002",
+ "lane5": "0x00000002",
+ "lane6": "0x00000002",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008C",
+ "lane2": "0x0000008A",
+ "lane3": "0x0000008C",
+ "lane4": "0x00000088",
+ "lane5": "0x0000008C",
+ "lane6": "0x0000008C",
+ "lane7": "0x0000008A"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "56": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008C",
+ "lane2": "0x0000008C",
+ "lane3": "0x0000008C",
+ "lane4": "0x0000008C",
+ "lane5": "0x0000008C",
+ "lane6": "0x0000008C",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff4",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "57": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000002",
+ "lane4": "0x00000000",
+ "lane5": "0x00000002",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff4",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffffc"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008C",
+ "lane2": "0x0000008C",
+ "lane3": "0x0000008C",
+ "lane4": "0x00000088",
+ "lane5": "0x0000008C",
+ "lane6": "0x00000090",
+ "lane7": "0x00000090"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff4",
+ "lane7": "0xfffffffe"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "58": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000002",
+ "lane2": "0x00000000",
+ "lane3": "0x00000002",
+ "lane4": "0x00000002",
+ "lane5": "0x00000002",
+ "lane6": "0x00000002",
+ "lane7": "0x00000002"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008C",
+ "lane2": "0x00000088",
+ "lane3": "0x0000008C",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "59": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000000",
+ "lane2": "0x00000002",
+ "lane3": "0x00000000",
+ "lane4": "0x00000002",
+ "lane5": "0x00000002",
+ "lane6": "0x00000002",
+ "lane7": "0x00000002"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff4",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x0000008C",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "60": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008C",
+ "lane2": "0x0000008C",
+ "lane3": "0x0000008C",
+ "lane4": "0x0000008C",
+ "lane5": "0x0000008C",
+ "lane6": "0x0000008C",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "61": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000002",
+ "lane5": "0x00000002",
+ "lane6": "0x00000002",
+ "lane7": "0x00000002"
+ },
+ "pre1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008C",
+ "lane2": "0x0000008C",
+ "lane3": "0x0000008C",
+ "lane4": "0x0000008C",
+ "lane5": "0x0000008C",
+ "lane6": "0x0000008C",
+ "lane7": "0x0000008C"
+ },
+ "post1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "62": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000002",
+ "lane2": "0x00000002",
+ "lane3": "0x00000002",
+ "lane4": "0x00000002",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000002"
+ },
+ "pre1": {
+ "lane0": "0xfffffff4",
+ "lane1": "0xfffffff4",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff4",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0xfffffff8",
+ "lane1": "0xfffffff8",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffff8",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ },
+ "63": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000002",
+ "lane1": "0x00000000",
+ "lane2": "0x00000002",
+ "lane3": "0x00000002",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000002",
+ "lane7": "0x00000000"
+ },
+ "pre1": {
+ "lane0": "0xfffffff0",
+ "lane1": "0xfffffff0",
+ "lane2": "0xfffffff0",
+ "lane3": "0xfffffff0",
+ "lane4": "0xfffffff0",
+ "lane5": "0xfffffff0",
+ "lane6": "0xfffffff0",
+ "lane7": "0xfffffff0"
+ },
+ "main": {
+ "lane0": "0x0000008C",
+ "lane1": "0x0000008A",
+ "lane2": "0x00000088",
+ "lane3": "0x0000008C",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x0000008A"
+ },
+ "post1": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffff8",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffff8",
+ "lane5": "0xfffffff8",
+ "lane6": "0xfffffff8",
+ "lane7": "0xfffffff8"
+ },
+ "post2": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ },
+ "post3": {
+ "lane0": "0xfffffffc",
+ "lane1": "0xfffffffc",
+ "lane2": "0xfffffffc",
+ "lane3": "0xfffffffc",
+ "lane4": "0xfffffffc",
+ "lane5": "0xfffffffc",
+ "lane6": "0xfffffffc",
+ "lane7": "0xfffffffc"
+ }
+ }
+ }
+ }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py
new file mode 100644
index 000000000000..5fc287892e50
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+# * onboard temperature sensors
+# * FAN trays
+# * PSU
+#
+import os
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+ strtmp = ''
+ for value in val:
+ strtmp += chr(value)
+ return strtmp
+
+
+def typeTostr(val):
+ if isinstance(val, bytes):
+ strtmp = byteTostr(val)
+ return strtmp
+ return val
+
+
+def get_board_id():
+ if not os.path.exists(BOARD_ID_PATH):
+ return "NA"
+ with open(BOARD_ID_PATH) as fd:
+ id_str = fd.read().strip()
+ return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+ if not os.path.exists(BOARD_AIRFLOW_PATH):
+ return "NA"
+ with open(BOARD_AIRFLOW_PATH) as fd:
+ airflow_str = fd.read().strip()
+ data = json.loads(airflow_str)
+ airflow = data.get("board", "NA")
+ return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+ "dev_" + boardid + "_" + boardairflow + ".xml",
+ "dev_" + boardid + ".xml",
+ "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+ retval = "ERR"
+ val_list = []
+ msg = ""
+ ret = ""
+ fd = -1
+
+ if not os.path.exists(path):
+ return False, "%s %s not found" % (retval, path)
+
+ try:
+ fd = os.open(path, os.O_RDONLY)
+ os.lseek(fd, offset, os.SEEK_SET)
+ ret = os.read(fd, read_len)
+ for item in ret:
+ val_list.append(item)
+ except Exception as e:
+ msg = str(e)
+ return False, "%s %s" % (retval, msg)
+ finally:
+ if fd > 0:
+ os.close(fd)
+ return True, val_list
+
+
+def getPMCreg(location):
+ retval = 'ERR'
+ if not os.path.isfile(location):
+ return "%s %s notfound" % (retval, location)
+ try:
+ with open(location, 'r') as fd:
+ retval = fd.read()
+ except Exception as error:
+ return "ERR %s" % str(error)
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+ retval = 'ERR'
+ mb_reg_file = reg_name
+ filepath = glob.glob(mb_reg_file)
+ if len(filepath) == 0:
+ return "%s %s notfound" % (retval, mb_reg_file)
+ mb_reg_file = filepath[0]
+ if not os.path.isfile(mb_reg_file):
+ # print mb_reg_file, 'not found !'
+ return "%s %s notfound" % (retval, mb_reg_file)
+ try:
+ with open(mb_reg_file, 'rb') as fd:
+ retval = fd.read()
+ retval = typeTostr(retval)
+ except Exception as error:
+ retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+class checktype():
+ def __init__(self, test1):
+ self.test1 = test1
+
+ @staticmethod
+ def getValue(location, bit, data_type, coefficient=1, addend=0):
+ try:
+ value_t = get_pmc_register(location)
+ if value_t.startswith("ERR") or value_t.startswith("NA"):
+ return value_t
+ if data_type == 1:
+ return float('%.1f' % ((float(value_t) / 1000) + addend))
+ if data_type == 2:
+ return float('%.1f' % (float(value_t) / 100))
+ if data_type == 3:
+ psu_status = int(value_t, 16)
+ return (psu_status & (1 << bit)) >> bit
+ if data_type == 4:
+ return int(value_t, 10)
+ if data_type == 5:
+ return float('%.1f' % (float(value_t) / 1000 / 1000))
+ if data_type == 6:
+ return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+ return value_t
+ except Exception as e:
+ value_t = "ERR %s" % str(e)
+ return value_t
+
+ # fanFRU
+ @staticmethod
+ def decodeBinByValue(retval):
+ fru = ipmifru()
+ fru.decodeBin(retval)
+ return fru
+
+ @staticmethod
+ def getfruValue(prob_t, root, val):
+ try:
+ ret, binval_bytes = dev_file_read(val, 0, 256)
+ if ret is False:
+ return binval_bytes
+ binval = byteTostr(binval_bytes)
+ fanpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ fanpro['fan_type'] = ret.productInfoArea.productName
+ fanpro['hw_version'] = ret.productInfoArea.productVersion
+ fanpro['sn'] = ret.productInfoArea.productSerialNumber
+ fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+ fan_name = fanpro['fan_type'].strip()
+ if len(fan_display_name_dict) == 0:
+ return fanpro
+ if fan_name not in fan_display_name_dict:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+ else:
+ fanpro['fan_type'] = fan_display_name_dict[fan_name]
+ return fanpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getslotfruValue(val):
+ try:
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ slotpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+ slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+ slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+ return slotpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getpsufruValue(prob_t, root, val):
+ try:
+ psu_match = False
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ psupro = {}
+ ret = checktype.decodeBinByValue(binval)
+ psupro['type1'] = ret.productInfoArea.productPartModelName
+ psupro['sn'] = ret.productInfoArea.productSerialNumber
+ psupro['hw_version'] = ret.productInfoArea.productVersion
+ psu_dict = status.getDecodValue(root, "psutype")
+ psupro['type1'] = psupro['type1'].strip()
+ if len(psu_dict) == 0:
+ return psupro
+ for psu_name, display_name in psu_dict.items():
+ if psu_name.strip() == psupro['type1']:
+ psupro['type1'] = display_name
+ psu_match = True
+ break
+ if psu_match is not True:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+ return psupro
+ except Exception as error:
+ return "ERR " + str(error)
+
+
+class status():
+ def __init__(self, productname):
+ self.productname = productname
+
+ @staticmethod
+ def getETroot(filename):
+ tree = ET.parse(filename)
+ root = tree.getroot()
+ return root
+
+ @staticmethod
+ def getDecodValue(collection, decode):
+ decodes = collection.find('decode')
+ testdecode = decodes.find(decode)
+ test = {}
+ if testdecode is None:
+ return test
+ for neighbor in testdecode.iter('code'):
+ test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+ return test
+
+ @staticmethod
+ def getfileValue(location):
+ return checktype.getValue(location, " ", " ")
+
+ @staticmethod
+ def getETValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ prob_t = {}
+ prob_t.update(neighbor.attrib)
+ prob_t['errcode'] = 0
+ prob_t['errmsg'] = ''
+ for pros in neighbor.iter("property"):
+ ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+ if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+ fruval = checktype.getfruValue(prob_t, root, ret["location"])
+ if isinstance(fruval, str) and fruval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = fruval
+ break
+ prob_t.update(fruval)
+ continue
+
+ if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+ psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+ if isinstance(psuval, str) and psuval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = psuval
+ break
+ prob_t.update(psuval)
+ continue
+
+ if ret.get("gettype") == "config":
+ prob_t[ret["name"]] = ret["value"]
+ continue
+
+ if 'type' not in ret.keys():
+ val = "0"
+ else:
+ val = ret["type"]
+ if 'bit' not in ret.keys():
+ bit = "0"
+ else:
+ bit = ret["bit"]
+ if 'coefficient' not in ret.keys():
+ coefficient = 1
+ else:
+ coefficient = float(ret["coefficient"])
+ if 'addend' not in ret.keys():
+ addend = 0
+ else:
+ addend = float(ret["addend"])
+
+ s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+ if isinstance(s, str) and s.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = s
+ break
+ if 'default' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ prob_t['errmsg'] = rt[str(s)]
+ if str(s) != ret["default"]:
+ prob_t['errcode'] = -1
+ break
+ else:
+ if 'decode' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+ (s.replace("\x00", "").rstrip()))
+ else:
+ s = rt[str(s).replace("\x00", "").rstrip()]
+ name = ret["name"]
+ prob_t[name] = str(s)
+ a.append(prob_t)
+
+ @staticmethod
+ def getCPUValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ location = neighbor.attrib["location"]
+ L = []
+ for dirpath, dirnames, filenames in os.walk(location):
+ for file in filenames:
+ if file.endswith("input"):
+ L.append(os.path.join(dirpath, file))
+ L = sorted(L, reverse=False)
+ for i in range(len(L)):
+ prob_t = {}
+ prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+ prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+ prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+ prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+ prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+ a.append(prob_t)
+
+ @staticmethod
+ def getFileName():
+ fpath = os.path.dirname(os.path.realpath(__file__))
+ for file in DEV_XML_FILE_LIST:
+ xml = fpath + "/" + file
+ if os.path.exists(xml):
+ return xml
+ return fpath + "/" + CONFIG_NAME
+
+ @staticmethod
+ def checkFan(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "fan"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getTemp(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "temp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getPsu(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "psu"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getcputemp(ret):
+ _filename = status.getFileName()
+ _tagname = "cpus"
+ status.getCPUValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getDcdc(ret):
+ _filename = status.getFileName()
+ _tagname = "dcdc"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmactemp(ret):
+ _filename = status.getFileName()
+ _tagname = "mactemp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmacpower(ret):
+ _filename = status.getFileName()
+ _tagname = "macpower"
+ status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml
new file mode 100644
index 000000000000..1c3911a2cd62
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml
@@ -0,0 +1,582 @@
+- bus: '00'
+ dev: '00'
+ fn: '0'
+ id: 6f00
+ name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+ (rev 05)'
+- bus: '00'
+ dev: '01'
+ fn: '0'
+ id: 6f02
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 1 (rev 05)'
+- bus: '00'
+ dev: '01'
+ fn: '1'
+ id: 6f03
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 1 (rev 05)'
+- bus: '00'
+ dev: '02'
+ fn: '0'
+ id: 6f04
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 2 (rev 05)'
+- bus: '00'
+ dev: '02'
+ fn: '2'
+ id: 6f06
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 2 (rev 05)'
+- bus: '00'
+ dev: '02'
+ fn: '3'
+ id: 6f07
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 2 (rev 05)'
+- bus: '00'
+ dev: '03'
+ fn: '0'
+ id: 6f08
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 3 (rev 05)'
+- bus: '00'
+ dev: '03'
+ fn: '1'
+ id: 6f09
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 3 (rev 05)'
+- bus: '00'
+ dev: '03'
+ fn: '2'
+ id: 6f0a
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 3 (rev 05)'
+- bus: '00'
+ dev: '03'
+ fn: '3'
+ id: 6f0b
+ name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+ Express Root Port 3 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '0'
+ id: 6f20
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 0 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '1'
+ id: 6f21
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 1 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '2'
+ id: 6f22
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 2 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '3'
+ id: 6f23
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 3 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '4'
+ id: 6f24
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 4 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '5'
+ id: 6f25
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 5 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '6'
+ id: 6f26
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 6 (rev 05)'
+- bus: '00'
+ dev: '04'
+ fn: '7'
+ id: 6f27
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Crystal Beach DMA Channel 7 (rev 05)'
+- bus: '00'
+ dev: '05'
+ fn: '0'
+ id: 6f28
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Map/VTd_Misc/System Management (rev 05)'
+- bus: '00'
+ dev: '05'
+ fn: '1'
+ id: 6f29
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Hot Plug (rev 05)'
+- bus: '00'
+ dev: '05'
+ fn: '2'
+ id: 6f2a
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO RAS/Control Status/Global Errors (rev 05)'
+- bus: '00'
+ dev: '05'
+ fn: '4'
+ id: 6f2c
+ name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+ 05)'
+- bus: '00'
+ dev: '05'
+ fn: '6'
+ id: 6f39
+ name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IO Performance Monitoring (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '0'
+ id: 6f10
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '1'
+ id: 6f11
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '2'
+ id: 6f12
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '3'
+ id: 6f13
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '4'
+ id: 6f14
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '5'
+ id: 6f15
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '6'
+ id: 6f16
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '06'
+ fn: '7'
+ id: 6f17
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '07'
+ fn: '0'
+ id: 6f18
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '07'
+ fn: '1'
+ id: 6f19
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '07'
+ fn: '2'
+ id: 6f1a
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '07'
+ fn: '3'
+ id: 6f1b
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '07'
+ fn: '4'
+ id: 6f1c
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D IIO Debug (rev 05)'
+- bus: '00'
+ dev: '14'
+ fn: '0'
+ id: 8c31
+ name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+ xHCI (rev 05)'
+- bus: '00'
+ dev: '16'
+ fn: '0'
+ id: 8c3a
+ name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+ Family MEI Controller #1 (rev 04)'
+- bus: '00'
+ dev: '16'
+ fn: '1'
+ id: 8c3b
+ name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+ Family MEI Controller #2 (rev 04)'
+- bus: '00'
+ dev: 1d
+ fn: '0'
+ id: 8c26
+ name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+ EHCI #1 (rev 05)'
+- bus: '00'
+ dev: 1f
+ fn: '0'
+ id: 8c54
+ name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+ SKU LPC Controller (rev 05)'
+- bus: '00'
+ dev: 1f
+ fn: '2'
+ id: 8c02
+ name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+ SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+ dev: 1f
+ fn: '3'
+ id: 8c22
+ name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+ (rev 05)'
+- bus: '04'
+ dev: '00'
+ fn: '0'
+ id: 15ab
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '04'
+ dev: '00'
+ fn: '1'
+ id: 15ab
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+ dev: '00'
+ fn: '0'
+ id: 15ab
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+ dev: '00'
+ fn: '1'
+ id: 15ab
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '06'
+ dev: '00'
+ fn: '0'
+ id: b990
+ name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56990 Switch ASIC
+ (rev 11)'
+- bus: '07'
+ dev: '00'
+ fn: '0'
+ id: '1537'
+ name: 'Ethernet controller: Intel Corporation I210 Gigabit Backplane Connection
+ (rev 03)'
+- bus: 08
+ dev: '00'
+ fn: '0'
+ id: '7011'
+ name: 'Memory controller: Xilinx Corporation Device 7011'
+- bus: ff
+ dev: 0b
+ fn: '0'
+ id: 6f81
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+ dev: 0b
+ fn: '1'
+ id: 6f36
+ name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+ dev: 0b
+ fn: '2'
+ id: 6f37
+ name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+ dev: 0b
+ fn: '3'
+ id: 6f76
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D R3 QPI Link Debug (rev 05)'
+- bus: ff
+ dev: 0c
+ fn: '0'
+ id: 6fe0
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: 0c
+ fn: '1'
+ id: 6fe1
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: 0c
+ fn: '2'
+ id: 6fe2
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: 0c
+ fn: '3'
+ id: 6fe3
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: 0f
+ fn: '0'
+ id: 6ff8
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: 0f
+ fn: '4'
+ id: 6ffc
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: 0f
+ fn: '5'
+ id: 6ffd
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: 0f
+ fn: '6'
+ id: 6ffe
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Caching Agent (rev 05)'
+- bus: ff
+ dev: '10'
+ fn: '0'
+ id: 6f1d
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D R2PCIe Agent (rev 05)'
+- bus: ff
+ dev: '10'
+ fn: '1'
+ id: 6f34
+ name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D R2PCIe Agent (rev 05)'
+- bus: ff
+ dev: '10'
+ fn: '5'
+ id: 6f1e
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Ubox (rev 05)'
+- bus: ff
+ dev: '10'
+ fn: '6'
+ id: 6f7d
+ name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Ubox (rev 05)'
+- bus: ff
+ dev: '10'
+ fn: '7'
+ id: 6f1f
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Ubox (rev 05)'
+- bus: ff
+ dev: '12'
+ fn: '0'
+ id: 6fa0
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Home Agent 0 (rev 05)'
+- bus: ff
+ dev: '12'
+ fn: '1'
+ id: 6f30
+ name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Home Agent 0 (rev 05)'
+- bus: ff
+ dev: '12'
+ fn: '2'
+ id: 6f70
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Home Agent 0 Debug (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '0'
+ id: 6fa8
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '1'
+ id: 6f71
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '2'
+ id: 6faa
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '3'
+ id: 6fab
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '4'
+ id: 6fac
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '5'
+ id: 6fad
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '6'
+ id: 6fae
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D DDRIO Channel 0/1 Broadcast (rev 05)'
+- bus: ff
+ dev: '13'
+ fn: '7'
+ id: 6faf
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D DDRIO Global Broadcast (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '0'
+ id: 6fb0
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 0 Thermal Control (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '1'
+ id: 6fb1
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 1 Thermal Control (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '2'
+ id: 6fb2
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 0 Error (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '3'
+ id: 6fb3
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 1 Error (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '4'
+ id: 6fbc
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '5'
+ id: 6fbd
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '6'
+ id: 6fbe
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+ dev: '14'
+ fn: '7'
+ id: 6fbf
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+ dev: '15'
+ fn: '0'
+ id: 6fb4
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 2 Thermal Control (rev 05)'
+- bus: ff
+ dev: '15'
+ fn: '1'
+ id: 6fb5
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 3 Thermal Control (rev 05)'
+- bus: ff
+ dev: '15'
+ fn: '2'
+ id: 6fb6
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 2 Error (rev 05)'
+- bus: ff
+ dev: '15'
+ fn: '3'
+ id: 6fb7
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Memory Controller 0 - Channel 3 Error (rev 05)'
+- bus: ff
+ dev: 1e
+ fn: '0'
+ id: 6f98
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Power Control Unit (rev 05)'
+- bus: ff
+ dev: 1e
+ fn: '1'
+ id: 6f99
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Power Control Unit (rev 05)'
+- bus: ff
+ dev: 1e
+ fn: '2'
+ id: 6f9a
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Power Control Unit (rev 05)'
+- bus: ff
+ dev: 1e
+ fn: '3'
+ id: 6fc0
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Power Control Unit (rev 05)'
+- bus: ff
+ dev: 1e
+ fn: '4'
+ id: 6f9c
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Power Control Unit (rev 05)'
+- bus: ff
+ dev: 1e
+ fn: '7'
+ id: 6f9f
+ name: 'System peripheral: Intel Corporation Device 6f9f (rev 05)'
+- bus: ff
+ dev: 1f
+ fn: '0'
+ id: 6f88
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Power Control Unit (rev 05)'
+- bus: ff
+ dev: 1f
+ fn: '2'
+ id: 6f8a
+ name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+ D Power Control Unit (rev 05)'
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
new file mode 100644
index 000000000000..208b81383eca
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
@@ -0,0 +1,2036 @@
+{
+ "chassis": {
+ "name": "M2-W6930-64QC",
+ "thermal_manager": false,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "green",
+ "blinking_green",
+ "amber",
+ "blinking_amber"
+ ]
+ },
+ "components": [
+ {
+ "name": "CPU_CPLD"
+ },
+ {
+ "name": "CONNECT_CPLD"
+ },
+ {
+ "name": "MAC_CPLDA"
+ },
+ {
+ "name": "MAC_CPLDB"
+ },
+ {
+ "name": "PORT_CPLDA"
+ },
+ {
+ "name": "PORT_CPLDB"
+ },
+ {
+ "name": "FAN_CPLDA"
+ },
+ {
+ "name": "FAN_CPLDB"
+ },
+ {
+ "name": "MAC_FPGA"
+ },
+ {
+ "name": "PORT_FPGA"
+ },
+ {
+ "name": "BIOS"
+ }
+ ],
+ "fans": [
+ {
+ "name": "Fantray1_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray1_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray2_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray2_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray3_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray3_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray4_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray4_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray5_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray5_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray6_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray6_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray7_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray7_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray8_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ },
+ {
+ "name": "Fantray8_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": [
+ "off",
+ "red",
+ "amber",
+ "green"
+ ]
+ }
+ }
+ ],
+ "fan_drawers": [
+ {
+ "name": "Fantray1",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray1_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray1_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray2",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray2_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray2_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray3",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray3_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray3_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray4",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray4_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray4_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray5",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray5_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray5_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray6",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray6_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray6_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray7",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray7_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray7_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray8",
+ "num_fans": 2,
+ "status_led": {
+ "controllable": false,
+ "colors": [
+ "amber",
+ "green",
+ "off"
+ ]
+ },
+ "fans": [
+ {
+ "name": "Fantray8_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray8_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ }
+ ],
+ "psus": [
+ {
+ "name": "Psu1",
+ "voltage": true,
+ "current": true,
+ "power": true,
+ "max_power": false,
+ "voltage_high_threshold": true,
+ "voltage_low_threshold": true,
+ "temperature": true,
+ "fans_target_speed": true,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU1_FAN1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Psu2",
+ "voltage": true,
+ "current": true,
+ "power": true,
+ "max_power": false,
+ "voltage_high_threshold": true,
+ "voltage_low_threshold": true,
+ "temperature": true,
+ "fans_target_speed": true,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU2_FAN1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Psu3",
+ "voltage": true,
+ "current": true,
+ "power": true,
+ "max_power": false,
+ "voltage_high_threshold": true,
+ "voltage_low_threshold": true,
+ "temperature": true,
+ "fans_target_speed": true,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU3_FAN1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Psu4",
+ "voltage": true,
+ "current": true,
+ "power": true,
+ "max_power": false,
+ "voltage_high_threshold": true,
+ "voltage_low_threshold": true,
+ "temperature": true,
+ "fans_target_speed": true,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU4_FAN1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ }
+ ],
+ "thermals": [
+ {
+ "name": "BOARD_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "CPU_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "INLET_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "OUTLET_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "ASIC_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "PSU1_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "PSU2_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
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+ "Eth47/1",
+ "Eth47/2",
+ "Eth47/3",
+ "Eth47/4"
+ ],
+ "2x200G": [
+ "Eth47/1",
+ "Eth47/2"
+ ]
+ }
+ },
+ "Ethernet377": {
+ "index": "47,47,47,47,47,47,47,47",
+ "lanes": "205,206,207,208",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth48"
+ ],
+ "4x100G": [
+ "Eth48/1",
+ "Eth48/2",
+ "Eth48/3",
+ "Eth48/4"
+ ],
+ "2x200G": [
+ "Eth48/1",
+ "Eth48/2"
+ ]
+ }
+ },
+ "Ethernet385": {
+ "index": "48,48,48,48,48,48,48,48",
+ "lanes": "165,166,167,168",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth49"
+ ],
+ "4x100G": [
+ "Eth49/1",
+ "Eth49/2",
+ "Eth49/3",
+ "Eth49/4"
+ ],
+ "2x200G": [
+ "Eth49/1",
+ "Eth49/2"
+ ]
+ }
+ },
+ "Ethernet393": {
+ "index": "49,49,49,49,49,49,49,49",
+ "lanes": "161,162,163,164",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth50"
+ ],
+ "4x100G": [
+ "Eth50/1",
+ "Eth50/2",
+ "Eth50/3",
+ "Eth50/4"
+ ],
+ "2x200G": [
+ "Eth50/1",
+ "Eth50/2"
+ ]
+ }
+ },
+ "Ethernet401": {
+ "index": "50,50,50,50,50,50,50,50",
+ "lanes": "201,202,203,204",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth51"
+ ],
+ "4x100G": [
+ "Eth51/1",
+ "Eth51/2",
+ "Eth51/3",
+ "Eth51/4"
+ ],
+ "2x200G": [
+ "Eth51/1",
+ "Eth51/2"
+ ]
+ }
+ },
+ "Ethernet409": {
+ "index": "51,51,51,51,51,51,51,51",
+ "lanes": "213,214,215,216",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth52"
+ ],
+ "4x100G": [
+ "Eth52/1",
+ "Eth52/2",
+ "Eth52/3",
+ "Eth52/4"
+ ],
+ "2x200G": [
+ "Eth52/1",
+ "Eth52/2"
+ ]
+ }
+ },
+ "Ethernet417": {
+ "index": "52,52,52,52,52,52,52,52",
+ "lanes": "173,174,175,176",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth53"
+ ],
+ "4x100G": [
+ "Eth53/1",
+ "Eth53/2",
+ "Eth53/3",
+ "Eth53/4"
+ ],
+ "2x200G": [
+ "Eth53/1",
+ "Eth53/2"
+ ]
+ }
+ },
+ "Ethernet425": {
+ "index": "53,53,53,53,53,53,53,53",
+ "lanes": "169,170,171,172",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth54"
+ ],
+ "4x100G": [
+ "Eth54/1",
+ "Eth54/2",
+ "Eth54/3",
+ "Eth54/4"
+ ],
+ "2x200G": [
+ "Eth54/1",
+ "Eth54/2"
+ ]
+ }
+ },
+ "Ethernet433": {
+ "index": "54,54,54,54,54,54,54,54",
+ "lanes": "209,210,211,212",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth55"
+ ],
+ "4x100G": [
+ "Eth55/1",
+ "Eth55/2",
+ "Eth55/3",
+ "Eth55/4"
+ ],
+ "2x200G": [
+ "Eth55/1",
+ "Eth55/2"
+ ]
+ }
+ },
+ "Ethernet441": {
+ "index": "55,55,55,55,55,55,55,55",
+ "lanes": "221,222,223,224",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth56"
+ ],
+ "4x100G": [
+ "Eth56/1",
+ "Eth56/2",
+ "Eth56/3",
+ "Eth56/4"
+ ],
+ "2x200G": [
+ "Eth56/1",
+ "Eth56/2"
+ ]
+ }
+ },
+ "Ethernet449": {
+ "index": "56,56,56,56,56,56,56,56",
+ "lanes": "181,182,183,184",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth57"
+ ],
+ "4x100G": [
+ "Eth57/1",
+ "Eth57/2",
+ "Eth57/3",
+ "Eth57/4"
+ ],
+ "2x200G": [
+ "Eth57/1",
+ "Eth57/2"
+ ]
+ }
+ },
+ "Ethernet457": {
+ "index": "57,57,57,57,57,57,57,57",
+ "lanes": "177,178,179,180",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth58"
+ ],
+ "4x100G": [
+ "Eth58/1",
+ "Eth58/2",
+ "Eth58/3",
+ "Eth58/4"
+ ],
+ "2x200G": [
+ "Eth58/1",
+ "Eth58/2"
+ ]
+ }
+ },
+ "Ethernet465": {
+ "index": "58,58,58,58,58,58,58,58",
+ "lanes": "217,218,219,220",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth59"
+ ],
+ "4x100G": [
+ "Eth59/1",
+ "Eth59/2",
+ "Eth59/3",
+ "Eth59/4"
+ ],
+ "2x200G": [
+ "Eth59/1",
+ "Eth59/2"
+ ]
+ }
+ },
+ "Ethernet473": {
+ "index": "59,59,59,59,59,59,59,59",
+ "lanes": "229,230,231,232",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth60"
+ ],
+ "4x100G": [
+ "Eth60/1",
+ "Eth60/2",
+ "Eth60/3",
+ "Eth60/4"
+ ],
+ "2x200G": [
+ "Eth60/1",
+ "Eth60/2"
+ ]
+ }
+ },
+ "Ethernet481": {
+ "index": "60,60,60,60,60,60,60,60",
+ "lanes": "189,190,191,192",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth61"
+ ],
+ "4x100G": [
+ "Eth61/1",
+ "Eth61/2",
+ "Eth61/3",
+ "Eth61/4"
+ ],
+ "2x200G": [
+ "Eth61/1",
+ "Eth61/2"
+ ]
+ }
+ },
+ "Ethernet489": {
+ "index": "61,61,61,61,61,61,61,61",
+ "lanes": "185,186,187,188",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth62"
+ ],
+ "4x100G": [
+ "Eth62/1",
+ "Eth62/2",
+ "Eth62/3",
+ "Eth62/4"
+ ],
+ "2x200G": [
+ "Eth62/1",
+ "Eth62/2"
+ ]
+ }
+ },
+ "Ethernet497": {
+ "index": "62,62,62,62,62,62,62,62",
+ "lanes": "225,226,227,228",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth63"
+ ],
+ "4x100G": [
+ "Eth63/1",
+ "Eth63/2",
+ "Eth63/3",
+ "Eth63/4"
+ ],
+ "2x200G": [
+ "Eth63/1",
+ "Eth63/2"
+ ]
+ }
+ },
+ "Ethernet505": {
+ "index": "63,63,63,63,63,63,63,63",
+ "lanes": "233,234,235,236",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth64"
+ ],
+ "4x100G": [
+ "Eth64/1",
+ "Eth64/2",
+ "Eth64/3",
+ "Eth64/4"
+ ],
+ "2x200G": [
+ "Eth64/1",
+ "Eth64/2"
+ ]
+ }
+ }
+ }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json
new file mode 100644
index 000000000000..221114c461b9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json
@@ -0,0 +1,20 @@
+{
+ "chassis": {
+ "M2-W6930-64QC": {
+ "component": {
+ "CPU_CPLD": { },
+ "CONNECT_CPLD": { },
+ "FAN_CPLDA": { },
+ "FAN_CPLDB": { },
+ "MAC_CPLDA": { },
+ "MAC_CPLDB": { },
+ "PORT_CPLDA": { },
+ "PORT_CPLDB": { },
+ "MAC_FPGA": { },
+ "PORT_FPGA": { },
+ "BIOS": { }
+ }
+ }
+ }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf
new file mode 100644
index 000000000000..fc119184d5c1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf
@@ -0,0 +1,2 @@
+is_ltsw_chip=1
+SYNCD_SHM_SIZE=1g
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..f52a788085e9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py
@@ -0,0 +1,363 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+ import time
+ import re
+ import os
+ import threading
+ import traceback
+ import subprocess
+ from ctypes import create_string_buffer
+ from sonic_sfp.sfputilbase import SfpUtilBase
+ from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
+except ImportError as e:
+ raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+ """Platform-specific SfpUtil class"""
+
+ PORT_START = 0
+ PORT_END = 63
+ PORTS_IN_BLOCK = 64
+
+ EEPROM_OFFSET = 133
+ SFP_DEVICE_TYPE = "optoe2"
+ QSFP_DEVICE_TYPE = "optoe1"
+ QSFP_DD_DEVICE_TYPE = "optoe3"
+ I2C_MAX_ATTEMPT = 3
+
+ OPTOE_TYPE1 = 1
+ OPTOE_TYPE2 = 2
+ OPTOE_TYPE3 = 3
+
+ SFP_STATUS_INSERTED = '1'
+ SFP_STATUS_REMOVED = '0'
+
+ _port_to_eeprom_mapping = {}
+ port_to_i2cbus_mapping ={}
+ port_dict = {}
+
+ qsfp_ports_list = []
+ qsfp_dd_ports_list = []
+
+ @property
+ def port_start(self):
+ return self.PORT_START
+
+ @property
+ def port_end(self):
+ return self.PORT_END
+
+ @property
+ def qsfp_ports(self):
+ return self.qsfp_ports_list
+
+ @property
+ def qsfp_dd_ports(self):
+ return self.qsfp_dd_ports_list
+
+ @property
+ def port_to_eeprom_mapping(self):
+ return self._port_to_eeprom_mapping
+
+ def __init__(self):
+ self.qsfp_ports_list = []
+ self.qsfp_dd_ports_list = []
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+ if self.get_presence(x):
+ self.port_dict[x] = self.SFP_STATUS_INSERTED
+ else:
+ self.port_dict[x] = self.SFP_STATUS_REMOVED
+
+ if (self.check_is_qsfpdd(x)):
+ self.qsfp_dd_ports_list.append(x)
+ self.check_optoe_type(x, self.OPTOE_TYPE3)
+ else:
+ self.qsfp_ports_list.append(x)
+ self.check_optoe_type(x, self.OPTOE_TYPE1)
+ SfpUtilBase.__init__(self)
+
+ def _sfp_read_file_path(self, file_path, offset, num_bytes):
+ attempts = 0
+ while attempts < self.I2C_MAX_ATTEMPT:
+ try:
+ file_path.seek(offset)
+ read_buf = file_path.read(num_bytes)
+ except:
+ attempts += 1
+ time.sleep(0.05)
+ else:
+ return True, read_buf
+ return False, None
+
+ def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+ """Tries to read the eeprom file to determine if the
+ device/sfp is present or not. If sfp present, the read returns
+ valid bytes. If not, read returns error 'Connection timed out"""
+
+ if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+ return False
+ else:
+ with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+ rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+ return rv
+
+ def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+ try:
+ sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+ # Write device address to new_device file
+ nd_file = open(sysfs_nd_path, "w")
+ nd_str = "%s %s" % (devtype, hex(devaddr))
+ nd_file.write(nd_str)
+ nd_file.close()
+
+ except Exception as err:
+ print("Error writing to new device file: %s" % str(err))
+ return 1
+ else:
+ return 0
+
+ def _get_port_eeprom_path(self, port_num, devid):
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ if port_num in self.port_to_eeprom_mapping.keys():
+ sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+ else:
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+ if i2c_adapter_id is None:
+ print("Error getting i2c bus num")
+ return None
+
+ # Get i2c virtual bus path for the sfp
+ sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+ str(i2c_adapter_id))
+
+ # If i2c bus for port does not exist
+ if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+ print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+ return None
+
+ sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+ str(i2c_adapter_id),
+ hex(devid)[-2:])
+
+ # If sfp device is not present on bus, Add it
+ if not os.path.exists(sysfs_sfp_i2c_client_path):
+ if port_num in self.qsfp_dd_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE)
+ elif port_num in self.qsfp_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+ else:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+ if ret != 0:
+ print("Error adding sfp device")
+ return None
+
+ sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+ return sysfs_sfp_i2c_client_eeprom_path
+
+ def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+ eeprom_raw = []
+ for i in range(0, num_bytes):
+ eeprom_raw.append("0x00")
+
+ rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+ if rv == False:
+ return None
+
+ try:
+ for n in range(0, num_bytes):
+ eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+ except:
+ return None
+
+ return eeprom_raw
+
+ def get_eeprom_dom_raw(self, port_num):
+ if port_num in self.qsfp_ports:
+ # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+ return None
+ else:
+ # Read dom eeprom at addr 0x51
+ return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+ def get_presence(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+ cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1))
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ return False
+ if output == "1":
+ return True
+ return False
+
+ def check_is_qsfpdd(self, port_num):
+ try:
+ if self.get_presence(port_num) == False:
+ return False
+
+ eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+ # according to sff-8024 A0h Byte 0 is '1e' or '18' means the transceiver is qsfpdd
+ if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'):
+ return True
+ except Exception as e:
+ print(traceback.format_exc())
+
+ return False
+
+ def check_optoe_type(self, port_num, optoe_type):
+ if self.get_presence(port_num) == False:
+ return True
+ try:
+ eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+ dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class'
+ i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num]))
+ cmd = "cat " + i2c_path
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ print("cmd: %s execution fail, output:%s" % (cmd, output))
+ return False
+ if int(output) != optoe_type:
+ cmd = "echo " + str(optoe_type) + " > " + i2c_path
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ print("cmd: %s execution fail, output:%s" % (cmd, output))
+ return False
+ return True
+
+ except Exception as e:
+ print(traceback.format_exc())
+ return False
+
+ def get_low_power_mode(self, port_num):
+ # Check for invalid port_num
+
+ return True
+
+ def set_low_power_mode(self, port_num, lpmode):
+ # Check for invalid port_num
+
+ return True
+
+ def reset(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+
+ return True
+
+ def get_transceiver_change_event(self, timeout=0):
+
+ start_time = time.time()
+ current_port_dict = {}
+ forever = False
+
+ if timeout == 0:
+ forever = True
+ elif timeout > 0:
+ timeout = timeout / float(1000) # Convert to secs
+ else:
+ print ("get_transceiver_change_event:Invalid timeout value", timeout)
+ return False, {}
+
+ end_time = start_time + timeout
+ if start_time > end_time:
+ print ('get_transceiver_change_event:' \
+ 'time wrap / invalid timeout value', timeout)
+
+ return False, {} # Time wrap or possibly incorrect timeout
+
+ while timeout >= 0:
+ # Check for OIR events and return updated port_dict
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if self.get_presence(x):
+ current_port_dict[x] = self.SFP_STATUS_INSERTED
+ else:
+ current_port_dict[x] = self.SFP_STATUS_REMOVED
+ if (current_port_dict == self.port_dict):
+ if forever:
+ time.sleep(1)
+ else:
+ timeout = end_time - time.time()
+ if timeout >= 1:
+ time.sleep(1) # We poll at 1 second granularity
+ else:
+ if timeout > 0:
+ time.sleep(timeout)
+ return True, {}
+ else:
+ # Update reg value
+ self.port_dict = current_port_dict
+ return True, self.port_dict
+ print ("get_transceiver_change_event: Should not reach here.")
+ return False, {}
+
+ def get_highest_temperature(self):
+ offset = 0
+ hightest_temperature = -9999
+
+ presence_flag = False
+ read_eeprom_flag = False
+ temperature_valid_flag = False
+
+ for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if self.get_presence(port) == False:
+ continue
+
+ presence_flag = True
+
+ if port in self.qsfp_dd_ports:
+ offset = 14
+ elif port in self.qsfp_ports:
+ offset = 22
+ else:
+ offset = 96
+
+ eeprom_path = self._get_port_eeprom_path(port, 0x50)
+ try:
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ read_eeprom_flag = True
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+ if len(eeprom_raw) != 0:
+ msb = int(eeprom_raw[0], 16)
+ lsb = int(eeprom_raw[1], 16)
+
+ result = (msb << 8) | (lsb & 0xff)
+ result = float(result / 256.0)
+ if -50 <= result <= 200:
+ temperature_valid_flag = True
+ if hightest_temperature < result:
+ hightest_temperature = result
+ except Exception as e:
+ pass
+
+ # all port not presence
+ if presence_flag == False:
+ hightest_temperature = -10000
+
+ # all port read eeprom fail
+ elif read_eeprom_flag == False:
+ hightest_temperature = -9999
+
+ # all port temperature invalid
+ elif read_eeprom_flag == True and temperature_valid_flag == False:
+ hightest_temperature = -10000
+
+ hightest_temperature = round(hightest_temperature, 2)
+
+ return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+# - InnoDisk
+# - StorFly
+# - Virtium
+
+try:
+ import re
+ import os
+ import subprocess
+ from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+ raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+ """
+ Generic implementation of the SSD health API
+ """
+ model = NOT_AVAILABLE
+ serial = NOT_AVAILABLE
+ firmware = NOT_AVAILABLE
+ temperature = NOT_AVAILABLE
+ health = NOT_AVAILABLE
+ remaining_life = NOT_AVAILABLE
+ sata_rate = NOT_AVAILABLE
+ ssd_info = NOT_AVAILABLE
+ vendor_ssd_info = NOT_AVAILABLE
+
+ def __init__(self, diskdev):
+ self.vendor_ssd_utility = {
+ "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+ "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info },
+ "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }
+ }
+
+ """
+ The dict model_attr keys relate the vendors
+ LITEON : "ER2-GD","AF2MA31DTDLT"
+ Intel : "SSDSCKKB"
+ SMI : "SM619GXC"
+ samsung: "MZNLH"
+ ADATA : "IM2S3134N"
+ """
+ self.model_attr = {
+ "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+ "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+ "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+ "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+ "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+ }
+
+ self.key_list = list(self.model_attr.keys())
+ self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+ self.dev = diskdev
+ # Generic part
+ self.fetch_generic_ssd_info(diskdev)
+ self.parse_generic_ssd_info()
+ self.fetch_vendor_ssd_info(diskdev, "Generic")
+
+ # Known vendor part
+ if self.model:
+ model_short = self.model.split()[0]
+ if model_short in self.vendor_ssd_utility:
+ self.fetch_vendor_ssd_info(diskdev, model_short)
+ self.parse_vendor_ssd_info(model_short)
+ else:
+ # No handler registered for this disk model
+ pass
+ else:
+ # Failed to get disk model
+ self.model = "Unknown"
+
+ def _execute_shell(self, cmd):
+ process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+ output, error = process.communicate()
+ exit_code = process.returncode
+ if exit_code:
+ return None
+ return output
+
+ def _parse_re(self, pattern, buffer):
+ res_list = re.findall(pattern, str(buffer))
+ return res_list[0] if res_list else NOT_AVAILABLE
+
+ def fetch_generic_ssd_info(self, diskdev):
+ self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+ # Health and temperature values may be overwritten with vendor specific data
+ def parse_generic_ssd_info(self):
+ if "nvme" in self.dev:
+ self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+ health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+ if health_raw == NOT_AVAILABLE:
+ self.health = NOT_AVAILABLE
+ else:
+ health_raw = health_raw.split()[-1]
+ self.health = 100 - float(health_raw.strip('%'))
+
+ temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+ if temp_raw == NOT_AVAILABLE:
+ self.temperature = NOT_AVAILABLE
+ else:
+ temp_raw = temp_raw.split()[-2]
+ self.temperature = float(temp_raw)
+ else:
+ self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+ model_key = ""
+ for key in self.key_list:
+ if re.search(key, self.model):
+ model_key = key
+ break
+ if model_key != "":
+ self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+ self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+ self.health = self.remaining_life
+ # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+ if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+ avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+ self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+ if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT:
+ self.remaining_life = "Fail"
+ self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+ self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+ self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+ def parse_innodisk_info(self):
+ if self.vendor_ssd_info:
+ self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+ self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+ else:
+ if self.health == NOT_AVAILABLE:
+ health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+ self.health = health_raw.split()[-1]
+ if self.temperature == NOT_AVAILABLE:
+ temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+ self.temperature = temp_raw.split()[-6]
+
+ def parse_virtium_info(self):
+ if self.vendor_ssd_info:
+ self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ try:
+ self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+ except (ValueError, ZeroDivisionError):
+ # Invalid avg_erase_count or nand_endurance.
+ pass
+
+ def fetch_vendor_ssd_info(self, diskdev, model):
+ self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+ def parse_vendor_ssd_info(self, model):
+ self.vendor_ssd_utility[model]["parser"]()
+
+ def check_readonly2(self, partition, filesystem):
+ # parse mount cmd output info
+ mount_info = self._execute_shell(MOUNT_CMD)
+ for line in mount_info.split('\n'):
+ column_list = line.split()
+ if line == '':
+ continue
+ if column_list[0] == partition and column_list[2] == filesystem:
+ if column_list[5].split(',')[0][1:] == "ro":
+ return partition
+ else:
+ return NOT_AVAILABLE
+ return NOT_AVAILABLE
+
+ def check_readonly(self, partition, filesystem):
+ ret = os.access(filesystem, os.W_OK)
+ if ret == False:
+ return partition
+ else:
+ return NOT_AVAILABLE
+
+ def get_health(self):
+ """
+ Retrieves current disk health in percentages
+
+ Returns:
+ A float number of current ssd health
+ e.g. 83.5
+ """
+ if self.health == 'N/A':
+ return "NA"
+ else:
+ return float(self.health)
+
+ def get_temperature(self):
+ """
+ Retrieves current disk temperature in Celsius
+
+ Returns:
+ A float number of current temperature in Celsius
+ e.g. 40.1
+ """
+ if self.temperature == 'N/A':
+ return 'NA'
+ else:
+ return float(self.temperature)
+
+ def get_model(self):
+ """
+ Retrieves model for the given disk device
+
+ Returns:
+ A string holding disk model as provided by the manufacturer
+ """
+ return self.model
+
+ def get_firmware(self):
+ """
+ Retrieves firmware version for the given disk device
+
+ Returns:
+ A string holding disk firmware version as provided by the manufacturer
+ """
+ return self.firmware
+
+ def get_serial(self):
+ """
+ Retrieves serial number for the given disk device
+
+ Returns:
+ A string holding disk serial number as provided by the manufacturer
+ """
+ return self.serial
+ def get_sata_rate(self):
+ """
+ Retrieves SATA rate for the given disk device
+ Returns:
+ A string holding current SATA rate as provided by the manufacturer
+ """
+ return self.sata_rate
+ def get_remaining_life(self):
+ """
+ Retrieves remaining life for the given disk device
+ Returns:
+ A string holding disk remaining life as provided by the manufacturer
+ """
+ return self.remaining_life
+ def get_vendor_output(self):
+ """
+ Retrieves vendor specific data for the given disk device
+
+ Returns:
+ A string holding some vendor specific disk information
+ """
+ return self.vendor_ssd_info
+
+ def parse_id_number(self, id):
+ return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+ def get_readonly_partition(self):
+ """
+ Check the partition mount filesystem is readonly status,then output the result.
+ Returns:
+ The readonly partition list
+ """
+
+ ro_partition_list = []
+ partition_list = []
+
+ # parse fdisk cmd output info
+ disk_info = self._execute_shell(DISK_LIST_CMD)
+ begin_flag = False
+ for line in disk_info.split('\n'):
+ if line == "Device":
+ begin_flag = True
+ continue
+ if begin_flag:
+ if line != "":
+ partition_list.append(line)
+ else:
+ break
+
+ # parse df cmd output info
+ disk_free = self._execute_shell(DISK_FREE_CMD)
+ disk_dict = {}
+ line_num = 0
+ for line in disk_free.split('\n'):
+ line_num = line_num + 1
+ if line_num == 1 or line == "":
+ continue
+ column_list = line.split()
+ disk_dict[column_list[0]] = column_list[5]
+
+ # get partition which is readonly
+ for partition in partition_list:
+ if partition in disk_dict:
+ ret = self.check_readonly(partition, disk_dict[partition])
+ if (ret != NOT_AVAILABLE):
+ ro_partition_list.append(ret)
+
+ return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+ "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..fa28dafe16cb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc
@@ -0,0 +1,4 @@
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=xe,ce,cd
\ No newline at end of file
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/system_health_monitoring_config.json
old mode 100644
new mode 100755
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py
rename to device/micas/x86_64-micas_m2-w6930-64qc-r0/system_health_monitoring_config.json
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
new file mode 100644
index 000000000000..bb061f71ec60
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
@@ -0,0 +1,388 @@
+{
+ "interfaces": {
+ "Ethernet1": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet5": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet9": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet13": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet17": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet21": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet25": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet29": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet33": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet37": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet41": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet45": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet49": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet53": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet57": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet61": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet65": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet69": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet73": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet77": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet81": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet85": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet89": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet93": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet97": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet101": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet105": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet109": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet113": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet117": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet121": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet125": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet129": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet133": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet137": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet141": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet145": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet149": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet153": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet157": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet161": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet165": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet169": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet173": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet177": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet181": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet185": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet189": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet193": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet197": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet201": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet205": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet209": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet213": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet217": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet221": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet225": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet229": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet233": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet237": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet241": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet245": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet249": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet253": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet257": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet261": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet265": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet269": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet273": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet277": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet281": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet285": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet289": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet293": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet297": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet301": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet305": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet309": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet313": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet317": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet321": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet325": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet329": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet333": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet337": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet341": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet345": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet349": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet353": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet357": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet361": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet365": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet369": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet373": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet377": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet381": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet385": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet389": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet393": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet397": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet401": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet405": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet409": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet413": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet417": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet421": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet425": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet429": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet433": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet437": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet441": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet445": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet449": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet453": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet457": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet461": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet465": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet469": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet473": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet477": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet481": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet485": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet489": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet493": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet497": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet501": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet505": {
+ "default_brkout_mode": "1x400G"
+ },
+ "Ethernet509": {
+ "default_brkout_mode": "1x400G"
+ }
+ }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini
new file mode 100644
index 000000000000..b54cae009e49
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini
@@ -0,0 +1,129 @@
+# name lanes alias index speed
+Ethernet1 17,18,19,20 fourhundredGigE0/1 0 400000
+Ethernet5 21,22,23,24 fourhundredGigE0/2 1 400000
+Ethernet9 25,26,27,28 fourhundredGigE0/3 2 400000
+Ethernet13 29,30,31,32 fourhundredGigE0/4 3 400000
+Ethernet17 129,130,131,132 fourhundredGigE0/5 4 400000
+Ethernet21 133,134,135,136 fourhundredGigE0/6 5 400000
+Ethernet25 41,42,43,44 fourhundredGigE0/7 6 400000
+Ethernet29 45,46,47,48 fourhundredGigE0/8 7 400000
+Ethernet33 57,58,59,60 fourhundredGigE0/9 8 400000
+Ethernet37 61,62,63,64 fourhundredGigE0/10 9 400000
+Ethernet41 145,146,147,148 fourhundredGigE0/11 10 400000
+Ethernet45 149,150,151,152 fourhundredGigE0/12 11 400000
+Ethernet49 137,138,139,140 fourhundredGigE0/13 12 400000
+Ethernet53 141,142,143,144 fourhundredGigE0/14 13 400000
+Ethernet57 33,34,35,36 fourhundredGigE0/15 14 400000
+Ethernet61 37,38,39,40 fourhundredGigE0/16 15 400000
+Ethernet65 161,162,163,164 fourhundredGigE0/17 16 400000
+Ethernet69 165,166,167,168 fourhundredGigE0/18 17 400000
+Ethernet73 153,154,155,156 fourhundredGigE0/19 18 400000
+Ethernet77 157,158,159,160 fourhundredGigE0/20 19 400000
+Ethernet81 49,50,51,52 fourhundredGigE0/21 20 400000
+Ethernet85 53,54,55,56 fourhundredGigE0/22 21 400000
+Ethernet89 177,178,179,180 fourhundredGigE0/23 22 400000
+Ethernet93 181,182,183,184 fourhundredGigE0/24 23 400000
+Ethernet97 169,170,171,172 fourhundredGigE0/25 24 400000
+Ethernet101 173,174,175,176 fourhundredGigE0/26 25 400000
+Ethernet105 65,66,67,68 fourhundredGigE0/27 26 400000
+Ethernet109 69,70,71,72 fourhundredGigE0/28 27 400000
+Ethernet113 209,210,211,212 fourhundredGigE0/29 28 400000
+Ethernet117 213,214,215,216 fourhundredGigE0/30 29 400000
+Ethernet121 185,186,187,188 fourhundredGigE0/31 30 400000
+Ethernet125 189,190,191,192 fourhundredGigE0/32 31 400000
+Ethernet129 81,82,83,84 fourhundredGigE0/33 32 400000
+Ethernet133 85,86,87,88 fourhundredGigE0/34 33 400000
+Ethernet137 193,194,195,196 fourhundredGigE0/35 34 400000
+Ethernet141 197,198,199,200 fourhundredGigE0/36 35 400000
+Ethernet145 201,202,203,204 fourhundredGigE0/37 36 400000
+Ethernet149 205,206,207,208 fourhundredGigE0/38 37 400000
+Ethernet153 97,98,99,100 fourhundredGigE0/39 38 400000
+Ethernet157 101,102,103,104 fourhundredGigE0/40 39 400000
+Ethernet161 121,122,123,124 fourhundredGigE0/41 40 400000
+Ethernet165 125,126,127,128 fourhundredGigE0/42 41 400000
+Ethernet169 217,218,219,220 fourhundredGigE0/43 42 400000
+Ethernet173 221,222,223,224 fourhundredGigE0/44 43 400000
+Ethernet177 113,114,115,116 fourhundredGigE0/45 44 400000
+Ethernet181 117,118,119,120 fourhundredGigE0/46 45 400000
+Ethernet185 105,106,107,108 fourhundredGigE0/47 46 400000
+Ethernet189 109,110,111,112 fourhundredGigE0/48 47 400000
+Ethernet193 225,226,227,228 fourhundredGigE0/49 48 400000
+Ethernet197 229,230,231,232 fourhundredGigE0/50 49 400000
+Ethernet201 233,234,235,236 fourhundredGigE0/51 50 400000
+Ethernet205 237,238,239,240 fourhundredGigE0/52 51 400000
+Ethernet209 89,90,91,92 fourhundredGigE0/53 52 400000
+Ethernet213 93,94,95,96 fourhundredGigE0/54 53 400000
+Ethernet217 241,242,243,244 fourhundredGigE0/55 54 400000
+Ethernet221 245,246,247,248 fourhundredGigE0/56 55 400000
+Ethernet225 249,250,251,252 fourhundredGigE0/57 56 400000
+Ethernet229 253,254,255,256 fourhundredGigE0/58 57 400000
+Ethernet233 73,74,75,76 fourhundredGigE0/59 58 400000
+Ethernet237 77,78,79,80 fourhundredGigE0/60 59 400000
+Ethernet241 257,258,259,260 fourhundredGigE0/61 60 400000
+Ethernet245 261,262,263,264 fourhundredGigE0/62 61 400000
+Ethernet249 265,266,267,268 fourhundredGigE0/63 62 400000
+Ethernet253 269,270,271,272 fourhundredGigE0/64 63 400000
+Ethernet257 433,434,435,436 fourhundredGigE0/65 64 400000
+Ethernet261 437,438,439,440 fourhundredGigE0/66 65 400000
+Ethernet265 273,274,275,276 fourhundredGigE0/67 66 400000
+Ethernet269 277,278,279,280 fourhundredGigE0/68 67 400000
+Ethernet273 281,282,283,284 fourhundredGigE0/69 68 400000
+Ethernet277 285,286,287,288 fourhundredGigE0/70 69 400000
+Ethernet281 417,418,419,420 fourhundredGigE0/71 70 400000
+Ethernet285 421,422,423,424 fourhundredGigE0/72 71 400000
+Ethernet289 393,394,395,396 fourhundredGigE0/73 72 400000
+Ethernet293 397,398,399,400 fourhundredGigE0/74 73 400000
+Ethernet297 289,290,291,292 fourhundredGigE0/75 74 400000
+Ethernet301 293,294,295,296 fourhundredGigE0/76 75 400000
+Ethernet305 401,402,403,404 fourhundredGigE0/77 76 400000
+Ethernet309 405,406,407,408 fourhundredGigE0/78 77 400000
+Ethernet313 409,410,411,412 fourhundredGigE0/79 78 400000
+Ethernet317 413,414,415,416 fourhundredGigE0/80 79 400000
+Ethernet321 305,306,307,308 fourhundredGigE0/81 80 400000
+Ethernet325 309,310,311,312 fourhundredGigE0/82 81 400000
+Ethernet329 385,386,387,388 fourhundredGigE0/83 82 400000
+Ethernet333 389,390,391,392 fourhundredGigE0/84 83 400000
+Ethernet337 425,426,427,428 fourhundredGigE0/85 84 400000
+Ethernet341 429,430,431,432 fourhundredGigE0/86 85 400000
+Ethernet345 321,322,323,324 fourhundredGigE0/87 86 400000
+Ethernet349 325,326,327,328 fourhundredGigE0/88 87 400000
+Ethernet353 313,314,315,316 fourhundredGigE0/89 88 400000
+Ethernet357 317,318,319,320 fourhundredGigE0/90 89 400000
+Ethernet361 441,442,443,444 fourhundredGigE0/91 90 400000
+Ethernet365 445,446,447,448 fourhundredGigE0/92 91 400000
+Ethernet369 337,338,339,340 fourhundredGigE0/93 92 400000
+Ethernet373 341,342,343,344 fourhundredGigE0/94 93 400000
+Ethernet377 297,298,299,300 fourhundredGigE0/95 94 400000
+Ethernet381 301,302,303,304 fourhundredGigE0/96 95 400000
+Ethernet385 457,458,459,460 fourhundredGigE0/97 96 400000
+Ethernet389 461,462,463,464 fourhundredGigE0/98 97 400000
+Ethernet393 353,354,355,356 fourhundredGigE0/99 98 400000
+Ethernet397 357,358,359,360 fourhundredGigE0/100 99 400000
+Ethernet401 329,330,331,332 fourhundredGigE0/101 100 400000
+Ethernet405 333,334,335,336 fourhundredGigE0/102 101 400000
+Ethernet409 473,474,475,476 fourhundredGigE0/103 102 400000
+Ethernet413 477,478,479,480 fourhundredGigE0/104 103 400000
+Ethernet417 369,370,371,372 fourhundredGigE0/105 104 400000
+Ethernet421 373,374,375,376 fourhundredGigE0/106 105 400000
+Ethernet425 345,346,347,348 fourhundredGigE0/107 106 400000
+Ethernet429 349,350,351,352 fourhundredGigE0/108 107 400000
+Ethernet433 449,450,451,452 fourhundredGigE0/109 108 400000
+Ethernet437 453,454,455,456 fourhundredGigE0/110 109 400000
+Ethernet441 465,466,467,468 fourhundredGigE0/111 110 400000
+Ethernet445 469,470,471,472 fourhundredGigE0/112 111 400000
+Ethernet449 361,362,363,364 fourhundredGigE0/113 112 400000
+Ethernet453 365,366,367,368 fourhundredGigE0/114 113 400000
+Ethernet457 489,490,491,492 fourhundredGigE0/115 114 400000
+Ethernet461 493,494,495,496 fourhundredGigE0/116 115 400000
+Ethernet465 481,482,483,484 fourhundredGigE0/117 116 400000
+Ethernet469 485,486,487,488 fourhundredGigE0/118 117 400000
+Ethernet473 377,378,379,380 fourhundredGigE0/119 118 400000
+Ethernet477 381,382,383,384 fourhundredGigE0/120 119 400000
+Ethernet481 505,506,507,508 fourhundredGigE0/121 120 400000
+Ethernet485 509,510,511,512 fourhundredGigE0/122 121 400000
+Ethernet489 497,498,499,500 fourhundredGigE0/123 122 400000
+Ethernet493 501,502,503,504 fourhundredGigE0/124 123 400000
+Ethernet497 9,10,11,12 fourhundredGigE0/125 124 400000
+Ethernet501 13,14,15,16 fourhundredGigE0/126 125 400000
+Ethernet505 1,2,3,4 fourhundredGigE0/127 126 400000
+Ethernet509 5,6,7,8 fourhundredGigE0/128 127 400000
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile
new file mode 100644
index 000000000000..7bb477ebfafb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-128qc-128x400g-config.yml
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
new file mode 100644
index 000000000000..cba00ec82fc7
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
@@ -0,0 +1,16226 @@
+---
+device:
+ 0:
+ DEVICE_CONFIG:
+ AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+ 0:
+ PC_PM_CORE:
+ ?
+ PC_PM_ID: 1
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46205173
+ RX_LANE_MAP: 0x46205173
+ TX_POLARITY_FLIP: 0xf
+ RX_POLARITY_FLIP: 0x2
+ ?
+ PC_PM_ID: 2
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37152046
+ RX_LANE_MAP: 0x37152046
+ TX_POLARITY_FLIP: 0xc9
+ RX_POLARITY_FLIP: 0x1e
+ ?
+ PC_PM_ID: 3
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x26043157
+ RX_LANE_MAP: 0x26043157
+ TX_POLARITY_FLIP: 0xf0
+ RX_POLARITY_FLIP: 0xd7
+ ?
+ PC_PM_ID: 4
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57314062
+ RX_LANE_MAP: 0x57314062
+ TX_POLARITY_FLIP: 0x9c
+ RX_POLARITY_FLIP: 0xe1
+ ?
+ PC_PM_ID: 5
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x47315062
+ RX_LANE_MAP: 0x47315062
+ TX_POLARITY_FLIP: 0x8d
+ RX_POLARITY_FLIP: 0x37
+ ?
+ PC_PM_ID: 6
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x25371046
+ RX_LANE_MAP: 0x25371046
+ TX_POLARITY_FLIP: 0x4a
+ RX_POLARITY_FLIP: 0xca
+ ?
+ PC_PM_ID: 7
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46107352
+ RX_LANE_MAP: 0x46107352
+ TX_POLARITY_FLIP: 0x4d
+ RX_POLARITY_FLIP: 0x4f
+ ?
+ PC_PM_ID: 8
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46103572
+ RX_LANE_MAP: 0x10462537
+ TX_POLARITY_FLIP: 0x49
+ RX_POLARITY_FLIP: 0x43
+ ?
+ PC_PM_ID: 9
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46107352
+ RX_LANE_MAP: 0x46107352
+ TX_POLARITY_FLIP: 0x4d
+ RX_POLARITY_FLIP: 0x4f
+ ?
+ PC_PM_ID: 10
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x10462375
+ RX_LANE_MAP: 0x10462375
+ TX_POLARITY_FLIP: 0xe1
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 11
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46107352
+ RX_LANE_MAP: 0x46107352
+ TX_POLARITY_FLIP: 0x4d
+ RX_POLARITY_FLIP: 0x4f
+ ?
+ PC_PM_ID: 12
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x10462375
+ RX_LANE_MAP: 0x10462375
+ TX_POLARITY_FLIP: 0xe1
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 13
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46107352
+ RX_LANE_MAP: 0x46107352
+ TX_POLARITY_FLIP: 0x4d
+ RX_POLARITY_FLIP: 0x5f
+ ?
+ PC_PM_ID: 14
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x10462375
+ RX_LANE_MAP: 0x10462375
+ TX_POLARITY_FLIP: 0xe1
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 15
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46107352
+ RX_LANE_MAP: 0x46107352
+ TX_POLARITY_FLIP: 0x4d
+ RX_POLARITY_FLIP: 0x4f
+ ?
+ PC_PM_ID: 16
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x10462375
+ RX_LANE_MAP: 0x10462375
+ TX_POLARITY_FLIP: 0xe1
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 17
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x01463257
+ RX_LANE_MAP: 0x01463257
+ TX_POLARITY_FLIP: 0xcb
+ RX_POLARITY_FLIP: 0xa9
+ ?
+ PC_PM_ID: 18
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x52734601
+ RX_LANE_MAP: 0x52734601
+ TX_POLARITY_FLIP: 0xb3
+ RX_POLARITY_FLIP: 0x6e
+ ?
+ PC_PM_ID: 19
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x01463257
+ RX_LANE_MAP: 0x01463257
+ TX_POLARITY_FLIP: 0xcb
+ RX_POLARITY_FLIP: 0xa9
+ ?
+ PC_PM_ID: 20
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x52734601
+ RX_LANE_MAP: 0x52734601
+ TX_POLARITY_FLIP: 0xb3
+ RX_POLARITY_FLIP: 0x6e
+ ?
+ PC_PM_ID: 21
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x01463257
+ RX_LANE_MAP: 0x01463257
+ TX_POLARITY_FLIP: 0xcb
+ RX_POLARITY_FLIP: 0xa9
+ ?
+ PC_PM_ID: 22
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x52734601
+ RX_LANE_MAP: 0x52734601
+ TX_POLARITY_FLIP: 0xb3
+ RX_POLARITY_FLIP: 0x6e
+ ?
+ PC_PM_ID: 23
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x01463257
+ RX_LANE_MAP: 0x01463257
+ TX_POLARITY_FLIP: 0xcb
+ RX_POLARITY_FLIP: 0xa9
+ ?
+ PC_PM_ID: 24
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x52734601
+ RX_LANE_MAP: 0x52734601
+ TX_POLARITY_FLIP: 0xb3
+ RX_POLARITY_FLIP: 0x6e
+ ?
+ PC_PM_ID: 25
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x46015732
+ RX_LANE_MAP: 0x46015732
+ TX_POLARITY_FLIP: 0x3e
+ RX_POLARITY_FLIP: 0xf3
+ ?
+ PC_PM_ID: 26
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x52734601
+ RX_LANE_MAP: 0x52734601
+ TX_POLARITY_FLIP: 0xb3
+ RX_POLARITY_FLIP: 0x6e
+ ?
+ PC_PM_ID: 27
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324601
+ RX_LANE_MAP: 0x57324601
+ TX_POLARITY_FLIP: 0xe1
+ RX_POLARITY_FLIP: 0x7f
+ ?
+ PC_PM_ID: 28
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x41507632
+ RX_LANE_MAP: 0x41507632
+ TX_POLARITY_FLIP: 0x8d
+ RX_POLARITY_FLIP: 0xcf
+ ?
+ PC_PM_ID: 29
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x51734620
+ RX_LANE_MAP: 0x51734620
+ TX_POLARITY_FLIP: 0xc9
+ RX_POLARITY_FLIP: 0xd1
+ ?
+ PC_PM_ID: 30
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x20463715
+ RX_LANE_MAP: 0x20463715
+ TX_POLARITY_FLIP: 0xff
+ RX_POLARITY_FLIP: 0x72
+ ?
+ PC_PM_ID: 31
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x51734620
+ RX_LANE_MAP: 0x51734620
+ TX_POLARITY_FLIP: 0xc9
+ RX_POLARITY_FLIP: 0x51
+ ?
+ PC_PM_ID: 32
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x20463715
+ RX_LANE_MAP: 0x20463715
+ TX_POLARITY_FLIP: 0xff
+ RX_POLARITY_FLIP: 0x72
+ ?
+ PC_PM_ID: 33
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x26043157
+ RX_LANE_MAP: 0x26043157
+ TX_POLARITY_FLIP: 0xff
+ RX_POLARITY_FLIP: 0x7
+ ?
+ PC_PM_ID: 34
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57314062
+ RX_LANE_MAP: 0x57314062
+ TX_POLARITY_FLIP: 0x9c
+ RX_POLARITY_FLIP: 0x81
+ ?
+ PC_PM_ID: 35
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x26043157
+ RX_LANE_MAP: 0x26043157
+ TX_POLARITY_FLIP: 0xff
+ RX_POLARITY_FLIP: 0xa7
+ ?
+ PC_PM_ID: 36
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57314062
+ RX_LANE_MAP: 0x57314062
+ TX_POLARITY_FLIP: 0x9c
+ RX_POLARITY_FLIP: 0x81
+ ?
+ PC_PM_ID: 37
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x45017263
+ RX_LANE_MAP: 0x45017263
+ TX_POLARITY_FLIP: 0x8e
+ RX_POLARITY_FLIP: 0x9e
+ ?
+ PC_PM_ID: 38
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x01463257
+ RX_LANE_MAP: 0x01463257
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0x43
+ ?
+ PC_PM_ID: 39
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324160
+ RX_LANE_MAP: 0x57324160
+ TX_POLARITY_FLIP: 0xe5
+ RX_POLARITY_FLIP: 0x7b
+ ?
+ PC_PM_ID: 40
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x32570146
+ RX_LANE_MAP: 0x32570146
+ TX_POLARITY_FLIP: 0x43
+ RX_POLARITY_FLIP: 0x30
+ ?
+ PC_PM_ID: 41
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324160
+ RX_LANE_MAP: 0x57324160
+ TX_POLARITY_FLIP: 0xe5
+ RX_POLARITY_FLIP: 0x7b
+ ?
+ PC_PM_ID: 42
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324601
+ RX_LANE_MAP: 0x57324601
+ TX_POLARITY_FLIP: 0x1c
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 43
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324160
+ RX_LANE_MAP: 0x57324160
+ TX_POLARITY_FLIP: 0xe5
+ RX_POLARITY_FLIP: 0x7b
+ ?
+ PC_PM_ID: 44
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324601
+ RX_LANE_MAP: 0x57324601
+ TX_POLARITY_FLIP: 0x1c
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 45
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324160
+ RX_LANE_MAP: 0x57324160
+ TX_POLARITY_FLIP: 0xe5
+ RX_POLARITY_FLIP: 0x7b
+ ?
+ PC_PM_ID: 46
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324601
+ RX_LANE_MAP: 0x57324601
+ TX_POLARITY_FLIP: 0x1c
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 47
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324160
+ RX_LANE_MAP: 0x57324160
+ TX_POLARITY_FLIP: 0xe5
+ RX_POLARITY_FLIP: 0x7b
+ ?
+ PC_PM_ID: 48
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x57324601
+ RX_LANE_MAP: 0x57324601
+ TX_POLARITY_FLIP: 0x1c
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 49
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x75234610
+ RX_LANE_MAP: 0x75234610
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0x94
+ ?
+ PC_PM_ID: 50
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x40617523
+ RX_LANE_MAP: 0x40617523
+ TX_POLARITY_FLIP: 0x2b
+ RX_POLARITY_FLIP: 0x69
+ ?
+ PC_PM_ID: 51
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x75234610
+ RX_LANE_MAP: 0x75234610
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0x94
+ ?
+ PC_PM_ID: 52
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x40617523
+ RX_LANE_MAP: 0x40617523
+ TX_POLARITY_FLIP: 0x2b
+ RX_POLARITY_FLIP: 0x69
+ ?
+ PC_PM_ID: 53
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x75234610
+ RX_LANE_MAP: 0x75234610
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0x94
+ ?
+ PC_PM_ID: 54
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x40617523
+ RX_LANE_MAP: 0x40617523
+ TX_POLARITY_FLIP: 0x2b
+ RX_POLARITY_FLIP: 0x69
+ ?
+ PC_PM_ID: 55
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x75234610
+ RX_LANE_MAP: 0x75234610
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0x94
+ ?
+ PC_PM_ID: 56
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x40617523
+ RX_LANE_MAP: 0x40617523
+ TX_POLARITY_FLIP: 0x2b
+ RX_POLARITY_FLIP: 0x69
+ ?
+ PC_PM_ID: 57
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73524610
+ RX_LANE_MAP: 0x73524610
+ TX_POLARITY_FLIP: 0xd4
+ RX_POLARITY_FLIP: 0xed
+ ?
+ PC_PM_ID: 58
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x40617523
+ RX_LANE_MAP: 0x40617523
+ TX_POLARITY_FLIP: 0x2b
+ RX_POLARITY_FLIP: 0x69
+ ?
+ PC_PM_ID: 59
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x23751604
+ RX_LANE_MAP: 0x23751604
+ TX_POLARITY_FLIP: 0x19
+ RX_POLARITY_FLIP: 0x99
+ ?
+ PC_PM_ID: 60
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x41735620
+ RX_LANE_MAP: 0x41735620
+ TX_POLARITY_FLIP: 0x8b
+ RX_POLARITY_FLIP: 0xc
+ ?
+ PC_PM_ID: 61
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x20463715
+ RX_LANE_MAP: 0x20463715
+ TX_POLARITY_FLIP: 0x9c
+ RX_POLARITY_FLIP: 0xe1
+ ?
+ PC_PM_ID: 62
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x51734620
+ RX_LANE_MAP: 0x51734620
+ TX_POLARITY_FLIP: 0xf0
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 63
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x20463715
+ RX_LANE_MAP: 0x20463715
+ TX_POLARITY_FLIP: 0x9c
+ RX_POLARITY_FLIP: 0xe9
+ ?
+ PC_PM_ID: 64
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x51734620
+ RX_LANE_MAP: 0x51734620
+ TX_POLARITY_FLIP: 0xf0
+ RX_POLARITY_FLIP: 0x20
+...
+
+---
+device:
+ 0:
+ PC_PORT_PHYS_MAP:
+ ?
+ # CPU port
+ PORT_ID: 0
+ :
+ PC_PHYS_PORT_ID: 0
+ ?
+ PORT_ID: 1
+ :
+ PC_PHYS_PORT_ID: 1
+ ?
+ PORT_ID: 3
+ :
+ PC_PHYS_PORT_ID: 5
+ ?
+ PORT_ID: 5
+ :
+ PC_PHYS_PORT_ID: 9
+ ?
+ PORT_ID: 7
+ :
+ PC_PHYS_PORT_ID: 13
+ ?
+ PORT_ID: 11
+ :
+ PC_PHYS_PORT_ID: 17
+ ?
+ PORT_ID: 13
+ :
+ PC_PHYS_PORT_ID: 21
+ ?
+ PORT_ID: 15
+ :
+ PC_PHYS_PORT_ID: 25
+ ?
+ PORT_ID: 17
+ :
+ PC_PHYS_PORT_ID: 29
+ ?
+ PORT_ID: 22
+ :
+ PC_PHYS_PORT_ID: 33
+ ?
+ PORT_ID: 24
+ :
+ PC_PHYS_PORT_ID: 37
+ ?
+ PORT_ID: 26
+ :
+ PC_PHYS_PORT_ID: 41
+ ?
+ PORT_ID: 28
+ :
+ PC_PHYS_PORT_ID: 45
+ ?
+ PORT_ID: 33
+ :
+ PC_PHYS_PORT_ID: 49
+ ?
+ PORT_ID: 35
+ :
+ PC_PHYS_PORT_ID: 53
+ ?
+ PORT_ID: 37
+ :
+ PC_PHYS_PORT_ID: 57
+ ?
+ PORT_ID: 39
+ :
+ PC_PHYS_PORT_ID: 61
+ ?
+ PORT_ID: 44
+ :
+ PC_PHYS_PORT_ID: 65
+ ?
+ PORT_ID: 46
+ :
+ PC_PHYS_PORT_ID: 69
+ ?
+ PORT_ID: 48
+ :
+ PC_PHYS_PORT_ID: 73
+ ?
+ PORT_ID: 50
+ :
+ PC_PHYS_PORT_ID: 77
+ ?
+ PORT_ID: 55
+ :
+ PC_PHYS_PORT_ID: 81
+ ?
+ PORT_ID: 57
+ :
+ PC_PHYS_PORT_ID: 85
+ ?
+ PORT_ID: 59
+ :
+ PC_PHYS_PORT_ID: 89
+ ?
+ PORT_ID: 61
+ :
+ PC_PHYS_PORT_ID: 93
+ ?
+ PORT_ID: 66
+ :
+ PC_PHYS_PORT_ID: 97
+ ?
+ PORT_ID: 68
+ :
+ PC_PHYS_PORT_ID: 101
+ ?
+ PORT_ID: 70
+ :
+ PC_PHYS_PORT_ID: 105
+ ?
+ PORT_ID: 72
+ :
+ PC_PHYS_PORT_ID: 109
+ ?
+ PORT_ID: 77
+ :
+ PC_PHYS_PORT_ID: 113
+ ?
+ PORT_ID: 79
+ :
+ PC_PHYS_PORT_ID: 117
+ ?
+ PORT_ID: 81
+ :
+ PC_PHYS_PORT_ID: 121
+ ?
+ PORT_ID: 83
+ :
+ PC_PHYS_PORT_ID: 125
+ ?
+ PORT_ID: 88
+ :
+ PC_PHYS_PORT_ID: 129
+ ?
+ PORT_ID: 90
+ :
+ PC_PHYS_PORT_ID: 133
+ ?
+ PORT_ID: 92
+ :
+ PC_PHYS_PORT_ID: 137
+ ?
+ PORT_ID: 94
+ :
+ PC_PHYS_PORT_ID: 141
+ ?
+ PORT_ID: 99
+ :
+ PC_PHYS_PORT_ID: 145
+ ?
+ PORT_ID: 101
+ :
+ PC_PHYS_PORT_ID: 149
+ ?
+ PORT_ID: 103
+ :
+ PC_PHYS_PORT_ID: 153
+ ?
+ PORT_ID: 105
+ :
+ PC_PHYS_PORT_ID: 157
+ ?
+ PORT_ID: 110
+ :
+ PC_PHYS_PORT_ID: 161
+ ?
+ PORT_ID: 112
+ :
+ PC_PHYS_PORT_ID: 165
+ ?
+ PORT_ID: 114
+ :
+ PC_PHYS_PORT_ID: 169
+ ?
+ PORT_ID: 116
+ :
+ PC_PHYS_PORT_ID: 173
+ ?
+ PORT_ID: 121
+ :
+ PC_PHYS_PORT_ID: 177
+ ?
+ PORT_ID: 123
+ :
+ PC_PHYS_PORT_ID: 181
+ ?
+ PORT_ID: 125
+ :
+ PC_PHYS_PORT_ID: 185
+ ?
+ PORT_ID: 127
+ :
+ PC_PHYS_PORT_ID: 189
+ ?
+ PORT_ID: 132
+ :
+ PC_PHYS_PORT_ID: 193
+ ?
+ PORT_ID: 134
+ :
+ PC_PHYS_PORT_ID: 197
+ ?
+ PORT_ID: 136
+ :
+ PC_PHYS_PORT_ID: 201
+ ?
+ PORT_ID: 138
+ :
+ PC_PHYS_PORT_ID: 205
+ ?
+ PORT_ID: 143
+ :
+ PC_PHYS_PORT_ID: 209
+ ?
+ PORT_ID: 145
+ :
+ PC_PHYS_PORT_ID: 213
+ ?
+ PORT_ID: 147
+ :
+ PC_PHYS_PORT_ID: 217
+ ?
+ PORT_ID: 149
+ :
+ PC_PHYS_PORT_ID: 221
+ ?
+ PORT_ID: 154
+ :
+ PC_PHYS_PORT_ID: 225
+ ?
+ PORT_ID: 156
+ :
+ PC_PHYS_PORT_ID: 229
+ ?
+ PORT_ID: 158
+ :
+ PC_PHYS_PORT_ID: 233
+ ?
+ PORT_ID: 160
+ :
+ PC_PHYS_PORT_ID: 237
+ ?
+ PORT_ID: 165
+ :
+ PC_PHYS_PORT_ID: 241
+ ?
+ PORT_ID: 167
+ :
+ PC_PHYS_PORT_ID: 245
+ ?
+ PORT_ID: 169
+ :
+ PC_PHYS_PORT_ID: 249
+ ?
+ PORT_ID: 171
+ :
+ PC_PHYS_PORT_ID: 253
+ ?
+ PORT_ID: 176
+ :
+ PC_PHYS_PORT_ID: 257
+ ?
+ PORT_ID: 178
+ :
+ PC_PHYS_PORT_ID: 261
+ ?
+ PORT_ID: 180
+ :
+ PC_PHYS_PORT_ID: 265
+ ?
+ PORT_ID: 182
+ :
+ PC_PHYS_PORT_ID: 269
+ ?
+ PORT_ID: 187
+ :
+ PC_PHYS_PORT_ID: 273
+ ?
+ PORT_ID: 189
+ :
+ PC_PHYS_PORT_ID: 277
+ ?
+ PORT_ID: 191
+ :
+ PC_PHYS_PORT_ID: 281
+ ?
+ PORT_ID: 193
+ :
+ PC_PHYS_PORT_ID: 285
+ ?
+ PORT_ID: 198
+ :
+ PC_PHYS_PORT_ID: 289
+ ?
+ PORT_ID: 200
+ :
+ PC_PHYS_PORT_ID: 293
+ ?
+ PORT_ID: 202
+ :
+ PC_PHYS_PORT_ID: 297
+ ?
+ PORT_ID: 204
+ :
+ PC_PHYS_PORT_ID: 301
+ ?
+ PORT_ID: 209
+ :
+ PC_PHYS_PORT_ID: 305
+ ?
+ PORT_ID: 211
+ :
+ PC_PHYS_PORT_ID: 309
+ ?
+ PORT_ID: 213
+ :
+ PC_PHYS_PORT_ID: 313
+ ?
+ PORT_ID: 215
+ :
+ PC_PHYS_PORT_ID: 317
+ ?
+ PORT_ID: 220
+ :
+ PC_PHYS_PORT_ID: 321
+ ?
+ PORT_ID: 222
+ :
+ PC_PHYS_PORT_ID: 325
+ ?
+ PORT_ID: 224
+ :
+ PC_PHYS_PORT_ID: 329
+ ?
+ PORT_ID: 226
+ :
+ PC_PHYS_PORT_ID: 333
+ ?
+ PORT_ID: 231
+ :
+ PC_PHYS_PORT_ID: 337
+ ?
+ PORT_ID: 233
+ :
+ PC_PHYS_PORT_ID: 341
+ ?
+ PORT_ID: 235
+ :
+ PC_PHYS_PORT_ID: 345
+ ?
+ PORT_ID: 237
+ :
+ PC_PHYS_PORT_ID: 349
+ ?
+ PORT_ID: 242
+ :
+ PC_PHYS_PORT_ID: 353
+ ?
+ PORT_ID: 244
+ :
+ PC_PHYS_PORT_ID: 357
+ ?
+ PORT_ID: 246
+ :
+ PC_PHYS_PORT_ID: 361
+ ?
+ PORT_ID: 248
+ :
+ PC_PHYS_PORT_ID: 365
+ ?
+ PORT_ID: 253
+ :
+ PC_PHYS_PORT_ID: 369
+ ?
+ PORT_ID: 255
+ :
+ PC_PHYS_PORT_ID: 373
+ ?
+ PORT_ID: 257
+ :
+ PC_PHYS_PORT_ID: 377
+ ?
+ PORT_ID: 259
+ :
+ PC_PHYS_PORT_ID: 381
+ ?
+ PORT_ID: 264
+ :
+ PC_PHYS_PORT_ID: 385
+ ?
+ PORT_ID: 266
+ :
+ PC_PHYS_PORT_ID: 389
+ ?
+ PORT_ID: 268
+ :
+ PC_PHYS_PORT_ID: 393
+ ?
+ PORT_ID: 270
+ :
+ PC_PHYS_PORT_ID: 397
+ ?
+ PORT_ID: 275
+ :
+ PC_PHYS_PORT_ID: 401
+ ?
+ PORT_ID: 277
+ :
+ PC_PHYS_PORT_ID: 405
+ ?
+ PORT_ID: 279
+ :
+ PC_PHYS_PORT_ID: 409
+ ?
+ PORT_ID: 281
+ :
+ PC_PHYS_PORT_ID: 413
+ ?
+ PORT_ID: 286
+ :
+ PC_PHYS_PORT_ID: 417
+ ?
+ PORT_ID: 288
+ :
+ PC_PHYS_PORT_ID: 421
+ ?
+ PORT_ID: 290
+ :
+ PC_PHYS_PORT_ID: 425
+ ?
+ PORT_ID: 292
+ :
+ PC_PHYS_PORT_ID: 429
+ ?
+ PORT_ID: 297
+ :
+ PC_PHYS_PORT_ID: 433
+ ?
+ PORT_ID: 299
+ :
+ PC_PHYS_PORT_ID: 437
+ ?
+ PORT_ID: 301
+ :
+ PC_PHYS_PORT_ID: 441
+ ?
+ PORT_ID: 303
+ :
+ PC_PHYS_PORT_ID: 445
+ ?
+ PORT_ID: 308
+ :
+ PC_PHYS_PORT_ID: 449
+ ?
+ PORT_ID: 310
+ :
+ PC_PHYS_PORT_ID: 453
+ ?
+ PORT_ID: 312
+ :
+ PC_PHYS_PORT_ID: 457
+ ?
+ PORT_ID: 314
+ :
+ PC_PHYS_PORT_ID: 461
+ ?
+ PORT_ID: 319
+ :
+ PC_PHYS_PORT_ID: 465
+ ?
+ PORT_ID: 321
+ :
+ PC_PHYS_PORT_ID: 469
+ ?
+ PORT_ID: 323
+ :
+ PC_PHYS_PORT_ID: 473
+ ?
+ PORT_ID: 325
+ :
+ PC_PHYS_PORT_ID: 477
+ ?
+ PORT_ID: 330
+ :
+ PC_PHYS_PORT_ID: 481
+ ?
+ PORT_ID: 332
+ :
+ PC_PHYS_PORT_ID: 485
+ ?
+ PORT_ID: 334
+ :
+ PC_PHYS_PORT_ID: 489
+ ?
+ PORT_ID: 336
+ :
+ PC_PHYS_PORT_ID: 493
+ ?
+ PORT_ID: 341
+ :
+ PC_PHYS_PORT_ID: 497
+ ?
+ PORT_ID: 343
+ :
+ PC_PHYS_PORT_ID: 501
+ ?
+ PORT_ID: 345
+ :
+ PC_PHYS_PORT_ID: 505
+ ?
+ PORT_ID: 347
+ :
+ PC_PHYS_PORT_ID: 509
+...
+
+---
+device:
+ 0:
+ PC_PORT:
+ ?
+ PORT_ID: 0
+ :
+ ENABLE: 1
+ SPEED: 10000
+ NUM_LANES: 1
+ ?
+ PORT_ID: [1, 3, 5, 7, 11, 13, 15, 17, 22, 24, 26, 28, 33, 35, 37, 39, 44, 46, 48, 50, 55, 57, 59, 61, 66, 68, 70, 72, 77, 79, 81, 83, 88, 90, 92, 94, 99, 101, 103, 105, 110, 112, 114, 116, 121, 123, 125, 127, 132, 134, 136, 138, 143, 145, 147, 149, 154, 156, 158, 160, 165, 167, 169, 171, 176, 178, 180, 182, 187, 189, 191, 193, 198, 200, 202, 204, 209, 211, 213, 215, 220, 222, 224, 226, 231, 233, 235, 237, 242, 244, 246, 248, 253, 255, 257, 259, 264, 266, 268, 270, 275, 277, 279, 281, 286, 288, 290, 292, 297, 299, 301, 303, 308, 310, 312, 314, 319, 321, 323, 325, 330, 332, 334, 336, 341, 343, 345, 347]
+ :
+ ENABLE: 1
+ SPEED: 400000
+ NUM_LANES: 4
+ FEC_MODE: PC_FEC_RS544_2XN
+ LINK_TRAINING: 0
+ MAX_FRAME_SIZE: 9416
+...
+
+---
+device:
+ 0:
+ PC_PMD_FIRMWARE:
+ ?
+ PORT_ID: [1, 3, 5, 7, 11, 13, 15, 17, 22, 24, 26, 28, 33, 35, 37, 39, 44, 46, 48, 50, 55, 57, 59, 61, 66, 68, 70, 72, 77, 79, 81, 83, 88, 90, 92, 94, 99, 101, 103, 105, 110, 112, 114, 116, 121, 123, 125, 127, 132, 134, 136, 138, 143, 145, 147, 149, 154, 156, 158, 160, 165, 167, 169, 171, 176, 178, 180, 182, 187, 189, 191, 193, 198, 200, 202, 204, 209, 211, 213, 215, 220, 222, 224, 226, 231, 233, 235, 237, 242, 244, 246, 248, 253, 255, 257, 259, 264, 266, 268, 270, 275, 277, 279, 281, 286, 288, 290, 292, 297, 299, 301, 303, 308, 310, 312, 314, 319, 321, 323, 325, 330, 332, 334, 336, 341, 343, 345, 347]
+ :
+ MEDIUM_TYPE_AUTO: 0
+ MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE
+...
+
+---
+device:
+ 0:
+ TM_SCHEDULER_CONFIG:
+ NUM_MC_Q: NUM_MC_Q_4
+...
+---
+device:
+ 0:
+ FP_CONFIG:
+ FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+bcm_device:
+ 0:
+ global:
+ bcm_tunnel_term_compatible_mode: 1
+ vlan_flooding_l2mc_num_reserved: 2048
+ l3_alpm_template: 2
+ l3_alpm2_bnk_threshold: 100
+ uft_mode: 1
+ l3_enable: 1
+ l2_hitbit_enable: 0
+ pktio_mode: 1
+ sai_pfc_defaults_disable: 1
+ sai_optimized_mmu: 1
+ sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+...
+
+---
+bcm_device:
+ 0:
+ port:
+ "*":
+ encap_mode: IEEE
+ dport_map_enable: 1
+ 11:
+ dport_map_port: 1
+ 12:
+ dport_map_port: 2
+ 13:
+ dport_map_port: 3
+ 14:
+ dport_map_port: 4
+ 15:
+ dport_map_port: 5
+ 16:
+ dport_map_port: 6
+ 17:
+ dport_map_port: 7
+ 18:
+ dport_map_port: 8
+ 88:
+ dport_map_port: 9
+ 89:
+ dport_map_port: 10
+ 90:
+ dport_map_port: 11
+ 91:
+ dport_map_port: 12
+ 26:
+ dport_map_port: 13
+ 27:
+ dport_map_port: 14
+ 28:
+ dport_map_port: 15
+ 29:
+ dport_map_port: 16
+ 37:
+ dport_map_port: 17
+ 38:
+ dport_map_port: 18
+ 39:
+ dport_map_port: 19
+ 40:
+ dport_map_port: 20
+ 99:
+ dport_map_port: 21
+ 100:
+ dport_map_port: 22
+ 101:
+ dport_map_port: 23
+ 102:
+ dport_map_port: 24
+ 92:
+ dport_map_port: 25
+ 93:
+ dport_map_port: 26
+ 94:
+ dport_map_port: 27
+ 95:
+ dport_map_port: 28
+ 22:
+ dport_map_port: 29
+ 23:
+ dport_map_port: 30
+ 24:
+ dport_map_port: 31
+ 25:
+ dport_map_port: 32
+ 110:
+ dport_map_port: 33
+ 111:
+ dport_map_port: 34
+ 112:
+ dport_map_port: 35
+ 113:
+ dport_map_port: 36
+ 103:
+ dport_map_port: 37
+ 104:
+ dport_map_port: 38
+ 105:
+ dport_map_port: 39
+ 106:
+ dport_map_port: 40
+ 33:
+ dport_map_port: 41
+ 34:
+ dport_map_port: 42
+ 35:
+ dport_map_port: 43
+ 36:
+ dport_map_port: 44
+ 121:
+ dport_map_port: 45
+ 122:
+ dport_map_port: 46
+ 123:
+ dport_map_port: 47
+ 124:
+ dport_map_port: 48
+ 114:
+ dport_map_port: 49
+ 115:
+ dport_map_port: 50
+ 116:
+ dport_map_port: 51
+ 117:
+ dport_map_port: 52
+ 44:
+ dport_map_port: 53
+ 45:
+ dport_map_port: 54
+ 46:
+ dport_map_port: 55
+ 47:
+ dport_map_port: 56
+ 143:
+ dport_map_port: 57
+ 144:
+ dport_map_port: 58
+ 145:
+ dport_map_port: 59
+ 146:
+ dport_map_port: 60
+ 125:
+ dport_map_port: 61
+ 126:
+ dport_map_port: 62
+ 127:
+ dport_map_port: 63
+ 128:
+ dport_map_port: 64
+ 55:
+ dport_map_port: 65
+ 56:
+ dport_map_port: 66
+ 57:
+ dport_map_port: 67
+ 58:
+ dport_map_port: 68
+ 132:
+ dport_map_port: 69
+ 133:
+ dport_map_port: 70
+ 134:
+ dport_map_port: 71
+ 135:
+ dport_map_port: 72
+ 136:
+ dport_map_port: 73
+ 137:
+ dport_map_port: 74
+ 138:
+ dport_map_port: 75
+ 139:
+ dport_map_port: 76
+ 66:
+ dport_map_port: 77
+ 67:
+ dport_map_port: 78
+ 68:
+ dport_map_port: 79
+ 69:
+ dport_map_port: 80
+ 81:
+ dport_map_port: 81
+ 82:
+ dport_map_port: 82
+ 83:
+ dport_map_port: 83
+ 84:
+ dport_map_port: 84
+ 147:
+ dport_map_port: 85
+ 148:
+ dport_map_port: 86
+ 149:
+ dport_map_port: 87
+ 150:
+ dport_map_port: 88
+ 77:
+ dport_map_port: 89
+ 78:
+ dport_map_port: 90
+ 79:
+ dport_map_port: 91
+ 80:
+ dport_map_port: 92
+ 70:
+ dport_map_port: 93
+ 71:
+ dport_map_port: 94
+ 72:
+ dport_map_port: 95
+ 73:
+ dport_map_port: 96
+ 154:
+ dport_map_port: 97
+ 155:
+ dport_map_port: 98
+ 156:
+ dport_map_port: 99
+ 157:
+ dport_map_port: 100
+ 158:
+ dport_map_port: 101
+ 159:
+ dport_map_port: 102
+ 160:
+ dport_map_port: 103
+ 161:
+ dport_map_port: 104
+ 59:
+ dport_map_port: 105
+ 60:
+ dport_map_port: 106
+ 61:
+ dport_map_port: 107
+ 62:
+ dport_map_port: 108
+ 165:
+ dport_map_port: 109
+ 166:
+ dport_map_port: 110
+ 167:
+ dport_map_port: 111
+ 168:
+ dport_map_port: 112
+ 169:
+ dport_map_port: 113
+ 170:
+ dport_map_port: 114
+ 171:
+ dport_map_port: 115
+ 172:
+ dport_map_port: 116
+ 48:
+ dport_map_port: 117
+ 49:
+ dport_map_port: 118
+ 50:
+ dport_map_port: 119
+ 51:
+ dport_map_port: 120
+ 176:
+ dport_map_port: 121
+ 177:
+ dport_map_port: 122
+ 178:
+ dport_map_port: 123
+ 179:
+ dport_map_port: 124
+ 180:
+ dport_map_port: 125
+ 181:
+ dport_map_port: 126
+ 182:
+ dport_map_port: 127
+ 183:
+ dport_map_port: 128
+ 297:
+ dport_map_port: 129
+ 298:
+ dport_map_port: 130
+ 299:
+ dport_map_port: 131
+ 300:
+ dport_map_port: 132
+ 187:
+ dport_map_port: 133
+ 188:
+ dport_map_port: 134
+ 189:
+ dport_map_port: 135
+ 190:
+ dport_map_port: 136
+ 191:
+ dport_map_port: 137
+ 192:
+ dport_map_port: 138
+ 193:
+ dport_map_port: 139
+ 194:
+ dport_map_port: 140
+ 286:
+ dport_map_port: 141
+ 287:
+ dport_map_port: 142
+ 288:
+ dport_map_port: 143
+ 289:
+ dport_map_port: 144
+ 268:
+ dport_map_port: 145
+ 269:
+ dport_map_port: 146
+ 270:
+ dport_map_port: 147
+ 271:
+ dport_map_port: 148
+ 198:
+ dport_map_port: 149
+ 199:
+ dport_map_port: 150
+ 200:
+ dport_map_port: 151
+ 201:
+ dport_map_port: 152
+ 275:
+ dport_map_port: 153
+ 276:
+ dport_map_port: 154
+ 277:
+ dport_map_port: 155
+ 278:
+ dport_map_port: 156
+ 279:
+ dport_map_port: 157
+ 280:
+ dport_map_port: 158
+ 281:
+ dport_map_port: 159
+ 282:
+ dport_map_port: 160
+ 209:
+ dport_map_port: 161
+ 210:
+ dport_map_port: 162
+ 211:
+ dport_map_port: 163
+ 212:
+ dport_map_port: 164
+ 264:
+ dport_map_port: 165
+ 265:
+ dport_map_port: 166
+ 266:
+ dport_map_port: 167
+ 267:
+ dport_map_port: 168
+ 290:
+ dport_map_port: 169
+ 291:
+ dport_map_port: 170
+ 292:
+ dport_map_port: 171
+ 293:
+ dport_map_port: 172
+ 220:
+ dport_map_port: 173
+ 221:
+ dport_map_port: 174
+ 222:
+ dport_map_port: 175
+ 223:
+ dport_map_port: 176
+ 213:
+ dport_map_port: 177
+ 214:
+ dport_map_port: 178
+ 215:
+ dport_map_port: 179
+ 216:
+ dport_map_port: 180
+ 301:
+ dport_map_port: 181
+ 302:
+ dport_map_port: 182
+ 303:
+ dport_map_port: 183
+ 304:
+ dport_map_port: 184
+ 231:
+ dport_map_port: 185
+ 232:
+ dport_map_port: 186
+ 233:
+ dport_map_port: 187
+ 234:
+ dport_map_port: 188
+ 202:
+ dport_map_port: 189
+ 203:
+ dport_map_port: 190
+ 204:
+ dport_map_port: 191
+ 205:
+ dport_map_port: 192
+ 312:
+ dport_map_port: 193
+ 313:
+ dport_map_port: 194
+ 314:
+ dport_map_port: 195
+ 315:
+ dport_map_port: 196
+ 242:
+ dport_map_port: 197
+ 243:
+ dport_map_port: 198
+ 244:
+ dport_map_port: 199
+ 245:
+ dport_map_port: 200
+ 224:
+ dport_map_port: 201
+ 225:
+ dport_map_port: 202
+ 226:
+ dport_map_port: 203
+ 227:
+ dport_map_port: 204
+ 323:
+ dport_map_port: 205
+ 324:
+ dport_map_port: 206
+ 325:
+ dport_map_port: 207
+ 326:
+ dport_map_port: 208
+ 253:
+ dport_map_port: 209
+ 254:
+ dport_map_port: 210
+ 255:
+ dport_map_port: 211
+ 256:
+ dport_map_port: 212
+ 235:
+ dport_map_port: 213
+ 236:
+ dport_map_port: 214
+ 237:
+ dport_map_port: 215
+ 238:
+ dport_map_port: 216
+ 308:
+ dport_map_port: 217
+ 309:
+ dport_map_port: 218
+ 310:
+ dport_map_port: 219
+ 311:
+ dport_map_port: 220
+ 319:
+ dport_map_port: 221
+ 320:
+ dport_map_port: 222
+ 321:
+ dport_map_port: 223
+ 322:
+ dport_map_port: 224
+ 246:
+ dport_map_port: 225
+ 247:
+ dport_map_port: 226
+ 248:
+ dport_map_port: 227
+ 249:
+ dport_map_port: 228
+ 334:
+ dport_map_port: 229
+ 335:
+ dport_map_port: 230
+ 336:
+ dport_map_port: 231
+ 337:
+ dport_map_port: 232
+ 330:
+ dport_map_port: 233
+ 331:
+ dport_map_port: 234
+ 332:
+ dport_map_port: 235
+ 333:
+ dport_map_port: 236
+ 257:
+ dport_map_port: 237
+ 258:
+ dport_map_port: 238
+ 259:
+ dport_map_port: 239
+ 260:
+ dport_map_port: 240
+ 345:
+ dport_map_port: 241
+ 346:
+ dport_map_port: 242
+ 347:
+ dport_map_port: 243
+ 348:
+ dport_map_port: 244
+ 341:
+ dport_map_port: 245
+ 342:
+ dport_map_port: 246
+ 343:
+ dport_map_port: 247
+ 344:
+ dport_map_port: 248
+ 5:
+ dport_map_port: 249
+ 6:
+ dport_map_port: 250
+ 7:
+ dport_map_port: 251
+ 8:
+ dport_map_port: 252
+ 1:
+ dport_map_port: 253
+ 2:
+ dport_map_port: 254
+ 3:
+ dport_map_port: 255
+ 4:
+ dport_map_port: 256
+...
+
+---
+device:
+ 0:
+ PC_TX_TAPS:
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 124
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 6
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 90
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 90
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 90
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 90
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 101
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 101
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 101
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 101
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 6
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 112
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 112
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 112
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 112
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 123
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 145
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 145
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 145
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 145
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 134
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 134
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 134
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 134
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 6
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 6
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 83
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 83
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 83
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 83
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 72
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 61
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 61
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 61
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 61
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 50
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 50
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 50
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 50
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 299
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 299
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 299
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 299
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 6
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 288
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 288
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 288
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 288
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 6
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 277
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 277
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 277
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 277
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 266
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 266
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 266
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 266
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 215
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 215
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 215
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 215
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 204
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 204
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 204
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 204
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 226
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 226
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 226
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 226
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 237
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 237
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 237
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 237
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 248
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 248
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 248
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 248
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 259
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 13
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 13
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 13
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 13
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 17
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 28
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 28
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 28
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 28
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 39
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 39
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 39
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 39
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 94
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 94
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 94
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 94
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 24
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 24
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 24
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 24
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 105
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 105
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 105
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 105
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 35
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 35
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 35
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 35
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 116
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 116
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 116
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 116
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 46
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 46
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 46
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 46
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 127
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 57
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 57
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 57
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 57
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 138
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 138
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 138
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 138
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 68
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 149
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 149
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 149
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 149
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 79
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 79
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 79
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 79
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 156
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 156
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 156
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 156
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 160
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 160
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 160
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 160
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 167
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 167
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 167
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 167
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 171
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 171
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 171
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 171
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 178
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 182
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 189
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 189
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 189
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 189
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 193
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 193
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 193
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 193
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 270
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 270
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 270
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 270
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 200
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 200
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 200
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 200
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 281
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 281
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 281
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 281
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 211
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 211
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 211
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 211
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 292
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 292
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 292
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 292
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 222
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 222
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 222
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 222
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 303
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 303
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 303
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 303
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 233
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 233
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 233
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 233
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 314
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 314
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 314
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 314
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 244
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 244
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 244
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 244
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 325
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 325
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 325
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 325
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 255
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 310
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 310
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 310
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 310
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 321
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 321
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 321
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 321
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 336
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 336
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 336
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 336
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 332
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 332
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 332
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 332
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 347
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 347
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 347
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 347
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 343
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 343
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 343
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 343
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 7
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 7
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 7
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 7
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 3
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 3
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 3
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+ ?
+ PORT_ID: 3
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 36
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 128
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_POST3_SIGN: 0
+ TX_POST3_AUTO: 0
+ TX_POST3: 0
+...
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin
new file mode 100644
index 000000000000..c6bb453fff80
Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku
new file mode 100644
index 000000000000..cfa928b0da06
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku
@@ -0,0 +1 @@
+M2-W6940-128QC l2
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml
new file mode 100644
index 000000000000..b5267e84b154
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml
@@ -0,0 +1,11 @@
+
+
+
+
+
+
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py
new file mode 100755
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+ def __init__(self, message='fruerror', code=-100):
+ err = 'errcode: {0} message:{1}'.format(code, message)
+ Exception.__init__(self, err)
+ self.code = code
+ self.message = message
+
+
+def e_print(err):
+ print("ERROR: " + err)
+
+
+def d_print(debug_info):
+ if __DEBUG__ == "Y":
+ print(debug_info)
+
+
+class FruUtil():
+ @staticmethod
+ def decodeLength(value):
+ a = bitarray(8)
+ a.setall(True)
+ a[0:1] = 0
+ a[1:2] = 0
+ x = ord(a.tobytes())
+ return x & ord(value)
+
+ @staticmethod
+ def minToData():
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ endtime = datetime.now()
+ seconds = (endtime - starttime).total_seconds()
+ mins = seconds // 60
+ m = int(round(mins))
+ return m
+
+ @staticmethod
+ def getTimeFormat():
+ return datetime.now().strftime('%Y-%m-%d')
+
+ @staticmethod
+ def getTypeLength(value):
+ if value is None or len(value) == 0:
+ return 0
+ a = bitarray(8)
+ a.setall(False)
+ a[0:1] = 1
+ a[1:2] = 1
+ x = ord(a.tobytes())
+ return x | len(value)
+
+ @staticmethod
+ def checksum(b):
+ result = 0
+ for item in b:
+ result += ord(item)
+ return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+ SUGGESTED_SIZE_COMMON_HEADER = 8
+ SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+ SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+ SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+ SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+ INITVALUE = b'\x00'
+ resultvalue = INITVALUE * 256
+ COMMON_HEAD_VERSION = b'\x01'
+ __childList = None
+
+ def __init__(self, name="", size=0, offset=0):
+ self.__childList = []
+ self._offset = offset
+ self.name = name
+ self._size = size
+ self._isPresent = False
+ self._data = b'\x00' * size
+
+ @property
+ def childList(self):
+ return self.__childList
+
+ @childList.setter
+ def childList(self, value):
+ self.__childList = value
+
+ @property
+ def offset(self):
+ return self._offset
+
+ @offset.setter
+ def offset(self, value):
+ self._offset = value
+
+ @property
+ def size(self):
+ return self._size
+
+ @size.setter
+ def size(self, value):
+ self._size = value
+
+ @property
+ def data(self):
+ return self._data
+
+ @data.setter
+ def data(self, value):
+ self._data = value
+
+ @property
+ def isPresent(self):
+ return self._isPresent
+
+ @isPresent.setter
+ def isPresent(self, value):
+ self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+ pass
+
+
+class ChassisInfoArea(BaseArea):
+ pass
+
+
+class BoardInfoArea(BaseArea):
+ _boardTime = None
+ _fields = None
+ _mfg_date = None
+ areaversion = None
+ _boardversion = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "mfg_date : %s \n" \
+ "boardManufacturer : %s \n" \
+ "boardProductName : %s \n" \
+ "boardSerialNumber : %s \n" \
+ "boardPartNumber : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.boardversion), self.size,
+ self.language, self.getMfgRealData(),
+ self.boardManufacturer, self.boardProductName,
+ self.boardSerialNumber, self.boardPartNumber,
+ self.fruFileId)
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "boardextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["boardversion"] = ord(self.boardversion)
+ dic["boardlength"] = self.size
+ dic["boardlanguage"] = self.language
+ dic["boardmfg_date"] = self.getMfgRealData()
+ dic["boardManufacturer"] = self.boardManufacturer
+ dic["boardProductName"] = self.boardProductName
+ dic["boardSerialNumber"] = self.boardSerialNumber
+ dic["boardPartNumber"] = self.boardPartNumber
+ dic["boardfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index]
+ index += 1
+ d_print("decode length :%d class size:%d" %
+ ((ord(self.data[index]) * 8), self.size))
+ index += 2
+
+ timetmp = self.data[index: index + 3]
+ self.mfg_date = ord(timetmp[0]) | (
+ ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+ d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+ index += 3
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardProductName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardProductName:%s" % self.boardProductName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardPartNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if self.data[index] != chr(0xc1):
+ templen = FruUtil.decodeLength(self.data[index])
+ tmpval = self.data[index + 1: index + templen + 1]
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ else:
+ break
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("boardInfoArea version:%x" % ord(self.boardversion))
+ d_print("boardInfoArea length:%d" % self.size)
+ d_print("boardInfoArea language:%x" % self.language)
+ self.mfg_date = FruUtil.minToData()
+ d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+ self.data = chr(ord(self.boardversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ self.data += chr(self.mfg_date & 0xFF)
+ self.data += chr((self.mfg_date >> 8) & 0xFF)
+ self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+ d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+ typelength = FruUtil.getTypeLength(self.boardManufacturer)
+ self.data += chr(typelength)
+ self.data += self.boardManufacturer
+
+ d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+ self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+ self.data += self.boardProductName
+
+ d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+ self.data += self.boardSerialNumber
+
+ d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+ self.data += self.boardPartNumber
+
+ d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ d_print("self data:%d" % len(self.data))
+ d_print("self size:%d" % self.size)
+ d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+ # checksum
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+ def getMfgRealData(self):
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ mactime = starttime + timedelta(minutes=self.mfg_date)
+ return mactime
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def mfg_date(self):
+ return self._mfg_date
+
+ @mfg_date.setter
+ def mfg_date(self, val):
+ self._mfg_date = val
+
+ @property
+ def boardversion(self):
+ self._boardversion = self.COMMON_HEAD_VERSION
+ return self._boardversion
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, val):
+ self._FRUFileID = val
+
+ @property
+ def boardPartNumber(self):
+ return self._boardPartNumber
+
+ @boardPartNumber.setter
+ def boardPartNumber(self, val):
+ self._boardPartNumber = val
+
+ @property
+ def boardSerialNumber(self):
+ return self._boardSerialNumber
+
+ @boardSerialNumber.setter
+ def boardSerialNumber(self, val):
+ self._boardSerialNumber = val
+
+ @property
+ def boardProductName(self):
+ return self._boradProductName
+
+ @boardProductName.setter
+ def boardProductName(self, val):
+ self._boradProductName = val
+
+ @property
+ def boardManufacturer(self):
+ return self._boardManufacturer
+
+ @boardManufacturer.setter
+ def boardManufacturer(self, val):
+ self._boardManufacturer = val
+
+ @property
+ def boardTime(self):
+ return self._boardTime
+
+ @boardTime.setter
+ def boardTime(self, val):
+ self._boardTime = val
+
+ @property
+ def fields(self):
+ return self._fields
+
+ @fields.setter
+ def fields(self, val):
+ self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+ _productManufacturer = None
+ _productAssetTag = None
+ _FRUFileID = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "productManufacturer : %s \n" \
+ "productName : %s \n" \
+ "productPartModelName: %s \n" \
+ "productVersion : %s \n" \
+ "productSerialNumber : %s \n" \
+ "productAssetTag : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.areaversion), self.size,
+ self.language, self.productManufacturer,
+ self.productName, self.productPartModelName,
+ self.productVersion, self.productSerialNumber,
+ self.productAssetTag, self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "productextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["productversion"] = ord(self.areaversion)
+ dic["productlength"] = self.size
+ dic["productlanguage"] = self.language
+ dic["productManufacturer"] = self.productManufacturer
+ dic["productName"] = self.productName
+ dic["productPartModelName"] = self.productPartModelName
+ dic["productVersion"] = int(self.productVersion, 16)
+ dic["productSerialNumber"] = self.productSerialNumber
+ dic["productAssetTag"] = self.productAssetTag
+ dic["productfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index] # 0
+ index += 1
+ d_print("decode length %d" % (ord(self.data[index]) * 8))
+ d_print("class size %d" % self.size)
+ index += 2
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productName:%s" % self.productName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productPartModelName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productVersion = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productVersion:%s" % self.productVersion)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productAssetTag = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if self.data[index] != chr(0xc1) and index < self.size - 1:
+ templen = FruUtil.decodeLength(self.data[index])
+ if templen == 0:
+ break
+ tmpval = self.data[index + 1: index + templen + 1]
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ else:
+ break
+
+ @property
+ def productVersion(self):
+ return self._productVersion
+
+ @productVersion.setter
+ def productVersion(self, name):
+ self._productVersion = name
+
+ @property
+ def areaversion(self):
+ self._areaversion = self.COMMON_HEAD_VERSION
+ return self._areaversion
+
+ @areaversion.setter
+ def areaversion(self, name):
+ self._areaversion = name
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def productManufacturer(self):
+ return self._productManufacturer
+
+ @productManufacturer.setter
+ def productManufacturer(self, name):
+ self._productManufacturer = name
+
+ @property
+ def productName(self):
+ return self._productName
+
+ @productName.setter
+ def productName(self, name):
+ self._productName = name
+
+ @property
+ def productPartModelName(self):
+ return self._productPartModelName
+
+ @productPartModelName.setter
+ def productPartModelName(self, name):
+ self._productPartModelName = name
+
+ @property
+ def productSerialNumber(self):
+ return self._productSerialNumber
+
+ @productSerialNumber.setter
+ def productSerialNumber(self, name):
+ self._productSerialNumber = name
+
+ @property
+ def productAssetTag(self):
+ return self._productAssetTag
+
+ @productAssetTag.setter
+ def productAssetTag(self, name):
+ self._productAssetTag = name
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, name):
+ self._FRUFileID = name
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("product version:%x" % ord(self.areaversion))
+ d_print("product length:%d" % self.size)
+ d_print("product language:%x" % self.language)
+ self.data = chr(ord(self.areaversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ typelength = FruUtil.getTypeLength(self.productManufacturer)
+ self.data += chr(typelength)
+ self.data += self.productManufacturer
+
+ self.data += chr(FruUtil.getTypeLength(self.productName))
+ self.data += self.productName
+
+ self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+ self.data += self.productPartModelName
+
+ self.data += chr(FruUtil.getTypeLength(self.productVersion))
+ self.data += self.productVersion
+
+ self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+ self.data += self.productSerialNumber
+
+ self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+ if self.productAssetTag is not None:
+ self.data += self.productAssetTag
+
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+ d_print("self.data:%d" % len(self.data))
+ d_print("self.size:%d" % self.size)
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+ pass
+
+
+class Field(object):
+
+ def __init__(self, fieldType="ASCII", fieldData=""):
+ self.fieldData = fieldData
+ self.fieldType = fieldType
+
+ @property
+ def fieldType(self):
+ return self.fieldType
+
+ @property
+ def fieldData(self):
+ return self.fieldData
+
+
+class ipmifru(BaseArea):
+ _BoardInfoArea = None
+ _ProductInfoArea = None
+ _InternalUseArea = None
+ _ChassisInfoArea = None
+ _multiRecordArea = None
+ _productinfoAreaOffset = BaseArea.INITVALUE
+ _boardInfoAreaOffset = BaseArea.INITVALUE
+ _internalUserAreaOffset = BaseArea.INITVALUE
+ _chassicInfoAreaOffset = BaseArea.INITVALUE
+ _multiRecordAreaOffset = BaseArea.INITVALUE
+ _bindata = None
+ _bodybin = None
+ _version = BaseArea.COMMON_HEAD_VERSION
+ _zeroCheckSum = None
+ _frusize = 256
+
+ def __str__(self):
+ tmpstr = ""
+ if self.boardInfoArea.isPresent:
+ tmpstr += "\nboardinfoarea: \n"
+ tmpstr += self.boardInfoArea.__str__()
+ if self.productInfoArea.isPresent:
+ tmpstr += "\nproductinfoarea: \n"
+ tmpstr += self.productInfoArea.__str__()
+ return tmpstr
+
+ def decodeBin(self, eeprom):
+ commonHead = eeprom[0:8]
+ d_print("decode version %x" % ord(commonHead[0]))
+ if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+ raise FruException("HEAD VERSION error,not Fru format!", -10)
+ if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+ strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+ raise FruException(strtemp, -3)
+ if ord(commonHead[1]) != ord(self.INITVALUE):
+ d_print("Internal Use Area is present")
+ self.internalUseArea = InternalUseArea(
+ name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+ self.internalUseArea.isPresent = True
+ self.internalUserAreaOffset = ord(commonHead[1])
+ self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+ self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+ if ord(commonHead[2]) != ord(self.INITVALUE):
+ d_print("Chassis Info Area is present")
+ self.chassisInfoArea = ChassisInfoArea(
+ name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+ self.chassisInfoArea.isPresent = True
+ self.chassicInfoAreaOffset = ord(commonHead[2])
+ self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+ self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+ if ord(commonHead[3]) != ord(self.INITVALUE):
+ self.boardInfoArea = BoardInfoArea(
+ name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+ self.boardInfoArea.isPresent = True
+ self.boardInfoAreaOffset = ord(commonHead[3])
+ self.boardInfoArea.size = ord(
+ eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+ d_print("Board Info Area is present size:%d" %
+ (self.boardInfoArea.size))
+ self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+ self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+ if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+ strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \
+ (FruUtil.checksum(
+ self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.boardInfoArea.decodedata()
+ if ord(commonHead[4]) != ord(self.INITVALUE):
+ d_print("Product Info Area is present")
+ self.productInfoArea = ProductInfoArea(
+ name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+ self.productInfoArea.isPresent = True
+ self.productinfoAreaOffset = ord(commonHead[4])
+ d_print("length offset value: %02x" %
+ ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+ self.productInfoArea.size = ord(
+ eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+ d_print("Product Info Area is present size:%d" %
+ (self.productInfoArea.size))
+
+ self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+ self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+ if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+ strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.productInfoArea.decodedata()
+ if ord(commonHead[5]) != ord(self.INITVALUE):
+ self.multiRecordArea = MultiRecordArea(
+ name="MultiRecord record Area ")
+ d_print("MultiRecord record present")
+ self.multiRecordArea.isPresent = True
+ self.multiRecordAreaOffset = ord(commonHead[5])
+ self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+ self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+ def initDefault(self):
+ self.version = self.COMMON_HEAD_VERSION
+ self.internalUserAreaOffset = self.INITVALUE
+ self.chassicInfoAreaOffset = self.INITVALUE
+ self.boardInfoAreaOffset = self.INITVALUE
+ self.productinfoAreaOffset = self.INITVALUE
+ self.multiRecordAreaOffset = self.INITVALUE
+ self.zeroCheckSum = self.INITVALUE
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ self.productInfoArea = None
+ self.internalUseArea = None
+ self.boardInfoArea = None
+ self.chassisInfoArea = None
+ self.multiRecordArea = None
+ # self.recalcute()
+
+ @property
+ def version(self):
+ return self._version
+
+ @version.setter
+ def version(self, name):
+ self._version = name
+
+ @property
+ def internalUserAreaOffset(self):
+ return self._internalUserAreaOffset
+
+ @internalUserAreaOffset.setter
+ def internalUserAreaOffset(self, obj):
+ self._internalUserAreaOffset = obj
+
+ @property
+ def chassicInfoAreaOffset(self):
+ return self._chassicInfoAreaOffset
+
+ @chassicInfoAreaOffset.setter
+ def chassicInfoAreaOffset(self, obj):
+ self._chassicInfoAreaOffset = obj
+
+ @property
+ def productinfoAreaOffset(self):
+ return self._productinfoAreaOffset
+
+ @productinfoAreaOffset.setter
+ def productinfoAreaOffset(self, obj):
+ self._productinfoAreaOffset = obj
+
+ @property
+ def boardInfoAreaOffset(self):
+ return self._boardInfoAreaOffset
+
+ @boardInfoAreaOffset.setter
+ def boardInfoAreaOffset(self, obj):
+ self._boardInfoAreaOffset = obj
+
+ @property
+ def multiRecordAreaOffset(self):
+ return self._multiRecordAreaOffset
+
+ @multiRecordAreaOffset.setter
+ def multiRecordAreaOffset(self, obj):
+ self._multiRecordAreaOffset = obj
+
+ @property
+ def zeroCheckSum(self):
+ return self._zeroCheckSum
+
+ @zeroCheckSum.setter
+ def zeroCheckSum(self, obj):
+ self._zeroCheckSum = obj
+
+ @property
+ def productInfoArea(self):
+ return self._ProductInfoArea
+
+ @productInfoArea.setter
+ def productInfoArea(self, obj):
+ self._ProductInfoArea = obj
+
+ @property
+ def internalUseArea(self):
+ return self._InternalUseArea
+
+ @internalUseArea.setter
+ def internalUseArea(self, obj):
+ self.internalUseArea = obj
+
+ @property
+ def boardInfoArea(self):
+ return self._BoardInfoArea
+
+ @boardInfoArea.setter
+ def boardInfoArea(self, obj):
+ self._BoardInfoArea = obj
+
+ @property
+ def chassisInfoArea(self):
+ return self._ChassisInfoArea
+
+ @chassisInfoArea.setter
+ def chassisInfoArea(self, obj):
+ self._ChassisInfoArea = obj
+
+ @property
+ def multiRecordArea(self):
+ return self._multiRecordArea
+
+ @multiRecordArea.setter
+ def multiRecordArea(self, obj):
+ self._multiRecordArea = obj
+
+ @property
+ def bindata(self):
+ return self._bindata
+
+ @bindata.setter
+ def bindata(self, obj):
+ self._bindata = obj
+
+ @property
+ def bodybin(self):
+ return self._bodybin
+
+ @bodybin.setter
+ def bodybin(self, obj):
+ self._bodybin = obj
+
+ def recalcuteCommonHead(self):
+ self.bindata = ""
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ d_print("common Header %d" % self.offset)
+ d_print("fru eeprom size %d" % self._frusize)
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ self.internalUserAreaOffset = self.offset // 8
+ self.offset += self.internalUseArea.size
+ d_print("internalUseArea is present offset:%d" % self.offset)
+
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ self.chassicInfoAreaOffset = self.offset // 8
+ self.offset += self.chassisInfoArea.size
+ d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ self.boardInfoAreaOffset = self.offset // 8
+ self.offset += self.boardInfoArea.size
+ d_print("boardInfoArea is present offset:%d" % self.offset)
+ d_print("boardInfoArea is present size:%d" %
+ self.boardInfoArea.size)
+
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ self.productinfoAreaOffset = self.offset // 8
+ self.offset += self.productInfoArea.size
+ d_print("productInfoArea is present offset:%d" % self.offset)
+
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ self.multiRecordAreaOffset = self.offset // 8
+ d_print("multiRecordArea is present offset:%d" % self.offset)
+
+ if self.internalUserAreaOffset == self.INITVALUE:
+ self.internalUserAreaOffset = 0
+ if self.productinfoAreaOffset == self.INITVALUE:
+ self.productinfoAreaOffset = 0
+ if self.chassicInfoAreaOffset == self.INITVALUE:
+ self.chassicInfoAreaOffset = 0
+ if self.boardInfoAreaOffset == self.INITVALUE:
+ self.boardInfoAreaOffset = 0
+ if self.multiRecordAreaOffset == self.INITVALUE:
+ self.multiRecordAreaOffset = 0
+
+ self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+ - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+ d_print("zerochecksum:%x" % self.zeroCheckSum)
+ self.data = ""
+ self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+ self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+ self.bindata = self.data + self.bodybin
+ totallen = len(self.bindata)
+ d_print("totallen %d" % totallen)
+ if totallen < self._frusize:
+ self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+ else:
+ raise FruException('bin data more than %d' % self._frusize, -2)
+
+ def recalcutebin(self):
+ self.bodybin = ""
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ d_print("internalUseArea present")
+ self.bodybin += self.internalUseArea.data
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ d_print("chassisInfoArea present")
+ self.bodybin += self.chassisInfoArea.data
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ d_print("boardInfoArea present")
+ self.boardInfoArea.recalcute()
+ self.bodybin += self.boardInfoArea.data
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ d_print("productInfoAreapresent")
+ self.productInfoArea.recalcute()
+ self.bodybin += self.productInfoArea.data
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ d_print("multiRecordArea present")
+ self.bodybin += self.productInfoArea.data
+
+ def recalcute(self, fru_eeprom_size=256):
+ self._frusize = fru_eeprom_size
+ self.recalcutebin()
+ self.recalcuteCommonHead()
+
+ def setValue(self, area, field, value):
+ tmp_area = getattr(self, area, None)
+ if tmp_area is not None:
+ tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
new file mode 100644
index 000000000000..7dfbba766f34
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=r8168,r8169,ice,mei_me,i2c_i801,i2c_ismt"
+CONSOLE_PORT=0x5060
+CONSOLE_DEV=0
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json
new file mode 100644
index 000000000000..567e84e9c7e0
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json
@@ -0,0 +1,5118 @@
+{
+ "PORT_MEDIA_SETTINGS": {
+ "0": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "1": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "2": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000080",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "3": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000080",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "4": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000006",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x0000007C",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "5": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "6": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "7": {
+ "Default": {
+ "pre2": {
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+ },
+ "111": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "112": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "113": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "114": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "115": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "116": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "117": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "118": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "119": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe0",
+ "lane2": "0xffffffe0",
+ "lane3": "0xffffffe0"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000084",
+ "lane2": "0x00000084",
+ "lane3": "0x00000084"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "120": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "121": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "122": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "123": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "124": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "125": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "126": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc",
+ "lane3": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080",
+ "lane3": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000"
+ }
+ }
+ },
+ "127": {
+ "Default": {
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffdc",
+ "lane1": "0xffffffdc",
+ "lane2": "0xffffffdc"
+ },
+ "main": {
+ "lane0": "0x00000080",
+ "lane1": "0x00000080",
+ "lane2": "0x00000080"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000"
+ },
+ "post3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000"
+ }
+ }
+ }
+ }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py
new file mode 100755
index 000000000000..44b05bbcfe83
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py
@@ -0,0 +1,410 @@
+#!/usr/bin/python3
+# * onboard temperature sensors
+# * FAN trays
+# * PSU
+#
+import os
+import re
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+ strtmp = ''
+ for value in val:
+ strtmp += chr(value)
+ return strtmp
+
+
+def typeTostr(val):
+ if isinstance(val, bytes):
+ strtmp = byteTostr(val)
+ return strtmp
+ return val
+
+
+def get_board_id():
+ if not os.path.exists(BOARD_ID_PATH):
+ return "NA"
+ with open(BOARD_ID_PATH) as fd:
+ id_str = fd.read().strip()
+ return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+ if not os.path.exists(BOARD_AIRFLOW_PATH):
+ return "NA"
+ with open(BOARD_AIRFLOW_PATH) as fd:
+ airflow_str = fd.read().strip()
+ data = json.loads(airflow_str)
+ airflow = data.get("board", "NA")
+ return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+ "dev_" + boardid + "_" + boardairflow + ".xml",
+ "dev_" + boardid + ".xml",
+ "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+ retval = "ERR"
+ val_list = []
+ msg = ""
+ ret = ""
+ fd = -1
+
+ if not os.path.exists(path):
+ return False, "%s %s not found" % (retval, path)
+
+ try:
+ fd = os.open(path, os.O_RDONLY)
+ os.lseek(fd, offset, os.SEEK_SET)
+ ret = os.read(fd, read_len)
+ for item in ret:
+ val_list.append(item)
+ except Exception as e:
+ msg = str(e)
+ return False, "%s %s" % (retval, msg)
+ finally:
+ if fd > 0:
+ os.close(fd)
+ return True, val_list
+
+
+def getPMCreg(location):
+ retval = 'ERR'
+ if not os.path.isfile(location):
+ return "%s %s notfound" % (retval, location)
+ try:
+ with open(location, 'r') as fd:
+ retval = fd.read()
+ except Exception as error:
+ return "ERR %s" % str(error)
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+ retval = 'ERR'
+ mb_reg_file = reg_name
+ filepath = glob.glob(mb_reg_file)
+ if len(filepath) == 0:
+ return "%s %s notfound" % (retval, mb_reg_file)
+ mb_reg_file = filepath[0]
+ if not os.path.isfile(mb_reg_file):
+ # print mb_reg_file, 'not found !'
+ return "%s %s notfound" % (retval, mb_reg_file)
+ try:
+ with open(mb_reg_file, 'rb') as fd:
+ retval = fd.read()
+ retval = typeTostr(retval)
+ except Exception as error:
+ retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+class checktype():
+ def __init__(self, test1):
+ self.test1 = test1
+
+ @staticmethod
+ def getValue(location, bit, data_type, coefficient=1, addend=0):
+ try:
+ value_t = get_pmc_register(location)
+ if value_t.startswith("ERR") or value_t.startswith("NA"):
+ return value_t
+ if data_type == 1:
+ return float('%.1f' % ((float(value_t) / 1000) + addend))
+ if data_type == 2:
+ return float('%.1f' % (float(value_t) / 100))
+ if data_type == 3:
+ psu_status = int(value_t, 16)
+ return (psu_status & (1 << bit)) >> bit
+ if data_type == 4:
+ return int(value_t, 10)
+ if data_type == 5:
+ return float('%.1f' % (float(value_t) / 1000 / 1000))
+ if data_type == 6:
+ return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+ return value_t
+ except Exception as e:
+ value_t = "ERR %s" % str(e)
+ return value_t
+
+ # fanFRU
+ @staticmethod
+ def decodeBinByValue(retval):
+ fru = ipmifru()
+ fru.decodeBin(retval)
+ return fru
+
+ @staticmethod
+ def getfruValue(prob_t, root, val):
+ try:
+ ret, binval_bytes = dev_file_read(val, 0, 256)
+ if ret is False:
+ return binval_bytes
+ binval = byteTostr(binval_bytes)
+ fanpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ fanpro['fan_type'] = ret.productInfoArea.productName
+ fanpro['hw_version'] = ret.productInfoArea.productVersion
+ fanpro['sn'] = ret.productInfoArea.productSerialNumber
+ fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+ fan_name = fanpro['fan_type'].strip()
+ if len(fan_display_name_dict) == 0:
+ return fanpro
+ if fan_name not in fan_display_name_dict:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+ else:
+ fanpro['fan_type'] = fan_display_name_dict[fan_name]
+ return fanpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getslotfruValue(val):
+ try:
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ slotpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+ slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+ slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+ return slotpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getpsufruValue(prob_t, root, val):
+ try:
+ psu_match = False
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ psupro = {}
+ ret = checktype.decodeBinByValue(binval)
+ psupro['type1'] = ret.productInfoArea.productPartModelName
+ psupro['sn'] = ret.productInfoArea.productSerialNumber
+ psupro['hw_version'] = ret.productInfoArea.productVersion
+ psu_dict = status.getDecodValue(root, "psutype")
+ psupro['type1'] = psupro['type1'].strip()
+ if len(psu_dict) == 0:
+ return psupro
+ for psu_name, display_name in psu_dict.items():
+ if psu_name.strip() == psupro['type1']:
+ psupro['type1'] = display_name
+ psu_match = True
+ break
+ if psu_match is not True:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+ return psupro
+ except Exception as error:
+ return "ERR " + str(error)
+
+
+class status():
+ def __init__(self, productname):
+ self.productname = productname
+
+ @staticmethod
+ def getETroot(filename):
+ tree = ET.parse(filename)
+ root = tree.getroot()
+ return root
+
+ @staticmethod
+ def getDecodValue(collection, decode):
+ decodes = collection.find('decode')
+ testdecode = decodes.find(decode)
+ test = {}
+ if testdecode is None:
+ return test
+ for neighbor in testdecode.iter('code'):
+ test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+ return test
+
+ @staticmethod
+ def getfileValue(location):
+ return checktype.getValue(location, " ", " ")
+
+ @staticmethod
+ def getETValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ prob_t = {}
+ prob_t.update(neighbor.attrib)
+ prob_t['errcode'] = 0
+ prob_t['errmsg'] = ''
+ for pros in neighbor.iter("property"):
+ ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+ if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+ fruval = checktype.getfruValue(prob_t, root, ret["location"])
+ if isinstance(fruval, str) and fruval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = fruval
+ break
+ prob_t.update(fruval)
+ continue
+
+ if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+ psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+ if isinstance(psuval, str) and psuval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = psuval
+ break
+ prob_t.update(psuval)
+ continue
+
+ if ret.get("gettype") == "config":
+ prob_t[ret["name"]] = ret["value"]
+ continue
+
+ if 'type' not in ret.keys():
+ val = "0"
+ else:
+ val = ret["type"]
+ if 'bit' not in ret.keys():
+ bit = "0"
+ else:
+ bit = ret["bit"]
+ if 'coefficient' not in ret.keys():
+ coefficient = 1
+ else:
+ coefficient = float(ret["coefficient"])
+ if 'addend' not in ret.keys():
+ addend = 0
+ else:
+ addend = float(ret["addend"])
+
+ s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+ if isinstance(s, str) and s.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = s
+ break
+ if 'default' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ prob_t['errmsg'] = rt[str(s)]
+ if str(s) != ret["default"]:
+ prob_t['errcode'] = -1
+ break
+ else:
+ if 'decode' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+ (s.replace("\x00", "").rstrip()))
+ else:
+ s = rt[str(s).replace("\x00", "").rstrip()]
+ name = ret["name"]
+ prob_t[name] = str(s)
+ a.append(prob_t)
+
+ @staticmethod
+ def getCPUValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ location = neighbor.attrib["location"]
+
+ filepath = glob.glob(location)
+ if len(filepath) == 0:
+ return
+ location = filepath[0]
+ L = []
+ for dirpath, dirnames, filenames in os.walk(location):
+ for file in filenames:
+ if file.endswith("_input"):
+ b = re.findall(r'temp(\d+)_input', file)
+ idx = int(b[0])
+ L.append(idx)
+ L = sorted(L)
+ for idx in L:
+ prob_t = {}
+ prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx))
+ prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000
+ prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000
+ prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000
+ prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000
+ a.append(prob_t)
+
+ @staticmethod
+ def getFileName():
+ fpath = os.path.dirname(os.path.realpath(__file__))
+ for file in DEV_XML_FILE_LIST:
+ xml = fpath + "/" + file
+ if os.path.exists(xml):
+ return xml
+ return fpath + "/" + CONFIG_NAME
+
+ @staticmethod
+ def checkFan(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "fan"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getTemp(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "temp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getPsu(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "psu"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getcputemp(ret):
+ _filename = status.getFileName()
+ _tagname = "cpus"
+ status.getCPUValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getDcdc(ret):
+ _filename = status.getFileName()
+ _tagname = "dcdc"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmactemp(ret):
+ _filename = status.getFileName()
+ _tagname = "mactemp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmacpower(ret):
+ _filename = status.getFileName()
+ _tagname = "macpower"
+ status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml
new file mode 100644
index 000000000000..94f5320cb10a
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml
@@ -0,0 +1,443 @@
+- bus: '00'
+ dev: '00'
+ fn: '0'
+ id: 09a2
+ name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '1'
+ id: 09a4
+ name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '2'
+ id: 09a3
+ name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '3'
+ id: 09a5
+ name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '4'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+ dev: '01'
+ fn: '0'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '1'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '2'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '3'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '4'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '5'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '6'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '7'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '02'
+ fn: '0'
+ id: 09a6
+ name: 'System peripheral: Intel Corporation Device 09a6'
+- bus: '00'
+ dev: '02'
+ fn: '1'
+ id: 09a7
+ name: 'System peripheral: Intel Corporation Device 09a7'
+- bus: '00'
+ dev: '02'
+ fn: '4'
+ id: '3456'
+ name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev
+ 01)'
+- bus: '00'
+ dev: '06'
+ fn: '0'
+ id: 18da
+ name: 'PCI bridge: Intel Corporation Device 18da (rev 11)'
+- bus: '00'
+ dev: 0e
+ fn: '0'
+ id: 18f2
+ name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)'
+- bus: '00'
+ dev: 0f
+ fn: '0'
+ id: 18ac
+ name: 'System peripheral: Intel Corporation Device 18ac (rev 11)'
+- bus: '00'
+ dev: '10'
+ fn: '0'
+ id: 18a8
+ name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)'
+- bus: '00'
+ dev: '12'
+ fn: '0'
+ id: 18aa
+ name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)'
+- bus: '00'
+ dev: '14'
+ fn: '0'
+ id: 18ad
+ name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)'
+- bus: '00'
+ dev: '18'
+ fn: '0'
+ id: 18d3
+ name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)'
+- bus: '00'
+ dev: '18'
+ fn: '1'
+ id: 18d4
+ name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)'
+- bus: '00'
+ dev: '18'
+ fn: '4'
+ id: 18d6
+ name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '0'
+ id: 18d8
+ name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '1'
+ id: 18d8
+ name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '2'
+ id: 18d8
+ name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '3'
+ id: 18d9
+ name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)'
+- bus: '00'
+ dev: 1c
+ fn: '0'
+ id: 18db
+ name: 'SD Host controller: Intel Corporation Device 18db (rev 11)'
+- bus: '00'
+ dev: 1d
+ fn: '0'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+ dev: 1e
+ fn: '0'
+ id: 18d0
+ name: 'USB controller: Intel Corporation Device 18d0 (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '0'
+ id: 18dc
+ name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '4'
+ id: 18df
+ name: 'SMBus: Intel Corporation Device 18df (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '5'
+ id: 18e0
+ name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '7'
+ id: 18e1
+ name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev
+ 11)'
+- bus: '01'
+ dev: '00'
+ fn: '0'
+ id: 18ee
+ name: 'Co-processor: Intel Corporation Device 18ee (rev 11)'
+- bus: '02'
+ dev: '00'
+ fn: '0'
+ id: f900
+ name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)'
+- bus: '03'
+ dev: '00'
+ fn: '0'
+ id: '5220'
+ name: 'SMBus: Device 1ded:5220'
+- bus: '04'
+ dev: '00'
+ fn: '0'
+ id: '8168'
+ name: 'Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI
+ Express Gigabit Ethernet Controller (rev 15)'
+- bus: '14'
+ dev: '00'
+ fn: '0'
+ id: 09a2
+ name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '1'
+ id: 09a4
+ name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '2'
+ id: 09a3
+ name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '3'
+ id: 09a5
+ name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '4'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: f3
+ dev: '00'
+ fn: '0'
+ id: 09a2
+ name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '1'
+ id: 09a4
+ name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '2'
+ id: 09a3
+ name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '3'
+ id: 09a5
+ name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '4'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: f3
+ dev: '04'
+ fn: '0'
+ id: 18d1
+ name: 'PCI bridge: Intel Corporation Device 18d1'
+- bus: f4
+ dev: '00'
+ fn: '0'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+ dev: '00'
+ fn: '1'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+ dev: '00'
+ fn: '2'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+ dev: '00'
+ fn: '3'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+ dev: '00'
+ fn: '4'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: fe
+ dev: '00'
+ fn: '0'
+ id: '3450'
+ name: 'System peripheral: Intel Corporation Device 3450'
+- bus: fe
+ dev: '00'
+ fn: '1'
+ id: '3451'
+ name: 'System peripheral: Intel Corporation Device 3451'
+- bus: fe
+ dev: '00'
+ fn: '2'
+ id: '3452'
+ name: 'System peripheral: Intel Corporation Device 3452'
+- bus: fe
+ dev: '00'
+ fn: '3'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: fe
+ dev: '00'
+ fn: '5'
+ id: '3455'
+ name: 'System peripheral: Intel Corporation Device 3455'
+- bus: fe
+ dev: 0b
+ fn: '0'
+ id: '3448'
+ name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+ dev: 0b
+ fn: '1'
+ id: '3448'
+ name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+ dev: 0b
+ fn: '2'
+ id: 344b
+ name: 'System peripheral: Intel Corporation Device 344b'
+- bus: fe
+ dev: 0c
+ fn: '0'
+ id: 344a
+ name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+ dev: 1a
+ fn: '0'
+ id: '2880'
+ name: 'Performance counters: Intel Corporation Device 2880'
+- bus: ff
+ dev: '00'
+ fn: '0'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '1'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '2'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '3'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '4'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '5'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: 0a
+ fn: '0'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '1'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '2'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '3'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '4'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '5'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 1d
+ fn: '0'
+ id: 344f
+ name: 'System peripheral: Intel Corporation Device 344f'
+- bus: ff
+ dev: 1d
+ fn: '1'
+ id: '3457'
+ name: 'System peripheral: Intel Corporation Device 3457'
+- bus: ff
+ dev: 1e
+ fn: '0'
+ id: '3458'
+ name: 'System peripheral: Intel Corporation Device 3458 (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '1'
+ id: '3459'
+ name: 'System peripheral: Intel Corporation Device 3459 (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '2'
+ id: 345a
+ name: 'System peripheral: Intel Corporation Device 345a (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '3'
+ id: 345b
+ name: 'System peripheral: Intel Corporation Device 345b (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '4'
+ id: 345c
+ name: 'System peripheral: Intel Corporation Device 345c (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '5'
+ id: 345d
+ name: 'System peripheral: Intel Corporation Device 345d (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '6'
+ id: 345e
+ name: 'System peripheral: Intel Corporation Device 345e (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '7'
+ id: 345f
+ name: 'System peripheral: Intel Corporation Device 345f (rev 01)'
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json
new file mode 100644
index 000000000000..a0ceb34e9fb4
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json
@@ -0,0 +1,1668 @@
+{
+ "interfaces": {
+ "Ethernet1": {
+ "index": "0,0,0,0",
+ "lanes": "17,18,19,20",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth1"
+ ],
+ "2x200G[100G]": [
+ "Eth1/1",
+ "Eth1/2"
+ ]
+ }
+ },
+ "Ethernet5": {
+ "index": "1,1,1,1",
+ "lanes": "21,22,23,24",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth2"
+ ],
+ "2x200G[100G]": [
+ "Eth2/1",
+ "Eth2/2"
+ ]
+ }
+ },
+ "Ethernet9": {
+ "index": "2,2,2,2",
+ "lanes": "25,26,27,28",
+ "breakout_modes": {
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+ "2x200G[100G]": [
+ "Eth73/1",
+ "Eth73/2"
+ ]
+ }
+ },
+ "Ethernet293": {
+ "index": "73,73,73,73",
+ "lanes": "397,398,399,400",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth74"
+ ],
+ "2x200G[100G]": [
+ "Eth74/1",
+ "Eth74/2"
+ ]
+ }
+ },
+ "Ethernet297": {
+ "index": "74,74,74,74",
+ "lanes": "289,290,291,292",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth75"
+ ],
+ "2x200G[100G]": [
+ "Eth75/1",
+ "Eth75/2"
+ ]
+ }
+ },
+ "Ethernet301": {
+ "index": "75,75,75,75",
+ "lanes": "293,294,295,296",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth76"
+ ],
+ "2x200G[100G]": [
+ "Eth76/1",
+ "Eth76/2"
+ ]
+ }
+ },
+ "Ethernet305": {
+ "index": "76,76,76,76",
+ "lanes": "401,402,403,404",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth77"
+ ],
+ "2x200G[100G]": [
+ "Eth77/1",
+ "Eth77/2"
+ ]
+ }
+ },
+ "Ethernet309": {
+ "index": "77,77,77,77",
+ "lanes": "405,406,407,408",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth78"
+ ],
+ "2x200G[100G]": [
+ "Eth78/1",
+ "Eth78/2"
+ ]
+ }
+ },
+ "Ethernet313": {
+ "index": "78,78,78,78",
+ "lanes": "409,410,411,412",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth79"
+ ],
+ "2x200G[100G]": [
+ "Eth79/1",
+ "Eth79/2"
+ ]
+ }
+ },
+ "Ethernet317": {
+ "index": "79,79,79,79",
+ "lanes": "413,414,415,416",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth80"
+ ],
+ "2x200G[100G]": [
+ "Eth80/1",
+ "Eth80/2"
+ ]
+ }
+ },
+ "Ethernet321": {
+ "index": "80,80,80,80",
+ "lanes": "305,306,307,308",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth81"
+ ],
+ "2x200G[100G]": [
+ "Eth81/1",
+ "Eth81/2"
+ ]
+ }
+ },
+ "Ethernet325": {
+ "index": "81,81,81,81",
+ "lanes": "309,310,311,312",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth82"
+ ],
+ "2x200G[100G]": [
+ "Eth82/1",
+ "Eth82/2"
+ ]
+ }
+ },
+ "Ethernet329": {
+ "index": "82,82,82,82",
+ "lanes": "385,386,387,388",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth83"
+ ],
+ "2x200G[100G]": [
+ "Eth83/1",
+ "Eth83/2"
+ ]
+ }
+ },
+ "Ethernet333": {
+ "index": "83,83,83,83",
+ "lanes": "389,390,391,392",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth84"
+ ],
+ "2x200G[100G]": [
+ "Eth84/1",
+ "Eth84/2"
+ ]
+ }
+ },
+ "Ethernet337": {
+ "index": "84,84,84,84",
+ "lanes": "425,426,427,428",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth85"
+ ],
+ "2x200G[100G]": [
+ "Eth85/1",
+ "Eth85/2"
+ ]
+ }
+ },
+ "Ethernet341": {
+ "index": "85,85,85,85",
+ "lanes": "429,430,431,432",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth86"
+ ],
+ "2x200G[100G]": [
+ "Eth86/1",
+ "Eth86/2"
+ ]
+ }
+ },
+ "Ethernet345": {
+ "index": "86,86,86,86",
+ "lanes": "321,322,323,324",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth87"
+ ],
+ "2x200G[100G]": [
+ "Eth87/1",
+ "Eth87/2"
+ ]
+ }
+ },
+ "Ethernet349": {
+ "index": "87,87,87,87",
+ "lanes": "325,326,327,328",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth88"
+ ],
+ "2x200G[100G]": [
+ "Eth88/1",
+ "Eth88/2"
+ ]
+ }
+ },
+ "Ethernet353": {
+ "index": "88,88,88,88",
+ "lanes": "313,314,315,316",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth89"
+ ],
+ "2x200G[100G]": [
+ "Eth89/1",
+ "Eth89/2"
+ ]
+ }
+ },
+ "Ethernet357": {
+ "index": "89,89,89,89",
+ "lanes": "317,318,319,320",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth90"
+ ],
+ "2x200G[100G]": [
+ "Eth90/1",
+ "Eth90/2"
+ ]
+ }
+ },
+ "Ethernet361": {
+ "index": "90,90,90,90",
+ "lanes": "441,442,443,444",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth91"
+ ],
+ "2x200G[100G]": [
+ "Eth91/1",
+ "Eth91/2"
+ ]
+ }
+ },
+ "Ethernet365": {
+ "index": "91,91,91,91",
+ "lanes": "445,446,447,448",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth92"
+ ],
+ "2x200G[100G]": [
+ "Eth92/1",
+ "Eth92/2"
+ ]
+ }
+ },
+ "Ethernet369": {
+ "index": "92,92,92,92",
+ "lanes": "337,338,339,340",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth93"
+ ],
+ "2x200G[100G]": [
+ "Eth93/1",
+ "Eth93/2"
+ ]
+ }
+ },
+ "Ethernet373": {
+ "index": "93,93,93,93",
+ "lanes": "341,342,343,344",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth94"
+ ],
+ "2x200G[100G]": [
+ "Eth94/1",
+ "Eth94/2"
+ ]
+ }
+ },
+ "Ethernet377": {
+ "index": "94,94,94,94",
+ "lanes": "297,298,299,300",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth95"
+ ],
+ "2x200G[100G]": [
+ "Eth95/1",
+ "Eth95/2"
+ ]
+ }
+ },
+ "Ethernet381": {
+ "index": "95,95,95,95",
+ "lanes": "301,302,303,304",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth96"
+ ],
+ "2x200G[100G]": [
+ "Eth96/1",
+ "Eth96/2"
+ ]
+ }
+ },
+ "Ethernet385": {
+ "index": "96,96,96,96",
+ "lanes": "457,458,459,460",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth97"
+ ],
+ "2x200G[100G]": [
+ "Eth97/1",
+ "Eth97/2"
+ ]
+ }
+ },
+ "Ethernet389": {
+ "index": "97,97,97,97",
+ "lanes": "461,462,463,464",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth98"
+ ],
+ "2x200G[100G]": [
+ "Eth98/1",
+ "Eth98/2"
+ ]
+ }
+ },
+ "Ethernet393": {
+ "index": "98,98,98,98",
+ "lanes": "353,354,355,356",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth99"
+ ],
+ "2x200G[100G]": [
+ "Eth99/1",
+ "Eth99/2"
+ ]
+ }
+ },
+ "Ethernet397": {
+ "index": "99,99,99,99",
+ "lanes": "357,358,359,360",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth100"
+ ],
+ "2x200G[100G]": [
+ "Eth100/1",
+ "Eth100/2"
+ ]
+ }
+ },
+ "Ethernet401": {
+ "index": "100,100,100,100",
+ "lanes": "329,330,331,332",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth101"
+ ],
+ "2x200G[100G]": [
+ "Eth101/1",
+ "Eth101/2"
+ ]
+ }
+ },
+ "Ethernet405": {
+ "index": "101,101,101,101",
+ "lanes": "333,334,335,336",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth102"
+ ],
+ "2x200G[100G]": [
+ "Eth102/1",
+ "Eth102/2"
+ ]
+ }
+ },
+ "Ethernet409": {
+ "index": "102,102,102,102",
+ "lanes": "473,474,475,476",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth103"
+ ],
+ "2x200G[100G]": [
+ "Eth103/1",
+ "Eth103/2"
+ ]
+ }
+ },
+ "Ethernet413": {
+ "index": "103,103,103,103",
+ "lanes": "477,478,479,480",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth104"
+ ],
+ "2x200G[100G]": [
+ "Eth104/1",
+ "Eth104/2"
+ ]
+ }
+ },
+ "Ethernet417": {
+ "index": "104,104,104,104",
+ "lanes": "369,370,371,372",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth105"
+ ],
+ "2x200G[100G]": [
+ "Eth105/1",
+ "Eth105/2"
+ ]
+ }
+ },
+ "Ethernet421": {
+ "index": "105,105,105,105",
+ "lanes": "373,374,375,376",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth106"
+ ],
+ "2x200G[100G]": [
+ "Eth106/1",
+ "Eth106/2"
+ ]
+ }
+ },
+ "Ethernet425": {
+ "index": "106,106,106,106",
+ "lanes": "345,346,347,348",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth107"
+ ],
+ "2x200G[100G]": [
+ "Eth107/1",
+ "Eth107/2"
+ ]
+ }
+ },
+ "Ethernet429": {
+ "index": "107,107,107,107",
+ "lanes": "349,350,351,352",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth108"
+ ],
+ "2x200G[100G]": [
+ "Eth108/1",
+ "Eth108/2"
+ ]
+ }
+ },
+ "Ethernet433": {
+ "index": "108,108,108,108",
+ "lanes": "449,450,451,452",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth109"
+ ],
+ "2x200G[100G]": [
+ "Eth109/1",
+ "Eth109/2"
+ ]
+ }
+ },
+ "Ethernet437": {
+ "index": "109,109,109,109",
+ "lanes": "453,454,455,456",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth110"
+ ],
+ "2x200G[100G]": [
+ "Eth110/1",
+ "Eth110/2"
+ ]
+ }
+ },
+ "Ethernet441": {
+ "index": "110,110,110,110",
+ "lanes": "465,466,467,468",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth111"
+ ],
+ "2x200G[100G]": [
+ "Eth111/1",
+ "Eth111/2"
+ ]
+ }
+ },
+ "Ethernet445": {
+ "index": "111,111,111,111",
+ "lanes": "469,470,471,472",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth112"
+ ],
+ "2x200G[100G]": [
+ "Eth112/1",
+ "Eth112/2"
+ ]
+ }
+ },
+ "Ethernet449": {
+ "index": "112,112,112,112",
+ "lanes": "361,362,363,364",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth113"
+ ],
+ "2x200G[100G]": [
+ "Eth113/1",
+ "Eth113/2"
+ ]
+ }
+ },
+ "Ethernet453": {
+ "index": "113,113,113,113",
+ "lanes": "365,366,367,368",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth114"
+ ],
+ "2x200G[100G]": [
+ "Eth114/1",
+ "Eth114/2"
+ ]
+ }
+ },
+ "Ethernet457": {
+ "index": "114,114,114,114",
+ "lanes": "489,490,491,492",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth115"
+ ],
+ "2x200G[100G]": [
+ "Eth115/1",
+ "Eth115/2"
+ ]
+ }
+ },
+ "Ethernet461": {
+ "index": "115,115,115,115",
+ "lanes": "493,494,495,496",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth116"
+ ],
+ "2x200G[100G]": [
+ "Eth116/1",
+ "Eth116/2"
+ ]
+ }
+ },
+ "Ethernet465": {
+ "index": "116,116,116,116",
+ "lanes": "481,482,483,484",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth117"
+ ],
+ "2x200G[100G]": [
+ "Eth117/1",
+ "Eth117/2"
+ ]
+ }
+ },
+ "Ethernet469": {
+ "index": "117,117,117,117",
+ "lanes": "485,486,487,488",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth118"
+ ],
+ "2x200G[100G]": [
+ "Eth118/1",
+ "Eth118/2"
+ ]
+ }
+ },
+ "Ethernet473": {
+ "index": "118,118,118,118",
+ "lanes": "377,378,379,380",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth119"
+ ],
+ "2x200G[100G]": [
+ "Eth119/1",
+ "Eth119/2"
+ ]
+ }
+ },
+ "Ethernet477": {
+ "index": "119,119,119,119",
+ "lanes": "381,382,383,384",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth120"
+ ],
+ "2x200G[100G]": [
+ "Eth120/1",
+ "Eth120/2"
+ ]
+ }
+ },
+ "Ethernet481": {
+ "index": "120,120,120,120",
+ "lanes": "505,506,507,508",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth121"
+ ],
+ "2x200G[100G]": [
+ "Eth121/1",
+ "Eth121/2"
+ ]
+ }
+ },
+ "Ethernet485": {
+ "index": "121,121,121,121",
+ "lanes": "509,510,511,512",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth122"
+ ],
+ "2x200G[100G]": [
+ "Eth122/1",
+ "Eth122/2"
+ ]
+ }
+ },
+ "Ethernet489": {
+ "index": "122,122,122,122",
+ "lanes": "497,498,499,500",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth123"
+ ],
+ "2x200G[100G]": [
+ "Eth123/1",
+ "Eth123/2"
+ ]
+ }
+ },
+ "Ethernet493": {
+ "index": "123,123,123,123",
+ "lanes": "501,502,503,504",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth124"
+ ],
+ "2x200G[100G]": [
+ "Eth124/1",
+ "Eth124/2"
+ ]
+ }
+ },
+ "Ethernet497": {
+ "index": "124,124,124,124",
+ "lanes": "9,10,11,12",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth125"
+ ],
+ "2x200G[100G]": [
+ "Eth125/1",
+ "Eth125/2"
+ ]
+ }
+ },
+ "Ethernet501": {
+ "index": "125,125,125,125",
+ "lanes": "13,14,15,16",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth126"
+ ],
+ "2x200G[100G]": [
+ "Eth126/1",
+ "Eth126/2"
+ ]
+ }
+ },
+ "Ethernet505": {
+ "index": "126,126,126,126",
+ "lanes": "1,2,3,4",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth127"
+ ],
+ "2x200G[100G]": [
+ "Eth127/1",
+ "Eth127/2"
+ ]
+ }
+ },
+ "Ethernet509": {
+ "index": "127,127,127,127",
+ "lanes": "5,6,7,8",
+ "breakout_modes": {
+ "1x400G": [
+ "Eth128"
+ ],
+ "2x200G[100G]": [
+ "Eth128/1",
+ "Eth128/2"
+ ]
+ }
+ }
+ }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json
new file mode 100644
index 000000000000..fa52c3a1bbb9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json
@@ -0,0 +1,20 @@
+{
+ "chassis": {
+ "M2-W6940-128QC": {
+ "component": {
+ "BASE_CPLD": { },
+ "FAN_CPLD": { },
+ "CPU_CPLD": { },
+ "MISC_CPLD": { },
+ "MAC_CPLDA": { },
+ "MAC_CPLDB": { },
+ "LC_CPLD": { },
+ "MAC FPGA": { },
+ "BIOS": { },
+ "BMC": { },
+ "ALTBMC": { }
+ }
+ }
+ }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf
new file mode 100644
index 000000000000..fc119184d5c1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf
@@ -0,0 +1,2 @@
+is_ltsw_chip=1
+SYNCD_SHM_SIZE=1g
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..e3d6bb82e069
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py
@@ -0,0 +1,363 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+ import time
+ import re
+ import os
+ import threading
+ import traceback
+ import subprocess
+ from ctypes import create_string_buffer
+ from sonic_sfp.sfputilbase import SfpUtilBase
+ from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
+except ImportError as e:
+ raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+ """Platform-specific SfpUtil class"""
+
+ PORT_START = 0
+ PORT_END = 127
+ PORTS_IN_BLOCK = 128
+
+ EEPROM_OFFSET = 25
+ SFP_DEVICE_TYPE = "optoe2"
+ QSFP_DEVICE_TYPE = "optoe1"
+ QSFP_DD_DEVICE_TYPE = "optoe3"
+ I2C_MAX_ATTEMPT = 3
+
+ OPTOE_TYPE1 = 1
+ OPTOE_TYPE2 = 2
+ OPTOE_TYPE3 = 3
+
+ SFP_STATUS_INSERTED = '1'
+ SFP_STATUS_REMOVED = '0'
+
+ _port_to_eeprom_mapping = {}
+ port_to_i2cbus_mapping ={}
+ port_dict = {}
+
+ qsfp_ports_list = []
+ qsfp_dd_ports_list = []
+
+ @property
+ def port_start(self):
+ return self.PORT_START
+
+ @property
+ def port_end(self):
+ return self.PORT_END
+
+ @property
+ def qsfp_ports(self):
+ return self.qsfp_ports_list
+
+ @property
+ def qsfp_dd_ports(self):
+ return self.qsfp_dd_ports_list
+
+ @property
+ def port_to_eeprom_mapping(self):
+ return self._port_to_eeprom_mapping
+
+ def __init__(self):
+ self.qsfp_ports_list = []
+ self.qsfp_dd_ports_list = []
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+ if self.get_presence(x):
+ self.port_dict[x] = self.SFP_STATUS_INSERTED
+ else:
+ self.port_dict[x] = self.SFP_STATUS_REMOVED
+
+ if (self.check_is_qsfpdd(x)):
+ self.qsfp_dd_ports_list.append(x)
+ self.check_optoe_type(x, self.OPTOE_TYPE3)
+ else:
+ self.qsfp_ports_list.append(x)
+ self.check_optoe_type(x, self.OPTOE_TYPE1)
+ SfpUtilBase.__init__(self)
+
+ def _sfp_read_file_path(self, file_path, offset, num_bytes):
+ attempts = 0
+ while attempts < self.I2C_MAX_ATTEMPT:
+ try:
+ file_path.seek(offset)
+ read_buf = file_path.read(num_bytes)
+ except:
+ attempts += 1
+ time.sleep(0.05)
+ else:
+ return True, read_buf
+ return False, None
+
+ def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+ """Tries to read the eeprom file to determine if the
+ device/sfp is present or not. If sfp present, the read returns
+ valid bytes. If not, read returns error 'Connection timed out"""
+
+ if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+ return False
+ else:
+ with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+ rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+ return rv
+
+ def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+ try:
+ sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+ # Write device address to new_device file
+ nd_file = open(sysfs_nd_path, "w")
+ nd_str = "%s %s" % (devtype, hex(devaddr))
+ nd_file.write(nd_str)
+ nd_file.close()
+
+ except Exception as err:
+ print("Error writing to new device file: %s" % str(err))
+ return 1
+ else:
+ return 0
+
+ def _get_port_eeprom_path(self, port_num, devid):
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ if port_num in self.port_to_eeprom_mapping.keys():
+ sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+ else:
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+ if i2c_adapter_id is None:
+ print("Error getting i2c bus num")
+ return None
+
+ # Get i2c virtual bus path for the sfp
+ sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+ str(i2c_adapter_id))
+
+ # If i2c bus for port does not exist
+ if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+ print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+ return None
+
+ sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+ str(i2c_adapter_id),
+ hex(devid)[-2:])
+
+ # If sfp device is not present on bus, Add it
+ if not os.path.exists(sysfs_sfp_i2c_client_path):
+ if port_num in self.qsfp_dd_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE)
+ elif port_num in self.qsfp_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+ else:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+ if ret != 0:
+ print("Error adding sfp device")
+ return None
+
+ sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+ return sysfs_sfp_i2c_client_eeprom_path
+
+ def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+ eeprom_raw = []
+ for i in range(0, num_bytes):
+ eeprom_raw.append("0x00")
+
+ rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+ if rv == False:
+ return None
+
+ try:
+ for n in range(0, num_bytes):
+ eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+ except:
+ return None
+
+ return eeprom_raw
+
+ def get_eeprom_dom_raw(self, port_num):
+ if port_num in self.qsfp_ports:
+ # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+ return None
+ else:
+ # Read dom eeprom at addr 0x51
+ return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+ def get_presence(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+ cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1))
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ return False
+ if output == "1":
+ return True
+ return False
+
+ def check_is_qsfpdd(self, port_num):
+ try:
+ if self.get_presence(port_num) == False:
+ return False
+
+ eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+ # according to sff-8024 A0h Byte 0 is '1e' or '18' means the transceiver is qsfpdd
+ if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'):
+ return True
+ except Exception as e:
+ print(traceback.format_exc())
+
+ return False
+
+ def check_optoe_type(self, port_num, optoe_type):
+ if self.get_presence(port_num) == False:
+ return True
+ try:
+ eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+ dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class'
+ i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num]))
+ cmd = "cat " + i2c_path
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ print("cmd: %s execution fail, output:%s" % (cmd, output))
+ return False
+ if int(output) != optoe_type:
+ cmd = "echo " + str(optoe_type) + " > " + i2c_path
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ print("cmd: %s execution fail, output:%s" % (cmd, output))
+ return False
+ return True
+
+ except Exception as e:
+ print(traceback.format_exc())
+ return False
+
+ def get_low_power_mode(self, port_num):
+ # Check for invalid port_num
+
+ return True
+
+ def set_low_power_mode(self, port_num, lpmode):
+ # Check for invalid port_num
+
+ return True
+
+ def reset(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+
+ return True
+
+ def get_transceiver_change_event(self, timeout=0):
+
+ start_time = time.time()
+ current_port_dict = {}
+ forever = False
+
+ if timeout == 0:
+ forever = True
+ elif timeout > 0:
+ timeout = timeout / float(1000) # Convert to secs
+ else:
+ print ("get_transceiver_change_event:Invalid timeout value", timeout)
+ return False, {}
+
+ end_time = start_time + timeout
+ if start_time > end_time:
+ print ('get_transceiver_change_event:' \
+ 'time wrap / invalid timeout value', timeout)
+
+ return False, {} # Time wrap or possibly incorrect timeout
+
+ while timeout >= 0:
+ # Check for OIR events and return updated port_dict
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if self.get_presence(x):
+ current_port_dict[x] = self.SFP_STATUS_INSERTED
+ else:
+ current_port_dict[x] = self.SFP_STATUS_REMOVED
+ if (current_port_dict == self.port_dict):
+ if forever:
+ time.sleep(1)
+ else:
+ timeout = end_time - time.time()
+ if timeout >= 1:
+ time.sleep(1) # We poll at 1 second granularity
+ else:
+ if timeout > 0:
+ time.sleep(timeout)
+ return True, {}
+ else:
+ # Update reg value
+ self.port_dict = current_port_dict
+ return True, self.port_dict
+ print ("get_transceiver_change_event: Should not reach here.")
+ return False, {}
+
+ def get_highest_temperature(self):
+ offset = 0
+ hightest_temperature = -9999
+
+ presence_flag = False
+ read_eeprom_flag = False
+ temperature_valid_flag = False
+
+ for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if self.get_presence(port) == False:
+ continue
+
+ presence_flag = True
+
+ if port in self.qsfp_dd_ports:
+ offset = 14
+ elif port in self.qsfp_ports:
+ offset = 22
+ else:
+ offset = 96
+
+ eeprom_path = self._get_port_eeprom_path(port, 0x50)
+ try:
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ read_eeprom_flag = True
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+ if len(eeprom_raw) != 0:
+ msb = int(eeprom_raw[0], 16)
+ lsb = int(eeprom_raw[1], 16)
+
+ result = (msb << 8) | (lsb & 0xff)
+ result = float(result / 256.0)
+ if -50 <= result <= 200:
+ temperature_valid_flag = True
+ if hightest_temperature < result:
+ hightest_temperature = result
+ except Exception as e:
+ pass
+
+ # all port not presence
+ if presence_flag == False:
+ hightest_temperature = -10000
+
+ # all port read eeprom fail
+ elif read_eeprom_flag == False:
+ hightest_temperature = -9999
+
+ # all port temperature invalid
+ elif read_eeprom_flag == True and temperature_valid_flag == False:
+ hightest_temperature = -10000
+
+ hightest_temperature = round(hightest_temperature, 2)
+
+ return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py
new file mode 100755
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+# - InnoDisk
+# - StorFly
+# - Virtium
+
+try:
+ import re
+ import os
+ import subprocess
+ from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+ raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+ """
+ Generic implementation of the SSD health API
+ """
+ model = NOT_AVAILABLE
+ serial = NOT_AVAILABLE
+ firmware = NOT_AVAILABLE
+ temperature = NOT_AVAILABLE
+ health = NOT_AVAILABLE
+ remaining_life = NOT_AVAILABLE
+ sata_rate = NOT_AVAILABLE
+ ssd_info = NOT_AVAILABLE
+ vendor_ssd_info = NOT_AVAILABLE
+
+ def __init__(self, diskdev):
+ self.vendor_ssd_utility = {
+ "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+ "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info },
+ "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }
+ }
+
+ """
+ The dict model_attr keys relate the vendors
+ LITEON : "ER2-GD","AF2MA31DTDLT"
+ Intel : "SSDSCKKB"
+ SMI : "SM619GXC"
+ samsung: "MZNLH"
+ ADATA : "IM2S3134N"
+ """
+ self.model_attr = {
+ "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+ "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+ "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+ "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+ "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+ }
+
+ self.key_list = list(self.model_attr.keys())
+ self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+ self.dev = diskdev
+ # Generic part
+ self.fetch_generic_ssd_info(diskdev)
+ self.parse_generic_ssd_info()
+ self.fetch_vendor_ssd_info(diskdev, "Generic")
+
+ # Known vendor part
+ if self.model:
+ model_short = self.model.split()[0]
+ if model_short in self.vendor_ssd_utility:
+ self.fetch_vendor_ssd_info(diskdev, model_short)
+ self.parse_vendor_ssd_info(model_short)
+ else:
+ # No handler registered for this disk model
+ pass
+ else:
+ # Failed to get disk model
+ self.model = "Unknown"
+
+ def _execute_shell(self, cmd):
+ process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+ output, error = process.communicate()
+ exit_code = process.returncode
+ if exit_code:
+ return None
+ return output
+
+ def _parse_re(self, pattern, buffer):
+ res_list = re.findall(pattern, str(buffer))
+ return res_list[0] if res_list else NOT_AVAILABLE
+
+ def fetch_generic_ssd_info(self, diskdev):
+ self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+ # Health and temperature values may be overwritten with vendor specific data
+ def parse_generic_ssd_info(self):
+ if "nvme" in self.dev:
+ self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+ health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+ if health_raw == NOT_AVAILABLE:
+ self.health = NOT_AVAILABLE
+ else:
+ health_raw = health_raw.split()[-1]
+ self.health = 100 - float(health_raw.strip('%'))
+
+ temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+ if temp_raw == NOT_AVAILABLE:
+ self.temperature = NOT_AVAILABLE
+ else:
+ temp_raw = temp_raw.split()[-2]
+ self.temperature = float(temp_raw)
+ else:
+ self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+ model_key = ""
+ for key in self.key_list:
+ if re.search(key, self.model):
+ model_key = key
+ break
+ if model_key != "":
+ self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+ self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+ self.health = self.remaining_life
+ # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+ if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+ avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+ self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+ if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT:
+ self.remaining_life = "Fail"
+ self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+ self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+ self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+ def parse_innodisk_info(self):
+ if self.vendor_ssd_info:
+ self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+ self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+ else:
+ if self.health == NOT_AVAILABLE:
+ health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+ self.health = health_raw.split()[-1]
+ if self.temperature == NOT_AVAILABLE:
+ temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+ self.temperature = temp_raw.split()[-6]
+
+ def parse_virtium_info(self):
+ if self.vendor_ssd_info:
+ self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ try:
+ self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+ except (ValueError, ZeroDivisionError):
+ # Invalid avg_erase_count or nand_endurance.
+ pass
+
+ def fetch_vendor_ssd_info(self, diskdev, model):
+ self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+ def parse_vendor_ssd_info(self, model):
+ self.vendor_ssd_utility[model]["parser"]()
+
+ def check_readonly2(self, partition, filesystem):
+ # parse mount cmd output info
+ mount_info = self._execute_shell(MOUNT_CMD)
+ for line in mount_info.split('\n'):
+ column_list = line.split()
+ if line == '':
+ continue
+ if column_list[0] == partition and column_list[2] == filesystem:
+ if column_list[5].split(',')[0][1:] == "ro":
+ return partition
+ else:
+ return NOT_AVAILABLE
+ return NOT_AVAILABLE
+
+ def check_readonly(self, partition, filesystem):
+ ret = os.access(filesystem, os.W_OK)
+ if ret == False:
+ return partition
+ else:
+ return NOT_AVAILABLE
+
+ def get_health(self):
+ """
+ Retrieves current disk health in percentages
+
+ Returns:
+ A float number of current ssd health
+ e.g. 83.5
+ """
+ if self.health == 'N/A':
+ return "NA"
+ else:
+ return float(self.health)
+
+ def get_temperature(self):
+ """
+ Retrieves current disk temperature in Celsius
+
+ Returns:
+ A float number of current temperature in Celsius
+ e.g. 40.1
+ """
+ if self.temperature == 'N/A':
+ return 'NA'
+ else:
+ return float(self.temperature)
+
+ def get_model(self):
+ """
+ Retrieves model for the given disk device
+
+ Returns:
+ A string holding disk model as provided by the manufacturer
+ """
+ return self.model
+
+ def get_firmware(self):
+ """
+ Retrieves firmware version for the given disk device
+
+ Returns:
+ A string holding disk firmware version as provided by the manufacturer
+ """
+ return self.firmware
+
+ def get_serial(self):
+ """
+ Retrieves serial number for the given disk device
+
+ Returns:
+ A string holding disk serial number as provided by the manufacturer
+ """
+ return self.serial
+ def get_sata_rate(self):
+ """
+ Retrieves SATA rate for the given disk device
+ Returns:
+ A string holding current SATA rate as provided by the manufacturer
+ """
+ return self.sata_rate
+ def get_remaining_life(self):
+ """
+ Retrieves remaining life for the given disk device
+ Returns:
+ A string holding disk remaining life as provided by the manufacturer
+ """
+ return self.remaining_life
+ def get_vendor_output(self):
+ """
+ Retrieves vendor specific data for the given disk device
+
+ Returns:
+ A string holding some vendor specific disk information
+ """
+ return self.vendor_ssd_info
+
+ def parse_id_number(self, id):
+ return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+ def get_readonly_partition(self):
+ """
+ Check the partition mount filesystem is readonly status,then output the result.
+ Returns:
+ The readonly partition list
+ """
+
+ ro_partition_list = []
+ partition_list = []
+
+ # parse fdisk cmd output info
+ disk_info = self._execute_shell(DISK_LIST_CMD)
+ begin_flag = False
+ for line in disk_info.split('\n'):
+ if line == "Device":
+ begin_flag = True
+ continue
+ if begin_flag:
+ if line != "":
+ partition_list.append(line)
+ else:
+ break
+
+ # parse df cmd output info
+ disk_free = self._execute_shell(DISK_FREE_CMD)
+ disk_dict = {}
+ line_num = 0
+ for line in disk_free.split('\n'):
+ line_num = line_num + 1
+ if line_num == 1 or line == "":
+ continue
+ column_list = line.split()
+ disk_dict[column_list[0]] = column_list[5]
+
+ # get partition which is readonly
+ for partition in partition_list:
+ if partition in disk_dict:
+ ret = self.check_readonly(partition, disk_dict[partition])
+ if (ret != NOT_AVAILABLE):
+ ro_partition_list.append(ret)
+
+ return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+ "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..01d06fc34fc7
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc
@@ -0,0 +1,4 @@
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=xe,ce,cd
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/system_health_monitoring_config.json
similarity index 100%
rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py
rename to device/micas/x86_64-micas_m2-w6940-128qc-r0/system_health_monitoring_config.json
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
new file mode 100644
index 000000000000..56d71ff48119
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
@@ -0,0 +1,203 @@
+{
+ "interfaces": {
+ "Ethernet1": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet9": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet17": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet25": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet33": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet41": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet49": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet57": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet65": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet73": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet81": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet89": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet97": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet105": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet113": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet121": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet129": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet137": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet145": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet153": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet161": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet169": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet177": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet185": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet193": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet201": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet209": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet217": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet225": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet233": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet241": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet249": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet257": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet265": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet273": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet281": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet289": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet297": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet305": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet313": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet321": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet329": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet337": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet345": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet353": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet361": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet369": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet377": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet385": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet393": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet401": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet409": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet417": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet425": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet433": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet441": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet449": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet457": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet465": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet473": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet481": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet489": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet497": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet505": {
+ "default_brkout_mode": "1x800G"
+ },
+ "Ethernet513": {
+ "default_brkout_mode": "1x25G"
+ },
+ "Ethernet515": {
+ "default_brkout_mode": "1x25G"
+ }
+ }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini
new file mode 100644
index 000000000000..02e760ad87bb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini
@@ -0,0 +1,67 @@
+# name lanes alias index speed
+Ethernet1 41,42,43,44,45,46,47,48 eightHundredGigE0/1 0 800000
+Ethernet9 33,34,35,36,37,38,39,40 eightHundredGigE0/2 1 800000
+Ethernet17 57,58,59,60,61,62,63,64 eightHundredGigE0/3 2 800000
+Ethernet25 49,50,51,52,53,54,55,56 eightHundredGigE0/4 3 800000
+Ethernet33 73,74,75,76,77,78,79,80 eightHundredGigE0/5 4 800000
+Ethernet41 65,66,67,68,69,70,71,72 eightHundredGigE0/6 5 800000
+Ethernet49 89,90,91,92,93,94,95,96 eightHundredGigE0/7 6 800000
+Ethernet57 81,82,83,84,85,86,87,88 eightHundredGigE0/8 7 800000
+Ethernet65 105,106,107,108,109,110,111,112 eightHundredGigE0/9 8 800000
+Ethernet73 97,98,99,100,101,102,103,104 eightHundredGigE0/10 9 800000
+Ethernet81 121,122,123,124,125,126,127,128 eightHundredGigE0/11 10 800000
+Ethernet89 113,114,115,116,117,118,119,120 eightHundredGigE0/12 11 800000
+Ethernet97 137,138,139,140,141,142,143,144 eightHundredGigE0/13 12 800000
+Ethernet105 129,130,131,132,133,134,135,136 eightHundredGigE0/14 13 800000
+Ethernet113 153,154,155,156,157,158,159,160 eightHundredGigE0/15 14 800000
+Ethernet121 145,146,147,148,149,150,151,152 eightHundredGigE0/16 15 800000
+Ethernet129 169,170,171,172,173,174,175,176 eightHundredGigE0/17 16 800000
+Ethernet137 161,162,163,164,165,166,167,168 eightHundredGigE0/18 17 800000
+Ethernet145 185,186,187,188,189,190,191,192 eightHundredGigE0/19 18 800000
+Ethernet153 177,178,179,180,181,182,183,184 eightHundredGigE0/20 19 800000
+Ethernet161 201,202,203,204,205,206,207,208 eightHundredGigE0/21 20 800000
+Ethernet169 193,194,195,196,197,198,199,200 eightHundredGigE0/22 21 800000
+Ethernet177 217,218,219,220,221,222,223,224 eightHundredGigE0/23 22 800000
+Ethernet185 209,210,211,212,213,214,215,216 eightHundredGigE0/24 23 800000
+Ethernet193 1,2,3,4,5,6,7,8 eightHundredGigE0/25 24 800000
+Ethernet201 9,10,11,12,13,14,15,16 eightHundredGigE0/26 25 800000
+Ethernet209 17,18,19,20,21,22,23,24 eightHundredGigE0/27 26 800000
+Ethernet217 25,26,27,28,29,30,31,32 eightHundredGigE0/28 27 800000
+Ethernet225 249,250,251,252,253,254,255,256 eightHundredGigE0/29 28 800000
+Ethernet233 241,242,243,244,245,246,247,248 eightHundredGigE0/30 29 800000
+Ethernet241 233,234,235,236,237,238,239,240 eightHundredGigE0/31 30 800000
+Ethernet249 225,226,227,228,229,230,231,232 eightHundredGigE0/32 31 800000
+Ethernet257 257,258,259,260,261,262,263,264 eightHundredGigE0/33 32 800000
+Ethernet265 265,266,267,268,269,270,271,272 eightHundredGigE0/34 33 800000
+Ethernet273 273,274,275,276,277,278,279,280 eightHundredGigE0/35 34 800000
+Ethernet281 281,282,283,284,285,286,287,288 eightHundredGigE0/36 35 800000
+Ethernet289 505,506,507,508,509,510,511,512 eightHundredGigE0/37 36 800000
+Ethernet297 497,498,499,500,501,502,503,504 eightHundredGigE0/38 37 800000
+Ethernet305 489,490,491,492,493,494,495,496 eightHundredGigE0/39 38 800000
+Ethernet313 481,482,483,484,485,486,487,488 eightHundredGigE0/40 39 800000
+Ethernet321 297,298,299,300,301,302,303,304 eightHundredGigE0/41 40 800000
+Ethernet329 289,290,291,292,293,294,295,296 eightHundredGigE0/42 41 800000
+Ethernet337 313,314,315,316,317,318,319,320 eightHundredGigE0/43 42 800000
+Ethernet345 305,306,307,308,309,310,311,312 eightHundredGigE0/44 43 800000
+Ethernet353 329,330,331,332,333,334,335,336 eightHundredGigE0/45 44 800000
+Ethernet361 321,322,323,324,325,326,327,328 eightHundredGigE0/46 45 800000
+Ethernet369 345,346,347,348,349,350,351,352 eightHundredGigE0/47 46 800000
+Ethernet377 337,338,339,340,341,342,343,344 eightHundredGigE0/48 47 800000
+Ethernet385 361,362,363,364,365,366,367,368 eightHundredGigE0/49 48 800000
+Ethernet393 353,354,355,356,357,358,359,360 eightHundredGigE0/50 49 800000
+Ethernet401 377,378,379,380,381,382,383,384 eightHundredGigE0/51 50 800000
+Ethernet409 369,370,371,372,373,374,375,376 eightHundredGigE0/52 51 800000
+Ethernet417 393,394,395,396,397,398,399,400 eightHundredGigE0/53 52 800000
+Ethernet425 385,386,387,388,389,390,391,392 eightHundredGigE0/54 53 800000
+Ethernet433 409,410,411,412,413,414,415,416 eightHundredGigE0/55 54 800000
+Ethernet441 401,402,403,404,405,406,407,408 eightHundredGigE0/56 55 800000
+Ethernet449 425,426,427,428,429,430,431,432 eightHundredGigE0/57 56 800000
+Ethernet457 417,418,419,420,421,422,423,424 eightHundredGigE0/58 57 800000
+Ethernet465 441,442,443,444,445,446,447,448 eightHundredGigE0/59 58 800000
+Ethernet473 433,434,435,436,437,438,439,440 eightHundredGigE0/60 59 800000
+Ethernet481 457,458,459,460,461,462,463,464 eightHundredGigE0/61 60 800000
+Ethernet489 449,450,451,452,453,454,455,456 eightHundredGigE0/62 61 800000
+Ethernet497 473,474,475,476,477,478,479,480 eightHundredGigE0/63 62 800000
+Ethernet505 465,466,467,468,469,470,471,472 eightHundredGigE0/64 63 800000
+Ethernet513 513 twentyfiveGigE0/65 64 25000
+Ethernet515 515 twentyfiveGigE0/66 65 25000
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile
new file mode 100644
index 000000000000..ad2e534f2e58
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-64oc-64x800G.config.yml
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
new file mode 100644
index 000000000000..33f2781d7b97
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
@@ -0,0 +1,14985 @@
+---
+device:
+ 0:
+ DEVICE_CONFIG:
+ AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+ 0:
+ DEVICE_CONFIG:
+ AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+ 0:
+ PC_PM_CORE:
+ ?
+ PC_PM_ID: 1
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x02714356
+ RX_LANE_MAP: 0x27506431
+ TX_POLARITY_FLIP: 0x59
+ RX_POLARITY_FLIP: 0x76
+ ?
+ PC_PM_ID: 2
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x27360514
+ RX_LANE_MAP: 0x46731520
+ TX_POLARITY_FLIP: 0x8d
+ RX_POLARITY_FLIP: 0xd5
+ ?
+ PC_PM_ID: 3
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x50234716
+ RX_LANE_MAP: 0x31642750
+ TX_POLARITY_FLIP: 0x5a
+ RX_POLARITY_FLIP: 0x0b
+ ?
+ PC_PM_ID: 4
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x17250436
+ RX_LANE_MAP: 0x30764215
+ TX_POLARITY_FLIP: 0xf5
+ RX_POLARITY_FLIP: 0xbc
+ ?
+ PC_PM_ID: 5
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x60427153
+ RX_LANE_MAP: 0x15370426
+ TX_POLARITY_FLIP: 0x16
+ RX_POLARITY_FLIP: 0xb0
+ ?
+ PC_PM_ID: 6
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73524016
+ RX_LANE_MAP: 0x36241705
+ TX_POLARITY_FLIP: 0xb0
+ RX_POLARITY_FLIP: 0xa0
+ ?
+ PC_PM_ID: 7
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x61042537
+ RX_LANE_MAP: 0x05172436
+ TX_POLARITY_FLIP: 0xd2
+ RX_POLARITY_FLIP: 0x0b
+ ?
+ PC_PM_ID: 8
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x16042537
+ RX_LANE_MAP: 0x05172436
+ TX_POLARITY_FLIP: 0x52
+ RX_POLARITY_FLIP: 0x0a
+ ?
+ PC_PM_ID: 9
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x63250471
+ RX_LANE_MAP: 0x63427150
+ TX_POLARITY_FLIP: 0x3a
+ RX_POLARITY_FLIP: 0x51
+ ?
+ PC_PM_ID: 10
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73524016
+ RX_LANE_MAP: 0x63427150
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0x50
+ ?
+ PC_PM_ID: 11
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x61042537
+ RX_LANE_MAP: 0x05172436
+ TX_POLARITY_FLIP: 0xd2
+ RX_POLARITY_FLIP: 0x0b
+ ?
+ PC_PM_ID: 12
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x16042537
+ RX_LANE_MAP: 0x05172436
+ TX_POLARITY_FLIP: 0x52
+ RX_POLARITY_FLIP: 0x0a
+ ?
+ PC_PM_ID: 13
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x63250471
+ RX_LANE_MAP: 0x63427150
+ TX_POLARITY_FLIP: 0x3a
+ RX_POLARITY_FLIP: 0x51
+ ?
+ PC_PM_ID: 14
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73524016
+ RX_LANE_MAP: 0x63427150
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0x50
+ ?
+ PC_PM_ID: 15
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x61042537
+ RX_LANE_MAP: 0x05172436
+ TX_POLARITY_FLIP: 0xd2
+ RX_POLARITY_FLIP: 0x0b
+ ?
+ PC_PM_ID: 16
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x16042537
+ RX_LANE_MAP: 0x05172436
+ TX_POLARITY_FLIP: 0x52
+ RX_POLARITY_FLIP: 0x0a
+ ?
+ PC_PM_ID: 17
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x17526034
+ RX_LANE_MAP: 0x34261507
+ TX_POLARITY_FLIP: 0xc1
+ RX_POLARITY_FLIP: 0x94
+ ?
+ PC_PM_ID: 18
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37250641
+ RX_LANE_MAP: 0x34261507
+ TX_POLARITY_FLIP: 0x43
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 19
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14605273
+ RX_LANE_MAP: 0x70516243
+ TX_POLARITY_FLIP: 0x3d
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 20
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x41605273
+ RX_LANE_MAP: 0x70516243
+ TX_POLARITY_FLIP: 0xbd
+ RX_POLARITY_FLIP: 0xa9
+ ?
+ PC_PM_ID: 21
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x17250634
+ RX_LANE_MAP: 0x34261507
+ TX_POLARITY_FLIP: 0xc1
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 22
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37250641
+ RX_LANE_MAP: 0x34261507
+ TX_POLARITY_FLIP: 0x43
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 23
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14605273
+ RX_LANE_MAP: 0x70516243
+ TX_POLARITY_FLIP: 0x3f
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 24
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x41605273
+ RX_LANE_MAP: 0x70516243
+ TX_POLARITY_FLIP: 0xb4
+ RX_POLARITY_FLIP: 0xa9
+ ?
+ PC_PM_ID: 25
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x17526034
+ RX_LANE_MAP: 0x34261507
+ TX_POLARITY_FLIP: 0xc1
+ RX_POLARITY_FLIP: 0xb7
+ ?
+ PC_PM_ID: 26
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37250641
+ RX_LANE_MAP: 0x34261507
+ TX_POLARITY_FLIP: 0x43
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 27
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14305267
+ RX_LANE_MAP: 0x70516243
+ TX_POLARITY_FLIP: 0x0e
+ RX_POLARITY_FLIP: 0xa9
+ ?
+ PC_PM_ID: 28
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x72634150
+ RX_LANE_MAP: 0x27340516
+ TX_POLARITY_FLIP: 0x11
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 29
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x31647025
+ RX_LANE_MAP: 0x64531072
+ TX_POLARITY_FLIP: 0xab
+ RX_POLARITY_FLIP: 0xaf
+ ?
+ PC_PM_ID: 30
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x15602743
+ RX_LANE_MAP: 0x52137604
+ TX_POLARITY_FLIP: 0x46
+ RX_POLARITY_FLIP: 0xe7
+ ?
+ PC_PM_ID: 31
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73564012
+ RX_LANE_MAP: 0x34107625
+ TX_POLARITY_FLIP: 0x9f
+ RX_POLARITY_FLIP: 0x69
+ ?
+ PC_PM_ID: 32
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76243501
+ RX_LANE_MAP: 0x35162470
+ TX_POLARITY_FLIP: 0xa6
+ RX_POLARITY_FLIP: 0xc8
+ ?
+ PC_PM_ID: 33
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x07546321
+ RX_LANE_MAP: 0x25176430
+ TX_POLARITY_FLIP: 0x65
+ RX_POLARITY_FLIP: 0x9e
+ ?
+ PC_PM_ID: 34
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37164250
+ RX_LANE_MAP: 0x75032614
+ TX_POLARITY_FLIP: 0x32
+ RX_POLARITY_FLIP: 0x3e
+ ?
+ PC_PM_ID: 35
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73402516
+ RX_LANE_MAP: 0x60347215
+ TX_POLARITY_FLIP: 0x7a
+ RX_POLARITY_FLIP: 0xd9
+ ?
+ PC_PM_ID: 36
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x71345062
+ RX_LANE_MAP: 0x42173056
+ TX_POLARITY_FLIP: 0xa1
+ RX_POLARITY_FLIP: 0x60
+ ?
+ PC_PM_ID: 37
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x70416352
+ RX_LANE_MAP: 0x16053427
+ TX_POLARITY_FLIP: 0x18
+ RX_POLARITY_FLIP: 0xa8
+ ?
+ PC_PM_ID: 38
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73526014
+ RX_LANE_MAP: 0x43625170
+ TX_POLARITY_FLIP: 0x78
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 39
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x41062537
+ RX_LANE_MAP: 0x07152634
+ TX_POLARITY_FLIP: 0xc3
+ RX_POLARITY_FLIP: 0x98
+ ?
+ PC_PM_ID: 40
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14062537
+ RX_LANE_MAP: 0x07152634
+ TX_POLARITY_FLIP: 0x41
+ RX_POLARITY_FLIP: 0x89
+ ?
+ PC_PM_ID: 41
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x43526071
+ RX_LANE_MAP: 0x43625170
+ TX_POLARITY_FLIP: 0x7c
+ RX_POLARITY_FLIP: 0x94
+ ?
+ PC_PM_ID: 42
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73526014
+ RX_LANE_MAP: 0x43625170
+ TX_POLARITY_FLIP: 0x7c
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 43
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x41062537
+ RX_LANE_MAP: 0x07152634
+ TX_POLARITY_FLIP: 0xc1
+ RX_POLARITY_FLIP: 0x56
+ ?
+ PC_PM_ID: 44
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14062537
+ RX_LANE_MAP: 0x07152634
+ TX_POLARITY_FLIP: 0x41
+ RX_POLARITY_FLIP: 0x01
+ ?
+ PC_PM_ID: 45
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x43526071
+ RX_LANE_MAP: 0x43625170
+ TX_POLARITY_FLIP: 0xfe
+ RX_POLARITY_FLIP: 0x94
+ ?
+ PC_PM_ID: 46
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x73526014
+ RX_LANE_MAP: 0x43625170
+ TX_POLARITY_FLIP: 0x7c
+ RX_POLARITY_FLIP: 0x95
+ ?
+ PC_PM_ID: 47
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x41062537
+ RX_LANE_MAP: 0x07152634
+ TX_POLARITY_FLIP: 0xc1
+ RX_POLARITY_FLIP: 0x56
+ ?
+ PC_PM_ID: 48
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x14062537
+ RX_LANE_MAP: 0x07152634
+ TX_POLARITY_FLIP: 0x41
+ RX_POLARITY_FLIP: 0x01
+ ?
+ PC_PM_ID: 49
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x67524031
+ RX_LANE_MAP: 0x36241705
+ TX_POLARITY_FLIP: 0x8b
+ RX_POLARITY_FLIP: 0x5e
+ ?
+ PC_PM_ID: 50
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37250461
+ RX_LANE_MAP: 0x36241705
+ TX_POLARITY_FLIP: 0x87
+ RX_POLARITY_FLIP: 0x5f
+ ?
+ PC_PM_ID: 51
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x16405273
+ RX_LANE_MAP: 0x50714263
+ TX_POLARITY_FLIP: 0x1e
+ RX_POLARITY_FLIP: 0xcb
+ ?
+ PC_PM_ID: 52
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x61405273
+ RX_LANE_MAP: 0x50714263
+ TX_POLARITY_FLIP: 0x9e
+ RX_POLARITY_FLIP: 0xda
+ ?
+ PC_PM_ID: 53
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x17524036
+ RX_LANE_MAP: 0x36241705
+ TX_POLARITY_FLIP: 0x8b
+ RX_POLARITY_FLIP: 0x5e
+ ?
+ PC_PM_ID: 54
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37250461
+ RX_LANE_MAP: 0x36241705
+ TX_POLARITY_FLIP: 0x87
+ RX_POLARITY_FLIP: 0x5f
+ ?
+ PC_PM_ID: 55
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x16405273
+ RX_LANE_MAP: 0x50714263
+ TX_POLARITY_FLIP: 0x1e
+ RX_POLARITY_FLIP: 0xcb
+ ?
+ PC_PM_ID: 56
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x61405273
+ RX_LANE_MAP: 0x50714263
+ TX_POLARITY_FLIP: 0x9e
+ RX_POLARITY_FLIP: 0xda
+ ?
+ PC_PM_ID: 57
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x17250436
+ RX_LANE_MAP: 0x36241705
+ TX_POLARITY_FLIP: 0x4d
+ RX_POLARITY_FLIP: 0x5f
+ ?
+ PC_PM_ID: 58
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37250461
+ RX_LANE_MAP: 0x36241705
+ TX_POLARITY_FLIP: 0x87
+ RX_POLARITY_FLIP: 0x5f
+ ?
+ PC_PM_ID: 59
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x61405273
+ RX_LANE_MAP: 0x50314267
+ TX_POLARITY_FLIP: 0x0e
+ RX_POLARITY_FLIP: 0xc7
+ ?
+ PC_PM_ID: 60
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x37146250
+ RX_LANE_MAP: 0x35062714
+ TX_POLARITY_FLIP: 0xfe
+ RX_POLARITY_FLIP: 0xd3
+ ?
+ PC_PM_ID: 61
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x27165304
+ RX_LANE_MAP: 0x75340126
+ TX_POLARITY_FLIP: 0x62
+ RX_POLARITY_FLIP: 0x45
+ ?
+ PC_PM_ID: 62
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x10527634
+ RX_LANE_MAP: 0x53702614
+ TX_POLARITY_FLIP: 0xa0
+ RX_POLARITY_FLIP: 0x89
+ ?
+ PC_PM_ID: 63
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x04561237
+ RX_LANE_MAP: 0x05643217
+ TX_POLARITY_FLIP: 0x31
+ RX_POLARITY_FLIP: 0xf0
+ ?
+ PC_PM_ID: 64
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x76540123
+ RX_LANE_MAP: 0x13056472
+ TX_POLARITY_FLIP: 0xe8
+ RX_POLARITY_FLIP: 0x5d
+ ?
+ PC_PM_ID: 65
+ CORE_INDEX: 0
+ :
+ TX_LANE_MAP_AUTO: 0
+ RX_LANE_MAP_AUTO: 0
+ TX_POLARITY_FLIP_AUTO: 0
+ RX_POLARITY_FLIP_AUTO: 0
+ TX_LANE_MAP: 0x3012
+ TX_POLARITY_FLIP: 0
+ RX_LANE_MAP: 0x3012
+ RX_POLARITY_FLIP: 0
+...
+
+---
+device:
+ 0:
+ PC_PORT_PHYS_MAP:
+ ?
+ # CPU port
+ PORT_ID: 0
+ :
+ PC_PHYS_PORT_ID: 0
+ ?
+ PORT_ID: 1
+ :
+ PC_PHYS_PORT_ID: 1
+ ?
+ PORT_ID: 5
+ :
+ PC_PHYS_PORT_ID: 9
+ ?
+ PORT_ID: 11
+ :
+ PC_PHYS_PORT_ID: 17
+ ?
+ PORT_ID: 15
+ :
+ PC_PHYS_PORT_ID: 25
+ ?
+ PORT_ID: 22
+ :
+ PC_PHYS_PORT_ID: 33
+ ?
+ PORT_ID: 26
+ :
+ PC_PHYS_PORT_ID: 41
+ ?
+ PORT_ID: 33
+ :
+ PC_PHYS_PORT_ID: 49
+ ?
+ PORT_ID: 37
+ :
+ PC_PHYS_PORT_ID: 57
+ ?
+ PORT_ID: 44
+ :
+ PC_PHYS_PORT_ID: 65
+ ?
+ PORT_ID: 48
+ :
+ PC_PHYS_PORT_ID: 73
+ ?
+ PORT_ID: 55
+ :
+ PC_PHYS_PORT_ID: 81
+ ?
+ PORT_ID: 59
+ :
+ PC_PHYS_PORT_ID: 89
+ ?
+ PORT_ID: 66
+ :
+ PC_PHYS_PORT_ID: 97
+ ?
+ PORT_ID: 70
+ :
+ PC_PHYS_PORT_ID: 105
+ ?
+ PORT_ID: 77
+ :
+ PC_PHYS_PORT_ID: 113
+ ?
+ PORT_ID: 81
+ :
+ PC_PHYS_PORT_ID: 121
+ ?
+ PORT_ID: 88
+ :
+ PC_PHYS_PORT_ID: 129
+ ?
+ PORT_ID: 92
+ :
+ PC_PHYS_PORT_ID: 137
+ ?
+ PORT_ID: 99
+ :
+ PC_PHYS_PORT_ID: 145
+ ?
+ PORT_ID: 103
+ :
+ PC_PHYS_PORT_ID: 153
+ ?
+ PORT_ID: 110
+ :
+ PC_PHYS_PORT_ID: 161
+ ?
+ PORT_ID: 114
+ :
+ PC_PHYS_PORT_ID: 169
+ ?
+ PORT_ID: 121
+ :
+ PC_PHYS_PORT_ID: 177
+ ?
+ PORT_ID: 125
+ :
+ PC_PHYS_PORT_ID: 185
+ ?
+ PORT_ID: 132
+ :
+ PC_PHYS_PORT_ID: 193
+ ?
+ PORT_ID: 136
+ :
+ PC_PHYS_PORT_ID: 201
+ ?
+ PORT_ID: 143
+ :
+ PC_PHYS_PORT_ID: 209
+ ?
+ PORT_ID: 147
+ :
+ PC_PHYS_PORT_ID: 217
+ ?
+ PORT_ID: 154
+ :
+ PC_PHYS_PORT_ID: 225
+ ?
+ PORT_ID: 158
+ :
+ PC_PHYS_PORT_ID: 233
+ ?
+ PORT_ID: 165
+ :
+ PC_PHYS_PORT_ID: 241
+ ?
+ PORT_ID: 169
+ :
+ PC_PHYS_PORT_ID: 249
+ ?
+ PORT_ID: 176
+ :
+ PC_PHYS_PORT_ID: 257
+ ?
+ PORT_ID: 180
+ :
+ PC_PHYS_PORT_ID: 265
+ ?
+ PORT_ID: 187
+ :
+ PC_PHYS_PORT_ID: 273
+ ?
+ PORT_ID: 191
+ :
+ PC_PHYS_PORT_ID: 281
+ ?
+ PORT_ID: 198
+ :
+ PC_PHYS_PORT_ID: 289
+ ?
+ PORT_ID: 202
+ :
+ PC_PHYS_PORT_ID: 297
+ ?
+ PORT_ID: 209
+ :
+ PC_PHYS_PORT_ID: 305
+ ?
+ PORT_ID: 213
+ :
+ PC_PHYS_PORT_ID: 313
+ ?
+ PORT_ID: 220
+ :
+ PC_PHYS_PORT_ID: 321
+ ?
+ PORT_ID: 224
+ :
+ PC_PHYS_PORT_ID: 329
+ ?
+ PORT_ID: 231
+ :
+ PC_PHYS_PORT_ID: 337
+ ?
+ PORT_ID: 235
+ :
+ PC_PHYS_PORT_ID: 345
+ ?
+ PORT_ID: 242
+ :
+ PC_PHYS_PORT_ID: 353
+ ?
+ PORT_ID: 246
+ :
+ PC_PHYS_PORT_ID: 361
+ ?
+ PORT_ID: 253
+ :
+ PC_PHYS_PORT_ID: 369
+ ?
+ PORT_ID: 257
+ :
+ PC_PHYS_PORT_ID: 377
+ ?
+ PORT_ID: 264
+ :
+ PC_PHYS_PORT_ID: 385
+ ?
+ PORT_ID: 268
+ :
+ PC_PHYS_PORT_ID: 393
+ ?
+ PORT_ID: 275
+ :
+ PC_PHYS_PORT_ID: 401
+ ?
+ PORT_ID: 279
+ :
+ PC_PHYS_PORT_ID: 409
+ ?
+ PORT_ID: 286
+ :
+ PC_PHYS_PORT_ID: 417
+ ?
+ PORT_ID: 290
+ :
+ PC_PHYS_PORT_ID: 425
+ ?
+ PORT_ID: 297
+ :
+ PC_PHYS_PORT_ID: 433
+ ?
+ PORT_ID: 301
+ :
+ PC_PHYS_PORT_ID: 441
+ ?
+ PORT_ID: 308
+ :
+ PC_PHYS_PORT_ID: 449
+ ?
+ PORT_ID: 312
+ :
+ PC_PHYS_PORT_ID: 457
+ ?
+ PORT_ID: 319
+ :
+ PC_PHYS_PORT_ID: 465
+ ?
+ PORT_ID: 323
+ :
+ PC_PHYS_PORT_ID: 473
+ ?
+ PORT_ID: 330
+ :
+ PC_PHYS_PORT_ID: 481
+ ?
+ PORT_ID: 334
+ :
+ PC_PHYS_PORT_ID: 489
+ ?
+ PORT_ID: 341
+ :
+ PC_PHYS_PORT_ID: 497
+ ?
+ PORT_ID: 345
+ :
+ PC_PHYS_PORT_ID: 505
+ ?
+ PORT_ID: 76
+ :
+ PC_PHYS_PORT_ID: 513
+ ?
+ PORT_ID: 274
+ :
+ PC_PHYS_PORT_ID: 515
+...
+
+---
+device:
+ 0:
+ PC_PORT:
+ ?
+ PORT_ID: 0
+ :
+ ENABLE: 1
+ SPEED: 10000
+ NUM_LANES: 1
+ ?
+ PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345]
+ :
+ ENABLE: 0
+ SPEED: 800000
+ NUM_LANES: 8
+ FEC_MODE: PC_FEC_RS544_2XN
+ LINK_TRAINING: 0
+ MAX_FRAME_SIZE: 9416
+ ?
+ PORT_ID: [76, 274]
+ :
+ ENABLE: 0
+ SPEED: 25000
+ NUM_LANES: 1
+ MAX_FRAME_SIZE: 9416
+...
+
+---
+device:
+ 0:
+ PC_PMD_FIRMWARE:
+ ?
+ PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345]
+ :
+ MEDIUM_TYPE_AUTO: 0
+ MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE
+...
+
+---
+device:
+ 0:
+ TM_SCHEDULER_CONFIG:
+ NUM_MC_Q: NUM_MC_Q_4
+...
+
+---
+device:
+ 0:
+ FP_CONFIG:
+ FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+
+---
+bcm_device:
+ 0:
+ global:
+ bcm_tunnel_term_compatible_mode: 1
+ vlan_flooding_l2mc_num_reserved: 2048
+ l3_alpm_template: 2
+ l3_alpm2_bnk_threshold: 100
+ uft_mode: 1
+ l3_enable: 1
+ l2_hitbit_enable: 0
+ pktio_mode: 1
+ sai_pfc_defaults_disable: 1
+ sai_optimized_mmu: 1
+ sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+...
+
+---
+bcm_device:
+ 0:
+ port:
+ "*":
+ encap_mode: IEEE
+ dport_map_enable: 1
+ 26:
+ dport_map_port: 1
+ 27:
+ dport_map_port: 2
+ 28:
+ dport_map_port: 3
+ 29:
+ dport_map_port: 4
+ 22:
+ dport_map_port: 5
+ 23:
+ dport_map_port: 6
+ 24:
+ dport_map_port: 7
+ 25:
+ dport_map_port: 8
+ 37:
+ dport_map_port: 9
+ 38:
+ dport_map_port: 10
+ 39:
+ dport_map_port: 11
+ 40:
+ dport_map_port: 12
+ 33:
+ dport_map_port: 13
+ 34:
+ dport_map_port: 14
+ 35:
+ dport_map_port: 15
+ 36:
+ dport_map_port: 16
+ 48:
+ dport_map_port: 17
+ 49:
+ dport_map_port: 18
+ 50:
+ dport_map_port: 19
+ 51:
+ dport_map_port: 20
+ 44:
+ dport_map_port: 21
+ 45:
+ dport_map_port: 22
+ 46:
+ dport_map_port: 23
+ 47:
+ dport_map_port: 24
+ 59:
+ dport_map_port: 25
+ 60:
+ dport_map_port: 26
+ 61:
+ dport_map_port: 27
+ 62:
+ dport_map_port: 28
+ 55:
+ dport_map_port: 29
+ 56:
+ dport_map_port: 30
+ 57:
+ dport_map_port: 31
+ 58:
+ dport_map_port: 32
+ 70:
+ dport_map_port: 33
+ 71:
+ dport_map_port: 34
+ 72:
+ dport_map_port: 35
+ 73:
+ dport_map_port: 36
+ 66:
+ dport_map_port: 37
+ 67:
+ dport_map_port: 38
+ 68:
+ dport_map_port: 39
+ 69:
+ dport_map_port: 40
+ 81:
+ dport_map_port: 41
+ 82:
+ dport_map_port: 42
+ 83:
+ dport_map_port: 43
+ 84:
+ dport_map_port: 44
+ 77:
+ dport_map_port: 45
+ 78:
+ dport_map_port: 46
+ 79:
+ dport_map_port: 47
+ 80:
+ dport_map_port: 48
+ 92:
+ dport_map_port: 49
+ 93:
+ dport_map_port: 50
+ 94:
+ dport_map_port: 51
+ 95:
+ dport_map_port: 52
+ 88:
+ dport_map_port: 53
+ 89:
+ dport_map_port: 54
+ 90:
+ dport_map_port: 55
+ 91:
+ dport_map_port: 56
+ 103:
+ dport_map_port: 57
+ 104:
+ dport_map_port: 58
+ 105:
+ dport_map_port: 59
+ 106:
+ dport_map_port: 60
+ 99:
+ dport_map_port: 61
+ 100:
+ dport_map_port: 62
+ 101:
+ dport_map_port: 63
+ 102:
+ dport_map_port: 64
+ 114:
+ dport_map_port: 65
+ 115:
+ dport_map_port: 66
+ 116:
+ dport_map_port: 67
+ 117:
+ dport_map_port: 68
+ 110:
+ dport_map_port: 69
+ 111:
+ dport_map_port: 70
+ 112:
+ dport_map_port: 71
+ 113:
+ dport_map_port: 72
+ 125:
+ dport_map_port: 73
+ 126:
+ dport_map_port: 74
+ 127:
+ dport_map_port: 75
+ 128:
+ dport_map_port: 76
+ 121:
+ dport_map_port: 77
+ 122:
+ dport_map_port: 78
+ 123:
+ dport_map_port: 79
+ 124:
+ dport_map_port: 80
+ 136:
+ dport_map_port: 81
+ 137:
+ dport_map_port: 82
+ 138:
+ dport_map_port: 83
+ 139:
+ dport_map_port: 84
+ 132:
+ dport_map_port: 85
+ 133:
+ dport_map_port: 86
+ 134:
+ dport_map_port: 87
+ 135:
+ dport_map_port: 88
+ 147:
+ dport_map_port: 89
+ 148:
+ dport_map_port: 90
+ 149:
+ dport_map_port: 91
+ 150:
+ dport_map_port: 92
+ 143:
+ dport_map_port: 93
+ 144:
+ dport_map_port: 94
+ 145:
+ dport_map_port: 95
+ 146:
+ dport_map_port: 96
+ 1:
+ dport_map_port: 97
+ 2:
+ dport_map_port: 98
+ 3:
+ dport_map_port: 99
+ 4:
+ dport_map_port: 100
+ 5:
+ dport_map_port: 101
+ 6:
+ dport_map_port: 102
+ 7:
+ dport_map_port: 103
+ 8:
+ dport_map_port: 104
+ 11:
+ dport_map_port: 105
+ 12:
+ dport_map_port: 106
+ 13:
+ dport_map_port: 107
+ 14:
+ dport_map_port: 108
+ 15:
+ dport_map_port: 109
+ 16:
+ dport_map_port: 110
+ 17:
+ dport_map_port: 111
+ 18:
+ dport_map_port: 112
+ 169:
+ dport_map_port: 113
+ 170:
+ dport_map_port: 114
+ 171:
+ dport_map_port: 115
+ 172:
+ dport_map_port: 116
+ 165:
+ dport_map_port: 117
+ 166:
+ dport_map_port: 118
+ 167:
+ dport_map_port: 119
+ 168:
+ dport_map_port: 120
+ 158:
+ dport_map_port: 121
+ 159:
+ dport_map_port: 122
+ 160:
+ dport_map_port: 123
+ 161:
+ dport_map_port: 124
+ 154:
+ dport_map_port: 125
+ 155:
+ dport_map_port: 126
+ 156:
+ dport_map_port: 127
+ 157:
+ dport_map_port: 128
+ 176:
+ dport_map_port: 129
+ 177:
+ dport_map_port: 130
+ 178:
+ dport_map_port: 131
+ 179:
+ dport_map_port: 132
+ 180:
+ dport_map_port: 133
+ 181:
+ dport_map_port: 134
+ 182:
+ dport_map_port: 135
+ 183:
+ dport_map_port: 136
+ 187:
+ dport_map_port: 137
+ 188:
+ dport_map_port: 138
+ 189:
+ dport_map_port: 139
+ 190:
+ dport_map_port: 140
+ 191:
+ dport_map_port: 141
+ 192:
+ dport_map_port: 142
+ 193:
+ dport_map_port: 143
+ 194:
+ dport_map_port: 144
+ 345:
+ dport_map_port: 145
+ 346:
+ dport_map_port: 146
+ 347:
+ dport_map_port: 147
+ 348:
+ dport_map_port: 148
+ 341:
+ dport_map_port: 149
+ 342:
+ dport_map_port: 150
+ 343:
+ dport_map_port: 151
+ 344:
+ dport_map_port: 152
+ 334:
+ dport_map_port: 153
+ 335:
+ dport_map_port: 154
+ 336:
+ dport_map_port: 155
+ 337:
+ dport_map_port: 156
+ 330:
+ dport_map_port: 157
+ 331:
+ dport_map_port: 158
+ 332:
+ dport_map_port: 159
+ 333:
+ dport_map_port: 160
+ 202:
+ dport_map_port: 161
+ 203:
+ dport_map_port: 162
+ 204:
+ dport_map_port: 163
+ 205:
+ dport_map_port: 164
+ 198:
+ dport_map_port: 165
+ 199:
+ dport_map_port: 166
+ 200:
+ dport_map_port: 167
+ 201:
+ dport_map_port: 168
+ 213:
+ dport_map_port: 169
+ 214:
+ dport_map_port: 170
+ 215:
+ dport_map_port: 171
+ 216:
+ dport_map_port: 172
+ 209:
+ dport_map_port: 173
+ 210:
+ dport_map_port: 174
+ 211:
+ dport_map_port: 175
+ 212:
+ dport_map_port: 176
+ 224:
+ dport_map_port: 177
+ 225:
+ dport_map_port: 178
+ 226:
+ dport_map_port: 179
+ 227:
+ dport_map_port: 180
+ 220:
+ dport_map_port: 181
+ 221:
+ dport_map_port: 182
+ 222:
+ dport_map_port: 183
+ 223:
+ dport_map_port: 184
+ 235:
+ dport_map_port: 185
+ 236:
+ dport_map_port: 186
+ 237:
+ dport_map_port: 187
+ 238:
+ dport_map_port: 188
+ 231:
+ dport_map_port: 189
+ 232:
+ dport_map_port: 190
+ 233:
+ dport_map_port: 191
+ 234:
+ dport_map_port: 192
+ 246:
+ dport_map_port: 193
+ 247:
+ dport_map_port: 194
+ 248:
+ dport_map_port: 195
+ 249:
+ dport_map_port: 196
+ 242:
+ dport_map_port: 197
+ 243:
+ dport_map_port: 198
+ 244:
+ dport_map_port: 199
+ 245:
+ dport_map_port: 200
+ 257:
+ dport_map_port: 201
+ 258:
+ dport_map_port: 202
+ 259:
+ dport_map_port: 203
+ 260:
+ dport_map_port: 204
+ 253:
+ dport_map_port: 205
+ 254:
+ dport_map_port: 206
+ 255:
+ dport_map_port: 207
+ 256:
+ dport_map_port: 208
+ 268:
+ dport_map_port: 209
+ 269:
+ dport_map_port: 210
+ 270:
+ dport_map_port: 211
+ 271:
+ dport_map_port: 212
+ 264:
+ dport_map_port: 213
+ 265:
+ dport_map_port: 214
+ 266:
+ dport_map_port: 215
+ 267:
+ dport_map_port: 216
+ 279:
+ dport_map_port: 217
+ 280:
+ dport_map_port: 218
+ 281:
+ dport_map_port: 219
+ 282:
+ dport_map_port: 220
+ 275:
+ dport_map_port: 221
+ 276:
+ dport_map_port: 222
+ 277:
+ dport_map_port: 223
+ 278:
+ dport_map_port: 224
+ 290:
+ dport_map_port: 225
+ 291:
+ dport_map_port: 226
+ 292:
+ dport_map_port: 227
+ 293:
+ dport_map_port: 228
+ 286:
+ dport_map_port: 229
+ 287:
+ dport_map_port: 230
+ 288:
+ dport_map_port: 231
+ 289:
+ dport_map_port: 232
+ 301:
+ dport_map_port: 233
+ 302:
+ dport_map_port: 234
+ 303:
+ dport_map_port: 235
+ 304:
+ dport_map_port: 236
+ 297:
+ dport_map_port: 237
+ 298:
+ dport_map_port: 238
+ 299:
+ dport_map_port: 239
+ 300:
+ dport_map_port: 240
+ 312:
+ dport_map_port: 241
+ 313:
+ dport_map_port: 242
+ 314:
+ dport_map_port: 243
+ 315:
+ dport_map_port: 244
+ 308:
+ dport_map_port: 245
+ 309:
+ dport_map_port: 246
+ 310:
+ dport_map_port: 247
+ 311:
+ dport_map_port: 248
+ 323:
+ dport_map_port: 249
+ 324:
+ dport_map_port: 250
+ 325:
+ dport_map_port: 251
+ 326:
+ dport_map_port: 252
+ 319:
+ dport_map_port: 253
+ 320:
+ dport_map_port: 254
+ 321:
+ dport_map_port: 255
+ 322:
+ dport_map_port: 256
+ 76:
+ dport_map_port: 257
+ 274:
+ dport_map_port: 258
+...
+
+---
+device:
+ 0:
+ PC_TX_TAPS:
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 26
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 22
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 37
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 33
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 48
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 44
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 59
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 55
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 70
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 66
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 81
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 77
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 92
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 88
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 103
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 99
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 114
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 110
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 125
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 121
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 136
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 132
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 147
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 143
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 1
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 5
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 11
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 15
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 169
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 16
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 140
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 2
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 165
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 16
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 140
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 2
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 158
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 154
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 176
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 180
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 187
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 191
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 345
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 24
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 140
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 341
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 334
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 330
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 202
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 198
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 213
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 209
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 224
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 220
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 235
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 231
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 246
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 242
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 257
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 253
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 268
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 264
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 279
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 275
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 290
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 286
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 301
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 297
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 32
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 132
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 312
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 308
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 323
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 0
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 1
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 2
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 3
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 4
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 5
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 6
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+ ?
+ PORT_ID: 319
+ LANE_INDEX: 7
+ :
+ TX_SIG_MODE_AUTO: 0
+ TX_SIG_MODE: PC_SIG_MODE_PAM4
+ TXFIR_TAP_MODE_AUTO: 0
+ TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+ TX_PRE_SIGN: 1
+ TX_PRE_AUTO: 0
+ TX_PRE: 28
+ TX_MAIN_SIGN: 0
+ TX_MAIN_AUTO: 0
+ TX_MAIN: 136
+ TX_POST_SIGN: 0
+ TX_POST_AUTO: 0
+ TX_POST: 0
+ TX_PRE2_SIGN: 0
+ TX_PRE2_AUTO: 0
+ TX_PRE2: 4
+ TX_POST2_SIGN: 0
+ TX_POST2_AUTO: 0
+ TX_POST2: 0
+ TX_PRE3_SIGN: 0
+ TX_PRE3_AUTO: 0
+ TX_PRE3: 0
+...
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin
new file mode 100644
index 000000000000..04807432077f
Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku
new file mode 100644
index 000000000000..76806884effd
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku
@@ -0,0 +1 @@
+M2-W6940-64OC l2
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml
new file mode 100644
index 000000000000..99d4cec634e4
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml
@@ -0,0 +1,1153 @@
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diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+ def __init__(self, message='fruerror', code=-100):
+ err = 'errcode: {0} message:{1}'.format(code, message)
+ Exception.__init__(self, err)
+ self.code = code
+ self.message = message
+
+
+def e_print(err):
+ print("ERROR: " + err)
+
+
+def d_print(debug_info):
+ if __DEBUG__ == "Y":
+ print(debug_info)
+
+
+class FruUtil():
+ @staticmethod
+ def decodeLength(value):
+ a = bitarray(8)
+ a.setall(True)
+ a[0:1] = 0
+ a[1:2] = 0
+ x = ord(a.tobytes())
+ return x & ord(value)
+
+ @staticmethod
+ def minToData():
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ endtime = datetime.now()
+ seconds = (endtime - starttime).total_seconds()
+ mins = seconds // 60
+ m = int(round(mins))
+ return m
+
+ @staticmethod
+ def getTimeFormat():
+ return datetime.now().strftime('%Y-%m-%d')
+
+ @staticmethod
+ def getTypeLength(value):
+ if value is None or len(value) == 0:
+ return 0
+ a = bitarray(8)
+ a.setall(False)
+ a[0:1] = 1
+ a[1:2] = 1
+ x = ord(a.tobytes())
+ return x | len(value)
+
+ @staticmethod
+ def checksum(b):
+ result = 0
+ for item in b:
+ result += ord(item)
+ return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+ SUGGESTED_SIZE_COMMON_HEADER = 8
+ SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+ SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+ SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+ SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+ INITVALUE = b'\x00'
+ resultvalue = INITVALUE * 256
+ COMMON_HEAD_VERSION = b'\x01'
+ __childList = None
+
+ def __init__(self, name="", size=0, offset=0):
+ self.__childList = []
+ self._offset = offset
+ self.name = name
+ self._size = size
+ self._isPresent = False
+ self._data = b'\x00' * size
+
+ @property
+ def childList(self):
+ return self.__childList
+
+ @childList.setter
+ def childList(self, value):
+ self.__childList = value
+
+ @property
+ def offset(self):
+ return self._offset
+
+ @offset.setter
+ def offset(self, value):
+ self._offset = value
+
+ @property
+ def size(self):
+ return self._size
+
+ @size.setter
+ def size(self, value):
+ self._size = value
+
+ @property
+ def data(self):
+ return self._data
+
+ @data.setter
+ def data(self, value):
+ self._data = value
+
+ @property
+ def isPresent(self):
+ return self._isPresent
+
+ @isPresent.setter
+ def isPresent(self, value):
+ self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+ pass
+
+
+class ChassisInfoArea(BaseArea):
+ pass
+
+
+class BoardInfoArea(BaseArea):
+ _boardTime = None
+ _fields = None
+ _mfg_date = None
+ areaversion = None
+ _boardversion = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "mfg_date : %s \n" \
+ "boardManufacturer : %s \n" \
+ "boardProductName : %s \n" \
+ "boardSerialNumber : %s \n" \
+ "boardPartNumber : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.boardversion), self.size,
+ self.language, self.getMfgRealData(),
+ self.boardManufacturer, self.boardProductName,
+ self.boardSerialNumber, self.boardPartNumber,
+ self.fruFileId)
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "boardextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["boardversion"] = ord(self.boardversion)
+ dic["boardlength"] = self.size
+ dic["boardlanguage"] = self.language
+ dic["boardmfg_date"] = self.getMfgRealData()
+ dic["boardManufacturer"] = self.boardManufacturer
+ dic["boardProductName"] = self.boardProductName
+ dic["boardSerialNumber"] = self.boardSerialNumber
+ dic["boardPartNumber"] = self.boardPartNumber
+ dic["boardfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index]
+ index += 1
+ d_print("decode length :%d class size:%d" %
+ ((ord(self.data[index]) * 8), self.size))
+ index += 2
+
+ timetmp = self.data[index: index + 3]
+ self.mfg_date = ord(timetmp[0]) | (
+ ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+ d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+ index += 3
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardProductName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardProductName:%s" % self.boardProductName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.boardPartNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if self.data[index] != chr(0xc1):
+ templen = FruUtil.decodeLength(self.data[index])
+ tmpval = self.data[index + 1: index + templen + 1]
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ else:
+ break
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("boardInfoArea version:%x" % ord(self.boardversion))
+ d_print("boardInfoArea length:%d" % self.size)
+ d_print("boardInfoArea language:%x" % self.language)
+ self.mfg_date = FruUtil.minToData()
+ d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+ self.data = chr(ord(self.boardversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ self.data += chr(self.mfg_date & 0xFF)
+ self.data += chr((self.mfg_date >> 8) & 0xFF)
+ self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+ d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+ typelength = FruUtil.getTypeLength(self.boardManufacturer)
+ self.data += chr(typelength)
+ self.data += self.boardManufacturer
+
+ d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+ self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+ self.data += self.boardProductName
+
+ d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+ self.data += self.boardSerialNumber
+
+ d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+ self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+ self.data += self.boardPartNumber
+
+ d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "boardextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ d_print("self data:%d" % len(self.data))
+ d_print("self size:%d" % self.size)
+ d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+ # checksum
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+ def getMfgRealData(self):
+ starttime = datetime(1996, 1, 1, 0, 0, 0)
+ mactime = starttime + timedelta(minutes=self.mfg_date)
+ return mactime
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def mfg_date(self):
+ return self._mfg_date
+
+ @mfg_date.setter
+ def mfg_date(self, val):
+ self._mfg_date = val
+
+ @property
+ def boardversion(self):
+ self._boardversion = self.COMMON_HEAD_VERSION
+ return self._boardversion
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, val):
+ self._FRUFileID = val
+
+ @property
+ def boardPartNumber(self):
+ return self._boardPartNumber
+
+ @boardPartNumber.setter
+ def boardPartNumber(self, val):
+ self._boardPartNumber = val
+
+ @property
+ def boardSerialNumber(self):
+ return self._boardSerialNumber
+
+ @boardSerialNumber.setter
+ def boardSerialNumber(self, val):
+ self._boardSerialNumber = val
+
+ @property
+ def boardProductName(self):
+ return self._boradProductName
+
+ @boardProductName.setter
+ def boardProductName(self, val):
+ self._boradProductName = val
+
+ @property
+ def boardManufacturer(self):
+ return self._boardManufacturer
+
+ @boardManufacturer.setter
+ def boardManufacturer(self, val):
+ self._boardManufacturer = val
+
+ @property
+ def boardTime(self):
+ return self._boardTime
+
+ @boardTime.setter
+ def boardTime(self, val):
+ self._boardTime = val
+
+ @property
+ def fields(self):
+ return self._fields
+
+ @fields.setter
+ def fields(self, val):
+ self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+ _productManufacturer = None
+ _productAssetTag = None
+ _FRUFileID = None
+ _language = None
+
+ def __str__(self):
+ formatstr = "version : %x\n" \
+ "length : %d \n" \
+ "language : %x \n" \
+ "productManufacturer : %s \n" \
+ "productName : %s \n" \
+ "productPartModelName: %s \n" \
+ "productVersion : %s \n" \
+ "productSerialNumber : %s \n" \
+ "productAssetTag : %s \n" \
+ "fruFileId : %s \n"
+
+ tmpstr = formatstr % (ord(self.areaversion), self.size,
+ self.language, self.productManufacturer,
+ self.productName, self.productPartModelName,
+ self.productVersion, self.productSerialNumber,
+ self.productAssetTag, self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ tmpstr += "productextra%d : %s \n" % (i, valtmpval)
+ else:
+ break
+
+ return tmpstr
+
+ def todict(self):
+ dic = collections.OrderedDict()
+ dic["productversion"] = ord(self.areaversion)
+ dic["productlength"] = self.size
+ dic["productlanguage"] = self.language
+ dic["productManufacturer"] = self.productManufacturer
+ dic["productName"] = self.productName
+ dic["productPartModelName"] = self.productPartModelName
+ dic["productVersion"] = int(self.productVersion, 16)
+ dic["productSerialNumber"] = self.productSerialNumber
+ dic["productAssetTag"] = self.productAssetTag
+ dic["productfruFileId"] = self.fruFileId
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ dic[valtmp] = valtmpval
+ else:
+ break
+ return dic
+
+ def decodedata(self):
+ index = 0
+ self.areaversion = self.data[index] # 0
+ index += 1
+ d_print("decode length %d" % (ord(self.data[index]) * 8))
+ d_print("class size %d" % self.size)
+ index += 2
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productManufacturer = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productName:%s" % self.productName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productPartModelName = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productVersion = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productVersion:%s" % self.productVersion)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productSerialNumber = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.productAssetTag = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+ templen = FruUtil.decodeLength(self.data[index])
+ self.fruFileId = self.data[index + 1: index + templen + 1]
+ index += templen + 1
+ d_print("decode fruFileId:%s" % self.fruFileId)
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if self.data[index] != chr(0xc1) and index < self.size - 1:
+ templen = FruUtil.decodeLength(self.data[index])
+ if templen == 0:
+ break
+ tmpval = self.data[index + 1: index + templen + 1]
+ d_print("decode boardextra%d:%s" % (i, tmpval))
+ setattr(self, valtmp, tmpval)
+ index += templen + 1
+ else:
+ break
+
+ @property
+ def productVersion(self):
+ return self._productVersion
+
+ @productVersion.setter
+ def productVersion(self, name):
+ self._productVersion = name
+
+ @property
+ def areaversion(self):
+ self._areaversion = self.COMMON_HEAD_VERSION
+ return self._areaversion
+
+ @areaversion.setter
+ def areaversion(self, name):
+ self._areaversion = name
+
+ @property
+ def language(self):
+ self._language = 25
+ return self._language
+
+ @property
+ def productManufacturer(self):
+ return self._productManufacturer
+
+ @productManufacturer.setter
+ def productManufacturer(self, name):
+ self._productManufacturer = name
+
+ @property
+ def productName(self):
+ return self._productName
+
+ @productName.setter
+ def productName(self, name):
+ self._productName = name
+
+ @property
+ def productPartModelName(self):
+ return self._productPartModelName
+
+ @productPartModelName.setter
+ def productPartModelName(self, name):
+ self._productPartModelName = name
+
+ @property
+ def productSerialNumber(self):
+ return self._productSerialNumber
+
+ @productSerialNumber.setter
+ def productSerialNumber(self, name):
+ self._productSerialNumber = name
+
+ @property
+ def productAssetTag(self):
+ return self._productAssetTag
+
+ @productAssetTag.setter
+ def productAssetTag(self, name):
+ self._productAssetTag = name
+
+ @property
+ def fruFileId(self):
+ return self._FRUFileID
+
+ @fruFileId.setter
+ def fruFileId(self, name):
+ self._FRUFileID = name
+
+ def fruSetValue(self, field, value):
+ tmp_field = getattr(self, field, None)
+ if tmp_field is not None:
+ setattr(self, field, value)
+
+ def recalcute(self):
+ d_print("product version:%x" % ord(self.areaversion))
+ d_print("product length:%d" % self.size)
+ d_print("product language:%x" % self.language)
+ self.data = chr(ord(self.areaversion)) + \
+ chr(self.size // 8) + chr(self.language)
+
+ typelength = FruUtil.getTypeLength(self.productManufacturer)
+ self.data += chr(typelength)
+ self.data += self.productManufacturer
+
+ self.data += chr(FruUtil.getTypeLength(self.productName))
+ self.data += self.productName
+
+ self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+ self.data += self.productPartModelName
+
+ self.data += chr(FruUtil.getTypeLength(self.productVersion))
+ self.data += self.productVersion
+
+ self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+ self.data += self.productSerialNumber
+
+ self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+ if self.productAssetTag is not None:
+ self.data += self.productAssetTag
+
+ self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+ self.data += self.fruFileId
+
+ for i in range(1, 11):
+ valtmp = "productextra%d" % i
+ if hasattr(self, valtmp):
+ valtmpval = getattr(self, valtmp)
+ d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+ self.data += chr(FruUtil.getTypeLength(valtmpval))
+ if valtmpval is not None:
+ self.data += valtmpval
+ else:
+ break
+
+ self.data += chr(0xc1)
+ if len(self.data) > (self.size - 1):
+ incr = (len(self.data) - self.size) // 8 + 1
+ self.size += incr * 8
+ d_print("self.data:%d" % len(self.data))
+ d_print("self.size:%d" % self.size)
+
+ self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+ self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+ checksum = FruUtil.checksum(self.data)
+ d_print("board info checksum:%x" % checksum)
+ self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+ pass
+
+
+class Field(object):
+
+ def __init__(self, fieldType="ASCII", fieldData=""):
+ self.fieldData = fieldData
+ self.fieldType = fieldType
+
+ @property
+ def fieldType(self):
+ return self.fieldType
+
+ @property
+ def fieldData(self):
+ return self.fieldData
+
+
+class ipmifru(BaseArea):
+ _BoardInfoArea = None
+ _ProductInfoArea = None
+ _InternalUseArea = None
+ _ChassisInfoArea = None
+ _multiRecordArea = None
+ _productinfoAreaOffset = BaseArea.INITVALUE
+ _boardInfoAreaOffset = BaseArea.INITVALUE
+ _internalUserAreaOffset = BaseArea.INITVALUE
+ _chassicInfoAreaOffset = BaseArea.INITVALUE
+ _multiRecordAreaOffset = BaseArea.INITVALUE
+ _bindata = None
+ _bodybin = None
+ _version = BaseArea.COMMON_HEAD_VERSION
+ _zeroCheckSum = None
+ _frusize = 256
+
+ def __str__(self):
+ tmpstr = ""
+ if self.boardInfoArea.isPresent:
+ tmpstr += "\nboardinfoarea: \n"
+ tmpstr += self.boardInfoArea.__str__()
+ if self.productInfoArea.isPresent:
+ tmpstr += "\nproductinfoarea: \n"
+ tmpstr += self.productInfoArea.__str__()
+ return tmpstr
+
+ def decodeBin(self, eeprom):
+ commonHead = eeprom[0:8]
+ d_print("decode version %x" % ord(commonHead[0]))
+ if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+ raise FruException("HEAD VERSION error,not Fru format!", -10)
+ if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+ strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+ raise FruException(strtemp, -3)
+ if ord(commonHead[1]) != ord(self.INITVALUE):
+ d_print("Internal Use Area is present")
+ self.internalUseArea = InternalUseArea(
+ name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+ self.internalUseArea.isPresent = True
+ self.internalUserAreaOffset = ord(commonHead[1])
+ self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+ self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+ if ord(commonHead[2]) != ord(self.INITVALUE):
+ d_print("Chassis Info Area is present")
+ self.chassisInfoArea = ChassisInfoArea(
+ name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+ self.chassisInfoArea.isPresent = True
+ self.chassicInfoAreaOffset = ord(commonHead[2])
+ self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+ self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+ if ord(commonHead[3]) != ord(self.INITVALUE):
+ self.boardInfoArea = BoardInfoArea(
+ name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+ self.boardInfoArea.isPresent = True
+ self.boardInfoAreaOffset = ord(commonHead[3])
+ self.boardInfoArea.size = ord(
+ eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+ d_print("Board Info Area is present size:%d" %
+ (self.boardInfoArea.size))
+ self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+ self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+ if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+ strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \
+ (FruUtil.checksum(
+ self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.boardInfoArea.decodedata()
+ if ord(commonHead[4]) != ord(self.INITVALUE):
+ d_print("Product Info Area is present")
+ self.productInfoArea = ProductInfoArea(
+ name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+ self.productInfoArea.isPresent = True
+ self.productinfoAreaOffset = ord(commonHead[4])
+ d_print("length offset value: %02x" %
+ ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+ self.productInfoArea.size = ord(
+ eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+ d_print("Product Info Area is present size:%d" %
+ (self.productInfoArea.size))
+
+ self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+ self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+ if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+ strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+ FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+ raise FruException(strtmp, -3)
+ self.productInfoArea.decodedata()
+ if ord(commonHead[5]) != ord(self.INITVALUE):
+ self.multiRecordArea = MultiRecordArea(
+ name="MultiRecord record Area ")
+ d_print("MultiRecord record present")
+ self.multiRecordArea.isPresent = True
+ self.multiRecordAreaOffset = ord(commonHead[5])
+ self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+ self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+ def initDefault(self):
+ self.version = self.COMMON_HEAD_VERSION
+ self.internalUserAreaOffset = self.INITVALUE
+ self.chassicInfoAreaOffset = self.INITVALUE
+ self.boardInfoAreaOffset = self.INITVALUE
+ self.productinfoAreaOffset = self.INITVALUE
+ self.multiRecordAreaOffset = self.INITVALUE
+ self.zeroCheckSum = self.INITVALUE
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ self.productInfoArea = None
+ self.internalUseArea = None
+ self.boardInfoArea = None
+ self.chassisInfoArea = None
+ self.multiRecordArea = None
+ # self.recalcute()
+
+ @property
+ def version(self):
+ return self._version
+
+ @version.setter
+ def version(self, name):
+ self._version = name
+
+ @property
+ def internalUserAreaOffset(self):
+ return self._internalUserAreaOffset
+
+ @internalUserAreaOffset.setter
+ def internalUserAreaOffset(self, obj):
+ self._internalUserAreaOffset = obj
+
+ @property
+ def chassicInfoAreaOffset(self):
+ return self._chassicInfoAreaOffset
+
+ @chassicInfoAreaOffset.setter
+ def chassicInfoAreaOffset(self, obj):
+ self._chassicInfoAreaOffset = obj
+
+ @property
+ def productinfoAreaOffset(self):
+ return self._productinfoAreaOffset
+
+ @productinfoAreaOffset.setter
+ def productinfoAreaOffset(self, obj):
+ self._productinfoAreaOffset = obj
+
+ @property
+ def boardInfoAreaOffset(self):
+ return self._boardInfoAreaOffset
+
+ @boardInfoAreaOffset.setter
+ def boardInfoAreaOffset(self, obj):
+ self._boardInfoAreaOffset = obj
+
+ @property
+ def multiRecordAreaOffset(self):
+ return self._multiRecordAreaOffset
+
+ @multiRecordAreaOffset.setter
+ def multiRecordAreaOffset(self, obj):
+ self._multiRecordAreaOffset = obj
+
+ @property
+ def zeroCheckSum(self):
+ return self._zeroCheckSum
+
+ @zeroCheckSum.setter
+ def zeroCheckSum(self, obj):
+ self._zeroCheckSum = obj
+
+ @property
+ def productInfoArea(self):
+ return self._ProductInfoArea
+
+ @productInfoArea.setter
+ def productInfoArea(self, obj):
+ self._ProductInfoArea = obj
+
+ @property
+ def internalUseArea(self):
+ return self._InternalUseArea
+
+ @internalUseArea.setter
+ def internalUseArea(self, obj):
+ self.internalUseArea = obj
+
+ @property
+ def boardInfoArea(self):
+ return self._BoardInfoArea
+
+ @boardInfoArea.setter
+ def boardInfoArea(self, obj):
+ self._BoardInfoArea = obj
+
+ @property
+ def chassisInfoArea(self):
+ return self._ChassisInfoArea
+
+ @chassisInfoArea.setter
+ def chassisInfoArea(self, obj):
+ self._ChassisInfoArea = obj
+
+ @property
+ def multiRecordArea(self):
+ return self._multiRecordArea
+
+ @multiRecordArea.setter
+ def multiRecordArea(self, obj):
+ self._multiRecordArea = obj
+
+ @property
+ def bindata(self):
+ return self._bindata
+
+ @bindata.setter
+ def bindata(self, obj):
+ self._bindata = obj
+
+ @property
+ def bodybin(self):
+ return self._bodybin
+
+ @bodybin.setter
+ def bodybin(self, obj):
+ self._bodybin = obj
+
+ def recalcuteCommonHead(self):
+ self.bindata = ""
+ self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+ d_print("common Header %d" % self.offset)
+ d_print("fru eeprom size %d" % self._frusize)
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ self.internalUserAreaOffset = self.offset // 8
+ self.offset += self.internalUseArea.size
+ d_print("internalUseArea is present offset:%d" % self.offset)
+
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ self.chassicInfoAreaOffset = self.offset // 8
+ self.offset += self.chassisInfoArea.size
+ d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ self.boardInfoAreaOffset = self.offset // 8
+ self.offset += self.boardInfoArea.size
+ d_print("boardInfoArea is present offset:%d" % self.offset)
+ d_print("boardInfoArea is present size:%d" %
+ self.boardInfoArea.size)
+
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ self.productinfoAreaOffset = self.offset // 8
+ self.offset += self.productInfoArea.size
+ d_print("productInfoArea is present offset:%d" % self.offset)
+
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ self.multiRecordAreaOffset = self.offset // 8
+ d_print("multiRecordArea is present offset:%d" % self.offset)
+
+ if self.internalUserAreaOffset == self.INITVALUE:
+ self.internalUserAreaOffset = 0
+ if self.productinfoAreaOffset == self.INITVALUE:
+ self.productinfoAreaOffset = 0
+ if self.chassicInfoAreaOffset == self.INITVALUE:
+ self.chassicInfoAreaOffset = 0
+ if self.boardInfoAreaOffset == self.INITVALUE:
+ self.boardInfoAreaOffset = 0
+ if self.multiRecordAreaOffset == self.INITVALUE:
+ self.multiRecordAreaOffset = 0
+
+ self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+ - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+ d_print("zerochecksum:%x" % self.zeroCheckSum)
+ self.data = ""
+ self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+ self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+ self.bindata = self.data + self.bodybin
+ totallen = len(self.bindata)
+ d_print("totallen %d" % totallen)
+ if totallen < self._frusize:
+ self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+ else:
+ raise FruException('bin data more than %d' % self._frusize, -2)
+
+ def recalcutebin(self):
+ self.bodybin = ""
+ if self.internalUseArea is not None and self.internalUseArea.isPresent:
+ d_print("internalUseArea present")
+ self.bodybin += self.internalUseArea.data
+ if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+ d_print("chassisInfoArea present")
+ self.bodybin += self.chassisInfoArea.data
+ if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+ d_print("boardInfoArea present")
+ self.boardInfoArea.recalcute()
+ self.bodybin += self.boardInfoArea.data
+ if self.productInfoArea is not None and self.productInfoArea.isPresent:
+ d_print("productInfoAreapresent")
+ self.productInfoArea.recalcute()
+ self.bodybin += self.productInfoArea.data
+ if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+ d_print("multiRecordArea present")
+ self.bodybin += self.productInfoArea.data
+
+ def recalcute(self, fru_eeprom_size=256):
+ self._frusize = fru_eeprom_size
+ self.recalcutebin()
+ self.recalcuteCommonHead()
+
+ def setValue(self, area, field, value):
+ tmp_area = getattr(self, area, None)
+ if tmp_area is not None:
+ tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
new file mode 100644
index 000000000000..deb97654ad43
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=ice,mei_me,i2c_i801,i2c_ismt,iTCO_wdt"
+CONSOLE_PORT=0x5060
+CONSOLE_DEV=0
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc
new file mode 100644
index 000000000000..5124ab75ab92
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc
@@ -0,0 +1,2 @@
+led load /usr/share/sonic/platform/custom_led.bin
+
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json
new file mode 100644
index 000000000000..d609404c2e73
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json
@@ -0,0 +1,4100 @@
+{
+ "PORT_MEDIA_SETTINGS": {
+ "0": {
+ "Default": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004",
+ "lane4": "0x00000004",
+ "lane5": "0x00000004",
+ "lane6": "0x00000004",
+ "lane7": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe0",
+ "lane1": "0xffffffe4",
+ "lane2": "0xffffffe4",
+ "lane3": "0xffffffe4",
+ "lane4": "0xffffffe4",
+ "lane5": "0xffffffe4",
+ "lane6": "0xffffffe4",
+ "lane7": "0xffffffe4"
+ },
+ "main": {
+ "lane0": "0x00000084",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "1": {
+ "Default": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004",
+ "lane4": "0x00000004",
+ "lane5": "0x00000004",
+ "lane6": "0x00000004",
+ "lane7": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe4",
+ "lane1": "0xffffffe4",
+ "lane2": "0xffffffe4",
+ "lane3": "0xffffffe4",
+ "lane4": "0xffffffe4",
+ "lane5": "0xffffffe4",
+ "lane6": "0xffffffe4",
+ "lane7": "0xffffffe4"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "2": {
+ "Default": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004",
+ "lane4": "0x00000004",
+ "lane5": "0x00000004",
+ "lane6": "0x00000004",
+ "lane7": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe4",
+ "lane1": "0xffffffe4",
+ "lane2": "0xffffffe4",
+ "lane3": "0xffffffe4",
+ "lane4": "0xffffffe4",
+ "lane5": "0xffffffe4",
+ "lane6": "0xffffffe4",
+ "lane7": "0xffffffe4"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "3": {
+ "Default": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004",
+ "lane4": "0x00000004",
+ "lane5": "0x00000004",
+ "lane6": "0x00000004",
+ "lane7": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe4",
+ "lane1": "0xffffffe4",
+ "lane2": "0xffffffe4",
+ "lane3": "0xffffffe4",
+ "lane4": "0xffffffe4",
+ "lane5": "0xffffffe4",
+ "lane6": "0xffffffe4",
+ "lane7": "0xffffffe4"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ },
+ "4": {
+ "Default": {
+ "pre3": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "pre2": {
+ "lane0": "0x00000004",
+ "lane1": "0x00000004",
+ "lane2": "0x00000004",
+ "lane3": "0x00000004",
+ "lane4": "0x00000004",
+ "lane5": "0x00000004",
+ "lane6": "0x00000004",
+ "lane7": "0x00000004"
+ },
+ "pre1": {
+ "lane0": "0xffffffe4",
+ "lane1": "0xffffffe4",
+ "lane2": "0xffffffe4",
+ "lane3": "0xffffffe4",
+ "lane4": "0xffffffe4",
+ "lane5": "0xffffffe4",
+ "lane6": "0xffffffe4",
+ "lane7": "0xffffffe4"
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+ "lane0": "0xffffffe4",
+ "lane1": "0xffffffe4",
+ "lane2": "0xffffffe4",
+ "lane3": "0xffffffe4",
+ "lane4": "0xffffffe4",
+ "lane5": "0xffffffe4",
+ "lane6": "0xffffffe4",
+ "lane7": "0xffffffe4"
+ },
+ "main": {
+ "lane0": "0x00000088",
+ "lane1": "0x00000088",
+ "lane2": "0x00000088",
+ "lane3": "0x00000088",
+ "lane4": "0x00000088",
+ "lane5": "0x00000088",
+ "lane6": "0x00000088",
+ "lane7": "0x00000088"
+ },
+ "post1": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ },
+ "post2": {
+ "lane0": "0x00000000",
+ "lane1": "0x00000000",
+ "lane2": "0x00000000",
+ "lane3": "0x00000000",
+ "lane4": "0x00000000",
+ "lane5": "0x00000000",
+ "lane6": "0x00000000",
+ "lane7": "0x00000000"
+ }
+ }
+ }
+ }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py
new file mode 100644
index 000000000000..5fc287892e50
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+# * onboard temperature sensors
+# * FAN trays
+# * PSU
+#
+import os
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+ strtmp = ''
+ for value in val:
+ strtmp += chr(value)
+ return strtmp
+
+
+def typeTostr(val):
+ if isinstance(val, bytes):
+ strtmp = byteTostr(val)
+ return strtmp
+ return val
+
+
+def get_board_id():
+ if not os.path.exists(BOARD_ID_PATH):
+ return "NA"
+ with open(BOARD_ID_PATH) as fd:
+ id_str = fd.read().strip()
+ return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+ if not os.path.exists(BOARD_AIRFLOW_PATH):
+ return "NA"
+ with open(BOARD_AIRFLOW_PATH) as fd:
+ airflow_str = fd.read().strip()
+ data = json.loads(airflow_str)
+ airflow = data.get("board", "NA")
+ return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+ "dev_" + boardid + "_" + boardairflow + ".xml",
+ "dev_" + boardid + ".xml",
+ "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+ retval = "ERR"
+ val_list = []
+ msg = ""
+ ret = ""
+ fd = -1
+
+ if not os.path.exists(path):
+ return False, "%s %s not found" % (retval, path)
+
+ try:
+ fd = os.open(path, os.O_RDONLY)
+ os.lseek(fd, offset, os.SEEK_SET)
+ ret = os.read(fd, read_len)
+ for item in ret:
+ val_list.append(item)
+ except Exception as e:
+ msg = str(e)
+ return False, "%s %s" % (retval, msg)
+ finally:
+ if fd > 0:
+ os.close(fd)
+ return True, val_list
+
+
+def getPMCreg(location):
+ retval = 'ERR'
+ if not os.path.isfile(location):
+ return "%s %s notfound" % (retval, location)
+ try:
+ with open(location, 'r') as fd:
+ retval = fd.read()
+ except Exception as error:
+ return "ERR %s" % str(error)
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+ retval = 'ERR'
+ mb_reg_file = reg_name
+ filepath = glob.glob(mb_reg_file)
+ if len(filepath) == 0:
+ return "%s %s notfound" % (retval, mb_reg_file)
+ mb_reg_file = filepath[0]
+ if not os.path.isfile(mb_reg_file):
+ # print mb_reg_file, 'not found !'
+ return "%s %s notfound" % (retval, mb_reg_file)
+ try:
+ with open(mb_reg_file, 'rb') as fd:
+ retval = fd.read()
+ retval = typeTostr(retval)
+ except Exception as error:
+ retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+ retval = retval.rstrip('\r\n')
+ retval = retval.lstrip(" ")
+ return retval
+
+
+class checktype():
+ def __init__(self, test1):
+ self.test1 = test1
+
+ @staticmethod
+ def getValue(location, bit, data_type, coefficient=1, addend=0):
+ try:
+ value_t = get_pmc_register(location)
+ if value_t.startswith("ERR") or value_t.startswith("NA"):
+ return value_t
+ if data_type == 1:
+ return float('%.1f' % ((float(value_t) / 1000) + addend))
+ if data_type == 2:
+ return float('%.1f' % (float(value_t) / 100))
+ if data_type == 3:
+ psu_status = int(value_t, 16)
+ return (psu_status & (1 << bit)) >> bit
+ if data_type == 4:
+ return int(value_t, 10)
+ if data_type == 5:
+ return float('%.1f' % (float(value_t) / 1000 / 1000))
+ if data_type == 6:
+ return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+ return value_t
+ except Exception as e:
+ value_t = "ERR %s" % str(e)
+ return value_t
+
+ # fanFRU
+ @staticmethod
+ def decodeBinByValue(retval):
+ fru = ipmifru()
+ fru.decodeBin(retval)
+ return fru
+
+ @staticmethod
+ def getfruValue(prob_t, root, val):
+ try:
+ ret, binval_bytes = dev_file_read(val, 0, 256)
+ if ret is False:
+ return binval_bytes
+ binval = byteTostr(binval_bytes)
+ fanpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ fanpro['fan_type'] = ret.productInfoArea.productName
+ fanpro['hw_version'] = ret.productInfoArea.productVersion
+ fanpro['sn'] = ret.productInfoArea.productSerialNumber
+ fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+ fan_name = fanpro['fan_type'].strip()
+ if len(fan_display_name_dict) == 0:
+ return fanpro
+ if fan_name not in fan_display_name_dict:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+ else:
+ fanpro['fan_type'] = fan_display_name_dict[fan_name]
+ return fanpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getslotfruValue(val):
+ try:
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ slotpro = {}
+ ret = checktype.decodeBinByValue(binval)
+ slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+ slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+ slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+ return slotpro
+ except Exception as error:
+ return "ERR " + str(error)
+
+ @staticmethod
+ def getpsufruValue(prob_t, root, val):
+ try:
+ psu_match = False
+ binval = checktype.getValue(val, 0, 0)
+ if binval.startswith("ERR"):
+ return binval
+ psupro = {}
+ ret = checktype.decodeBinByValue(binval)
+ psupro['type1'] = ret.productInfoArea.productPartModelName
+ psupro['sn'] = ret.productInfoArea.productSerialNumber
+ psupro['hw_version'] = ret.productInfoArea.productVersion
+ psu_dict = status.getDecodValue(root, "psutype")
+ psupro['type1'] = psupro['type1'].strip()
+ if len(psu_dict) == 0:
+ return psupro
+ for psu_name, display_name in psu_dict.items():
+ if psu_name.strip() == psupro['type1']:
+ psupro['type1'] = display_name
+ psu_match = True
+ break
+ if psu_match is not True:
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+ return psupro
+ except Exception as error:
+ return "ERR " + str(error)
+
+
+class status():
+ def __init__(self, productname):
+ self.productname = productname
+
+ @staticmethod
+ def getETroot(filename):
+ tree = ET.parse(filename)
+ root = tree.getroot()
+ return root
+
+ @staticmethod
+ def getDecodValue(collection, decode):
+ decodes = collection.find('decode')
+ testdecode = decodes.find(decode)
+ test = {}
+ if testdecode is None:
+ return test
+ for neighbor in testdecode.iter('code'):
+ test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+ return test
+
+ @staticmethod
+ def getfileValue(location):
+ return checktype.getValue(location, " ", " ")
+
+ @staticmethod
+ def getETValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ prob_t = {}
+ prob_t.update(neighbor.attrib)
+ prob_t['errcode'] = 0
+ prob_t['errmsg'] = ''
+ for pros in neighbor.iter("property"):
+ ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+ if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+ fruval = checktype.getfruValue(prob_t, root, ret["location"])
+ if isinstance(fruval, str) and fruval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = fruval
+ break
+ prob_t.update(fruval)
+ continue
+
+ if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+ psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+ if isinstance(psuval, str) and psuval.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = psuval
+ break
+ prob_t.update(psuval)
+ continue
+
+ if ret.get("gettype") == "config":
+ prob_t[ret["name"]] = ret["value"]
+ continue
+
+ if 'type' not in ret.keys():
+ val = "0"
+ else:
+ val = ret["type"]
+ if 'bit' not in ret.keys():
+ bit = "0"
+ else:
+ bit = ret["bit"]
+ if 'coefficient' not in ret.keys():
+ coefficient = 1
+ else:
+ coefficient = float(ret["coefficient"])
+ if 'addend' not in ret.keys():
+ addend = 0
+ else:
+ addend = float(ret["addend"])
+
+ s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+ if isinstance(s, str) and s.startswith("ERR"):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = s
+ break
+ if 'default' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ prob_t['errmsg'] = rt[str(s)]
+ if str(s) != ret["default"]:
+ prob_t['errcode'] = -1
+ break
+ else:
+ if 'decode' in ret.keys():
+ rt = status.getDecodValue(root, ret['decode'])
+ if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+ prob_t['errcode'] = -1
+ prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+ (s.replace("\x00", "").rstrip()))
+ else:
+ s = rt[str(s).replace("\x00", "").rstrip()]
+ name = ret["name"]
+ prob_t[name] = str(s)
+ a.append(prob_t)
+
+ @staticmethod
+ def getCPUValue(a, filename, tagname):
+ root = status.getETroot(filename)
+ for neighbor in root.iter(tagname):
+ location = neighbor.attrib["location"]
+ L = []
+ for dirpath, dirnames, filenames in os.walk(location):
+ for file in filenames:
+ if file.endswith("input"):
+ L.append(os.path.join(dirpath, file))
+ L = sorted(L, reverse=False)
+ for i in range(len(L)):
+ prob_t = {}
+ prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+ prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+ prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+ prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+ prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+ a.append(prob_t)
+
+ @staticmethod
+ def getFileName():
+ fpath = os.path.dirname(os.path.realpath(__file__))
+ for file in DEV_XML_FILE_LIST:
+ xml = fpath + "/" + file
+ if os.path.exists(xml):
+ return xml
+ return fpath + "/" + CONFIG_NAME
+
+ @staticmethod
+ def checkFan(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "fan"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getTemp(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "temp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getPsu(ret):
+ _filename = status.getFileName()
+ # _filename = "/usr/local/bin/" + status.getFileName()
+ _tagname = "psu"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getcputemp(ret):
+ _filename = status.getFileName()
+ _tagname = "cpus"
+ status.getCPUValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getDcdc(ret):
+ _filename = status.getFileName()
+ _tagname = "dcdc"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmactemp(ret):
+ _filename = status.getFileName()
+ _tagname = "mactemp"
+ status.getETValue(ret, _filename, _tagname)
+
+ @staticmethod
+ def getmacpower(ret):
+ _filename = status.getFileName()
+ _tagname = "macpower"
+ status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml
new file mode 100644
index 000000000000..cce5d873a802
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml
@@ -0,0 +1,478 @@
+- bus: '00'
+ dev: '00'
+ fn: '0'
+ id: 09a2
+ name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '1'
+ id: 09a4
+ name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '2'
+ id: 09a3
+ name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '3'
+ id: 09a5
+ name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '00'
+ dev: '00'
+ fn: '4'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+ dev: '01'
+ fn: '0'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '1'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '2'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '3'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '4'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '5'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '6'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '01'
+ fn: '7'
+ id: '0b00'
+ name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+ dev: '02'
+ fn: '0'
+ id: 09a6
+ name: 'System peripheral: Intel Corporation Device 09a6'
+- bus: '00'
+ dev: '02'
+ fn: '1'
+ id: 09a7
+ name: 'System peripheral: Intel Corporation Device 09a7'
+- bus: '00'
+ dev: '02'
+ fn: '4'
+ id: '3456'
+ name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev
+ 01)'
+- bus: '00'
+ dev: '06'
+ fn: '0'
+ id: 18da
+ name: 'PCI bridge: Intel Corporation Device 18da (rev 11)'
+- bus: '00'
+ dev: 09
+ fn: '0'
+ id: 18a4
+ name: 'PCI bridge: Intel Corporation Device 18a4 (rev 11)'
+- bus: '00'
+ dev: 0b
+ fn: '0'
+ id: 18a6
+ name: 'PCI bridge: Intel Corporation Device 18a6 (rev 11)'
+- bus: '00'
+ dev: 0e
+ fn: '0'
+ id: 18f2
+ name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)'
+- bus: '00'
+ dev: 0f
+ fn: '0'
+ id: 18ac
+ name: 'System peripheral: Intel Corporation Device 18ac (rev 11)'
+- bus: '00'
+ dev: '10'
+ fn: '0'
+ id: 18a8
+ name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)'
+- bus: '00'
+ dev: '11'
+ fn: '0'
+ id: 18a9
+ name: 'PCI bridge: Intel Corporation Device 18a9 (rev 11)'
+- bus: '00'
+ dev: '12'
+ fn: '0'
+ id: 18aa
+ name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)'
+- bus: '00'
+ dev: '13'
+ fn: '0'
+ id: 18ab
+ name: 'PCI bridge: Intel Corporation Device 18ab (rev 11)'
+- bus: '00'
+ dev: '14'
+ fn: '0'
+ id: 18ad
+ name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)'
+- bus: '00'
+ dev: '15'
+ fn: '0'
+ id: 18ae
+ name: 'PCI bridge: Intel Corporation Device 18ae (rev 11)'
+- bus: '00'
+ dev: '18'
+ fn: '0'
+ id: 18d3
+ name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)'
+- bus: '00'
+ dev: '18'
+ fn: '1'
+ id: 18d4
+ name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)'
+- bus: '00'
+ dev: '18'
+ fn: '4'
+ id: 18d6
+ name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '0'
+ id: 18d8
+ name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '1'
+ id: 18d8
+ name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '2'
+ id: 18d8
+ name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+ dev: 1a
+ fn: '3'
+ id: 18d9
+ name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)'
+- bus: '00'
+ dev: 1d
+ fn: '0'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+ dev: 1e
+ fn: '0'
+ id: 18d0
+ name: 'USB controller: Intel Corporation Device 18d0 (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '0'
+ id: 18dc
+ name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '4'
+ id: 18df
+ name: 'SMBus: Intel Corporation Device 18df (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '5'
+ id: 18e0
+ name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)'
+- bus: '00'
+ dev: 1f
+ fn: '7'
+ id: 18e1
+ name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev
+ 11)'
+- bus: '01'
+ dev: '00'
+ fn: '0'
+ id: 18ee
+ name: 'Co-processor: Intel Corporation Device 18ee (rev 11)'
+- bus: '06'
+ dev: '00'
+ fn: '0'
+ id: '7011'
+ name: 'Memory controller: Xilinx Corporation Device 7011'
+- bus: 08
+ dev: '00'
+ fn: '0'
+ id: '1533'
+ name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+ 03)'
+- bus: '14'
+ dev: '00'
+ fn: '0'
+ id: 09a2
+ name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '1'
+ id: 09a4
+ name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '2'
+ id: 09a3
+ name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '3'
+ id: 09a5
+ name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '14'
+ dev: '00'
+ fn: '4'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '14'
+ dev: '02'
+ fn: '0'
+ id: 347a
+ name: 'PCI bridge: Intel Corporation Device 347a (rev 06)'
+- bus: '14'
+ dev: '03'
+ fn: '0'
+ id: 347b
+ name: 'PCI bridge: Intel Corporation Device 347b (rev 06)'
+- bus: '14'
+ dev: '04'
+ fn: '0'
+ id: 347c
+ name: 'PCI bridge: Intel Corporation Device 347c (rev 06)'
+- bus: '14'
+ dev: '05'
+ fn: '0'
+ id: 347d
+ name: 'PCI bridge: Intel Corporation Device 347d (rev 06)'
+- bus: '15'
+ dev: '00'
+ fn: '0'
+ id: f900
+ name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)'
+- bus: f3
+ dev: '00'
+ fn: '0'
+ id: 09a2
+ name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '1'
+ id: 09a4
+ name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '2'
+ id: 09a3
+ name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '3'
+ id: 09a5
+ name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: f3
+ dev: '00'
+ fn: '4'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: f3
+ dev: '04'
+ fn: '0'
+ id: 18d1
+ name: 'PCI bridge: Intel Corporation Device 18d1'
+- bus: f4
+ dev: '00'
+ fn: '0'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+ dev: '00'
+ fn: '1'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+ dev: '00'
+ fn: '2'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+ dev: '00'
+ fn: '3'
+ id: 124c
+ name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: fe
+ dev: '00'
+ fn: '0'
+ id: '3450'
+ name: 'System peripheral: Intel Corporation Device 3450'
+- bus: fe
+ dev: '00'
+ fn: '1'
+ id: '3451'
+ name: 'System peripheral: Intel Corporation Device 3451'
+- bus: fe
+ dev: '00'
+ fn: '2'
+ id: '3452'
+ name: 'System peripheral: Intel Corporation Device 3452'
+- bus: fe
+ dev: '00'
+ fn: '3'
+ id: 0998
+ name: 'Host bridge: Intel Corporation Device 0998'
+- bus: fe
+ dev: '00'
+ fn: '5'
+ id: '3455'
+ name: 'System peripheral: Intel Corporation Device 3455'
+- bus: fe
+ dev: 0b
+ fn: '0'
+ id: '3448'
+ name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+ dev: 0b
+ fn: '1'
+ id: '3448'
+ name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+ dev: 0b
+ fn: '2'
+ id: 344b
+ name: 'System peripheral: Intel Corporation Device 344b'
+- bus: fe
+ dev: 0c
+ fn: '0'
+ id: 344a
+ name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+ dev: 1a
+ fn: '0'
+ id: '2880'
+ name: 'Performance counters: Intel Corporation Device 2880'
+- bus: ff
+ dev: '00'
+ fn: '0'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '1'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '2'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '3'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '4'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: '00'
+ fn: '5'
+ id: 344c
+ name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+ dev: 0a
+ fn: '0'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '1'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '2'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '3'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '4'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 0a
+ fn: '5'
+ id: 344d
+ name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+ dev: 1d
+ fn: '0'
+ id: 344f
+ name: 'System peripheral: Intel Corporation Device 344f'
+- bus: ff
+ dev: 1d
+ fn: '1'
+ id: '3457'
+ name: 'System peripheral: Intel Corporation Device 3457'
+- bus: ff
+ dev: 1e
+ fn: '0'
+ id: '3458'
+ name: 'System peripheral: Intel Corporation Device 3458 (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '1'
+ id: '3459'
+ name: 'System peripheral: Intel Corporation Device 3459 (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '2'
+ id: 345a
+ name: 'System peripheral: Intel Corporation Device 345a (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '3'
+ id: 345b
+ name: 'System peripheral: Intel Corporation Device 345b (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '4'
+ id: 345c
+ name: 'System peripheral: Intel Corporation Device 345c (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '5'
+ id: 345d
+ name: 'System peripheral: Intel Corporation Device 345d (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '6'
+ id: 345e
+ name: 'System peripheral: Intel Corporation Device 345e (rev 01)'
+- bus: ff
+ dev: 1e
+ fn: '7'
+ id: 345f
+ name: 'System peripheral: Intel Corporation Device 345f (rev 01)'
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
new file mode 100644
index 000000000000..154b1abe6ffc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
@@ -0,0 +1,1653 @@
+{
+ "chassis": {
+ "name": "M2-W6940-64OC",
+ "thermal_manager": false,
+ "status_led": {
+ "controllable": false,
+ "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+ },
+ "components": [
+ {
+ "name": "CPU_CPLD"
+ },
+ {
+ "name": "CONNECT_CPLD"
+ },
+ {
+ "name": "MAC_CPLDA"
+ },
+ {
+ "name": "MAC_CPLDB"
+ },
+ {
+ "name": "MAC_CPLDC"
+ },
+ {
+ "name": "FAN_CPLD"
+ },
+ {
+ "name": "MGMT_CPLD"
+ },
+ {
+ "name": "MAC_FPGA"
+ },
+ {
+ "name": "BIOS"
+ }
+ ],
+ "fans": [
+ {
+ "name": "Fantray1_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray1_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray2_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray2_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray3_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray3_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray4_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ },
+ {
+ "name": "Fantray4_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false,
+ "colors": ["off", "red", "amber", "green"]
+ }
+ }
+ ],
+ "fan_drawers":[
+ {
+ "name": "Fantray1",
+ "num_fans" : 2,
+ "status_led": {
+ "controllable": false,
+ "colors": ["amber", "green", "off"]
+ },
+ "fans": [
+ {
+ "name": "Fantray1_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray1_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray2",
+ "num_fans" : 2,
+ "status_led": {
+ "controllable": false,
+ "colors": ["amber", "green", "off"]
+ },
+ "fans": [
+ {
+ "name": "Fantray2_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray2_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray3",
+ "num_fans" : 2,
+ "status_led": {
+ "controllable": false,
+ "colors": ["amber", "green", "off"]
+ },
+ "fans": [
+ {
+ "name": "Fantray3_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray3_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Fantray4",
+ "num_fans" : 2,
+ "status_led": {
+ "controllable": false,
+ "colors": ["amber", "green", "off"]
+ },
+ "fans": [
+ {
+ "name": "Fantray4_1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ },
+ {
+ "name": "Fantray4_2",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ }
+ ],
+ "psus": [
+ {
+ "name": "Psu1",
+ "voltage": true,
+ "current": true,
+ "power": true,
+ "max_power": false,
+ "voltage_high_threshold": true,
+ "voltage_low_threshold": true,
+ "temperature": true,
+ "fans_target_speed": true,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU1_FAN1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ },
+ {
+ "name": "Psu2",
+ "voltage": true,
+ "current": true,
+ "power": true,
+ "max_power": false,
+ "voltage_high_threshold": true,
+ "voltage_low_threshold": true,
+ "temperature": true,
+ "fans_target_speed": true,
+ "status_led": {
+ "controllable": false
+ },
+ "fans": [
+ {
+ "name": "PSU2_FAN1",
+ "speed": {
+ "controllable": true,
+ "minimum": 50,
+ "maximum": 100
+ },
+ "status_led": {
+ "available": false
+ }
+ }
+ ]
+ }
+ ],
+ "thermals": [
+ {
+ "name": "BOARD_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "CPU_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "INLET_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "OUTLET_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "ASIC_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "PSU1_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "PSU2_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "PSU3_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ },
+ {
+ "name": "PSU4_TEMP",
+ "controllable": false,
+ "low-crit-threshold": true,
+ "high-crit-threshold": true,
+ "low-threshold": true,
+ "high-threshold": true,
+ "minimum-recorded": true,
+ "maximum-recorded": true
+ }
+ ],
+ "modules": [],
+ "sfps": []
+ },
+ "interfaces": {
+ "Ethernet1": {
+ "index": "0,0,0,0,0,0,0,0",
+ "lanes": "41,42,43,44,45,46,47,48",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth1"
+ ],
+ "2x400G": [
+ "Eth1/1",
+ "Eth1/2"
+ ],
+ "4x200G": [
+ "Eth1/1",
+ "Eth1/2",
+ "Eth1/3",
+ "Eth1/4"
+ ]
+ }
+ },
+ "Ethernet9": {
+ "index": "1,1,1,1,1,1,1,1",
+ "lanes": "33,34,35,36,37,38,39,40",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth2"
+ ],
+ "2x400G": [
+ "Eth2/1",
+ "Eth2/2"
+ ],
+ "4x200G": [
+ "Eth2/1",
+ "Eth2/2",
+ "Eth2/3",
+ "Eth2/4"
+ ]
+ }
+ },
+ "Ethernet17": {
+ "index": "2,2,2,2,2,2,2,2",
+ "lanes": "57,58,59,60,61,62,63,64",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth3"
+ ],
+ "2x400G": [
+ "Eth3/1",
+ "Eth3/2"
+ ],
+ "4x200G": [
+ "Eth3/1",
+ "Eth3/2",
+ "Eth3/3",
+ "Eth3/4"
+ ]
+ }
+ },
+ "Ethernet25": {
+ "index": "3,3,3,3,3,3,3,3",
+ "lanes": "49,50,51,52,53,54,55,56",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth4"
+ ],
+ "2x400G": [
+ "Eth4/1",
+ "Eth4/2"
+ ],
+ "4x200G": [
+ "Eth4/1",
+ "Eth4/2",
+ "Eth4/3",
+ "Eth4/4"
+ ]
+ }
+ },
+ "Ethernet33": {
+ "index": "4,4,4,4,4,4,4,4",
+ "lanes": "73,74,75,76,77,78,79,80",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth5"
+ ],
+ "2x400G": [
+ "Eth5/1",
+ "Eth5/2"
+ ],
+ "4x200G": [
+ "Eth5/1",
+ "Eth5/2",
+ "Eth5/3",
+ "Eth5/4"
+ ]
+ }
+ },
+ "Ethernet41": {
+ "index": "5,5,5,5,5,5,5,5",
+ "lanes": "65,66,67,68,69,70,71,72",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth6"
+ ],
+ "2x400G": [
+ "Eth6/1",
+ "Eth6/2"
+ ],
+ "4x200G": [
+ "Eth6/1",
+ "Eth6/2",
+ "Eth6/3",
+ "Eth6/4"
+ ]
+ }
+ },
+ "Ethernet49": {
+ "index": "6,6,6,6,6,6,6,6",
+ "lanes": "89,90,91,92,93,94,95,96",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth7"
+ ],
+ "2x400G": [
+ "Eth7/1",
+ "Eth7/2"
+ ],
+ "4x200G": [
+ "Eth7/1",
+ "Eth7/2",
+ "Eth7/3",
+ "Eth7/4"
+ ]
+ }
+ },
+ "Ethernet57": {
+ "index": "7,7,7,7,7,7,7,7",
+ "lanes": "81,82,83,84,85,86,87,88",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth8"
+ ],
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+ "Eth8/1",
+ "Eth8/2"
+ ],
+ "4x200G": [
+ "Eth8/1",
+ "Eth8/2",
+ "Eth8/3",
+ "Eth8/4"
+ ]
+ }
+ },
+ "Ethernet65": {
+ "index": "8,8,8,8,8,8,8,8",
+ "lanes": "105,106,107,108,109,110,111,112",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth9"
+ ],
+ "2x400G": [
+ "Eth9/1",
+ "Eth9/2"
+ ],
+ "4x200G": [
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+ "Eth9/2",
+ "Eth9/3",
+ "Eth9/4"
+ ]
+ }
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+ "Ethernet73": {
+ "index": "9,9,9,9,9,9,9,9",
+ "lanes": "97,98,99,100,101,102,103,104",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth10"
+ ],
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+ "Eth10/2"
+ ],
+ "4x200G": [
+ "Eth10/1",
+ "Eth10/2",
+ "Eth10/3",
+ "Eth10/4"
+ ]
+ }
+ },
+ "Ethernet81": {
+ "index": "10,10,10,10,10,10,10,10",
+ "lanes": "121,122,123,124,125,126,127,128",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth11"
+ ],
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+ "Eth11/1",
+ "Eth11/2"
+ ],
+ "4x200G": [
+ "Eth11/1",
+ "Eth11/2",
+ "Eth11/3",
+ "Eth11/4"
+ ]
+ }
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+ "Ethernet89": {
+ "index": "11,11,11,11,11,11,11,11",
+ "lanes": "113,114,115,116,117,118,119,120",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth12"
+ ],
+ "2x400G": [
+ "Eth12/1",
+ "Eth12/2"
+ ],
+ "4x200G": [
+ "Eth12/1",
+ "Eth12/2",
+ "Eth12/3",
+ "Eth12/4"
+ ]
+ }
+ },
+ "Ethernet97": {
+ "index": "12,12,12,12,12,12,12,12",
+ "lanes": "137,138,139,140,141,142,143,144",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth13"
+ ],
+ "2x400G": [
+ "Eth13/1",
+ "Eth13/2"
+ ],
+ "4x200G": [
+ "Eth13/1",
+ "Eth13/2",
+ "Eth13/3",
+ "Eth13/4"
+ ]
+ }
+ },
+ "Ethernet105": {
+ "index": "13,13,13,13,13,13,13,13",
+ "lanes": "129,130,131,132,133,134,135,136",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth14"
+ ],
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+ "Eth14/1",
+ "Eth14/2"
+ ],
+ "4x200G": [
+ "Eth14/1",
+ "Eth14/2",
+ "Eth14/3",
+ "Eth14/4"
+ ]
+ }
+ },
+ "Ethernet113": {
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+ "lanes": "153,154,155,156,157,158,159,160",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth15"
+ ],
+ "2x400G": [
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+ "Eth15/2"
+ ],
+ "4x200G": [
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+ "Eth15/2",
+ "Eth15/3",
+ "Eth15/4"
+ ]
+ }
+ },
+ "Ethernet121": {
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+ "lanes": "145,146,147,148,149,150,151,152",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth16"
+ ],
+ "2x400G": [
+ "Eth16/1",
+ "Eth16/2"
+ ],
+ "4x200G": [
+ "Eth16/1",
+ "Eth16/2",
+ "Eth16/3",
+ "Eth16/4"
+ ]
+ }
+ },
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+ }
+ },
+ "Ethernet497": {
+ "index": "62,62,62,62,62,62,62,62",
+ "lanes": "473,474,475,476,477,478,479,480",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth63"
+ ],
+ "2x400G": [
+ "Eth63/1",
+ "Eth63/2"
+ ],
+ "4x200G": [
+ "Eth63/1",
+ "Eth63/2",
+ "Eth63/3",
+ "Eth63/4"
+ ]
+ }
+ },
+ "Ethernet505": {
+ "index": "63,63,63,63,63,63,63,63",
+ "lanes": "465,466,467,468,469,470,471,472",
+ "breakout_modes": {
+ "1x800G": [
+ "Eth64"
+ ],
+ "2x400G": [
+ "Eth64/1",
+ "Eth64/2"
+ ],
+ "4x200G": [
+ "Eth64/1",
+ "Eth64/2",
+ "Eth64/3",
+ "Eth64/4"
+ ]
+ }
+ },
+ "Ethernet513": {
+ "index": "64",
+ "lanes": "513",
+ "breakout_modes": {
+ "1x25G": [
+ "Eth65"
+ ]
+ }
+ },
+ "Ethernet515": {
+ "index": "65",
+ "lanes": "515",
+ "breakout_modes": {
+ "1x25G": [
+ "Eth66"
+ ]
+ }
+ }
+ }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json
new file mode 100644
index 000000000000..fa01608f8972
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json
@@ -0,0 +1,18 @@
+{
+ "chassis": {
+ "M2-W6940-64OC": {
+ "component": {
+ "CPU_CPLD": { },
+ "CONNECT_CPLD": { },
+ "MAC_CPLDA": { },
+ "MAC_CPLDB": { },
+ "MAC_CPLDC": { },
+ "MGMT_CPLD": { },
+ "FAN_CPLD": { },
+ "MAC_FPGA": { },
+ "BIOS": { }
+ }
+ }
+ }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf
new file mode 100644
index 000000000000..fc119184d5c1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf
@@ -0,0 +1,2 @@
+is_ltsw_chip=1
+SYNCD_SHM_SIZE=1g
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..c26bc0c53f61
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py
@@ -0,0 +1,376 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+ import time
+ import os
+ import traceback
+ import subprocess
+ from ctypes import create_string_buffer
+ from sonic_sfp.sfputilbase import SfpUtilBase
+ from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
+except ImportError as e:
+ raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+ """Platform-specific SfpUtil class"""
+
+ PORT_START = 0
+ PORT_END = 65
+ PORTS_IN_BLOCK = 66
+
+ EEPROM_OFFSET = 106
+ SFP_DEVICE_TYPE = "optoe2"
+ QSFP_DEVICE_TYPE = "optoe1"
+ QSFP_DD_DEVICE_TYPE = "optoe3"
+ I2C_MAX_ATTEMPT = 3
+
+ OPTOE_TYPE1 = 1
+ OPTOE_TYPE2 = 2
+ OPTOE_TYPE3 = 3
+
+ SFP_STATUS_INSERTED = '1'
+ SFP_STATUS_REMOVED = '0'
+
+ _port_to_eeprom_mapping = {}
+ port_to_i2cbus_mapping ={}
+ port_dict = {}
+
+ qsfp_ports_list = []
+ qsfp_dd_ports_list = []
+
+ @property
+ def port_start(self):
+ return self.PORT_START
+
+ @property
+ def port_end(self):
+ return self.PORT_END
+
+ @property
+ def qsfp_ports(self):
+ return self.qsfp_ports_list
+
+ @property
+ def qsfp_dd_ports(self):
+ return self.qsfp_dd_ports_list
+
+ @property
+ def port_to_eeprom_mapping(self):
+ return self._port_to_eeprom_mapping
+
+ def __init__(self):
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK-2):
+ self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+ self.port_to_i2cbus_mapping[64] = 59
+ self.port_to_i2cbus_mapping[65] = 60
+ self.update_ports_list()
+
+ SfpUtilBase.__init__(self)
+
+ def _sfp_read_file_path(self, file_path, offset, num_bytes):
+ attempts = 0
+ while attempts < self.I2C_MAX_ATTEMPT:
+ try:
+ file_path.seek(offset)
+ read_buf = file_path.read(num_bytes)
+ except:
+ attempts += 1
+ time.sleep(0.05)
+ else:
+ return True, read_buf
+ return False, None
+
+ def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+ """Tries to read the eeprom file to determine if the
+ device/sfp is present or not. If sfp present, the read returns
+ valid bytes. If not, read returns error 'Connection timed out"""
+
+ if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+ return False
+ else:
+ with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+ rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+ return rv
+
+ def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+ try:
+ sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+ # Write device address to new_device file
+ nd_file = open(sysfs_nd_path, "w")
+ nd_str = "%s %s" % (devtype, hex(devaddr))
+ nd_file.write(nd_str)
+ nd_file.close()
+
+ except Exception as err:
+ print("Error writing to new device file: %s" % str(err))
+ return 1
+ else:
+ return 0
+
+ def _get_port_eeprom_path(self, port_num, devid):
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ if port_num in self.port_to_eeprom_mapping.keys():
+ sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+ else:
+ sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+ i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+ if i2c_adapter_id is None:
+ print("Error getting i2c bus num")
+ return None
+
+ # Get i2c virtual bus path for the sfp
+ sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+ str(i2c_adapter_id))
+
+ # If i2c bus for port does not exist
+ if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+ print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+ return None
+
+ sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+ str(i2c_adapter_id),
+ hex(devid)[-2:])
+
+ # If sfp device is not present on bus, Add it
+ if not os.path.exists(sysfs_sfp_i2c_client_path):
+ if port_num in self.qsfp_dd_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE)
+ elif port_num in self.qsfp_ports:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+ else:
+ ret = self._add_new_sfp_device(
+ sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+ if ret != 0:
+ print("Error adding sfp device")
+ return None
+
+ sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+ return sysfs_sfp_i2c_client_eeprom_path
+
+ def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+ eeprom_raw = []
+ for i in range(0, num_bytes):
+ eeprom_raw.append("0x00")
+
+ rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+ if rv == False:
+ return None
+
+ try:
+ if len(raw) == 0:
+ return None
+ for n in range(0, num_bytes):
+ eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+ except:
+ return None
+
+ return eeprom_raw
+
+ def get_eeprom_dom_raw(self, port_num):
+ if port_num in self.qsfp_ports:
+ # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+ return None
+ else:
+ # Read dom eeprom at addr 0x51
+ return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+ def get_presence(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+ cmd = "cat /sys/s3ip/transceiver/eth{}/present".format(str(port_num + 1))
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ return False
+ if output == "1":
+ return True
+ return False
+
+ def check_is_qsfpdd(self, port_num):
+ try:
+ if self.get_presence(port_num) == False:
+ return False
+
+ eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+ if eeprom_raw is None:
+ return False
+ # according to sff-8024 A0h Byte 0 is '1e','18' or '19' means the transceiver is qsfpdd,
+ if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18' or eeprom_raw[0] == '19'):
+ return True
+ except Exception as e:
+ print(traceback.format_exc())
+
+ return False
+
+ def check_optoe_type(self, port_num, optoe_type):
+ if self.get_presence(port_num) == False:
+ return True
+ try:
+ eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+ dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class'
+ i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num]))
+ cmd = "cat " + i2c_path
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ print("cmd: %s execution fail, output:%s" % (cmd, output))
+ return False
+ if int(output) != optoe_type:
+ cmd = "echo " + str(optoe_type) + " > " + i2c_path
+ ret, output = subprocess.getstatusoutput(cmd)
+ if ret != 0:
+ print("cmd: %s execution fail, output:%s" % (cmd, output))
+ return False
+ return True
+
+ except Exception as e:
+ print(traceback.format_exc())
+ return False
+
+ def update_ports_list(self):
+ self.qsfp_ports_list = []
+ self.qsfp_dd_ports_list = []
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if (self.check_is_qsfpdd(x)):
+ self.qsfp_dd_ports_list.append(x)
+ else:
+ self.qsfp_ports_list.append(x)
+
+ def get_low_power_mode(self, port_num):
+ # Check for invalid port_num
+
+ return True
+
+ def set_low_power_mode(self, port_num, lpmode):
+ # Check for invalid port_num
+
+ return True
+
+ def reset(self, port_num):
+ # Check for invalid port_num
+ if port_num < self.port_start or port_num > self.port_end:
+ return False
+
+ return True
+
+ def get_transceiver_change_event(self, timeout=0):
+
+ start_time = time.time()
+ current_port_dict = {}
+ forever = False
+
+ if timeout == 0:
+ forever = True
+ elif timeout > 0:
+ timeout = timeout / float(1000) # Convert to secs
+ else:
+ print ("get_transceiver_change_event:Invalid timeout value", timeout)
+ return False, {}
+
+ end_time = start_time + timeout
+ if start_time > end_time:
+ print ('get_transceiver_change_event:' \
+ 'time wrap / invalid timeout value', timeout)
+
+ return False, {} # Time wrap or possibly incorrect timeout
+
+ while timeout >= 0:
+ # Check for OIR events and return updated port_dict
+ for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if self.get_presence(x):
+ current_port_dict[x] = self.SFP_STATUS_INSERTED
+ else:
+ current_port_dict[x] = self.SFP_STATUS_REMOVED
+ if (current_port_dict == self.port_dict):
+ if forever:
+ time.sleep(1)
+ else:
+ timeout = end_time - time.time()
+ if timeout >= 1:
+ time.sleep(1) # We poll at 1 second granularity
+ else:
+ if timeout > 0:
+ time.sleep(timeout)
+ self.update_ports_list()
+ return True, {}
+ else:
+ # Update reg value
+ self.update_ports_list()
+ self.port_dict = current_port_dict
+ return True, self.port_dict
+ print ("get_transceiver_change_event: Should not reach here.")
+ return False, {}
+
+ def _twos_comp(self, num, bits):
+ try:
+ if ((num & (1 << (bits - 1))) != 0):
+ num = num - (1 << bits)
+ return num
+ except:
+ return 0
+
+ def get_highest_temperature(self):
+ offset = 0
+ hightest_temperature = -9999
+
+ presence_flag = False
+ read_eeprom_flag = False
+ temperature_valid_flag = False
+
+ for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+ if self.get_presence(port) == False:
+ continue
+
+ presence_flag = True
+
+ if port in self.qsfp_dd_ports:
+ offset = 14
+ elif port in self.qsfp_ports:
+ offset = 22
+ else:
+ offset = 96
+
+ eeprom_path = self._get_port_eeprom_path(port, 0x50)
+ try:
+ with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+ read_eeprom_flag = True
+ eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+ if len(eeprom_raw) != 0:
+ msb = int(eeprom_raw[0], 16)
+ lsb = int(eeprom_raw[1], 16)
+
+ result = (msb << 8) | (lsb & 0xff)
+ result = self._twos_comp(result, 16)
+ result = float(result / 256.0)
+ if -50 <= result <= 200:
+ temperature_valid_flag = True
+ if hightest_temperature < result:
+ hightest_temperature = result
+ except Exception as e:
+ pass
+
+ # all port not presence
+ if presence_flag == False:
+ hightest_temperature = -10000
+
+ # all port read eeprom fail
+ elif read_eeprom_flag == False:
+ hightest_temperature = -9999
+
+ # all port temperature invalid
+ elif read_eeprom_flag == True and temperature_valid_flag == False:
+ hightest_temperature = -10000
+
+ hightest_temperature = round(hightest_temperature, 2)
+
+ return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+# - InnoDisk
+# - StorFly
+# - Virtium
+
+try:
+ import re
+ import os
+ import subprocess
+ from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+ raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+ """
+ Generic implementation of the SSD health API
+ """
+ model = NOT_AVAILABLE
+ serial = NOT_AVAILABLE
+ firmware = NOT_AVAILABLE
+ temperature = NOT_AVAILABLE
+ health = NOT_AVAILABLE
+ remaining_life = NOT_AVAILABLE
+ sata_rate = NOT_AVAILABLE
+ ssd_info = NOT_AVAILABLE
+ vendor_ssd_info = NOT_AVAILABLE
+
+ def __init__(self, diskdev):
+ self.vendor_ssd_utility = {
+ "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+ "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+ "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info },
+ "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }
+ }
+
+ """
+ The dict model_attr keys relate the vendors
+ LITEON : "ER2-GD","AF2MA31DTDLT"
+ Intel : "SSDSCKKB"
+ SMI : "SM619GXC"
+ samsung: "MZNLH"
+ ADATA : "IM2S3134N"
+ """
+ self.model_attr = {
+ "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+ "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+ "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+ "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+ "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+ "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+ }
+
+ self.key_list = list(self.model_attr.keys())
+ self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+ self.dev = diskdev
+ # Generic part
+ self.fetch_generic_ssd_info(diskdev)
+ self.parse_generic_ssd_info()
+ self.fetch_vendor_ssd_info(diskdev, "Generic")
+
+ # Known vendor part
+ if self.model:
+ model_short = self.model.split()[0]
+ if model_short in self.vendor_ssd_utility:
+ self.fetch_vendor_ssd_info(diskdev, model_short)
+ self.parse_vendor_ssd_info(model_short)
+ else:
+ # No handler registered for this disk model
+ pass
+ else:
+ # Failed to get disk model
+ self.model = "Unknown"
+
+ def _execute_shell(self, cmd):
+ process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+ output, error = process.communicate()
+ exit_code = process.returncode
+ if exit_code:
+ return None
+ return output
+
+ def _parse_re(self, pattern, buffer):
+ res_list = re.findall(pattern, str(buffer))
+ return res_list[0] if res_list else NOT_AVAILABLE
+
+ def fetch_generic_ssd_info(self, diskdev):
+ self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+ # Health and temperature values may be overwritten with vendor specific data
+ def parse_generic_ssd_info(self):
+ if "nvme" in self.dev:
+ self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+ health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+ if health_raw == NOT_AVAILABLE:
+ self.health = NOT_AVAILABLE
+ else:
+ health_raw = health_raw.split()[-1]
+ self.health = 100 - float(health_raw.strip('%'))
+
+ temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+ if temp_raw == NOT_AVAILABLE:
+ self.temperature = NOT_AVAILABLE
+ else:
+ temp_raw = temp_raw.split()[-2]
+ self.temperature = float(temp_raw)
+ else:
+ self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+ model_key = ""
+ for key in self.key_list:
+ if re.search(key, self.model):
+ model_key = key
+ break
+ if model_key != "":
+ self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+ self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+ self.health = self.remaining_life
+ # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+ if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+ avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+ self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+ if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT:
+ self.remaining_life = "Fail"
+ self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+ self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+ self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+ def parse_innodisk_info(self):
+ if self.vendor_ssd_info:
+ self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+ self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+ else:
+ if self.health == NOT_AVAILABLE:
+ health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+ self.health = health_raw.split()[-1]
+ if self.temperature == NOT_AVAILABLE:
+ temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+ self.temperature = temp_raw.split()[-6]
+
+ def parse_virtium_info(self):
+ if self.vendor_ssd_info:
+ self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+ try:
+ self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+ except (ValueError, ZeroDivisionError):
+ # Invalid avg_erase_count or nand_endurance.
+ pass
+
+ def fetch_vendor_ssd_info(self, diskdev, model):
+ self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+ def parse_vendor_ssd_info(self, model):
+ self.vendor_ssd_utility[model]["parser"]()
+
+ def check_readonly2(self, partition, filesystem):
+ # parse mount cmd output info
+ mount_info = self._execute_shell(MOUNT_CMD)
+ for line in mount_info.split('\n'):
+ column_list = line.split()
+ if line == '':
+ continue
+ if column_list[0] == partition and column_list[2] == filesystem:
+ if column_list[5].split(',')[0][1:] == "ro":
+ return partition
+ else:
+ return NOT_AVAILABLE
+ return NOT_AVAILABLE
+
+ def check_readonly(self, partition, filesystem):
+ ret = os.access(filesystem, os.W_OK)
+ if ret == False:
+ return partition
+ else:
+ return NOT_AVAILABLE
+
+ def get_health(self):
+ """
+ Retrieves current disk health in percentages
+
+ Returns:
+ A float number of current ssd health
+ e.g. 83.5
+ """
+ if self.health == 'N/A':
+ return "NA"
+ else:
+ return float(self.health)
+
+ def get_temperature(self):
+ """
+ Retrieves current disk temperature in Celsius
+
+ Returns:
+ A float number of current temperature in Celsius
+ e.g. 40.1
+ """
+ if self.temperature == 'N/A':
+ return 'NA'
+ else:
+ return float(self.temperature)
+
+ def get_model(self):
+ """
+ Retrieves model for the given disk device
+
+ Returns:
+ A string holding disk model as provided by the manufacturer
+ """
+ return self.model
+
+ def get_firmware(self):
+ """
+ Retrieves firmware version for the given disk device
+
+ Returns:
+ A string holding disk firmware version as provided by the manufacturer
+ """
+ return self.firmware
+
+ def get_serial(self):
+ """
+ Retrieves serial number for the given disk device
+
+ Returns:
+ A string holding disk serial number as provided by the manufacturer
+ """
+ return self.serial
+ def get_sata_rate(self):
+ """
+ Retrieves SATA rate for the given disk device
+ Returns:
+ A string holding current SATA rate as provided by the manufacturer
+ """
+ return self.sata_rate
+ def get_remaining_life(self):
+ """
+ Retrieves remaining life for the given disk device
+ Returns:
+ A string holding disk remaining life as provided by the manufacturer
+ """
+ return self.remaining_life
+ def get_vendor_output(self):
+ """
+ Retrieves vendor specific data for the given disk device
+
+ Returns:
+ A string holding some vendor specific disk information
+ """
+ return self.vendor_ssd_info
+
+ def parse_id_number(self, id):
+ return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+ def get_readonly_partition(self):
+ """
+ Check the partition mount filesystem is readonly status,then output the result.
+ Returns:
+ The readonly partition list
+ """
+
+ ro_partition_list = []
+ partition_list = []
+
+ # parse fdisk cmd output info
+ disk_info = self._execute_shell(DISK_LIST_CMD)
+ begin_flag = False
+ for line in disk_info.split('\n'):
+ if line == "Device":
+ begin_flag = True
+ continue
+ if begin_flag:
+ if line != "":
+ partition_list.append(line)
+ else:
+ break
+
+ # parse df cmd output info
+ disk_free = self._execute_shell(DISK_FREE_CMD)
+ disk_dict = {}
+ line_num = 0
+ for line in disk_free.split('\n'):
+ line_num = line_num + 1
+ if line_num == 1 or line == "":
+ continue
+ column_list = line.split()
+ disk_dict[column_list[0]] = column_list[5]
+
+ # get partition which is readonly
+ for partition in partition_list:
+ if partition in disk_dict:
+ ret = self.check_readonly(partition, disk_dict[partition])
+ if (ret != NOT_AVAILABLE):
+ ro_partition_list.append(ret)
+
+ return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+ "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..0f7f6bfea0c5
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc
@@ -0,0 +1,4 @@
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=xe,ce,cd,d3c
\ No newline at end of file
diff --git a/src/libnl3/debian/patches/series b/device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json
old mode 100644
new mode 100755
similarity index 100%
rename from src/libnl3/debian/patches/series
rename to device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json
diff --git a/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic b/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic
+++ b/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
index d38f07fac66d..118ea62d5a49 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
@@ -1 +1 @@
-f3d3345bef9c6ac4eea19c6170e92970
\ No newline at end of file
+7333f3669bbbd18bcc3890028d7afb39
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
index 6f615816bf42..580801234732 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
@@ -1,5 +1,5 @@
-
+
@@ -148,96 +148,40 @@
No Phy
0
-
- alaska-88E1543
- Specifies PHY identifier 88E1543, used for Combo ports.
- 1
-
-
- alaska-88E1545
- Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.
- 2
-
alaska-88E1680
Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.
- 3
-
-
- alaska-88E151X
- Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).
- 4
-
-
- alaska-88E3140
- Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
-Uses with FW SolarFlare next generation.
- 5
-
-
- alaska-88E3240
- Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
-Uses with FW, SolarFlare next generation.
- 6
-
-
- alaska-88E3680
- Specifies PHY identifier 88E3680, used for Octal Copper 100M.
- 7
-
-
- alaska-88E3220
- Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
-Uses FW, SolarFlare next generation.
- 8
-
-
- alaska-88E1680L
- Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.
- 9
-
-
- alaska-88E33X0
- Specifies PHY identifier 88E33X0, used for MGIG Combo.
- 10
-
-
- alaska-88E1548
- Specifies PHY identifier 88E1548, used for Fiber GE.
- 11
-
-
- alaska-88E20X0
- Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.
- 12
-
-
- alaska-88E1512
- Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.
- 13
-
-
- alaska-88E2180
- Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.
- 14
+ 1
alaska-88E1780
Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
Efficient Ethernet Transceiver
- 15
+ 2
alaska-88E2540
Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
Transceiver with IEEE 1588v2 PTP Support
- 16
+ 3
alaska-88E2580
- Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+ Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
with IEEE 1588v2 PTP Support
- 17
+ 4
+
+
+ alaska-88E2780
+ Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support
+ 5
+
+
+ alaska-MVCUE1786
+ Specifies PHY identifier alaska V MV-CUE 1786, Octal 100/1000BASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support
+ 6
@@ -699,6 +643,20 @@ lowercase characters.
2
+
+ mpp-num-type
+ uint8
+ Specifies the MPP pin number.
+ 0
+ 63
+
+
+ mpp-select-type
+ uint8
+ Specifies the MPP pin value.
+ 0
+ 15
+
ASIC_AC5X
AC5X-xb
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
index 1d7a5566018a..40176ed8e3f3 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
@@ -1 +1 @@
-4ad719e69b522db7ee969da2894cb04a
\ No newline at end of file
+1f97e3150eec3a7ee6f56f51f9229db3
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
index 7789d25115e7..9e377e9cfb1e 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
@@ -1,7 +1,27 @@
-
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
interface-mode-type
enumeration
@@ -479,6 +499,26 @@
5
+
+ phy-serdes-type
+ enumeration
+ Phy Serdes Type
+
+ NA
+ No serdes
+ 0
+
+
+ COMPHY
+ COMPHY
+ 1
+
+
+ COMPHY_C28G
+ COMPHY_C28G
+ 2
+
+
port-interconnect-profile-type
enumeration
@@ -500,6 +540,7 @@
+ ASIC_AC5X
1000MR1
@@ -549,6 +590,7 @@
0
COMPHY_C28G
+ COMPHY
profile_default
1000MR1
false
@@ -566,11 +608,18 @@
peak
1
+
+ true
+ 0
+ 25
+ 0
+
1
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -578,6 +627,7 @@
2
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -585,6 +635,7 @@
3
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -592,6 +643,7 @@
4
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -599,6 +651,7 @@
5
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -606,6 +659,7 @@
6
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -613,6 +667,7 @@
7
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -620,6 +675,7 @@
8
COMPHY_C28G
+ COMPHY
profile_default
1000MR1
false
@@ -637,11 +693,18 @@
peak
5
+
+ true
+ 0
+ 24
+ 0
+
9
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -649,6 +712,7 @@
10
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -656,6 +720,7 @@
11
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -663,6 +728,7 @@
12
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -670,6 +736,7 @@
13
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -677,6 +744,7 @@
14
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -684,6 +752,7 @@
15
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -691,6 +760,7 @@
16
COMPHY_C28G
+ COMPHY
profile_default
1000MR1
false
@@ -708,11 +778,18 @@
peak
9
+
+ true
+ 0
+ 24
+ 0
+
17
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -720,6 +797,7 @@
18
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -727,6 +805,7 @@
19
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -734,6 +813,7 @@
20
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -741,6 +821,7 @@
21
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -748,6 +829,7 @@
22
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -755,6 +837,7 @@
23
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -762,6 +845,7 @@
24
COMPHY_C28G
+ COMPHY
profile_default
1000MR1
false
@@ -779,11 +863,18 @@
peak
10
+
+ true
+ 0
+ 24
+ 0
+
25
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -791,6 +882,7 @@
26
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -798,6 +890,7 @@
27
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -805,6 +898,7 @@
28
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -812,6 +906,7 @@
29
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -819,6 +914,7 @@
30
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -826,6 +922,7 @@
31
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -833,6 +930,7 @@
32
COMPHY_C28G
+ COMPHY
profile_default
1000MR1
false
@@ -850,11 +948,18 @@
peak
14
+
+ true
+ 0
+ 23
+ 0
+
33
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -862,6 +967,7 @@
34
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -869,6 +975,7 @@
35
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -876,6 +983,7 @@
36
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -883,6 +991,7 @@
37
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -890,6 +999,7 @@
38
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -897,6 +1007,7 @@
39
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -904,6 +1015,7 @@
40
COMPHY_C28G
+ COMPHY
profile_default
1000MR1
false
@@ -921,11 +1033,18 @@
peak
11
+
+ true
+ 0
+ 23
+ 0
+
41
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -933,6 +1052,7 @@
42
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -940,6 +1060,7 @@
43
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -947,6 +1068,7 @@
44
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -954,6 +1076,7 @@
45
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -961,6 +1084,7 @@
46
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -968,6 +1092,7 @@
47
COMPHY_C28G
+ NA
profile_default
1000MR1
false
@@ -975,6 +1100,7 @@
48
COMPHY_C28G
+ NA
profile_default
10GR1
false
@@ -997,6 +1123,7 @@
49
COMPHY_C28G
+ NA
profile_default
10GR1
false
@@ -1019,6 +1146,7 @@
50
COMPHY_C28G
+ NA
profile_default
10GR1
false
@@ -1041,6 +1169,7 @@
51
COMPHY_C28G
+ NA
profile_default
10GR1
false
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
index 5c1c480ebb3e..fc68f9ae33ba 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
@@ -1 +1 @@
-7ca6eaf67da8ee4c5b2a4f480db8919f
\ No newline at end of file
+306e882317520250db0161d1cf4c8a3b
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
index 13b344d6b964..f15449bd5e26 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
@@ -1,5 +1,5 @@
-
+
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
index 7d2cfc524b98..3d57599d00fc 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
@@ -1 +1 @@
-751d5fb74a0861240aa86afad8ad13ef
\ No newline at end of file
+05614f693742dfda5c7140c186516f0c
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
index 91246fc35848..be2b470f78cc 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
@@ -1,5 +1,5 @@
-
+
@@ -444,6 +444,10 @@
0
ROUTE_BLACKHOLE
+
+ Disabled
+ Disabled
+
SAI_LOG_SYSLOG
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
index 89a7a3e9ddf8..16e104341cdf 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
@@ -275,5 +275,9 @@
}
]
},
- "interfaces": {}
+ "interfaces": {},
+ "asic_sensors": {
+ "poll_interval": "10",
+ "poll_admin_status": "enable"
+ }
}
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
index 5422b86a598d..06fdcf8c4669 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-d7069397e7466efe2bd6cf4a952b56db
\ No newline at end of file
+7b9a2fb849b5bd8caa70e2e7cc5aca02
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
index efb1432c65de..ee9245c49aa8 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
-
+
@@ -148,96 +148,34 @@
No Phy
0
-
- alaska-88E1543
- Specifies PHY identifier 88E1543, used for Combo ports.
- 1
-
-
- alaska-88E1545
- Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.
- 2
-
alaska-88E1680
Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.
- 3
-
-
- alaska-88E151X
- Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).
- 4
-
-
- alaska-88E3140
- Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
-Uses with FW SolarFlare next generation.
- 5
-
-
- alaska-88E3240
- Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
-Uses with FW, SolarFlare next generation.
- 6
-
-
- alaska-88E3680
- Specifies PHY identifier 88E3680, used for Octal Copper 100M.
- 7
-
-
- alaska-88E3220
- Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
-Uses FW, SolarFlare next generation.
- 8
-
-
- alaska-88E1680L
- Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.
- 9
-
-
- alaska-88E33X0
- Specifies PHY identifier 88E33X0, used for MGIG Combo.
- 10
-
-
- alaska-88E1548
- Specifies PHY identifier 88E1548, used for Fiber GE.
- 11
-
-
- alaska-88E20X0
- Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.
- 12
-
-
- alaska-88E1512
- Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.
- 13
-
-
- alaska-88E2180
- Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.
- 14
+ 1
alaska-88E1780
Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
Efficient Ethernet Transceiver
- 15
+ 2
alaska-88E2540
Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
Transceiver with IEEE 1588v2 PTP Support
- 16
+ 3
alaska-88E2580
- Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+ Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
with IEEE 1588v2 PTP Support
- 17
+ 4
+
+
+ alaska-88E2780
+ Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support
+ 5
@@ -699,6 +637,20 @@ lowercase characters.
2
+
+ mpp-num-type
+ uint8
+ Specifies the MPP pin number.
+ 0
+ 63
+
+
+ mpp-select-type
+ uint8
+ Specifies the MPP pin value.
+ 0
+ 15
+
ASIC_AC3X
M0-48x1G-4x10G
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
index a232c8381527..ad15b12a8670 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
@@ -1 +1 @@
-bf932ba262c96acdfe677bd5078a21d7
\ No newline at end of file
+feeec405a324a0c99f1078bfad4ca512
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
index f1cc5989dddb..4dd22e0b3cdc 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
@@ -1,7 +1,27 @@
-
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
interface-mode-type
enumeration
@@ -479,6 +499,26 @@
5
+
+ phy-serdes-type
+ enumeration
+ Phy Serdes Type
+
+ NA
+ No serdes
+ 0
+
+
+ COMPHY
+ COMPHY
+ 1
+
+
+ COMPHY_C28G
+ COMPHY_C28G
+ 2
+
+
port-interconnect-profile-type
enumeration
@@ -500,6 +540,7 @@
+ ASIC_AC3X
1000MR1
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
index 2e3f0e0342dd..74bca52a8a86 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
@@ -1 +1 @@
-bb2f27ac93e33103554948dee6f3a1f1
\ No newline at end of file
+07f3a60faed5eda425dec39f7198aaaa
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
index 30c2712f2a37..adaa9ebc0b70 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
@@ -1,7 +1,27 @@
-
+
+
+ asic-type
+ enumeration
+ ASIC Type
+
+ ASIC_AC3X
+ AC3X
+ 0
+
+
+ ASIC_AC5X
+ AC5X
+ 1
+
+
+ ASIC_Falcon
+ FALCON
+ 2
+
+
interface-mode-type
enumeration
@@ -479,6 +499,26 @@
5
+
+ phy-serdes-type
+ enumeration
+ Phy Serdes Type
+
+ NA
+ No serdes
+ 0
+
+
+ COMPHY
+ COMPHY
+ 1
+
+
+ COMPHY_C28G
+ COMPHY_C28G
+ 2
+
+
port-interconnect-profile-type
enumeration
@@ -500,6 +540,7 @@
+ ASIC_AC3X
1000MR1
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
index 410763693907..4e2aeb92348d 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-411f788b1a253e5ad2e0e9026d0bb1aa
\ No newline at end of file
+da1aa11a8d24bf8e2d3eae6fb57958a9
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
index fe782eb5ce97..05996a7be9d9 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
-
+
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
index 97def7a90484..1b371a8aceeb 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-e56672c96f9a00b3652bdbe8a4ec4a23
\ No newline at end of file
+70389c5db569f7a77c09393a4df21603
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
index 43dde6b94705..686612b88db2 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
-
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
index 29e11388382c..4c0acf7eb890 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
@@ -495,5 +495,9 @@
}
]
},
- "interfaces": {}
+ "interfaces": {},
+ "asic_sensors": {
+ "poll_interval": "10",
+ "poll_admin_status": "enable"
+ }
}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
index b40c5fe9498d..99562f3deb5a 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
@@ -447,5 +447,10 @@
}
]
},
- "interfaces": {}
+ "interfaces": {},
+
+ "asic_sensors": {
+ "poll_interval": "10",
+ "poll_admin_status": "enable"
+ }
}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
index 63f55d3eb01a..b330c66ff380 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
@@ -460,5 +460,9 @@
}
]
},
- "interfaces": {}
+ "interfaces": {},
+ "asic_sensors": {
+ "poll_interval": "10",
+ "poll_admin_status": "enable"
+ }
}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
index 6f07539f976c..010367478088 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -1267,6 +1267,7 @@ polled_irq_delay.BCM8885X=5
polled_irq_mode.BCM8885X=0
port_fec_fabric.BCM8885X=7
bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
port_init_cl72_256=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
index a1419db8fd64..034b80def8ed 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -1267,6 +1267,7 @@ polled_irq_delay.BCM8885X=5
polled_irq_mode.BCM8885X=0
port_fec_fabric.BCM8885X=7
bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
port_init_cl72_1=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
index fa5849f4549f..2c241bcfff4a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
@@ -1268,6 +1268,7 @@ polled_irq_delay.BCM8885X=5
polled_irq_mode.BCM8885X=0
port_fec_fabric.BCM8885X=7
bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
port_init_cl72_1=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
index ccb87e9ad0e9..1ec4a9074523 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
@@ -1268,6 +1268,7 @@ polled_irq_delay.BCM8885X=5
polled_irq_mode.BCM8885X=0
port_fec_fabric.BCM8885X=7
bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
port_init_cl72_1=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
index ab881c4ccfdd..4d34218672e9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
@@ -275,5 +275,9 @@
}
]
},
- "interfaces": {}
+ "interfaces": {},
+ "asic_sensors": {
+ "poll_interval": "10",
+ "poll_admin_status": "enable"
+ }
}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
index 12a0b532fd84..c9036f36c9ec 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=1
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
index 59106ba59387..8c0517292d4a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=2
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
index a481d75a94bf..dc5a99c09533 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=11
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
index 2c315e84ac4c..12f59db6b93d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=12
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
index 581b5d76a914..e7769dbe80af 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=13
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
index 364690e7ae40..276b576485a6 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=14
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
index d12d791c83e2..bd35d4a44eac 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=15
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
index 86d9af38e0b2..140d21415fff 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=16
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
index 0c4b5403bf51..fbcfc7a8ed07 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=3
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
index 1617c40e6ca2..8c485dffa120 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=4
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
index f905a66b2e97..7d73ac75aeec 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=5
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
index f25c8b10d2a8..95d9b4117409 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=6
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
index 5a824fcde8aa..ddbe158e4d5c 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=7
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
index d27ebd282729..26595b410621 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=8
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
index cb8307452b6a..a845cc4cb0f1 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=9
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
index 184d1136033e..953da5cc9245 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
@@ -2,7 +2,8 @@
appl_enable_intr_init.BCM8879X=0
appl_param_module_id.BCM8879X=10
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
bist_enable.BCM8879X=0
core_clock_speed_khz.BCM8879X=1000000
custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf
index 220e262f68e8..1ee5a0239d63 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf
@@ -1,4 +1,4 @@
start_chassis_db=1
chassis_db_address=10.6.0.100
lag_id_start=1
-lag_id_end=1024
+lag_id_end=1023
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
index ef069d2e13de..f65c8d4a8cfa 100644
--- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
@@ -3,5 +3,6 @@
"skip_psud": true,
"skip_fancontrol": true,
"skip_chassisd": false,
- "skip_ycabled": true
+ "skip_ycabled": true,
+ "skip_xcvrd": true
}
diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic
+++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic b/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic
+++ b/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic b/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic
+++ b/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2
index 6f39d0ac5f58..d9ba01360b30 100644
--- a/dockers/docker-database/Dockerfile.j2
+++ b/dockers/docker-database/Dockerfile.j2
@@ -48,5 +48,6 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
COPY ["files/sysctl-net.conf", "/etc/sysctl.d/"]
COPY ["files/update_chassisdb_config", "/usr/local/bin/"]
COPY ["flush_unused_database", "/usr/local/bin/"]
+COPY ["multi_database_config.json.j2", "/usr/share/sonic/templates/"]
ENTRYPOINT ["/usr/local/bin/docker-database-init.sh"]
diff --git a/dockers/docker-database/critical_processes.j2 b/dockers/docker-database/critical_processes.j2
index 1f524132e938..5bf4dbce47c6 100644
--- a/dockers/docker-database/critical_processes.j2
+++ b/dockers/docker-database/critical_processes.j2
@@ -1,5 +1,5 @@
-{% if INSTANCES %}
-{% for redis_inst, redis_items in INSTANCES.items() %}
+{% if INSTANCES -%}
+{% for redis_inst, redis_items in INSTANCES.items() -%}
program:{{ redis_inst }}
-{%- endfor %}
-{%- endif %}
+{% endfor -%}
+{% endif -%}
diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2
index f37b64ee9665..b97589d3733d 100644
--- a/dockers/docker-database/database_config.json.j2
+++ b/dockers/docker-database/database_config.json.j2
@@ -23,13 +23,17 @@
"unix_socket_path": "",
"persistence_for_warm_boot" : "yes"
}
-{% endif %},
+{% endif %}
+{% if DATABASE_TYPE is defined and DATABASE_TYPE == "dpudb" %}
+{% else %}
+ ,
"redis_bmp":{
"hostname" : "{{HOST_IP}}",
"port" : {{BMP_DB_PORT}},
"unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock",
"persistence_for_warm_boot" : "yes"
}
+{% endif %}
},
"DATABASES" : {
"APPL_DB" : {
@@ -135,12 +139,14 @@
"separator": ":",
"instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
}
-{% endif %},
- "BMP_STATE_DB" : {
+{% else %}
+ ,
+ "BMP_STATE_DB" : {
"id" : 20,
"separator": "|",
"instance" : "redis_bmp"
}
+{% endif %}
},
"VERSION" : "1.0"
}
diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh
index c50add1a7698..076e06396447 100755
--- a/dockers/docker-database/docker-database-init.sh
+++ b/dockers/docker-database/docker-database-init.sh
@@ -50,7 +50,11 @@ mkdir -p /etc/supervisor/conf.d/
if [ -f /etc/sonic/database_config$NAMESPACE_ID.json ]; then
cp /etc/sonic/database_config$NAMESPACE_ID.json $REDIS_DIR/sonic-db/database_config.json
else
- HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
+ if [ -f /etc/sonic/enable_multidb ]; then
+ HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/multi_database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
+ else
+ HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
+ fi
fi
# on VoQ system, we only publish redis_chassis instance and CHASSIS_APP_DB when
@@ -125,6 +129,8 @@ do
else
echo -n > /var/lib/$inst/dump.rdb
fi
+ # the Redis process is operating under the 'redis' user in supervisord and make redis user own /var/lib/$inst inside db container.
+ chown -R redis:redis /var/lib/$inst
done
TZ=$(cat /etc/timezone)
diff --git a/dockers/docker-database/multi_database_config.json.j2 b/dockers/docker-database/multi_database_config.json.j2
new file mode 100644
index 000000000000..26ddb006b83d
--- /dev/null
+++ b/dockers/docker-database/multi_database_config.json.j2
@@ -0,0 +1,192 @@
+{% set include_remote_db = (REMOTE_DB_IP is defined and REMOTE_DB_PORT is defined) %}
+{
+ "INSTANCES": {
+ "redis":{
+ "hostname" : "{{HOST_IP}}",
+ "port" : {{REDIS_PORT}},
+ "unix_socket_path" : "/var/run/redis{{DEV}}/redis.sock",
+ "persistence_for_warm_boot" : "yes"
+ {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+ ,"database_type": "{{DATABASE_TYPE}}"
+ {% endif %}
+ },
+ "redis1": {
+ "hostname" : "{{HOST_IP}}",
+ "port" : 6378,
+ "unix_socket_path" : "/var/run/redis{{DEV}}/redis1.sock",
+ "persistence_for_warm_boot" : "yes"
+ {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+ ,"database_type": "{{DATABASE_TYPE}}"
+ {% endif %}
+ },
+ "redis2": {
+ "hostname" : "{{HOST_IP}}",
+ "port" : 6377,
+ "unix_socket_path" : "/var/run/redis{{DEV}}/redis2.sock",
+ "persistence_for_warm_boot" : "yes"
+ {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+ ,"database_type": "{{DATABASE_TYPE}}"
+ {% endif %}
+ },
+ "redis3": {
+ "hostname" : "{{HOST_IP}}",
+ "port" : 6376,
+ "unix_socket_path" : "/var/run/redis{{DEV}}/redis3.sock",
+ "persistence_for_warm_boot" : "yes"
+ {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+ ,"database_type": "{{DATABASE_TYPE}}"
+ {% endif %}
+ },
+ "redis4": {
+ "hostname" : "{{HOST_IP}}",
+ "port" : 6375,
+ "unix_socket_path" : "/var/run/redis{{DEV}}/redis4.sock",
+ "persistence_for_warm_boot" : "yes"
+ {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+ ,"database_type": "{{DATABASE_TYPE}}"
+ {% endif %}
+ },
+ "redis_chassis":{
+ "hostname" : "redis_chassis.server",
+ "port": 6380,
+ "unix_socket_path": "/var/run/redis-chassis/redis_chassis.sock",
+ "persistence_for_warm_boot" : "yes"
+ }
+{% if include_remote_db %}
+ ,"remote_redis":{
+ "hostname" : "{{REMOTE_DB_IP}}",
+ "port" : {{REMOTE_DB_PORT}},
+ "unix_socket_path": "",
+ "persistence_for_warm_boot" : "yes"
+ }
+{% endif %},
+ "redis_bmp":{
+ "hostname" : "{{HOST_IP}}",
+ "port" : {{BMP_DB_PORT}},
+ "unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock",
+ "persistence_for_warm_boot" : "yes"
+ }
+ },
+ "DATABASES" : {
+ "APPL_DB": {
+ "id": 0,
+ "separator": ":",
+ "instance": "redis1"
+ },
+ "ASIC_DB": {
+ "id": 1,
+ "separator": ":",
+ "instance": "redis2"
+ },
+ "COUNTERS_DB": {
+ "id": 2,
+ "separator": ":",
+ "instance": "redis3"
+ },
+ "LOGLEVEL_DB": {
+ "id": 3,
+ "separator": ":",
+ "instance": "redis"
+ },
+ "CONFIG_DB": {
+ "id": 4,
+ "separator": "|",
+ "instance": "redis"
+ },
+ "PFC_WD_DB": {
+ "id": 5,
+ "separator": ":",
+ "instance": "redis3"
+ },
+ "FLEX_COUNTER_DB": {
+ "id": 5,
+ "separator": ":",
+ "instance": "redis3"
+ },
+ "STATE_DB": {
+ "id": 6,
+ "separator": "|",
+ "instance": "redis"
+ },
+ "SNMP_OVERLAY_DB": {
+ "id": 7,
+ "separator": "|",
+ "instance": "redis"
+ },
+ "SYSMON_DB": {
+ "id": 10,
+ "separator": "|",
+ "instance": "redis"
+ },
+ "BMC_DB": {
+ "id": 12,
+ "separator": ":",
+ "instance": "redis4"
+ },
+ "RESTAPI_DB": {
+ "id": 8,
+ "separator": "|",
+ "instance": "redis"
+ },
+ "GB_ASIC_DB": {
+ "id": 9,
+ "separator": ":",
+ "instance": "redis"
+ },
+ "GB_COUNTERS_DB": {
+ "id": 10,
+ "separator": ":",
+ "instance": "redis"
+ },
+ "GB_FLEX_COUNTER_DB": {
+ "id": 11,
+ "separator": ":",
+ "instance": "redis"
+ },
+ "APPL_STATE_DB": {
+ "id": 14,
+ "separator": ":",
+ "instance": "redis"
+ },
+ "CHASSIS_APP_DB" : {
+ "id" : 12,
+ "separator": "|",
+ "instance" : "redis_chassis"
+ },
+ "CHASSIS_STATE_DB" : {
+ "id" : 13,
+ "separator": "|",
+ "instance" : "redis_chassis"
+ }
+{% if DATABASE_TYPE is defined and DATABASE_TYPE == "dpudb" %}
+ ,
+ "DPU_APPL_DB" : {
+ "id" : 15,
+ "separator": ":",
+ "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %},
+ "format": "proto"
+ },
+ "DPU_APPL_STATE_DB" : {
+ "id" : 16,
+ "separator": "|",
+ "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
+ },
+ "DPU_STATE_DB" : {
+ "id" : 17,
+ "separator": "|",
+ "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
+ },
+ "DPU_COUNTERS_DB" : {
+ "id" : 18,
+ "separator": ":",
+ "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
+ }
+{% endif %},
+ "BMP_STATE_DB" : {
+ "id" : 20,
+ "separator": "|",
+ "instance" : "redis_bmp"
+ }
+ },
+ "VERSION" : "1.0"
+}
diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index e7b70a954ce2..5b0dc82c314b 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -50,11 +50,14 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
COPY ["critical_processes", "/etc/supervisor"]
COPY ["cli", "/cli/"]
-RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
-
-# Copy rsyslog plugin configuration file and regexes to docker
-COPY ["dhcp_relay_regex.json", "/etc/rsyslog.d/"]
-COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+# Copy regex json and rsyslog_plugin.conf file into rsyslog.d
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
+# Create dhcp_relay_regex.conf
+RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/dhcp_relay_events.conf
+RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
+RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-dhcp-relay/docker_init.sh b/dockers/docker-dhcp-relay/docker_init.sh
index 94e2ddff0622..1ff0e936ff68 100755
--- a/dockers/docker-dhcp-relay/docker_init.sh
+++ b/dockers/docker-dhcp-relay/docker_init.sh
@@ -21,7 +21,4 @@ chmod +x /usr/bin/wait_for_intf.sh
# The docker container should start this script as PID 1, so now that supervisord is
# properly configured, we exec /usr/local/bin/supervisord so that it runs as PID 1 for the
# duration of the container's lifetime
-export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
-j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/dhcp_relay_events.conf
-
exec /usr/local/bin/supervisord
diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index e39ffdadf4cc..98c4593811f7 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -59,11 +59,12 @@ RUN chmod a+x /usr/bin/TSA && \
chmod a+x /usr/bin/TSC && \
chmod a+x /usr/bin/zsocket.sh
-RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
-
-# Copy rsyslog plugin configuration file and regexes to docker
-COPY ["bgp_regex.json", "/etc/rsyslog.d/"]
-COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
+RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/bgp_events.conf
+RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
+RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index fbbcee8bd66c..662a78b5adcf 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -112,7 +112,4 @@ TZ=$(cat /etc/timezone)
rm -rf /etc/localtime
ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
-export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
-j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/bgp_events.conf
-
exec /usr/local/bin/supervisord
diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
index da6358a00ca6..db11d662a3af 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
@@ -88,6 +88,19 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
bgp graceful-restart select-defer-time {{ constants.bgp.graceful_restart.select_defer_time | default(45) }}
{% endif %}
!
+{# set bmp info #}
+{% if (FEATURE is defined) and ('bmp' in FEATURE) and ('state' in FEATURE['bmp']) and (FEATURE['bmp']['state'] == 'enabled') %}
+!
+ bmp mirror buffer-limit 4294967214
+!
+ bmp targets sonic-bmp
+ bmp stats interval 1000
+ bmp monitor ipv4 unicast pre-policy
+ bmp monitor ipv6 unicast pre-policy
+ bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000
+!
+!
+{% endif %}
{# set router-id #}
{% if DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' or DEVICE_METADATA['localhost']['switch_type'] == 'voq' or DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
{% if 'bgp_router_id' in DEVICE_METADATA['localhost'] %}
diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2
index 94dacbc3af78..2df0cd4a4270 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2
@@ -49,7 +49,7 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} vrf {{ vnet_name }}
address-family ipv4 unicast
neighbor {{ neighbor_addr }} activate
neighbor {{ neighbor_addr }} soft-reconfiguration inbound
- maximum-paths 64
+ maximum-paths 514
exit-address-family
{% endif %}
address-family l2vpn evpn
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2
index d2d2be87e7f3..0e5c7aed3a32 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2
@@ -5,6 +5,7 @@
neighbor INTERNAL_PEER_V6 peer-group
{% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
neighbor INTERNAL_PEER_V4 update-source Loopback4096
+ neighbor INTERNAL_PEER_V4 ttl-security hops 1
{% endif %}
address-family ipv4
{% if CONFIG_DB__DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' %}
@@ -15,10 +16,10 @@
neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
neighbor INTERNAL_PEER_V4 send-community
- neighbor INTERNAL_PEER_V4 ttl-security hops 1
exit-address-family
{% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
neighbor INTERNAL_PEER_V6 update-source Loopback4096
+ neighbor INTERNAL_PEER_V6 ttl-security hops 1
{% endif %}
address-family ipv6
{% if CONFIG_DB__DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' %}
@@ -29,7 +30,6 @@
neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
neighbor INTERNAL_PEER_V6 send-community
- neighbor INTERNAL_PEER_V6 ttl-security hops 1
exit-address-family
!
! end of template: bgpd/templates/internal/peer-group.conf.j2
diff --git a/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2 b/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2
index 69f4e8e6931e..eea54fcfd55f 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2
@@ -6,6 +6,7 @@ program:fpmsyncd
program:bfdd
program:ospfd
program:pimd
+program:pathd
program:frrcfgd
{%- else %}
program:bgpcfgd
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 15aa2ed55110..113289af3b78 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -29,6 +29,17 @@ stdout_logfile=syslog
stderr_logfile=syslog
dependent_startup=true
+[program:mgmtd]
+command=/usr/lib/frr/mgmtd -A 127.0.0.1
+priority=4
+autostart=false
+autorestart=true
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
[program:zebra]
command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic -M snmp --asic-offload=notify_on_offload
priority=4
@@ -77,7 +88,11 @@ dependent_startup_wait_for=zebra:running
{% endif %}
[program:bgpd]
+{% if FEATURE is defined and FEATURE.bmp is defined and FEATURE.bmp.state is defined and FEATURE.bmp.state == "enabled" %}
+command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp -M bmp
+{% else %}
command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp
+{% endif %}
priority=5
stopsignal=KILL
autostart=false
@@ -193,3 +208,17 @@ stderr_logfile=syslog
dependent_startup=true
dependent_startup_wait_for=bgpd:running
{% endif %}
+
+{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %}
+[program:pathd]
+command=/usr/lib/frr/pathd -A 127.0.0.1
+priority=5
+stopsignal=KILL
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=zebra:running
+{% endif %}
diff --git a/dockers/docker-iccpd/Dockerfile.j2 b/dockers/docker-iccpd/Dockerfile.j2
index 72d2d3d20883..78f2648847ce 100644
--- a/dockers/docker-iccpd/Dockerfile.j2
+++ b/dockers/docker-iccpd/Dockerfile.j2
@@ -7,7 +7,7 @@ ARG docker_container_name
ENV DEBIAN_FRONTEND=noninteractive
RUN apt-get update && \
- apt-get install -y ebtables
+ apt-get install -y iptables
COPY \
{% for deb in docker_iccpd_debs.split(' ') -%}
diff --git a/dockers/docker-macsec/cli/show/plugins/show_macsec.py b/dockers/docker-macsec/cli/show/plugins/show_macsec.py
index f8a1265b07e9..a1c58cd34bb1 100644
--- a/dockers/docker-macsec/cli/show/plugins/show_macsec.py
+++ b/dockers/docker-macsec/cli/show/plugins/show_macsec.py
@@ -63,7 +63,7 @@ def dump_str(self, cache = None) -> str:
counters = copy.deepcopy(self.counters)
if cache:
for k, v in counters.items():
- if k in cache.counters:
+ if k in cache.counters and k.startswith("SAI_MACSEC_SA_STAT"):
counters[k] = int(counters[k]) - int(cache.counters[k])
counters = sorted(counters.items(), key=lambda x: x[0])
buffer += tabulate(meta + counters)
diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index b3a7e49c3254..fb90b4f09c22 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -80,11 +80,14 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/
RUN rm -f /usr/share/sonic/templates/docker-init.j2
RUN chmod 755 /usr/bin/docker-init.sh
-RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
-
-# Copy rsyslog plugin configuration file and regexes to docker
-COPY ["swss_regex.json", "/etc/rsyslog.d/"]
-COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
+# Create swss rsyslog_plugin conf file
+RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/swss_events.conf
+RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
+RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
ENTRYPOINT ["/usr/bin/docker-init.sh"]
diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2
index 143c9bd5229f..af37252a7a71 100755
--- a/dockers/docker-orchagent/docker-init.j2
+++ b/dockers/docker-orchagent/docker-init.j2
@@ -3,7 +3,7 @@
mkdir -p /etc/swss/config.d/
mkdir -p /etc/supervisor/
mkdir -p /etc/supervisor/conf.d/
-
+mkdir -p /dev/shm/supervisor/
CFGGEN_PARAMS=" \
-d \
@@ -74,7 +74,4 @@ TZ=$(cat /etc/timezone)
rm -rf /etc/localtime
ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
-export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
-j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/swss_events.conf
-
exec /usr/local/bin/supervisord
diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py
index 5867787e0aa7..9569284bc74a 100755
--- a/dockers/docker-orchagent/enable_counters.py
+++ b/dockers/docker-orchagent/enable_counters.py
@@ -18,9 +18,6 @@ def enable_counter_group(db, name):
info = {}
info['FLEX_COUNTER_STATUS'] = 'enable'
db.mod_entry("FLEX_COUNTER_TABLE", name, info)
- else:
- entry_info.update({"FLEX_COUNTER_DELAY_STATUS":"false"})
- db.mod_entry("FLEX_COUNTER_TABLE", name, entry_info)
def enable_rates():
# set the default interval for rates
diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index 256def591807..4889597dd703 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -63,7 +63,7 @@ elif [ "$platform" == "vs" ]; then
ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
elif [ "$platform" == "mellanox" ]; then
ORCHAGENT_ARGS+=""
-elif [ "$platform" == "innovium" ]; then
+elif [ "$platform" == "marvell-teralynx" ]; then
ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
elif [ "$platform" == "nvidia-bluefield" ]; then
ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
diff --git a/dockers/docker-pde/syncd_init_common.sh b/dockers/docker-pde/syncd_init_common.sh
index 0212f842329a..7a28d7208f01 100755
--- a/dockers/docker-pde/syncd_init_common.sh
+++ b/dockers/docker-pde/syncd_init_common.sh
@@ -207,11 +207,11 @@ config_syncd_vs()
CMD_ARGS+=" -p $HWSKU_DIR/sai.profile"
}
-config_syncd_innovium()
+config_syncd_marvell_teralynx()
{
CMD_ARGS+=" -p $HWSKU_DIR/sai.profile"
ulimit -s 65536
- export II_ROOT="/var/log/invm"
+ export II_ROOT="/var/log/mrvl_teralynx"
export II_APPEND_LOG=1
mkdir -p $II_ROOT
}
@@ -236,8 +236,8 @@ config_syncd()
config_syncd_nephos
elif [ "$SONIC_ASIC_TYPE" == "vs" ]; then
config_syncd_vs
- elif [ "$SONIC_ASIC_TYPE" == "innovium" ]; then
- config_syncd_innovium
+ elif [ "$SONIC_ASIC_TYPE" == "marvell-teralynx" ]; then
+ config_syncd_marvell_teralynx
else
echo "Unknown ASIC type $SONIC_ASIC_TYPE"
exit 1
diff --git a/dockers/docker-platform-monitor/delay.py b/dockers/docker-platform-monitor/delay.py
new file mode 100644
index 000000000000..986412b25038
--- /dev/null
+++ b/dockers/docker-platform-monitor/delay.py
@@ -0,0 +1,7 @@
+#!/usr/bin/env python3
+
+# This file serves as a monitor for advanced reboot.
+# Once it exits, the delayed daemon will initiate.
+
+from swsscommon.swsscommon import RestartWaiter
+RestartWaiter.waitAdvancedBootDone()
diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
index b023a8f2b0e7..fd2d07296379 100644
--- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
+++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
@@ -28,6 +28,16 @@ stdout_logfile=syslog
stderr_logfile=syslog
dependent_startup=true
+
+{% if delay_non_critical_daemon %}
+[program:delay]
+command=python3 /usr/bin/delay.py
+autostart=false
+autorestart=false
+startsecs=0
+dependent_startup=true
+{% endif %}
+
{% if not skip_chassisd and (IS_MODULAR_CHASSIS == 1 or is_smartswitch) %}
[program:chassisd]
command=/usr/local/bin/chassisd
@@ -64,7 +74,7 @@ stdout_logfile=syslog
stderr_logfile=syslog
startsecs=0
dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
{% endif %}
{% if not skip_fancontrol and HAVE_FANCONTROL_CONF == 1 %}
@@ -151,7 +161,7 @@ stdout_logfile=syslog
stderr_logfile=syslog
startsecs=10
dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
{% endif %}
{% if not skip_syseepromd %}
@@ -164,7 +174,7 @@ stdout_logfile=syslog
stderr_logfile=syslog
startsecs=10
dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
{% endif %}
{% if not skip_thermalctld %}
@@ -178,7 +188,7 @@ stderr_logfile=syslog
startsecs=10
startretries=50
dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
{% endif %}
{% if not skip_pcied %}
@@ -191,7 +201,7 @@ stdout_logfile=syslog
stderr_logfile=syslog
startsecs=10
dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
{% endif %}
{% if include_sensormond %}
@@ -204,7 +214,7 @@ stdout_logfile=syslog
stderr_logfile=syslog
startsecs=10
dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
{% endif %}
{% if not skip_stormond %}
diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index 5148dd1125f1..8dbc1a2ce89e 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -52,6 +52,11 @@ RUN apt-get update \
libboost-atomic1.71.0 \
{% else %}
libboost-atomic1.74.0 \
+ flex \
+ bison \
+ tcpd \
+ libwrap0 \
+ libwrap0-dev \
{% endif %}
less \
git \
@@ -73,8 +78,6 @@ RUN apt-get update \
python3-scapy \
python3-six \
libpcap-dev \
-# TODO check if tacacs+ is required by tests
-# tacacs+ has been dropped from bullseye
{% if PTF_ENV_PY_VER == "mixed" %}
tacacs+ \
{% endif %}
@@ -168,6 +171,16 @@ RUN rm -rf /debs \
&& cd /opt \
&& wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
+{% if PTF_ENV_PY_VER == "py3" %}
+RUN git clone https://github.com/facebook/tac_plus \
+ && cd tac_plus \
+ && cd tacacs-F4.0.4.28 \
+ && ./configure \
+ && make install \
+ && ln -s /usr/local/sbin/tac_plus /usr/sbin/tac_plus \
+ && ln -s /usr/local/bin/tac_pwd /usr/sbin/tac_pwd
+{% endif %}
+
{% if PTF_ENV_PY_VER == "mixed" %}
RUN python3 -m venv --system-site-packages env-python3
# Activating a virtualenv. The virtualenv automatically works for RUN, ENV and CMD.
diff --git a/dockers/docker-sonic-bmp/Dockerfile.j2 b/dockers/docker-sonic-bmp/Dockerfile.j2
new file mode 100755
index 000000000000..2e79001dbf92
--- /dev/null
+++ b/dockers/docker-sonic-bmp/Dockerfile.j2
@@ -0,0 +1,50 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+ARG image_version
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+# Pass the image_version to container
+ENV IMAGE_VERSION=$image_version
+
+RUN apt-get update
+
+{% if docker_sonic_bmp_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_sonic_bmp_debs.split(' '), "/debs/") }}
+
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_sonic_bmp_debs.split(' ')) }}
+{%- endif %}
+
+{% if docker_sonic_bmp_whls.strip() %}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_sonic_bmp_whls.split(' '), "/python-wheels/") }}
+
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_sonic_bmp_whls.split(' ')) }}
+{% endif %}
+
+RUN apt-get clean -y && \
+ apt-get autoclean - && \
+ apt-get autoremove -y && \
+ rm -rf /debs && \
+ mkdir -p /etc/bmp
+
+COPY ["bmp.sh", "/usr/bin/"]
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+COPY ["critical_processes", "/etc/supervisor/"]
+
+RUN chmod +x /usr/bin/bmp.sh
+RUN touch /var/log/openbmpd.log
+
+RUN apt-get clean -y && \
+ apt-get autoclean -y && \
+ apt-get autoremove -y && \
+ rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
\ No newline at end of file
diff --git a/dockers/docker-sonic-bmp/base_image_files/monit_bmp b/dockers/docker-sonic-bmp/base_image_files/monit_bmp
new file mode 100644
index 000000000000..353a716455d9
--- /dev/null
+++ b/dockers/docker-sonic-bmp/base_image_files/monit_bmp
@@ -0,0 +1,5 @@
+###############################################################################
+## Monit configuration for bmp container
+###############################################################################
+check program container_memory_bmp with path "/usr/bin/memory_checker bmp 419430400"
+ if status == 3 for 10 times within 20 cycles then exec "/usr/bin/docker exec bmp supervisorctl restart openbmpd"
diff --git a/dockers/docker-sonic-bmp/bmp.sh b/dockers/docker-sonic-bmp/bmp.sh
new file mode 100644
index 000000000000..eb3d186fb548
--- /dev/null
+++ b/dockers/docker-sonic-bmp/bmp.sh
@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+
+
+if [ "${RUNTIME_OWNER}" == "" ]; then
+ RUNTIME_OWNER="kube"
+fi
+
+CTR_SCRIPT="/usr/share/sonic/scripts/container_startup.py"
+if test -f ${CTR_SCRIPT}
+then
+ ${CTR_SCRIPT} -f bmp -o ${RUNTIME_OWNER} -v ${IMAGE_VERSION}
+fi
+
diff --git a/dockers/docker-sonic-bmp/critical_processes b/dockers/docker-sonic-bmp/critical_processes
new file mode 100644
index 000000000000..10621f0de87f
--- /dev/null
+++ b/dockers/docker-sonic-bmp/critical_processes
@@ -0,0 +1,3 @@
+group:sonic-bmp
+program:openbmpd
+program:bmpcfgd
\ No newline at end of file
diff --git a/dockers/docker-sonic-bmp/supervisord.conf b/dockers/docker-sonic-bmp/supervisord.conf
new file mode 100644
index 000000000000..7a751c7cfce1
--- /dev/null
+++ b/dockers/docker-sonic-bmp/supervisord.conf
@@ -0,0 +1,61 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[eventlistener:supervisor-proc-exit-listener]
+command=/usr/bin/supervisor-proc-exit-listener --container-name bmp
+events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
+autostart=true
+autorestart=false
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=true
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:bmp]
+command=/usr/bin/bmp.sh
+priority=2
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
+[group:sonic-bmp]
+programs=openbmpd,bmpcfgd
+
+[program:bmpcfgd]
+command=python3 /usr/local/bin/bmpcfgd
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:openbmpd]
+command=/usr/bin/openbmpd -f -l /var/log/openbmpd.log -c /etc/bmp/openbmpd.conf
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh
index b9241dca1d6a..8dae895d89df 100755
--- a/dockers/docker-sonic-gnmi/gnmi-native.sh
+++ b/dockers/docker-sonic-gnmi/gnmi-native.sh
@@ -17,6 +17,10 @@ X509=$(echo $TELEMETRY_VARS | jq -r '.x509')
GNMI=$(echo $TELEMETRY_VARS | jq -r '.gnmi')
CERTS=$(echo $TELEMETRY_VARS | jq -r '.certs')
+# Enable GRPC GO LOG
+export GRPC_GO_LOG_VERBOSITY_LEVEL=99
+export GRPC_GO_LOG_SEVERITY_LEVEL=info
+
TELEMETRY_ARGS=" -logtostderr"
export CVL_SCHEMA_PATH=/usr/sbin/schema
@@ -72,6 +76,18 @@ else
TELEMETRY_ARGS+=" -v=2"
fi
+if [ -nz "$GNMI" ]; then
+ ENABLE_CRL=$(echo $GNMI | jq -r '.enable_crl')
+ if [ $ENABLE_CRL == "true" ]; then
+ TELEMETRY_ARGS+=" --enable_crl"
+ fi
+
+ CRL_EXPIRE_DURATION=$(echo $GNMI | jq -r '.crl_expire_duration')
+ if [ -n $CRL_EXPIRE_DURATION ]; then
+ TELEMETRY_ARGS+=" --crl_expire_duration $CRL_EXPIRE_DURATION"
+ fi
+fi
+
# Enable ZMQ for SmartSwitch
LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"`
if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh
index d1c9216d4195..2428922b57f6 100755
--- a/dockers/docker-sonic-telemetry/telemetry.sh
+++ b/dockers/docker-sonic-telemetry/telemetry.sh
@@ -17,6 +17,9 @@ X509=$(echo $TELEMETRY_VARS | jq -r '.x509')
GNMI=$(echo $TELEMETRY_VARS | jq -r '.gnmi')
CERTS=$(echo $TELEMETRY_VARS | jq -r '.certs')
+export GRPC_GO_LOG_VERBOSITY_LEVEL=99
+export GRPC_GO_LOG_SEVERITY_LEVEL=info
+
TELEMETRY_ARGS=" -logtostderr"
export CVL_SCHEMA_PATH=/usr/sbin/schema
export GOTRACEBACK=crash
@@ -74,6 +77,18 @@ else
TELEMETRY_ARGS+=" -v=2"
fi
+if [ -nz "$GNMI" ]; then
+ ENABLE_CRL=$(echo $GNMI | jq -r '.enable_crl')
+ if [ $ENABLE_CRL == "true" ]; then
+ TELEMETRY_ARGS+=" --enable_crl"
+ fi
+
+ CRL_EXPIRE_DURATION=$(echo $GNMI | jq -r '.crl_expire_duration')
+ if [ -n $CRL_EXPIRE_DURATION ]; then
+ TELEMETRY_ARGS+=" --crl_expire_duration $CRL_EXPIRE_DURATION"
+ fi
+fi
+
# gNMI save-on-set behavior is disabled by default.
# Save-on-set can be turned on by setting the "TELEMETRY|gnmi|save_on_set"
# to "true".
diff --git a/files/build_templates/bmp.service.j2 b/files/build_templates/bmp.service.j2
new file mode 100644
index 000000000000..72ab295d04d5
--- /dev/null
+++ b/files/build_templates/bmp.service.j2
@@ -0,0 +1,16 @@
+[Unit]
+Description=BMP container
+Requires=database.service
+After=database.service
+Before=ntp-config.service
+BindsTo=sonic.target
+After=sonic.target
+StartLimitIntervalSec=1200
+StartLimitBurst=3
+
+[Service]
+User={{ sonicadmin_user }}
+ExecStartPre=/usr/local/bin/{{docker_container_name}}.sh start
+ExecStart=/usr/local/bin/{{docker_container_name}}.sh wait
+ExecStop=/usr/local/bin/{{docker_container_name}}.sh stop
+RestartSec=30
diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2
index 9787bec1bd68..8ad98b89c1c6 100644
--- a/files/build_templates/buffers_config.j2
+++ b/files/build_templates/buffers_config.j2
@@ -302,7 +302,7 @@ def
"LOSSLESS_TRAFFIC_PATTERN": {
"AZURE": {
"mtu": "1024",
- "small_packet_percentage": "100"
+ "small_packet_percentage": "50"
}
}
{% endif %}
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 67add27cea53..3a7159d9e4ff 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -73,6 +73,9 @@ function getBootType()
*SONIC_BOOT_TYPE=fastfast*)
TYPE='fastfast'
;;
+ *SONIC_BOOT_TYPE=express*)
+ TYPE='express'
+ ;;
*SONIC_BOOT_TYPE=fast*|*fast-reboot*)
TYPE='fast'
;;
@@ -87,7 +90,7 @@ function preStartAction()
{%- if docker_container_name == "database" %}
WARM_DIR=/host/warmboot
if [ "$DATABASE_TYPE" != "chassisdb" ]; then
- if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then
+ if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "express" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then
# Load redis content from /host/warmboot/dump.rdb
docker cp $WARM_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb
else
@@ -121,6 +124,12 @@ function setPlatformLagIdBoundaries()
{
docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB SET "SYSTEM_LAG_ID_START" "$lag_id_start"
docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB SET "SYSTEM_LAG_ID_END" "$lag_id_end"
+ docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB EVAL "
+ local start_id = tonumber(ARGV[1])
+ local end_id = tonumber(ARGV[2])
+ for id = start_id,end_id do
+ redis.call('rpush','SYSTEM_LAG_IDS_FREE_LIST', tostring(id))
+ end" 0 $lag_id_start $lag_id_end
}
function waitForAllInstanceDatabaseConfigJsonFilesReady()
{
@@ -229,7 +238,7 @@ function postStartAction()
sleep 1;
done
- if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then
+ if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "express" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then
# retain the dump file from last boot for debugging purposes
mv $WARM_DIR/dump.rdb $WARM_DIR/dump.rdb.old
else
@@ -286,6 +295,8 @@ function postStartAction()
fi
# Add redis UDS to the redis group and give read/write access to the group
+ REDIS_BMP_SOCK="/var/run/redis/redis_bmp.sock"
+ chgrp -f redis $REDIS_BMP_SOCK && chmod -f 0760 $REDIS_BMP_SOCK
REDIS_SOCK="/var/run/redis${DEV}/redis.sock"
else
until [[ ($(docker exec -i ${DOCKERNAME} pgrep -x -c supervisord) -gt 0) &&
@@ -297,9 +308,7 @@ function postStartAction()
fi
REDIS_SOCK="/var/run/redis-chassis/redis_chassis.sock"
fi
- REDIS_BMP_SOCK="/var/run/redis/redis_bmp.sock"
chgrp -f redis $REDIS_SOCK && chmod -f 0760 $REDIS_SOCK
- chgrp -f redis $REDIS_BMP_SOCK && chmod -f 0760 $REDIS_BMP_SOCK
{%- elif docker_container_name == "swss" %}
# Wait until swss container state is Running
until [[ ($(docker inspect -f {{"'{{.State.Running}}'"}} swss$DEV) == "true") ]]; do
@@ -330,11 +339,6 @@ function postStartAction()
docker cp $PSENSOR pmon:/usr/bin/
fi
fi
-{%- elif docker_container_name == "eventd" %}
- export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
- j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/host_events.conf
- j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/syncd_events_info.json > /etc/rsyslog.d/syncd_events.conf
- systemctl restart rsyslog
{%- else %}
: # nothing
{%- endif %}
@@ -438,6 +442,10 @@ start() {
if [ -f "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON" ]; then
$SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true
fi
+ SUPPORTING_BULK_COUNTER_GROUPS="$HWSKU_FOLDER/supporting_bulk_counter_groups"
+ if [ -f "$SUPPORTING_BULK_COUNTER_GROUPS" ]; then
+ $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' supporting_bulk_counter_groups@ $(cat $SUPPORTING_BULK_COUNTER_GROUPS)
+ fi
fi
{%- endif %}
@@ -625,6 +633,7 @@ start() {
{%- endif %}
-e RUNTIME_OWNER=local \
--uts=host \{# W/A: this should be set per-docker, for those dockers which really need host's UTS namespace #}
+ --tmpfs /var/log/supervisor:rw \
{%- if install_debug_image == "y" %}
-v /src:/src:ro -v /debug:/debug:rw \
{%- endif %}
diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index 622087a5521d..1d1c1817b49d 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -24,7 +24,6 @@
"FLEX_COUNTER_TABLE": {
"ACL": {
"FLEX_COUNTER_STATUS": "enable",
- "FLEX_COUNTER_DELAY_STATUS": "true",
"POLL_INTERVAL": "10000"
},
"PORT": {
diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2
index bf5007471a48..70ebf9e238ef 100644
--- a/files/build_templates/qos_config.j2
+++ b/files/build_templates/qos_config.j2
@@ -77,7 +77,7 @@
{% endif %}
{%- endfor %}
-{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
+{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot'] -%}
{%- set backend_device_types = ['BackEndToRRouter', 'BackEndLeafRouter'] -%}
{%- set apollo_resource_types = ['DL-NPU-Apollo'] -%}
diff --git a/files/build_templates/rsyslog_plugin.conf.j2 b/files/build_templates/rsyslog_plugin.conf.j2
index f69e58cf4313..56ec0f71d3f1 100644
--- a/files/build_templates/rsyslog_plugin.conf.j2
+++ b/files/build_templates/rsyslog_plugin.conf.j2
@@ -1,6 +1,7 @@
## rsyslog-plugin for streaming telemetry via gnmi
-{% if ENVIRONMENT['EVENTD_STATE'] == "enabled" %}
+
+
template(name="prog_msg" type="list") {
property(name="msg")
constant(value="\n")
@@ -15,4 +16,3 @@ if re_match($programname, "{{ proc.name }}") then {
template="prog_msg")
}
{% endfor %}
-{% endif %}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 891a9afdc06b..2217859dd827 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -104,6 +104,11 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-nettools_*.deb || \
sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
sudo setcap 'cap_net_raw=+ep' $FILESYSTEM_ROOT/usr/bin/wol
+# This is needed for moving monit logs, state and logrotate status to tmpfs
+sudo bash -c "echo \"d /dev/shm/monit/ 0755 root root\" > $FILESYSTEM_ROOT/etc/tmpfiles.d/tmpfs-monit.conf"
+sudo bash -c "echo \"d /dev/shm/logrotate/ 0755 root root\" > $FILESYSTEM_ROOT/etc/tmpfiles.d/tmpfs-logrotate.conf"
+
+
# Install a patched version of ifupdown2 (and its dependencies via 'apt-get -y install -f')
sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \
sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
@@ -358,16 +363,13 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \
sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-{% if include_system_eventd == "y" %}
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
# Install sonic-rsyslog-plugin
sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \
sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
# Generate host conf for rsyslog_plugin
-sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin
-sudo cp $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
-sudo cp $BUILD_TEMPLATES/events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
-sudo cp $BUILD_TEMPLATES/syncd_events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
+j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/host_events.conf
sudo cp $BUILD_TEMPLATES/monit_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
sudo cp $BUILD_TEMPLATES/sshd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
sudo cp $BUILD_TEMPLATES/systemd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
@@ -376,7 +378,11 @@ sudo cp $BUILD_TEMPLATES/dockerd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
sudo cp $BUILD_TEMPLATES/seu_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
sudo cp $BUILD_TEMPLATES/zebra_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
+
+
+j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf
sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
+
{% endif %}
# Install custom-built monit package and SONiC configuration files
@@ -1019,6 +1025,7 @@ sudo LANG=C cp $SCRIPTS_DIR/database.sh $FILESYSTEM_ROOT/usr/local/bin/database.
sudo LANG=C cp $SCRIPTS_DIR/snmp.sh $FILESYSTEM_ROOT/usr/local/bin/snmp.sh
sudo LANG=C cp $SCRIPTS_DIR/telemetry.sh $FILESYSTEM_ROOT/usr/local/bin/telemetry.sh
sudo LANG=C cp $SCRIPTS_DIR/gnmi.sh $FILESYSTEM_ROOT/usr/local/bin/gnmi.sh
+sudo LANG=C cp $SCRIPTS_DIR/bmp.sh $FILESYSTEM_ROOT/usr/local/bin/bmp.sh
sudo LANG=C cp $SCRIPTS_DIR/mgmt-framework.sh $FILESYSTEM_ROOT/usr/local/bin/mgmt-framework.sh
sudo LANG=C cp $SCRIPTS_DIR/asic_status.sh $FILESYSTEM_ROOT/usr/local/bin/asic_status.sh
sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_status.py
@@ -1136,7 +1143,12 @@ sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHE
sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME
sudo rm -rf $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
+
+sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libdashapi_*.deb || \
+ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+
sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install xmlstarlet
+
{% endif %}
{%- if SONIC_ROUTING_STACK == "frr" %}
@@ -1156,3 +1168,8 @@ sudo rm -rf $FILESYSTEM_ROOT/tmp/mask_disabled_services.py
sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-dbus
+
+## Enable MULTIDB
+{% if ENABLE_MULTIDB == "y" %}
+sudo touch $FILESYSTEM_ROOT_ETC_SONIC/enable_multidb
+{% endif %}
diff --git a/files/build_templates/swss_vars.j2 b/files/build_templates/swss_vars.j2
index f35d0fc080ad..53639f01f7f1 100644
--- a/files/build_templates/swss_vars.j2
+++ b/files/build_templates/swss_vars.j2
@@ -7,6 +7,9 @@
"mac": "{{ DEVICE_METADATA.localhost.mac }}",
"resource_type": "{{ DEVICE_METADATA.localhost.resource_type }}",
"synchronous_mode": {% if DEVICE_METADATA.localhost.synchronous_mode == "disable" %}"disable"{% else %}"enable"{% endif %},
+ {%if DEVICE_METADATA.localhost.supporting_bulk_counter_groups is defined and DEVICE_METADATA.localhost.supporting_bulk_counter_groups != '' -%}
+ "supporting_bulk_counter_groups": "{{ DEVICE_METADATA.localhost.supporting_bulk_counter_groups|join(',') }}",
+ {% endif -%}
"dual_tor": {% if DEVICE_METADATA.localhost.type == "ToRRouter" and DEVICE_METADATA.localhost.subtype == "DualToR" %}"enable"{% else %}"disable"{% endif %},
"dscp_remapping": {% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.tunnel_qos_remap is defined and SYSTEM_DEFAULTS.tunnel_qos_remap.status == "enabled" %}"enable"{% else %}"disable"{% endif %}
}
diff --git a/files/image_config/constants/constants.yml b/files/image_config/constants/constants.yml
index 01fb02deadf4..781055ba49b2 100644
--- a/files/image_config/constants/constants.yml
+++ b/files/image_config/constants/constants.yml
@@ -22,8 +22,8 @@ constants:
enabled: true
maximum_paths:
enabled: true
- ipv4: 64
- ipv6: 64
+ ipv4: 514
+ ipv6: 514
allow_list:
enabled: true
default_action: "permit" # or "deny"
diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2
index cfdd322c4543..ea04fa80e931 100644
--- a/files/image_config/interfaces/interfaces.j2
+++ b/files/image_config/interfaces/interfaces.j2
@@ -131,6 +131,7 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
{# TODO: COPP policy type rules #}
{% endfor %}
{% else %}
+{% if not (DEVICE_METADATA['localhost']['subtype'] == 'SmartSwitch' and DEVICE_METADATA['localhost']['switch_type'] == 'dpu') %}
auto eth0
iface eth0 inet dhcp
metric 202
@@ -142,6 +143,7 @@ iface eth0 inet6 dhcp
down sysctl net.ipv6.conf.eth0.accept_ra=0
{% endif %}
{% endif %}
+{% endif %}
#
source /etc/network/interfaces.d/*
#
diff --git a/files/image_config/logrotate/logrotateOverride.conf b/files/image_config/logrotate/logrotateOverride.conf
index adc85ff306b5..64e181aa7c4a 100644
--- a/files/image_config/logrotate/logrotateOverride.conf
+++ b/files/image_config/logrotate/logrotateOverride.conf
@@ -1,2 +1,6 @@
[Unit]
-Requires=logrotate-config.service
\ No newline at end of file
+Requires=logrotate-config.service
+
+[Service]
+ExecStart=
+ExecStart=/usr/sbin/logrotate --state /dev/shm/logrotate/status /etc/logrotate.conf
diff --git a/files/image_config/monit/monitrc b/files/image_config/monit/monitrc
index 74068f12d3f8..e3b252fcea75 100644
--- a/files/image_config/monit/monitrc
+++ b/files/image_config/monit/monitrc
@@ -38,7 +38,7 @@
## default the file is placed in $HOME/.monit.id.
#
# set idfile /var/.monit.id
- set idfile /var/lib/monit/id
+ set idfile /dev/shm/monit/id
#
## Set the location of the Monit state file which saves monitoring states
## on each cycle. By default the file is placed in $HOME/.monit.state. If
@@ -46,7 +46,7 @@
## the monitoring state across reboots. If it is on temporary filesystem, the
## state will be lost on reboot which may be convenient in some situations.
#
- set statefile /var/lib/monit/state
+ set statefile /dev/shm/monit/state
#
#
@@ -91,7 +91,7 @@
## available in the back end filesystem).
#
set eventqueue
- basedir /var/lib/monit/events # set the base directory where events will be stored
+ basedir /dev/shm/monit/events # set the base directory where events will be stored
slots 100 # optionally limit the queue size
#
#
diff --git a/files/image_config/watchdog-control/watchdog-control.sh b/files/image_config/watchdog-control/watchdog-control.sh
index 892039964620..f01b21d7e695 100755
--- a/files/image_config/watchdog-control/watchdog-control.sh
+++ b/files/image_config/watchdog-control/watchdog-control.sh
@@ -22,6 +22,9 @@ function getBootType()
*SONIC_BOOT_TYPE=fastfast*)
TYPE='fastfast'
;;
+ *SONIC_BOOT_TYPE=express*)
+ TYPE='express'
+ ;;
*SONIC_BOOT_TYPE=fast*|*fast-reboot*)
TYPE='fast'
;;
diff --git a/files/initramfs-tools/union-mount.j2 b/files/initramfs-tools/union-mount.j2
index fccd21f415ef..8f8abb8f6af5 100644
--- a/files/initramfs-tools/union-mount.j2
+++ b/files/initramfs-tools/union-mount.j2
@@ -212,6 +212,9 @@ mkdir -p ${rootmnt}/boot
mkdir -p ${rootmnt}/host/$image_dir/boot
mount --bind ${rootmnt}/host/$image_dir/boot ${rootmnt}/boot
+## Mount the /tmp directory as tmpfs
+mount -t tmpfs -o rw,nosuid,nodev,size=25% tmpfs ${rootmnt}/tmp
+
## Mount loop device or tmpfs for /var/log
if $logs_inram; then
# NOTE: some platforms, when reaching initramfs stage, have a small
diff --git a/files/scripts/bmp.sh b/files/scripts/bmp.sh
new file mode 100755
index 000000000000..8229fd8ece26
--- /dev/null
+++ b/files/scripts/bmp.sh
@@ -0,0 +1,105 @@
+#!/bin/bash
+
+function debug()
+{
+ /usr/bin/logger $1
+}
+
+function check_warm_boot()
+{
+ SYSTEM_WARM_START=`$SONIC_DB_CLI STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable`
+ SERVICE_WARM_START=`$SONIC_DB_CLI STATE_DB hget "WARM_RESTART_ENABLE_TABLE|${SERVICE}" enable`
+ if [[ x"$SYSTEM_WARM_START" == x"true" ]] || [[ x"$SERVICE_WARM_START" == x"true" ]]; then
+ WARM_BOOT="true"
+ else
+ WARM_BOOT="false"
+ fi
+}
+
+function check_fast_boot ()
+{
+ SYSTEM_FAST_REBOOT=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable`
+ if [[ x"${SYSTEM_FAST_REBOOT}" == x"true" ]]; then
+ FAST_BOOT="true"
+ else
+ FAST_BOOT="false"
+ fi
+}
+
+function check_redundant_type()
+{
+ DEVICE_SUBTYPE=`$SONIC_DB_CLI CONFIG_DB hget "DEVICE_METADATA|localhost" subtype`
+ if [[ x"$DEVICE_SUBTYPE" == x"DualToR" ]]; then
+ MUX_CONFIG=`show muxcable config`
+ if [[ $MUX_CONFIG =~ .*active-active.* ]]; then
+ ACTIVE_ACTIVE="true"
+ else
+ ACTIVE_ACTIVE="false"
+ fi
+ else
+ ACTIVE_ACTIVE="false"
+ fi
+ CONFIG_KNOB=`$SONIC_DB_CLI CONFIG_DB hget "MUX_LINKMGR|SERVICE_MGMT" kill_radv`
+ if [[ x"$CONFIG_KNOB" == x"False" ]]; then
+ ACTIVE_ACTIVE='false'
+ fi
+ debug "DEVICE_SUBTYPE: ${DEVICE_SUBTYPE}, CONFIG_KNOB: ${CONFIG_KNOB}"
+}
+
+start() {
+ debug "Starting ${SERVICE}$DEV service..."
+
+ # start service docker
+ /usr/bin/${SERVICE}.sh start $DEV
+ debug "Started ${SERVICE}$DEV service..."
+}
+
+wait() {
+ /usr/bin/${SERVICE}.sh wait $DEV
+}
+
+stop() {
+ debug "Stopping ${SERVICE}$DEV service..."
+
+ check_warm_boot
+ check_fast_boot
+ check_redundant_type
+ debug "Warm boot flag: ${SERVICE}$DEV ${WARM_BOOT}."
+ debug "Fast boot flag: ${SERVICE}$DEV ${FAST_BOOT}."
+
+ # For WARM/FAST boot do not perform service stop
+ if [[ x"$WARM_BOOT" != x"true" ]] && [[ x"$FAST_BOOT" != x"true" ]]; then
+ if [[ x"$SERVICE" == x"radv" ]] && [[ x"$ACTIVE_ACTIVE" == x"true" ]]; then
+ debug "Killing Docker ${SERVICE}${DEV} for active-active dualtor device..."
+ /usr/bin/${SERVICE}.sh kill $DEV
+ else
+ /usr/bin/${SERVICE}.sh stop $DEV
+ debug "Stopped ${SERVICE}$DEV service..."
+ fi
+ else
+ debug "Killing Docker ${SERVICE}${DEV}..."
+ /usr/bin/${SERVICE}.sh kill $DEV
+ fi
+}
+
+DEV=$2
+
+SCRIPT_NAME=$(basename -- "$0")
+SERVICE="${SCRIPT_NAME%.*}"
+NAMESPACE_PREFIX="asic"
+if [[ "$DEV" && "$DEV" != *"dpu"* ]]; then
+ NET_NS="$NAMESPACE_PREFIX$DEV" #name of the network namespace
+ SONIC_DB_CLI="sonic-db-cli -n $NET_NS"
+else
+ SONIC_DB_CLI="sonic-db-cli"
+fi
+
+case "$1" in
+ start|wait|stop)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {start|wait|stop}"
+ exit 1
+ ;;
+esac
diff --git a/files/scripts/sonic-dpu-mgmt-traffic.sh b/files/scripts/sonic-dpu-mgmt-traffic.sh
index 71e6ed29b32b..014d722537f1 100755
--- a/files/scripts/sonic-dpu-mgmt-traffic.sh
+++ b/files/scripts/sonic-dpu-mgmt-traffic.sh
@@ -4,12 +4,22 @@
command_name=$0
usage(){
- echo "Syntax: $command_name -e|--enable -d|--disable"
+ echo "Syntax: $command_name inbound/outbound -e|--enable -d|--disable [--dpus,--ports,--nofwctrl]"
echo "Arguments:"
- echo "-e Enable dpu management traffic forwarding"
- echo "-d Disable dpu management traffic forwarding"
+ echo "inbound Control DPU Inbound traffic forwarding"
+ echo "outbound Control DPU Outbound traffic forwarding"
+ echo "-e Enable dpu management traffic forwarding in a specific direction"
+ echo "-d Disable dpu management traffic forwarding in a specific direction"
+ echo "--dpus Selection of dpus for which the inbound traffic has to be controlled (all can be specified)"
+ echo "--ports Selection of ports for which the inbound traffic has to be controlled"
+ echo "--nofwctrl Disable changing the general ipv4 forwarding (Could be useful if inbound is enabled and outbound is disabled)"
}
+dpu_l=()
+declare -A midplane_dict
+declare -A midplane_ip_dict
+fw_change="enable"
+
add_rem_valid_iptable(){
local op=$1
local table=$2
@@ -39,20 +49,148 @@ control_forwarding(){
if [ "$op" = "enable" ]; then
value=1
fi
- echo $value > /proc/sys/net/ipv4/ip_forward
- echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding
+ if [ "$fw_change" = "enable" ]; then
+ echo $value > /proc/sys/net/ipv4/ip_forward
+ echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding
+ fi
+}
+
+validate_dpus(){
+ local provided_list=("$@")
+ for item1 in "${provided_list[@]}"; do
+ local found=0
+ for item2 in "${dpu_l[@]}"; do
+ if [[ "$item1" = "$item2" ]]; then
+ found=1
+ break
+ fi
+ done
+ if [[ $found -eq 0 ]]; then
+ echo "$item1 is not detected! Please provide proper dpu names list!"
+ exit 1
+ fi
+ done
+}
+
+general_validation(){
+ if [ -z "$direction" ]; then
+ echo "Please provide the direction argument (inbound or outboud)"
+ usage
+ exit 1
+ fi
+
+ if [ -z "$operation" ]; then
+ echo "Please provide the operation option (-e or -d)"
+ usage
+ exit 1
+ fi
+}
+
+port_use_validation(){
+ local port_l=("$@")
+ for port in "${port_l[@]}"; do
+ if (( port >= 0 && port <= 1023 )); then
+ echo "Provided port $port in range 0-1023, Please execute with a different port"
+ exit 1
+ fi
+ if netstat -tuln | awk '{print $4}' | grep -q ":$port\$"; then
+ echo "Provided port $port is in use by another process, Please execute with a different port"
+ exit 1
+ fi
+ done
+}
+
+
+
+
+inbound_validation(){
+ #DPU Validation
+ while IFS= read -r line; do
+ dpu_name=$( echo "$line" | sed 's/.*|//;s/"//g')
+ dpu_l+=("$dpu_name")
+ done < <(redis-cli -n 4 keys DPUS*)
+ len1=${#dpu_name[@]}
+ if [ "$len1" -eq 0 ]; then
+ echo "No dpus detected on device!"
+ exit 1
+ fi
+ sorted_dpu_l=($(for item in "${dpu_l[@]}"; do
+ echo "$item"
+ done | sort))
+ if [ -z "$arg_dpu_names" ]; then
+ echo "No DPUs provided!"
+ usage
+ exit 1
+ else
+ if [ "$arg_dpu_names" = "all" ]; then
+ sel_dpu_names=("${sorted_dpu_l[@]}")
+ echo "${#sorted_dpu_l[@]} DPUs detected:"
+ echo "${sorted_dpu_l[@]}"
+ else
+ IFS=',' read -ra sel_dpu_names <<< "$arg_dpu_names"
+ validate_dpus ${sel_dpu_names[@]}
+ fi
+ fi
+ #Port validation
+ IFS=',' read -ra provided_ports <<< "$arg_port_list"
+ len1=${#sel_dpu_names[@]}
+ len2=${#provided_ports[@]}
+ if [ "$len1" -ne "$len2" ]; then
+ echo "Length of ${sel_dpu_names[@]} does not match provided port length ${provided_ports[@]}"
+ usage
+ exit 1
+ fi
+ port_use_validation ${provided_ports[@]}
+ for dpu in "${sel_dpu_names[@]}"; do
+ midplane_int_name=$(redis-cli -n 4 hget "DPUS|$dpu" "midplane_interface")
+ if [ -z "$midplane_int_name" ]; then
+ echo "Cannot obtain midplane interface for $dpu"
+ exit 1
+ fi
+ midplane_dict["$dpu"]="$midplane_int_name"
+ done
+
+ for dpu in "${!midplane_dict[@]}"; do
+ midplane_ip=$(redis-cli -n 4 hget "DHCP_SERVER_IPV4_PORT|$midplane_iface|${midplane_dict[$dpu]}" "ips@")
+ if [ -z "$midplane_ip" ]; then
+ echo "Cannot obtain midplane ip for $dpu"
+ exit 1
+ fi
+ midplane_ip_dict["$dpu"]="$midplane_ip"
+ done
}
-ctrl_dpu_forwarding(){
+# Outbound Traffice forwarding control function
+ctrl_dpu_ob_forwarding(){
local op=$1
control_forwarding $op
add_rem_valid_iptable $op nat POSTROUTING -o ${mgmt_iface} -j MASQUERADE
add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT
add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -j ACCEPT
if [ "$op" = "enable" ]; then
- echo "Enabled DPU management traffic Forwarding"
+ echo "Enabled DPU management outbound traffic Forwarding"
+ else
+ echo "Disabled DPU management outbound traffic Forwarding"
+ fi
+}
+
+ctrl_dpu_ib_forwarding(){
+ local op=$1
+ local dest_port=22
+ control_forwarding $op
+ add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -p tcp -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT
+ add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -p tcp --dport $dest_port -j ACCEPT
+ for index in ${!sel_dpu_names[@]}; do
+ dpu_name="${sel_dpu_names[$index]}"
+ dpu_midplane_ip="${midplane_ip_dict[$dpu_name]}"
+ switch_port="${provided_ports[$index]}"
+ add_rem_valid_iptable $op nat POSTROUTING -p tcp -d $dpu_midplane_ip --dport $dest_port -j MASQUERADE
+ add_rem_valid_iptable $op nat PREROUTING -i ${mgmt_iface} -p tcp --dport $switch_port -j DNAT --to-destination $dpu_midplane_ip:$dest_port
+ done
+ if [ "$op" = "enable" ]; then
+ echo "Enabled DPU management inbound traffic Forwarding"
else
- echo "Disabled DPU management traffic Forwarding"
+ echo "Disabled DPU management inbound traffic Forwarding"
fi
}
@@ -70,16 +208,81 @@ if ! ifconfig "$midplane_iface" > /dev/null 2>&1; then
exit 1
fi
+operation=""
+direction=""
+
+invalid_arg(){
+ echo "Invalid arguments $1"
+ usage
+ exit 1
+}
+
+
case $1 in
- -e|--enable)
- ctrl_dpu_forwarding enable
- ;;
- -d|--disable)
- ctrl_dpu_forwarding disable
- ;;
+ inbound)
+ direction="inbound"
+ shift
+ while [ "$1" != "--" ] && [ -n "$1" ]; do
+ case $1 in
+ -e|--enable)
+ operation="enable"
+ ;;
+ -d|--disable)
+ operation="disable"
+ ;;
+ --dpus)
+ shift;
+ arg_dpu_names=$1
+ ;;
+ --ports)
+ shift;
+ arg_port_list=$1
+ ;;
+ --nofwctrl)
+ fw_change="disable"
+ ;;
+ *)
+ invalid_arg $1
+ ;;
+ esac
+ shift
+ done
+ ;;
+ outbound)
+ direction="outbound"
+ shift
+ while [ "$1" != "--" ] && [ -n "$1" ]; do
+ case $1 in
+ -e|--enable)
+ operation="enable"
+ ;;
+ -d|--disable)
+ operation="disable"
+ ;;
+ --nofwctrl)
+ fw_change="disable"
+ ;;
+ *)
+ invalid_arg $1
+ ;;
+ esac
+ shift
+ done
+ ;;
*)
- echo "Incorrect Usage!"
- usage
- exit 1
+ invalid_arg $1
+ ;;
+esac
+
+general_validation
+
+
+case $direction in
+ outbound)
+ ctrl_dpu_ob_forwarding $operation
+ ;;
+ inbound)
+ inbound_validation
+ ctrl_dpu_ib_forwarding $operation
;;
esac
diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index 35815fe4dfb9..f081cf6de8e4 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -233,6 +233,7 @@ function clean_up_chassis_db_tables()
local lagid = redis.call('HGET', 'SYSTEM_LAG_ID_TABLE', lagname)
redis.call('SREM', 'SYSTEM_LAG_ID_SET', lagid)
redis.call('HDEL', 'SYSTEM_LAG_ID_TABLE', lagname)
+ redis.call('rpush', 'SYSTEM_LAG_IDS_FREE_LIST', lagid)
nsl = nsl + 1
end
end
diff --git a/files/scripts/syncd_common.sh b/files/scripts/syncd_common.sh
index 826cdd731ba6..d3a8b0df7c42 100755
--- a/files/scripts/syncd_common.sh
+++ b/files/scripts/syncd_common.sh
@@ -81,6 +81,9 @@ function getBootType()
*SONIC_BOOT_TYPE=fastfast*)
TYPE='fastfast'
;;
+ *SONIC_BOOT_TYPE=express*)
+ TYPE='express'
+ ;;
*SONIC_BOOT_TYPE=fast*|*fast-reboot*)
# check that the key exists
SYSTEM_FAST_REBOOT=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable`
diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index ed942d617ddd..2e2acb67f9ea 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a
+Subproject commit 2e2acb67f9ea20366f5d26c1c61b6952810d6d88
diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
index 0416007a2c25..88c04a3136d8 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
@@ -3,13 +3,14 @@
DOCKER_SYNCD_BRCM_DNX_RPC = docker-syncd-brcm-dnx-rpc.gz
DOCKER_SYNCD_DNX_BASE = docker-syncd-brcm-dnx.gz
$(DOCKER_SYNCD_BRCM_DNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-dnx-rpc
-$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
+$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC)
ifeq ($(INSTALL_DEBUG_TOOLS), y)
$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
$(LIBSWSSCOMMON_DBG) \
$(LIBSAIMETADATA_DBG) \
$(LIBSAIREDIS_DBG)
endif
+$(DOCKER_SYNCD_BRCM_DNX_RPC)_PYTHON_WHEELS += $(PTF_PY3)
$(DOCKER_SYNCD_BRCM_DNX_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
$(DOCKER_SYNCD_BRCM_DNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_DNX_BASE)
SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_DNX_RPC)
diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2
index ca85d74083ea..b5ed2b720e93 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2
@@ -1,58 +1,71 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
FROM docker-syncd-brcm-dnx-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
## Make apt-get non-interactive
ENV DEBIAN_FRONTEND=noninteractive
-COPY \
-{% for deb in docker_syncd_brcm_dnx_rpc_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
RUN apt-get purge -y syncd
## Pre-install the fundamental packages
RUN apt-get update \
&& apt-get -y install \
net-tools \
- python3-pip \
- python-setuptools \
+ python3-pip \
+ python3-dev \
+ python-is-python3 \
+ python3-scapy \
build-essential \
libssl-dev \
libffi-dev \
- python-dev \
wget \
cmake \
- libqt5core5a \
- libqt5network5 \
- libboost-atomic1.74.0
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_brcm_dnx_rpc_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0 \
- && mkdir -p build \
- && cmake . \
- && make install \
- && ldconfig \
- && cd .. \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz \
- && pip2 install cffi==1.7.0 \
- && pip2 install --upgrade cffi==1.7.0 \
- && pip2 install wheel \
- && pip2 install nnpy \
+ libnanomsg5 \
+ libnanomsg-dev
+
+{% if docker_syncd_brcm_dnx_rpc_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_syncd_brcm_dnx_rpc_debs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_dnx_rpc_pydebs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("python-debs/", docker_syncd_brcm_dnx_rpc_pydebs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_dnx_rpc_debs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_dnx_rpc_debs.split(' ')) }}
+{% endif %}
+
+{% if docker_syncd_brcm_dnx_rpc_pydebs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_dnx_rpc_pydebs.split(' ')) }}
+{% endif %}
+
+RUN pip3 install cffi==1.16.0 \
+ && pip3 install wheel \
+ && pip3 install nnpy \
&& mkdir -p /opt \
&& cd /opt \
&& wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
- && mkdir ptf && cd ptf && wget https://raw.githubusercontent.com/p4lang/ptf/master/src/ptf/afpacket.py && touch __init__.py \
&& apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \
&& rm -rf /root/deps
COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
+## Clean up
+RUN apt-get -y purge \
+ cmake \
+ libssl-dev \
+ libffi-dev \
+ python3-dev \
+ python3-pip \
+ libthrift-dev \
+ build-essential
+
+RUN apt-get clean -y && \
+ apt-get autoclean -y && \
+ apt-get autoremove -y && \
+ rm -rf /debs
+
ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/broadcom/docker-syncd-brcm-dnx.mk b/platform/broadcom/docker-syncd-brcm-dnx.mk
index 4276e1125445..febb19c49315 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx.mk
@@ -24,7 +24,7 @@ endif
$(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(SYNCD)
$(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(BRCM_DNX_SAI)
-$(DOCKER_SYNCD_DNX_BASE)_FILES += $(DSSERVE) $(BCMCMD)
+$(DOCKER_SYNCD_DNX_BASE)_FILES += $(DSSERVE) $(BCMCMD) $(RDB-CLI)
ifeq ($(INSTALL_DEBUG_TOOLS), y)
$(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
diff --git a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
index 160a1380140f..6bceef873d59 100755
--- a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
@@ -23,8 +23,8 @@ RUN apt-get install -yf kmod
## BRCM uses ethtool to set host interface speed
RUN apt-get install -y ethtool
-COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "/usr/bin/"]
-RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd
+COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"]
+RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd /usr/bin/rdb-cli
COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk
index 929642331598..98e443a9f130 100644
--- a/platform/broadcom/docker-syncd-brcm-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-rpc.mk
@@ -2,13 +2,14 @@
DOCKER_SYNCD_BRCM_RPC = docker-syncd-brcm-rpc.gz
$(DOCKER_SYNCD_BRCM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-rpc
-$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
+$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC)
ifeq ($(INSTALL_DEBUG_TOOLS), y)
$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
$(LIBSWSSCOMMON_DBG) \
$(LIBSAIMETADATA_DBG) \
$(LIBSAIREDIS_DBG)
endif
+$(DOCKER_SYNCD_BRCM_RPC)_PYTHON_WHEELS += $(PTF_PY3)
$(DOCKER_SYNCD_BRCM_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
$(DOCKER_SYNCD_BRCM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_RPC)
diff --git a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2
index 3517b037a40a..82e2e510ea98 100644
--- a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2
@@ -1,51 +1,50 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
FROM docker-syncd-brcm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
## Make apt-get non-interactive
ENV DEBIAN_FRONTEND=noninteractive
-COPY \
-{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
RUN apt-get purge -y syncd
## Pre-install the fundamental packages
RUN apt-get update \
&& apt-get -y install \
net-tools \
- python3-pip \
- python-setuptools \
+ python3-pip \
+ python3-dev \
+ python-is-python3 \
+ python3-scapy \
build-essential \
libssl-dev \
libffi-dev \
- python-dev \
wget \
cmake \
- libqt5core5a \
- libqt5network5 \
- libboost-atomic1.74.0
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0 \
- && mkdir -p build \
- && cmake . \
- && make install \
- && ldconfig \
- && cd .. \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz \
- && pip2 install cffi==1.7.0 \
- && pip2 install --upgrade cffi==1.7.0 \
- && pip2 install wheel \
- && pip2 install nnpy \
+ libnanomsg5 \
+ libnanomsg-dev
+
+{% if docker_syncd_brcm_rpc_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_syncd_brcm_rpc_debs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_rpc_pydebs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("python-debs/", docker_syncd_brcm_rpc_pydebs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_rpc_debs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_rpc_debs.split(' ')) }}
+{% endif %}
+
+{% if docker_syncd_brcm_rpc_pydebs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_rpc_pydebs.split(' ')) }}
+{% endif %}
+
+RUN pip3 install cffi==1.16.0 \
+ && pip3 install wheel \
+ && pip3 install nnpy \
&& mkdir -p /opt \
&& cd /opt \
&& wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
@@ -54,4 +53,19 @@ RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
+## Clean up
+RUN apt-get -y purge \
+ cmake \
+ libssl-dev \
+ libffi-dev \
+ python3-dev \
+ python3-pip \
+ libthrift-dev \
+ build-essential
+
+RUN apt-get clean -y && \
+ apt-get autoclean -y && \
+ apt-get autoremove -y && \
+ rm -rf /debs
+
ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/broadcom/libsaithrift-dev.mk b/platform/broadcom/libsaithrift-dev.mk
index ec4e1f6e6da6..037f12f03501 100644
--- a/platform/broadcom/libsaithrift-dev.mk
+++ b/platform/broadcom/libsaithrift-dev.mk
@@ -4,14 +4,8 @@ SAI_VER = 0.9.4
LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_amd64.deb
$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
-#Support two different versions of thrift
ifeq ($(SAITHRIFT_V2),y)
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT_0_14_1) $(LIBTHRIFT_0_14_1_DEV) $(PYTHON3_THRIFT_0_14_1) $(THRIFT_0_14_1_COMPILER)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT_0_14_1)
$(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFTV2=true SAITHRIFT_VER=v2
-else
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT)
endif
$(LIBSAITHRIFT_DEV)_DEPENDS += $(BRCM_XGS_SAI) $(BRCM_XGS_SAI_DEV)
$(LIBSAITHRIFT_DEV)_RDEPENDS += $(BRCM_XGS_SAI)
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index b3951f869530..dca377930acf 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -100,6 +100,10 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \
+ $(MICAS_M2_W6940_128QC_PLATFORM_MODULE) \
+ $(MICAS_M2_W6930_64QC_PLATFORM_MODULE) \
+ $(MICAS_M2_W6940_64OC_PLATFORM_MODULE) \
+ $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \
$(MICAS_M2_W6510_32C_PLATFORM_MODULE)
$(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index 729674eb7517..7e70b5c670dc 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -25,6 +25,38 @@ MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc
$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
+## M2-W6940-128QC
+MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6940_128QC_PLATFORM_MODULE = platform-modules-micas-m2-w6940-128qc_$(MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6940_128QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-128qc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_128QC_PLATFORM_MODULE)))
+
+## M2-W6930-64QC
+MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6930_64QC_PLATFORM_MODULE = platform-modules-micas-m2-w6930-64qc_$(MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6930-64qc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)))
+
+## M2-W6940-64OC
+MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6940_64OC_PLATFORM_MODULE = platform-modules-micas-m2-w6940-64oc_$(MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6940_64OC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-64oc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_64OC_PLATFORM_MODULE)))
+
+## M2-W6920-32QC2X
+MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6920_32QC2X_PLATFORM_MODULE = platform-modules-micas-m2-w6920-32qc2x_$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6920-32qc2x-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE)))
+
## M2-W6510-32C
MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION = 1.0
export MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION
diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index 4070f7be06ae..e3f0e46ccccc 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -56,5 +56,7 @@ $(SYNCD)_DEPENDS += $(BRCM_XGS_SAI) $(BRCM_XGS_SAI_DEV)
$(SYNCD)_UNINSTALLS += $(BRCM_XGS_SAI_DEV) $(BRCM_XGS_SAI)
ifeq ($(ENABLE_SYNCD_RPC),y)
+# Remove the libthrift_0.11.0 dependency injected by rules/syncd.mk
+$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
endif
diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index 05ca22e7319d..53f0768a15e2 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
# SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.9.1
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.13.1-1
BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
$(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 85cdd54e5622..4127bb58d6b0 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,6 +1,6 @@
-LIBSAIBCM_XGS_VERSION = 11.2.13.1
-LIBSAIBCM_DNX_VERSION = 11.2.9.1
-LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.0_GA
+LIBSAIBCM_XGS_VERSION = 11.2.16.2
+LIBSAIBCM_DNX_VERSION = 11.2.13.1-1
+LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.16.2
LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index ed942d617ddd..2e2acb67f9ea 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a
+Subproject commit 2e2acb67f9ea20366f5d26c1c61b6952810d6d88
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index c6f9acb4a27e..3df20d5b4be0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -16,8 +16,22 @@ Package: platform-modules-micas-m2-w6520-24dc8qc
Architecture: amd64
Description: kernel modules for platform devices such as fan, led, sfp
-Package: platform-modules-micas-m2-w6510-32c
+Package: platform-modules-micas-m2-w6940-128qc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6930-64qc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6940-64oc
Architecture: amd64
Description: kernel modules for platform devices such as fan, led, sfp
+Package: platform-modules-micas-m2-w6920-32qc2x
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+Package: platform-modules-micas-m2-w6510-32c
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install
new file mode 100644
index 000000000000..a719c1aecba0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install
@@ -0,0 +1 @@
+m2-w6920-32qc2x/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6920-32qc2x-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+ depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
new file mode 100644
index 000000000000..f6e2060d2d11
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
@@ -0,0 +1 @@
+m2-w6930-64qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6930-64qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+ depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install
new file mode 100644
index 000000000000..3247b8cdd083
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install
@@ -0,0 +1 @@
+m2-w6940-128qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-128qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+ depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install
new file mode 100644
index 000000000000..49a8fe1026f3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install
@@ -0,0 +1 @@
+m2-w6940-64oc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-64oc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+ depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index 5bd19a8ee8f1..66e05fe8104c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -3,6 +3,10 @@ currentdir = $(shell pwd)
MODULE_DIRS := m2-w6510-48v8c
MODULE_DIRS += m2-w6510-48gt4v
MODULE_DIRS += m2-w6520-24dc8qc
+MODULE_DIRS += m2-w6940-128qc
+MODULE_DIRS += m2-w6930-64qc
+MODULE_DIRS += m2-w6940-64oc
+MODULE_DIRS += m2-w6920-32qc2x
MODULE_DIRS += m2-w6510-32c
export MODULE_DIRS
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile
new file mode 100755
index 000000000000..a0c262841c51
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile
@@ -0,0 +1,28 @@
+PWD = $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+
+all:
+ $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+ @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+ cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+ @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+ cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR)
+ @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+ @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+ @if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+ @if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+ @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+ @if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi
+clean:
+ rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+ rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+ rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+ rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
new file mode 100644
index 000000000000..6eee7b5df129
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
@@ -0,0 +1,1443 @@
+
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+ "hal_fanctrl": 1,
+ "hal_ledctrl": 1,
+ "avscontrol": 0,
+ "dev_monitor": 1,
+ "reboot_cause": 1,
+ "pmon_syslog": 1,
+ "sff_temp_polling": 1,
+ "generate_airflow": 1,
+ "set_eth_mac": 1,
+ "drv_update": 1,
+}
+
+MANUINFO_CONF = {
+ "bios": {
+ "key": "BIOS",
+ "head": True,
+ "next": "onie"
+ },
+ "bios_vendor": {
+ "parent": "bios",
+ "key": "Vendor",
+ "cmd": "dmidecode -t 0 |grep Vendor",
+ "pattern": r".*Vendor",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "bios_version": {
+ "parent": "bios",
+ "key": "Version",
+ "cmd": "dmidecode -t 0 |grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "bios_date": {
+ "parent": "bios",
+ "key": "Release Date",
+ "cmd": "dmidecode -t 0 |grep Release",
+ "pattern": r".*Release Date",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "onie": {
+ "key": "ONIE",
+ "next": "cpu"
+ },
+ "onie_date": {
+ "parent": "onie",
+ "key": "Build Date",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_build_date",
+ "separator": "=",
+ "arrt_index": 1,
+ },
+ "onie_version": {
+ "parent": "onie",
+ "key": "Version",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_version",
+ "separator": "=",
+ "arrt_index": 2,
+ },
+
+ "cpu": {
+ "key": "CPU",
+ "next": "cpld"
+ },
+ "cpu_vendor": {
+ "parent": "cpu",
+ "key": "Vendor",
+ "cmd": "dmidecode --type processor |grep Manufacturer",
+ "pattern": r".*Manufacturer",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "cpu_model": {
+ "parent": "cpu",
+ "key": "Device Model",
+ "cmd": "dmidecode --type processor | grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "cpu_core": {
+ "parent": "cpu",
+ "key": "Core Count",
+ "cmd": "dmidecode --type processor | grep \"Core Count\"",
+ "pattern": r".*Core Count",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "cpu_thread": {
+ "parent": "cpu",
+ "key": "Thread Count",
+ "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+ "pattern": r".*Thread Count",
+ "separator": ":",
+ "arrt_index": 4,
+ },
+ "cpld": {
+ "key": "CPLD",
+ "next": "psu"
+ },
+
+ "cpld1": {
+ "key": "CPLD1",
+ "parent": "cpld",
+ "arrt_index": 1,
+ },
+ "cpld1_model": {
+ "key": "Device Model",
+ "parent": "cpld1",
+ "config": "LCMXO3LF-1300C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld1_vender": {
+ "key": "Vendor",
+ "parent": "cpld1",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld1_desc": {
+ "key": "Description",
+ "parent": "cpld1",
+ "config": "CPU_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld1_version": {
+ "key": "Firmware Version",
+ "parent": "cpld1",
+ "reg": {
+ "loc": "/dev/port",
+ "offset": 0x700,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld2": {
+ "key": "CPLD2",
+ "parent": "cpld",
+ "arrt_index": 2,
+ },
+ "cpld2_model": {
+ "key": "Device Model",
+ "parent": "cpld2",
+ "config": "LCMXO3LF-2100C-5BG324C",
+ "arrt_index": 1,
+ },
+ "cpld2_vender": {
+ "key": "Vendor",
+ "parent": "cpld2",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld2_desc": {
+ "key": "Description",
+ "parent": "cpld2",
+ "config": "CTRL_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld2_version": {
+ "key": "Firmware Version",
+ "parent": "cpld2",
+ "reg": {
+ "loc": "/dev/port",
+ "offset": 0x900,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld3": {
+ "key": "CPLD3",
+ "parent": "cpld",
+ "arrt_index": 3,
+ },
+ "cpld3_model": {
+ "key": "Device Model",
+ "parent": "cpld3",
+ "config": "LCMXO3LF_2100C_5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld3_vender": {
+ "key": "Vendor",
+ "parent": "cpld3",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld3_desc": {
+ "key": "Description",
+ "parent": "cpld3",
+ "config": "MAC_CPLDA",
+ "arrt_index": 3,
+ },
+ "cpld3_version": {
+ "key": "Firmware Version",
+ "parent": "cpld3",
+ "i2c": {
+ "bus": "26",
+ "loc": "0x1d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld4": {
+ "key": "CPLD4",
+ "parent": "cpld",
+ "arrt_index": 4,
+ },
+ "cpld4_model": {
+ "key": "Device Model",
+ "parent": "cpld4",
+ "config": "LCMXO3LF_1300C_5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld4_vender": {
+ "key": "Vendor",
+ "parent": "cpld4",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld4_desc": {
+ "key": "Description",
+ "parent": "cpld4",
+ "config": "MAC_CPLDB",
+ "arrt_index": 3,
+ },
+ "cpld4_version": {
+ "key": "Firmware Version",
+ "parent": "cpld4",
+ "i2c": {
+ "bus": "26",
+ "loc": "0x2d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld5": {
+ "key": "CPLD5",
+ "parent": "cpld",
+ "arrt_index": 5,
+ },
+ "cpld5_model": {
+ "key": "Device Model",
+ "parent": "cpld5",
+ "config": "LCMXO3LF_1300C_5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld5_vender": {
+ "key": "Vendor",
+ "parent": "cpld5",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld5_desc": {
+ "key": "Description",
+ "parent": "cpld5",
+ "config": "FAN_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld5_version": {
+ "key": "Firmware Version",
+ "parent": "cpld5",
+ "i2c": {
+ "bus": "28",
+ "loc": "0x3d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "psu": {
+ "key": "PSU",
+ "next": "fan"
+ },
+
+ "psu1": {
+ "parent": "psu",
+ "key": "PSU1",
+ "arrt_index": 1,
+ },
+ "psu1_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu1",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu1",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu1_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu1",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "psu2": {
+ "parent": "psu",
+ "key": "PSU2",
+ "arrt_index": 2,
+ },
+ "psu2_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu2",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu2",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu2_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu2",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan": {
+ "key": "FAN",
+ "next": "fpga"
+ },
+
+ "fan1": {
+ "key": "FAN1",
+ "parent": "fan",
+ "arrt_index": 1,
+ },
+ "fan1_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan1",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan1",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan1_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan1",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan2": {
+ "key": "FAN2",
+ "parent": "fan",
+ "arrt_index": 2,
+ },
+ "fan2_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan2",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan2",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan2_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan2",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan3": {
+ "key": "FAN3",
+ "parent": "fan",
+ "arrt_index": 3,
+ },
+ "fan3_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan3",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan3",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan3_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan3",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan4": {
+ "key": "FAN4",
+ "parent": "fan",
+ "arrt_index": 4,
+ },
+ "fan4_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan4",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan4",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan4_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan4",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan5": {
+ "key": "FAN5",
+ "parent": "fan",
+ "arrt_index": 5,
+ },
+ "fan5_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan5",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan5",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan5_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan5",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan6": {
+ "key": "FAN6",
+ "parent": "fan",
+ "arrt_index": 6,
+ },
+ "fan6_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan6",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan6",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan6_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan6",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fpga": {
+ "key": "FPGA",
+ },
+
+ "fpga1": {
+ "key": "FPGA1",
+ "parent": "fpga",
+ "arrt_index": 1,
+ },
+ "fpga1_model": {
+ "parent": "fpga1",
+ "config": "XC7A50T-2FGG484C",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "fpga1_vender": {
+ "parent": "fpga1",
+ "config": "XILINX",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "fpga1_desc": {
+ "key": "Description",
+ "parent": "fpga1",
+ "config": "MAC_FPGA",
+ "arrt_index": 3,
+ },
+ "fpga1_hw_version": {
+ "parent": "fpga1",
+ "config": "NA",
+ "key": "Hardware Version",
+ "arrt_index": 4,
+ },
+ "fpga1_fw_version": {
+ "parent": "fpga1",
+ "devfile": {
+ "loc": "/dev/fpga0",
+ "offset": 0,
+ "len": 4,
+ "bit_width": 4
+ },
+ "key": "Firmware Version",
+ "arrt_index": 5,
+ },
+ "fpga1_date": {
+ "parent": "fpga1",
+ "pci": {
+ "bus": 4,
+ "slot": 0,
+ "fn": 0,
+ "bar": 0,
+ "offset": 4
+ },
+ "key": "Build Date",
+ "arrt_index": 6,
+ },
+
+ "others": {
+ "key": "OTHERS",
+ },
+ "5387": {
+ "parent": "others",
+ "key": "CPU-BMC-SWITCH",
+ "arrt_index" : 1,
+ },
+ "5387_model": {
+ "parent": "5387",
+ "config": "BCM53134O",
+ "key": "Device Model",
+ "arrt_index" : 1,
+ },
+ "5387_vendor": {
+ "parent": "5387",
+ "config": "Broadcom",
+ "key": "Vendor",
+ "arrt_index" : 2,
+ },
+ "5387_hw_version": {
+ "parent": "5387",
+ "key": "Hardware Version",
+ "func": {
+ "funcname": "get_bcm5387_version",
+ "params" : {
+ "before": [
+ {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/export"},
+ {"gettype": "cmd", "cmd": "echo out > /sys/class/gpio/gpio99/direction"},
+ {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio99/value"},
+ # select update 5387
+ {"gettype": "io", "io_addr": 0x991, "value": 0x6},
+ {"gettype": "io", "io_addr": 0x990, "value": 0x1},
+ {"gettype": "io", "io_addr": 0x9a6, "value": 0x2},
+ {"gettype": "io", "io_addr": 0x9d4, "value": 0x0},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000"},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0"},
+ ],
+ "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
+ "after": [
+ {"gettype": "cmd", "cmd": "echo 1 > /sys/class/gpio/gpio99/value"},
+ {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/unexport"},
+ ],
+ "finally": [
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"},
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"},
+ {"gettype": "io", "io_addr": 0x9d4, "value": 0xff},
+ {"gettype": "io", "io_addr": 0x9a6, "value": 0xff},
+ {"gettype": "io", "io_addr": 0x990, "value": 0xfc},
+ {"gettype": "io", "io_addr": 0x991, "value": 0xf8},
+ ],
+ },
+ },
+ "arrt_index" : 3,
+ },
+}
+
+PMON_SYSLOG_STATUS = {
+ "polling_time": 3,
+ "sffs": {
+ "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+ "nochangedmsgflag": 0,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 1,
+ "alias": {
+ "sff1": "Ethernet1",
+ "sff2": "Ethernet2",
+ "sff3": "Ethernet3",
+ "sff4": "Ethernet4",
+ "sff5": "Ethernet5",
+ "sff6": "Ethernet6",
+ "sff7": "Ethernet7",
+ "sff8": "Ethernet8",
+ "sff9": "Ethernet9",
+ "sff10": "Ethernet10",
+ "sff11": "Ethernet11",
+ "sff12": "Ethernet12",
+ "sff13": "Ethernet13",
+ "sff14": "Ethernet14",
+ "sff15": "Ethernet15",
+ "sff16": "Ethernet16",
+ "sff17": "Ethernet17",
+ "sff18": "Ethernet18",
+ "sff19": "Ethernet19",
+ "sff20": "Ethernet20",
+ "sff21": "Ethernet21",
+ "sff22": "Ethernet22",
+ "sff23": "Ethernet23",
+ "sff24": "Ethernet24",
+ "sff25": "Ethernet25",
+ "sff26": "Ethernet26",
+ "sff27": "Ethernet27",
+ "sff28": "Ethernet28",
+ "sff29": "Ethernet29",
+ "sff30": "Ethernet30",
+ "sff31": "Ethernet31",
+ "sff32": "Ethernet32",
+ }
+ },
+ "fans": {
+ "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+ {"path": "/sys/wb_plat/fan/%s/motor1/status", 'okval': 1},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "fan1": "FAN1",
+ "fan2": "FAN2",
+ "fan3": "FAN3",
+ "fan4": "FAN4",
+ "fan5": "FAN5",
+ "fan6": "FAN6"
+ }
+ },
+ "psus": {
+ "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+ {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "psu1": "PSU1",
+ "psu2": "PSU2"
+ }
+ }
+}
+
+##################### MAC Voltage adjust####################################
+
+MAC_DEFAULT_PARAM = [
+ {
+ "name": "mac_core", # AVS name
+ "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+ "default": 0x73, # default value, if rov value not in range
+ "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK
+ "cpld_avs": {"bus":26, "loc":0x2d, "offset":0x3f, "gettype":"i2c"},
+ "set_avs": {
+ "loc": "/sys/bus/i2c/devices/30-0040/avs0_vout_command","gettype": "sysfs","formula": None},
+ "mac_avs_param": {
+ 0x72:0x0e66 ,
+ 0x73:0x0e4c ,
+ 0x74:0x0e33 ,
+ 0x75:0x0e19 ,
+ 0x76:0x0e00 ,
+ 0x77:0x0de6 ,
+ 0x78:0x0dcc ,
+ 0x79:0x0db3 ,
+ 0x7a:0x0d99 ,
+ 0x7b:0x0d80 ,
+ 0x7c:0x0d66 ,
+ 0x7d:0x0d4c ,
+ 0x7e:0x0d33 ,
+ 0x7f:0x0d19 ,
+ 0x80:0x0d00 ,
+ 0x81:0x0ce6 ,
+ 0x82:0x0ccc ,
+ 0x83:0x0cb3 ,
+ 0x84:0x0c99 ,
+ 0x85:0x0c80 ,
+ 0x86:0x0c66 ,
+ 0x87:0x0c4c ,
+ 0x88:0x0c33 ,
+ 0x89:0x0c19 ,
+ 0x8A:0x0c00
+ }
+ }
+]
+
+
+DRIVERLISTS = [
+ {"name": "wb_gpio_c3000", "delay": 30},
+ {"name": "wb_gpio_c3000_device", "delay": 0},
+ {"name": "i2c_ismt", "delay": 0},
+ {"name": "i2c_i801", "delay": 0},
+ {"name": "i2c_dev", "delay": 0},
+ {"name": "i2c_algo_bit", "delay": 0},
+ {"name": "i2c_gpio", "delay": 0},
+ {"name": "i2c_mux", "delay": 0},
+ {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+ {"name": "mdio_bitbang", "delay": 0},
+ {"name": "mdio_gpio", "delay": 0},
+ {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+ {"name": "platform_common dfd_my_type=0x40c1", "delay":0},
+ {"name": "wb_fpga_pcie", "delay": 0},
+ {"name": "wb_pcie_dev", "delay": 0},
+ {"name": "wb_pcie_dev_device", "delay": 0},
+ {"name": "wb_lpc_drv", "delay": 0},
+ {"name": "wb_lpc_drv_device", "delay": 0},
+ {"name": "wb_io_dev", "delay": 0},
+ {"name": "wb_io_dev_device", "delay": 0},
+ {"name": "wb_i2c_dev", "delay": 0},
+ {"name": "wb_fpga_i2c_bus_drv", "delay": 0},
+ {"name": "wb_fpga_i2c_bus_device", "delay": 0},
+ {"name": "wb_fpga_pca954x_drv", "delay": 0},
+ {"name": "wb_fpga_pca954x_device", "delay": 0},
+ {"name": "wb_i2c_dev_device", "delay": 0},
+ {"name": "lm75", "delay":0},
+ {"name": "tmp401", "delay":0},
+ {"name": "optoe", "delay":0},
+ {"name": "at24", "delay":0},
+ {"name": "wb_mac_bsc", "delay": 0},
+ {"name": "pmbus_core", "delay": 0},
+ {"name": "ucd9000", "delay": 0},
+ {"name": "wb_xdpe132g5c_pmbus", "delay":0},
+ {"name": "xdpe12284", "delay": 0},
+ {"name": "wb_csu550", "delay":0},
+ {"name": "tps53679", "delay": 0},
+ {"name": "wb_wdt", "delay": 0},
+ {"name": "wb_wdt_device", "delay": 0},
+ {"name": "plat_dfd", "delay":0},
+ {"name": "plat_switch", "delay":0},
+ {"name": "plat_fan", "delay":0},
+ {"name": "plat_psu", "delay":0},
+ {"name": "plat_sff", "delay":0},
+ {"name": "plat_sensor", "delay":0},
+ {"name": "hw_test", "delay": 0},
+]
+
+
+DEVICE = [
+ {"name":"24c02", "bus": 2, "loc": 0x56},
+ {"name": "wb_mac_bsc_th3", "bus": 62, "loc": 0x44},
+ {"name": "tps53688", "bus": 42, "loc": 0x68},
+ {"name": "tps53688", "bus": 42, "loc": 0x6e},
+ # fan
+ {"name":"24c64", "bus": 47, "loc": 0x50},#fan6
+ {"name":"24c64", "bus": 48, "loc": 0x50},#fan5
+ {"name":"24c64", "bus": 49, "loc": 0x50},#fan4
+ {"name":"24c64", "bus": 50, "loc": 0x50},#fan3
+ {"name":"24c64", "bus": 51, "loc": 0x50},#fan2
+ {"name":"24c64", "bus": 52, "loc": 0x50},#fan1
+ # psu
+ {"name":"24c02", "bus": 58, "loc": 0x50},
+ {"name":"wb_fsp1200","bus":58, "loc":0x58},
+ {"name":"24c02", "bus": 59, "loc": 0x50},
+ {"name":"wb_fsp1200","bus":59, "loc":0x58},
+
+ {"name":"24c02", "bus": 54, "loc": 0x56}, #fan eeprom
+ {"name":"24c02", "bus": 55, "loc": 0x57}, #mac eeprom
+ #temp
+ {"name":"tmp411", "bus": 56, "loc":0x4c},
+ {"name":"tmp411", "bus": 57, "loc":0x4c},
+ {"name":"lm75", "bus":53, "loc":0x48},
+ {"name":"lm75", "bus":53, "loc":0x49},
+ {"name":"lm75", "bus":56, "loc":0x4b},
+ {"name":"lm75", "bus":57, "loc":0x4f},
+ {"name":"lm75", "bus":57, "loc":0x4e},
+ # dcdc
+ {"name":"ucd90160", "bus": 41, "loc": 0x5b},
+ {"name":"ucd90160", "bus": 60, "loc": 0x5b},
+ {"name":"wb_xdpe132g5c_pmbus", "bus": 30, "loc": 0x40},
+ {"name":"xdpe12284", "bus": 31, "loc": 0x66},
+ {"name":"xdpe12284", "bus": 32, "loc": 0x70},
+ {"name":"xdpe12284", "bus": 32, "loc": 0x6e},
+ {"name":"xdpe12284", "bus": 42, "loc": 0x5e},
+ {"name":"xdpe12284", "bus": 42, "loc": 0x68},
+ {"name":"xdpe12284", "bus": 42, "loc": 0x6e},
+]
+
+OPTOE = [
+ {"name": "optoe3", "startbus": 63, "endbus": 94},
+ {"name": "optoe2", "startbus": 95, "endbus": 96},
+]
+
+REBOOT_CTRL_PARAM = {
+ "cpu": {"io_addr": 0x920, "rst_val": 0xfe, "rst_delay": 0, "gettype": "io"},
+ "mac": {"io_addr": 0x921, "rst_val": 0xfe, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+ "phy": {"io_addr": 0x923, "rst_val": 0xef, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+}
+
+REBOOT_CAUSE_PARA = {
+ "reboot_cause_list": [
+ {
+ "name": "cold_reboot",
+ "monitor_point": {"gettype": "io", "io_addr": 0x988, "okval": 0},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Power Loss, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Power Loss, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+ ]
+ },
+ {
+ "name": "wdt_reboot",
+ "monitor_point": {"gettype": "io", "io_addr": 0x989, "okval": 1},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Watchdog, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+ ],
+ "finish_operation": [
+ {"gettype": "io", "io_addr": 0x987, "value": 0xfc},
+ ]
+ },
+ {
+ "name": "otp_switch_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+ ]
+ },
+ {
+ "name": "otp_other_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+ ]
+ },
+ ],
+ "other_reboot_cause_record": [
+ {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+}
+
+DEV_MONITOR_PARAM = {
+ "polling_time": 10,
+ "psus": [
+ {
+ "name": "psu1",
+ "present": {"gettype": "i2c", "bus": 26, "loc": 0x1d, "offset": 0x34, "presentbit": 4, "okval": 0},
+ "device": [
+ {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 59, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu1frue2", "name": "24c02", "bus": 59, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "psu2",
+ "present": {"gettype": "i2c", "bus": 26, "loc": 0x1d, "offset": 0x34, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 58, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu2frue2", "name": "24c02", "bus": 58, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "fans": [
+ {
+ "name": "fan1",
+ "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 5, "okval": 0},
+ "device": [
+ {"id": "fan1frue2", "name": "24c64", "bus": 52, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan2",
+ "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 4, "okval": 0},
+ "device": [
+ {"id": "fan2frue2", "name": "24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan3",
+ "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 3, "okval": 0},
+ "device": [
+ {"id": "fan3frue2", "name": "24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan4",
+ "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 2, "okval": 0},
+ "device": [
+ {"id": "fan4frue2", "name": "24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan5",
+ "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 1, "okval": 0},
+ "device": [
+ {"id": "fan5frue2", "name": "24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan6",
+ "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "fan6frue2", "name": "24c64", "bus": 47, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "others": [
+ {
+ "name": "eeprom",
+ "device": [
+ {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "lm75",
+ "device": [
+ {"id": "lm75_1", "name": "lm75", "bus": 53, "loc": 0x48, "attr": "hwmon"},
+ {"id": "lm75_2", "name": "lm75", "bus": 53, "loc": 0x49, "attr": "hwmon"},
+ {"id": "lm75_3", "name": "lm75", "bus": 56, "loc": 0x4b, "attr": "hwmon"},
+ {"id": "lm75_4", "name": "lm75", "bus": 57, "loc": 0x4f, "attr": "hwmon"},
+ {"id": "lm75_5", "name": "lm75", "bus": 57, "loc": 0x4e, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "tmp411",
+ "device": [
+ {"id": "tmp411_1", "name": "tmp411", "bus": 56, "loc": 0x4c, "attr": "hwmon"},
+ {"id": "tmp411_2", "name": "tmp411", "bus": 57, "loc": 0x4c, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "xdpe12284",
+ "device": [
+ {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 31, "loc": 0x66, "attr": "hwmon"},
+ {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 32, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_3", "name": "xdpe12284", "bus": 32, "loc": 0x6e, "attr": "hwmon"},
+ {"id": "xdpe12284_4", "name": "xdpe12284", "bus": 42, "loc": 0x5e, "attr": "hwmon"},
+ {"id": "xdpe12284_5", "name": "xdpe12284", "bus": 42, "loc": 0x68, "attr": "hwmon"},
+ {"id": "xdpe12284_6", "name": "xdpe12284", "bus": 42, "loc": 0x6e, "attr": "hwmon"},
+ ],
+ },
+ ],
+}
+
+INIT_PARAM_PRE = []
+INIT_COMMAND_PRE = [
+ "i2cset -y -f 26 0x1d 0x51 0x03",
+ "i2cset -y -f 26 0x1d 0x54 0x03",
+]
+
+INIT_PARAM = []
+
+INIT_COMMAND = []
+
+
+WARM_UPGRADE_PARAM = {
+ "slot0": {
+ "VME": {
+ "chain1": [
+ {"name": "BASE_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/base_cpld_transf_header.vme",
+ "init_cmd": [
+ {"cmd": "echo 63 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo out > /sys/class/gpio/gpio63/direction", "gettype": "cmd"},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio63/value", "gettype": "cmd"},
+ {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"},
+ ],
+ "rw_recover_reg": [
+ {"io_addr": 0x932, "value": None, "gettype": "io"},
+ {"io_addr": 0x933, "value": None, "gettype": "io"},
+ {"io_addr": 0x937, "value": None, "gettype": "io"},
+ {"io_addr": 0x938, "value": None, "gettype": "io"},
+ {"io_addr": 0x939, "value": None, "gettype": "io"},
+ {"io_addr": 0x93a, "value": None, "gettype": "io"},
+ {"io_addr": 0x941, "value": None, "gettype": "io"},
+ {"io_addr": 0x942, "value": None, "gettype": "io"},
+ {"io_addr": 0x947, "value": None, "gettype": "io"},
+ {"io_addr": 0x948, "value": None, "gettype": "io"},
+ {"io_addr": 0x949, "value": None, "gettype": "io"},
+ {"io_addr": 0x94d, "value": None, "gettype": "io"},
+ {"io_addr": 0x94e, "value": None, "gettype": "io"},
+ {"io_addr": 0x94f, "value": None, "gettype": "io"},
+ {"io_addr": 0x950, "value": None, "gettype": "io"},
+ {"io_addr": 0x951, "value": None, "gettype": "io"},
+ {"io_addr": 0x952, "value": None, "gettype": "io"},
+ {"io_addr": 0x953, "value": None, "gettype": "io"},
+ {"io_addr": 0x990, "value": None, "gettype": "io"},
+ {"io_addr": 0x991, "value": None, "gettype": "io"},
+ {"io_addr": 0x9a3, "value": None, "gettype": "io"},
+ {"io_addr": 0x9a4, "value": None, "gettype": "io"},
+ {"io_addr": 0x9a5, "value": None, "gettype": "io"},
+ {"io_addr": 0x9a6, "value": None, "gettype": "io"},
+ {"io_addr": 0x9a7, "value": None, "gettype": "io"},
+ {"io_addr": 0x9ad, "value": None, "gettype": "io"},
+ {"io_addr": 0x9d2, "value": None, "gettype": "io"},
+ {"io_addr": 0x9d3, "value": None, "gettype": "io"},
+ {"io_addr": 0x9d4, "value": None, "gettype": "io"},
+ {"io_addr": 0x9d5, "value": None, "gettype": "io"},
+ {"io_addr": 0x9d6, "value": None, "gettype": "io"},
+ {"io_addr": 0x9d7, "value": None, "gettype": "io"},
+ {"io_addr": 0x9d8, "value": None, "gettype": "io"},
+ ],
+ "after_upgrade_delay": 30,
+ "after_upgrade_delay_timeout": 60,
+ "refresh_finish_flag_check": {"io_addr": 0x9cb, "value": 0x5a, "gettype": "io"},
+ "access_check_reg": {"io_addr": 0x955, "value": 0xaa, "gettype": "io"},
+ "finish_cmd": [
+ {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"},
+ {"cmd": "echo 1 > /sys/class/gpio/gpio63/value", "gettype": "cmd"},
+ {"cmd": "echo 63 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+ ],
+ },
+ ],
+
+ "chain2": [
+ {"name": "MAC_CPLDA",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mac_cplda_transf_header.vme",
+ "init_cmd": [
+ {"io_addr": 0x9a7, "value": 0x1, "gettype": "io"},
+ {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"},
+ ],
+ "rw_recover_reg": [
+ {"bus": 26, "loc": 0x1d, "offset": 0x11, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x14, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x15, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x1c, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x1d, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x1f, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x20, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x21, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x22, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x35, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x36, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x37, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x38, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x39, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x4c, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x4d, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x4e, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x4f, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x50, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x51, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x53, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x54, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x55, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x1d, "offset": 0x5f, "value": None, "gettype": "i2c"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "refresh_finish_flag_check": {"bus": 26, "loc": 0x1d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"},
+ "access_check_reg": {"bus": 26, "loc": 0x1d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ "finish_cmd": [
+ {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"},
+ {"io_addr": 0x9a7, "value": 0x0, "gettype": "io"},
+ ],
+ },
+
+ {"name": "MAC_CPLDB",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mac_cpldb_transf_header.vme",
+ "init_cmd": [
+ {"io_addr": 0x9a7, "value": 0x2, "gettype": "io"},
+ {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"},
+ ],
+ "rw_recover_reg": [
+ {"bus": 26, "loc": 0x2d, "offset": 0x11, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x14, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x15, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x22, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x23, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x30, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x31, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x32, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x42, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x43, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x44, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x4a, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x4d, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x50, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x54, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x55, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x60, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x61, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x62, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x63, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x64, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0x65, "value": None, "gettype": "i2c"},
+ {"bus": 26, "loc": 0x2d, "offset": 0xf3, "value": None, "gettype": "i2c"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "refresh_finish_flag_check": {"bus": 26, "loc": 0x2d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"},
+ "access_check_reg": {"bus": 26, "loc": 0x2d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ "finish_cmd": [
+ {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"},
+ {"io_addr": 0x9a7, "value": 0x0, "gettype": "io"},
+ ],
+ },
+ ],
+
+ "chain3": [
+ {"name": "FAN_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/fan_cpld_transf_header.vme",
+ "init_cmd": [],
+ "rw_recover_reg": [
+ {"bus": 28, "loc": 0x3d, "offset": 0x11, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x12, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x13, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x14, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x15, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x16, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x17, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x18, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x19, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x20, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x21, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x30, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x31, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x33, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x35, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x3c, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x3d, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x3e, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x3f, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x40, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x41, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x60, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x61, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x62, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x63, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x64, "value": None, "gettype": "i2c"},
+ {"bus": 28, "loc": 0x3d, "offset": 0x65, "value": None, "gettype": "i2c"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"bus": 28, "loc": 0x3d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ "finish_cmd": [],
+ },
+ ],
+
+
+ "chain4": [
+ {"name": "CPU_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/cpu_cpld_transf_header.vme",
+ "init_cmd": [
+ {"cmd": "echo 114 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo high > /sys/class/gpio/gpio114/direction", "gettype": "cmd"},
+ {"io_addr": 0x7a5, "value": 0x0, "gettype": "io"},
+ ],
+ "rw_recover_reg": [
+ {"io_addr": 0x705, "value": None, "gettype": "io"},
+ {"io_addr": 0x713, "value": None, "gettype": "io"},
+ {"io_addr": 0x715, "value": None, "gettype": "io"},
+ {"io_addr": 0x721, "value": None, "gettype": "io"},
+ {"io_addr": 0x722, "value": None, "gettype": "io"},
+ {"io_addr": 0x772, "value": None, "gettype": "io"},
+ {"io_addr": 0x774, "value": None, "gettype": "io"},
+ {"io_addr": 0x776, "value": None, "gettype": "io"},
+ {"io_addr": 0x778, "value": None, "gettype": "io"},
+ {"io_addr": 0x77a, "value": None, "gettype": "io"},
+ {"io_addr": 0x77c, "value": None, "gettype": "io"},
+ {"io_addr": 0x780, "value": None, "gettype": "io"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+ "finish_cmd": [
+ {"io_addr": 0x7a5, "value": 0x1, "gettype": "io"},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio114/value", "gettype": "cmd"},
+ {"cmd": "echo 114 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+ ],
+ },
+ ],
+
+ },
+
+ "MTD": {
+ "chain1": [
+ {"name": "MAC_FPGA",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0050", "gettype": "cmd"}, # link_disable
+ {"io_addr": 0x9b0, "value": 0x3, "gettype": "io"},
+ ],
+ "after_upgrade_delay": 10,
+ "after_upgrade_delay_timeout": 180,
+ "access_check_reg": {
+ "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile",
+ "polling_cmd":[
+ {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+ {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"},
+ {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+ ],
+ "polling_delay": 0.1
+ },
+ "finish_cmd": [
+ {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+ {"io_addr": 0x9b0, "value": 0x2, "gettype": "io"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+ ],
+ },
+ },
+ "stop_services_cmd": [
+ "/usr/local/bin/platform_process.py stop",
+ ],
+ "start_services_cmd": [
+ "/usr/local/bin/platform_process.py start",
+ ],
+}
+
+UPGRADE_SUMMARY = {
+ "devtype": 0x40c1,
+
+ "slot0": {
+ "subtype": 0,
+ "VME": {
+ "chain1": {
+ "name": "BASE_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain2": {
+ "name": "MAC_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain3": {
+ "name": "FAN_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain4": {
+ "name": "CPU_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ },
+
+ "MTD": {
+ "chain1": {
+ "name": "MAC_FPGA",
+ "is_support_warm_upg": 1,
+ "init_cmd": [
+ {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"},
+ {"cmd": "echo 99 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo out > /sys/class/gpio/gpio99/direction", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio99/value", "gettype": "cmd", "delay": 0.1},
+ {"io_addr": 0x991, "value": 0xfa, "gettype": "io"},
+ {"io_addr": 0x990, "value": 0xfd, "gettype": "io"},
+ {"io_addr": 0x9a6, "value": 0xfe, "gettype": "io"},
+ {"io_addr": 0x9d8, "value": 0xfd, "gettype": "io"},
+ {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"},
+ {"io_addr": 0x9d8, "value": 0xff, "gettype": "io"},
+ {"io_addr": 0x9a6, "value": 0xff, "gettype": "io"},
+ {"io_addr": 0x990, "value": 0xfc, "gettype": "io"},
+ {"io_addr": 0x991, "value": 0xf8, "gettype": "io"},
+ {"cmd": "echo 1 > /sys/class/gpio/gpio99/value", "gettype": "cmd"},
+ {"cmd": "echo 99 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+ ],
+ },
+
+ "chain3": {
+ "name": "BIOS",
+ "is_support_warm_upg": 0,
+ "filesizecheck": 10240, # bios check file size, Unit: K
+ "init_cmd": [
+ {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+ {"cmd": "modprobe mtd", "gettype": "cmd"},
+ {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+ {"cmd": "modprobe ofpart", "gettype": "cmd"},
+ {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+ {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"},
+ {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+ {"cmd": "rmmod ofpart", "gettype": "cmd"},
+ {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+ {"cmd": "rmmod mtd", "gettype": "cmd"},
+ ],
+ },
+ },
+
+ "SYSFS": {
+ "chain2": {
+ "name": "BCM53134O",
+ "is_support_warm_upg": 0,
+ "init_cmd": [
+ {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+ ],
+ "finish_cmd": [
+
+ {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+ ],
+ },
+ },
+
+ "TEST": {
+ "cpld": [
+ {"chain": 1, "file": "/etc/.upgrade_test/base_cpld_test_header.vme", "display_name": "BASE_CPLD"},
+ {"chain": 2, "file": "/etc/.upgrade_test/mac_cpld_test_header.vme", "display_name": "MAC_CPLD"},
+ {"chain": 3, "file": "/etc/.upgrade_test/fan_cpld_test_header.vme", "display_name": "FAN_CPLD"},
+ {"chain": 4, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"},
+ ],
+ "fpga": [
+ {"chain": 1,"file": "/etc/.upgrade_test/fpga_test_header.bin","display_name": "FPGA",},
+ ],
+ },
+ },
+}
+
+
+PLATFORM_E2_CONF = {
+ "fan": [
+ {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom"},
+ {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"},
+ {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"},
+ {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"},
+ {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"},
+ {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/47-0050/eeprom"},
+ ],
+ "psu": [
+ {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/59-0050/eeprom"},
+ {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/58-0050/eeprom"},
+ ],
+ "syseeprom": [
+ {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom"},
+ ],
+}
+
+AIR_FLOW_CONF = {
+ "psu_fan_airflow": {
+ "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+ "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+ },
+
+ "fanairflow": {
+ "intake": ['M1HFAN IV-F'],
+ "exhaust": ['M1HFAN IV-R']
+ },
+
+ "fans": [
+ {
+ "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom",
+ "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+ },
+ {
+ "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom",
+ "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+ },
+ {
+ "name": "FAN3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom",
+ "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+ },
+ {
+ "name": "FAN4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom",
+ "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+ },
+ {
+ "name": "FAN5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom",
+ "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+ },
+ {
+ "name": "FAN6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/47-0050/eeprom",
+ "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+ },
+ ],
+
+ "psus": [
+ {
+ "name": "PSU1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/59-0050/eeprom",
+ "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+ },
+ {
+ "name": "PSU2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/58-0050/eeprom",
+ "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+ }
+ ]
+}
+
+SET_MAC_CONF = [
+ {
+ "eth_name": "eth0",
+ "e2_name": "syseeprom",
+ "e2_type": "onie_tlv",
+ "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom",
+ "mac_location": {"field": "Base MAC Address"},
+ "ifcfg": {
+ "ifcfg_file_path": "/etc/network/interfaces.d/ifcfg-eth0-mac", "file_mode": "add",
+ }
+ }
+]
+
+DRVIER_UPDATE_CONF = {
+ "reboot_flag": 1,
+ "drv_list": [
+ {
+ "source": "extra/sdhci_pci.ko",
+ "target": "kernel/drivers/mmc/host/sdhci-pci.ko",
+ "judge_flag": "/sys/module/sdhci_pci/parameters/wb_sdhci_pci"
+ },
+ ]
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py
new file mode 100644
index 000000000000..3395be3e48e9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py
@@ -0,0 +1,42 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+ "port_num": 34,
+ "port_bus_map": {
+ 1: 65,
+ 2: 66,
+ 3: 63,
+ 4: 64,
+ 5: 67,
+ 6: 68,
+ 7: 69,
+ 8: 70,
+ 9: 71,
+ 10: 72,
+ 11: 73,
+ 12: 74,
+ 13: 75,
+ 14: 76,
+ 15: 77,
+ 16: 78,
+ 17: 79,
+ 18: 80,
+ 19: 81,
+ 20: 82,
+ 21: 83,
+ 22: 84,
+ 23: 85,
+ 24: 86,
+ 25: 87,
+ 26: 88,
+ 27: 89,
+ 28: 90,
+ 29: 93,
+ 30: 94,
+ 31: 91,
+ 32: 92,
+ 33: 96,
+ 34: 95
+ }
+}
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py
new file mode 100644
index 000000000000..edbc3624c5d9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py
@@ -0,0 +1,1333 @@
+# coding:utf-8
+
+psu_fan_airflow = {
+ "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+ "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+fanairflow = {
+ "intake": ['M1HFAN IV-F'],
+ "exhaust": ['M1HFAN IV-R']
+}
+
+psu_display_name = {
+ "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+ "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+psutypedecode = {
+ 0x00: 'N/A',
+ 0x01: 'AC',
+ 0x02: 'DC',
+}
+
+
+class Unit:
+ Temperature = "C"
+ Voltage = "V"
+ Current = "A"
+ Power = "W"
+ Speed = "RPM"
+
+
+class threshold:
+ PSU_TEMP_MIN = -20 * 1000
+ PSU_TEMP_MAX = 60 * 1000
+
+ PSU_FAN_SPEED_MIN = 3000
+ PSU_FAN_SPEED_MAX = 30000
+
+ PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+ PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000
+
+ PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+ PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+ PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+ PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+ ERR_VALUE = -9999999
+
+ PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+ PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+ PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+ PSU_INPUT_POWER_MAX = 1400* 1000 * 1000
+
+ PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+ PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+ PSU_INPUT_CURRENT_MIN = 0.05 * 1000
+ PSU_INPUT_CURRENT_MAX = 12 * 1000
+
+ FRONT_FAN_SPEED_MAX = 32500
+ REAR_FAN_SPEED_MAX = 30500
+ FAN_SPEED_MIN = 7248
+
+
+class Description:
+ CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+ BIOS = "Performs initialization of hardware components during booting"
+ FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+ "onie_e2": [
+ {
+ "name": "ONIE_E2",
+ "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"},
+ "airflow": "intake"
+ },
+ ],
+ "psus": [
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/59-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 59, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU1",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 59, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/58-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 58, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU2",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "InputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 58, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ ],
+ "temps": [
+ {
+ "name": "BOARD_TEMP",
+ "temp_id": "TEMP1",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/57-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/57-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+ ],
+ "Min": -10000,
+ "Low": 0,
+ "High": 85000,
+ "Max": 90000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "CPU_TEMP",
+ "temp_id": "TEMP2",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": 2000,
+ "Low": 10000,
+ "High": 85000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "INLET_TEMP",
+ "temp_id": "TEMP3",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/56-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ ],
+ "Min": -10000,
+ "Low": 0,
+ "High": 50000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "OUTLET_TEMP",
+ "temp_id": "TEMP4",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/53-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/53-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+ ],
+ "Min": -10000,
+ "Low": 0,
+ "High": 85000,
+ "Max": 90000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SWITCH_TEMP",
+ "temp_id": "TEMP5",
+ "api_name": "ASIC_TEMP",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/56-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/57-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"}
+ ],
+ "Min": 2000,
+ "Low": 10000,
+ "High": 100000,
+ "Max": 105000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU1_TEMP",
+ "temp_id": "TEMP6",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -20000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU2_TEMP",
+ "temp_id": "TEMP7",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -20000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SFF_TEMP",
+ "Temperature": {
+ "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+ "Min": -15000,
+ "Low": 0,
+ "High": 80000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ ],
+ "leds": [
+ {
+ "name": "BOARD_SYS_LED",
+ "led_type": "SYS_LED",
+ "led": {"bus": 26, "addr": 0x2d, "offset": 0x40, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+ },
+ },
+ {
+ "name": "BOARD_FAN_LED",
+ "led_type": "FAN_LED",
+ "led": {"bus": 26, "addr": 0x2d, "offset": 0x42, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+ },
+ },
+ {
+ "name": "BOARD_PSU_LED",
+ "led_type": "PSU_LED",
+ "led": {"bus": 26, "addr": 0x2d, "offset": 0x43, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+ },
+ },
+ ],
+ "fans": [
+ {
+ "name": "FAN1",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x41, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN2",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x40, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN3",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3f, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN4",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3e, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN5",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3d, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN6",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/47-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3c, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ ],
+ "cplds": [
+ {
+ "name": "CPU_CPLD",
+ "cpld_id": "CPLD1",
+ "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for system power",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "CTRL_CPLD",
+ "cpld_id": "CPLD2",
+ "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "MAC_CPLDA",
+ "cpld_id": "CPLD3",
+ "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for SFP+ modules",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "MAC_CPLDB",
+ "cpld_id": "CPLD4",
+ "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for SFP+ modules",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "FAN_CPLD",
+ "cpld_id": "CPLD5",
+ "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for fan modules",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "MAC_FPGA",
+ "cpld_id": "CPLD6",
+ "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "format": "little_endian",
+ "warm": 1,
+ },
+ {
+ "name": "BIOS",
+ "cpld_id": "CPLD7",
+ "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+ "desc": "Performs initialization of hardware components during booting",
+ "slot": 0,
+ "type": "str",
+ "warm": 0,
+ },
+ ],
+ "dcdc": [
+ {
+ "name": "MAC_VCC12V_CON",
+ "dcdc_id": "DCDC1",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD1.0V_FPGA",
+ "dcdc_id": "DCDC2",
+ "Min": 950,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1050,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD1.8V_FPGA",
+ "dcdc_id": "DCDC3",
+ "Min": 1710,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1890,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD1.2V_FPGA",
+ "dcdc_id": "DCDC4",
+ "Min": 1130,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1280,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3V",
+ "dcdc_id": "DCDC5",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_DVDD3.3V_1.8V",
+ "dcdc_id": "DCDC6",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_AVDD1.8V",
+ "dcdc_id": "DCDC7",
+ "Min": 1710,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1890,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_DVDD1.2V",
+ "dcdc_id": "DCDC8",
+ "Min": 1130,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1280,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_AVDD1.2V",
+ "dcdc_id": "DCDC9",
+ "Min": 1130,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1280,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3V_SFP+",
+ "dcdc_id": "DCDC10",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3V_CLK",
+ "dcdc_id": "DCDC11",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD5V_VR",
+ "dcdc_id": "DCDC12",
+ "Min": 4500,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 5500,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD_CORE",
+ "dcdc_id": "DCDC13",
+ "Min": 700,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 980,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD_ANALOG",
+ "dcdc_id": "DCDC14",
+ "Min": 760,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 920,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD_ANALOG1",
+ "dcdc_id": "DCDC15",
+ "Min": 760,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 920,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_VDD3.3V",
+ "dcdc_id": "DCDC16",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_VDD12V",
+ "dcdc_id": "DCDC17",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_VDD3.3_STBY",
+ "dcdc_id": "DCDC18",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_SSD1_VDD3.3V",
+ "dcdc_id": "DCDC19",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_PHY_VDD1V0",
+ "dcdc_id": "DCDC20",
+ "Min": 950,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1100,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_OVDD_PHY_M",
+ "dcdc_id": "DCDC21",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_VCCP",
+ "dcdc_id": "DCDC22",
+ "Min": 468,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1364,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_VNN",
+ "dcdc_id": "DCDC23",
+ "Min": 585,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1364,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_P1V05",
+ "dcdc_id": "DCDC24",
+ "Min": 945,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1155,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_VCCRAM",
+ "dcdc_id": "DCDC25",
+ "Min": 675,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1320,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_P1V2_VDDQ",
+ "dcdc_id": "DCDC26",
+ "Min": 1080,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1320,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3_MON",
+ "dcdc_id": "DCDC27",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in3/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_A",
+ "dcdc_id": "DCDC28",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in1/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_B",
+ "dcdc_id": "DCDC29",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in2/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.7V_CLK",
+ "dcdc_id": "DCDC30",
+ "Min": 3500,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in4/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 4000,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD5V_USB",
+ "dcdc_id": "DCDC31",
+ "Min": 4500,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in5/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 5500,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN6_VDD12V",
+ "dcdc_id": "DCDC32",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in11/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN5_VDD12V",
+ "dcdc_id": "DCDC33",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in10/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN4_VDD12V",
+ "dcdc_id": "DCDC34",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in9/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN3_VDD12V",
+ "dcdc_id": "DCDC35",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in8/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN2_VDD12V",
+ "dcdc_id": "DCDC36",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in7/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN1_VDD12V",
+ "dcdc_id": "DCDC37",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in6/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN_VDD3.3V",
+ "dcdc_id": "DCDC38",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in12/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+ ],
+ "cpu": [
+ {
+ "name": "cpu",
+ "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"},
+ "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+ }
+ ],
+ "cards": [
+ {
+ "name": "psu1",
+ "sn": "123"
+ },
+ {
+ "name": "psu2",
+ "sn": "456"
+ },
+ ],
+ "sfps": {
+ "ver": '1.0',
+ "port_index_start": 0,
+ "port_num": 34,
+ "log_level": 2,
+ "eeprom_retry_times": 5,
+ "eeprom_retry_break_sec": 0.2,
+ "presence_cpld": {
+ "dev_id": {
+ 2: {
+ "offset": {
+ 0x32: "17-24",
+ 0x33: "25-28,31,32,29,30",
+ 0x46: "34,33",
+ },
+ },
+ 3: {
+ "offset": {
+ 0x4E: "3,4,1,2,5-8",
+ 0x4F: "9-16",
+ },
+ },
+ },
+ },
+ "presence_val_is_present": 0,
+ "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+ "eeprom_path_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+ "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+ "optoe_driver_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+ "reset_cpld": {
+ "dev_id": {
+ 2: {
+ "offset": {
+ 0x21: "17-24",
+ 0x22: "25-28,31,32,29,30",
+ },
+ },
+ 3: {
+ "offset": {
+ 0x22: "3,4,1,2,5-8",
+ 0x23: "9-16",
+ },
+ },
+ },
+ },
+ "reset_val_is_reset": 0,
+ "txdis_cpld": {
+ "dev_id": {
+ 2: {
+ "offset": {
+ 0x50: "34,33",
+ },
+ },
+ },
+ },
+ "txdisable_val_is_on": 1,
+ }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py
new file mode 100644
index 000000000000..ceea936bd5cd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py
@@ -0,0 +1,1333 @@
+# coding:utf-8
+
+psu_fan_airflow = {
+ "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+ "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+fanairflow = {
+ "intake": ['M1HFAN IV-F'],
+ "exhaust": ['M1HFAN IV-R']
+}
+
+psu_display_name = {
+ "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+ "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+psutypedecode = {
+ 0x00: 'N/A',
+ 0x01: 'AC',
+ 0x02: 'DC',
+}
+
+
+class Unit:
+ Temperature = "C"
+ Voltage = "V"
+ Current = "A"
+ Power = "W"
+ Speed = "RPM"
+
+
+class threshold:
+ PSU_TEMP_MIN = -20 * 1000
+ PSU_TEMP_MAX = 60 * 1000
+
+ PSU_FAN_SPEED_MIN = 3000
+ PSU_FAN_SPEED_MAX = 30000
+
+ PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+ PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000
+
+ PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+ PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+ PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+ PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+ ERR_VALUE = -9999999
+
+ PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+ PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+ PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+ PSU_INPUT_POWER_MAX = 1400* 1000 * 1000
+
+ PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+ PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+ PSU_INPUT_CURRENT_MIN = 0.05 * 1000
+ PSU_INPUT_CURRENT_MAX = 12 * 1000
+
+ FRONT_FAN_SPEED_MAX = 32500
+ REAR_FAN_SPEED_MAX = 30500
+ FAN_SPEED_MIN = 7248
+
+
+class Description:
+ CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+ BIOS = "Performs initialization of hardware components during booting"
+ FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+ "onie_e2": [
+ {
+ "name": "ONIE_E2",
+ "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"},
+ "airflow": "exhaust"
+ },
+ ],
+ "psus": [
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/59-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 59, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU1",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 59, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/58-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 58, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU2",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "InputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 58, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower":
+ {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ ],
+ "temps": [
+ {
+ "name": "BOARD_TEMP",
+ "temp_id": "TEMP1",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/57-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/57-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+ ],
+ "Min": -10000,
+ "Low": 0,
+ "High": 85000,
+ "Max": 90000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "CPU_TEMP",
+ "temp_id": "TEMP2",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": 2000,
+ "Low": 10000,
+ "High": 85000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "INLET_TEMP",
+ "temp_id": "TEMP3",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/53-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/53-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+ ],
+ "Min": -10000,
+ "Low": 0,
+ "High": 50000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "OUTLET_TEMP",
+ "temp_id": "TEMP4",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/56-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ ],
+ "Min": -10000,
+ "Low": 0,
+ "High": 85000,
+ "Max": 90000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SWITCH_TEMP",
+ "temp_id": "TEMP5",
+ "api_name": "ASIC_TEMP",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/56-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/57-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"}
+ ],
+ "Min": 2000,
+ "Low": 10000,
+ "High": 100000,
+ "Max": 105000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU1_TEMP",
+ "temp_id": "TEMP6",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -20000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU2_TEMP",
+ "temp_id": "TEMP7",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -20000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SFF_TEMP",
+ "Temperature": {
+ "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+ "Min": -15000,
+ "Low": 0,
+ "High": 80000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ ],
+ "leds": [
+ {
+ "name": "BOARD_SYS_LED",
+ "led_type": "SYS_LED",
+ "led": {"bus": 26, "addr": 0x2d, "offset": 0x40, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+ },
+ },
+ {
+ "name": "BOARD_FAN_LED",
+ "led_type": "FAN_LED",
+ "led": {"bus": 26, "addr": 0x2d, "offset": 0x42, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+ },
+ },
+ {
+ "name": "BOARD_PSU_LED",
+ "led_type": "PSU_LED",
+ "led": {"bus": 26, "addr": 0x2d, "offset": 0x43, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+ },
+ },
+ ],
+ "fans": [
+ {
+ "name": "FAN1",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x41, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN2",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x40, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN3",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3f, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN4",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3e, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN5",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3d, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN6",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/47-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 28, "addr": 0x3d, "offset": 0x3c, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ ],
+ "cplds": [
+ {
+ "name": "CPU_CPLD",
+ "cpld_id": "CPLD1",
+ "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for system power",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "CTRL_CPLD",
+ "cpld_id": "CPLD2",
+ "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "MAC_CPLDA",
+ "cpld_id": "CPLD3",
+ "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for SFP+ modules",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "MAC_CPLDB",
+ "cpld_id": "CPLD4",
+ "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for SFP+ modules",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "FAN_CPLD",
+ "cpld_id": "CPLD5",
+ "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for fan modules",
+ "slot": 0,
+ "warm": 0,
+ },
+ {
+ "name": "MAC_FPGA",
+ "cpld_id": "CPLD6",
+ "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "format": "little_endian",
+ "warm": 1,
+ },
+ {
+ "name": "BIOS",
+ "cpld_id": "CPLD7",
+ "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+ "desc": "Performs initialization of hardware components during booting",
+ "slot": 0,
+ "type": "str",
+ "warm": 0,
+ },
+ ],
+ "dcdc": [
+ {
+ "name": "MAC_VCC12V_CON",
+ "dcdc_id": "DCDC1",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD1.0V_FPGA",
+ "dcdc_id": "DCDC2",
+ "Min": 950,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1050,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD1.8V_FPGA",
+ "dcdc_id": "DCDC3",
+ "Min": 1710,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1890,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD1.2V_FPGA",
+ "dcdc_id": "DCDC4",
+ "Min": 1130,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1280,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3V",
+ "dcdc_id": "DCDC5",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_DVDD3.3V_1.8V",
+ "dcdc_id": "DCDC6",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_AVDD1.8V",
+ "dcdc_id": "DCDC7",
+ "Min": 1710,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1890,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_DVDD1.2V",
+ "dcdc_id": "DCDC8",
+ "Min": 1130,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1280,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_AVDD1.2V",
+ "dcdc_id": "DCDC9",
+ "Min": 1130,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1280,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3V_SFP+",
+ "dcdc_id": "DCDC10",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3V_CLK",
+ "dcdc_id": "DCDC11",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD5V_VR",
+ "dcdc_id": "DCDC12",
+ "Min": 4500,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 5500,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD_CORE",
+ "dcdc_id": "DCDC13",
+ "Min": 700,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 980,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD_ANALOG",
+ "dcdc_id": "DCDC14",
+ "Min": 760,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 920,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD_ANALOG1",
+ "dcdc_id": "DCDC15",
+ "Min": 760,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 920,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_VDD3.3V",
+ "dcdc_id": "DCDC16",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_VDD12V",
+ "dcdc_id": "DCDC17",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_VDD3.3_STBY",
+ "dcdc_id": "DCDC18",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_SSD1_VDD3.3V",
+ "dcdc_id": "DCDC19",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_PHY_VDD1V0",
+ "dcdc_id": "DCDC20",
+ "Min": 950,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1100,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "BASE_OVDD_PHY_M",
+ "dcdc_id": "DCDC21",
+ "Min": 3135,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3465,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_VCCP",
+ "dcdc_id": "DCDC22",
+ "Min": 468,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1364,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_VNN",
+ "dcdc_id": "DCDC23",
+ "Min": 585,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1364,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_P1V05",
+ "dcdc_id": "DCDC24",
+ "Min": 945,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1155,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_VCCRAM",
+ "dcdc_id": "DCDC25",
+ "Min": 675,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1320,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "CPU_P1V2_VDDQ",
+ "dcdc_id": "DCDC26",
+ "Min": 1080,
+ "value": {
+ "loc": "/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 1320,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.3_MON",
+ "dcdc_id": "DCDC27",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in3/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_A",
+ "dcdc_id": "DCDC28",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in1/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_B",
+ "dcdc_id": "DCDC29",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in2/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD3.7V_CLK",
+ "dcdc_id": "DCDC30",
+ "Min": 3500,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in4/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 4000,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "MAC_VDD5V_USB",
+ "dcdc_id": "DCDC31",
+ "Min": 4500,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in5/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 5500,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN6_VDD12V",
+ "dcdc_id": "DCDC32",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in11/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN5_VDD12V",
+ "dcdc_id": "DCDC33",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in10/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN4_VDD12V",
+ "dcdc_id": "DCDC34",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in9/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN3_VDD12V",
+ "dcdc_id": "DCDC35",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in8/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN2_VDD12V",
+ "dcdc_id": "DCDC36",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in7/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN1_VDD12V",
+ "dcdc_id": "DCDC37",
+ "Min": 11400,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in6/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 12600,
+ "format": "float(float(%s)/1000)",
+ },
+
+ {
+ "name": "FAN_VDD3.3V",
+ "dcdc_id": "DCDC38",
+ "Min": 3040,
+ "value": {
+ "loc": "/sys/wb_plat/sensor/in12/in_input",
+ "way": "sysfs",
+ },
+ "read_times": 5,
+ "Unit": "V",
+ "Max": 3560,
+ "format": "float(float(%s)/1000)",
+ },
+ ],
+ "cpu": [
+ {
+ "name": "cpu",
+ "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"},
+ "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+ }
+ ],
+ "cards": [
+ {
+ "name": "psu1",
+ "sn": "123"
+ },
+ {
+ "name": "psu2",
+ "sn": "456"
+ },
+ ],
+ "sfps": {
+ "ver": '1.0',
+ "port_index_start": 0,
+ "port_num": 34,
+ "log_level": 2,
+ "eeprom_retry_times": 5,
+ "eeprom_retry_break_sec": 0.2,
+ "presence_cpld": {
+ "dev_id": {
+ 2: {
+ "offset": {
+ 0x32: "17-24",
+ 0x33: "25-28,31,32,29,30",
+ 0x46: "34,33",
+ },
+ },
+ 3: {
+ "offset": {
+ 0x4E: "3,4,1,2,5-8",
+ 0x4F: "9-16",
+ },
+ },
+ },
+ },
+ "presence_val_is_present": 0,
+ "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+ "eeprom_path_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+ "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+ "optoe_driver_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+ "reset_cpld": {
+ "dev_id": {
+ 2: {
+ "offset": {
+ 0x21: "17-24",
+ 0x22: "25-28,31,32,29,30",
+ },
+ },
+ 3: {
+ "offset": {
+ 0x22: "3,4,1,2,5-8",
+ 0x23: "9-16",
+ },
+ },
+ },
+ },
+ "reset_val_is_reset": 0,
+ "txdis_cpld": {
+ "dev_id": {
+ 2: {
+ "offset": {
+ 0x50: "34,33",
+ },
+ },
+ },
+ },
+ "txdisable_val_is_on": 1,
+ }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py
new file mode 100644
index 000000000000..5bd96813eb2b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py
@@ -0,0 +1,213 @@
+# coding:utf-8
+
+
+monitor = {
+ "openloop": {
+ "linear": {
+ "name": "linear",
+ "flag": 0,
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "K": 11,
+ "tin_min": 28,
+ },
+ "curve": {
+ "name": "curve",
+ "flag": 1,
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "a": 0.1255,
+ "b": -1.2036,
+ "c": 76,
+ "tin_min": 25,
+ },
+ },
+
+ "pid": {
+ "CPU_TEMP": {
+ "name": "CPU_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 0.2,
+ "Kd": 0.3,
+ "target": 80,
+ "value": [None, None, None],
+ },
+ "SWITCH_TEMP": {
+ "name": "SWITCH_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 0.3,
+ "Kd": 0.3,
+ "target": 78,
+ "value": [None, None, None],
+ },
+ "OUTLET_TEMP": {
+ "name": "OUTLET_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ "BOARD_TEMP": {
+ "name": "BOARD_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 83,
+ "value": [None, None, None],
+ },
+ "SFF_TEMP": {
+ "name": "SFF_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 0.3,
+ "Ki": 0.2,
+ "Kd": 0,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ },
+
+ "temps_threshold": {
+ "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 110},
+ "INLET_TEMP": {"name": "INLET_TEMP", "warning": 45, "critical": 50, "fix": -2},
+ "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 90, "critical": 95},
+ "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+ "CPU_TEMP": {"name": "CPU_TEMP", "warning": 87, "critical": 93},
+ "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+ },
+
+ "fancontrol_para": {
+ "interval": 5,
+ "fan_status_interval": 0.5,
+ "max_pwm": 0xff,
+ "min_pwm": 0x8d,
+ "abnormal_pwm": 0xff,
+ "warning_pwm": 0xff,
+ "temp_invalid_pid_pwm": 0x8d,
+ "temp_error_pid_pwm": 0x8d,
+ "temp_fail_num": 3,
+ "check_temp_fail": [
+ {"temp_name": "INLET_TEMP"},
+ {"temp_name": "SWITCH_TEMP"},
+ {"temp_name": "CPU_TEMP"},
+ ],
+ "temp_warning_num": 3, # temp over warning 3 times continuously
+ "temp_critical_num": 3, # temp over critical 3 times continuously
+ "temp_warning_countdown": 60, # 5 min warning speed after not warning
+ "temp_critical_countdown": 60, # 5 min full speed after not critical
+ "rotor_error_count": 6, # fan rotor error 6 times continuously
+ "inlet_mac_diff": 999,
+ "check_crit_reboot_flag": 1,
+ "check_crit_reboot_num": 3,
+ "check_crit_sleep_time": 20,
+
+ "deal_all_fan_error_method_flag": 1,
+ "all_fan_error_switch_temp_critical_temp": 95,
+ "all_fan_error_recover_log": "Power off base and mac board.",
+ "all_fan_error_recover_cmd": "dfd_debug io_wr 0x947 0xfa",
+ "all_fan_error_check_crit_reboot_num": 3,
+ "all_fan_error_check_crit_sleep_time": 2,
+
+ "psu_absent_fullspeed_num": 0xFF, #Full-speed switchover - Number of Psus absent - Disables the full-speed switchover of Psus absent
+ "fan_absent_fullspeed_num": 2, # Full speed rotation of the system -fan Indicates the number of absent bits
+ "rotor_error_fullspeed_num": 3, # System full speed - Number of motor failures
+ "psu_fan_control": 1, # Enable the psu fan control function
+ "deal_fan_error": 1, # Handling Fan anomalies
+ "deal_fan_error_conf": {
+ "countdown": 2, # max time:(2-1)*Speed regulation period
+ "FAN1": [
+ {"name": "FAN1", "pwm": 0xff},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN2": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0xff},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN3": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0xff},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN4": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0xff},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN5": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0xff},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN6": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0xff},
+ ],
+ },
+ },
+
+ "ledcontrol_para": {
+ "interval": 5,
+ "checkpsu": 0, # 0: sys led don't follow psu led
+ "checkfan": 0, # 0: sys led don't follow fan led
+ "psu_amber_num": 1,
+ "fan_amber_num": 1,
+ "board_sys_led": [
+ {"led_name": "BOARD_SYS_LED"},
+ ],
+ "board_psu_led": [
+ {"led_name": "BOARD_PSU_LED"},
+ ],
+ "board_fan_led": [
+ {"led_name": "BOARD_FAN_LED"},
+ ],
+ "psu_air_flow_monitor": 1,
+ "fan_air_flow_monitor": 1,
+ "psu_air_flow_amber_num": 1,
+ "fan_air_flow_amber_num": 1,
+ },
+
+ "otp_reboot_judge_file": {
+ "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+ "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+ },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py
new file mode 100644
index 000000000000..d6b5c2b5aa0c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py
@@ -0,0 +1,213 @@
+# coding:utf-8
+
+
+monitor = {
+ "openloop": {
+ "linear": {
+ "name": "linear",
+ "flag": 0,
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "K": 11,
+ "tin_min": 28,
+ },
+ "curve": {
+ "name": "curve",
+ "flag": 1,
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "a": 0.1255,
+ "b": -1.2036,
+ "c": 76,
+ "tin_min": 25,
+ },
+ },
+
+ "pid": {
+ "CPU_TEMP": {
+ "name": "CPU_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 1,
+ "Kd": 0.3,
+ "target": 80,
+ "value": [None, None, None],
+ },
+ "SWITCH_TEMP": {
+ "name": "SWITCH_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 0.5,
+ "Kd": 0.3,
+ "target": 78,
+ "value": [None, None, None],
+ },
+ "OUTLET_TEMP": {
+ "name": "OUTLET_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ "BOARD_TEMP": {
+ "name": "BOARD_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 83,
+ "value": [None, None, None],
+ },
+ "SFF_TEMP": {
+ "name": "SFF_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x8d,
+ "pwm_max": 0xff,
+ "Kp": 0.3,
+ "Ki": 0.4,
+ "Kd": 0,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ },
+
+ "temps_threshold": {
+ "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 110},
+ "INLET_TEMP": {"name": "INLET_TEMP", "warning": 45, "critical": 50, "fix": -4},
+ "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 90, "critical": 95},
+ "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+ "CPU_TEMP": {"name": "CPU_TEMP", "warning": 87, "critical": 93},
+ "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+ },
+
+ "fancontrol_para": {
+ "interval": 5,
+ "fan_status_interval": 0.5,
+ "max_pwm": 0xff,
+ "min_pwm": 0x8d,
+ "abnormal_pwm": 0xff,
+ "warning_pwm": 0xff,
+ "temp_invalid_pid_pwm": 0x8d,
+ "temp_error_pid_pwm": 0x8d,
+ "temp_fail_num": 3,
+ "check_temp_fail": [
+ {"temp_name": "INLET_TEMP"},
+ {"temp_name": "SWITCH_TEMP"},
+ {"temp_name": "CPU_TEMP"},
+ ],
+ "temp_warning_num": 3, # temp over warning 3 times continuously
+ "temp_critical_num": 3, # temp over critical 3 times continuously
+ "temp_warning_countdown": 60, # 5 min warning speed after not warning
+ "temp_critical_countdown": 60, # 5 min full speed after not critical
+ "rotor_error_count": 6, # fan rotor error 6 times continuously
+ "inlet_mac_diff": 999,
+ "check_crit_reboot_flag": 1,
+ "check_crit_reboot_num": 3,
+ "check_crit_sleep_time": 20,
+
+ "deal_all_fan_error_method_flag": 1,
+ "all_fan_error_switch_temp_critical_temp": 95,
+ "all_fan_error_recover_log": "Power off base and mac board.",
+ "all_fan_error_recover_cmd": "dfd_debug io_wr 0x947 0xfa",
+ "all_fan_error_check_crit_reboot_num": 3,
+ "all_fan_error_check_crit_sleep_time": 2,
+
+ "psu_absent_fullspeed_num": 0xFF, #Full-speed switchover - Number of Psus absent - Disables the full-speed switchover of Psus absent
+ "fan_absent_fullspeed_num": 2, # Full speed rotation of the system -fan Indicates the number of absent bits
+ "rotor_error_fullspeed_num": 3, # System full speed - Number of motor failures
+ "psu_fan_control": 1, # Enable the psu fan control function
+ "deal_fan_error": 1, # Handling Fan anomalies
+ "deal_fan_error_conf": {
+ "countdown": 2, # max time:(2-1)*Speed regulation period
+ "FAN1": [
+ {"name": "FAN1", "pwm": 0xff},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN2": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0xff},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN3": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0xff},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN4": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0xff},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN5": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0xff},
+ {"name": "FAN6", "pwm": 0x99},
+ ],
+ "FAN6": [
+ {"name": "FAN1", "pwm": 0x99},
+ {"name": "FAN2", "pwm": 0x99},
+ {"name": "FAN3", "pwm": 0x99},
+ {"name": "FAN4", "pwm": 0x99},
+ {"name": "FAN5", "pwm": 0x99},
+ {"name": "FAN6", "pwm": 0xff},
+ ],
+ },
+ },
+
+ "ledcontrol_para": {
+ "interval": 5,
+ "checkpsu": 0, # 0: sys led don't follow psu led
+ "checkfan": 0, # 0: sys led don't follow fan led
+ "psu_amber_num": 1,
+ "fan_amber_num": 1,
+ "board_sys_led": [
+ {"led_name": "BOARD_SYS_LED"},
+ ],
+ "board_psu_led": [
+ {"led_name": "BOARD_PSU_LED"},
+ ],
+ "board_fan_led": [
+ {"led_name": "BOARD_FAN_LED"},
+ ],
+ "psu_air_flow_monitor": 1,
+ "fan_air_flow_monitor": 1,
+ "psu_air_flow_amber_num": 1,
+ "fan_air_flow_amber_num": 1,
+ },
+
+ "otp_reboot_judge_file": {
+ "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+ "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+ },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile
new file mode 100644
index 000000000000..0a1798579e1c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile
@@ -0,0 +1,13 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+
+obj-m += wb_pcie_dev_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_fpga_i2c_bus_device.o
+obj-m += wb_fpga_pca954x_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_wdt_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c
new file mode 100644
index 000000000000..4b8f3f53788f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c
@@ -0,0 +1,993 @@
+/*
+ * An wb_fpga_i2c_bus_device driver for fpga i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_fpga_i2c_debug = 0;
+static int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_fpga_i2c_debug) { \
+ printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_fpga_i2c_error) { \
+ printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data0 = {
+ .adap_nr = 3,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x500,
+ .i2c_filter = 0x504,
+ .i2c_stretch = 0x508,
+ .i2c_ext_9548_exits_flag = 0x50c,
+ .i2c_ext_9548_addr = 0x510,
+ .i2c_ext_9548_chan = 0x514,
+ .i2c_in_9548_chan = 0x518,
+ .i2c_slave = 0x51c,
+ .i2c_reg = 0x520,
+ .i2c_reg_len = 0x530,
+ .i2c_data_len = 0x534,
+ .i2c_ctrl = 0x538,
+ .i2c_status = 0x53c,
+ .i2c_data_buf = 0x580,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x80,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data1 = {
+ .adap_nr = 4,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x600,
+ .i2c_filter = 0x604,
+ .i2c_stretch = 0x608,
+ .i2c_ext_9548_exits_flag = 0x60c,
+ .i2c_ext_9548_addr = 0x610,
+ .i2c_ext_9548_chan = 0x614,
+ .i2c_in_9548_chan = 0x618,
+ .i2c_slave = 0x61c,
+ .i2c_reg = 0x620,
+ .i2c_reg_len = 0x630,
+ .i2c_data_len = 0x634,
+ .i2c_ctrl = 0x638,
+ .i2c_status = 0x63c,
+ .i2c_data_buf = 0x680,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x84,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data2 = {
+ .adap_nr = 5,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x700,
+ .i2c_filter = 0x704,
+ .i2c_stretch = 0x708,
+ .i2c_ext_9548_exits_flag = 0x70c,
+ .i2c_ext_9548_addr = 0x710,
+ .i2c_ext_9548_chan = 0x714,
+ .i2c_in_9548_chan = 0x718,
+ .i2c_slave = 0x71c,
+ .i2c_reg = 0x720,
+ .i2c_reg_len = 0x730,
+ .i2c_data_len = 0x734,
+ .i2c_ctrl = 0x738,
+ .i2c_status = 0x73c,
+ .i2c_data_buf = 0x780,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x88,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data3 = {
+ .adap_nr = 6,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x16800,
+ .i2c_filter = 0x16804,
+ .i2c_stretch = 0x16808,
+ .i2c_ext_9548_exits_flag = 0x1680c,
+ .i2c_ext_9548_addr = 0x16810,
+ .i2c_ext_9548_chan = 0x16814,
+ .i2c_in_9548_chan = 0x16818,
+ .i2c_slave = 0x1681c,
+ .i2c_reg = 0x16820,
+ .i2c_reg_len = 0x16830,
+ .i2c_data_len = 0x16834,
+ .i2c_ctrl = 0x16838,
+ .i2c_status = 0x1683c,
+ .i2c_data_buf = 0x16900,
+ .i2c_data_buf_len = 256,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x8c,
+ .i2c_reset_on = 0x0000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data4 = {
+ .adap_nr = 7,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x900,
+ .i2c_filter = 0x904,
+ .i2c_stretch = 0x908,
+ .i2c_ext_9548_exits_flag = 0x90c,
+ .i2c_ext_9548_addr = 0x910,
+ .i2c_ext_9548_chan = 0x914,
+ .i2c_in_9548_chan = 0x918,
+ .i2c_slave = 0x91c,
+ .i2c_reg = 0x920,
+ .i2c_reg_len = 0x930,
+ .i2c_data_len = 0x934,
+ .i2c_ctrl = 0x938,
+ .i2c_status = 0x93c,
+ .i2c_data_buf = 0x980,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0xac,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data5 = {
+ .adap_nr = 8,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xf00,
+ .i2c_filter = 0xf04,
+ .i2c_stretch = 0xf08,
+ .i2c_ext_9548_exits_flag = 0xf0c,
+ .i2c_ext_9548_addr = 0xf10,
+ .i2c_ext_9548_chan = 0xf14,
+ .i2c_in_9548_chan = 0xf18,
+ .i2c_slave = 0xf1c,
+ .i2c_reg = 0xf20,
+ .i2c_reg_len = 0xf30,
+ .i2c_data_len = 0xf34,
+ .i2c_ctrl = 0xf38,
+ .i2c_status = 0xf3c,
+ .i2c_data_buf = 0xf80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0xac,
+ .i2c_reset_on = 0x00000002,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data0 = {
+ .adap_nr = 9,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2c00,
+ .i2c_filter = 0x2c04,
+ .i2c_stretch = 0x2c08,
+ .i2c_ext_9548_exits_flag = 0x2c0c,
+ .i2c_ext_9548_addr = 0x2c10,
+ .i2c_ext_9548_chan = 0x2c14,
+ .i2c_in_9548_chan = 0x2c18,
+ .i2c_slave = 0x2c1c,
+ .i2c_reg = 0x2c20,
+ .i2c_reg_len = 0x2c30,
+ .i2c_data_len = 0x2c34,
+ .i2c_ctrl = 0x2c38,
+ .i2c_status = 0x2c3c,
+ .i2c_data_buf = 0x2c80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data1 = {
+ .adap_nr = 10,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2d00,
+ .i2c_filter = 0x2d04,
+ .i2c_stretch = 0x2d08,
+ .i2c_ext_9548_exits_flag = 0x2d0c,
+ .i2c_ext_9548_addr = 0x2d10,
+ .i2c_ext_9548_chan = 0x2d14,
+ .i2c_in_9548_chan = 0x2d18,
+ .i2c_slave = 0x2d1c,
+ .i2c_reg = 0x2d20,
+ .i2c_reg_len = 0x2d30,
+ .i2c_data_len = 0x2d34,
+ .i2c_ctrl = 0x2d38,
+ .i2c_status = 0x2d3c,
+ .i2c_data_buf = 0x2d80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000002,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data2 = {
+ .adap_nr = 11,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2e00,
+ .i2c_filter = 0x2e04,
+ .i2c_stretch = 0x2e08,
+ .i2c_ext_9548_exits_flag = 0x2e0c,
+ .i2c_ext_9548_addr = 0x2e10,
+ .i2c_ext_9548_chan = 0x2e14,
+ .i2c_in_9548_chan = 0x2e18,
+ .i2c_slave = 0x2e1c,
+ .i2c_reg = 0x2e20,
+ .i2c_reg_len = 0x2e30,
+ .i2c_data_len = 0x2e34,
+ .i2c_ctrl = 0x2e38,
+ .i2c_status = 0x2e3c,
+ .i2c_data_buf = 0x2e80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000004,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data3 = {
+ .adap_nr = 12,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2f00,
+ .i2c_filter = 0x2f04,
+ .i2c_stretch = 0x2f08,
+ .i2c_ext_9548_exits_flag = 0x2f0c,
+ .i2c_ext_9548_addr = 0x2f10,
+ .i2c_ext_9548_chan = 0x2f14,
+ .i2c_in_9548_chan = 0x2f18,
+ .i2c_slave = 0x2f1c,
+ .i2c_reg = 0x2f20,
+ .i2c_reg_len = 0x2f30,
+ .i2c_data_len = 0x2f34,
+ .i2c_ctrl = 0x2f38,
+ .i2c_status = 0x2f3c,
+ .i2c_data_buf = 0x2f80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000008,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data4 = {
+ .adap_nr = 13,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3000,
+ .i2c_filter = 0x3004,
+ .i2c_stretch = 0x3008,
+ .i2c_ext_9548_exits_flag = 0x300c,
+ .i2c_ext_9548_addr = 0x3010,
+ .i2c_ext_9548_chan = 0x3014,
+ .i2c_in_9548_chan = 0x3018,
+ .i2c_slave = 0x301c,
+ .i2c_reg = 0x3020,
+ .i2c_reg_len = 0x3030,
+ .i2c_data_len = 0x3034,
+ .i2c_ctrl = 0x3038,
+ .i2c_status = 0x303c,
+ .i2c_data_buf = 0x3080,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000010,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data5 = {
+ .adap_nr = 14,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3100,
+ .i2c_filter = 0x3104,
+ .i2c_stretch = 0x3108,
+ .i2c_ext_9548_exits_flag = 0x310c,
+ .i2c_ext_9548_addr = 0x3110,
+ .i2c_ext_9548_chan = 0x3114,
+ .i2c_in_9548_chan = 0x3118,
+ .i2c_slave = 0x311c,
+ .i2c_reg = 0x3120,
+ .i2c_reg_len = 0x3130,
+ .i2c_data_len = 0x3134,
+ .i2c_ctrl = 0x3138,
+ .i2c_status = 0x313c,
+ .i2c_data_buf = 0x3180,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000020,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data6 = {
+ .adap_nr = 15,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3200,
+ .i2c_filter = 0x3204,
+ .i2c_stretch = 0x3208,
+ .i2c_ext_9548_exits_flag = 0x320c,
+ .i2c_ext_9548_addr = 0x3210,
+ .i2c_ext_9548_chan = 0x3214,
+ .i2c_in_9548_chan = 0x3218,
+ .i2c_slave = 0x321c,
+ .i2c_reg = 0x3220,
+ .i2c_reg_len = 0x3230,
+ .i2c_data_len = 0x3234,
+ .i2c_ctrl = 0x3238,
+ .i2c_status = 0x323c,
+ .i2c_data_buf = 0x3280,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000040,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data7 = {
+ .adap_nr = 16,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3300,
+ .i2c_filter = 0x3304,
+ .i2c_stretch = 0x3308,
+ .i2c_ext_9548_exits_flag = 0x330c,
+ .i2c_ext_9548_addr = 0x3310,
+ .i2c_ext_9548_chan = 0x3314,
+ .i2c_in_9548_chan = 0x3318,
+ .i2c_slave = 0x331c,
+ .i2c_reg = 0x3320,
+ .i2c_reg_len = 0x3330,
+ .i2c_data_len = 0x3334,
+ .i2c_ctrl = 0x3338,
+ .i2c_status = 0x333c,
+ .i2c_data_buf = 0x3380,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000080,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data8 = {
+ .adap_nr = 17,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3400,
+ .i2c_filter = 0x3404,
+ .i2c_stretch = 0x3408,
+ .i2c_ext_9548_exits_flag = 0x340c,
+ .i2c_ext_9548_addr = 0x3410,
+ .i2c_ext_9548_chan = 0x3414,
+ .i2c_in_9548_chan = 0x3418,
+ .i2c_slave = 0x341c,
+ .i2c_reg = 0x3420,
+ .i2c_reg_len = 0x3430,
+ .i2c_data_len = 0x3434,
+ .i2c_ctrl = 0x3438,
+ .i2c_status = 0x343c,
+ .i2c_data_buf = 0x3480,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000100,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data9 = {
+ .adap_nr = 18,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3500,
+ .i2c_filter = 0x3504,
+ .i2c_stretch = 0x3508,
+ .i2c_ext_9548_exits_flag = 0x350c,
+ .i2c_ext_9548_addr = 0x3510,
+ .i2c_ext_9548_chan = 0x3514,
+ .i2c_in_9548_chan = 0x3518,
+ .i2c_slave = 0x351c,
+ .i2c_reg = 0x3520,
+ .i2c_reg_len = 0x3530,
+ .i2c_data_len = 0x3534,
+ .i2c_ctrl = 0x3538,
+ .i2c_status = 0x353c,
+ .i2c_data_buf = 0x3580,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000200,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data10 = {
+ .adap_nr = 19,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3600,
+ .i2c_filter = 0x3604,
+ .i2c_stretch = 0x3608,
+ .i2c_ext_9548_exits_flag = 0x360c,
+ .i2c_ext_9548_addr = 0x3610,
+ .i2c_ext_9548_chan = 0x3614,
+ .i2c_in_9548_chan = 0x3618,
+ .i2c_slave = 0x361c,
+ .i2c_reg = 0x3620,
+ .i2c_reg_len = 0x3630,
+ .i2c_data_len = 0x3634,
+ .i2c_ctrl = 0x3638,
+ .i2c_status = 0x363c,
+ .i2c_data_buf = 0x3680,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000400,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data11 = {
+ .adap_nr = 20,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3700,
+ .i2c_filter = 0x3704,
+ .i2c_stretch = 0x3708,
+ .i2c_ext_9548_exits_flag = 0x370c,
+ .i2c_ext_9548_addr = 0x3710,
+ .i2c_ext_9548_chan = 0x3714,
+ .i2c_in_9548_chan = 0x3718,
+ .i2c_slave = 0x371c,
+ .i2c_reg = 0x3720,
+ .i2c_reg_len = 0x3730,
+ .i2c_data_len = 0x3734,
+ .i2c_ctrl = 0x3738,
+ .i2c_status = 0x373c,
+ .i2c_data_buf = 0x3780,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000800,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data12 = {
+ .adap_nr = 21,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3800,
+ .i2c_filter = 0x3804,
+ .i2c_stretch = 0x3808,
+ .i2c_ext_9548_exits_flag = 0x380c,
+ .i2c_ext_9548_addr = 0x3810,
+ .i2c_ext_9548_chan = 0x3814,
+ .i2c_in_9548_chan = 0x3818,
+ .i2c_slave = 0x381c,
+ .i2c_reg = 0x3820,
+ .i2c_reg_len = 0x3830,
+ .i2c_data_len = 0x3834,
+ .i2c_ctrl = 0x3838,
+ .i2c_status = 0x383c,
+ .i2c_data_buf = 0x3880,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00001000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data13 = {
+ .adap_nr = 22,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3900,
+ .i2c_filter = 0x3904,
+ .i2c_stretch = 0x3908,
+ .i2c_ext_9548_exits_flag = 0x390c,
+ .i2c_ext_9548_addr = 0x3910,
+ .i2c_ext_9548_chan = 0x3914,
+ .i2c_in_9548_chan = 0x3918,
+ .i2c_slave = 0x391c,
+ .i2c_reg = 0x3920,
+ .i2c_reg_len = 0x3930,
+ .i2c_data_len = 0x3934,
+ .i2c_ctrl = 0x3938,
+ .i2c_status = 0x393c,
+ .i2c_data_buf = 0x3980,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00002000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data14 = {
+ .adap_nr = 23,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3a00,
+ .i2c_filter = 0x3a04,
+ .i2c_stretch = 0x3a08,
+ .i2c_ext_9548_exits_flag = 0x3a0c,
+ .i2c_ext_9548_addr = 0x3a10,
+ .i2c_ext_9548_chan = 0x3a14,
+ .i2c_in_9548_chan = 0x3a18,
+ .i2c_slave = 0x3a1c,
+ .i2c_reg = 0x3a20,
+ .i2c_reg_len = 0x3a30,
+ .i2c_data_len = 0x3a34,
+ .i2c_ctrl = 0x3a38,
+ .i2c_status = 0x3a3c,
+ .i2c_data_buf = 0x3a80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00004000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data15 = {
+ .adap_nr = 24,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3b00,
+ .i2c_filter = 0x3b04,
+ .i2c_stretch = 0x3b08,
+ .i2c_ext_9548_exits_flag = 0x3b0c,
+ .i2c_ext_9548_addr = 0x3b10,
+ .i2c_ext_9548_chan = 0x3b14,
+ .i2c_in_9548_chan = 0x3b18,
+ .i2c_slave = 0x3b1c,
+ .i2c_reg = 0x3b20,
+ .i2c_reg_len = 0x3b30,
+ .i2c_data_len = 0x3b34,
+ .i2c_ctrl = 0x3b38,
+ .i2c_status = 0x3b3c,
+ .i2c_data_buf = 0x3b80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00008000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data16 = {
+ .adap_nr = 25,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x3c00,
+ .i2c_filter = 0x3c04,
+ .i2c_stretch = 0x3c08,
+ .i2c_ext_9548_exits_flag = 0x3c0c,
+ .i2c_ext_9548_addr = 0x3c10,
+ .i2c_ext_9548_chan = 0x3c14,
+ .i2c_in_9548_chan = 0x3c18,
+ .i2c_slave = 0x3c1c,
+ .i2c_reg = 0x3c20,
+ .i2c_reg_len = 0x3c30,
+ .i2c_data_len = 0x3c34,
+ .i2c_ctrl = 0x3c38,
+ .i2c_status = 0x3c3c,
+ .i2c_data_buf = 0x3c80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 2,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00010000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+
+static void wb_fpga_i2c_bus_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device fpga_i2c_bus_device[] = {
+ {
+ .name = "wb-fpga-i2c",
+ .id = 1,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 2,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 3,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data2,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 4,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data3,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 5,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data4,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 6,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data5,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 7,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 8,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 9,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data2,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 10,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data3,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 11,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data4,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 12,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data5,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 13,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data6,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 14,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data7,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 15,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data8,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 16,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data9,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 17,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data10,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 18,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data11,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 19,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data12,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 20,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data13,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 21,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data14,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 22,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data15,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 23,
+ .dev = {
+ .platform_data = &fpga_mac_dom_device_data16,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+};
+
+static int __init wb_fpga_i2c_bus_device_init(void)
+{
+ int i;
+ int ret = 0;
+ fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+ WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) {
+ fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+ ret = platform_device_register(&fpga_i2c_bus_device[i]);
+ if (ret < 0) {
+ fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1);
+ } else {
+ fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_fpga_i2c_bus_device_exit(void)
+{
+ int i;
+ fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+ WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) {
+ fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+ if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&fpga_i2c_bus_device[i]);
+ }
+ }
+}
+
+module_init(wb_fpga_i2c_bus_device_init);
+module_exit(wb_fpga_i2c_bus_device_exit);
+MODULE_DESCRIPTION("FPGA I2C Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c
new file mode 100644
index 000000000000..4e442d85440a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c
@@ -0,0 +1,413 @@
+/*
+ * An wb_fpga_pca954x_device driver for fpga pca954x device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_fpga_pca954x_device_debug = 0;
+static int g_wb_fpga_pca954x_device_error = 0;
+
+module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_fpga_pca954x_device_debug) { \
+ printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_fpga_pca954x_device_error) { \
+ printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+
+static fpga_pca954x_device_t fpga_pca954x_device_data1 = {
+ .i2c_bus = 3,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 26,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data2 = {
+ .i2c_bus = 4,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 27,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data3 = {
+ .i2c_bus = 27,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 39,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data4 = {
+ .i2c_bus =5,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 28,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data5 = {
+ .i2c_bus = 28,
+ .i2c_addr = 0x71,
+ .pca9548_base_nr = 47,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data6 = {
+ .i2c_bus = 6,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 29,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data7 = {
+ .i2c_bus = 29,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 55,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data8 = {
+ .i2c_bus = 7,
+ .i2c_addr = 0x71,
+ .pca9548_base_nr = 30,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data9 = {
+ .i2c_bus = 8,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr =38,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data10 = {
+ .i2c_bus = 9,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 63,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data11 = {
+ .i2c_bus = 10,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 65,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data12 = {
+ .i2c_bus = 11,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 67,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data13 = {
+ .i2c_bus = 12,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 69,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data14 = {
+ .i2c_bus = 13,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 71,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data15 = {
+ .i2c_bus = 14,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 73,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data16 = {
+ .i2c_bus = 15,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 75,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data17 = {
+ .i2c_bus = 16,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 77,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data18 = {
+ .i2c_bus = 17,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 79,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data19 = {
+ .i2c_bus = 18,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 81,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data20 = {
+ .i2c_bus = 19,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 83,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data21 = {
+ .i2c_bus = 20,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 85,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data22 = {
+ .i2c_bus = 21,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 87,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data23 = {
+ .i2c_bus = 22,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 89,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data24 = {
+ .i2c_bus = 23,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 91,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data25 = {
+ .i2c_bus = 24,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 93,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data26 = {
+ .i2c_bus = 25,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 95,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+struct i2c_board_info fpga_pca954x_device_info[] = {
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data1,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data2,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data3,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data4,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data5,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data6,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data7,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data8,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data9,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data10,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data11,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data12,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data13,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data14,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data15,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data16,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data17,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data18,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data19,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data20,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data21,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data22,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data23,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data24,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data25,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data26,
+ },
+};
+
+static int __init wb_fpga_pca954x_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+ WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) {
+ fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+ fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr;
+ adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus);
+ if (adap == NULL) {
+ fpga_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]);
+ if (!client) {
+ fpga_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n",
+ fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus);
+ } else {
+ fpga_pca954x_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_fpga_pca954x_device_exit(void)
+{
+ int i;
+ fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+ WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) {
+ fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+ if (fpga_pca954x_device_data->client) {
+ i2c_unregister_device(fpga_pca954x_device_data->client);
+ fpga_pca954x_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_fpga_pca954x_device_init);
+module_exit(wb_fpga_pca954x_device_exit);
+MODULE_DESCRIPTION("FPGA PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..9a3aef32977b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,146 @@
+/*
+ * An wb_i2c_dev_device driver for i2c dev device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_i2c_dev_device_debug) { \
+ printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_i2c_dev_device_error) { \
+ printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+ .i2c_bus = 26,
+ .i2c_addr = 0x1d,
+ .i2c_name = "cpld2",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+ .i2c_bus = 26,
+ .i2c_addr = 0x2d,
+ .i2c_name = "cpld3",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+ .i2c_bus = 28,
+ .i2c_addr = 0x3d,
+ .i2c_name = "cpld4",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+
+struct i2c_board_info i2c_dev_device_info[] = {
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data0,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data1,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data2,
+ },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ i2c_dev_device_t *i2c_dev_device_data;
+
+ WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+ i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+ i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+ adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+ if (adap == NULL) {
+ i2c_dev_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+ if (!client) {
+ i2c_dev_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+ i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+ } else {
+ i2c_dev_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+ int i;
+ i2c_dev_device_t *i2c_dev_device_data;
+
+ WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+ i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+ if (i2c_dev_device_data->client) {
+ i2c_unregister_device(i2c_dev_device_data->client);
+ i2c_dev_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..76b86a2d47ea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,123 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_io_dev_device_debug) { \
+ printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_io_dev_device_error) { \
+ printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+ .io_dev_name = "cpld0",
+ .io_base = 0x700,
+ .io_len = 0x100,
+ .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+ .io_dev_name = "cpld1",
+ .io_base = 0x900,
+ .io_len = 0x100,
+ .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device io_dev_device[] = {
+ {
+ .name = "wb-io-dev",
+ .id = 1,
+ .dev = {
+ .platform_data = &io_dev_device_data0,
+ .release = wb_io_dev_device_release,
+ },
+ },
+ {
+ .name = "wb-io-dev",
+ .id = 2,
+ .dev = {
+ .platform_data = &io_dev_device_data1,
+ .release = wb_io_dev_device_release,
+ },
+ },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+ int i;
+ int ret = 0;
+ io_dev_device_t *io_dev_device_data;
+
+ WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+ io_dev_device_data = io_dev_device[i].dev.platform_data;
+ ret = platform_device_register(&io_dev_device[i]);
+ if (ret < 0) {
+ io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+ } else {
+ io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+ int i;
+ io_dev_device_t *io_dev_device_data;
+
+ WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+ io_dev_device_data = io_dev_device[i].dev.platform_data;
+ if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&io_dev_device[i]);
+ }
+ }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..27dbd87d71b2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,150 @@
+/*
+ * An wb_lpc_drv_device driver for lpc device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_lpc_drv_device_debug) { \
+ printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_lpc_drv_device_error) { \
+ printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+ .lpc_io_name = "wb_lpc",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x00,
+ .pci_slot = 0x1f,
+ .pci_fn = 0,
+ .lpc_io_base = 0x700,
+ .lpc_io_size = 0x100,
+ .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+ .lpc_io_name = "wb_lpc",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x00,
+ .pci_slot = 0x1f,
+ .pci_fn = 0,
+ .lpc_io_base = 0x900,
+ .lpc_io_size = 0x100,
+ .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+ .lpc_io_name = "wb_lpc",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x00,
+ .pci_slot = 0x1f,
+ .pci_fn = 0,
+ .lpc_io_base = 0xb00,
+ .lpc_io_size = 0x100,
+ .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+ {
+ .name = "wb-lpc",
+ .id = 1,
+ .dev = {
+ .platform_data = &lpc_drv_device_data_0,
+ .release = wb_lpc_drv_device_release,
+ },
+ },
+ {
+ .name = "wb-lpc",
+ .id = 2,
+ .dev = {
+ .platform_data = &lpc_drv_device_data_1,
+ .release = wb_lpc_drv_device_release,
+ },
+ },
+ {
+ .name = "wb-lpc",
+ .id = 3,
+ .dev = {
+ .platform_data = &lpc_drv_device_data_2,
+ .release = wb_lpc_drv_device_release,
+ },
+ },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+ int i;
+ int ret = 0;
+ lpc_drv_device_t *lpc_drv_device_data;
+
+ WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+ lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+ ret = platform_device_register(&lpc_drv_device[i]);
+ if (ret < 0) {
+ lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+ } else {
+ lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+ int i;
+ lpc_drv_device_t *lpc_drv_device_data;
+
+ WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+ lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+ if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&lpc_drv_device[i]);
+ }
+ }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..4523c9f33c13
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,113 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_pcie_dev_device_debug) { \
+ printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_pcie_dev_device_error) { \
+ printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+ .pci_dev_name = "fpga0",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x04,
+ .pci_slot = 0x00,
+ .pci_fn = 0,
+ .pci_bar = 0,
+ .bus_width = 4,
+ .upg_ctrl_base = 0xa00,
+ .upg_flash_base = 0x2f0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+ {
+ .name = "wb-pci-dev",
+ .id = 1,
+ .dev = {
+ .platform_data = &pcie_dev_device_data0,
+ .release = wb_pcie_dev_device_release,
+ },
+ },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+ int i;
+ int ret = 0;
+ pci_dev_device_t *pcie_dev_device_data;
+
+ WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+ pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+ ret = platform_device_register(&pcie_dev_device[i]);
+ if (ret < 0) {
+ pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+ } else {
+ pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+ int i;
+ pci_dev_device_t *pcie_dev_device_data;
+
+ WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+ pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+ if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&pcie_dev_device[i]);
+ }
+ }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c
new file mode 100644
index 000000000000..e29610c906e8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c
@@ -0,0 +1,155 @@
+/*
+ * An wb_wdt_device driver for watchdog device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_wdt_device_debug = 0;
+static int g_wb_wdt_device_error = 0;
+
+module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_wdt_device_debug) { \
+ printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_wdt_device_error) { \
+ printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static wb_wdt_device_t wb_wdt_device_data_0 = {
+ .feed_wdt_type = 2,
+ .hw_margin = 180000,
+ .feed_time = 30000,
+ .config_dev_name = "/dev/cpld3",
+ .config_mode = 2,
+ .priv_func_mode = 4,
+ .enable_reg = 0xf2,
+ .enable_val = 0x1,
+ .disable_val = 0x0,
+ .enable_mask = 0x1,
+ .timeout_cfg_reg = 0xf3,
+ .hw_algo = "toggle",
+ .wdt_config_mode.logic_wdt = {
+ .feed_dev_name = "/dev/cpld3",
+ .feed_reg = 0xf2,
+ .active_val = 0x1,
+ .logic_func_mode = 0x1,
+ },
+ .timer_accuracy = 6000, /* 6s */
+ .sysfs_index = SYSFS_NO_CFG,
+};
+
+static wb_wdt_device_t wb_wdt_device_data_1 = {
+ .feed_wdt_type = 1,
+ .hw_margin = 90000,
+ .feed_time = 9000,
+ .config_dev_name = "/dev/cpld1",
+ .config_mode = 2,
+ .priv_func_mode = 3,
+ .enable_reg = 0x4f,
+ .enable_val = 0x1,
+ .disable_val = 0x0,
+ .enable_mask = 0x1,
+ .timeout_cfg_reg = 0x50,
+ .hw_algo = "level",
+ .wdt_config_mode.logic_wdt = {
+ .feed_dev_name = "/dev/cpld1",
+ .feed_reg = 0xac,
+ .active_val = 0x0,
+ .logic_func_mode = 0x3,
+ },
+ .timer_accuracy = 1600, /* 1.6s */
+ .sysfs_index = SYSFS_NO_CFG,
+};
+
+static void wb_wdt_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device wb_wdt_device[] = {
+ {
+ .name = "wb_wdt",
+ .id = 0,
+ .dev = {
+ .platform_data = &wb_wdt_device_data_0,
+ .release = wb_wdt_device_release,
+ },
+ },
+ {
+ .name = "wb_wdt",
+ .id = 1,
+ .dev = {
+ .platform_data = &wb_wdt_device_data_1,
+ .release = wb_wdt_device_release,
+ },
+ },
+};
+
+static int __init wb_wdt_device_init(void)
+{
+ int i;
+ int ret = 0;
+ wb_wdt_device_t *wb_wdt_device_data;
+
+ WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) {
+ wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+ ret = platform_device_register(&wb_wdt_device[i]);
+ if (ret < 0) {
+ wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1);
+ } else {
+ wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_wdt_device_exit(void)
+{
+ int i;
+ wb_wdt_device_t *wb_wdt_device_data;
+
+ WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) {
+ wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+ if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&wb_wdt_device[i]);
+ }
+ }
+}
+
+module_init(wb_wdt_device_init);
+module_exit(wb_wdt_device_exit);
+MODULE_DESCRIPTION("WB WDT Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..67412066e392
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,35 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=26
+cpld_i2c_dev.addr_0_2=0x1d
+cpld_i2c_dev.bus_0_3=26
+cpld_i2c_dev.addr_0_3=0x2d
+cpld_i2c_dev.bus_0_4=28
+cpld_i2c_dev.addr_0_4=0x3d
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=12
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..7ac4aa4195a4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,435 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=6
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00040037
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=5
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00040037
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=4
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00040037
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=3
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00040037
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=2
+
+dev_present_status.mode_1_5=config
+dev_present_status.src_1_5=cpld
+dev_present_status.frmt_1_5=bit
+dev_present_status.pola_1_5=negative
+dev_present_status.addr_1_5=0x00040037
+dev_present_status.len_1_5=1
+dev_present_status.bit_offset_1_5=1
+
+dev_present_status.mode_1_6=config
+dev_present_status.src_1_6=cpld
+dev_present_status.frmt_1_6=bit
+dev_present_status.pola_1_6=negative
+dev_present_status.addr_1_6=0x00040037
+dev_present_status.len_1_6=1
+dev_present_status.bit_offset_1_6=0
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00040065
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00040065
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00040064
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00040064
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00040063
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00040063
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00040062
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00040062
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
+
+fan_ratio.mode_5_0=config
+fan_ratio.int_cons_5_0=
+fan_ratio.src_5_0=cpld
+fan_ratio.frmt_5_0=byte
+fan_ratio.pola_5_0=
+fan_ratio.fpath_5_0=
+fan_ratio.addr_5_0=0x00040061
+fan_ratio.len_5_0=1
+fan_ratio.bit_offset_5_0=
+
+fan_ratio.mode_5_1=config
+fan_ratio.int_cons_5_1=
+fan_ratio.src_5_1=cpld
+fan_ratio.frmt_5_1=byte
+fan_ratio.pola_5_1=
+fan_ratio.fpath_5_1=
+fan_ratio.addr_5_1=0x00040061
+fan_ratio.len_5_1=1
+fan_ratio.bit_offset_5_1=
+
+fan_ratio.mode_6_0=config
+fan_ratio.int_cons_6_0=
+fan_ratio.src_6_0=cpld
+fan_ratio.frmt_6_0=byte
+fan_ratio.pola_6_0=
+fan_ratio.fpath_6_0=
+fan_ratio.addr_6_0=0x00040060
+fan_ratio.len_6_0=1
+fan_ratio.bit_offset_6_0=
+
+fan_ratio.mode_6_1=config
+fan_ratio.int_cons_6_1=
+fan_ratio.src_6_1=cpld
+fan_ratio.frmt_6_1=byte
+fan_ratio.pola_6_1=
+fan_ratio.fpath_6_1=
+fan_ratio.addr_6_1=0x00040060
+fan_ratio.len_6_1=1
+fan_ratio.bit_offset_6_1=
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00040038
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=5
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00040039
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=5
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00040038
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=4
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00040039
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=4
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00040038
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=3
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00040039
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=3
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00040038
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=2
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00040039
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=2
+
+fan_roll_status.mode_5_0=config
+fan_roll_status.int_cons_5_0=
+fan_roll_status.src_5_0=cpld
+fan_roll_status.frmt_5_0=bit
+fan_roll_status.pola_5_0=positive
+fan_roll_status.fpath_5_0=
+fan_roll_status.addr_5_0=0x00040038
+fan_roll_status.len_5_0=1
+fan_roll_status.bit_offset_5_0=1
+
+fan_roll_status.mode_5_1=config
+fan_roll_status.int_cons_5_1=
+fan_roll_status.src_5_1=cpld
+fan_roll_status.frmt_5_1=bit
+fan_roll_status.pola_5_1=positive
+fan_roll_status.fpath_5_1=
+fan_roll_status.addr_5_1=0x00040039
+fan_roll_status.len_5_1=1
+fan_roll_status.bit_offset_5_1=1
+
+fan_roll_status.mode_6_0=config
+fan_roll_status.int_cons_6_0=
+fan_roll_status.src_6_0=cpld
+fan_roll_status.frmt_6_0=bit
+fan_roll_status.pola_6_0=positive
+fan_roll_status.fpath_6_0=
+fan_roll_status.addr_6_0=0x00040038
+fan_roll_status.len_6_0=1
+fan_roll_status.bit_offset_6_0=0
+
+fan_roll_status.mode_6_1=config
+fan_roll_status.int_cons_6_1=
+fan_roll_status.src_6_1=cpld
+fan_roll_status.frmt_6_1=bit
+fan_roll_status.pola_6_1=positive
+fan_roll_status.fpath_6_1=
+fan_roll_status.addr_6_1=0x00040039
+fan_roll_status.len_6_1=1
+fan_roll_status.bit_offset_6_1=0
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x00040070
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x0004007c
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0004006e
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x0004007a
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0004006c
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00040078
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x0004006a
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x00040076
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+fan_speed.mode_5_0=config
+fan_speed.int_cons_5_0=
+fan_speed.src_5_0=cpld
+fan_speed.frmt_5_0=num_bytes
+fan_speed.pola_5_0=negative
+fan_speed.fpath_5_0=
+fan_speed.addr_5_0=0x00040068
+fan_speed.len_5_0=2
+fan_speed.bit_offset_5_0=
+
+fan_speed.mode_5_1=config
+fan_speed.int_cons_5_1=
+fan_speed.src_5_1=cpld
+fan_speed.frmt_5_1=num_bytes
+fan_speed.pola_5_1=negative
+fan_speed.fpath_5_1=
+fan_speed.addr_5_1=0x00040074
+fan_speed.len_5_1=2
+fan_speed.bit_offset_5_1=
+
+fan_speed.mode_6_0=config
+fan_speed.int_cons_6_0=
+fan_speed.src_6_0=cpld
+fan_speed.frmt_6_0=num_bytes
+fan_speed.pola_6_0=negative
+fan_speed.fpath_6_0=
+fan_speed.addr_6_0=0x00040066
+fan_speed.len_6_0=2
+fan_speed.bit_offset_6_0=
+
+fan_speed.mode_6_1=config
+fan_speed.int_cons_6_1=
+fan_speed.src_6_1=cpld
+fan_speed.frmt_6_1=num_bytes
+fan_speed.pola_6_1=negative
+fan_speed.fpath_6_1=
+fan_speed.addr_6_1=0x00040072
+fan_speed.len_6_1=2
+fan_speed.bit_offset_6_1=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..1ba326d51d7c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,63 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00020034
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=4
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00020034
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=5
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00020034
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=6
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00020034
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=0
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00020034
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=1
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00020034
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=2
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg
new file mode 100644
index 000000000000..07d9fdf6948d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg
@@ -0,0 +1,295 @@
+
+# Number of temperature sensors on the mainboard
+dev_num_0_1=0
+
+# Number of voltage sensors on the mainboard
+dev_num_0_2=12
+
+
+# in1 MAC_QSFPDD_VDD3.3V_A
+hwmon_in.mode_0x0001_0x00=config
+hwmon_in.int_cons_0x0001_0x00=0
+hwmon_in.src_0x0001_0x00=cpld
+hwmon_in.frmt_0x0001_0x00=num_bytes
+hwmon_in.pola_0x0001_0x00=negative
+hwmon_in.addr_0x0001_0x00=0x00020060
+hwmon_in.len_0x0001_0x00=2
+hwmon_in.int_extra1_0x0001_0x00=0x00020060
+hwmon_in.int_extra2_0x0001_0x00=2000
+hwmon_in.int_extra3_0x0001_0x00=1
+
+hwmon_in.mode_0x0001_0x01=str_constant
+hwmon_in.str_cons_0x0001_0x01=MAC_QSFPDD_VDD3.3V_A
+
+hwmon_in.mode_0x0001_0x02=str_constant
+hwmon_in.str_cons_0x0001_0x02=cpld
+
+hwmon_in.mode_0x0001_0x03=str_constant
+hwmon_in.str_cons_0x0001_0x03=3560
+
+hwmon_in.mode_0x0001_0x05=str_constant
+hwmon_in.str_cons_0x0001_0x05=3040
+
+# in2 MAC_QSFPDD_VDD3.3V_B
+hwmon_in.mode_0x0002_0x00=config
+hwmon_in.int_cons_0x0002_0x00=0
+hwmon_in.src_0x0002_0x00=cpld
+hwmon_in.frmt_0x0002_0x00=num_bytes
+hwmon_in.pola_0x0002_0x00=negative
+hwmon_in.addr_0x0002_0x00=0x00020062
+hwmon_in.len_0x0002_0x00=2
+hwmon_in.int_extra1_0x0002_0x00=0x00020062
+hwmon_in.int_extra2_0x0002_0x00=2000
+hwmon_in.int_extra3_0x0002_0x00=1
+
+hwmon_in.mode_0x0002_0x01=str_constant
+hwmon_in.str_cons_0x0002_0x01=MAC_QSFPDD_VDD3.3V_B
+
+hwmon_in.mode_0x0002_0x02=str_constant
+hwmon_in.str_cons_0x0002_0x02=cpld
+
+hwmon_in.mode_0x0002_0x03=str_constant
+hwmon_in.str_cons_0x0002_0x03=3560
+
+hwmon_in.mode_0x0002_0x05=str_constant
+hwmon_in.str_cons_0x0002_0x05=3040
+
+# in3 MAC_VDD3.3_MON
+hwmon_in.mode_0x0003_0x00=config
+hwmon_in.int_cons_0x0003_0x00=0
+hwmon_in.src_0x0003_0x00=cpld
+hwmon_in.frmt_0x0003_0x00=num_bytes
+hwmon_in.pola_0x0003_0x00=negative
+hwmon_in.addr_0x0003_0x00=0x00020066
+hwmon_in.len_0x0003_0x00=2
+hwmon_in.int_extra1_0x0003_0x00=0x00020066
+hwmon_in.int_extra2_0x0003_0x00=2000
+hwmon_in.int_extra3_0x0003_0x00=1
+
+hwmon_in.mode_0x0003_0x01=str_constant
+hwmon_in.str_cons_0x0003_0x01=MAC_VDD3.3_MON
+
+hwmon_in.mode_0x0003_0x02=str_constant
+hwmon_in.str_cons_0x0003_0x02=cpld
+
+hwmon_in.mode_0x0003_0x03=str_constant
+hwmon_in.str_cons_0x0003_0x03=3465
+
+hwmon_in.mode_0x0003_0x05=str_constant
+hwmon_in.str_cons_0x0003_0x05=3040
+
+# in4 MAC_VDD3.7V_CLK
+hwmon_in.mode_0x0004_0x00=config
+hwmon_in.int_cons_0x0004_0x00=0
+hwmon_in.src_0x0004_0x00=cpld
+hwmon_in.frmt_0x0004_0x00=num_bytes
+hwmon_in.pola_0x0004_0x00=negative
+hwmon_in.addr_0x0004_0x00=0x00020068
+hwmon_in.len_0x0004_0x00=2
+hwmon_in.int_extra1_0x0004_0x00=0x00020068
+hwmon_in.int_extra2_0x0004_0x00=2000
+hwmon_in.int_extra3_0x0004_0x00=1
+
+hwmon_in.mode_0x0004_0x01=str_constant
+hwmon_in.str_cons_0x0004_0x01=MAC_VDD3.7V_CLK
+
+hwmon_in.mode_0x0004_0x02=str_constant
+hwmon_in.str_cons_0x0004_0x02=cpld
+
+hwmon_in.mode_0x0004_0x03=str_constant
+hwmon_in.str_cons_0x0004_0x03=4000
+
+hwmon_in.mode_0x0004_0x05=str_constant
+hwmon_in.str_cons_0x0004_0x05=3500
+
+# in5 MAC_VDD5V_USB
+hwmon_in.mode_0x0005_0x00=config
+hwmon_in.int_cons_0x0005_0x00=0
+hwmon_in.src_0x0005_0x00=cpld
+hwmon_in.frmt_0x0005_0x00=num_bytes
+hwmon_in.pola_0x0005_0x00=negative
+hwmon_in.addr_0x0005_0x00=0x0002006a
+hwmon_in.len_0x0005_0x00=2
+hwmon_in.int_extra1_0x0005_0x00=0x0002006a
+hwmon_in.int_extra2_0x0005_0x00=3000
+hwmon_in.int_extra3_0x0005_0x00=1
+
+hwmon_in.mode_0x0005_0x01=str_constant
+hwmon_in.str_cons_0x0005_0x01=MAC_VDD5V_USB
+
+hwmon_in.mode_0x0005_0x02=str_constant
+hwmon_in.str_cons_0x0005_0x02=cpld
+
+hwmon_in.mode_0x0005_0x03=str_constant
+hwmon_in.str_cons_0x0005_0x03=5500
+
+hwmon_in.mode_0x0005_0x05=str_constant
+hwmon_in.str_cons_0x0005_0x05=4500
+
+# in6 FAN1_VDD12V
+hwmon_in.mode_0x0006_0x00=config
+hwmon_in.int_cons_0x0006_0x00=0
+hwmon_in.src_0x0006_0x00=cpld
+hwmon_in.frmt_0x0006_0x00=num_bytes
+hwmon_in.pola_0x0006_0x00=negative
+hwmon_in.addr_0x0006_0x00=0x00040082
+hwmon_in.len_0x0006_0x00=2
+hwmon_in.int_extra1_0x0006_0x00=0x00040082
+hwmon_in.int_extra2_0x0006_0x00=6000
+hwmon_in.int_extra3_0x0006_0x00=1
+
+hwmon_in.mode_0x0006_0x01=str_constant
+hwmon_in.str_cons_0x0006_0x01=FAN1_VDD12V
+
+hwmon_in.mode_0x0006_0x02=str_constant
+hwmon_in.str_cons_0x0006_0x02=cpld
+
+hwmon_in.mode_0x0006_0x03=str_constant
+hwmon_in.str_cons_0x0006_0x03=12600
+
+hwmon_in.mode_0x0006_0x05=str_constant
+hwmon_in.str_cons_0x0006_0x05=11400
+
+# in7 FAN2_VDD12V
+hwmon_in.mode_0x0007_0x00=config
+hwmon_in.int_cons_0x0007_0x00=0
+hwmon_in.src_0x0007_0x00=cpld
+hwmon_in.frmt_0x0007_0x00=num_bytes
+hwmon_in.pola_0x0007_0x00=negative
+hwmon_in.addr_0x0007_0x00=0x00040080
+hwmon_in.len_0x0007_0x00=2
+hwmon_in.int_extra1_0x0007_0x00=0x00040080
+hwmon_in.int_extra2_0x0007_0x00=6000
+hwmon_in.int_extra3_0x0007_0x00=1
+
+hwmon_in.mode_0x0007_0x01=str_constant
+hwmon_in.str_cons_0x0007_0x01=FAN2_VDD12V
+
+hwmon_in.mode_0x0007_0x02=str_constant
+hwmon_in.str_cons_0x0007_0x02=cpld
+
+hwmon_in.mode_0x0007_0x03=str_constant
+hwmon_in.str_cons_0x0007_0x03=12600
+
+hwmon_in.mode_0x0007_0x05=str_constant
+hwmon_in.str_cons_0x0007_0x05=11400
+
+# in8 FAN3_VDD12V
+hwmon_in.mode_0x0008_0x00=config
+hwmon_in.int_cons_0x0008_0x00=0
+hwmon_in.src_0x0008_0x00=cpld
+hwmon_in.frmt_0x0008_0x00=num_bytes
+hwmon_in.pola_0x0008_0x00=negative
+hwmon_in.addr_0x0008_0x00=0x00040088
+hwmon_in.len_0x0008_0x00=2
+hwmon_in.int_extra1_0x0008_0x00=0x00040088
+hwmon_in.int_extra2_0x0008_0x00=6000
+hwmon_in.int_extra3_0x0008_0x00=1
+
+hwmon_in.mode_0x0008_0x01=str_constant
+hwmon_in.str_cons_0x0008_0x01=FAN3_VDD12V
+
+hwmon_in.mode_0x0008_0x02=str_constant
+hwmon_in.str_cons_0x0008_0x02=cpld
+
+hwmon_in.mode_0x0008_0x03=str_constant
+hwmon_in.str_cons_0x0008_0x03=12600
+
+hwmon_in.mode_0x0008_0x05=str_constant
+hwmon_in.str_cons_0x0008_0x05=11400
+
+# in9 FAN4_VDD12V
+hwmon_in.mode_0x0009_0x00=config
+hwmon_in.int_cons_0x0009_0x00=0
+hwmon_in.src_0x0009_0x00=cpld
+hwmon_in.frmt_0x0009_0x00=num_bytes
+hwmon_in.pola_0x0009_0x00=negative
+hwmon_in.addr_0x0009_0x00=0x0004008a
+hwmon_in.len_0x0009_0x00=2
+hwmon_in.int_extra1_0x0009_0x00=0x0004008a
+hwmon_in.int_extra2_0x0009_0x00=6000
+hwmon_in.int_extra3_0x0009_0x00=1
+
+hwmon_in.mode_0x0009_0x01=str_constant
+hwmon_in.str_cons_0x0009_0x01=FAN4_VDD12V
+
+hwmon_in.mode_0x0009_0x02=str_constant
+hwmon_in.str_cons_0x0009_0x02=cpld
+
+hwmon_in.mode_0x0009_0x03=str_constant
+hwmon_in.str_cons_0x0009_0x03=12600
+
+hwmon_in.mode_0x0009_0x05=str_constant
+hwmon_in.str_cons_0x0009_0x05=11400
+
+# in10 FAN5_VDD12V
+hwmon_in.mode_0x000a_0x00=config
+hwmon_in.int_cons_0x000a_0x00=0
+hwmon_in.src_0x000a_0x00=cpld
+hwmon_in.frmt_0x000a_0x00=num_bytes
+hwmon_in.pola_0x000a_0x00=negative
+hwmon_in.addr_0x000a_0x00=0x00040086
+hwmon_in.len_0x000a_0x00=2
+hwmon_in.int_extra1_0x000a_0x00=0x00040086
+hwmon_in.int_extra2_0x000a_0x00=6000
+hwmon_in.int_extra3_0x000a_0x00=1
+
+hwmon_in.mode_0x000a_0x01=str_constant
+hwmon_in.str_cons_0x000a_0x01=FAN5_VDD12V
+
+hwmon_in.mode_0x000a_0x02=str_constant
+hwmon_in.str_cons_0x000a_0x02=cpld
+
+hwmon_in.mode_0x000a_0x03=str_constant
+hwmon_in.str_cons_0x000a_0x03=12600
+
+hwmon_in.mode_0x000a_0x05=str_constant
+hwmon_in.str_cons_0x000a_0x05=11400
+
+# in11 FAN6_VDD12V
+hwmon_in.mode_0x000b_0x00=config
+hwmon_in.int_cons_0x000b_0x00=0
+hwmon_in.src_0x000b_0x00=cpld
+hwmon_in.frmt_0x000b_0x00=num_bytes
+hwmon_in.pola_0x000b_0x00=negative
+hwmon_in.addr_0x000b_0x00=0x0004008c
+hwmon_in.len_0x000b_0x00=2
+hwmon_in.int_extra1_0x000b_0x00=0x0004008c
+hwmon_in.int_extra2_0x000b_0x00=6000
+hwmon_in.int_extra3_0x000b_0x00=1
+
+hwmon_in.mode_0x000b_0x01=str_constant
+hwmon_in.str_cons_0x000b_0x01=FAN6_VDD12V
+
+hwmon_in.mode_0x000b_0x02=str_constant
+hwmon_in.str_cons_0x000b_0x02=cpld
+
+hwmon_in.mode_0x000b_0x03=str_constant
+hwmon_in.str_cons_0x000b_0x03=12600
+
+hwmon_in.mode_0x000b_0x05=str_constant
+hwmon_in.str_cons_0x000b_0x05=11400
+
+# in12 FAN_VDD3.3V
+hwmon_in.mode_0x000c_0x00=config
+hwmon_in.int_cons_0x000c_0x00=0
+hwmon_in.src_0x000c_0x00=cpld
+hwmon_in.frmt_0x000c_0x00=num_bytes
+hwmon_in.pola_0x000c_0x00=negative
+hwmon_in.addr_0x000c_0x00=0x00040084
+hwmon_in.len_0x000c_0x00=2
+hwmon_in.int_extra1_0x000c_0x00=0x00040084
+hwmon_in.int_extra2_0x000c_0x00=2000
+hwmon_in.int_extra3_0x000c_0x00=1
+
+hwmon_in.mode_0x000c_0x01=str_constant
+hwmon_in.str_cons_0x000c_0x01=FAN_VDD3.3V
+
+hwmon_in.mode_0x000c_0x02=str_constant
+hwmon_in.str_cons_0x000c_0x02=cpld
+
+hwmon_in.mode_0x000c_0x03=str_constant
+hwmon_in.str_cons_0x000c_0x03=3560
+
+hwmon_in.mode_0x000c_0x05=str_constant
+hwmon_in.str_cons_0x000c_0x05=3040
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..4876a92c007b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,323 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=34
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff1
+sff_dir_name_2 =sff2
+sff_dir_name_3 =sff3
+sff_dir_name_4 =sff4
+sff_dir_name_5 =sff5
+sff_dir_name_6 =sff6
+sff_dir_name_7 =sff7
+sff_dir_name_8 =sff8
+sff_dir_name_9 =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+sff_dir_name_33 =sff33
+sff_dir_name_34 =sff34
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x0003004e
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=2
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x0003004e
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=3
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x0003004e
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=0
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x0003004e
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=1
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x0003004e
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=4
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x0003004e
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=5
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x0003004e
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=6
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x0003004e
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=7
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x0003004f
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=0
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x0003004f
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=1
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x0003004f
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=2
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x0003004f
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=3
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x0003004f
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=4
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x0003004f
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=5
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x0003004f
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x0003004f
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00020032
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00020032
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00020032
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=2
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00020032
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=3
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00020032
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=4
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00020032
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=5
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00020032
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=6
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00020032
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=7
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00020033
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=0
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00020033
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=1
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00020033
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=2
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00020033
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=3
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00020033
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=6
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00020033
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=7
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00020033
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=4
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00020033
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=5
+
+sff_cpld_reg.mode_33_8=config
+sff_cpld_reg.src_33_8=cpld
+sff_cpld_reg.frmt_33_8=bit
+sff_cpld_reg.pola_33_8=negative
+sff_cpld_reg.addr_33_8=0x00020046
+sff_cpld_reg.len_33_8=1
+sff_cpld_reg.bit_offset_33_8=1
+
+sff_cpld_reg.mode_34_8=config
+sff_cpld_reg.src_34_8=cpld
+sff_cpld_reg.frmt_34_8=bit
+sff_cpld_reg.pola_34_8=negative
+sff_cpld_reg.addr_34_8=0x00020046
+sff_cpld_reg.len_34_8=1
+sff_cpld_reg.bit_offset_34_8=0
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..c3ea65365c78
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,5 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
+WB_PLAT_SENSOR
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service
new file mode 100644
index 000000000000..4b74632c21cf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Set eth mac address
+Before=interfaces-config.service
+Requires=platform_driver.service
+After=platform_driver.service
+#DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/set_eth_mac.py
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py
new file mode 100755
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+ name='sonic-platform',
+ version='1.0',
+ description='SONiC platform API implementation',
+ license='Apache 2.0',
+ author='SONiC Team',
+ author_email='support',
+ url='',
+ maintainer='support',
+ maintainer_email='',
+ packages=[
+ 'sonic_platform',
+ 'plat_hal',
+ 'wbutil',
+ 'eepromutil',
+ 'hal-config',
+ 'config',
+ ],
+ py_modules=[
+ 'hal_pltfm',
+ 'platform_util',
+ 'platform_intf',
+ ],
+ classifiers=[
+ 'Development Status :: 3 - Alpha',
+ 'Environment :: Plugins',
+ 'Intended Audience :: Developers',
+ 'Intended Audience :: Information Technology',
+ 'Intended Audience :: System Administrators',
+ 'License :: OSI Approved :: Apache Software License',
+ 'Natural Language :: English',
+ 'Operating System :: POSIX :: Linux',
+ 'Programming Language :: Python :: 3.7',
+ 'Topic :: Utilities',
+ ],
+ keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile
new file mode 100644
index 000000000000..ffcf6320f6cd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile
@@ -0,0 +1,26 @@
+PWD = $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+
+all:
+ $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+ @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+ cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+ @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+ cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR)
+ @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+ @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+ @if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+ @if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+ @if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi
+clean:
+ rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+ rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+ rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+ rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py
new file mode 100755
index 000000000000..100f8603d982
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py
@@ -0,0 +1,2036 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+ "fancontrol": 0,
+ "hal_fanctrl": 1,
+ "hal_ledctrl": 1,
+ "avscontrol": 0,
+ "tty_console": 1,
+ "dev_monitor": 1,
+ "pmon_syslog": 1,
+ "sff_temp_polling": 1,
+ "reboot_cause": 1,
+}
+
+DEV_MONITOR_PARAM = {
+ "polling_time": 10,
+ "psus": [
+ {"name": "psu1",
+ "present": {"gettype": "io", "io_addr": 0x964, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 83, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu1frue2", "name": "24c02", "bus": 83, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "psu2",
+ "present": {"gettype": "io", "io_addr": 0x964, "presentbit": 4, "okval": 0},
+ "device": [
+ {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 84, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu2frue2", "name": "24c02", "bus": 84, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "psu3",
+ "present": {"gettype": "io", "io_addr": 0x965, "presentbit": 4, "okval": 0},
+ "device": [
+ {"id": "psu3pmbus", "name": "wb_fsp1200", "bus": 86, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu3frue2", "name": "24c02", "bus": 86, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "psu4",
+ "present": {"gettype": "io", "io_addr": 0x965, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "psu4pmbus", "name": "wb_fsp1200", "bus": 85, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu4frue2", "name": "24c02", "bus": 85, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "fans": [
+ {"name": "fan1",
+ "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "fan1frue2", "name": "24c64", "bus": 95, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "fan2",
+ "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "fan5frue2", "name": "24c64", "bus": 104, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "fan3",
+ "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0},
+ "device": [
+ {"id": "fan2frue2", "name": "24c64", "bus": 96, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "fan4",
+ "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0},
+ "device": [
+ {"id": "fan6frue2", "name": "24c64", "bus": 105, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "fan5",
+ "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0},
+ "device": [
+ {"id": "fan3frue2", "name": "24c64", "bus": 97, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "fan6",
+ "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0},
+ "device": [
+ {"id": "fan7frue2", "name": "24c64", "bus": 106, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "fan7",
+ "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0},
+ "device": [
+ {"id": "fan4frue2", "name": "24c64", "bus": 98, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {"name": "fan8",
+ "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0},
+ "device": [
+ {"id": "fan8frue2", "name": "24c64", "bus": 107, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "others": [
+ {
+ "name": "eeprom",
+ "device": [
+ {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "lm75",
+ "device": [
+ {"id": "lm75_1", "name": "lm75", "bus": 79, "loc": 0x4b, "attr": "hwmon"},
+ {"id": "lm75_2", "name": "lm75", "bus": 93, "loc": 0x48, "attr": "hwmon"},
+ {"id": "lm75_3", "name": "lm75", "bus": 94, "loc": 0x49, "attr": "hwmon"},
+ {"id": "lm75_4", "name": "lm75", "bus": 102, "loc": 0x48, "attr": "hwmon"},
+ {"id": "lm75_5", "name": "lm75", "bus": 117, "loc": 0x4b, "attr": "hwmon"},
+ {"id": "lm75_6", "name": "lm75", "bus": 118, "loc": 0x4f, "attr": "hwmon"},
+ {"id": "lm75_7", "name": "lm75", "bus": 198, "loc": 0x4b, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "mac_bsc",
+ "device": [
+ {"id": "mac_bsc_1", "name": "wb_mac_bsc_th4", "bus": 122, "loc": 0x44, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name":"tmp411",
+ "device":[
+ {"id":"tmp411_1", "name":"tmp411","bus":119, "loc":0x4c, "attr":"hwmon"},
+ {"id":"tmp411_2", "name":"tmp411","bus":120, "loc":0x4c, "attr":"hwmon"},
+ ],
+ },
+ {
+ "name": "ina3221",
+ "device": [
+ {"id": "ina3221_1", "name": "ina3221", "bus": 78, "loc": 0x43, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "tps53622",
+ "device": [
+ {"id": "tps53622_1", "name": "tps53688", "bus": 78, "loc": 0x67, "attr": "hwmon"},
+ {"id": "tps53622_2", "name": "tps53688", "bus": 78, "loc": 0x6c, "attr": "hwmon"},
+ {"id": "tps53622_3", "name": "tps53688", "bus": 131, "loc": 0x67, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "ucd90160",
+ "device": [
+ {"id": "ucd90160_1", "name": "ucd90160", "bus": 77, "loc": 0x5b, "attr": "hwmon"},
+ {"id": "ucd90160_2", "name": "ucd90160", "bus": 128, "loc": 0x5b, "attr": "hwmon"},
+ {"id": "ucd90160_3", "name": "ucd90160", "bus": 129, "loc": 0x5b, "attr": "hwmon"},
+ {"id": "ucd90160_4", "name": "ucd90160", "bus": 130, "loc": 0x5b, "attr": "hwmon"},
+ ],
+ },
+ ],
+}
+
+MANUINFO_CONF = {
+ "bios": {
+ "key": "BIOS",
+ "head": True,
+ "next": "onie"
+ },
+ "bios_vendor": {
+ "parent": "bios",
+ "key": "Vendor",
+ "cmd": "dmidecode -t 0 |grep Vendor",
+ "pattern": r".*Vendor",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "bios_version": {
+ "parent": "bios",
+ "key": "Version",
+ "cmd": "dmidecode -t 0 |grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "bios_date": {
+ "parent": "bios",
+ "key": "Release Date",
+ "cmd": "dmidecode -t 0 |grep Release",
+ "pattern": r".*Release Date",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "onie": {
+ "key": "ONIE",
+ "next": "cpu"
+ },
+ "onie_date": {
+ "parent": "onie",
+ "key": "Build Date",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_build_date",
+ "separator": "=",
+ "arrt_index": 1,
+ },
+ "onie_version": {
+ "parent": "onie",
+ "key": "Version",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_version",
+ "separator": "=",
+ "arrt_index": 2,
+ },
+
+ "cpu": {
+ "key": "CPU",
+ "next": "ssd"
+ },
+ "cpu_vendor": {
+ "parent": "cpu",
+ "key": "Vendor",
+ "cmd": "dmidecode --type processor |grep Manufacturer",
+ "pattern": r".*Manufacturer",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "cpu_model": {
+ "parent": "cpu",
+ "key": "Device Model",
+ "cmd": "dmidecode --type processor | grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "cpu_core": {
+ "parent": "cpu",
+ "key": "Core Count",
+ "cmd": "dmidecode --type processor | grep \"Core Count\"",
+ "pattern": r".*Core Count",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "cpu_thread": {
+ "parent": "cpu",
+ "key": "Thread Count",
+ "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+ "pattern": r".*Thread Count",
+ "separator": ":",
+ "arrt_index": 4,
+ },
+ "ssd": {
+ "key": "SSD",
+ "next": "cpld"
+ },
+ "ssd_model": {
+ "parent": "ssd",
+ "key": "Device Model",
+ "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+ "pattern": r".*Device Model",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "ssd_fw": {
+ "parent": "ssd",
+ "key": "Firmware Version",
+ "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+ "pattern": r".*Firmware Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "ssd_user_cap": {
+ "parent": "ssd",
+ "key": "User Capacity",
+ "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+ "pattern": r".*User Capacity",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+
+ "cpld": {
+ "key": "CPLD",
+ "next": "psu"
+ },
+
+ "cpld1": {
+ "key": "CPLD1",
+ "parent": "cpld",
+ "arrt_index": 1,
+ },
+ "cpld1_model": {
+ "key": "Device Model",
+ "parent": "cpld1",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld1_vender": {
+ "key": "Vendor",
+ "parent": "cpld1",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld1_desc": {
+ "key": "Description",
+ "parent": "cpld1",
+ "config": "CPU_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld1_version": {
+ "key": "Firmware Version",
+ "parent": "cpld1",
+ "reg": {
+ "loc": "/dev/port",
+ "offset": 0x700,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+ "cpld2": {
+ "key": "CPLD2",
+ "parent": "cpld",
+ "arrt_index": 2,
+ },
+ "cpld2_model": {
+ "key": "Device Model",
+ "parent": "cpld2",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld2_vender": {
+ "key": "Vendor",
+ "parent": "cpld2",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld2_desc": {
+ "key": "Description",
+ "parent": "cpld2",
+ "config": "CONNECT_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld2_version": {
+ "key": "Firmware Version",
+ "parent": "cpld2",
+ "reg": {
+ "loc": "/dev/port",
+ "offset": 0x900,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld3": {
+ "key": "CPLD3",
+ "parent": "cpld",
+ "arrt_index": 3,
+ },
+ "cpld3_model": {
+ "key": "Device Model",
+ "parent": "cpld3",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld3_vender": {
+ "key": "Vendor",
+ "parent": "cpld3",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld3_desc": {
+ "key": "Description",
+ "parent": "cpld3",
+ "config": "MAC_CPLDA",
+ "arrt_index": 3,
+ },
+ "cpld3_version": {
+ "key": "Firmware Version",
+ "parent": "cpld3",
+ "i2c": {
+ "bus": "109",
+ "loc": "0x1d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld4": {
+ "key": "CPLD4",
+ "parent": "cpld",
+ "arrt_index": 4,
+ },
+ "cpld4_model": {
+ "key": "Device Model",
+ "parent": "cpld4",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld4_vender": {
+ "key": "Vendor",
+ "parent": "cpld4",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld4_desc": {
+ "key": "Description",
+ "parent": "cpld4",
+ "config": "MAC_CPLDB",
+ "arrt_index": 3,
+ },
+ "cpld4_version": {
+ "key": "Firmware Version",
+ "parent": "cpld4",
+ "i2c": {
+ "bus": "110",
+ "loc": "0x2d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld5": {
+ "key": "CPLD5",
+ "parent": "cpld",
+ "arrt_index": 5,
+ },
+ "cpld5_model": {
+ "key": "Device Model",
+ "parent": "cpld5",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld5_vender": {
+ "key": "Vendor",
+ "parent": "cpld5",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld5_desc": {
+ "key": "Description",
+ "parent": "cpld5",
+ "config": "PORT_CPLDA",
+ "arrt_index": 3,
+ },
+ "cpld5_version": {
+ "key": "Firmware Version",
+ "parent": "cpld5",
+ "i2c": {
+ "bus": "111",
+ "loc": "0x3d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld6": {
+ "key": "CPLD6",
+ "parent": "cpld",
+ "arrt_index": 6,
+ },
+ "cpld6_model": {
+ "key": "Device Model",
+ "parent": "cpld6",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld6_vender": {
+ "key": "Vendor",
+ "parent": "cpld6",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld6_desc": {
+ "key": "Description",
+ "parent": "cpld6",
+ "config": "PORT_CPLDB",
+ "arrt_index": 3,
+ },
+ "cpld6_version": {
+ "key": "Firmware Version",
+ "parent": "cpld6",
+ "i2c": {
+ "bus": "112",
+ "loc": "0x4d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld7": {
+ "key": "CPLD7",
+ "parent": "cpld",
+ "arrt_index": 7,
+ },
+ "cpld7_model": {
+ "key": "Device Model",
+ "parent": "cpld7",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld7_vender": {
+ "key": "Vendor",
+ "parent": "cpld7",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld7_desc": {
+ "key": "Description",
+ "parent": "cpld7",
+ "config": "FAN_CPLDA",
+ "arrt_index": 3,
+ },
+ "cpld7_version": {
+ "key": "Firmware Version",
+ "parent": "cpld7",
+ "i2c": {
+ "bus": "92",
+ "loc": "0x0d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld8": {
+ "key": "CPLD8",
+ "parent": "cpld",
+ "arrt_index": 8,
+ },
+ "cpld8_model": {
+ "key": "Device Model",
+ "parent": "cpld8",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld8_vender": {
+ "key": "Vendor",
+ "parent": "cpld8",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld8_desc": {
+ "key": "Description",
+ "parent": "cpld8",
+ "config": "FAN_CPLDB",
+ "arrt_index": 3,
+ },
+ "cpld8_version": {
+ "key": "Firmware Version",
+ "parent": "cpld8",
+ "i2c": {
+ "bus": "101",
+ "loc": "0x0d",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "psu": {
+ "key": "PSU",
+ "next": "fan"
+ },
+
+ "psu1": {
+ "parent": "psu",
+ "key": "PSU1",
+ "arrt_index": 1,
+ },
+ "psu1_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu1",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu1",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu1_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu1",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "psu2": {
+ "parent": "psu",
+ "key": "PSU2",
+ "arrt_index": 2,
+ },
+ "psu2_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu2",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu2",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu2_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu2",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+ "psu3": {
+ "parent": "psu",
+ "key": "PSU3",
+ "arrt_index": 3,
+ },
+ "psu3_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu3",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu3",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu3_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu3",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "psu4": {
+ "parent": "psu",
+ "key": "PSU4",
+ "arrt_index": 4,
+ },
+ "psu4_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu4",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu4",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu4_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu4",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan": {
+ "key": "FAN",
+ "next": "i210"
+ },
+ "fan1": {
+ "key": "FAN1",
+ "parent": "fan",
+ "arrt_index": 1,
+ },
+ "fan1_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan1",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan1",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan1_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan1",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan2": {
+ "key": "FAN2",
+ "parent": "fan",
+ "arrt_index": 2,
+ },
+ "fan2_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan2",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan2",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan2_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan2",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan3": {
+ "key": "FAN3",
+ "parent": "fan",
+ "arrt_index": 3,
+ },
+ "fan3_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan3",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan3",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan3_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan3",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan4": {
+ "key": "FAN4",
+ "parent": "fan",
+ "arrt_index": 4,
+ },
+ "fan4_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan4",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan4",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan4_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan4",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan5": {
+ "key": "FAN5",
+ "parent": "fan",
+ "arrt_index": 5,
+ },
+ "fan5_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan5",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan5",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan5_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan5",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan6": {
+ "key": "FAN6",
+ "parent": "fan",
+ "arrt_index": 6,
+ },
+ "fan6_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan6",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan6",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan6_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan6",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan7": {
+ "key": "FAN7",
+ "parent": "fan",
+ "arrt_index": 7,
+ },
+ "fan7_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan7",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan7",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan7_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan7",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan8": {
+ "key": "FAN8",
+ "parent": "fan",
+ "arrt_index": 8,
+ },
+ "fan8_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan8",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan8",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan8_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan8",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "i210": {
+ "key": "NIC",
+ "next": "fpga"
+ },
+ "i210_model": {
+ "parent": "i210",
+ "config": "NA",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "i210_vendor": {
+ "parent": "i210",
+ "config": "INTEL",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "i210_version": {
+ "parent": "i210",
+ "cmd": "ethtool -i eth0",
+ "pattern": r"firmware-version",
+ "separator": ":",
+ "key": "Firmware Version",
+ "arrt_index": 3,
+ },
+
+ "fpga": {
+ "key": "FPGA",
+ },
+
+ "fpga1": {
+ "key": "FPGA1",
+ "parent": "fpga",
+ "arrt_index": 1,
+ },
+ "fpga1_model": {
+ "parent": "fpga1",
+ "config": "XC7A100T-2FGG484C",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "fpga1_vender": {
+ "parent": "fpga1",
+ "config": "XILINX",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "fpga1_desc": {
+ "key": "Description",
+ "parent": "fpga1",
+ "config": "MAC_FPGA",
+ "arrt_index": 3,
+ },
+ "fpga1_hw_version": {
+ "parent": "fpga1",
+ "config": "NA",
+ "key": "Hardware Version",
+ "arrt_index": 4,
+ },
+ "fpga1_fw_version": {
+ "parent": "fpga1",
+ "pci": {
+ "bus": 8,
+ "slot": 0,
+ "fn": 0,
+ "bar": 0,
+ "offset": 0
+ },
+ "key": "Firmware Version",
+ "arrt_index": 5,
+ },
+ "fpga1_date": {
+ "parent": "fpga1",
+ "pci": {
+ "bus": 8,
+ "slot": 0,
+ "fn": 0,
+ "bar": 0,
+ "offset": 4
+ },
+ "key": "Build Date",
+ "arrt_index": 6,
+ },
+ "fpga2": {
+ "key": "FPGA2",
+ "parent": "fpga",
+ "arrt_index": 2,
+ },
+ "fpga2_model": {
+ "parent": "fpga2",
+ "config": "XC7A100T-2FGG484C",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "fpga2_vender": {
+ "parent": "fpga2",
+ "config": "XILINX",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "fpga2_desc": {
+ "key": "Description",
+ "parent": "fpga2",
+ "config": "PORT_FPGA",
+ "arrt_index": 3,
+ },
+ "fpga2_hw_version": {
+ "parent": "fpga2",
+ "config": "NA",
+ "key": "Hardware Version",
+ "arrt_index": 4,
+ },
+ "fpga2_fw_version": {
+ "parent": "fpga2",
+ "devfile": {
+ "loc": "/dev/fpga1",
+ "offset": 0,
+ "len": 4,
+ "bit_width": 4
+ },
+ "key": "Firmware Version",
+ "arrt_index": 5,
+ },
+ "fpga2_date": {
+ "parent": "fpga2",
+ "devfile": {
+ "loc": "/dev/fpga1",
+ "offset": 4,
+ "len": 4,
+ "bit_width": 4
+ },
+ "key": "Build Date",
+ "arrt_index": 6,
+ },
+ "others": {
+ "key": "OTHERS",
+ },
+ "5387": {
+ "parent": "others",
+ "key": "CPU-BMC-SWITCH",
+ "arrt_index": 1,
+ },
+ "5387_model": {
+ "parent": "5387",
+ "config": "BCM5387",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "5387_vendor": {
+ "parent": "5387",
+ "config": "Broadcom",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "5387_hw_version": {
+ "parent": "5387",
+ "key": "Hardware Version",
+ "func": {
+ "funcname": "get_bcm5387_version",
+ "params": {
+ "before": [
+ # OE pull high
+ {"gettype": "cmd", "cmd": "echo 50 > /sys/class/gpio/export"},
+ {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio50/direction"},
+ # SEL1 set high
+ {"gettype": "cmd", "cmd": "echo 48 > /sys/class/gpio/export"},
+ {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio48/direction"},
+ # select update 5387
+ {"gettype": "io", "io_addr": 0x918, "value": 0x06},
+ # enable 5387
+ {"gettype": "io", "io_addr": 0x943, "value": 0x00},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0"},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6"},
+ ],
+ "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
+ "after": [
+ {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio48/value"},
+ {"gettype": "cmd", "cmd": "echo 48 > /sys/class/gpio/unexport"},
+ {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio50/value"},
+ {"gettype": "cmd", "cmd": "echo 50 > /sys/class/gpio/unexport"},
+ ],
+ "finally": [
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"},
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"},
+ {"gettype": "io", "io_addr": 0x943, "value": 0x01},
+ {"gettype": "io", "io_addr": 0x918, "value": 0x00},
+ ],
+ },
+ },
+ "arrt_index": 3,
+ },
+}
+
+PMON_SYSLOG_STATUS = {
+ "polling_time": 3,
+ "sffs": {
+ "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+ "nochangedmsgflag": 0,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 1,
+ "alias": {
+ "sff1": "Ethernet1",
+ "sff2": "Ethernet2",
+ "sff3": "Ethernet3",
+ "sff4": "Ethernet4",
+ "sff5": "Ethernet5",
+ "sff6": "Ethernet6",
+ "sff7": "Ethernet7",
+ "sff8": "Ethernet8",
+ "sff9": "Ethernet9",
+ "sff10": "Ethernet10",
+ "sff11": "Ethernet11",
+ "sff12": "Ethernet12",
+ "sff13": "Ethernet13",
+ "sff14": "Ethernet14",
+ "sff15": "Ethernet15",
+ "sff16": "Ethernet16",
+ "sff17": "Ethernet17",
+ "sff18": "Ethernet18",
+ "sff19": "Ethernet19",
+ "sff20": "Ethernet20",
+ "sff21": "Ethernet21",
+ "sff22": "Ethernet22",
+ "sff23": "Ethernet23",
+ "sff24": "Ethernet24",
+ "sff25": "Ethernet25",
+ "sff26": "Ethernet26",
+ "sff27": "Ethernet27",
+ "sff28": "Ethernet28",
+ "sff29": "Ethernet29",
+ "sff30": "Ethernet30",
+ "sff31": "Ethernet31",
+ "sff32": "Ethernet32",
+ "sff33": "Ethernet33",
+ "sff34": "Ethernet34",
+ "sff35": "Ethernet35",
+ "sff36": "Ethernet36",
+ "sff37": "Ethernet37",
+ "sff38": "Ethernet38",
+ "sff39": "Ethernet39",
+ "sff40": "Ethernet40",
+ "sff41": "Ethernet41",
+ "sff42": "Ethernet42",
+ "sff43": "Ethernet43",
+ "sff44": "Ethernet44",
+ "sff45": "Ethernet45",
+ "sff46": "Ethernet46",
+ "sff47": "Ethernet47",
+ "sff48": "Ethernet48",
+ "sff49": "Ethernet49",
+ "sff50": "Ethernet50",
+ "sff51": "Ethernet51",
+ "sff52": "Ethernet52",
+ "sff53": "Ethernet53",
+ "sff54": "Ethernet54",
+ "sff55": "Ethernet55",
+ "sff56": "Ethernet56",
+ "sff57": "Ethernet57",
+ "sff58": "Ethernet58",
+ "sff59": "Ethernet59",
+ "sff60": "Ethernet60",
+ "sff61": "Ethernet61",
+ "sff62": "Ethernet62",
+ "sff63": "Ethernet63",
+ "sff64": "Ethernet64",
+ }
+ },
+ "fans": {
+ "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "fan1": "FAN1",
+ "fan2": "FAN2",
+ "fan3": "FAN3",
+ "fan4": "FAN4",
+ "fan5": "FAN5",
+ "fan6": "FAN6",
+ "fan7": "FAN7",
+ "fan8": "FAN8",
+ }
+ },
+ "psus": {
+ "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+ {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "psu1": "PSU1",
+ "psu2": "PSU2",
+ "psu3": "PSU3",
+ "psu4": "PSU4"
+ }
+ }
+}
+
+REBOOT_CAUSE_PARA = {
+ "reboot_cause_list": [
+ {
+ "name": "cold_reboot",
+ "monitor_point": {"gettype": "io", "io_addr": 0x910, "okval": 0},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Power Loss, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Power Loss, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+ ]
+ },
+ {
+ "name": "wdt_reboot",
+ "monitor_point": {"gettype": "io", "io_addr": 0x91a, "okval": 1},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Watchdog, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+ ],
+ "finish_operation": [
+ {"gettype": "io", "io_addr": 0x919, "value": 0xfc},
+ ]
+ },
+ {
+ "name": "bmc_reboot",
+ "monitor_point": {"gettype": "io", "io_addr": 0x91b, "okval": 1},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "BMC reboot, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ "finish_operation": [
+ {"gettype": "io", "io_addr": 0x919, "value": 0xfa},
+ ]
+ },
+ {
+ "name": "bmc_powerdown",
+ "monitor_point": {"gettype": "io", "io_addr": 0x91c, "okval": 1},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ "finish_operation": [
+ {"gettype": "io", "io_addr": 0x919, "value": 0xf6},
+ ]
+ },
+ {
+ "name": "otp_switch_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+ ]
+ },
+ {
+ "name": "otp_other_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+ ]
+ },
+ ],
+ "other_reboot_cause_record": [
+ {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+ {
+ "name": "mac_core", # AVS name
+ "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+ "default": 0x82, # default value, if rov value not in range
+ "sdkreg": "TOP_AVS_SEL_REG", # SDK register name
+ "sdktype": 0, # 0: No shift operation required, 1: shift operation required
+ "macregloc": 24, # Shift right 24 bits
+ "mask": 0xff, # Use with macregloc
+ "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK
+ "cpld_avs": {"bus": 109, "loc": 0x1d, "offset": 0x24, "gettype": "i2c"},
+ "set_avs": {
+ "loc": "/sys/bus/i2c/devices/126-0010/avs_vout",
+ "gettype": "sysfs", "formula": "int((%f)*1000000)"
+ },
+ "mac_avs_param": {
+ 0x7e: 0.90090,
+ 0x82: 0.87820,
+ 0x86: 0.85640,
+ 0x8A: 0.83370,
+ 0x8E: 0.80960,
+ }
+ }
+]
+
+BLACKLIST_DRIVERS = [
+ {"name": "i2c_i801", "delay": 0},
+]
+
+DRIVERLISTS = [
+ {"name": "i2c_i801", "delay": 1},
+ {"name": "wb_gpio_d1500", "delay": 0},
+ {"name": "i2c_dev", "delay": 0},
+ {"name": "i2c_algo_bit", "delay": 0},
+ {"name": "i2c_gpio", "delay": 0},
+ {"name": "i2c_mux", "delay": 0},
+ {"name": "wb_gpio_device", "delay": 0},
+ {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
+ {"name": "platform_common dfd_my_type=0x20000055", "delay": 0},
+ {"name": "wb_fpga_pcie", "delay": 0},
+ {"name": "wb_pcie_dev", "delay": 0},
+ {"name": "wb_pcie_dev_device", "delay": 0},
+ {"name": "wb_io_dev", "delay": 0},
+ {"name": "wb_i2c_dev", "delay": 0},
+ {"name": "wb_spi_ocores", "delay": 0},
+ {"name": "wb_spi_ocores_device", "delay": 0},
+ {"name": "wb_spi_dev", "delay": 0},
+ {"name": "wb_spi_dev_device", "delay": 0},
+ {"name": "wb_spi_dev_platform_device", "delay": 0},
+ {"name": "wb_lpc_drv", "delay": 0},
+ {"name": "wb_lpc_drv_device", "delay": 0},
+ {"name": "wb_io_dev_device", "delay": 0},
+ {"name": "wb_fpga_i2c_bus_drv", "delay": 0},
+ {"name": "wb_fpga_i2c_bus_device", "delay": 0},
+ {"name": "wb_i2c_mux_pca9641", "delay": 0},
+ {"name": "wb_i2c_mux_pca954x", "delay": 0},
+ {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+ {"name": "wb_fpga_pca954x_drv", "delay": 0},
+ {"name": "wb_fpga_pca954x_device", "delay": 0},
+ {"name": "wb_i2c_dev_device", "delay": 0},
+ {"name": "wb_wdt", "delay": 0},
+ {"name": "lm75", "delay": 0},
+ {"name": "tmp401", "delay": 0},
+ {"name": "optoe", "delay": 0},
+ {"name": "at24", "delay": 0},
+ {"name": "wb_mac_bsc", "delay": 0},
+ {"name": "pmbus_core", "delay": 0},
+ {"name": "wb_csu550", "delay": 0},
+ {"name": "ina3221", "delay": 0},
+ {"name": "tps53679", "delay": 0},
+ {"name": "ucd9000", "delay": 0},
+ {"name": "wb_xdpe132g5c", "delay": 0},
+ {"name": "plat_dfd", "delay": 0},
+ {"name": "plat_switch", "delay": 0},
+ {"name": "plat_fan", "delay": 0},
+ {"name": "plat_psu", "delay": 0},
+ {"name": "plat_sff", "delay": 0},
+ {"name": "wb_spi_master", "delay": 0},
+]
+
+DEVICE = [
+ {"name": "24c02", "bus": 1, "loc": 0x56},
+ {"name": "wb_mac_bsc_th4", "bus": 122, "loc": 0x44},
+ # fan
+ {"name": "24c64", "bus": 95, "loc": 0x50},
+ {"name": "24c64", "bus": 96, "loc": 0x50},
+ {"name": "24c64", "bus": 97, "loc": 0x50},
+ {"name": "24c64", "bus": 98, "loc": 0x50},
+ {"name": "24c64", "bus": 104, "loc": 0x50},
+ {"name": "24c64", "bus": 105, "loc": 0x50},
+ {"name": "24c64", "bus": 106, "loc": 0x50},
+ {"name": "24c64", "bus": 107, "loc": 0x50},
+ # psu
+ {"name": "24c02", "bus": 83, "loc": 0x50},
+ {"name": "wb_fsp1200", "bus": 83, "loc": 0x58},
+ {"name": "24c02", "bus": 84, "loc": 0x50},
+ {"name": "wb_fsp1200", "bus": 84, "loc": 0x58},
+ {"name": "24c02", "bus": 86, "loc": 0x50},
+ {"name": "wb_fsp1200", "bus": 86, "loc": 0x58},
+ {"name": "24c02", "bus": 85, "loc": 0x50},
+ {"name": "wb_fsp1200", "bus": 85, "loc": 0x58},
+ # temp
+ {"name": "lm75", "bus": 79, "loc": 0x4b},
+ {"name": "lm75", "bus": 93, "loc": 0x48},
+ {"name": "lm75", "bus": 94, "loc": 0x49},
+ {"name": "lm75", "bus": 102, "loc": 0x48},
+ {"name": "lm75", "bus": 103, "loc": 0x49},
+ {"name": "lm75", "bus": 117, "loc": 0x4b},
+ {"name": "lm75", "bus": 118, "loc": 0x4f},
+ {"name": "tmp411", "bus": 119, "loc": 0x4c},
+ {"name": "tmp411", "bus": 120, "loc": 0x4c},
+ {"name": "lm75", "bus": 198, "loc": 0x4b},
+ #dcdc
+ {"name": "ucd90160", "bus": 77, "loc": 0x5b},
+ {"name": "tps53688", "bus": 78, "loc": 0x67},
+ {"name": "tps53688", "bus": 78, "loc": 0x6c},
+ {"name": "ina3221", "bus": 78, "loc": 0x43},
+ {"name": "ucd90160", "bus": 128, "loc": 0x5b},
+ {"name": "ucd90160", "bus": 129, "loc": 0x5b},
+ {"name": "ucd90160", "bus": 130, "loc": 0x5b},
+ {"name": "tps53688", "bus": 131, "loc": 0x67},
+ #avs
+ {"name": "wb_xdpe132g5c", "bus": 126, "loc": 0x10},
+]
+
+OPTOE = [
+ {"name": "optoe3", "startbus": 133, "endbus": 196},
+]
+
+REBOOT_CTRL_PARAM = {
+ "cpu": {"io_addr": 0x920, "rst_val": 0xfe, "rst_delay": 0, "gettype": "io"},
+ "mac": {"bus": 109, "loc": 0x1d, "offset": 0x11, "rst_val": 0xfd, "rst_delay": 0, "gettype": "i2c"},
+ "phy": {"io_addr": 0x921, "rst_val": 0xef, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+ "power": {"io_addr": 0x923, "rst_val": 0x01, "rst_delay": 0, "gettype": "io"},
+}
+
+# INIT_PARAM_PRE = [
+# {"loc": "126-0010/avs_vout_max", "value": "900900"},
+# {"loc": "126-0010/avs_vout_min", "value": "809600"},
+# ]
+
+INIT_PARAM = []
+
+INIT_COMMAND_PRE = [
+ # sfp power enable
+ "dfd_debug io_wr 0x939 0x01",
+ "i2cset -f -y 109 0x1d 0x73 0xff",
+ "i2cset -f -y 110 0x2d 0x79 0xff",
+ "i2cset -f -y 110 0x2d 0x7a 0xff",
+ "i2cset -f -y 110 0x2d 0x7b 0xff",
+ "i2cset -f -y 111 0x3d 0x76 0xff",
+ "i2cset -f -y 111 0x3d 0x77 0xff",
+ "i2cset -f -y 112 0x4d 0x79 0xff",
+ "i2cset -f -y 112 0x4d 0x7a 0xff",
+ "i2cset -f -y 112 0x4d 0x7b 0xff",
+ # enable tty_console monitor
+ "dfd_debug io_wr 0x966 0x01",
+]
+
+INIT_COMMAND = [
+ # enable led
+ "i2cset -f -y 109 0x1d 0xc4 0x1",
+ "i2cset -f -y 110 0x2d 0xcc 0x1",
+ "i2cset -f -y 111 0x3d 0xc8 0x1",
+ "i2cset -f -y 112 0x4d 0xc9 0x1",
+
+ # port led off
+ #MAC CPLD_U14 register:
+ #port 50, 49, 54, 53, 58, 57, 62, 61
+ "i2cset -f -y 109 0x1d 0xc0 0xff",
+ "i2cset -f -y 109 0x1d 0xc1 0xff",
+ "i2cset -f -y 109 0x1d 0xc2 0xff",
+ "i2cset -f -y 109 0x1d 0xc3 0xff",
+
+ #MAC CPLD_U14 register:
+ #port 2, 1, 6, 5, 10, 9, 14, 13, 18, 17, 22, 21, 26, 25, 30, 29, 34, 33, 37, 38, 42, 41, 46, 45
+ "i2cset -f -y 110 0x2d 0xc0 0xff",
+ "i2cset -f -y 110 0x2d 0xc1 0xff",
+ "i2cset -f -y 110 0x2d 0xc2 0xff",
+ "i2cset -f -y 110 0x2d 0xc3 0xff",
+ "i2cset -f -y 110 0x2d 0xc4 0xff",
+ "i2cset -f -y 110 0x2d 0xc5 0xff",
+ "i2cset -f -y 110 0x2d 0xc6 0xff",
+ "i2cset -f -y 110 0x2d 0xc7 0xff",
+ "i2cset -f -y 110 0x2d 0xc8 0xff",
+ "i2cset -f -y 110 0x2d 0xc9 0xff",
+ "i2cset -f -y 110 0x2d 0xca 0xff",
+ "i2cset -f -y 110 0x2d 0xcb 0xff",
+
+ #PORT CPLD_U5 register:
+ #port:4, 3, 8, 7, 12, 11, 16, 15, 23, 20, 27, 24, 31, 28, 32
+ "i2cset -f -y 111 0x3d 0xc0 0xff",
+ "i2cset -f -y 111 0x3d 0xc1 0xff",
+ "i2cset -f -y 111 0x3d 0xc2 0xff",
+ "i2cset -f -y 111 0x3d 0xc3 0xff",
+ "i2cset -f -y 111 0x3d 0xc4 0xff",
+ "i2cset -f -y 111 0x3d 0xc5 0xff",
+ "i2cset -f -y 111 0x3d 0xc6 0xff",
+ "i2cset -f -y 111 0x3d 0xc7 0xff",
+
+ #PORT CPLD_U9 register
+ #port: 35, 19, 39, 36, 43, 40, 47, 44, 51, 48, 55, 52, 59, 56, 63, 60, 64
+ "i2cset -f -y 112 0x4d 0xc0 0xff",
+ "i2cset -f -y 112 0x4d 0xc1 0xff",
+ "i2cset -f -y 112 0x4d 0xc2 0xff",
+ "i2cset -f -y 112 0x4d 0xc3 0xff",
+ "i2cset -f -y 112 0x4d 0xc4 0xff",
+ "i2cset -f -y 112 0x4d 0xc5 0xff",
+ "i2cset -f -y 112 0x4d 0xc6 0xff",
+ "i2cset -f -y 112 0x4d 0xc7 0xff",
+ "i2cset -f -y 112 0x4d 0xc8 0xff",
+ "sleep 0.5",
+
+ #MAC CPLD_U14 register:
+ #port 50, 49, 54, 53, 58, 57, 62, 61
+ "i2cset -f -y 109 0x1d 0xc0 0x0",
+ "i2cset -f -y 109 0x1d 0xc1 0x0",
+ "i2cset -f -y 109 0x1d 0xc2 0x0",
+ "i2cset -f -y 109 0x1d 0xc3 0x0",
+
+ #MAC CPLD_U14 register:
+ #port 2, 1, 6, 5, 10, 9, 14, 13, 18, 17, 22, 21, 26, 25, 30, 29, 34, 33, 37, 38, 42, 41, 46, 45
+ "i2cset -f -y 110 0x2d 0xc0 0x0",
+ "i2cset -f -y 110 0x2d 0xc1 0x0",
+ "i2cset -f -y 110 0x2d 0xc2 0x0",
+ "i2cset -f -y 110 0x2d 0xc3 0x0",
+ "i2cset -f -y 110 0x2d 0xc4 0x0",
+ "i2cset -f -y 110 0x2d 0xc5 0x0",
+ "i2cset -f -y 110 0x2d 0xc6 0x0",
+ "i2cset -f -y 110 0x2d 0xc7 0x0",
+ "i2cset -f -y 110 0x2d 0xc8 0x0",
+ "i2cset -f -y 110 0x2d 0xc9 0x0",
+ "i2cset -f -y 110 0x2d 0xca 0x0",
+ "i2cset -f -y 110 0x2d 0xcb 0x0",
+
+ #PORT CPLD_U5 register
+ #port:4, 3, 8, 7, 12, 11, 16, 15, 23, 20, 27, 24, 31, 28, 32
+ "i2cset -f -y 111 0x3d 0xc0 0x0",
+ "i2cset -f -y 111 0x3d 0xc1 0x0",
+ "i2cset -f -y 111 0x3d 0xc2 0x0",
+ "i2cset -f -y 111 0x3d 0xc3 0x0",
+ "i2cset -f -y 111 0x3d 0xc4 0x0",
+ "i2cset -f -y 111 0x3d 0xc5 0x0",
+ "i2cset -f -y 111 0x3d 0xc6 0x0",
+ "i2cset -f -y 111 0x3d 0xc7 0x0",
+
+ #PORT CPLD_U9 register
+ #port: 35, 19, 39, 36, 43, 40, 47, 44, 51, 48, 55, 52, 59, 56, 63, 60, 64
+ "i2cset -f -y 112 0x4d 0xc0 0x0",
+ "i2cset -f -y 112 0x4d 0xc1 0x0",
+ "i2cset -f -y 112 0x4d 0xc2 0x0",
+ "i2cset -f -y 112 0x4d 0xc3 0x0",
+ "i2cset -f -y 112 0x4d 0xc4 0x0",
+ "i2cset -f -y 112 0x4d 0xc5 0x0",
+ "i2cset -f -y 112 0x4d 0xc6 0x0",
+ "i2cset -f -y 112 0x4d 0xc7 0x0",
+ "i2cset -f -y 112 0x4d 0xc8 0x0",
+ ]
+
+WARM_UPGRADE_PARAM = {
+ "slot0": {
+ "VME": {
+ "chain1": [
+ {"name": "BASE_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/base_cpld_u55_transf_header.vme",
+ "init_cmd": [
+ {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": 0xff, "gettype": "i2c"},
+ {"io_addr": 0x916, "value": 0, "gettype": "io"},
+ ],
+ "rw_recover_reg": [
+ {"io_addr": 0x918, "value": None, "gettype": "io"},
+ {"io_addr": 0x929, "value": None, "gettype": "io"},
+ {"io_addr": 0x940, "value": None, "gettype": "io"},
+ {"io_addr": 0x941, "value": None, "gettype": "io"},
+ {"io_addr": 0x942, "value": None, "gettype": "io"},
+ {"io_addr": 0x943, "value": None, "gettype": "io"},
+ {"io_addr": 0x944, "value": None, "gettype": "io"},
+ {"io_addr": 0x945, "value": None, "gettype": "io"},
+ {"io_addr": 0x946, "value": None, "gettype": "io"},
+ {"io_addr": 0x948, "value": None, "gettype": "io"},
+ {"io_addr": 0x949, "value": None, "gettype": "io"},
+ {"io_addr": 0x94a, "value": None, "gettype": "io"},
+ {"io_addr": 0x953, "value": None, "gettype": "io"},
+ {"io_addr": 0x954, "value": None, "gettype": "io"},
+ {"io_addr": 0x955, "value": None, "gettype": "io"},
+ {"io_addr": 0x958, "value": None, "gettype": "io"},
+ {"io_addr": 0x959, "value": None, "gettype": "io"},
+ {"io_addr": 0x960, "value": None, "gettype": "io"},
+ {"io_addr": 0x961, "value": None, "gettype": "io"},
+ {"io_addr": 0x962, "value": None, "gettype": "io"},
+ {"io_addr": 0x963, "value": None, "gettype": "io"},
+ ],
+ "after_upgrade_delay": 30,
+ "after_upgrade_delay_timeout": 60,
+ "refresh_finish_flag_check": {"io_addr": 0x91d, "value": 0x5a, "gettype": "io"},
+ "access_check_reg": {"io_addr": 0x955, "value": 0xaa, "gettype": "io"},
+ "finish_cmd": [
+ {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": 0, "gettype": "i2c"},
+ ],
+ },
+ ],
+
+ "chain2": [
+ {"name": "FAN_CPLD_1",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/ufan_cpld_u13_transf_header.vme",
+ "rw_recover_reg": [],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"bus": 92, "loc": 0x0d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ },
+ ],
+
+ "chain3": [
+ {"name": "FAN_CPLD_2",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/dfan_cpld_u13_transf_header.vme",
+ "rw_recover_reg": [],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"bus": 101, "loc": 0x0d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ },
+ ],
+
+ "chain4": [
+ {"name": "MAC_CPLD_1",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mac_cpld_u14_transf_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": 0xff, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": 0x00, "gettype": "i2c"},
+ ],
+ "rw_recover_reg": [
+ {"bus": 109, "loc": 0x1d, "offset": 0x11, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x12, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x13, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x16, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x1a, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x21, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x23, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x51, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x52, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x54, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x56, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x57, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x58, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x59, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x70, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x72, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x73, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+ {"bus": 109, "loc": 0x1d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "refresh_finish_flag_check": {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": 0x01, "gettype": "i2c"},
+ "access_check_reg": {"bus": 109, "loc": 0x1d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ "finish_cmd": [
+ {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": 0, "gettype": "i2c"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+
+ {"name": "MAC_CPLD_2",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mac_cpld_u30_transf_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": 0xff, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": 0x00, "gettype": "i2c"},
+ ],
+ "rw_recover_reg": [
+ {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x52, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x53, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x54, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x56, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x57, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x58, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x59, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x5b, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x5c, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x5d, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x5e, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x70, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x71, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x72, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x76, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x77, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x78, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x79, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x7a, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0x7b, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc5, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc6, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc7, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc8, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xc9, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xca, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xcb, "value": None, "gettype": "i2c"},
+ {"bus": 110, "loc": 0x2d, "offset": 0xcc, "value": None, "gettype": "i2c"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "refresh_finish_flag_check": {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": 0x01, "gettype": "i2c"},
+ "access_check_reg": {"bus": 110, "loc": 0x2d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ "finish_cmd": [
+ {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": 0, "gettype": "i2c"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+ ],
+
+ "chain5": [
+ {"name": "PORT_CPLD_1",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/port_cpld_u5_transf_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": 0xff, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": 0x00, "gettype": "i2c"},
+ ],
+ "rw_recover_reg": [
+ {"bus": 111, "loc": 0x3d, "offset": 0x11, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x13, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x14, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x15, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x16, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x1a, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x21, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x51, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x53, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x54, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x56, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x57, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x58, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x59, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x5b, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x5c, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x70, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x71, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x74, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x75, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x76, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x77, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc5, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc6, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc7, "value": None, "gettype": "i2c"},
+ {"bus": 111, "loc": 0x3d, "offset": 0xc8, "value": None, "gettype": "i2c"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "refresh_finish_flag_check": {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": 0x01, "gettype": "i2c"},
+ "access_check_reg": {"bus": 111, "loc": 0x3d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ "finish_cmd": [
+ {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": 0, "gettype": "i2c"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+
+ {"name": "PORT_CPLD_2",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/port_cpld_u9_transf_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": 0xff, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": 0x00, "gettype": "i2c"},
+ ],
+ "rw_recover_reg": [
+ {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x50, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x52, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x53, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x54, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x55, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x56, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x57, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x58, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x59, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x5b, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x5c, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x5d, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x5e, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x70, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x71, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x72, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x76, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x77, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x78, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x79, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x7a, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0x7b, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc5, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc6, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc7, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc8, "value": None, "gettype": "i2c"},
+ {"bus": 112, "loc": 0x4d, "offset": 0xc9, "value": None, "gettype": "i2c"},
+
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "refresh_finish_flag_check": {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": 0x01, "gettype": "i2c"},
+ "access_check_reg": {"bus": 112, "loc": 0x4d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+ "finish_cmd": [
+ {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": 0, "gettype": "i2c"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+ ],
+
+ "chain6": [
+ {"name": "CPU_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme",
+ "init_cmd": [
+ {"cmd": "echo 7 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo high > /sys/class/gpio/gpio7/direction", "gettype": "cmd"},
+ {"io_addr": 0x7cc, "value": 0, "gettype": "io"},
+ ],
+ "rw_recover_reg": [
+ {"io_addr": 0x705, "value": None, "gettype": "io"},
+ {"io_addr": 0x713, "value": None, "gettype": "io"},
+ {"io_addr": 0x715, "value": None, "gettype": "io"},
+ {"io_addr": 0x721, "value": None, "gettype": "io"},
+ {"io_addr": 0x722, "value": None, "gettype": "io"},
+ {"io_addr": 0x772, "value": None, "gettype": "io"},
+ {"io_addr": 0x774, "value": None, "gettype": "io"},
+ {"io_addr": 0x776, "value": None, "gettype": "io"},
+ {"io_addr": 0x778, "value": None, "gettype": "io"},
+ {"io_addr": 0x77a, "value": None, "gettype": "io"},
+ {"io_addr": 0x77c, "value": None, "gettype": "io"},
+ {"io_addr": 0x780, "value": None, "gettype": "io"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+ "finish_cmd": [
+ {"io_addr": 0x7cc, "value": 0xff, "gettype": "io"},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio7/value", "gettype": "cmd"},
+ {"cmd": "echo 7 > /sys/class/gpio/unexport", "gettype": "cmd"},
+ ],
+ },
+ ],
+ },
+
+ "MTD": {
+ "chain1": [
+ {"name": "MAC_FPGA",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"cmd": "setpci -s 00:03.2 0xA0.W=0x0050", "gettype": "cmd"}, # link_disable
+ {"io_addr": 0x948, "value": 0x0, "gettype": "io"},
+ {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x00, "gettype": "i2c"},
+ {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x01, "gettype": "i2c", "delay": 0.1},
+ ],
+ "after_upgrade_delay": 10,
+ "after_upgrade_delay_timeout": 180,
+ "refresh_finish_flag_check": {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x07, "gettype": "i2c"},
+ "access_check_reg": {
+ "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile",
+ "polling_cmd":[
+ {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+ {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"},
+ {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+ ],
+ "polling_delay": 0.1
+ },
+ "finish_cmd": [
+ {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+ {"io_addr": 0x948, "value": 0x1, "gettype": "io"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+ ],
+ "chain2": [
+ {"name": "PORT_FPGA",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"io_addr": 0x948, "value": 0x0, "gettype": "io"},
+ {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x00, "gettype": "i2c"},
+ {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x01, "gettype": "i2c", "delay": 0.1},
+ ],
+ "after_upgrade_delay": 10,
+ "after_upgrade_delay_timeout": 180,
+ "refresh_finish_flag_check": {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x07, "gettype": "i2c"},
+ "access_check_reg": {
+ "path": "/dev/fpga1", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile",
+ "polling_cmd":[
+ {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"},
+ {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+ ],
+ "polling_delay": 0.1
+ },
+ "finish_cmd": [
+ {"io_addr": 0x948, "value": 0x1, "gettype": "io"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+ ],
+ },
+ },
+ "stop_services_cmd": [
+ "/usr/local/bin/platform_process.py stop",
+ ],
+ "start_services_cmd": [
+ "/usr/local/bin/platform_process.py start",
+ ],
+}
+
+UPGRADE_SUMMARY = {
+ "devtype": 0x20000055,
+
+ "slot0": {
+ "subtype": 0,
+ "VME": {
+ "chain1": {
+ "name": "BASE_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain2": {
+ "name": "FANA_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain3": {
+ "name": "FANB_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain4": {
+ "name": "MAC_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain5": {
+ "name": "PORT_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain6": {
+ "name": "CPU_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ },
+
+ "MTD": {
+ "chain1": {
+ "name": "MAC_FPGA",
+ "is_support_warm_upg": 1,
+ "init_cmd": [
+ {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"},
+ {"cmd": "echo 50 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo high > /sys/class/gpio/gpio50/direction", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "echo 48 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo high > /sys/class/gpio/gpio48/direction", "gettype": "cmd", "delay": 0.1},
+ {"io_addr": 0x918, "value": 0x2, "gettype": "io"},
+ {"io_addr": 0x946, "value": 0xfe, "gettype": "io"},
+ {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"},
+ {"io_addr": 0x946, "value": 0xff, "gettype": "io"},
+ {"io_addr": 0x918, "value": 0x0, "gettype": "io"},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio48/value", "gettype": "cmd"},
+ {"cmd": "echo 48 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio50/value", "gettype": "cmd"},
+ {"cmd": "echo 50 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+ ],
+ },
+ "chain2": {
+ "name": "PORT_FPGA",
+ "is_support_warm_upg": 1,
+ "init_cmd": [
+ {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"},
+ {"cmd": "echo 50 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo high > /sys/class/gpio/gpio50/direction", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "echo 48 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo high > /sys/class/gpio/gpio48/direction", "gettype": "cmd", "delay": 0.1},
+ {"io_addr": 0x918, "value": 0x3, "gettype": "io"},
+ {"io_addr": 0x946, "value": 0xfb, "gettype": "io"},
+ {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"},
+ {"io_addr": 0x946, "value": 0xff, "gettype": "io"},
+ {"io_addr": 0x918, "value": 0x0, "gettype": "io"},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio48/value", "gettype": "cmd"},
+ {"cmd": "echo 48 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio50/value", "gettype": "cmd"},
+ {"cmd": "echo 50 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+ ],
+ },
+ "chain4": {
+ "name": "BIOS",
+ "is_support_warm_upg": 0,
+ "filesizecheck": 10240, # bios check file size, Unit: K
+ "init_cmd": [
+ {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+ {"cmd": "modprobe mtd", "gettype": "cmd"},
+ {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+ {"cmd": "modprobe ofpart", "gettype": "cmd"},
+ {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+ {"cmd": "modprobe intel_spi_platform writeable=1", "gettype": "cmd"},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod intel_spi_platform", "gettype": "cmd"},
+ {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+ {"cmd": "rmmod ofpart", "gettype": "cmd"},
+ {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+ {"cmd": "rmmod mtd", "gettype": "cmd"},
+ ],
+ },
+ },
+
+ "SYSFS": {
+ "chain3": {
+ "name": "BCM5387",
+ "is_support_warm_upg": 0,
+ "init_cmd": [
+ {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6", "gettype": "cmd", "delay": 0.1},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+ ],
+ },
+ },
+
+ "TEST": {
+ "fpga": [
+ {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_0_1_header.bin", "display_name": "MAC_FPGA"},
+ {"chain": 2, "file": "/etc/.upgrade_test/fpga_test_0_2_header.bin", "display_name": "PORT_FPGA"},
+ ],
+ "cpld": [
+ {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"},
+ {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "FANA_CPLD"},
+ {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "FANB_CPLD"},
+ {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "MAC_CPLD"},
+ {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "PORT_CPLD"},
+ {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"},
+ ],
+ },
+ },
+
+ "BMC": {
+ "name": "BMC",
+ "init_cmd": [
+ {"cmd": "ipmitool raw 0x32 0x03 0x02", "gettype": "cmd", "ignore_result": 1},
+ ],
+ "finish_cmd": [],
+ },
+}
+
+PLATFORM_E2_CONF = {
+ "fan": [
+ {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/95-0050/eeprom"},
+ {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/104-0050/eeprom"},
+ {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/96-0050/eeprom"},
+ {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/105-0050/eeprom"},
+ {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/97-0050/eeprom"},
+ {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/106-0050/eeprom"},
+ {"name": "fan7", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/98-0050/eeprom"},
+ {"name": "fan8", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/107-0050/eeprom"},
+ ],
+ "psu": [
+ {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/83-0050/eeprom"},
+ {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/84-0050/eeprom"},
+ {"name": "psu3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/86-0050/eeprom"},
+ {"name": "psu4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/85-0050/eeprom"},
+ ],
+ "syseeprom": [
+ {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"},
+ ],
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py
new file mode 100755
index 000000000000..5ed9537f3c16
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py
@@ -0,0 +1,7 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+ "port_num": 64,
+ "optoe_start_bus": 133,
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
new file mode 100755
index 000000000000..36d6cbd0f109
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
@@ -0,0 +1,1758 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+ "intake": ['DPS-1300AB-6 S', 'GW-CRPS1300D'],
+ "exhaust": []
+}
+
+fanairflow = {
+ "intake": ['M2EFAN II-F'],
+ "exhaust": [],
+}
+
+psu_display_name = {
+ "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 S'],
+}
+
+psutypedecode = {
+ 0x00: 'N/A',
+ 0x01: 'AC',
+ 0x02: 'DC',
+}
+
+
+class Unit:
+ Temperature = "C"
+ Voltage = "V"
+ Current = "A"
+ Power = "W"
+ Speed = "RPM"
+
+
+class threshold:
+ PSU_TEMP_MIN = -10 * 1000
+ PSU_TEMP_MAX = 60 * 1000
+
+ PSU_FAN_SPEED_MIN = 2000
+ PSU_FAN_SPEED_MAX = 28000
+
+ PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+ PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+ PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+ PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+ PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+ PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+ ERR_VALUE = -9999999
+
+ PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+ PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+ PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+ PSU_INPUT_POWER_MAX = 1444 * 1000 * 1000
+
+ PSU_OUTPUT_CURRENT_MIN = 2 * 1000
+ PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+ PSU_INPUT_CURRENT_MIN = 0.2 * 1000
+ PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+ FRONT_FAN_SPEED_MAX = 14200
+ REAR_FAN_SPEED_MAX = 11200
+ FAN_SPEED_MIN = 2000
+
+
+devices = {
+ "onie_e2": [
+ {
+ "name": "ONIE_E2",
+ "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+ "airflow": "intake"
+ },
+ ],
+ "psus": [
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/83-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 83, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU1",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 83, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/84-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 84, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU2",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 84, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/86-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 86, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU3",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 86, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/85-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 85, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/wb_plat/psu/psu4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU4",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": threshold.PSU_FAN_SPEED_MAX,
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 85, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ }
+ ],
+ "temps": [
+ {
+ "name": "BOARD_TEMP",
+ "temp_id": "TEMP1",
+ "api_name": "Board",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/118-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -10000,
+ "Low": 0,
+ "High": 70000,
+ "Max": 75000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "CPU_TEMP",
+ "temp_id": "TEMP2",
+ "api_name": "CPU",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -15000,
+ "Low": 10000,
+ "High": 98000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "INLET_TEMP",
+ "temp_id": "TEMP3",
+ "api_name": "Inlet",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input", "way": "sysfs"},
+ ],
+ "Min": -30000,
+ "Low": 0,
+ "High": 40000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "OUTLET_TEMP",
+ "temp_id": "TEMP4",
+ "api_name": "Outlet",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/bus/i2c/devices/93-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/94-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/102-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ {"loc": "/sys/bus/i2c/devices/103-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ ],
+ "Min": -30000,
+ "Low": 0,
+ "High": 70000,
+ "Max": 80000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SWITCH_TEMP",
+ "temp_id": "TEMP5",
+ "api_name": "ASIC_TEMP",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+ "Min": -30000,
+ "Low": 10000,
+ "High": 100000,
+ "Max": 105000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU1_TEMP",
+ "temp_id": "TEMP6",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -10000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU2_TEMP",
+ "temp_id": "TEMP7",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -10000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU3_TEMP",
+ "temp_id": "TEMP8",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -10000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU4_TEMP",
+ "temp_id": "TEMP9",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -10000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SFF_TEMP",
+ "Temperature": {
+ "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+ "Min": -15000,
+ "Low": 0,
+ "High": 80000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ ],
+ "leds": [
+ {
+ "name": "FRONT_SYS_LED",
+ "led_type": "SYS_LED",
+ "led": {"loc": "/dev/cpld4", "offset": 0x08, "len": 1, "way": "devfile"},
+ "led_attrs": {
+ "green": 0x01, "red": 0x02, "amber": 0x03, "default": 0x01,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ },
+ {
+ "name": "FRONT_PSU_LED",
+ "led_type": "PSU_LED",
+ "led": {"loc": "/dev/cpld4", "offset": 0x09, "len": 1, "way": "devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ },
+ {
+ "name": "FRONT_FAN_LED",
+ "led_type": "FAN_LED",
+ "led": {"loc": "/dev/cpld4", "offset": 0x0a, "len": 1, "way": "devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ },
+ ],
+ "fans": [
+ {
+ "name": "FAN1",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-95/95-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 92, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN2",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-104/104-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 101, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN3",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-96/96-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 92, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN4",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-105/105-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 101, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN5",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-97/97-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 92, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN6",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-106/106-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 101, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN7",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-98/98-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 92, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan7/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan7/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan7/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan7/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN8",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-107/107-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/wb_plat/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"bus": 101, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+ },
+ "PowerMax": 80.64,
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan8/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan8/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan8/motor0/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+ "Running": {"loc": "/sys/wb_plat/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/wb_plat/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/wb_plat/fan/fan8/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ ],
+ "cplds": [
+ {
+ "name": "CPU_CPLD",
+ "cpld_id": "CPLD1",
+ "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for system power",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "CONNECT_CPLD",
+ "cpld_id": "CPLD2",
+ "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MAC_CPLDA",
+ "cpld_id": "CPLD3",
+ "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MAC_CPLDB",
+ "cpld_id": "CPLD4",
+ "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "PORT_CPLDA",
+ "cpld_id": "CPLD5",
+ "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "PORT_CPLDB",
+ "cpld_id": "CPLD6",
+ "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "FAN_CPLDA",
+ "cpld_id": "CPLD7",
+ "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for fan modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "FAN_CPLDB",
+ "cpld_id": "CPLD8",
+ "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for fan modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MAC_FPGA",
+ "cpld_id": "CPLD9",
+ "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "format": "little_endian",
+ "warm": 1,
+ },
+ {
+ "name": "PORT_FPGA",
+ "cpld_id": "CPLD10",
+ "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "format": "little_endian",
+ "warm": 1,
+ },
+ {
+ "name": "BIOS",
+ "cpld_id": "CPLD11",
+ "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+ "desc": "Performs initialization of hardware components during booting",
+ "slot": 0,
+ "type": "str",
+ "warm": 0,
+ },
+ ],
+ "dcdc": [
+ {
+ "name": "MAC_VDD3.3V_standby",
+ "dcdc_id": "DCDC1",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD12V_A",
+ "dcdc_id": "DCDC2",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 10200,
+ "Max": 13800,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD1.0V_FPGA",
+ "dcdc_id": "DCDC3",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 850,
+ "Max": 1150,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD1.8V_FPGA",
+ "dcdc_id": "DCDC4",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1530,
+ "Max": 2070,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD1.2V_FPGA",
+ "dcdc_id": "DCDC5",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1020,
+ "Max": 1380,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD3.3V",
+ "dcdc_id": "DCDC6",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in6_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD5V_CLK_MCU",
+ "dcdc_id": "DCDC7",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in7_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 4250,
+ "Max": 5750,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD3.3V_MAC",
+ "dcdc_id": "DCDC8",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in8_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDDO1.8V",
+ "dcdc_id": "DCDC9",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in9_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1530,
+ "Max": 2070,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDDO1.2V",
+ "dcdc_id": "DCDC10",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in10_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1020,
+ "Max": 1380,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD_CORE",
+ "dcdc_id": "DCDC11",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in11_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 680,
+ "Max": 980,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD3.3_CLK",
+ "dcdc_id": "DCDC12",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in12_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD_ANALOG",
+ "dcdc_id": "DCDC13",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in13_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 655,
+ "Max": 885,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD1.2V_MAC_A",
+ "dcdc_id": "DCDC14",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in14_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1020,
+ "Max": 1380,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_AVDD1.8V",
+ "dcdc_id": "DCDC15",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in15_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1530,
+ "Max": 2070,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD_ANALOG2",
+ "dcdc_id": "DCDC16",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in16_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 655,
+ "Max": 885,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD12V_B",
+ "dcdc_id": "DCDC17",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 10200,
+ "Max": 13800,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD5.0V",
+ "dcdc_id": "DCDC18",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 4250,
+ "Max": 5750,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_A",
+ "dcdc_id": "DCDC19",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_B",
+ "dcdc_id": "DCDC20",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_C",
+ "dcdc_id": "DCDC21",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_D",
+ "dcdc_id": "DCDC22",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in6_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_E",
+ "dcdc_id": "DCDC23",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in7_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_QSFPDD_VDD3.3V_F",
+ "dcdc_id": "DCDC24",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in8_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_VDD1.0V_FPGA",
+ "dcdc_id": "DCDC25",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 850,
+ "Max": 1150,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_VDD1.8V_FPGA",
+ "dcdc_id": "DCDC26",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1530,
+ "Max": 2070,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_VDD1.2V_FPGA",
+ "dcdc_id": "DCDC27",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1020,
+ "Max": 1380,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_VDD3.3V",
+ "dcdc_id": "DCDC28",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_VDD12V",
+ "dcdc_id": "DCDC29",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 10200,
+ "Max": 13800,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_VDD3.3V_standby",
+ "dcdc_id": "DCDC30",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in6_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_QSFPDD_VDD3.3V_A",
+ "dcdc_id": "DCDC31",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in7_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_QSFPDD_VDD3.3V_B",
+ "dcdc_id": "DCDC32",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in8_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_QSFPDD_VDD3.3V_C",
+ "dcdc_id": "DCDC33",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in9_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_QSFPDD_VDD3.3V_D",
+ "dcdc_id": "DCDC34",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in10_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_QSFPDD_VDD3.3V_E",
+ "dcdc_id": "DCDC35",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in11_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "PORT_QSFPDD_VDD3.3V_F",
+ "dcdc_id": "DCDC36",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in12_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2805,
+ "Max": 3795,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "MAC_VDD1.2V_MAC_B",
+ "dcdc_id": "DCDC37",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/131-0067/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1020,
+ "Max": 1380,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "BASE_VDD12V",
+ "dcdc_id": "DCDC38",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 10830,
+ "Max": 13230,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "BASE_SW_VDD1.2V",
+ "dcdc_id": "DCDC39",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1083,
+ "Max": 1323,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "BASE_VDD2.5V",
+ "dcdc_id": "DCDC40",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2247,
+ "Max": 2745,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "BASE_VDD3.3V",
+ "dcdc_id": "DCDC41",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in4_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2960,
+ "Max": 3616,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "BASE_SSD_VDD3.3V",
+ "dcdc_id": "DCDC42",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in5_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2978,
+ "Max": 3638,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "CPU_P1V05_V",
+ "dcdc_id": "DCDC43",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 882,
+ "Max": 1232,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "CPU_VCCIN_V",
+ "dcdc_id": "DCDC44",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1368,
+ "Max": 2244,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "CPU_VCCD_V",
+ "dcdc_id": "DCDC45",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 990,
+ "Max": 1452,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "CPU_VCCSCSUS_V",
+ "dcdc_id": "DCDC46",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 855,
+ "Max": 1265,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "CPU_P5V_AUX_V",
+ "dcdc_id": "DCDC47",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in1_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 3852,
+ "Max": 6347,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "CPU_P3V3_STBY_V",
+ "dcdc_id": "DCDC48",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in2_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 2682,
+ "Max": 4004,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ {
+ "name": "CPU_P1V7_VCCSCFUSESUS_V",
+ "dcdc_id": "DCDC49",
+ "value": {
+ "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in3_input",
+ "way": "sysfs",
+ },
+ "read_times": 1,
+ "Min": 1377,
+ "Max": 2057,
+ "Unit": "V",
+ "format": "float(float(%s)/1000)",
+ },
+ ],
+ "cpu": [
+ {
+ "name": "cpu",
+ "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"},
+ "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+ }
+ ],
+ "sfps": {
+ "ver": '1.0',
+ "port_index_start": 0,
+ "port_num": 64,
+ "log_level": 2,
+ "eeprom_retry_times": 5,
+ "eeprom_retry_break_sec": 0.2,
+ "presence_cpld": {
+ "dev_id": {
+ 4: {
+ "offset": {
+ 0x71: "49-50, 53-54, 57-58, 61-62",
+ },
+ },
+ 5: {
+ "offset": {
+ 0x73: "1-2, 5-6, 9-10, 13-14",
+ 0x74: "17-18, 21-22, 25-26, 29-30",
+ 0x75: "33-34, 37-38, 41-42, 45-46",
+ },
+ },
+ 6: {
+ "offset": {
+ 0x72: "3-4, 7-8, 11-12, 15-16",
+ 0x73: "20, 23-24, 27-28, 31-32",
+ },
+ },
+ 7: {
+ "offset": {
+ 0x73: "19, 35-36, 39-40, 43-44, 47",
+ 0x74: "48, 51-52, 55-56, 59-60, 63",
+ 0x75: "64",
+ },
+ },
+ },
+ },
+ "presence_val_is_present": 0,
+ "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+ "eeprom_path_key": list(range(133, 197)),
+ "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+ "optoe_driver_key": list(range(133, 197)),
+ "reset_cpld": {
+ "dev_id": {
+ 4: {
+ "offset": {
+ 0x70: "49-50, 53-54, 57-58, 61-62",
+ },
+ },
+ 5: {
+ "offset": {
+ 0x70: "1-2, 5-6, 9-10, 13-14",
+ 0x71: "17-18, 21-22, 25-26, 29-30",
+ 0x72: "33-34, 37-38, 41-42, 45-46",
+ },
+ },
+ 6: {
+ "offset": {
+ 0x70: "3-4, 7-8, 11-12, 15-16",
+ 0x71: "20, 23-24, 27-28, 31-32",
+ },
+ },
+ 7: {
+ "offset": {
+ 0x70: "19, 35-36, 39-40, 43-44, 47",
+ 0x71: "48, 51-52, 55-56, 59-60, 63",
+ 0x72: "64",
+ },
+ },
+ },
+ },
+ "reset_val_is_reset": 0,
+ }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py
new file mode 100755
index 000000000000..69abf0da3fbd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py
@@ -0,0 +1,135 @@
+# coding:utf-8
+
+
+monitor = {
+ "openloop": {
+ "linear": {
+ "name": "linear",
+ "flag": 0,
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "K": 11,
+ "tin_min": 38,
+ },
+ "curve": {
+ "name": "curve",
+ "flag": 1,
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "a": 0.369,
+ "b": -15.657,
+ "c": 289,
+ "tin_min": 25,
+ },
+ },
+
+ "pid": {
+ "CPU_TEMP": {
+ "name": "CPU_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 1,
+ "Kd": 0.3,
+ "target": 80,
+ "value": [None, None, None],
+ },
+ "SWITCH_TEMP": {
+ "name": "SWITCH_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 1,
+ "Kd": 0.3,
+ "target": 90,
+ "value": [None, None, None],
+ },
+ "OUTLET_TEMP": {
+ "name": "OUTLET_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ "SFF_TEMP": {
+ "name": "SFF_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 0.1,
+ "Ki": 0.4,
+ "Kd": 0,
+ "target": 60,
+ "value": [None, None, None],
+ },
+ },
+
+ "temps_threshold": {
+ "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999},
+ "INLET_TEMP": {"name": "INLET_TEMP", "warning": 40, "critical": 50, "fix": -3},
+ "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+ "CPU_TEMP": {"name": "CPU_TEMP", "warning": 100, "critical": 102},
+ "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+ },
+
+ "fancontrol_para": {
+ "interval": 5,
+ "max_pwm": 0xff,
+ "min_pwm": 0x80,
+ "abnormal_pwm": 0xff,
+ "warning_pwm": 0xff,
+ "temp_invalid_pid_pwm": 0x80,
+ "temp_error_pid_pwm": 0x80,
+ "temp_fail_num": 3,
+ "check_temp_fail": [
+ {"temp_name": "INLET_TEMP"},
+ {"temp_name": "SWITCH_TEMP"},
+ {"temp_name": "CPU_TEMP"},
+ ],
+ "temp_warning_num": 3, # temp over warning 3 times continuously
+ "temp_critical_num": 3, # temp over critical 3 times continuously
+ "temp_warning_countdown": 60, # 5 min warning speed after not warning
+ "temp_critical_countdown": 60, # 5 min full speed after not critical
+ "rotor_error_count": 6, # fan rotor error 6 times continuously
+ "inlet_mac_diff": 999,
+ "check_crit_reboot_flag": 1,
+ "check_crit_reboot_num": 3,
+ "check_crit_sleep_time": 20,
+ "psu_fan_control": 1,
+ "psu_absent_fullspeed_num": 0xFF,
+ "fan_absent_fullspeed_num": 1,
+ "rotor_error_fullspeed_num": 1,
+ },
+
+ "ledcontrol_para": {
+ "interval":5,
+ "checkpsu": 0, # 0: sys led don't follow psu led
+ "checkfan": 0, # 0: sys led don't follow fan led
+ "psu_amber_num": 1,
+ "fan_amber_num": 1,
+ "board_sys_led": [
+ {"led_name": "FRONT_SYS_LED"},
+ ],
+ "board_psu_led": [
+ {"led_name": "FRONT_PSU_LED"},
+ ],
+ "board_fan_led": [
+ {"led_name": "FRONT_FAN_LED"},
+ ],
+ },
+
+ "otp_reboot_judge_file": {
+ "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+ "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+ },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile
new file mode 100755
index 000000000000..1541b91bdf7d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile
@@ -0,0 +1,16 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m += wb_pcie_dev_device.o
+obj-m += wb_spi_ocores_device.o
+obj-m += wb_spi_dev_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_fpga_i2c_bus_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_fpga_pca954x_device.o
+obj-m += wb_spi_master.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_spi_dev_platform_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c
new file mode 100644
index 000000000000..d0650a29b1bf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c
@@ -0,0 +1,2317 @@
+/*
+ * An wb_fpga_i2c_bus_device driver for fpga i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_fpga_i2c_debug = 0;
+static int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_fpga_i2c_debug) { \
+ printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_fpga_i2c_error) { \
+ printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data0 = {
+ .adap_nr = 2,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x100,
+ .i2c_filter = 0x104,
+ .i2c_stretch = 0x108,
+ .i2c_ext_9548_exits_flag = 0x10c,
+ .i2c_ext_9548_addr = 0x110,
+ .i2c_ext_9548_chan = 0x114,
+ .i2c_in_9548_chan = 0x118,
+ .i2c_slave = 0x11c,
+ .i2c_reg = 0x120,
+ .i2c_reg_len = 0x130,
+ .i2c_data_len = 0x134,
+ .i2c_ctrl = 0x138,
+ .i2c_status = 0x13c,
+ .i2c_data_buf = 0x180,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x28,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data1 = {
+ .adap_nr = 3,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x200,
+ .i2c_filter = 0x204,
+ .i2c_stretch = 0x208,
+ .i2c_ext_9548_exits_flag = 0x20c,
+ .i2c_ext_9548_addr = 0x210,
+ .i2c_ext_9548_chan = 0x214,
+ .i2c_in_9548_chan = 0x218,
+ .i2c_slave = 0x21c,
+ .i2c_reg = 0x220,
+ .i2c_reg_len = 0x230,
+ .i2c_data_len = 0x234,
+ .i2c_ctrl = 0x238,
+ .i2c_status = 0x23c,
+ .i2c_data_buf = 0x280,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x28,
+ .i2c_reset_on = 0x00000002,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data2 = {
+ .adap_nr = 4,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x300,
+ .i2c_filter = 0x304,
+ .i2c_stretch = 0x308,
+ .i2c_ext_9548_exits_flag = 0x30c,
+ .i2c_ext_9548_addr = 0x310,
+ .i2c_ext_9548_chan = 0x314,
+ .i2c_in_9548_chan = 0x318,
+ .i2c_slave = 0x31c,
+ .i2c_reg = 0x320,
+ .i2c_reg_len = 0x330,
+ .i2c_data_len = 0x334,
+ .i2c_ctrl = 0x338,
+ .i2c_status = 0x33c,
+ .i2c_data_buf = 0x380,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x28,
+ .i2c_reset_on = 0x00000004,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data3 = {
+ .adap_nr = 5,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x400,
+ .i2c_filter = 0x404,
+ .i2c_stretch = 0x408,
+ .i2c_ext_9548_exits_flag = 0x40c,
+ .i2c_ext_9548_addr = 0x410,
+ .i2c_ext_9548_chan = 0x414,
+ .i2c_in_9548_chan = 0x418,
+ .i2c_slave = 0x41c,
+ .i2c_reg = 0x420,
+ .i2c_reg_len = 0x430,
+ .i2c_data_len = 0x434,
+ .i2c_ctrl = 0x438,
+ .i2c_status = 0x43c,
+ .i2c_data_buf = 0x480,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x28,
+ .i2c_reset_on = 0x00000008,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data4 = {
+ .adap_nr = 6,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x500,
+ .i2c_filter = 0x504,
+ .i2c_stretch = 0x508,
+ .i2c_ext_9548_exits_flag = 0x50c,
+ .i2c_ext_9548_addr = 0x510,
+ .i2c_ext_9548_chan = 0x514,
+ .i2c_in_9548_chan = 0x518,
+ .i2c_slave = 0x51c,
+ .i2c_reg = 0x520,
+ .i2c_reg_len = 0x530,
+ .i2c_data_len = 0x534,
+ .i2c_ctrl = 0x538,
+ .i2c_status = 0x53c,
+ .i2c_data_buf = 0x580,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x28,
+ .i2c_reset_on = 0x00000010,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data5 = {
+ .adap_nr = 7,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x600,
+ .i2c_filter = 0x604,
+ .i2c_stretch = 0x608,
+ .i2c_ext_9548_exits_flag = 0x60c,
+ .i2c_ext_9548_addr = 0x610,
+ .i2c_ext_9548_chan = 0x614,
+ .i2c_in_9548_chan = 0x618,
+ .i2c_slave = 0x61c,
+ .i2c_reg = 0x620,
+ .i2c_reg_len = 0x630,
+ .i2c_data_len = 0x634,
+ .i2c_ctrl = 0x638,
+ .i2c_status = 0x63c,
+ .i2c_data_buf = 0x680,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x28,
+ .i2c_reset_on = 0x00000020,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data6 = {
+ .adap_nr = 199,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1a00,
+ .i2c_filter = 0x1a04,
+ .i2c_stretch = 0x1a08,
+ .i2c_ext_9548_exits_flag = 0x1a0c,
+ .i2c_ext_9548_addr = 0x1a10,
+ .i2c_ext_9548_chan = 0x1a14,
+ .i2c_in_9548_chan = 0x1a18,
+ .i2c_slave = 0x1a1c,
+ .i2c_reg = 0x1a20,
+ .i2c_reg_len = 0x1a30,
+ .i2c_data_len = 0x1a34,
+ .i2c_ctrl = 0x1a38,
+ .i2c_status = 0x1a3c,
+ .i2c_data_buf = 0x1b00,
+ .i2c_data_buf_len = 0x100,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x28,
+ .i2c_reset_on = 0x00000040,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data0 = {
+ .adap_nr = 8,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x800,
+ .i2c_filter = 0x804,
+ .i2c_stretch = 0x808,
+ .i2c_ext_9548_exits_flag = 0x80c,
+ .i2c_ext_9548_addr = 0x810,
+ .i2c_ext_9548_chan = 0x814,
+ .i2c_in_9548_chan = 0x818,
+ .i2c_slave = 0x81c,
+ .i2c_reg = 0x820,
+ .i2c_reg_len = 0x830,
+ .i2c_data_len = 0x834,
+ .i2c_ctrl = 0x838,
+ .i2c_status = 0x83c,
+ .i2c_data_buf = 0x880,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data1 = {
+ .adap_nr = 9,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x900,
+ .i2c_filter = 0x904,
+ .i2c_stretch = 0x908,
+ .i2c_ext_9548_exits_flag = 0x90c,
+ .i2c_ext_9548_addr = 0x910,
+ .i2c_ext_9548_chan = 0x914,
+ .i2c_in_9548_chan = 0x918,
+ .i2c_slave = 0x91c,
+ .i2c_reg = 0x920,
+ .i2c_reg_len = 0x930,
+ .i2c_data_len = 0x934,
+ .i2c_ctrl = 0x938,
+ .i2c_status = 0x93c,
+ .i2c_data_buf = 0x980,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000002,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data2 = {
+ .adap_nr = 10,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xa00,
+ .i2c_filter = 0xa04,
+ .i2c_stretch = 0xa08,
+ .i2c_ext_9548_exits_flag = 0xa0c,
+ .i2c_ext_9548_addr = 0xa10,
+ .i2c_ext_9548_chan = 0xa14,
+ .i2c_in_9548_chan = 0xa18,
+ .i2c_slave = 0xa1c,
+ .i2c_reg = 0xa20,
+ .i2c_reg_len = 0xa30,
+ .i2c_data_len = 0xa34,
+ .i2c_ctrl = 0xa38,
+ .i2c_status = 0xa3c,
+ .i2c_data_buf = 0xa80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000004,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data3 = {
+ .adap_nr = 11,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xb00,
+ .i2c_filter = 0xb04,
+ .i2c_stretch = 0xb08,
+ .i2c_ext_9548_exits_flag = 0xb0c,
+ .i2c_ext_9548_addr = 0xb10,
+ .i2c_ext_9548_chan = 0xb14,
+ .i2c_in_9548_chan = 0xb18,
+ .i2c_slave = 0xb1c,
+ .i2c_reg = 0xb20,
+ .i2c_reg_len = 0xb30,
+ .i2c_data_len = 0xb34,
+ .i2c_ctrl = 0xb38,
+ .i2c_status = 0xb3c,
+ .i2c_data_buf = 0xb80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000008,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data4 = {
+ .adap_nr = 12,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xc00,
+ .i2c_filter = 0xc04,
+ .i2c_stretch = 0xc08,
+ .i2c_ext_9548_exits_flag = 0xc0c,
+ .i2c_ext_9548_addr = 0xc10,
+ .i2c_ext_9548_chan = 0xc14,
+ .i2c_in_9548_chan = 0xc18,
+ .i2c_slave = 0xc1c,
+ .i2c_reg = 0xc20,
+ .i2c_reg_len = 0xc30,
+ .i2c_data_len = 0xc34,
+ .i2c_ctrl = 0xc38,
+ .i2c_status = 0xc3c,
+ .i2c_data_buf = 0xc80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000010,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data5 = {
+ .adap_nr = 13,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xd00,
+ .i2c_filter = 0xd04,
+ .i2c_stretch = 0xd08,
+ .i2c_ext_9548_exits_flag = 0xd0c,
+ .i2c_ext_9548_addr = 0xd10,
+ .i2c_ext_9548_chan = 0xd14,
+ .i2c_in_9548_chan = 0xd18,
+ .i2c_slave = 0xd1c,
+ .i2c_reg = 0xd20,
+ .i2c_reg_len = 0xd30,
+ .i2c_data_len = 0xd34,
+ .i2c_ctrl = 0xd38,
+ .i2c_status = 0xd3c,
+ .i2c_data_buf = 0xd80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000020,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data6 = {
+ .adap_nr = 14,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xe00,
+ .i2c_filter = 0xe04,
+ .i2c_stretch = 0xe08,
+ .i2c_ext_9548_exits_flag = 0xe0c,
+ .i2c_ext_9548_addr = 0xe10,
+ .i2c_ext_9548_chan = 0xe14,
+ .i2c_in_9548_chan = 0xe18,
+ .i2c_slave = 0xe1c,
+ .i2c_reg = 0xe20,
+ .i2c_reg_len = 0xe30,
+ .i2c_data_len = 0xe34,
+ .i2c_ctrl = 0xe38,
+ .i2c_status = 0xe3c,
+ .i2c_data_buf = 0xe80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000040,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data7 = {
+ .adap_nr = 15,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xf00,
+ .i2c_filter = 0xf04,
+ .i2c_stretch = 0xf08,
+ .i2c_ext_9548_exits_flag = 0xf0c,
+ .i2c_ext_9548_addr = 0xf10,
+ .i2c_ext_9548_chan = 0xf14,
+ .i2c_in_9548_chan = 0xf18,
+ .i2c_slave = 0xf1c,
+ .i2c_reg = 0xf20,
+ .i2c_reg_len = 0xf30,
+ .i2c_data_len = 0xf34,
+ .i2c_ctrl = 0xf38,
+ .i2c_status = 0xf3c,
+ .i2c_data_buf = 0xf80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000080,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data8 = {
+ .adap_nr = 16,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1000,
+ .i2c_filter = 0x1004,
+ .i2c_stretch = 0x1008,
+ .i2c_ext_9548_exits_flag = 0x100c,
+ .i2c_ext_9548_addr = 0x1010,
+ .i2c_ext_9548_chan = 0x1014,
+ .i2c_in_9548_chan = 0x1018,
+ .i2c_slave = 0x101c,
+ .i2c_reg = 0x1020,
+ .i2c_reg_len = 0x1030,
+ .i2c_data_len = 0x1034,
+ .i2c_ctrl = 0x1038,
+ .i2c_status = 0x103c,
+ .i2c_data_buf = 0x1080,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000100,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data9 = {
+ .adap_nr = 17,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1100,
+ .i2c_filter = 0x1104,
+ .i2c_stretch = 0x1108,
+ .i2c_ext_9548_exits_flag = 0x110c,
+ .i2c_ext_9548_addr = 0x1110,
+ .i2c_ext_9548_chan = 0x1114,
+ .i2c_in_9548_chan = 0x1118,
+ .i2c_slave = 0x111c,
+ .i2c_reg = 0x1120,
+ .i2c_reg_len = 0x1130,
+ .i2c_data_len = 0x1134,
+ .i2c_ctrl = 0x1138,
+ .i2c_status = 0x113c,
+ .i2c_data_buf = 0x1180,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000200,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data10 = {
+ .adap_nr = 18,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1200,
+ .i2c_filter = 0x1204,
+ .i2c_stretch = 0x1208,
+ .i2c_ext_9548_exits_flag = 0x120c,
+ .i2c_ext_9548_addr = 0x1210,
+ .i2c_ext_9548_chan = 0x1214,
+ .i2c_in_9548_chan = 0x1218,
+ .i2c_slave = 0x121c,
+ .i2c_reg = 0x1220,
+ .i2c_reg_len = 0x1230,
+ .i2c_data_len = 0x1234,
+ .i2c_ctrl = 0x1238,
+ .i2c_status = 0x123c,
+ .i2c_data_buf = 0x1280,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000400,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data11 = {
+ .adap_nr = 19,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1300,
+ .i2c_filter = 0x1304,
+ .i2c_stretch = 0x1308,
+ .i2c_ext_9548_exits_flag = 0x130c,
+ .i2c_ext_9548_addr = 0x1310,
+ .i2c_ext_9548_chan = 0x1314,
+ .i2c_in_9548_chan = 0x1318,
+ .i2c_slave = 0x131c,
+ .i2c_reg = 0x1320,
+ .i2c_reg_len = 0x1330,
+ .i2c_data_len = 0x1334,
+ .i2c_ctrl = 0x1338,
+ .i2c_status = 0x133c,
+ .i2c_data_buf = 0x1380,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00000800,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data12 = {
+ .adap_nr = 20,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1400,
+ .i2c_filter = 0x1404,
+ .i2c_stretch = 0x1408,
+ .i2c_ext_9548_exits_flag = 0x140c,
+ .i2c_ext_9548_addr = 0x1410,
+ .i2c_ext_9548_chan = 0x1414,
+ .i2c_in_9548_chan = 0x1418,
+ .i2c_slave = 0x141c,
+ .i2c_reg = 0x1420,
+ .i2c_reg_len = 0x1430,
+ .i2c_data_len = 0x1434,
+ .i2c_ctrl = 0x1438,
+ .i2c_status = 0x143c,
+ .i2c_data_buf = 0x1480,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00001000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data13 = {
+ .adap_nr = 21,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1500,
+ .i2c_filter = 0x1504,
+ .i2c_stretch = 0x1508,
+ .i2c_ext_9548_exits_flag = 0x150c,
+ .i2c_ext_9548_addr = 0x1510,
+ .i2c_ext_9548_chan = 0x1514,
+ .i2c_in_9548_chan = 0x1518,
+ .i2c_slave = 0x151c,
+ .i2c_reg = 0x1520,
+ .i2c_reg_len = 0x1530,
+ .i2c_data_len = 0x1534,
+ .i2c_ctrl = 0x1538,
+ .i2c_status = 0x153c,
+ .i2c_data_buf = 0x1580,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00002000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data14 = {
+ .adap_nr = 22,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1600,
+ .i2c_filter = 0x1604,
+ .i2c_stretch = 0x1608,
+ .i2c_ext_9548_exits_flag = 0x160c,
+ .i2c_ext_9548_addr = 0x1610,
+ .i2c_ext_9548_chan = 0x1614,
+ .i2c_in_9548_chan = 0x1618,
+ .i2c_slave = 0x161c,
+ .i2c_reg = 0x1620,
+ .i2c_reg_len = 0x1630,
+ .i2c_data_len = 0x1634,
+ .i2c_ctrl = 0x1638,
+ .i2c_status = 0x163c,
+ .i2c_data_buf = 0x1680,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00004000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data15 = {
+ .adap_nr = 23,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1700,
+ .i2c_filter = 0x1704,
+ .i2c_stretch = 0x1708,
+ .i2c_ext_9548_exits_flag = 0x170c,
+ .i2c_ext_9548_addr = 0x1710,
+ .i2c_ext_9548_chan = 0x1714,
+ .i2c_in_9548_chan = 0x1718,
+ .i2c_slave = 0x171c,
+ .i2c_reg = 0x1720,
+ .i2c_reg_len = 0x1730,
+ .i2c_data_len = 0x1734,
+ .i2c_ctrl = 0x1738,
+ .i2c_status = 0x173c,
+ .i2c_data_buf = 0x1780,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x2c,
+ .i2c_reset_on = 0x00008000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data0 = {
+ .adap_nr = 24,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x100,
+ .i2c_filter = 0x104,
+ .i2c_stretch = 0x108,
+ .i2c_ext_9548_exits_flag = 0x10c,
+ .i2c_ext_9548_addr = 0x110,
+ .i2c_ext_9548_chan = 0x114,
+ .i2c_in_9548_chan = 0x118,
+ .i2c_slave = 0x11c,
+ .i2c_reg = 0x120,
+ .i2c_reg_len = 0x130,
+ .i2c_data_len = 0x134,
+ .i2c_ctrl = 0x138,
+ .i2c_status = 0x13c,
+ .i2c_data_buf = 0x180,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data1 = {
+ .adap_nr = 25,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x200,
+ .i2c_filter = 0x204,
+ .i2c_stretch = 0x208,
+ .i2c_ext_9548_exits_flag = 0x20c,
+ .i2c_ext_9548_addr = 0x210,
+ .i2c_ext_9548_chan = 0x214,
+ .i2c_in_9548_chan = 0x218,
+ .i2c_slave = 0x21c,
+ .i2c_reg = 0x220,
+ .i2c_reg_len = 0x230,
+ .i2c_data_len = 0x234,
+ .i2c_ctrl = 0x238,
+ .i2c_status = 0x23c,
+ .i2c_data_buf = 0x280,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000002,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data2 = {
+ .adap_nr = 26,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x300,
+ .i2c_filter = 0x304,
+ .i2c_stretch = 0x308,
+ .i2c_ext_9548_exits_flag = 0x30c,
+ .i2c_ext_9548_addr = 0x310,
+ .i2c_ext_9548_chan = 0x314,
+ .i2c_in_9548_chan = 0x318,
+ .i2c_slave = 0x31c,
+ .i2c_reg = 0x320,
+ .i2c_reg_len = 0x330,
+ .i2c_data_len = 0x334,
+ .i2c_ctrl = 0x338,
+ .i2c_status = 0x33c,
+ .i2c_data_buf = 0x380,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000004,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data3 = {
+ .adap_nr = 27,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x400,
+ .i2c_filter = 0x404,
+ .i2c_stretch = 0x408,
+ .i2c_ext_9548_exits_flag = 0x40c,
+ .i2c_ext_9548_addr = 0x410,
+ .i2c_ext_9548_chan = 0x414,
+ .i2c_in_9548_chan = 0x418,
+ .i2c_slave = 0x41c,
+ .i2c_reg = 0x420,
+ .i2c_reg_len = 0x430,
+ .i2c_data_len = 0x434,
+ .i2c_ctrl = 0x438,
+ .i2c_status = 0x43c,
+ .i2c_data_buf = 0x480,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000008,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data4 = {
+ .adap_nr = 28,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x500,
+ .i2c_filter = 0x504,
+ .i2c_stretch = 0x508,
+ .i2c_ext_9548_exits_flag = 0x50c,
+ .i2c_ext_9548_addr = 0x510,
+ .i2c_ext_9548_chan = 0x514,
+ .i2c_in_9548_chan = 0x518,
+ .i2c_slave = 0x51c,
+ .i2c_reg = 0x520,
+ .i2c_reg_len = 0x530,
+ .i2c_data_len = 0x534,
+ .i2c_ctrl = 0x538,
+ .i2c_status = 0x53c,
+ .i2c_data_buf = 0x580,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000010,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data5 = {
+ .adap_nr = 29,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x600,
+ .i2c_filter = 0x604,
+ .i2c_stretch = 0x608,
+ .i2c_ext_9548_exits_flag = 0x60c,
+ .i2c_ext_9548_addr = 0x610,
+ .i2c_ext_9548_chan = 0x614,
+ .i2c_in_9548_chan = 0x618,
+ .i2c_slave = 0x61c,
+ .i2c_reg = 0x620,
+ .i2c_reg_len = 0x630,
+ .i2c_data_len = 0x634,
+ .i2c_ctrl = 0x638,
+ .i2c_status = 0x63c,
+ .i2c_data_buf = 0x680,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000020,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data6 = {
+ .adap_nr = 30,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x700,
+ .i2c_filter = 0x704,
+ .i2c_stretch = 0x708,
+ .i2c_ext_9548_exits_flag = 0x70c,
+ .i2c_ext_9548_addr = 0x710,
+ .i2c_ext_9548_chan = 0x714,
+ .i2c_in_9548_chan = 0x718,
+ .i2c_slave = 0x71c,
+ .i2c_reg = 0x720,
+ .i2c_reg_len = 0x730,
+ .i2c_data_len = 0x734,
+ .i2c_ctrl = 0x738,
+ .i2c_status = 0x73c,
+ .i2c_data_buf = 0x780,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000040,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data7 = {
+ .adap_nr = 31,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x800,
+ .i2c_filter = 0x804,
+ .i2c_stretch = 0x808,
+ .i2c_ext_9548_exits_flag = 0x80c,
+ .i2c_ext_9548_addr = 0x810,
+ .i2c_ext_9548_chan = 0x814,
+ .i2c_in_9548_chan = 0x818,
+ .i2c_slave = 0x81c,
+ .i2c_reg = 0x820,
+ .i2c_reg_len = 0x830,
+ .i2c_data_len = 0x834,
+ .i2c_ctrl = 0x838,
+ .i2c_status = 0x83c,
+ .i2c_data_buf = 0x880,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000080,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data8 = {
+ .adap_nr = 32,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x900,
+ .i2c_filter = 0x904,
+ .i2c_stretch = 0x908,
+ .i2c_ext_9548_exits_flag = 0x90c,
+ .i2c_ext_9548_addr = 0x910,
+ .i2c_ext_9548_chan = 0x914,
+ .i2c_in_9548_chan = 0x918,
+ .i2c_slave = 0x91c,
+ .i2c_reg = 0x920,
+ .i2c_reg_len = 0x930,
+ .i2c_data_len = 0x934,
+ .i2c_ctrl = 0x938,
+ .i2c_status = 0x93c,
+ .i2c_data_buf = 0x980,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000100,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data9 = {
+ .adap_nr = 33,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xa00,
+ .i2c_filter = 0xa04,
+ .i2c_stretch = 0xa08,
+ .i2c_ext_9548_exits_flag = 0xa0c,
+ .i2c_ext_9548_addr = 0xa10,
+ .i2c_ext_9548_chan = 0xa14,
+ .i2c_in_9548_chan = 0xa18,
+ .i2c_slave = 0xa1c,
+ .i2c_reg = 0xa20,
+ .i2c_reg_len = 0xa30,
+ .i2c_data_len = 0xa34,
+ .i2c_ctrl = 0xa38,
+ .i2c_status = 0xa3c,
+ .i2c_data_buf = 0xa80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000200,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data10 = {
+ .adap_nr = 34,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xb00,
+ .i2c_filter = 0xb04,
+ .i2c_stretch = 0xb08,
+ .i2c_ext_9548_exits_flag = 0xb0c,
+ .i2c_ext_9548_addr = 0xb10,
+ .i2c_ext_9548_chan = 0xb14,
+ .i2c_in_9548_chan = 0xb18,
+ .i2c_slave = 0xb1c,
+ .i2c_reg = 0xb20,
+ .i2c_reg_len = 0xb30,
+ .i2c_data_len = 0xb34,
+ .i2c_ctrl = 0xb38,
+ .i2c_status = 0xb3c,
+ .i2c_data_buf = 0xb80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000400,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data11 = {
+ .adap_nr = 35,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xc00,
+ .i2c_filter = 0xc04,
+ .i2c_stretch = 0xc08,
+ .i2c_ext_9548_exits_flag = 0xc0c,
+ .i2c_ext_9548_addr = 0xc10,
+ .i2c_ext_9548_chan = 0xc14,
+ .i2c_in_9548_chan = 0xc18,
+ .i2c_slave = 0xc1c,
+ .i2c_reg = 0xc20,
+ .i2c_reg_len = 0xc30,
+ .i2c_data_len = 0xc34,
+ .i2c_ctrl = 0xc38,
+ .i2c_status = 0xc3c,
+ .i2c_data_buf = 0xc80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00000800,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data12 = {
+ .adap_nr = 36,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xd00,
+ .i2c_filter = 0xd04,
+ .i2c_stretch = 0xd08,
+ .i2c_ext_9548_exits_flag = 0xd0c,
+ .i2c_ext_9548_addr = 0xd10,
+ .i2c_ext_9548_chan = 0xd14,
+ .i2c_in_9548_chan = 0xd18,
+ .i2c_slave = 0xd1c,
+ .i2c_reg = 0xd20,
+ .i2c_reg_len = 0xd30,
+ .i2c_data_len = 0xd34,
+ .i2c_ctrl = 0xd38,
+ .i2c_status = 0xd3c,
+ .i2c_data_buf = 0xd80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00001000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data13 = {
+ .adap_nr = 37,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xe00,
+ .i2c_filter = 0xe04,
+ .i2c_stretch = 0xe08,
+ .i2c_ext_9548_exits_flag = 0xe0c,
+ .i2c_ext_9548_addr = 0xe10,
+ .i2c_ext_9548_chan = 0xe14,
+ .i2c_in_9548_chan = 0xe18,
+ .i2c_slave = 0xe1c,
+ .i2c_reg = 0xe20,
+ .i2c_reg_len = 0xe30,
+ .i2c_data_len = 0xe34,
+ .i2c_ctrl = 0xe38,
+ .i2c_status = 0xe3c,
+ .i2c_data_buf = 0xe80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00002000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data14 = {
+ .adap_nr = 38,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0xf00,
+ .i2c_filter = 0xf04,
+ .i2c_stretch = 0xf08,
+ .i2c_ext_9548_exits_flag = 0xf0c,
+ .i2c_ext_9548_addr = 0xf10,
+ .i2c_ext_9548_chan = 0xf14,
+ .i2c_in_9548_chan = 0xf18,
+ .i2c_slave = 0xf1c,
+ .i2c_reg = 0xf20,
+ .i2c_reg_len = 0xf30,
+ .i2c_data_len = 0xf34,
+ .i2c_ctrl = 0xf38,
+ .i2c_status = 0xf3c,
+ .i2c_data_buf = 0xf80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00004000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data15 = {
+ .adap_nr = 39,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1000,
+ .i2c_filter = 0x1004,
+ .i2c_stretch = 0x1008,
+ .i2c_ext_9548_exits_flag = 0x100c,
+ .i2c_ext_9548_addr = 0x1010,
+ .i2c_ext_9548_chan = 0x1014,
+ .i2c_in_9548_chan = 0x1018,
+ .i2c_slave = 0x101c,
+ .i2c_reg = 0x1020,
+ .i2c_reg_len = 0x1030,
+ .i2c_data_len = 0x1034,
+ .i2c_ctrl = 0x1038,
+ .i2c_status = 0x103c,
+ .i2c_data_buf = 0x1080,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00008000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data16 = {
+ .adap_nr = 40,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1100,
+ .i2c_filter = 0x1104,
+ .i2c_stretch = 0x1108,
+ .i2c_ext_9548_exits_flag = 0x110c,
+ .i2c_ext_9548_addr = 0x1110,
+ .i2c_ext_9548_chan = 0x1114,
+ .i2c_in_9548_chan = 0x1118,
+ .i2c_slave = 0x111c,
+ .i2c_reg = 0x1120,
+ .i2c_reg_len = 0x1130,
+ .i2c_data_len = 0x1134,
+ .i2c_ctrl = 0x1138,
+ .i2c_status = 0x113c,
+ .i2c_data_buf = 0x1180,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00010000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data17 = {
+ .adap_nr = 41,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1200,
+ .i2c_filter = 0x1204,
+ .i2c_stretch = 0x1208,
+ .i2c_ext_9548_exits_flag = 0x120c,
+ .i2c_ext_9548_addr = 0x1210,
+ .i2c_ext_9548_chan = 0x1214,
+ .i2c_in_9548_chan = 0x1218,
+ .i2c_slave = 0x121c,
+ .i2c_reg = 0x1220,
+ .i2c_reg_len = 0x1230,
+ .i2c_data_len = 0x1234,
+ .i2c_ctrl = 0x1238,
+ .i2c_status = 0x123c,
+ .i2c_data_buf = 0x1280,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00020000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data18 = {
+ .adap_nr = 42,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1300,
+ .i2c_filter = 0x1304,
+ .i2c_stretch = 0x1308,
+ .i2c_ext_9548_exits_flag = 0x130c,
+ .i2c_ext_9548_addr = 0x1310,
+ .i2c_ext_9548_chan = 0x1314,
+ .i2c_in_9548_chan = 0x1318,
+ .i2c_slave = 0x131c,
+ .i2c_reg = 0x1320,
+ .i2c_reg_len = 0x1330,
+ .i2c_data_len = 0x1334,
+ .i2c_ctrl = 0x1338,
+ .i2c_status = 0x133c,
+ .i2c_data_buf = 0x1380,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00040000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data19 = {
+ .adap_nr = 43,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1400,
+ .i2c_filter = 0x1404,
+ .i2c_stretch = 0x1408,
+ .i2c_ext_9548_exits_flag = 0x140c,
+ .i2c_ext_9548_addr = 0x1410,
+ .i2c_ext_9548_chan = 0x1414,
+ .i2c_in_9548_chan = 0x1418,
+ .i2c_slave = 0x141c,
+ .i2c_reg = 0x1420,
+ .i2c_reg_len = 0x1430,
+ .i2c_data_len = 0x1434,
+ .i2c_ctrl = 0x1438,
+ .i2c_status = 0x143c,
+ .i2c_data_buf = 0x1480,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00080000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data20 = {
+ .adap_nr = 44,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1500,
+ .i2c_filter = 0x1504,
+ .i2c_stretch = 0x1508,
+ .i2c_ext_9548_exits_flag = 0x150c,
+ .i2c_ext_9548_addr = 0x1510,
+ .i2c_ext_9548_chan = 0x1514,
+ .i2c_in_9548_chan = 0x1518,
+ .i2c_slave = 0x151c,
+ .i2c_reg = 0x1520,
+ .i2c_reg_len = 0x1530,
+ .i2c_data_len = 0x1534,
+ .i2c_ctrl = 0x1538,
+ .i2c_status = 0x153c,
+ .i2c_data_buf = 0x1580,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00100000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data21 = {
+ .adap_nr = 45,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1600,
+ .i2c_filter = 0x1604,
+ .i2c_stretch = 0x1608,
+ .i2c_ext_9548_exits_flag = 0x160c,
+ .i2c_ext_9548_addr = 0x1610,
+ .i2c_ext_9548_chan = 0x1614,
+ .i2c_in_9548_chan = 0x1618,
+ .i2c_slave = 0x161c,
+ .i2c_reg = 0x1620,
+ .i2c_reg_len = 0x1630,
+ .i2c_data_len = 0x1634,
+ .i2c_ctrl = 0x1638,
+ .i2c_status = 0x163c,
+ .i2c_data_buf = 0x1680,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00200000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data22 = {
+ .adap_nr = 46,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1700,
+ .i2c_filter = 0x1704,
+ .i2c_stretch = 0x1708,
+ .i2c_ext_9548_exits_flag = 0x170c,
+ .i2c_ext_9548_addr = 0x1710,
+ .i2c_ext_9548_chan = 0x1714,
+ .i2c_in_9548_chan = 0x1718,
+ .i2c_slave = 0x171c,
+ .i2c_reg = 0x1720,
+ .i2c_reg_len = 0x1730,
+ .i2c_data_len = 0x1734,
+ .i2c_ctrl = 0x1738,
+ .i2c_status = 0x173c,
+ .i2c_data_buf = 0x1780,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00400000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data23 = {
+ .adap_nr = 47,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1800,
+ .i2c_filter = 0x1804,
+ .i2c_stretch = 0x1808,
+ .i2c_ext_9548_exits_flag = 0x180c,
+ .i2c_ext_9548_addr = 0x1810,
+ .i2c_ext_9548_chan = 0x1814,
+ .i2c_in_9548_chan = 0x1818,
+ .i2c_slave = 0x181c,
+ .i2c_reg = 0x1820,
+ .i2c_reg_len = 0x1830,
+ .i2c_data_len = 0x1834,
+ .i2c_ctrl = 0x1838,
+ .i2c_status = 0x183c,
+ .i2c_data_buf = 0x1880,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x00800000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data24 = {
+ .adap_nr = 48,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1900,
+ .i2c_filter = 0x1904,
+ .i2c_stretch = 0x1908,
+ .i2c_ext_9548_exits_flag = 0x190c,
+ .i2c_ext_9548_addr = 0x1910,
+ .i2c_ext_9548_chan = 0x1914,
+ .i2c_in_9548_chan = 0x1918,
+ .i2c_slave = 0x191c,
+ .i2c_reg = 0x1920,
+ .i2c_reg_len = 0x1930,
+ .i2c_data_len = 0x1934,
+ .i2c_ctrl = 0x1938,
+ .i2c_status = 0x193c,
+ .i2c_data_buf = 0x1980,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x01000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data25 = {
+ .adap_nr = 49,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1a00,
+ .i2c_filter = 0x1a04,
+ .i2c_stretch = 0x1a08,
+ .i2c_ext_9548_exits_flag = 0x1a0c,
+ .i2c_ext_9548_addr = 0x1a10,
+ .i2c_ext_9548_chan = 0x1a14,
+ .i2c_in_9548_chan = 0x1a18,
+ .i2c_slave = 0x1a1c,
+ .i2c_reg = 0x1a20,
+ .i2c_reg_len = 0x1a30,
+ .i2c_data_len = 0x1a34,
+ .i2c_ctrl = 0x1a38,
+ .i2c_status = 0x1a3c,
+ .i2c_data_buf = 0x1a80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x02000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data26 = {
+ .adap_nr = 50,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1b00,
+ .i2c_filter = 0x1b04,
+ .i2c_stretch = 0x1b08,
+ .i2c_ext_9548_exits_flag = 0x1b0c,
+ .i2c_ext_9548_addr = 0x1b10,
+ .i2c_ext_9548_chan = 0x1b14,
+ .i2c_in_9548_chan = 0x1b18,
+ .i2c_slave = 0x1b1c,
+ .i2c_reg = 0x1b20,
+ .i2c_reg_len = 0x1b30,
+ .i2c_data_len = 0x1b34,
+ .i2c_ctrl = 0x1b38,
+ .i2c_status = 0x1b3c,
+ .i2c_data_buf = 0x1b80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x04000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data27 = {
+ .adap_nr = 51,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1c00,
+ .i2c_filter = 0x1c04,
+ .i2c_stretch = 0x1c08,
+ .i2c_ext_9548_exits_flag = 0x1c0c,
+ .i2c_ext_9548_addr = 0x1c10,
+ .i2c_ext_9548_chan = 0x1c14,
+ .i2c_in_9548_chan = 0x1c18,
+ .i2c_slave = 0x1c1c,
+ .i2c_reg = 0x1c20,
+ .i2c_reg_len = 0x1c30,
+ .i2c_data_len = 0x1c34,
+ .i2c_ctrl = 0x1c38,
+ .i2c_status = 0x1c3c,
+ .i2c_data_buf = 0x1c80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x08000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data28 = {
+ .adap_nr = 52,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1d00,
+ .i2c_filter = 0x1d04,
+ .i2c_stretch = 0x1d08,
+ .i2c_ext_9548_exits_flag = 0x1d0c,
+ .i2c_ext_9548_addr = 0x1d10,
+ .i2c_ext_9548_chan = 0x1d14,
+ .i2c_in_9548_chan = 0x1d18,
+ .i2c_slave = 0x1d1c,
+ .i2c_reg = 0x1d20,
+ .i2c_reg_len = 0x1d30,
+ .i2c_data_len = 0x1d34,
+ .i2c_ctrl = 0x1d38,
+ .i2c_status = 0x1d3c,
+ .i2c_data_buf = 0x1d80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x10000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data29 = {
+ .adap_nr = 53,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1e00,
+ .i2c_filter = 0x1e04,
+ .i2c_stretch = 0x1e08,
+ .i2c_ext_9548_exits_flag = 0x1e0c,
+ .i2c_ext_9548_addr = 0x1e10,
+ .i2c_ext_9548_chan = 0x1e14,
+ .i2c_in_9548_chan = 0x1e18,
+ .i2c_slave = 0x1e1c,
+ .i2c_reg = 0x1e20,
+ .i2c_reg_len = 0x1e30,
+ .i2c_data_len = 0x1e34,
+ .i2c_ctrl = 0x1e38,
+ .i2c_status = 0x1e3c,
+ .i2c_data_buf = 0x1e80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x20000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data30 = {
+ .adap_nr = 54,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1f00,
+ .i2c_filter = 0x1f04,
+ .i2c_stretch = 0x1f08,
+ .i2c_ext_9548_exits_flag = 0x1f0c,
+ .i2c_ext_9548_addr = 0x1f10,
+ .i2c_ext_9548_chan = 0x1f14,
+ .i2c_in_9548_chan = 0x1f18,
+ .i2c_slave = 0x1f1c,
+ .i2c_reg = 0x1f20,
+ .i2c_reg_len = 0x1f30,
+ .i2c_data_len = 0x1f34,
+ .i2c_ctrl = 0x1f38,
+ .i2c_status = 0x1f3c,
+ .i2c_data_buf = 0x1f80,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x40000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data31 = {
+ .adap_nr = 55,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2000,
+ .i2c_filter = 0x2004,
+ .i2c_stretch = 0x2008,
+ .i2c_ext_9548_exits_flag = 0x200c,
+ .i2c_ext_9548_addr = 0x2010,
+ .i2c_ext_9548_chan = 0x2014,
+ .i2c_in_9548_chan = 0x2018,
+ .i2c_slave = 0x201c,
+ .i2c_reg = 0x2020,
+ .i2c_reg_len = 0x2030,
+ .i2c_data_len = 0x2034,
+ .i2c_ctrl = 0x2038,
+ .i2c_status = 0x203c,
+ .i2c_data_buf = 0x2080,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x1c,
+ .i2c_reset_on = 0x80000000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data0 = {
+ .adap_nr = 56,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2100,
+ .i2c_filter = 0x2104,
+ .i2c_stretch = 0x2108,
+ .i2c_ext_9548_exits_flag = 0x210c,
+ .i2c_ext_9548_addr = 0x2110,
+ .i2c_ext_9548_chan = 0x2114,
+ .i2c_in_9548_chan = 0x2118,
+ .i2c_slave = 0x211c,
+ .i2c_reg = 0x2120,
+ .i2c_reg_len = 0x2130,
+ .i2c_data_len = 0x2134,
+ .i2c_ctrl = 0x2138,
+ .i2c_status = 0x213c,
+ .i2c_data_buf = 0x2180,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x3c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data1 = {
+ .adap_nr = 57,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2200,
+ .i2c_filter = 0x2204,
+ .i2c_stretch = 0x2208,
+ .i2c_ext_9548_exits_flag = 0x220c,
+ .i2c_ext_9548_addr = 0x2210,
+ .i2c_ext_9548_chan = 0x2214,
+ .i2c_in_9548_chan = 0x2218,
+ .i2c_slave = 0x221c,
+ .i2c_reg = 0x2220,
+ .i2c_reg_len = 0x2230,
+ .i2c_data_len = 0x2234,
+ .i2c_ctrl = 0x2238,
+ .i2c_status = 0x223c,
+ .i2c_data_buf = 0x2280,
+ .dev_name = "/dev/fpga1",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 5,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x3c,
+ .i2c_reset_on = 0x00000002,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0,
+ .i2c_rst_delay = 1,
+ .i2c_rst_delay_a = 1,
+};
+
+static void wb_fpga_i2c_bus_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device fpga_i2c_bus_device[] = {
+ {
+ .name = "wb-fpga-i2c",
+ .id = 1,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 2,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 3,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data2,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 4,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data3,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 5,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data4,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 6,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data5,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 7,
+ .dev = {
+ .platform_data = &fpga_i2c_bus_device_data6,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 8,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 9,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 10,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data2,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 11,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data3,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 12,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data4,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 13,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data5,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 14,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data6,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 15,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data7,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 16,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data8,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 17,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data9,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 18,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data10,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 19,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data11,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 20,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data12,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 21,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data13,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 22,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data14,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 23,
+ .dev = {
+ .platform_data = &fpga_dom_i2c_bus_device_data15,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 24,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 25,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 26,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data2,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 27,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data3,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 28,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data4,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 29,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data5,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 30,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data6,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 31,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data7,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 32,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data8,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 33,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data9,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 34,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data10,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 35,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data11,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 36,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data12,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 37,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data13,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 38,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data14,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 39,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data15,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 40,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data16,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 41,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data17,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 42,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data18,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 43,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data19,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 44,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data20,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 45,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data21,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 46,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data22,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 47,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data23,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 48,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data24,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 49,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data25,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 50,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data26,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 51,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data27,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 52,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data28,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 53,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data29,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 54,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data30,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 55,
+ .dev = {
+ .platform_data = &fpga1_dom_i2c_bus_device_data31,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 56,
+ .dev = {
+ .platform_data = &fpga1_i2c_bus_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 57,
+ .dev = {
+ .platform_data = &fpga1_i2c_bus_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+};
+
+static int __init wb_fpga_i2c_bus_device_init(void)
+{
+ int i;
+ int ret = 0;
+ fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+ WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) {
+ fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+ ret = platform_device_register(&fpga_i2c_bus_device[i]);
+ if (ret < 0) {
+ fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1);
+ } else {
+ fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_fpga_i2c_bus_device_exit(void)
+{
+ int i;
+ fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+ WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) {
+ fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+ if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&fpga_i2c_bus_device[i]);
+ }
+ }
+}
+
+module_init(wb_fpga_i2c_bus_device_init);
+module_exit(wb_fpga_i2c_bus_device_exit);
+MODULE_DESCRIPTION("FPGA I2C Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c
new file mode 100644
index 000000000000..ecb846047676
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c
@@ -0,0 +1,832 @@
+/*
+ * An wb_fpga_pca954x_device driver for fpga pca954x device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_fpga_pca954x_device_debug = 0;
+static int g_wb_fpga_pca954x_device_error = 0;
+
+module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_fpga_pca954x_device_debug) { \
+ printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_fpga_pca954x_device_error) { \
+ printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static fpga_pca954x_device_t fpga_pca954x_device_data0 = {
+ .i2c_bus = 2,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 74,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data1 = {
+ .i2c_bus = 74,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 75,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data2 = {
+ .i2c_bus = 199,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 200,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data3 = {
+ .i2c_bus = 200,
+ .i2c_addr = 0x76,
+ .pca9548_base_nr = 83,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data4 = {
+ .i2c_bus = 3,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 91,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data5 = {
+ .i2c_bus = 91,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 92,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data6 = {
+ .i2c_bus = 4,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 100,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data7 = {
+ .i2c_bus = 100,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 101,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data8 = {
+ .i2c_bus = 5,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 109,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data9 = {
+ .i2c_bus = 6,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 117,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data10 = {
+ .i2c_bus = 7,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 125,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data11 = {
+ .i2c_bus = 8,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 133,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data12 = {
+ .i2c_bus = 9,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 137,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data13 = {
+ .i2c_bus = 10,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 141,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data14 = {
+ .i2c_bus = 11,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 145,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data15 = {
+ .i2c_bus = 12,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 149,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data16 = {
+ .i2c_bus = 13,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 153,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data17 = {
+ .i2c_bus = 14,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 157,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data18 = {
+ .i2c_bus = 15,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 161,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data19 = {
+ .i2c_bus = 16,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 165,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data20 = {
+ .i2c_bus = 17,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 169,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data21 = {
+ .i2c_bus = 18,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 173,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data22 = {
+ .i2c_bus = 19,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 177,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data23 = {
+ .i2c_bus = 20,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 181,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data24 = {
+ .i2c_bus = 21,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 185,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data25 = {
+ .i2c_bus = 22,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 189,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data26 = {
+ .i2c_bus = 23,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 193,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data27 = {
+ .i2c_bus = 24,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 135,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data28 = {
+ .i2c_bus = 25,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 136,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data29 = {
+ .i2c_bus = 26,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 139,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data30 = {
+ .i2c_bus = 27,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 140,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data31 = {
+ .i2c_bus = 28,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 143,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data32 = {
+ .i2c_bus = 29,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 144,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data33 = {
+ .i2c_bus = 30,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 147,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data34 = {
+ .i2c_bus = 31,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 148,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data35 = {
+ .i2c_bus = 32,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 151,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data36 = {
+ .i2c_bus = 33,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 152,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data37 = {
+ .i2c_bus = 34,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 155,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data38 = {
+ .i2c_bus = 35,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 156,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data39 = {
+ .i2c_bus = 36,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 159,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data40 = {
+ .i2c_bus = 37,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 160,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data41 = {
+ .i2c_bus = 38,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 163,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data42 = {
+ .i2c_bus = 39,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 164,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data43 = {
+ .i2c_bus = 40,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 167,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data44 = {
+ .i2c_bus = 41,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 168,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data45 = {
+ .i2c_bus = 42,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 171,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data46 = {
+ .i2c_bus = 43,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 172,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data47 = {
+ .i2c_bus = 44,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 175,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data48 = {
+ .i2c_bus = 45,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 176,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data49 = {
+ .i2c_bus = 46,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 179,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data50 = {
+ .i2c_bus = 47,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 180,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data51 = {
+ .i2c_bus = 48,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 183,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data52 = {
+ .i2c_bus = 49,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 184,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data53 = {
+ .i2c_bus = 50,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 187,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data54 = {
+ .i2c_bus = 51,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 188,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data55 = {
+ .i2c_bus = 52,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 191,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data56 = {
+ .i2c_bus = 53,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 192,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data57 = {
+ .i2c_bus = 54,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 195,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data58 = {
+ .i2c_bus = 55,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 196,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data59 = {
+ .i2c_bus = 56,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 197,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data60 = {
+ .i2c_bus = 57,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 198,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+struct i2c_board_info fpga_pca954x_device_info[] = {
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data0,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data1,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data2,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data3,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data4,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data5,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data6,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data7,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data8,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data9,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data10,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data11,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data12,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data13,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data14,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data15,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data16,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data17,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data18,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data19,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data20,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data21,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data22,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data23,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data24,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data25,
+ },
+ {
+ .type = "wb_fpga_pca9542",
+ .platform_data = &fpga_pca954x_device_data26,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data27,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data28,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data29,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data30,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data31,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data32,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data33,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data34,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data35,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data36,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data37,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data38,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data39,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data40,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data41,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data42,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data43,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data44,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data45,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data46,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data47,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data48,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data49,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data50,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data51,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data52,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data53,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data54,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data55,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data56,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data57,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data58,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data59,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data60,
+ },
+};
+
+static int __init wb_fpga_pca954x_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+ WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) {
+ fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+ fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr;
+ adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus);
+ if (adap == NULL) {
+ fpga_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]);
+ if (!client) {
+ fpga_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n",
+ fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus);
+ } else {
+ fpga_pca954x_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_fpga_pca954x_device_exit(void)
+{
+ int i;
+ fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+ WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) {
+ fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+ if (fpga_pca954x_device_data->client) {
+ i2c_unregister_device(fpga_pca954x_device_data->client);
+ fpga_pca954x_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_fpga_pca954x_device_init);
+module_exit(wb_fpga_pca954x_device_exit);
+MODULE_DESCRIPTION("FPGA PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..0f97f8f5e040
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,190 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_i2c_dev_device_debug) { \
+ printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_i2c_dev_device_error) { \
+ printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+ .i2c_bus = 109,
+ .i2c_addr = 0x1d,
+ .i2c_name = "cpld4",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+ .i2c_bus = 110,
+ .i2c_addr = 0x2d,
+ .i2c_name = "cpld5",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+ .i2c_bus = 111,
+ .i2c_addr = 0x3d,
+ .i2c_name = "cpld6",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data3 = {
+ .i2c_bus = 112,
+ .i2c_addr = 0x4d,
+ .i2c_name = "cpld7",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data4 = {
+ .i2c_bus = 92,
+ .i2c_addr = 0x0d,
+ .i2c_name = "cpld8",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data5 = {
+ .i2c_bus = 101,
+ .i2c_addr = 0x0d,
+ .i2c_name = "cpld9",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+struct i2c_board_info i2c_dev_device_info[] = {
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data0,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data1,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data2,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data3,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data4,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data5,
+ },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ i2c_dev_device_t *i2c_dev_device_data;
+
+ WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+ i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+ i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+ adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+ if (adap == NULL) {
+ i2c_dev_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+ if (!client) {
+ i2c_dev_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+ i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+ } else {
+ i2c_dev_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+ int i;
+ i2c_dev_device_t *i2c_dev_device_data;
+
+ WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+ i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+ if (i2c_dev_device_data->client) {
+ i2c_unregister_device(i2c_dev_device_data->client);
+ i2c_dev_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..dc54dee29fce
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,146 @@
+/*
+ * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_i2c_mux_pca954x_device_debug) { \
+ printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_i2c_mux_pca954x_device_error) { \
+ printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+ .i2c_bus = 1,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 1,
+ .close_chan_force_reset = 1,
+ .pca9548_base_nr = 58,
+ .pca9548_reset_type = PCA9548_RESET_IO,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .io_attr.io_addr = 0x915,
+ .io_attr.mask = 0x20,
+ .io_attr.reset_on = 0,
+ .io_attr.reset_off = 0x20,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+ .i2c_bus = 1,
+ .i2c_addr = 0x73,
+ .probe_disable = 1,
+ .select_chan_check = 1,
+ .close_chan_force_reset = 1,
+ .pca9548_base_nr = 66,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga1",
+ .file_attr.offset = 0x40,
+ .file_attr.mask = 0x1,
+ .file_attr.reset_on = 0x0,
+ .file_attr.reset_off = 0x1,
+ },
+};
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data0,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data1,
+ },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+ WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+ i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+ i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+ adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+ if (adap == NULL) {
+ i2c_mux_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+ if (!client) {
+ i2c_mux_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+ i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+ } else {
+ i2c_mux_pca954x_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+ int i;
+ i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+ WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+ i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+ if (i2c_mux_pca954x_device_data->client) {
+ i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+ i2c_mux_pca954x_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..ae7ff5523f63
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,138 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_io_dev_device_debug) { \
+ printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_io_dev_device_error) { \
+ printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+ .io_dev_name = "cpld0",
+ .io_base = 0x700,
+ .io_len = 0x100,
+ .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+ .io_dev_name = "cpld1",
+ .io_base = 0x900,
+ .io_len = 0x100,
+ .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data2 = {
+ .io_dev_name = "cpld2",
+ .io_base = 0xb00,
+ .io_len = 0x100,
+ .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device io_dev_device[] = {
+ {
+ .name = "wb-io-dev",
+ .id = 1,
+ .dev = {
+ .platform_data = &io_dev_device_data0,
+ .release = wb_io_dev_device_release,
+ },
+ },
+ {
+ .name = "wb-io-dev",
+ .id = 2,
+ .dev = {
+ .platform_data = &io_dev_device_data1,
+ .release = wb_io_dev_device_release,
+ },
+ },
+ {
+ .name = "wb-io-dev",
+ .id = 3,
+ .dev = {
+ .platform_data = &io_dev_device_data2,
+ .release = wb_io_dev_device_release,
+ },
+ },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+ int i;
+ int ret = 0;
+ io_dev_device_t *io_dev_device_data;
+
+ WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+ io_dev_device_data = io_dev_device[i].dev.platform_data;
+ ret = platform_device_register(&io_dev_device[i]);
+ if (ret < 0) {
+ io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+ } else {
+ io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+ int i;
+ io_dev_device_t *io_dev_device_data;
+
+ WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+ io_dev_device_data = io_dev_device[i].dev.platform_data;
+ if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&io_dev_device[i]);
+ }
+ }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..363d670d5a99
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,150 @@
+/*
+ * An wb_i2c_ocores_device driver for i2c ocore device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_lpc_drv_device_debug) { \
+ printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_lpc_drv_device_error) { \
+ printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+ .lpc_io_name = "wb_lpc",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x00,
+ .pci_slot = 0x1f,
+ .pci_fn = 0,
+ .lpc_io_base = 0x700,
+ .lpc_io_size = 0x100,
+ .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+ .lpc_io_name = "wb_lpc",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x00,
+ .pci_slot = 0x1f,
+ .pci_fn = 0,
+ .lpc_io_base = 0x900,
+ .lpc_io_size = 0x100,
+ .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+ .lpc_io_name = "wb_lpc",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x00,
+ .pci_slot = 0x1f,
+ .pci_fn = 0,
+ .lpc_io_base = 0xb00,
+ .lpc_io_size = 0x100,
+ .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+ {
+ .name = "wb-lpc",
+ .id = 1,
+ .dev = {
+ .platform_data = &lpc_drv_device_data_0,
+ .release = wb_lpc_drv_device_release,
+ },
+ },
+ {
+ .name = "wb-lpc",
+ .id = 2,
+ .dev = {
+ .platform_data = &lpc_drv_device_data_1,
+ .release = wb_lpc_drv_device_release,
+ },
+ },
+ {
+ .name = "wb-lpc",
+ .id = 3,
+ .dev = {
+ .platform_data = &lpc_drv_device_data_2,
+ .release = wb_lpc_drv_device_release,
+ },
+ },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+ int i;
+ int ret = 0;
+ lpc_drv_device_t *lpc_drv_device_data;
+
+ WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+ lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+ ret = platform_device_register(&lpc_drv_device[i]);
+ if (ret < 0) {
+ lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+ } else {
+ lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+ int i;
+ lpc_drv_device_t *lpc_drv_device_data;
+
+ WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+ lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+ if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&lpc_drv_device[i]);
+ }
+ }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..561e64d449b4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,113 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_pcie_dev_device_debug) { \
+ printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_pcie_dev_device_error) { \
+ printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+ .pci_dev_name = "fpga0",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x08,
+ .pci_slot = 0x00,
+ .pci_fn = 0,
+ .pci_bar = 0,
+ .bus_width = 4,
+ .upg_ctrl_base = 0xa00,
+ .upg_flash_base = 0x2f0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+ {
+ .name = "wb-pci-dev",
+ .id = 1,
+ .dev = {
+ .platform_data = &pcie_dev_device_data0,
+ .release = wb_pcie_dev_device_release,
+ },
+ },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+ int i;
+ int ret = 0;
+ pci_dev_device_t *pcie_dev_device_data;
+
+ WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+ pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+ ret = platform_device_register(&pcie_dev_device[i]);
+ if (ret < 0) {
+ pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+ } else {
+ pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+ int i;
+ pci_dev_device_t *pcie_dev_device_data;
+
+ WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+ pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+ if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&pcie_dev_device[i]);
+ }
+ }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c
new file mode 100644
index 000000000000..45f6038596b3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c
@@ -0,0 +1,126 @@
+/*
+ * An wb_spi_dev_device driver for spi device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include "wb_spi_master.h"
+
+#define SPI_DEVICE_MAX_NUM (64)
+
+static int g_wb_spi_dev_device_debug = 0;
+static int g_wb_spi_dev_device_error = 0;
+
+module_param(g_wb_spi_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_spi_dev_device_debug) { \
+ printk(KERN_INFO "[WB_SPI_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_SPI_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_spi_dev_device_error) { \
+ printk(KERN_ERR "[WB_SPI_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static spi_dev_device_t spi_dev_device_data0 = {
+ .spi_dev_name = "fpga1",
+ .data_bus_width = 4,
+ .addr_bus_width = 2,
+ .per_rd_len = 4,
+ .per_wr_len = 4,
+ .spi_len = 0xe000,
+};
+
+static struct spi_device *g_spi_device[SPI_DEVICE_MAX_NUM];
+
+struct spi_board_info spi_dev_device_info[] = {
+ {
+ .modalias = "wb-spi-dev",
+ .max_speed_hz = 6250000,
+ .bus_num = 1,
+ .chip_select = 0,
+ .mode = SPI_MODE_3,
+ .platform_data = &spi_dev_device_data0,
+ },
+};
+
+static int __init wb_spi_dev_device_init(void)
+{
+ int i;
+ struct spi_master *master;
+ struct spi_device *spi;
+ int spi_dev_num;
+
+ WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+
+ spi_dev_num = ARRAY_SIZE(spi_dev_device_info);
+ if (spi_dev_num > SPI_DEVICE_MAX_NUM) {
+ printk(KERN_ERR "spi_dev_num[%d] is bigger than max_num[%d].\n",
+ spi_dev_num, SPI_DEVICE_MAX_NUM);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(spi_dev_device_info); i++) {
+ master = wb_spi_master_busnum_to_master(spi_dev_device_info[i].bus_num);
+ if (!master) {
+ printk(KERN_ERR "get bus_num %u spi master failed.\n",
+ spi_dev_device_info[i].bus_num);
+ continue;
+ }
+ spi = spi_new_device(master, &spi_dev_device_info[i]);
+ put_device(&master->dev);
+ if (spi) {
+ g_spi_device[i] = spi;
+ } else {
+ g_spi_device[i] = NULL;
+ printk(KERN_ERR "Failed to register spi dev device %s at bus %d!\n",
+ spi_dev_device_info[i].modalias, spi_dev_device_info[i].bus_num);
+ continue;
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_spi_dev_device_exit(void)
+{
+ int i;
+
+ WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(spi_dev_device_info) - 1; i >= 0; i--) {
+ if (g_spi_device[i]) {
+ spi_unregister_device(g_spi_device[i]);
+ g_spi_device[i] = NULL;
+ }
+ }
+}
+
+module_init(wb_spi_dev_device_init);
+module_exit(wb_spi_dev_device_exit);
+MODULE_DESCRIPTION("SPI DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c
new file mode 100644
index 000000000000..9c4981321b64
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c
@@ -0,0 +1,74 @@
+/*
+ * An wb_spi_dev_platform_device driver for spi platform device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static int g_wb_spi_dev_platform_device_debug = 0;
+static int g_wb_spi_dev_platform_device_error = 0;
+
+module_param(g_wb_spi_dev_platform_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_dev_platform_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE(fmt, args...) do { \
+ if (g_wb_spi_dev_platform_device_debug) { \
+ printk(KERN_INFO "[WB_SPI_DEV_PLATFORM_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_SPI_DEV_PLATFORM_DEVICE_ERROR(fmt, args...) do { \
+ if (g_wb_spi_dev_platform_device_error) { \
+ printk(KERN_ERR "[WB_SPI_DEV_PLATFORM_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static void wb_spi_dev_platform_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device wb_spi_dev_platform_device = {
+ .name = "wb-spi-dev-device",
+ .id = 1,
+ .dev = {
+ .release = wb_spi_dev_platform_device_release,
+ },
+};
+
+static int __init wb_spi_dev_platform_device_init(void)
+{
+ WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE("wb_spi_dev_platform_device_init enter!\n");
+ return platform_device_register(&wb_spi_dev_platform_device);
+}
+
+static void __exit wb_spi_dev_platform_device_exit(void)
+{
+ WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE("wb_spi_dev_platform_device_exit enter!\n");
+ return platform_device_unregister(&wb_spi_dev_platform_device);
+}
+
+module_init(wb_spi_dev_platform_device_init);
+module_exit(wb_spi_dev_platform_device_exit);
+MODULE_DESCRIPTION("SPI Dev Platform Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c
new file mode 100644
index 000000000000..5c9cdbe1599f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c
@@ -0,0 +1,129 @@
+/*
+ * An wb_spi_master driver for spi master device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+
+#include "wb_spi_master.h"
+
+static int g_wb_spi_master_debug = 0;
+static int g_wb_spi_master_error = 0;
+
+module_param(g_wb_spi_master_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_master_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_MASTER_VERBOSE(fmt, args...) do { \
+ if (g_wb_spi_master_debug) { \
+ printk(KERN_INFO "[WB_SPI_MASTER][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_SPI_MASTER_ERROR(fmt, args...) do { \
+ if (g_wb_spi_master_error) { \
+ printk(KERN_ERR "[WB_SPI_MASTER][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static struct device g_wb_spi_device;
+/* point to spi_master_class in drivers/spi/spi.c */
+static struct class *g_wb_spi_master_class = NULL;
+static struct spi_controller *g_wb_spi_controller = NULL;
+
+static int __spi_controller_match(struct device *dev, const void *data)
+{
+ struct spi_controller *ctlr;
+ const u16 *bus_num = data;
+
+ ctlr = container_of(dev, struct spi_controller, dev);
+ return ctlr->bus_num == *bus_num;
+}
+
+/**
+ * wb_spi_master_busnum_to_master - look up master associated with bus_num
+ * @bus_num: the master's bus number
+ * Context: can sleep
+ *
+ * Return: the SPI master structure on success, else NULL.
+ */
+struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num)
+{
+ struct device *dev;
+ struct spi_controller *ctlr = NULL;
+
+ WB_SPI_MASTER_VERBOSE("Enter.\n");
+
+ if (g_wb_spi_master_class == NULL) {
+ WB_SPI_MASTER_ERROR("get g_wb_spi_master_class fail.\n");
+ return NULL;
+ }
+
+ dev = class_find_device(g_wb_spi_master_class, NULL, &bus_num, __spi_controller_match);
+ if (dev) {
+ ctlr = container_of(dev, struct spi_controller, dev);
+ }
+ /* reference got in class_find_device */
+ return ctlr;
+}
+EXPORT_SYMBOL_GPL(wb_spi_master_busnum_to_master);
+
+static int __init wb_spi_master_init(void)
+{
+ struct device *dev;
+ struct spi_board_info chip;
+
+ WB_SPI_MASTER_VERBOSE("Enter!\n");
+
+ device_initialize(&g_wb_spi_device);
+
+ g_wb_spi_controller = spi_alloc_master(&g_wb_spi_device, sizeof(struct spi_board_info));
+ if (g_wb_spi_controller == NULL) {
+ WB_SPI_MASTER_ERROR("spi_alloc_master failed.\n");
+ return -ENOMEM;
+ }
+
+ g_wb_spi_master_class = g_wb_spi_controller->dev.class;
+ if (g_wb_spi_master_class == NULL) {
+ WB_SPI_MASTER_ERROR("get class_spi_master failed.\n");
+ kfree(g_wb_spi_controller);
+ g_wb_spi_controller = NULL;
+ return -EINVAL;
+ }
+ printk(KERN_INFO "WB spi master init success.");
+
+ return 0;
+}
+
+static void __exit wb_spi_master_exit(void)
+{
+ WB_SPI_MASTER_VERBOSE("Enter!\n");
+ if (g_wb_spi_controller != NULL) {
+ kfree(g_wb_spi_controller);
+ }
+
+ return;
+}
+
+module_init(wb_spi_master_init);
+module_exit(wb_spi_master_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("create spi device");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h
new file mode 100644
index 000000000000..502ac68b5850
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h
@@ -0,0 +1,36 @@
+/*
+ * A header definition for wb_spi_master driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __WB_SPI_MASTER_H__
+#define __WB_SPI_MASTER_H__
+
+#include
+#include
+
+/**
+ * wb_spi_master_busnum_to_master - look up master associated with bus_num
+ * @bus_num: the master's bus number
+ * Context: can sleep
+ *
+ * Return: the SPI master structure on success, else NULL.
+ */
+struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num);
+
+#endif /* #ifndef __WB_SPI_MASTER_H__ */
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c
new file mode 100644
index 000000000000..86073dc12f30
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c
@@ -0,0 +1,114 @@
+/*
+ * An wb_spi_ocores_device driver for spi ocores device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_spi_ocores_device_debug = 0;
+static int g_wb_spi_ocores_device_error = 0;
+
+module_param(g_wb_spi_ocores_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_ocores_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_spi_ocores_device_debug) { \
+ printk(KERN_INFO "[WB_SPI_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_SPI_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_spi_ocores_device_error) { \
+ printk(KERN_ERR "[WB_SPI_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static spi_ocores_device_t spi_ocores_device_data0 = {
+ .bus_num = 1,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 2,
+ .dev_base = 0x1900,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .clock_frequency = 125000000,
+ .irq_flag = 0,
+ .num_chipselect = 8,
+};
+
+static void wb_spi_ocores_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device spi_ocores_device[] = {
+ {
+ .name = "wb-spioc",
+ .id = 1,
+ .dev = {
+ .platform_data = &spi_ocores_device_data0,
+ .release = wb_spi_ocores_device_release,
+ },
+ },
+};
+
+static int __init wb_spi_ocores_device_init(void)
+{
+ int i;
+ int ret = 0;
+ spi_ocores_device_t *spi_ocores_device_data;
+
+ WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(spi_ocores_device); i++) {
+ spi_ocores_device_data = spi_ocores_device[i].dev.platform_data;
+ ret = platform_device_register(&spi_ocores_device[i]);
+ if (ret < 0) {
+ spi_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-spi-oc.%d register failed!\n", i + 1);
+ } else {
+ spi_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_spi_ocores_device_exit(void)
+{
+ int i;
+ spi_ocores_device_t *spi_ocores_device_data;
+
+ WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(spi_ocores_device) - 1; i >= 0; i--) {
+ spi_ocores_device_data = spi_ocores_device[i].dev.platform_data;
+ if (spi_ocores_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&spi_ocores_device[i]);
+ }
+ }
+}
+
+module_init(wb_spi_ocores_device_init);
+module_exit(wb_spi_ocores_device_exit);
+MODULE_DESCRIPTION("SPI OCORES Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..53aa2be2aaea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,47 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=109
+cpld_i2c_dev.addr_0_2=0x1d
+cpld_i2c_dev.bus_0_3=110
+cpld_i2c_dev.addr_0_3=0x2d
+cpld_i2c_dev.bus_0_4=111
+cpld_i2c_dev.addr_0_4=0x3d
+cpld_i2c_dev.bus_0_5=112
+cpld_i2c_dev.addr_0_5=0x4d
+cpld_i2c_dev.bus_0_6=92
+cpld_i2c_dev.addr_0_6=0x0d
+cpld_i2c_dev.bus_0_7=101
+cpld_i2c_dev.addr_0_7=0x0d
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+mode_cpld_0_6=i2c
+mode_cpld_0_7=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=8
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..c7f4b9de5594
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,574 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=8
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00060030
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00070030
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=0
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00060030
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=1
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00070030
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=1
+
+dev_present_status.mode_1_5=config
+dev_present_status.src_1_5=cpld
+dev_present_status.frmt_1_5=bit
+dev_present_status.pola_1_5=negative
+dev_present_status.addr_1_5=0x00060030
+dev_present_status.len_1_5=1
+dev_present_status.bit_offset_1_5=2
+
+dev_present_status.mode_1_6=config
+dev_present_status.src_1_6=cpld
+dev_present_status.frmt_1_6=bit
+dev_present_status.pola_1_6=negative
+dev_present_status.addr_1_6=0x00070030
+dev_present_status.len_1_6=1
+dev_present_status.bit_offset_1_6=2
+
+dev_present_status.mode_1_7=config
+dev_present_status.src_1_7=cpld
+dev_present_status.frmt_1_7=bit
+dev_present_status.pola_1_7=negative
+dev_present_status.addr_1_7=0x00060030
+dev_present_status.len_1_7=1
+dev_present_status.bit_offset_1_7=3
+
+dev_present_status.mode_1_8=config
+dev_present_status.src_1_8=cpld
+dev_present_status.frmt_1_8=bit
+dev_present_status.pola_1_8=negative
+dev_present_status.addr_1_8=0x00070030
+dev_present_status.len_1_8=1
+dev_present_status.bit_offset_1_8=3
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00060031
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00060034
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=0
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00070031
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=0
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00070034
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=0
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00060031
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=1
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00060034
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=1
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00070031
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=1
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00070034
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=1
+
+fan_roll_status.mode_5_0=config
+fan_roll_status.int_cons_5_0=
+fan_roll_status.src_5_0=cpld
+fan_roll_status.frmt_5_0=bit
+fan_roll_status.pola_5_0=positive
+fan_roll_status.fpath_5_0=
+fan_roll_status.addr_5_0=0x00060031
+fan_roll_status.len_5_0=1
+fan_roll_status.bit_offset_5_0=2
+
+fan_roll_status.mode_5_1=config
+fan_roll_status.int_cons_5_1=
+fan_roll_status.src_5_1=cpld
+fan_roll_status.frmt_5_1=bit
+fan_roll_status.pola_5_1=positive
+fan_roll_status.fpath_5_1=
+fan_roll_status.addr_5_1=0x00060034
+fan_roll_status.len_5_1=1
+fan_roll_status.bit_offset_5_1=2
+
+fan_roll_status.mode_6_0=config
+fan_roll_status.int_cons_6_0=
+fan_roll_status.src_6_0=cpld
+fan_roll_status.frmt_6_0=bit
+fan_roll_status.pola_6_0=positive
+fan_roll_status.fpath_6_0=
+fan_roll_status.addr_6_0=0x00070031
+fan_roll_status.len_6_0=1
+fan_roll_status.bit_offset_6_0=2
+
+fan_roll_status.mode_6_1=config
+fan_roll_status.int_cons_6_1=
+fan_roll_status.src_6_1=cpld
+fan_roll_status.frmt_6_1=bit
+fan_roll_status.pola_6_1=positive
+fan_roll_status.fpath_6_1=
+fan_roll_status.addr_6_1=0x00070034
+fan_roll_status.len_6_1=1
+fan_roll_status.bit_offset_6_1=2
+
+fan_roll_status.mode_7_0=config
+fan_roll_status.int_cons_7_0=
+fan_roll_status.src_7_0=cpld
+fan_roll_status.frmt_7_0=bit
+fan_roll_status.pola_7_0=positive
+fan_roll_status.fpath_7_0=
+fan_roll_status.addr_7_0=0x00060031
+fan_roll_status.len_7_0=1
+fan_roll_status.bit_offset_7_0=3
+
+fan_roll_status.mode_7_1=config
+fan_roll_status.int_cons_7_1=
+fan_roll_status.src_7_1=cpld
+fan_roll_status.frmt_7_1=bit
+fan_roll_status.pola_7_1=positive
+fan_roll_status.fpath_7_1=
+fan_roll_status.addr_7_1=0x00060034
+fan_roll_status.len_7_1=1
+fan_roll_status.bit_offset_7_1=3
+
+fan_roll_status.mode_8_0=config
+fan_roll_status.int_cons_8_0=
+fan_roll_status.src_8_0=cpld
+fan_roll_status.frmt_8_0=bit
+fan_roll_status.pola_8_0=positive
+fan_roll_status.fpath_8_0=
+fan_roll_status.addr_8_0=0x00070031
+fan_roll_status.len_8_0=1
+fan_roll_status.bit_offset_8_0=3
+
+fan_roll_status.mode_8_1=config
+fan_roll_status.int_cons_8_1=
+fan_roll_status.src_8_1=cpld
+fan_roll_status.frmt_8_1=bit
+fan_roll_status.pola_8_1=positive
+fan_roll_status.fpath_8_1=
+fan_roll_status.addr_8_1=0x00070034
+fan_roll_status.len_8_1=1
+fan_roll_status.bit_offset_8_1=3
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x0006001b
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x00060025
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0007001b
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x00070025
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0006001d
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00060027
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x0007001d
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x00070027
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+fan_speed.mode_5_0=config
+fan_speed.int_cons_5_0=
+fan_speed.src_5_0=cpld
+fan_speed.frmt_5_0=num_bytes
+fan_speed.pola_5_0=negative
+fan_speed.fpath_5_0=
+fan_speed.addr_5_0=0x0006001f
+fan_speed.len_5_0=2
+fan_speed.bit_offset_5_0=
+
+fan_speed.mode_5_1=config
+fan_speed.int_cons_5_1=
+fan_speed.src_5_1=cpld
+fan_speed.frmt_5_1=num_bytes
+fan_speed.pola_5_1=negative
+fan_speed.fpath_5_1=
+fan_speed.addr_5_1=0x00060029
+fan_speed.len_5_1=2
+fan_speed.bit_offset_5_1=
+
+fan_speed.mode_6_0=config
+fan_speed.int_cons_6_0=
+fan_speed.src_6_0=cpld
+fan_speed.frmt_6_0=num_bytes
+fan_speed.pola_6_0=negative
+fan_speed.fpath_6_0=
+fan_speed.addr_6_0=0x0007001f
+fan_speed.len_6_0=2
+fan_speed.bit_offset_6_0=
+
+fan_speed.mode_6_1=config
+fan_speed.int_cons_6_1=
+fan_speed.src_6_1=cpld
+fan_speed.frmt_6_1=num_bytes
+fan_speed.pola_6_1=negative
+fan_speed.fpath_6_1=
+fan_speed.addr_6_1=0x00070029
+fan_speed.len_6_1=2
+fan_speed.bit_offset_6_1=
+
+fan_speed.mode_7_0=config
+fan_speed.int_cons_7_0=
+fan_speed.src_7_0=cpld
+fan_speed.frmt_7_0=num_bytes
+fan_speed.pola_7_0=negative
+fan_speed.fpath_7_0=
+fan_speed.addr_7_0=0x00060021
+fan_speed.len_7_0=2
+fan_speed.bit_offset_7_0=
+
+fan_speed.mode_7_1=config
+fan_speed.int_cons_7_1=
+fan_speed.src_7_1=cpld
+fan_speed.frmt_7_1=num_bytes
+fan_speed.pola_7_1=negative
+fan_speed.fpath_7_1=
+fan_speed.addr_7_1=0x0006002b
+fan_speed.len_7_1=2
+fan_speed.bit_offset_7_1=
+
+fan_speed.mode_8_0=config
+fan_speed.int_cons_8_0=
+fan_speed.src_8_0=cpld
+fan_speed.frmt_8_0=num_bytes
+fan_speed.pola_8_0=negative
+fan_speed.fpath_8_0=
+fan_speed.addr_8_0=0x00070021
+fan_speed.len_8_0=2
+fan_speed.bit_offset_8_0=
+
+fan_speed.mode_8_1=config
+fan_speed.int_cons_8_1=
+fan_speed.src_8_1=cpld
+fan_speed.frmt_8_1=num_bytes
+fan_speed.pola_8_1=negative
+fan_speed.fpath_8_1=
+fan_speed.addr_8_1=0x0007002b
+fan_speed.len_8_1=2
+fan_speed.bit_offset_8_1=
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00060014
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00060014
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00070014
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00070014
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00060015
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00060015
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00070015
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00070015
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
+
+fan_ratio.mode_5_0=config
+fan_ratio.int_cons_5_0=
+fan_ratio.src_5_0=cpld
+fan_ratio.frmt_5_0=byte
+fan_ratio.pola_5_0=
+fan_ratio.fpath_5_0=
+fan_ratio.addr_5_0=0x00060016
+fan_ratio.len_5_0=1
+fan_ratio.bit_offset_5_0=
+
+fan_ratio.mode_5_1=config
+fan_ratio.int_cons_5_1=
+fan_ratio.src_5_1=cpld
+fan_ratio.frmt_5_1=byte
+fan_ratio.pola_5_1=
+fan_ratio.fpath_5_1=
+fan_ratio.addr_5_1=0x00060016
+fan_ratio.len_5_1=1
+fan_ratio.bit_offset_5_1=
+
+fan_ratio.mode_6_0=config
+fan_ratio.int_cons_6_0=
+fan_ratio.src_6_0=cpld
+fan_ratio.frmt_6_0=byte
+fan_ratio.pola_6_0=
+fan_ratio.fpath_6_0=
+fan_ratio.addr_6_0=0x00070016
+fan_ratio.len_6_0=1
+fan_ratio.bit_offset_6_0=
+
+fan_ratio.mode_6_1=config
+fan_ratio.int_cons_6_1=
+fan_ratio.src_6_1=cpld
+fan_ratio.frmt_6_1=byte
+fan_ratio.pola_6_1=
+fan_ratio.fpath_6_1=
+fan_ratio.addr_6_1=0x00070016
+fan_ratio.len_6_1=1
+fan_ratio.bit_offset_6_1=
+
+fan_ratio.mode_7_0=config
+fan_ratio.int_cons_7_0=
+fan_ratio.src_7_0=cpld
+fan_ratio.frmt_7_0=byte
+fan_ratio.pola_7_0=
+fan_ratio.fpath_7_0=
+fan_ratio.addr_7_0=0x00060017
+fan_ratio.len_7_0=1
+fan_ratio.bit_offset_7_0=
+
+fan_ratio.mode_7_1=config
+fan_ratio.int_cons_7_1=
+fan_ratio.src_7_1=cpld
+fan_ratio.frmt_7_1=byte
+fan_ratio.pola_7_1=
+fan_ratio.fpath_7_1=
+fan_ratio.addr_7_1=0x00060017
+fan_ratio.len_7_1=1
+fan_ratio.bit_offset_7_1=
+
+fan_ratio.mode_8_0=config
+fan_ratio.int_cons_8_0=
+fan_ratio.src_8_0=cpld
+fan_ratio.frmt_8_0=byte
+fan_ratio.pola_8_0=
+fan_ratio.fpath_8_0=
+fan_ratio.addr_8_0=0x00070017
+fan_ratio.len_8_0=1
+fan_ratio.bit_offset_8_0=
+
+fan_ratio.mode_8_1=config
+fan_ratio.int_cons_8_1=
+fan_ratio.src_8_1=cpld
+fan_ratio.frmt_8_1=byte
+fan_ratio.pola_8_1=
+fan_ratio.fpath_8_1=
+fan_ratio.addr_8_1=0x00070017
+fan_ratio.len_8_1=1
+fan_ratio.bit_offset_8_1=
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..a04af1e63db8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,107 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=4
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00010064
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00010064
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=1
+
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00010064
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=2
+
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00010064
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=4
+
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00010064
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=5
+
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00010064
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=6
+
+psu_status.mode_3_0=config
+psu_status.src_3_0=cpld
+psu_status.frmt_3_0=bit
+psu_status.pola_3_0=negative
+psu_status.addr_3_0=0x00010065
+psu_status.len_3_0=1
+psu_status.bit_offset_3_0=4
+
+psu_status.mode_3_1=config
+psu_status.src_3_1=cpld
+psu_status.frmt_3_1=bit
+psu_status.pola_3_1=positive
+psu_status.addr_3_1=0x00010065
+psu_status.len_3_1=1
+psu_status.bit_offset_3_1=5
+
+psu_status.mode_3_2=config
+psu_status.src_3_2=cpld
+psu_status.frmt_3_2=bit
+psu_status.pola_3_2=negative
+psu_status.addr_3_2=0x00010065
+psu_status.len_3_2=1
+psu_status.bit_offset_3_2=6
+
+psu_status.mode_4_0=config
+psu_status.src_4_0=cpld
+psu_status.frmt_4_0=bit
+psu_status.pola_4_0=negative
+psu_status.addr_4_0=0x00010065
+psu_status.len_4_0=1
+psu_status.bit_offset_4_0=0
+
+psu_status.mode_4_1=config
+psu_status.src_4_1=cpld
+psu_status.frmt_4_1=bit
+psu_status.pola_4_1=positive
+psu_status.addr_4_1=0x00010065
+psu_status.len_4_1=1
+psu_status.bit_offset_4_1=1
+
+psu_status.mode_4_2=config
+psu_status.src_4_2=cpld
+psu_status.frmt_4_2=bit
+psu_status.pola_4_2=negative
+psu_status.addr_4_2=0x00010065
+psu_status.len_4_2=1
+psu_status.bit_offset_4_2=2
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..075073962a2e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,593 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=64
+
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff1
+sff_dir_name_2 =sff2
+sff_dir_name_3 =sff3
+sff_dir_name_4 =sff4
+sff_dir_name_5 =sff5
+sff_dir_name_6 =sff6
+sff_dir_name_7 =sff7
+sff_dir_name_8 =sff8
+sff_dir_name_9 =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+sff_dir_name_33 =sff33
+sff_dir_name_34 =sff34
+sff_dir_name_35 =sff35
+sff_dir_name_36 =sff36
+sff_dir_name_37 =sff37
+sff_dir_name_38 =sff38
+sff_dir_name_39 =sff39
+sff_dir_name_40 =sff40
+sff_dir_name_41 =sff41
+sff_dir_name_42 =sff42
+sff_dir_name_43 =sff43
+sff_dir_name_44 =sff44
+sff_dir_name_45 =sff45
+sff_dir_name_46 =sff46
+sff_dir_name_47 =sff47
+sff_dir_name_48 =sff48
+sff_dir_name_49 =sff49
+sff_dir_name_50 =sff50
+sff_dir_name_51 =sff51
+sff_dir_name_52 =sff52
+sff_dir_name_53 =sff53
+sff_dir_name_54 =sff54
+sff_dir_name_55 =sff55
+sff_dir_name_56 =sff56
+sff_dir_name_57 =sff57
+sff_dir_name_58 =sff58
+sff_dir_name_59 =sff59
+sff_dir_name_60 =sff60
+sff_dir_name_61 =sff61
+sff_dir_name_62 =sff62
+sff_dir_name_63 =sff63
+sff_dir_name_64 =sff64
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00030073
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=0
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00030073
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=1
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00040072
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=0
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00040072
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=1
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x00030073
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=2
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x00030073
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=3
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x00040072
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=2
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x00040072
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=3
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x00030073
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=4
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x00030073
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=5
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x00040072
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=4
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x00040072
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=5
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x00030073
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=6
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x00030073
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=7
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x00040072
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x00040072
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00030074
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00030074
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00050073
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=0
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00040073
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=0
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00030074
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=2
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00030074
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=3
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00040073
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=1
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00040073
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=2
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00030074
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=4
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00030074
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=5
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00040073
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=3
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00040073
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=4
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00030074
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=6
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00030074
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=7
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00040073
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=5
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00040073
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=6
+
+sff_cpld_reg.mode_33_8=config
+sff_cpld_reg.src_33_8=cpld
+sff_cpld_reg.frmt_33_8=bit
+sff_cpld_reg.pola_33_8=negative
+sff_cpld_reg.addr_33_8=0x00030075
+sff_cpld_reg.len_33_8=1
+sff_cpld_reg.bit_offset_33_8=0
+
+sff_cpld_reg.mode_34_8=config
+sff_cpld_reg.src_34_8=cpld
+sff_cpld_reg.frmt_34_8=bit
+sff_cpld_reg.pola_34_8=negative
+sff_cpld_reg.addr_34_8=0x00030075
+sff_cpld_reg.len_34_8=1
+sff_cpld_reg.bit_offset_34_8=1
+
+sff_cpld_reg.mode_35_8=config
+sff_cpld_reg.src_35_8=cpld
+sff_cpld_reg.frmt_35_8=bit
+sff_cpld_reg.pola_35_8=negative
+sff_cpld_reg.addr_35_8=0x00050073
+sff_cpld_reg.len_35_8=1
+sff_cpld_reg.bit_offset_35_8=1
+
+sff_cpld_reg.mode_36_8=config
+sff_cpld_reg.src_36_8=cpld
+sff_cpld_reg.frmt_36_8=bit
+sff_cpld_reg.pola_36_8=negative
+sff_cpld_reg.addr_36_8=0x00050073
+sff_cpld_reg.len_36_8=1
+sff_cpld_reg.bit_offset_36_8=2
+
+sff_cpld_reg.mode_37_8=config
+sff_cpld_reg.src_37_8=cpld
+sff_cpld_reg.frmt_37_8=bit
+sff_cpld_reg.pola_37_8=negative
+sff_cpld_reg.addr_37_8=0x00030075
+sff_cpld_reg.len_37_8=1
+sff_cpld_reg.bit_offset_37_8=2
+
+sff_cpld_reg.mode_38_8=config
+sff_cpld_reg.src_38_8=cpld
+sff_cpld_reg.frmt_38_8=bit
+sff_cpld_reg.pola_38_8=negative
+sff_cpld_reg.addr_38_8=0x00030075
+sff_cpld_reg.len_38_8=1
+sff_cpld_reg.bit_offset_38_8=3
+
+sff_cpld_reg.mode_39_8=config
+sff_cpld_reg.src_39_8=cpld
+sff_cpld_reg.frmt_39_8=bit
+sff_cpld_reg.pola_39_8=negative
+sff_cpld_reg.addr_39_8=0x00050073
+sff_cpld_reg.len_39_8=1
+sff_cpld_reg.bit_offset_39_8=3
+
+sff_cpld_reg.mode_40_8=config
+sff_cpld_reg.src_40_8=cpld
+sff_cpld_reg.frmt_40_8=bit
+sff_cpld_reg.pola_40_8=negative
+sff_cpld_reg.addr_40_8=0x00050073
+sff_cpld_reg.len_40_8=1
+sff_cpld_reg.bit_offset_40_8=4
+
+sff_cpld_reg.mode_41_8=config
+sff_cpld_reg.src_41_8=cpld
+sff_cpld_reg.frmt_41_8=bit
+sff_cpld_reg.pola_41_8=negative
+sff_cpld_reg.addr_41_8=0x00030075
+sff_cpld_reg.len_41_8=1
+sff_cpld_reg.bit_offset_41_8=4
+
+sff_cpld_reg.mode_42_8=config
+sff_cpld_reg.src_42_8=cpld
+sff_cpld_reg.frmt_42_8=bit
+sff_cpld_reg.pola_42_8=negative
+sff_cpld_reg.addr_42_8=0x00030075
+sff_cpld_reg.len_42_8=1
+sff_cpld_reg.bit_offset_42_8=5
+
+sff_cpld_reg.mode_43_8=config
+sff_cpld_reg.src_43_8=cpld
+sff_cpld_reg.frmt_43_8=bit
+sff_cpld_reg.pola_43_8=negative
+sff_cpld_reg.addr_43_8=0x00050073
+sff_cpld_reg.len_43_8=1
+sff_cpld_reg.bit_offset_43_8=5
+
+sff_cpld_reg.mode_44_8=config
+sff_cpld_reg.src_44_8=cpld
+sff_cpld_reg.frmt_44_8=bit
+sff_cpld_reg.pola_44_8=negative
+sff_cpld_reg.addr_44_8=0x00050073
+sff_cpld_reg.len_44_8=1
+sff_cpld_reg.bit_offset_44_8=6
+
+sff_cpld_reg.mode_45_8=config
+sff_cpld_reg.src_45_8=cpld
+sff_cpld_reg.frmt_45_8=bit
+sff_cpld_reg.pola_45_8=negative
+sff_cpld_reg.addr_45_8=0x00030075
+sff_cpld_reg.len_45_8=1
+sff_cpld_reg.bit_offset_45_8=6
+
+sff_cpld_reg.mode_46_8=config
+sff_cpld_reg.src_46_8=cpld
+sff_cpld_reg.frmt_46_8=bit
+sff_cpld_reg.pola_46_8=negative
+sff_cpld_reg.addr_46_8=0x00030075
+sff_cpld_reg.len_46_8=1
+sff_cpld_reg.bit_offset_46_8=7
+
+sff_cpld_reg.mode_47_8=config
+sff_cpld_reg.src_47_8=cpld
+sff_cpld_reg.frmt_47_8=bit
+sff_cpld_reg.pola_47_8=negative
+sff_cpld_reg.addr_47_8=0x00050073
+sff_cpld_reg.len_47_8=1
+sff_cpld_reg.bit_offset_47_8=7
+
+sff_cpld_reg.mode_48_8=config
+sff_cpld_reg.src_48_8=cpld
+sff_cpld_reg.frmt_48_8=bit
+sff_cpld_reg.pola_48_8=negative
+sff_cpld_reg.addr_48_8=0x00050074
+sff_cpld_reg.len_48_8=1
+sff_cpld_reg.bit_offset_48_8=0
+
+sff_cpld_reg.mode_49_8=config
+sff_cpld_reg.src_49_8=cpld
+sff_cpld_reg.frmt_49_8=bit
+sff_cpld_reg.pola_49_8=negative
+sff_cpld_reg.addr_49_8=0x00020071
+sff_cpld_reg.len_49_8=1
+sff_cpld_reg.bit_offset_49_8=0
+
+sff_cpld_reg.mode_50_8=config
+sff_cpld_reg.src_50_8=cpld
+sff_cpld_reg.frmt_50_8=bit
+sff_cpld_reg.pola_50_8=negative
+sff_cpld_reg.addr_50_8=0x00020071
+sff_cpld_reg.len_50_8=1
+sff_cpld_reg.bit_offset_50_8=1
+
+sff_cpld_reg.mode_51_8=config
+sff_cpld_reg.src_51_8=cpld
+sff_cpld_reg.frmt_51_8=bit
+sff_cpld_reg.pola_51_8=negative
+sff_cpld_reg.addr_51_8=0x00050074
+sff_cpld_reg.len_51_8=1
+sff_cpld_reg.bit_offset_51_8=1
+
+sff_cpld_reg.mode_52_8=config
+sff_cpld_reg.src_52_8=cpld
+sff_cpld_reg.frmt_52_8=bit
+sff_cpld_reg.pola_52_8=negative
+sff_cpld_reg.addr_52_8=0x00050074
+sff_cpld_reg.len_52_8=1
+sff_cpld_reg.bit_offset_52_8=2
+
+sff_cpld_reg.mode_53_8=config
+sff_cpld_reg.src_53_8=cpld
+sff_cpld_reg.frmt_53_8=bit
+sff_cpld_reg.pola_53_8=negative
+sff_cpld_reg.addr_53_8=0x00020071
+sff_cpld_reg.len_53_8=1
+sff_cpld_reg.bit_offset_53_8=2
+
+sff_cpld_reg.mode_54_8=config
+sff_cpld_reg.src_54_8=cpld
+sff_cpld_reg.frmt_54_8=bit
+sff_cpld_reg.pola_54_8=negative
+sff_cpld_reg.addr_54_8=0x00020071
+sff_cpld_reg.len_54_8=1
+sff_cpld_reg.bit_offset_54_8=3
+
+sff_cpld_reg.mode_55_8=config
+sff_cpld_reg.src_55_8=cpld
+sff_cpld_reg.frmt_55_8=bit
+sff_cpld_reg.pola_55_8=negative
+sff_cpld_reg.addr_55_8=0x00050074
+sff_cpld_reg.len_55_8=1
+sff_cpld_reg.bit_offset_55_8=3
+
+sff_cpld_reg.mode_56_8=config
+sff_cpld_reg.src_56_8=cpld
+sff_cpld_reg.frmt_56_8=bit
+sff_cpld_reg.pola_56_8=negative
+sff_cpld_reg.addr_56_8=0x00050074
+sff_cpld_reg.len_56_8=1
+sff_cpld_reg.bit_offset_56_8=4
+
+sff_cpld_reg.mode_57_8=config
+sff_cpld_reg.src_57_8=cpld
+sff_cpld_reg.frmt_57_8=bit
+sff_cpld_reg.pola_57_8=negative
+sff_cpld_reg.addr_57_8=0x00020071
+sff_cpld_reg.len_57_8=1
+sff_cpld_reg.bit_offset_57_8=4
+
+sff_cpld_reg.mode_58_8=config
+sff_cpld_reg.src_58_8=cpld
+sff_cpld_reg.frmt_58_8=bit
+sff_cpld_reg.pola_58_8=negative
+sff_cpld_reg.addr_58_8=0x00020071
+sff_cpld_reg.len_58_8=1
+sff_cpld_reg.bit_offset_58_8=5
+
+sff_cpld_reg.mode_59_8=config
+sff_cpld_reg.src_59_8=cpld
+sff_cpld_reg.frmt_59_8=bit
+sff_cpld_reg.pola_59_8=negative
+sff_cpld_reg.addr_59_8=0x00050074
+sff_cpld_reg.len_59_8=1
+sff_cpld_reg.bit_offset_59_8=5
+
+sff_cpld_reg.mode_60_8=config
+sff_cpld_reg.src_60_8=cpld
+sff_cpld_reg.frmt_60_8=bit
+sff_cpld_reg.pola_60_8=negative
+sff_cpld_reg.addr_60_8=0x00050074
+sff_cpld_reg.len_60_8=1
+sff_cpld_reg.bit_offset_60_8=6
+
+sff_cpld_reg.mode_61_8=config
+sff_cpld_reg.src_61_8=cpld
+sff_cpld_reg.frmt_61_8=bit
+sff_cpld_reg.pola_61_8=negative
+sff_cpld_reg.addr_61_8=0x00020071
+sff_cpld_reg.len_61_8=1
+sff_cpld_reg.bit_offset_61_8=6
+
+sff_cpld_reg.mode_62_8=config
+sff_cpld_reg.src_62_8=cpld
+sff_cpld_reg.frmt_62_8=bit
+sff_cpld_reg.pola_62_8=negative
+sff_cpld_reg.addr_62_8=0x00020071
+sff_cpld_reg.len_62_8=1
+sff_cpld_reg.bit_offset_62_8=7
+
+sff_cpld_reg.mode_63_8=config
+sff_cpld_reg.src_63_8=cpld
+sff_cpld_reg.frmt_63_8=bit
+sff_cpld_reg.pola_63_8=negative
+sff_cpld_reg.addr_63_8=0x00050074
+sff_cpld_reg.len_63_8=1
+sff_cpld_reg.bit_offset_63_8=7
+
+sff_cpld_reg.mode_64_8=config
+sff_cpld_reg.src_64_8=cpld
+sff_cpld_reg.frmt_64_8=bit
+sff_cpld_reg.pola_64_8=negative
+sff_cpld_reg.addr_64_8=0x00050075
+sff_cpld_reg.len_64_8=1
+sff_cpld_reg.bit_offset_64_8=0
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py
new file mode 100644
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+ name='sonic-platform',
+ version='1.0',
+ description='SONiC platform API implementation',
+ license='Apache 2.0',
+ author='SONiC Team',
+ author_email='support',
+ url='',
+ maintainer='support',
+ maintainer_email='',
+ packages=[
+ 'sonic_platform',
+ 'plat_hal',
+ 'wbutil',
+ 'eepromutil',
+ 'hal-config',
+ 'config',
+ ],
+ py_modules=[
+ 'hal_pltfm',
+ 'platform_util',
+ 'platform_intf',
+ ],
+ classifiers=[
+ 'Development Status :: 3 - Alpha',
+ 'Environment :: Plugins',
+ 'Intended Audience :: Developers',
+ 'Intended Audience :: Information Technology',
+ 'Intended Audience :: System Administrators',
+ 'License :: OSI Approved :: Apache Software License',
+ 'Natural Language :: English',
+ 'Operating System :: POSIX :: Linux',
+ 'Programming Language :: Python :: 3.7',
+ 'Topic :: Utilities',
+ ],
+ keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile
new file mode 100644
index 000000000000..0ddc80aae7d2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile
@@ -0,0 +1,30 @@
+PWD = $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+
+all:
+ $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+ @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+ cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+ @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+ cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR)
+ @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+ @if [ -d $(PWD)/sonic_platform/ ]; then rm -rf ${INSTALL_LIB_DIR}/sonic_platform ;fi
+ @if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi
+ @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+ @if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+ @if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+ @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+ @if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi
+clean:
+ rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+ rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+ rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+ rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py
new file mode 100755
index 000000000000..58ec348834ab
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py
@@ -0,0 +1,779 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+ "hal_fanctrl": 0,
+ "hal_ledctrl":0,
+ "avscontrol": 0,
+ "dev_monitor": 0,
+ "reboot_cause": 0,
+ "pmon_syslog": 0,
+ "sff_temp_polling": 0,
+}
+
+MANUINFO_CONF = {
+ "bios": {
+ "key": "BIOS",
+ "head": True,
+ "next": "onie"
+ },
+ "bios_vendor": {
+ "parent": "bios",
+ "key": "Vendor",
+ "cmd": "dmidecode -t 0 |grep Vendor",
+ "pattern": r".*Vendor",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "bios_version": {
+ "parent": "bios",
+ "key": "Version",
+ "cmd": "dmidecode -t 0 |grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "bios_date": {
+ "parent": "bios",
+ "key": "Release Date",
+ "cmd": "dmidecode -t 0 |grep Release",
+ "pattern": r".*Release Date",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "onie": {
+ "key": "ONIE",
+ "next": "cpu"
+ },
+ "onie_date": {
+ "parent": "onie",
+ "key": "Build Date",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_build_date",
+ "separator": "=",
+ "arrt_index": 1,
+ },
+ "onie_version": {
+ "parent": "onie",
+ "key": "Version",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_version",
+ "separator": "=",
+ "arrt_index": 2,
+ },
+
+ "cpu": {
+ "key": "CPU",
+ "next": "ssd"
+ },
+ "cpu_vendor": {
+ "parent": "cpu",
+ "key": "Vendor",
+ "cmd": "dmidecode --type processor |grep Manufacturer",
+ "pattern": r".*Manufacturer",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "cpu_model": {
+ "parent": "cpu",
+ "key": "Device Model",
+ "cmd": "dmidecode --type processor | grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "cpu_core": {
+ "parent": "cpu",
+ "key": "Core Count",
+ "cmd": "dmidecode --type processor | grep \"Core Count\"",
+ "pattern": r".*Core Count",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "cpu_thread": {
+ "parent": "cpu",
+ "key": "Thread Count",
+ "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+ "pattern": r".*Thread Count",
+ "separator": ":",
+ "arrt_index": 4,
+ },
+ "ssd": {
+ "key": "SSD",
+ "next": "cpld"
+ },
+ "ssd_model": {
+ "parent": "ssd",
+ "key": "Device Model",
+ "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+ "pattern": r".*Device Model",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "ssd_fw": {
+ "parent": "ssd",
+ "key": "Firmware Version",
+ "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+ "pattern": r".*Firmware Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "ssd_user_cap": {
+ "parent": "ssd",
+ "key": "User Capacity",
+ "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+ "pattern": r".*User Capacity",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+
+ "cpld": {
+ "key": "CPLD",
+ "next": "fpga"
+ },
+
+ "cpld1": {
+ "key": "CPLD1",
+ "parent": "cpld",
+ "arrt_index": 1,
+ },
+ "cpld1_model": {
+ "key": "Device Model",
+ "parent": "cpld1",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld1_vender": {
+ "key": "Vendor",
+ "parent": "cpld1",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld1_desc": {
+ "key": "Description",
+ "parent": "cpld1",
+ "config": "CPU CPLD",
+ "arrt_index": 3,
+ },
+ "cpld1_version": {
+ "key": "Firmware Version",
+ "parent": "cpld1",
+ "reg": {
+ "loc": "/dev/port",
+ "offset": 0xa00,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld2": {
+ "key": "CPLD2",
+ "parent": "cpld",
+ "arrt_index": 2,
+ },
+ "cpld2_model": {
+ "key": "Device Model",
+ "parent": "cpld2",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld2_vender": {
+ "key": "Vendor",
+ "parent": "cpld2",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld2_desc": {
+ "key": "Description",
+ "parent": "cpld2",
+ "config": "BASE CPLD",
+ "arrt_index": 3,
+ },
+ "cpld2_version": {
+ "key": "Firmware Version",
+ "parent": "cpld2",
+ "reg": {
+ "loc": "/dev/port",
+ "offset": 0x900,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld3": {
+ "key": "CPLD3",
+ "parent": "cpld",
+ "arrt_index": 3,
+ },
+ "cpld3_model": {
+ "key": "Device Model",
+ "parent": "cpld3",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld3_vender": {
+ "key": "Vendor",
+ "parent": "cpld3",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld3_desc": {
+ "key": "Description",
+ "parent": "cpld3",
+ "config": "LC CPLD",
+ "arrt_index": 3,
+ },
+ "cpld3_version": {
+ "key": "Firmware Version",
+ "parent": "cpld3",
+ "i2c": {
+ "bus": "17",
+ "loc": "0x30",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld4": {
+ "key": "CPLD4",
+ "parent": "cpld",
+ "arrt_index": 4,
+ },
+ "cpld4_model": {
+ "key": "Device Model",
+ "parent": "cpld4",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld4_vender": {
+ "key": "Vendor",
+ "parent": "cpld4",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld4_desc": {
+ "key": "Description",
+ "parent": "cpld4",
+ "config": "MAC CPLDA",
+ "arrt_index": 3,
+ },
+ "cpld4_version": {
+ "key": "Firmware Version",
+ "parent": "cpld4",
+ "i2c": {
+ "bus": "18",
+ "loc": "0x30",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "cpld5": {
+ "key": "CPLD5",
+ "parent": "cpld",
+ "arrt_index": 5,
+ },
+ "cpld5_model": {
+ "key": "Device Model",
+ "parent": "cpld5",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld5_vender": {
+ "key": "Vendor",
+ "parent": "cpld5",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld5_desc": {
+ "key": "Description",
+ "parent": "cpld5",
+ "config": "MAC CPLDB",
+ "arrt_index": 3,
+ },
+ "cpld5_version": {
+ "key": "Firmware Version",
+ "parent": "cpld5",
+ "i2c": {
+ "bus": "19",
+ "loc": "0x30",
+ "offset": 0,
+ "size": 4
+ },
+ "callback": "cpld_format",
+ "arrt_index": 4,
+ },
+
+ "i210": {
+ "key": "NIC",
+ "next": "fpga"
+ },
+ "i210_model": {
+ "parent": "i210",
+ "config": "NA",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "i210_vendor": {
+ "parent": "i210",
+ "config": "INTEL",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "i210_version": {
+ "parent": "i210",
+ "cmd": "ethtool -i eth0",
+ "pattern": r"firmware-version",
+ "separator": ":",
+ "key": "Firmware Version",
+ "arrt_index": 3,
+ },
+
+ "fpga": {
+ "key": "FPGA",
+ },
+ "fpga_model": {
+ "parent": "fpga",
+ "config": "XC7A50T-2FGG484I",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "fpga_vendor": {
+ "parent": "fpga",
+ "config": "XILINX",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "fpga_desc": {
+ "parent": "fpga",
+ "config": "NA",
+ "key": "Description",
+ "arrt_index": 3,
+ },
+ "fpga_hw_version": {
+ "parent": "fpga",
+ "config": "NA",
+ "key": "Hardware Version",
+ "arrt_index": 4,
+ },
+ "fpga_fw_version": {
+ "parent": "fpga",
+ "pci": {
+ "bus": 3,
+ "slot": 0,
+ "fn": 0,
+ "bar": 0,
+ "offset": 0
+ },
+ "key": "Firmware Version",
+ "arrt_index": 5,
+ },
+ "fpga_date": {
+ "parent": "fpga",
+ "pci": {
+ "bus": 3,
+ "slot": 0,
+ "fn": 0,
+ "bar": 0,
+ "offset": 4
+ },
+ "key": "Build Date",
+ "arrt_index": 6,
+ },
+}
+
+PMON_SYSLOG_STATUS = {
+ "polling_time": 3,
+ "sffs": {
+ "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+ "nochangedmsgflag": 0,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 1,
+ "alias": {
+ "sff49": "Ethernet49",
+ "sff50": "Ethernet50",
+ "sff51": "Ethernet51",
+ "sff52": "Ethernet52"
+ }
+ },
+ "fans": {
+ "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "fan1": "FAN1",
+ "fan2": "FAN2"
+ }
+ },
+ "psus": {
+ "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+ {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "psu1": "PSU1",
+ "psu2": "PSU2"
+ }
+ }
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+ {
+ "name": "mac_core", # AVS name
+ "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+ "default": 0x01, # default value, if rov value not in range
+ "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK
+ "cpld_avs": {"io_addr": 0x956, "gettype": "io"},
+ "set_avs": {
+ "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/avs0_vout",
+ "gettype": "sysfs", "formula": "int((%f)*1000000)"
+ },
+ "mac_avs_param": {
+ 0x08: 0.875,
+ 0x04: 0.850,
+ 0x02: 0.825,
+ 0x01: 0.800
+ }
+ }
+]
+
+
+DRIVERLISTS = [
+ {"name": "r8169", "delay": 0, "removable": 0},
+ {"name": "ice", "delay": 0, "removable": 0},
+ {"name": "i2c_i801", "delay": 0},
+ {"name": "i2c_dev", "delay": 0},
+ {"name": "i2c_mux", "delay": 0},
+ {"name": "platform_common dfd_my_type=0x40c7", "delay": 0},
+ {"name": "wb_io_dev", "delay": 0},
+ {"name": "wb_io_dev_device", "delay": 0},
+ {"name": "wb_fpga_pcie", "delay": 0},
+ {"name": "wb_pcie_dev", "delay": 0},
+ {"name": "wb_pcie_dev_device", "delay": 0},
+ {"name": "wb_i2c_dev", "delay": 0},
+ {"name": "wb_i2c_ocores", "delay": 0},
+ {"name": "wb_i2c_ocores_device", "delay": 0},
+ {"name": "wb_i2c_mux_pca9641", "delay": 0},
+ {"name": "wb_i2c_mux_pca954x", "delay": 0},
+ {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+ {"name": "wb_i2c_dev_device", "delay": 0},
+ {"name": "optoe", "delay": 0},
+ {"name": "at24", "delay": 0},
+]
+
+DEVICE = [
+ {"name": "24c02", "bus": 0, "loc": 0x56},
+]
+
+OPTOE = [
+ {"name": "optoe3", "startbus": 25, "endbus": 152},
+]
+
+REBOOT_CTRL_PARAM = {
+ #"cpu": {"io_addr": 0x910, "rst_val": 0x10, "rst_delay": 0, "gettype": "io"},
+ #"mac": {"io_addr": 0x930, "rst_val": 0xbf, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+ #"phy": {"io_addr": 0x930, "rst_val": 0xf7, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+}
+
+DEV_MONITOR_PARAM = {
+ "polling_time": 10,
+ "psus": [
+ {
+ "name": "psu1",
+ "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "psu1frue2", "name": "24c02", "bus": 7, "loc": 0x56, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "psu2",
+ "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 1, "okval": 0},
+ "device": [
+ {"id": "psu2frue2", "name": "24c02", "bus": 7, "loc": 0x57, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "fans": [
+ {
+ "name": "fan1",
+ "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "fan1frue2", "name": "24c02", "bus": 8, "loc": 0x53, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan2",
+ "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 1, "okval": 0},
+ "device": [
+ {"id": "fan2frue2", "name": "24c02", "bus": 9, "loc": 0x53, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "others": [
+ {
+ "name": "eeprom",
+ "device": [
+ {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "tmp275",
+ "device": [
+ {"id": "tmp275_1", "name": "wb_tmp275", "bus": 6, "loc": 0x48, "attr": "hwmon"},
+ {"id": "tmp275_2", "name": "wb_tmp275", "bus": 6, "loc": 0x49, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "mac_bsc",
+ "device": [
+ {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3_x2", "bus": 18, "loc": 0x44, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "ina3221",
+ "device": [
+ {"id": "ina3221_1", "name": "wb_ina3221", "bus": 3, "loc": 0x40, "attr": "hwmon"},
+ {"id": "ina3221_2", "name": "wb_ina3221", "bus": 3, "loc": 0x41, "attr": "hwmon"},
+ {"id": "ina3221_3", "name": "wb_ina3221", "bus": 3, "loc": 0x42, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "xdpe12284",
+ "device": [
+ {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 0, "loc": 0x68, "attr": "hwmon"},
+ {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 0, "loc": 0x6e, "attr": "hwmon"},
+ {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 0, "loc": 0x5e, "attr": "hwmon"},
+ {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 17, "loc": 0x58, "attr": "hwmon"},
+ ],
+ },
+ ],
+}
+
+INIT_PARAM_PRE = []
+
+INIT_COMMAND_PRE = []
+
+INIT_PARAM = []
+
+INIT_COMMAND = [
+ # set sysled
+ "dfd_debug io_wr 0x950 0x04",
+ # mac led reset
+ "dfd_debug sysfs_data_wr /dev/fpga0 0x40 0x98 0x00 0x00 0x00",
+ "dfd_debug sysfs_data_wr /dev/fpga0 0x44 0x98 0x00 0x00 0x00",
+ "dfd_debug sysfs_data_wr /dev/fpga0 0x48 0x98 0x00 0x00 0x00",
+ "dfd_debug sysfs_data_wr /dev/fpga0 0x4c 0x98 0x00 0x00 0x00",
+ # enable root port PCIe AER
+ "setpci -s 00:10.0 0x5c.b=0x1f",
+ "setpci -s 00:12.0 0x5c.b=0x1f",
+ "setpci -s 00:14.0 0x5c.b=0x1f",
+ "setpci -s 14:02.0 0x5c.b=0x1f",
+ "setpci -s 14:03.0 0x5c.b=0x1f",
+ "setpci -s 14:04.0 0x5c.b=0x1f",
+ "setpci -s 14:05.0 0x5c.b=0x1f"
+]
+
+REBOOT_CAUSE_PARA = {
+ "reboot_cause_list": [
+ {
+ "name": "wdt_reboot",
+ "monitor_point": {"gettype": "io", "io_addr": 0x76b, "okval": 1},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Watchdog, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+ ],
+ "finish_operation": [
+ {"gettype": "io", "io_addr": 0x76b, "value": 0x00},
+ ]
+ },
+ {
+ "name": "otp_switch_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+ ]
+ },
+ {
+ "name": "otp_other_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+ "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+ "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+ ]
+ },
+ ],
+ "other_reboot_cause_record": [
+ {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+}
+
+
+WARM_UPGRADE_PARAM = {
+ "slot0": {
+ "VME": {
+ "chain1": [
+ {"name": "CPU_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme",
+ "init_cmd": [
+ {"cmd": "echo 98 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo high > /sys/class/gpio/gpio98/direction", "gettype": "cmd"},
+ {"io_addr": 0x7a5, "value": 0, "gettype": "io"},
+ ],
+ "rw_recover_reg": [
+ {"io_addr": 0x721, "value": None, "gettype": "io"},
+ {"io_addr": 0x765, "value": None, "gettype": "io"},
+ {"io_addr": 0x766, "value": None, "gettype": "io"},
+ {"io_addr": 0x768, "value": None, "gettype": "io"},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "refresh_finish_flag_check": {"io_addr":0x7a5, "value":0x01, "gettype":"io"},
+ "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+ "finish_cmd": [
+ {"cmd": "echo 0 > /sys/class/gpio/gpio98/value", "gettype": "cmd"},
+ {"cmd": "echo 98 > /sys/class/gpio/unexport", "gettype": "cmd"},
+ ],
+ },
+ ],
+ },
+ },
+ "stop_services_cmd": [
+ "/usr/local/bin/platform_process.py stop",
+ ],
+ "start_services_cmd": [
+ "/usr/local/bin/platform_process.py start",
+ ],
+}
+
+UPGRADE_SUMMARY = {
+ "devtype": 0x40c7,
+
+ "slot0": {
+ "subtype": 0,
+ "VME": {
+ "chain1": {
+ "name": "CPU_CPLD",
+ "is_support_warm_upg": 0,
+ },
+ "chain2": {
+ "name": "BASE_CPLD",
+ "is_support_warm_upg": 0,
+ },
+ "chain3": {
+ "name": "LC_CPLD",
+ "is_support_warm_upg": 0,
+ },
+ "chain4": {
+ "name": "MAC_CPLDA",
+ "is_support_warm_upg": 0,
+ },
+ "chain5": {
+ "name": "MAC_CPLDB",
+ "is_support_warm_upg": 0,
+ },
+ "chain6": {
+ "name": "FCB_CPLD",
+ "is_support_warm_upg": 0,
+ },
+ "chain7": {
+ "name": "MISC_CPLD",
+ "is_support_warm_upg": 0,
+ },
+ "chain8": {
+ "name": "PCIE_CPLD",
+ "is_support_warm_upg": 0,
+ },
+ },
+
+ "SPI-LOGIC-DEV": {
+ "chain1": {
+ "name": "FPGA",
+ "is_support_warm_upg": 0,
+ },
+ },
+
+ "MTD": {
+ "chain2": {
+ "name": "BIOS",
+ "is_support_warm_upg": 0,
+ "filesizecheck": 20480, # bios check file size, Unit: K
+ "init_cmd": [
+ {"cmd": "modprobe mtd", "gettype": "cmd"},
+ {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+ {"cmd": "modprobe ofpart", "gettype": "cmd"},
+ {"cmd": "modprobe spi_intel writeable=1", "gettype": "cmd"},
+ {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"},
+ {"cmd": "rmmod spi_intel", "gettype": "cmd"},
+ {"cmd": "rmmod ofpart", "gettype": "cmd"},
+ {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+ {"cmd": "rmmod mtd", "gettype": "cmd"},
+ ],
+ },
+ },
+
+ "TEST": {
+ "fpga": [
+ {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "FPGA"},
+ ],
+ "cpld": [
+ {"chain": 1, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"},
+ {"chain": 2, "file": "/etc/.upgrade_test/base_cpld_test_header.vme", "display_name": "BASE_CPLD"},
+ {"chain": 3, "file": "/etc/.upgrade_test/lc_cpld_test_header.vme", "display_name": "LC_CPLD"},
+ {"chain": 4, "file": "/etc/.upgrade_test/mac_cplda_test_header.vme", "display_name": "MAC_CPLDA"},
+ {"chain": 5, "file": "/etc/.upgrade_test/mac_cpldb_test_header.vme", "display_name": "MAC_CPLDB"},
+ {"chain": 6, "file": "/etc/.upgrade_test/fcb_cpld_test_header.vme", "display_name": "FCB_CPLD"},
+ {"chain": 7, "file": "/etc/.upgrade_test/misc_cpld_test_header.vme", "display_name": "MISC_CPLD"},
+ #{"chain": 8, "file": "/etc/.upgrade_test/pcie_cpld_test_header.vme", "display_name": "PCIe_CPLD"},
+ ],
+ },
+ },
+}
+
+
+PLATFORM_E2_CONF = {
+ "fan": [
+ #{"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/8-0053/eeprom"},
+ #{"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/9-0053/eeprom"},
+ ],
+ "psu": [
+ #{"name": "psu1", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0056/eeprom"},
+ #{"name": "psu2", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0057/eeprom"},
+ ],
+ "syseeprom": [
+ {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/0-0056/eeprom"},
+ ],
+}
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py
new file mode 100755
index 000000000000..58bf1b9b4042
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py
@@ -0,0 +1,136 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+ "port_num": 128,
+ "port_bus_map": {
+ 1: 25,
+ 2: 26,
+ 3: 27,
+ 4: 28,
+ 7: 29,
+ 8: 30,
+ 9: 31,
+ 10: 32,
+ 13: 33,
+ 14: 34,
+ 15: 35,
+ 16: 36,
+ 19: 37,
+ 20: 38,
+ 21: 39,
+ 22: 40,
+ 25: 41,
+ 26: 42,
+ 27: 43,
+ 28: 44,
+ 31: 45,
+ 32: 46,
+ 33: 47,
+ 34: 48,
+ 37: 49,
+ 38: 50,
+ 39: 51,
+ 40: 52,
+ 43: 53,
+ 44: 54,
+ 45: 55,
+ 46: 56,
+ 49: 57,
+ 50: 58,
+ 51: 59,
+ 52: 60,
+ 55: 61,
+ 56: 62,
+ 57: 63,
+ 58: 64,
+ 61: 65,
+ 62: 66,
+ 63: 67,
+ 64: 68,
+ 67: 69,
+ 68: 70,
+ 69: 71,
+ 70: 72,
+ 73: 73,
+ 74: 74,
+ 75: 75,
+ 76: 76,
+ 79: 77,
+ 80: 78,
+ 81: 79,
+ 82: 80,
+ 85: 81,
+ 86: 82,
+ 87: 83,
+ 88: 84,
+ 91: 85,
+ 92: 86,
+ 93: 87,
+ 94: 88,
+ 97: 89,
+ 98: 90,
+ 99: 91,
+ 100: 92,
+ 103: 93,
+ 104: 94,
+ 105: 95,
+ 106: 96,
+ 109: 97,
+ 110: 98,
+ 111: 99,
+ 112: 100,
+ 115: 101,
+ 116: 102,
+ 117: 103,
+ 118: 104,
+ 121: 105,
+ 122: 106,
+ 123: 107,
+ 124: 108,
+ 125: 109,
+ 126: 110,
+ 127: 111,
+ 128: 112,
+ 5: 113,
+ 6: 114,
+ 11: 115,
+ 12: 116,
+ 17: 117,
+ 18: 118,
+ 23: 119,
+ 24: 120,
+ 29: 121,
+ 30: 122,
+ 35: 123,
+ 36: 124,
+ 41: 125,
+ 42: 126,
+ 47: 127,
+ 48: 128,
+ 53: 129,
+ 54: 130,
+ 59: 131,
+ 60: 132,
+ 65: 133,
+ 66: 134,
+ 71: 135,
+ 72: 136,
+ 77: 137,
+ 78: 138,
+ 83: 139,
+ 84: 140,
+ 89: 141,
+ 90: 142,
+ 95: 143,
+ 96: 144,
+ 101: 145,
+ 102: 146,
+ 107: 147,
+ 108: 148,
+ 113: 149,
+ 114: 150,
+ 119: 151,
+ 120: 152,
+ }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py
new file mode 100755
index 000000000000..ac42fa245697
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py
@@ -0,0 +1,186 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+ "intake": ['GW-CRPS2000DWA']
+}
+
+fanairflow = {
+ "intake": ['FAN80-01-F'],
+}
+
+psu_display_name = {
+ "PA2000I-F": ['GW-CRPS2000DWA'],
+}
+
+psutypedecode = {
+ 0x00: 'N/A',
+ 0x01: 'AC',
+ 0x02: 'DC',
+}
+
+class Description:
+ CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+ BIOS = "Performs initialization of hardware components during booting"
+ FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+ "onie_e2": [
+ {
+ "name": "ONIE_E2",
+ "e2loc": {"loc": "/sys/bus/i2c/devices/0-0056/eeprom", "way": "sysfs"},
+ "airflow": "intake"
+ },
+ ],
+
+ "thermal_config": {
+ "number": 10,
+ },
+
+ "fan_config": {
+ "num_fantrays": 5,
+ "num_fans_pertray": 2,
+ },
+
+ "psu_config": {
+ "number": 4
+ },
+
+ "cpld_config": {
+ "number": 7
+ },
+
+ "bmc_config": {
+ "number": 1
+ },
+
+ "fpga_config": {
+ "number": 1,
+ "fpgas": [
+ {
+ "name": "fpga0",
+ "alias": "MAC FPGA",
+ "type": "XC7A50T-2FGG484I",
+ "firmware_version": {
+ "dev_path": "/dev/fpga0",
+ "offset": 0x00,
+ "len": 4
+ },
+ "board_version": {
+ "dev_path": "/dev/fpga0",
+ "offset": 0x04,
+ "len": 4
+ }
+ }
+ ]
+ },
+
+ "bios_config": {
+ "number": 1,
+ "bios": [
+ {
+ "name": "bios0",
+ "alias": "BIOS",
+ "type": {
+ "cmd": "dmidecode -t 0 |grep Vendor |awk -F\": \" \'{ print $2 }\'",
+ "gettype": "cmd"
+ },
+ "firmware_version": {
+ "cmd": "dmidecode -t 0 |grep Version |awk -F\": \" \'{ print $2 }\'",
+ "gettype": "cmd"
+ },
+ "board_version": {
+ "cmd": "dmidecode -t 0 |grep Version |awk -F\": \" \'{ print $2 }\'",
+ "gettype": "cmd"
+ }
+ }
+ ]
+ },
+
+ "cpu": [
+ {
+ "name": "cpu",
+ "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+ }
+ ],
+ "sfps": {
+ "ver": '1.0',
+ "port_index_start": 0,
+ "port_num": 128,
+ "log_level": 2,
+ "eeprom_retry_times": 5,
+ "eeprom_retry_break_sec": 0.2,
+ "presence_cpld": {
+ "dev_id": {
+ 3: {
+ "offset": {
+ 0x30: "1-4, 7-10",
+ 0x31: "13-16, 19-22",
+ 0x32: "25-28, 31-34",
+ 0x33: "37-40, 43-46",
+ 0x34: "49-52, 55-58",
+ 0x35: "61-64",
+ },
+ },
+ 4: {
+ "offset": {
+ 0x30: "67-70, 73-76",
+ 0x31: "79-82, 85-88",
+ 0x32: "91-94, 97-100",
+ 0x33: "103-106, 109-112",
+ 0x34: "115-118, 121-124",
+ 0x35: "125-128",
+ },
+ },
+ 2: {
+ "offset": {
+ 0x30: "5-6, 11-12, 17-18, 23-24",
+ 0x31: "29-30, 35-36, 41-42, 47-48",
+ 0x32: "53-54, 59-60, 65-66, 71-72",
+ 0x33: "77-78, 83-84, 89-90, 95-96",
+ 0x34: "101-102, 107-108, 113-114, 119-120",
+ },
+ },
+ },
+ },
+ "presence_val_is_present": 0,
+ "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+ "eeprom_path_key": list(range(25, 153)),
+ "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+ "optoe_driver_key": list(range(25, 153)),
+ "reset_cpld": {
+ "dev_id": {
+ 3: {
+ "offset": {
+ 0x90: "1-4, 7-10",
+ 0x91: "13-16, 19-22",
+ 0x92: "25-28, 31-34",
+ 0x93: "37-40, 43-46",
+ 0x94: "49-52, 55-58",
+ 0x95: "61-64",
+ },
+ },
+ 4: {
+ "offset": {
+ 0x90: "67-70, 73-76",
+ 0x91: "79-82, 85-88",
+ 0x92: "91-94, 97-100",
+ 0x93: "103-106, 109-112",
+ 0x94: "115-118, 121-124",
+ 0x95: "125-128",
+ },
+ },
+ 2: {
+ "offset": {
+ 0x90: "5-6, 11-12, 17-18, 23-24",
+ 0x91: "29-30, 35-36, 41-42, 47-48",
+ 0x92: "53-54, 59-60, 65-66, 71-72",
+ 0x93: "77-78, 83-84, 89-90, 95-96",
+ 0x94: "101-102, 107-108, 113-114, 119-120",
+ },
+ },
+ },
+ },
+ "reset_val_is_reset": 0,
+ }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py
new file mode 100755
index 000000000000..6d68e1a5f9ee
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py
@@ -0,0 +1,141 @@
+# coding:utf-8
+
+
+monitor = {
+ "openloop": {
+ "linear": {
+ "name": "linear",
+ "flag": 0,
+ "pwm_min": 0x55,
+ "pwm_max": 0xff,
+ "K": 11,
+ "tin_min": 38,
+ },
+ "curve": {
+ "name": "curve",
+ "flag": 1,
+ "pwm_min": 0x55,
+ "pwm_max": 0xff,
+ "a": -0.05,
+ "b": 11.32,
+ "c": -166,
+ "tin_min": 25,
+ },
+ },
+
+ "pid": {
+ "CPU_TEMP": {
+ "name": "CPU_TEMP",
+ "flag": 0,
+ "type": "duty",
+ "pwm_min": 0x55,
+ "pwm_max": 0xff,
+ "Kp": 1,
+ "Ki": 0.4,
+ "Kd": 0,
+ "target": 80,
+ "value": [None, None, None],
+ },
+ "SWITCH_TEMP": {
+ "name": "SWITCH_TEMP",
+ "flag": 0,
+ "type": "duty",
+ "pwm_min": 0x55,
+ "pwm_max": 0xff,
+ "Kp": 1,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 90,
+ "value": [None, None, None],
+ },
+ "OUTLET_TEMP": {
+ "name": "OUTLET_TEMP",
+ "flag": 0,
+ "type": "duty",
+ "pwm_min": 0x55,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 60,
+ "value": [None, None, None],
+ },
+ "SFF_TEMP": {
+ "name": "SFF_TEMP",
+ "flag": 0,
+ "type": "duty",
+ "pwm_min": 0x55,
+ "pwm_max": 0xff,
+ "Kp": 1,
+ "Ki": 1,
+ "Kd": 0.3,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ },
+
+ "temps_threshold": {
+ "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 105, "critical": 110},
+ "INLET_TEMP": {"name": "INLET_TEMP", "warning": 55, "critical": 60},
+ "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+ "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 91},
+ "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+ },
+
+ "fancontrol_para": {
+ "interval": 5,
+ "fan_air_flow_monitor": 1,
+ "psu_air_flow_monitor": 1,
+ "max_pwm": 0xff,
+ "min_pwm": 0x55,
+ "abnormal_pwm": 0xff,
+ "warning_pwm": 0xff,
+ "temp_invalid_pid_pwm": 0x55,
+ "temp_error_pid_pwm": 0x55,
+ "temp_fail_num": 3,
+ "check_temp_fail": [
+ {"temp_name": "INLET_TEMP"},
+ {"temp_name": "SWITCH_TEMP"},
+ {"temp_name": "CPU_TEMP"},
+ ],
+ "temp_warning_num": 3, # temp over warning 3 times continuously
+ "temp_critical_num": 3, # temp over critical 3 times continuously
+ "temp_warning_countdown": 60, # 5 min warning speed after not warning
+ "temp_critical_countdown": 60, # 5 min full speed after not critical
+ "rotor_error_count": 6, # fan rotor error 6 times continuously
+ "inlet_mac_diff": 999,
+ "check_crit_reboot_flag": 1,
+ "check_crit_reboot_num": 3,
+ "check_crit_sleep_time": 20,
+ "psu_absent_fullspeed_num": 1,
+ "fan_absent_fullspeed_num": 1,
+ "rotor_error_fullspeed_num": 1,
+ "psu_fan_control": 0,
+ },
+
+ "ledcontrol_para": {
+ "interval": 5,
+ "checkpsu": 0, # 0: sys led don't follow psu led
+ "checkfan": 0, # 0: sys led don't follow fan led
+ "psu_amber_num": 1,
+ "fan_amber_num": 1,
+ "board_sys_led": [
+ {"led_name": "FRONT_SYS_LED"},
+ ],
+ "board_psu_led": [
+ {"led_name": "FRONT_PSU_LED"},
+ ],
+ "board_fan_led": [
+ {"led_name": "FRONT_FAN_LED"},
+ ],
+ "psu_air_flow_monitor": 1,
+ "fan_air_flow_monitor": 1,
+ "psu_air_flow_amber_num": 1,
+ "fan_air_flow_amber_num": 1,
+ },
+
+ "otp_reboot_judge_file": {
+ "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+ "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+ },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile
new file mode 100644
index 000000000000..912c4f82c6e5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile
@@ -0,0 +1,10 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m := wb_pcie_dev_device.o
+obj-m += wb_i2c_ocores_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_io_dev_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..c0a7e6c00211
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,161 @@
+/*
+ * An wb_i2c_dev_device driver for i2c dev device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_i2c_dev_device_debug) { \
+ printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_i2c_dev_device_error) { \
+ printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+ .i2c_bus = 17,
+ .i2c_addr = 0x30,
+ .i2c_name = "cpld2",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+ .i2c_bus = 18,
+ .i2c_addr = 0x30,
+ .i2c_name = "cpld3",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+ .i2c_bus = 19,
+ .i2c_addr = 0x30,
+ .i2c_name = "cpld4",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data3 = {
+ .i2c_bus = 20,
+ .i2c_addr = 0x30,
+ .i2c_name = "cpld5",
+ .data_bus_width = 1,
+ .addr_bus_width = 1,
+ .per_rd_len = 256,
+ .per_wr_len = 256,
+ .i2c_len = 256,
+};
+
+
+struct i2c_board_info i2c_dev_device_info[] = {
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data0,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data1,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data2,
+ },
+ {
+ .type = "wb-i2c-dev",
+ .platform_data = &i2c_dev_device_data3,
+ },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ i2c_dev_device_t *i2c_dev_device_data;
+
+ WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+ i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+ i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+ adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+ if (adap == NULL) {
+ i2c_dev_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+ if (!client) {
+ i2c_dev_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+ i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+ } else {
+ i2c_dev_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+ int i;
+ i2c_dev_device_t *i2c_dev_device_data;
+
+ WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+ i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+ if (i2c_dev_device_data->client) {
+ i2c_unregister_device(i2c_dev_device_data->client);
+ i2c_dev_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..6d96bb56590b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,539 @@
+/*
+ * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_i2c_mux_pca954x_device_debug) { \
+ printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_i2c_mux_pca954x_device_error) { \
+ printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+ .i2c_bus = 1,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 25,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000001,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000001,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+ .i2c_bus = 2,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 33,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000002,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000002,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = {
+ .i2c_bus = 3,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 41,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000004,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000004,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = {
+ .i2c_bus = 4,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 49,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000008,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000008,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = {
+ .i2c_bus = 5,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 57,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000010,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000010,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = {
+ .i2c_bus = 6,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 65,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000020,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000020,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = {
+ .i2c_bus = 7,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 73,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000040,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000040,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = {
+ .i2c_bus = 8,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 81,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000080,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000080,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data8 = {
+ .i2c_bus = 9,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 89,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000100,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000100,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data9 = {
+ .i2c_bus = 10,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 97,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000200,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000200,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data10 = {
+ .i2c_bus = 11,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 105,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000400,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000400,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data11 = {
+ .i2c_bus = 12,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 113,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00000800,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00000800,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data12 = {
+ .i2c_bus = 13,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 121,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00001000,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00001000,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data13 = {
+ .i2c_bus = 14,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 129,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00002000,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00002000,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data14 = {
+ .i2c_bus = 15,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 137,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00004000,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00004000,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data15 = {
+ .i2c_bus = 16,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 145,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00008000,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00008000,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data16 = {
+ .i2c_bus = 21,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 153,
+ .pca9548_reset_type = PCA9548_RESET_FILE,
+ .rst_delay_b = 0,
+ .rst_delay = 1000,
+ .rst_delay_a = 1000,
+ .attr = {
+ .file_attr.dev_name = "/dev/fpga0",
+ .file_attr.offset = 0x84,
+ .file_attr.mask = 0x00010000,
+ .file_attr.reset_on = 0x00000000,
+ .file_attr.reset_off = 0x00010000,
+ .file_attr.width = 4,
+ },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data17 = {
+ .i2c_bus = 22,
+ .i2c_addr = 0x70,
+ .probe_disable = 1,
+ .select_chan_check = 0,
+ .close_chan_force_reset = 0,
+ .pca9548_base_nr = 161,
+};
+
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data0,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data1,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data2,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data3,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data4,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data5,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data6,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data7,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data8,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data9,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data10,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data11,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data12,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data13,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data14,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data15,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data16,
+ },
+ {
+ .type = "wb_pca9548",
+ .platform_data = &i2c_mux_pca954x_device_data17,
+ },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+ WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+ i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+ i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+ adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+ if (adap == NULL) {
+ i2c_mux_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+ if (!client) {
+ i2c_mux_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+ i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+ } else {
+ i2c_mux_pca954x_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+ int i;
+ i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+ WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+ i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+ if (i2c_mux_pca954x_device_data->client) {
+ i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+ i2c_mux_pca954x_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c
new file mode 100644
index 000000000000..c6635de2d320
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c
@@ -0,0 +1,717 @@
+/*
+ * An wb_i2c_ocores_device driver for i2c ocores device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_i2c_ocores_device_debug = 0;
+static int g_wb_i2c_ocores_device_error = 0;
+
+module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_i2c_ocores_device_debug) { \
+ printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_i2c_ocores_device_error) { \
+ printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static i2c_ocores_device_t i2c_ocores_device_data0 = {
+ .adap_nr = 1,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0800,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 0,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data1 = {
+ .adap_nr = 2,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0820,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 1,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data2 = {
+ .adap_nr = 3,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0840,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 2,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data3 = {
+ .adap_nr = 4,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0860,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 3,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data4 = {
+ .adap_nr = 5,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0880,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 4,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data5 = {
+ .adap_nr = 6,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x08a0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 5,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data6 = {
+ .adap_nr = 7,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x08c0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 6,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data7 = {
+ .adap_nr = 8,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x08e0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 7,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data8 = {
+ .adap_nr = 9,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0900,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 8,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data9 = {
+ .adap_nr = 10,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0920,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 9,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data10 = {
+ .adap_nr = 11,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0940,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 10,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data11 = {
+ .adap_nr = 12,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0960,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 11,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data12 = {
+ .adap_nr = 13,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0980,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 12,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data13 = {
+ .adap_nr = 14,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x09a0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 13,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data14 = {
+ .adap_nr = 15,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x09c0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 14,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data15 = {
+ .adap_nr = 16,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x09e0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 15,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data16 = {
+ .adap_nr = 17,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0a00,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 16,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data17 = {
+ .adap_nr = 18,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0a20,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 17,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data18 = {
+ .adap_nr = 19,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0a40,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 18,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data19 = {
+ .adap_nr = 20,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0a60,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 19,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data20 = {
+ .adap_nr = 21,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0a80,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 20,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data21 = {
+ .adap_nr = 22,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0aa0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 21,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data22 = {
+ .adap_nr = 23,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0ac0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 22,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data23 = {
+ .adap_nr = 24,
+ .big_endian = 0,
+ .dev_name = "/dev/fpga0",
+ .reg_access_mode = 3,
+ .dev_base = 0x0ae0,
+ .reg_shift = 2,
+ .reg_io_width = 4,
+ .ip_clock_khz = 125000,
+ .bus_clock_khz = 100,
+ .irq_type =1,
+ .irq_offset = 23,
+ .pci_domain = 0,
+ .pci_bus = 3,
+ .pci_slot = 0,
+ .pci_fn = 0,
+};
+
+static void wb_i2c_ocores_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device i2c_ocores_device[] = {
+ {
+ .name = "wb-ocores-i2c",
+ .id = 1,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data0,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 2,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data1,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 3,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data2,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 4,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data3,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 5,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data4,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 6,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data5,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 7,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data6,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 8,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data7,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 9,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data8,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 10,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data9,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 11,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data10,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 12,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data11,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 13,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data12,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 14,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data13,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 15,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data14,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 16,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data15,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 17,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data16,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 18,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data17,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 19,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data18,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 20,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data19,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 21,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data20,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 22,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data21,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 23,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data22,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+ {
+ .name = "wb-ocores-i2c",
+ .id = 24,
+ .dev = {
+ .platform_data = &i2c_ocores_device_data23,
+ .release = wb_i2c_ocores_device_release,
+ },
+ },
+};
+
+static int __init wb_i2c_ocores_device_init(void)
+{
+ int i;
+ int ret = 0;
+ i2c_ocores_device_t *i2c_ocores_device_data;
+
+ WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) {
+ i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+ ret = platform_device_register(&i2c_ocores_device[i]);
+ if (ret < 0) {
+ i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1);
+ } else {
+ i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_i2c_ocores_device_exit(void)
+{
+ int i;
+ i2c_ocores_device_t *i2c_ocores_device_data;
+
+ WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) {
+ i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+ if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&i2c_ocores_device[i]);
+ }
+ }
+}
+
+module_init(wb_i2c_ocores_device_init);
+module_exit(wb_i2c_ocores_device_exit);
+MODULE_DESCRIPTION("I2C OCORES Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..e4b1dde8bcae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,125 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_io_dev_device_debug) { \
+ printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_io_dev_device_error) { \
+ printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+/* CPU_CPLD */
+static io_dev_device_t io_dev_device_data0 = {
+ .io_dev_name = "cpld0",
+ .io_base = 0xa00,
+ .io_len = 0x100,
+ .indirect_addr = 0,
+};
+
+/* BASE CPLD */
+static io_dev_device_t io_dev_device_data1 = {
+ .io_dev_name = "cpld1",
+ .io_base = 0x900,
+ .io_len = 0x100,
+ .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device io_dev_device[] = {
+ {
+ .name = "wb-io-dev",
+ .id = 1,
+ .dev = {
+ .platform_data = &io_dev_device_data0,
+ .release = wb_io_dev_device_release,
+ },
+ },
+ {
+ .name = "wb-io-dev",
+ .id = 2,
+ .dev = {
+ .platform_data = &io_dev_device_data1,
+ .release = wb_io_dev_device_release,
+ },
+ },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+ int i;
+ int ret = 0;
+ io_dev_device_t *io_dev_device_data;
+
+ WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+ io_dev_device_data = io_dev_device[i].dev.platform_data;
+ ret = platform_device_register(&io_dev_device[i]);
+ if (ret < 0) {
+ io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+ } else {
+ io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+ int i;
+ io_dev_device_t *io_dev_device_data;
+
+ WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+ io_dev_device_data = io_dev_device[i].dev.platform_data;
+ if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&io_dev_device[i]);
+ }
+ }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..aff6ed5f798a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,111 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_pcie_dev_device_debug) { \
+ printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_pcie_dev_device_error) { \
+ printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+ .pci_dev_name = "fpga0",
+ .pci_domain = 0x0000,
+ .pci_bus = 0x03,
+ .pci_slot = 0x00,
+ .pci_fn = 0,
+ .pci_bar = 0,
+ .bus_width = 4,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+ {
+ .name = "wb-pci-dev",
+ .id = 1,
+ .dev = {
+ .platform_data = &pcie_dev_device_data0,
+ .release = wb_pcie_dev_device_release,
+ },
+ },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+ int i;
+ int ret = 0;
+ pci_dev_device_t *pcie_dev_device_data;
+
+ WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+ pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+ ret = platform_device_register(&pcie_dev_device[i]);
+ if (ret < 0) {
+ pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+ } else {
+ pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+ int i;
+ pci_dev_device_t *pcie_dev_device_data;
+
+ WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+ pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+ if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&pcie_dev_device[i]);
+ }
+ }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..2c10ab9bbb28
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,40 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_3=0
+cpld_i2c_dev.addr_0_3=0x0d
+cpld_i2c_dev.bus_0_4=15
+cpld_i2c_dev.addr_0_4=0x51
+cpld_i2c_dev.bus_0_5=16
+cpld_i2c_dev.addr_0_5=0x52
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+cpld_lpc_dev_0_2=0xb00
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=lpc
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..eb2d7faf58c8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,112 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=2
+
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=1
+
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00010094
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00010094
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=1
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00010095
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00010095
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=1
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=byte
+fan_speed.pola_1_0=
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x00010098
+fan_speed.len_1_0=1
+fan_speed.bit_offset_1_0=
+fan_speed.int_extra1_1_0=1
+
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=byte
+fan_speed.pola_2_0=
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x00010099
+fan_speed.len_2_0=1
+fan_speed.bit_offset_2_0=
+fan_speed.int_extra1_2_0=1
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00010090
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00010091
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..8b2d41974eb3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,64 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00020010
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00020011
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=0
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00020011
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=0
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00020010
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=1
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00020011
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=1
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00020011
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=1
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..9cfdcd29eb8f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,54 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=4
+
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff49
+sff_dir_name_2 =sff50
+sff_dir_name_3 =sff51
+sff_dir_name_4 =sff52
+
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00020030
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=1
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00020030
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=0
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00020030
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=3
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00020030
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=2
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service
new file mode 100644
index 000000000000..666046592116
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Configuration eth0.4088 subnetwork
+After=network.target
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/subnetwork.py start
+ExecStop=/usr/local/bin/subnetwork.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py
new file mode 100755
index 000000000000..a3be1cd61fbb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py
@@ -0,0 +1,40 @@
+from setuptools import setup
+
+setup(
+ name='sonic-platform',
+ version='1.0',
+ description='SONiC platform API implementation',
+ license='Apache 2.0',
+ author='SONiC Team',
+ author_email='support',
+ url='',
+ maintainer='support',
+ maintainer_email='',
+ packages=[
+ 'sonic_platform',
+ 'plat_hal',
+ 'wbutil',
+ 'eepromutil',
+ 'restful_util',
+ 'hal-config',
+ 'config',
+ ],
+ py_modules=[
+ 'hal_pltfm',
+ 'platform_util',
+ 'platform_intf',
+ ],
+ classifiers=[
+ 'Development Status :: 3 - Alpha',
+ 'Environment :: Plugins',
+ 'Intended Audience :: Developers',
+ 'Intended Audience :: Information Technology',
+ 'Intended Audience :: System Administrators',
+ 'License :: OSI Approved :: Apache Software License',
+ 'Natural Language :: English',
+ 'Operating System :: POSIX :: Linux',
+ 'Programming Language :: Python :: 3.7',
+ 'Topic :: Utilities',
+ ],
+ keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py
new file mode 100644
index 000000000000..b70995a582fc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis", "sfp", "eeprom", "component", "thermal", "psu", "fan", "fan_drawer", "watchdog"]
+from . import platform
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py
new file mode 100644
index 000000000000..96855d0d57ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py
@@ -0,0 +1,480 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+ import time
+ import sys
+ from sonic_platform_base.chassis_base import ChassisBase
+ from sonic_platform.sfp import Sfp
+ from sonic_platform.psu import Psu
+ # from sonic_platform.fan import Fan
+ from sonic_platform.fan_drawer import FanDrawer
+ from sonic_platform.thermal import Thermal
+ # from sonic_platform.watchdog import Watchdog
+ from sonic_platform.component import Component
+ from sonic_platform.eeprom import Eeprom
+ from plat_hal.baseutil import baseutil
+
+ from plat_hal.interface import interface
+ from .restful_interface import RestfulApi
+
+except ImportError as error:
+ raise ImportError(str(error) + "- required module not found")from error
+
+
+class Chassis(ChassisBase):
+ """
+ Platform-specific Chassis class
+ """
+ # List of Dcdc objects representing all dcdc
+ # available on the chassis
+ _dcdc_list = None
+
+ STATUS_INSERTED = "1"
+ STATUS_REMOVED = "0"
+ STATUS_NORMAL = "0"
+ STATUS_ABNORMAL = "1"
+ sfp_present_dict = {}
+ fan_present_dict = {}
+ voltage_status_dict = {}
+
+ def __init__(self):
+ ChassisBase.__init__(self)
+ self.int_case = interface()
+ self.restful = RestfulApi()
+
+ self.led_map = {
+ "0": self.STATUS_LED_COLOR_OFF,
+ "1": self.STATUS_LED_COLOR_GREEN,
+ "2": self.STATUS_LED_COLOR_AMBER,
+ "3": self.STATUS_LED_COLOR_RED
+ }
+
+ # Initialize SFP list
+
+ # sfp.py will read eeprom contents and retrive the eeprom data.
+ # It will also provide support sfp controls like reset and setting
+ # low power mode.
+ # We pass the eeprom path and sfp control path from chassis.py
+ # So that sfp.py implementation can be generic to all platforms
+ try:
+ self._sfp_list = []
+ self.port_num = baseutil.get_config().get("sfps", None).get("port_num", 0)
+ self.port_start_index = baseutil.get_config().get("sfps", None).get("port_index_start", 0)
+ # fix problem with first index is 1, we add a fake sfp node
+ if self.port_start_index == 1:
+ self._sfp_list.append(Sfp(1))
+
+ # sfp id always start at 1
+ for index in range(1, self.port_num + 1):
+ self._sfp_list.append(Sfp(index))
+
+ for i in range(self.port_start_index, self.port_start_index + self.port_num):
+ self.sfp_present_dict[i] = self.STATUS_REMOVED
+
+ except Exception as err:
+ print("SFP init error: %s" % str(err))
+
+ try:
+ self._eeprom = Eeprom(self.int_case)
+ except Exception as err:
+ print("EEPROM INIT ERROR %s" % str(err))
+
+ # Initialize watchdog
+ # self._watchdog = Watchdog()
+ fantray_num = self.restful.get_fan_total_number()
+ for index in range(fantray_num):
+ fandrawer = FanDrawer(self.restful, index + 1)
+ self._fan_drawer_list.append(fandrawer)
+ self._fan_list.extend(fandrawer._fan_list)
+
+ psu_num = self.restful.get_psu_total_number()
+ for index in range(psu_num):
+ psuobj = Psu(self.restful, index + 1)
+ self._psu_list.append(psuobj)
+
+ thermal_num = self.restful.get_thermal_total_number()
+ for index in range(thermal_num):
+ self._thermal_list.append(Thermal(self.restful, index))
+
+ cpld_num = self.restful.get_cpld_total_number()
+ for index in range(cpld_num):
+ self._component_list.append(Component(self.restful, index, "cpld"))
+ fpga_num = self.restful.get_fpga_total_number()
+ for index in range(fpga_num):
+ self._component_list.append(Component(self.restful, index, "fpga"))
+ bois_num = self.restful.get_bios_total_number()
+ for index in range(bois_num):
+ self._component_list.append(Component(self.restful, index, "bios"))
+ bmc_num = self.restful.get_bmc_total_number()
+ for index in range(bmc_num):
+ self._component_list.append(Component(self.restful, index, "bmc"))
+
+ def get_name(self):
+ """
+ Retrieves the name of the chassis
+ Returns:
+ string: The name of the chassis
+ """
+ name = ''
+ sys_eeprom = self.get_eeprom()
+ if sys_eeprom is None:
+ return ''
+
+ e = sys_eeprom.read_eeprom()
+ name = sys_eeprom.modelstr(e)
+ if name is None:
+ return ''
+ return name
+
+ def get_presence(self):
+ """
+ Retrieves the presence of the chassis
+ Returns:
+ bool: True if chassis is present, False if not
+ """
+ return True
+
+ def get_model(self):
+ """
+ Retrieves the model number (or part number) of the chassis
+ Returns:
+ string: Model/part number of chassis
+ """
+ model = ''
+ sys_eeprom = self.get_eeprom()
+ if sys_eeprom is None:
+ return ''
+
+ e = sys_eeprom.read_eeprom()
+ model = sys_eeprom.modelnumber(e)
+ if model is None:
+ return ''
+ return model
+
+ def get_serial_number(self):
+ """
+ Retrieves the hardware serial number for the chassis
+
+ Returns:
+ A string containing the hardware serial number for this chassis.
+ """
+ serial_number = ''
+ sys_eeprom = self.get_eeprom()
+ if sys_eeprom is None:
+ return ''
+
+ e = sys_eeprom.read_eeprom()
+ serial_number = sys_eeprom.serial_number_str(e)
+ if serial_number is None:
+ return ''
+
+ return serial_number
+
+ def get_revision(self):
+ """
+ Retrieves the hardware revision of the device
+
+ Returns:
+ string: Revision value of device
+ """
+ device_version = ''
+ sys_eeprom = self.get_eeprom()
+ if sys_eeprom is None:
+ return ''
+
+ e = sys_eeprom.read_eeprom()
+ device_version = sys_eeprom.deviceversion(e)
+ if device_version is None:
+ return ''
+
+ return device_version
+
+ def get_serial(self):
+ """
+ Retrieves the serial number of the chassis (Service tag)
+ Returns:
+ string: Serial number of chassis
+ """
+ return self.get_serial_number()
+
+ def get_status(self):
+ """
+ Retrieves the operational status of the chassis
+ Returns:
+ bool: A boolean value, True if chassis is operating properly
+ False if not
+ """
+ return True
+
+ def get_position_in_parent(self):
+ """
+ Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+ for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+ Returns:
+ integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+ """
+ return -1
+
+ def is_replaceable(self):
+ """
+ Indicate whether this device is replaceable.
+ Returns:
+ bool: True if it is replaceable.
+ """
+ return False
+
+ def initizalize_system_led(self):
+ return True
+
+ def set_status_led(self, color):
+ return False
+
+ def get_status_led(self):
+ """
+ Gets the state of the system LED
+
+ Returns:
+ A string, one of the valid LED color strings which could be vendor
+ specified.
+ """
+ led_status = None
+ led_status = self.restful.get_sysled()
+ if led_status is None:
+ return 'N/A'
+ return self.led_map.get(led_status, "unknown status %s" % led_status)
+
+ def get_base_mac(self):
+ """
+ Retrieves the base MAC address for the chassis
+
+ Returns:
+ A string containing the MAC address in the format
+ 'XX:XX:XX:XX:XX:XX'
+ """
+ base_mac = ''
+ sys_eeprom = self.get_eeprom()
+ if sys_eeprom is None:
+ return ''
+
+ e = sys_eeprom.read_eeprom()
+ base_mac = sys_eeprom.base_mac_addr(e)
+ if base_mac is None:
+ return ''
+
+ return base_mac.upper()
+
+ def get_system_eeprom_info(self):
+ """
+ Retrieves the full content of system EEPROM information for the chassis
+
+ Returns:
+ A dictionary where keys are the type code defined in
+ OCP ONIE TlvInfo EEPROM format and values are their corresponding
+ values.
+ Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+ '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+ '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+ """
+ sys_eeprom = self.get_eeprom()
+ if sys_eeprom is None:
+ return {}
+ return sys_eeprom.system_eeprom_info()
+
+ def get_thermal_manager(self):
+ """
+ Retrieves thermal manager class on this chassis
+ :return: A class derived from ThermalManagerBase representing the
+ specified thermal manager. ThermalManagerBase is returned as default
+ """
+ return False
+
+ def get_reboot_cause(self):
+ """
+ Retrieves the cause of the previous reboot
+ Returns:
+ A tuple (string, string) where the first element is a string
+ containing the cause of the previous reboot. This string must be
+ one of the predefined strings in this class. If the first string
+ is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+ to pass a description of the reboot cause.
+ """
+ reboot_cause_msg = self.int_case.get_cpu_reboot_cause()
+ if "Power Loss" in reboot_cause_msg:
+ reboot_cause_type = self.REBOOT_CAUSE_POWER_LOSS
+ elif "Watchdog" in reboot_cause_msg:
+ reboot_cause_type = self.REBOOT_CAUSE_WATCHDOG
+ elif "BMC reboot" in reboot_cause_msg or "BMC powerdown" in reboot_cause_msg:
+ reboot_cause_type = self.REBOOT_CAUSE_HARDWARE_OTHER
+ elif "Thermal Overload: ASIC" in reboot_cause_msg:
+ reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
+ elif "Thermal Overload: Other" in reboot_cause_msg:
+ reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER
+ elif "Other" in reboot_cause_msg:
+ reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+ else:
+ reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+ return (reboot_cause_type, reboot_cause_msg)
+
+ def get_module(self, index):
+ """
+ Retrieves module represented by (0-based) index
+
+ Args:
+ index: An integer, the index (0-based) of the module to
+ retrieve
+
+ Returns:
+ An object dervied from ModuleBase representing the specified
+ module
+ """
+ module = None
+
+ try:
+ if self.get_num_modules():
+ module = self._module_list[index]
+ except IndexError:
+ sys.stderr.write("Module index {} out of range (0-{})\n".format(
+ index, len(self._module_list) - 1))
+
+ return module
+
+ def get_fan_drawer(self, index):
+ """
+ Retrieves fan drawers represented by (0-based) index
+
+ Args:
+ index: An integer, the index (0-based) of the fan drawer to
+ retrieve
+
+ Returns:
+ An object dervied from FanDrawerBase representing the specified fan
+ drawer
+ """
+ fan_drawer = None
+
+ try:
+ if self.get_num_fan_drawers():
+ fan_drawer = self._fan_drawer_list[index]
+ except IndexError:
+ sys.stderr.write("Fan drawer index {} out of range (0-{})\n".format(
+ index, len(self._fan_drawer_list) - 1))
+
+ return fan_drawer
+
+ def get_change_event(self, timeout=0):
+ """
+ Returns a nested dictionary containing all devices which have
+ experienced a change at chassis level
+
+ Args:
+ timeout: Timeout in milliseconds (optional). If timeout == 0,
+ this method will block until a change is detected.
+
+ Returns:
+ (bool, dict):
+ - bool: True if call successful, False if not;
+ - dict: A nested dictionary where key is a device type,
+ value is a dictionary with key:value pairs in the format of
+ {'device_id':'device_event'}, where device_id is the device ID
+ for this device and device_event.
+ The known devices's device_id and device_event was defined as table below.
+ -----------------------------------------------------------------
+ device | device_id | device_event | annotate
+ -----------------------------------------------------------------
+ 'fan' '' '0' Fan removed
+ '1' Fan inserted
+
+ 'sfp' '' '0' Sfp removed
+ '1' Sfp inserted
+ '2' I2C bus stuck
+ '3' Bad eeprom
+ '4' Unsupported cable
+ '5' High Temperature
+ '6' Bad cable
+
+ 'voltage' '' '0' Vout normal
+ '1' Vout abnormal
+ --------------------------------------------------------------------
+ Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+ 'voltage':{'U20':'0', 'U21':'1'}}
+ Indicates that:
+ fan 0 has been removed, fan 2 has been inserted.
+ sfp 11 has been removed, sfp 12 has been inserted.
+ monitored voltage U20 became normal, voltage U21 became abnormal.
+ Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+ XCVRD shall stop to read eeprom before SFP recovered from error status.
+ """
+
+ change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+ start_time = time.time()
+ forever = False
+
+ if timeout == 0:
+ forever = True
+ elif timeout > 0:
+ timeout = timeout / float(1000) # Convert to secs
+ else:
+ print("get_change_event:Invalid timeout value: %s" % timeout)
+ return False, change_event_dict
+
+ end_time = start_time + timeout
+ if start_time > end_time:
+ print("get_change_event:time wrap / invalid timeout value: %s" % timeout)
+ return False, change_event_dict # Time wrap or possibly incorrect timeout
+ try:
+ while timeout >= 0:
+ # check for sfp
+ sfp_change_dict = self.get_transceiver_change_event()
+
+ if sfp_change_dict:
+ change_event_dict["sfp"] = sfp_change_dict
+ return True, change_event_dict
+ if forever:
+ time.sleep(1)
+ else:
+ timeout = end_time - time.time()
+ if timeout >= 1:
+ time.sleep(1) # We poll at 1 second granularity
+ else:
+ if timeout > 0:
+ time.sleep(timeout)
+ return True, change_event_dict
+ except Exception as e:
+ print(e)
+ print("get_change_event: Should not reach here.")
+ return False, change_event_dict
+
+ def get_transceiver_change_event(self):
+ current_sfp_present_dict = {}
+ ret_dict = {}
+
+ # Check for OIR events and return ret_dict
+ for i in range(self.port_start_index, self.port_start_index + self.port_num):
+ sfp = self._sfp_list[i]
+ if sfp.get_presence():
+ current_sfp_present_dict[i] = self.STATUS_INSERTED
+
+ else:
+ current_sfp_present_dict[i] = self.STATUS_REMOVED
+
+ # Update reg value
+ if current_sfp_present_dict == self.sfp_present_dict:
+ return ret_dict
+
+ for index, status in current_sfp_present_dict.items():
+ if self.sfp_present_dict[index] != status:
+ ret_dict[index] = status
+
+ self.sfp_present_dict = current_sfp_present_dict
+
+ return ret_dict
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py
new file mode 100644
index 000000000000..85f27a016fb2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py
@@ -0,0 +1,173 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in
+# the platform
+#
+########################################################################
+
+try:
+ import time
+ import subprocess
+ import os
+ from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+ raise ImportError(str(e) + "- required module not found") from e
+
+
+FIRMWARE_UPDATE_DIR = "/tmp/.firmwareupdate/"
+
+class Component(ComponentBase):
+ """Platform-specific Component class"""
+
+ def __init__(self, interface_obj, index, fw_type):
+
+ self.restful = interface_obj
+ self.fw_id = fw_type + str(index)
+
+ def get_fw_info(self):
+ return self.restful.get_fw_by_id(self.fw_id)
+
+ def get_name(self):
+ """
+ Retrieves the name of the component
+
+ Returns:
+ A string containing the name of the component
+ """
+ fw_dict = self.get_fw_info()
+ if not fw_dict:
+ return "N/A"
+ return fw_dict.get("alias", "N/A")
+
+ def get_description(self):
+ """
+ Retrieves the description of the component
+
+ Returns:
+ A string containing the description of the component
+ """
+ fw_dict = self.get_fw_info()
+ if not fw_dict:
+ return "N/A"
+ return fw_dict.get("type", "N/A")
+
+ def get_firmware_version(self):
+ """
+ Retrieves the firmware version of the component
+
+ Note: the firmware version will be read from HW
+
+ Returns:
+ A string containing the firmware version of the component
+ """
+ fw_dict = self.get_fw_info()
+ if not fw_dict:
+ return "N/A"
+ return fw_dict.get("firmware_version", "N/A")
+
+ def get_available_firmware_version(self, image_path):
+ """
+ Retrieves the available firmware version of the component
+
+ Note: the firmware version will be read from image
+
+ Args:
+ image_path: A string, path to firmware image
+
+ Returns:
+ A string containing the available firmware version of the component
+ """
+ raise NotImplementedError
+
+ def get_firmware_update_notification(self, image_path):
+ """
+ Retrieves a notification on what should be done in order to complete
+ the component firmware update
+
+ Args:
+ image_path: A string, path to firmware image
+
+ Returns:
+ A string containing the component firmware update notification if required.
+ By default 'None' value will be used, which indicates that no actions are required
+ """
+ return None
+
+ def install_firmware(self, image_path):
+ """
+ Installs firmware to the component
+
+ This API performs firmware installation only: this may/may not be the same as firmware update.
+ In case platform component requires some extra steps (apart from calling Low Level Utility)
+ to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user
+
+ Note: in case immediate actions are required to complete the component firmware update
+ (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided
+
+ Args:
+ image_path: A string, path to firmware image
+
+ Returns:
+ A boolean, True if install was successful, False if not
+ """
+ if not os.path.isfile(image_path):
+ print("ERROR: %s not found" % image_path)
+ return False
+ cmdstr = "upgrade.py cold %s %d" % (image_path, 0)
+ status, output = subprocess.getstatusoutput(cmdstr)
+ if status == 0:
+ print("INFO: %s firmware install succeeded" % self.get_name())
+ return True
+ print("%s install failed. status:%d, output:\n%s" % (self.get_name(), status, output))
+ return False
+
+ def update_firmware(self, image_path):
+ """
+ Updates firmware of the component
+
+ This API performs firmware update: it assumes firmware installation and loading in a single call.
+ In case platform component requires some extra steps (apart from calling Low Level Utility)
+ to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API
+
+ Args:
+ image_path: A string, path to firmware image
+
+ Raises:
+ RuntimeError: update failed
+ """
+ raise RuntimeError("not support")
+
+ def auto_update_firmware(self, image_path, boot_type):
+ """
+ Updates firmware of the component
+
+ This API performs firmware update automatically based on boot_type: it assumes firmware installation
+ and/or creating a loading task during the reboot, if needed, in a single call.
+ In case platform component requires some extra steps (apart from calling Low Level Utility)
+ to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot.
+ The loading task will be created by API.
+
+ Args:
+ image_path: A string, path to firmware image
+ boot_type: A string, reboot type following the upgrade
+ - none/fast/warm/cold
+
+ Returns:
+ Output: A return code
+ return_code: An integer number, status of component firmware auto-update
+ - return code of a positive number indicates successful auto-update
+ - status_installed = 1
+ - status_updated = 2
+ - status_scheduled = 3
+ - return_code of a negative number indicates failed auto-update
+ - status_err_boot_type = -1
+ - status_err_image = -2
+ - status_err_unknown = -3
+
+ Raises:
+ RuntimeError: auto-update failure cause
+ """
+ raise RuntimeError("not support")
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..05fcc3c25678
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains platform specific implementation of SONiC Platform
+# Base API and provides the EEPROMs' information.
+#
+# The different EEPROMs available are as follows:
+# - System EEPROM : Contains Serial number, Service tag, Base MA
+# address, etc. in ONIE TlvInfo EEPROM format.
+# - PSU EEPROM : Contains Serial number, Part number, Service Tag,
+# PSU type, Revision.
+# - Fan EEPROM : Contains Serial number, Part number, Service Tag,
+# Fan type, Number of Fans in Fantray, Revision.
+########################################################################
+
+try:
+ from sonic_eeprom import eeprom_tlvinfo
+except ImportError as error:
+ raise ImportError(str(error) + "- required module not found") from error
+
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+
+ def __init__(self, interface_obj):
+ self.int_case = interface_obj
+ self.name = "ONIE_E2"
+
+ eeprom_path = self.int_case.get_onie_e2_path(self.name)
+ if eeprom_path is None:
+ raise ValueError("get eeprom path failed")
+
+ super().__init__(eeprom_path, 0, "", True)
+
+ def modelnumber(self, e):
+ '''
+ Returns the value field of the model(part) number TLV as a string
+ '''
+ (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_PART_NUMBER)
+ if not is_valid:
+ return super().part_number_str(e)
+
+ return t[2].decode("ascii")
+
+ def deviceversion(self, e):
+ '''
+ Returns the value field of the Device Version as a string
+ '''
+ (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_DEVICE_VERSION)
+ if not is_valid:
+ return "N/A"
+
+ return str(ord(t[2]))
+
+ def system_eeprom_info(self):
+ '''
+ Retrieves the full content of system EEPROM information for the chassis
+
+ Returns:
+ A dictionary where keys are the type code defined in
+ OCP ONIE TlvInfo EEPROM format and values are their corresponding
+ values.
+ Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+ '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+ '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+ '''
+ sys_eeprom_dict = {}
+ e = self.read_eeprom()
+ if self._TLV_HDR_ENABLED:
+ if not self.is_valid_tlvinfo_header(e):
+ return {}
+ total_len = (e[9] << 8) | e[10]
+ tlv_index = self._TLV_INFO_HDR_LEN
+ tlv_end = self._TLV_INFO_HDR_LEN + total_len
+ else:
+ tlv_index = self.eeprom_start
+ tlv_end = self._TLV_INFO_MAX_LEN
+
+ while (tlv_index + 2) < len(e) and tlv_index < tlv_end:
+ if not self.is_valid_tlv(e[tlv_index:]):
+ break
+
+ tlv = e[tlv_index:tlv_index + 2 + e[tlv_index + 1]]
+ code = "0x%02X" % tlv[0]
+ name, value = self.decoder(None, tlv)
+ sys_eeprom_dict[code] = value
+
+ if e[tlv_index] == self._TLV_CODE_QUANTA_CRC or \
+ e[tlv_index] == self._TLV_CODE_CRC_32:
+ break
+ tlv_index += e[tlv_index + 1] + 2
+
+ return sys_eeprom_dict
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py
new file mode 100644
index 000000000000..d4735bb98126
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py
@@ -0,0 +1,324 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Fans' information which are available in the platform.
+#
+########################################################################
+
+try:
+ import time
+ from sonic_platform_base.fan_base import FanBase
+except ImportError as e:
+ raise ImportError(str(e) + "- required module not found") from e
+
+PSU_NOT_PRESENCE = 0x01
+
+class Fan(FanBase):
+ """Platform-specific Fan class"""
+
+ def __init__(self, interface_obj, fantray_index, fan_index, psu_fan=False, psu_index=0):
+ self.restful = interface_obj
+ self.fantray_index = fantray_index
+ self.fan_index = fan_index
+ self.psu_index = psu_index
+ self.is_psu_fan = psu_fan
+ if not self.is_psu_fan:
+ self.name = "fan" + str(fantray_index)
+ else:
+ self.name = "psu" + str(psu_index)
+
+ self.led_map = {
+ "0": self.STATUS_LED_COLOR_OFF,
+ "1": self.STATUS_LED_COLOR_GREEN,
+ "2": self.STATUS_LED_COLOR_AMBER,
+ "3": self.STATUS_LED_COLOR_RED
+ }
+
+ def fan_dict_update(self):
+ if not self.is_psu_fan:
+ return self.restful.get_fan_info(self.name)
+ else:
+ return self.restful.get_psu_info(self.name)
+
+ def get_name(self):
+ """
+ Retrieves the fan name
+ Returns:
+ string: The name of the device
+ """
+ if not self.is_psu_fan:
+ return "Fantray{}_{}".format(self.fantray_index, self.fan_index)
+ return "PSU{}_FAN{}".format(self.psu_index, self.fan_index)
+
+ def get_model(self):
+ """
+ Retrieves the part number of the FAN
+ Returns:
+ string: Part number of FAN
+ """
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is None:
+ return 'N/A'
+ return fan_info.get("model_name", 'N/A')
+ else:
+ return 'N/A'
+
+ def get_serial(self):
+ """
+ Retrieves the serial number of the FAN
+ Returns:
+ string: Serial number of FAN
+ """
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is None:
+ return 'N/A'
+ return fan_info.get("serial_number", 'N/A')
+ else:
+ return 'N/A'
+
+ def get_presence(self):
+ """
+ Retrieves the presence of the FAN
+ Returns:
+ bool: True if fan is present, False if not
+ """
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is None:
+ return False
+ status = fan_info.get('status', None)
+ if status is None:
+ return False
+ if status == '1' or status == '2':
+ return True
+ return False
+ else:
+ psu_info = self.fan_dict_update()
+ if psu_info is None:
+ return False
+ status = psu_info.get('status', None)
+ if status is None or status in self.restful.restful_err_str:
+ return False
+ if int(status, 16) & PSU_NOT_PRESENCE == 0:
+ return True
+ return False
+
+ def get_status(self):
+ """
+ Retrieves the operational status of the FAN
+ Returns:
+ bool: True if FAN is operating properly, False if not
+ """
+ if not self.get_presence():
+ return False
+
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is not None:
+ status = fan_info.get('status', None)
+ if status == '1':
+ return True
+ else:
+ return False
+ else:
+ psu_info = self.fan_dict_update()
+ if psu_info is None:
+ return False
+ status = psu_info.get('status', None)
+ if status is None or status in self.restful.restful_err_str:
+ return False
+ status = int(status, 16)
+ if status != 0:
+ return False
+ return True
+
+ def get_position_in_parent(self):
+ """
+ Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+ for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+ Returns:
+ integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+ """
+ return -1
+
+ def is_replaceable(self):
+ """
+ Indicate whether this device is replaceable.
+ Returns:
+ bool: True if it is replaceable.
+ """
+ return True
+
+ def get_direction(self):
+ """
+ Retrieves the fan airflow direction
+ Returns:
+ A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+ depending on fan direction
+
+ Notes:
+ - Forward/Exhaust : Air flows from Port side to Fan side.
+ - Reverse/Intake : Air flows from Fan side to Port side.
+ """
+ fan_info = self.fan_dict_update()
+ if fan_info is None:
+ return self.FAN_DIRECTION_NOT_APPLICABLE
+ if not self.is_psu_fan:
+ air_flow = fan_info.get("direction", "2")
+ else:
+ air_flow = fan_info.get("fan_direction", "2")
+ if air_flow == "0":
+ return self.FAN_DIRECTION_INTAKE
+ elif air_flow == "1":
+ return self.FAN_DIRECTION_EXHAUST
+ else:
+ return self.FAN_DIRECTION_NOT_APPLICABLE
+
+ def get_speed(self):
+ """
+ Retrieves the speed of fan as a percentage of full speed
+
+ Returns:
+ An integer, the percentage of full fan speed, in the range 0 (off)
+ to 100 (full speed)
+ """
+ if not self.get_presence():
+ return 0
+
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is not None:
+ motor = fan_info.get('motor{}'.format(self.fan_index))
+ value = motor.get('speed')
+ max_speed = motor.get('speed_max')
+ else:
+ psu_info = self.fan_dict_update()
+ if psu_info is not None:
+ value = psu_info.get('fan_speed', None)
+ max_speed = psu_info.get('fan_speed_max', None)
+ if value is None or value in self.restful.restful_err_str:
+ return None
+ if max_speed is None or max_speed in self.restful.restful_err_str:
+ return None
+ if isinstance(value, str):
+ value = int(value)
+ max_speed = int(max_speed)
+ pwm = value * 100 / max_speed
+ if pwm > 100:
+ pwm = 100
+ elif pwm < 0:
+ pwm = 0
+ return int(pwm)
+
+ def get_speed_tolerance(self):
+ """
+ Retrieves the speed tolerance of the fan
+ Returns:
+ An integer, the percentage of variance from target speed which is
+ considered tolerable
+ """
+ # The default tolerance value is fixed as 30%
+ return 30
+
+ def set_speed(self, speed):
+ """
+ Set fan speed to expected value
+ Args:
+ speed: An integer, the percentage of full fan speed to set fan to,
+ in the range 0 (off) to 100 (full speed)
+ Returns:
+ bool: True if set success, False if fail.
+ """
+ return True
+
+ def set_status_led(self, color):
+ """
+ Set led to expected color
+ Args:
+ color: A string representing the color with which to set the
+ fan module status LED
+ Returns:
+ bool: True if set success, False if fail.
+ """
+ # not supported
+ return False
+
+ def get_status_led(self):
+ """
+ Gets the state of the Fan status LED
+
+ Returns:
+ A string, one of the predefined STATUS_LED_COLOR_* strings.
+ """
+ if self.is_psu_fan:
+ # No LED available for PSU Fan
+ return 'N/A'
+
+ if not self.get_presence():
+ return 'N/A'
+
+ fan_info = self.fan_dict_update()
+ if fan_info is None:
+ return 'N/A'
+
+ led_status = fan_info.get('led_status', None)
+ if led_status is None:
+ return 'N/A'
+
+ return self.led_map.get(led_status, 'N/A')
+
+ def get_target_speed(self):
+ """
+ Retrieves the target (expected) speed of the fan
+ Returns:
+ An integer, the percentage of full fan speed, in the range 0 (off)
+ to 100 (full speed)
+ """
+ pwm = 0
+ if not self.get_presence():
+ return 0
+
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is not None:
+ pwm = fan_info.get('pwm')
+ else:
+ psu_info = self.fan_dict_update()
+ if psu_info is not None:
+ pwm = psu_info.get('fan_ratio')
+ if pwm is None or pwm in self.restful.restful_err_str:
+ return None
+ return int(pwm)
+
+ def get_vendor(self):
+ """
+ Retrieves the vendor name of the fan
+
+ Returns:
+ string: Vendor name of fan
+ """
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is None:
+ return 'N/A'
+ return fan_info.get("vendor", 'N/A')
+ else:
+ return 'N/A'
+
+ def get_revision(self):
+ """
+ Retrieves the hardware revision of the device
+
+ Returns:
+ string: Revision value of device
+ """
+ if not self.is_psu_fan:
+ fan_info = self.fan_dict_update()
+ if fan_info is None:
+ return 'N/A'
+ return fan_info.get("part_number", 'N/A')
+ else:
+ return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..0d61f0142ab8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py
@@ -0,0 +1,184 @@
+#!/usr/bin/env python3
+#
+# fan_drawer_base.py
+#
+# Abstract base class for implementing a platform-specific class with which
+# to interact with a fan drawer module in SONiC
+#
+
+try:
+ import time
+ from sonic_platform_base.fan_drawer_base import FanDrawerBase
+ from sonic_platform.fan import Fan
+except ImportError as e:
+ raise ImportError(str(e) + "- required module not found") from e
+
+
+class FanDrawer(FanDrawerBase):
+ """
+ Abstract base class for interfacing with a fan drawer
+ """
+ # Device type definition. Note, this is a constant.
+ DEVICE_TYPE = "fan_drawer"
+
+ def __init__(self, interface_obj, fantray_index):
+ FanDrawerBase.__init__(self)
+ self.fantray_index = fantray_index
+ self.restful = interface_obj
+ self.fantrayname = "fan" + str(fantray_index)
+ self.num_fans_per_fantray = self.restful.get_fan_rotor_number(self.fantrayname)
+ for i in range(self.num_fans_per_fantray):
+ self._fan_list.append(Fan(interface_obj, fantray_index, i + 1))
+
+ def fantray_dict_update(self):
+ return self.restful.get_fan_info(self.fantrayname)
+
+ def get_name(self):
+ """
+ Retrieves the name of the device
+ Returns:
+ string: The name of the device
+ """
+ return "Fantray{}".format(self.fantray_index)
+
+ def get_presence(self):
+ """
+ Retrieves the presence of the FAN
+ Returns:
+ bool: True if fan is present, False if not
+ """
+ fan_info = self.fantray_dict_update()
+ if fan_info is None:
+ return False
+ status = fan_info.get('status', None)
+ if status is None or status in self.restful.restful_err_str:
+ return False
+ if status == '1' or status == '2':
+ return True
+ return False
+
+ def get_model(self):
+ """
+ Retrieves the part number of the FAN
+ Returns:
+ string: Part number of FAN
+ """
+ fan_info = self.fantray_dict_update()
+ if fan_info is None:
+ return 'N/A'
+ return fan_info.get("model_name", 'N/A')
+
+ def get_serial(self):
+ """
+ Retrieves the serial number of the FAN
+ Returns:
+ string: Serial number of FAN
+ """
+ fan_info = self.fantray_dict_update()
+ if fan_info is None:
+ return 'N/A'
+ return fan_info.get("serial_number", 'N/A')
+
+ def get_revision(self):
+ """
+ Retrieves the hardware revision of the device
+
+ Returns:
+ string: Revision value of device
+ """
+ fan_info = self.fantray_dict_update()
+ if fan_info is None:
+ return 'N/A'
+ return fan_info.get("part_number", 'N/A')
+
+ def get_status(self):
+ """
+ Retrieves the operational status of the FAN
+ Returns:
+ bool: True if FAN is operating properly, False if not
+ """
+ for i in range(self.num_fans_per_fantray):
+ if self._fan_list[i].get_status() is False:
+ return False
+ return True
+
+ def get_position_in_parent(self):
+ """
+ Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+ for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+ Returns:
+ integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+ """
+ return -1
+
+ def is_replaceable(self):
+ """
+ Indicate whether this device is replaceable.
+ Returns:
+ bool: True if it is replaceable.
+ """
+ return True
+
+ def get_num_fans(self):
+ """
+ Retrieves the number of fans available on this fan drawer
+ Returns:
+ An integer, the number of fan modules available on this fan drawer
+ """
+ return len(self._fan_list)
+
+ def get_all_fans(self):
+ """
+ Retrieves all fan modules available on this fan drawer
+ Returns:
+ A list of objects derived from FanBase representing all fan
+ modules available on this fan drawer
+ """
+ return self._fan_list
+
+ def set_status_led(self, *args):
+ """
+ Sets the state of the fan drawer status LED
+ Args:
+ color: A string representing the color with which to set the
+ fan drawer status LED
+ Returns:
+ bool: True if status LED state is set successfully, False if not
+ """
+ # not supported
+ return False
+
+ def get_status_led(self):
+ """
+ Gets the state of the Fan status LED
+
+ Returns:
+ A string, one of the predefined STATUS_LED_COLOR_* strings.
+ """
+ return 'N/A'
+
+ def get_maximum_consumed_power(self):
+ """
+ Retrives the maximum power drawn by Fan Drawer
+
+ Returns:
+ A float, with value of the maximum consumable power of the
+ component.
+ """
+ return 'N/A'
+
+ def get_service_tag(self):
+ """
+ Retrieves the service tag of the device
+ Returns:
+ string: The service tag of the device
+ """
+ return 'N/A'
+
+ def get_mfr_id(self):
+ """
+ Retrieves the manufacturer's name (or ID) of the device
+ Returns:
+ string: Manufacturer's id of device
+ """
+ return "Micas"
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py
new file mode 100644
index 000000000000..8ea66f339e96
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+
+########################################################################
+#
+# Module contains a platform specific implementation of SONiC Platform
+# Base PCIe class
+#
+########################################################################
+
+try:
+ from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+ raise ImportError(str(e) + "- required module not found") from e
+
+
+class Pcie(PcieUtil):
+ """Platform-specific Pcie class"""
+
+ def __init__(self, platform_path):
+ PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py
new file mode 100644
index 000000000000..4d6fe03d93ac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+ from sonic_platform_base.platform_base import PlatformBase
+ from sonic_platform.chassis import Chassis
+except ImportError as e:
+ raise ImportError(str(e) + "- required module not found") from e
+
+
+class Platform(PlatformBase):
+ """
+ Platform-specific class
+ """
+
+ def __init__(self):
+ PlatformBase.__init__(self)
+ self._chassis = Chassis()
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py
new file mode 100644
index 000000000000..9d6d06a39824
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py
@@ -0,0 +1,615 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the PSUs' information which are available in the platform
+#
+########################################################################
+
+
+try:
+ import time
+ from sonic_platform_base.psu_base import PsuBase
+ from sonic_platform.fan import Fan
+except ImportError as e:
+ raise ImportError(str(e) + "- required module not found") from e
+
+PSU_NOT_PRESENCE = 0x01
+PSU_POWER_LOSS = 0x02
+PSU_FAN_FAULT = 0x04
+PSU_VOL_FAULT = 0x08
+PSU_CUR_FAULT = 0x10
+PSU_PWR_FAULT = 0x20
+PSU_TEMP_FAULT = 0x40
+
+PSU_ERR_VALUE = -999999
+
+class Psu(PsuBase):
+ """Platform-specific PSU class"""
+
+ def __init__(self, interface_obj, index):
+ self._fan_list = []
+ self._thermal_list = []
+ self.restful = interface_obj
+ self.index = index
+ self.name = "psu" + str(index)
+
+ self._fan_list.append(Fan(self.restful, 1, 1, psu_fan=True, psu_index=index))
+
+ self.led_map = {
+ "0": self.STATUS_LED_COLOR_OFF,
+ "1": self.STATUS_LED_COLOR_GREEN,
+ "2": self.STATUS_LED_COLOR_AMBER,
+ "3": self.STATUS_LED_COLOR_RED
+ }
+
+ def _get_value(self, value):
+ return round(float(value) / 1000, 1)
+
+ def psu_dict_update(self):
+ return self.restful.get_psu_info(self.name)
+
+ def psu_status_dict_update(self):
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return None
+ status = psu_info.get('status', None)
+ psu_status_dict = {}
+ psu_status_dict['InputStatus'] = False
+ psu_status_dict['FanStatus'] = False
+ psu_status_dict['TempStatus'] = False
+ psu_status_dict['OutputStatus'] = False
+ psu_status_dict['Temperature'] = {}
+ psu_status_dict['Temperature']['Value'] = PSU_ERR_VALUE
+ psu_status_dict['Temperature']['Max'] = PSU_ERR_VALUE
+ psu_status_dict['FanSpeed'] = {}
+ psu_status_dict['FanSpeed']['Value'] = 0
+ psu_status_dict['FanSpeed']['Ratio'] = 0
+ psu_status_dict['FanSpeed']['Max'] = 0
+ if status is None or status in self.restful.restful_err_str:
+ return psu_status_dict
+ status = int(status, 16)
+ if status & PSU_POWER_LOSS == 0:
+ psu_status_dict['InputStatus'] = True
+ if status & PSU_FAN_FAULT == 0:
+ psu_status_dict['FanStatus'] = True
+ if psu_info.get('fan_speed') not in self.restful.restful_err_str:
+ psu_status_dict['FanSpeed']['Value'] = int(psu_info.get('fan_speed'))
+ if psu_info.get('fan_ratio') not in self.restful.restful_err_str:
+ psu_status_dict['FanSpeed']['Ratio'] = int(psu_info.get('fan_ratio'))
+ if psu_info.get('fan_speed_max') not in self.restful.restful_err_str:
+ psu_status_dict['FanSpeed']['Max'] = int(psu_info.get('fan_speed_max'))
+ if status & PSU_TEMP_FAULT == 0:
+ psu_status_dict['TempStatus'] = True
+ if status & PSU_VOL_FAULT == 0:
+ psu_status_dict['OutputStatus'] = True
+
+ psu_temp = psu_info.get('temp0', None)
+ if psu_temp is not None:
+ if psu_temp.get('value') not in self.restful.restful_err_str:
+ psu_status_dict['Temperature']['Value'] = float(psu_temp.get('value'))
+ if psu_temp.get('max') not in self.restful.restful_err_str:
+ psu_status_dict['Temperature']['Max'] = float(psu_temp.get('max'))
+ return psu_status_dict
+
+ def psu_power_dict_update(self):
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return None
+ psu_power_dict = {}
+ psu_power_dict['Outputs'] = {}
+ psu_power_dict['Outputs']['Voltage'] = {}
+ psu_power_dict['Outputs']['Current'] = {}
+ psu_power_dict['Outputs']['Power'] = {}
+ psu_power_dict['Outputs']['Max_Power'] = {}
+ psu_power_dict['Inputs'] = {}
+ psu_power_dict['Inputs']['Voltage'] = {}
+ psu_power_dict['Inputs']['Current'] = {}
+ psu_power_dict['Inputs']['Power'] = {}
+ psu_power_dict['Outputs']['Voltage']['Value'] = psu_info.get('out_vol', PSU_ERR_VALUE)
+ psu_power_dict['Outputs']['Current']['Value'] = psu_info.get('out_cur', PSU_ERR_VALUE)
+ psu_power_dict['Outputs']['Power']['Value'] = psu_info.get('out_power', PSU_ERR_VALUE)
+ psu_power_dict['Outputs']['Max_Power']['Value'] = psu_info.get('out_max_power', PSU_ERR_VALUE)
+ psu_power_dict['Outputs']['Voltage']['HighAlarm'] = psu_info.get('out_cur', PSU_ERR_VALUE)
+ psu_power_dict['Outputs']['Voltage']['LowAlarm'] = psu_info.get('out_cur', PSU_ERR_VALUE)
+ psu_power_dict['Inputs']['Voltage']['Value'] = psu_info.get('in_vol', PSU_ERR_VALUE)
+ psu_power_dict['Inputs']['Current']['Value'] = psu_info.get('in_cur', PSU_ERR_VALUE)
+ psu_power_dict['Inputs']['Power']['Value'] = psu_info.get('in_power', PSU_ERR_VALUE)
+ psu_power_dict['Inputs']['Type'] = psu_info.get('type', "N/A")
+ return psu_power_dict
+
+ def get_name(self):
+ """
+ Retrieves the name of the device
+
+ Returns:
+ string: The name of the device
+ """
+ return "Psu{}".format(self.index)
+
+ def get_mfr_id(self):
+ """
+ Retrieves the manufacturer's name (or ID) of the device
+ Returns:
+ string: Manufacturer's id of device
+ """
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return "N/A"
+ val = psu_info.get("vendor", "")
+ if val == "":
+ return "N/A"
+ return val.rstrip('#')
+
+ def get_presence(self):
+ """
+ Retrieves the presence of the Power Supply Unit (PSU)
+
+ Returns:
+ bool: True if PSU is present, False if not
+ """
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return False
+ status = psu_info.get('present', None)
+ if status is not None:
+ if status in self.restful.restful_err_str:
+ return False
+ if int(status) == 0:
+ return False
+ return True
+ # present is None, try to read status
+ status = psu_info.get('status', None)
+ if status is None or status in self.restful.restful_err_str:
+ return False
+ if int(status, 16) & PSU_NOT_PRESENCE == 0:
+ return True
+ return False
+
+ def get_model(self):
+ """
+ Retrieves the model number (or part number) of the device
+
+ Returns:
+ string: Model/part number of device
+ """
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return "N/A"
+ val = psu_info.get("model_name", "")
+ if val == "":
+ return "N/A"
+ return val
+
+ def get_serial(self):
+ """
+ Retrieves the serial number of the PSU
+
+ Returns:
+ string: Serial number of PSU
+ """
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return "N/A"
+ val = psu_info.get("serial_number", "")
+ if val == "":
+ return "N/A"
+ return val.rstrip('#')
+
+ def get_status(self):
+ """
+ Retrieves the operational status of the PSU
+
+ Returns:
+ bool: True if PSU is operating properly, False if not
+ """
+ if not self.get_presence():
+ return False
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return False
+ status = psu_info.get('status', None)
+ if status is None or status in self.restful.restful_err_str:
+ return False
+ status = int(status, 16)
+ if status != 0:
+ return False
+ return True
+
+ def get_position_in_parent(self):
+ """
+ Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+ for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+ Returns:
+ integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+ """
+ return -1
+
+ def is_replaceable(self):
+ """
+ Indicate whether this device is replaceable.
+ Returns:
+ bool: True if it is replaceable.
+ """
+ return True
+
+ def get_voltage(self):
+ """
+ Retrieves current PSU voltage output
+
+ Returns:
+ A float number, the output voltage in volts,
+ e.g. 12.1
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ if psu_status_dict.get("InputStatus", False) is False:
+ value = 0
+ else:
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return 0
+ cur_psu_output = psu_power_dict.get("Outputs", None)
+ if cur_psu_output is None:
+ return 0
+ tmp = cur_psu_output.get("Voltage", None)
+ if tmp is None:
+ return 0
+ value = tmp.get("Value", 0)
+ if value in self.restful.restful_err_str:
+ return 0
+ return self._get_value(value)
+
+ def get_current(self):
+ """
+ Retrieves present electric current supplied by PSU
+
+ Returns:
+ A float number, electric current in amperes,
+ e.g. 15.4
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ if psu_status_dict.get("InputStatus", False) is False:
+ value = 0
+ else:
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return 0
+ cur_psu_output = psu_power_dict.get("Outputs", None)
+ if cur_psu_output is None:
+ return 0
+ tmp = cur_psu_output.get("Current", None)
+ if tmp is None:
+ return 0
+ value = tmp.get("Value", 0)
+ if value in self.restful.restful_err_str:
+ return 0
+ return self._get_value(value)
+
+ def get_power(self):
+ """
+ Retrieves current energy supplied by PSU
+
+ Returns:
+ A float number, the power in watts,
+ e.g. 302.6
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ if psu_status_dict.get("InputStatus", False) is False:
+ value = 0
+ else:
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return 0
+ cur_psu_output = psu_power_dict.get("Outputs", None)
+ if cur_psu_output is None:
+ return 0
+ tmp = cur_psu_output.get("Power", None)
+ if tmp is None:
+ return 0
+ value = tmp.get("Value", 0)
+ if value in self.restful.restful_err_str:
+ return 0
+ value = round(float(value) / 1000, 1)
+ return self._get_value(value)
+
+
+ def get_powergood_status(self):
+ """
+ Retrieves the powergood status of PSU
+
+ Returns:
+ A boolean, True if PSU has stablized its output voltages and
+ passed all its internal self-tests, False if not.
+ """
+ if not self.get_presence():
+ return False
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return False
+ status = psu_info.get('status', None)
+ if status is None or status in self.restful.restful_err_str:
+ return False
+ status = int(status, 16)
+ if status != 0:
+ return False
+ return True
+
+ def get_status_led(self):
+ """
+ Gets the state of the PSU status LED
+
+ Returns:
+ A string, one of the predefined STATUS_LED_COLOR_* strings.
+ """
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return self.STATUS_LED_COLOR_OFF
+ led_status = psu_info.get('led_status', None)
+ if led_status is None:
+ return self.STATUS_LED_COLOR_OFF
+
+ return self.led_map.get(led_status, "unknown status %s" % led_status)
+
+ def set_status_led(self, color):
+ """
+ Sets the state of the PSU status LED
+ Args:
+ color: A string representing the color with which to set the
+ PSU status LED
+ Returns:
+ bool: True if status LED state is set successfully, False if
+ not
+ """
+ # not supported
+ return False
+
+ def get_temperature(self):
+ """
+ Retrieves current temperature reading from PSU
+
+ Returns:
+ A float number of current temperature in Celsius up to nearest thousandth
+ of one degree Celsius, e.g. 30.125
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ cur_psu_temp = psu_status_dict.get("Temperature", None)
+ if cur_psu_temp is None:
+ return 0
+ value = cur_psu_temp.get("Value", None)
+ if value is None or value in self.restful.restful_err_str:
+ return 0
+ return self._get_value(value)
+
+ def get_temperature_high_threshold(self):
+ """
+ Retrieves the high threshold temperature of PSU
+
+ Returns:
+ A float number, the high threshold temperature of PSU in Celsius
+ up to nearest thousandth of one degree Celsius, e.g. 30.125
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ cur_psu_temp = psu_status_dict.get("Temperature", None)
+ if cur_psu_temp is None:
+ return 0
+ value = cur_psu_temp.get("Max", None)
+ if value is None or value in self.restful.restful_err_str:
+ return 0
+ return self._get_value(value)
+
+ def get_voltage_high_threshold(self):
+ """
+ Retrieves the high threshold PSU voltage output
+
+ Returns:
+ A float number, the high threshold output voltage in volts,
+ e.g. 12.1
+ """
+ return 13.0
+
+ def get_voltage_low_threshold(self):
+ """
+ Retrieves the low threshold PSU voltage output
+
+ Returns:
+ A float number, the low threshold output voltage in volts,
+ e.g. 12.1
+ """
+ return 11.8
+
+ def get_input_voltage(self):
+ """
+ Get the input voltage of the PSU
+
+ Returns:
+ A float number, the input voltage in volts,
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ if psu_status_dict.get("InputStatus", False) is False:
+ value = 0
+ else:
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return 0
+ cur_psu_input = psu_power_dict.get("Inputs", None)
+ if cur_psu_input is None:
+ return 0
+ tmp = cur_psu_input.get("Voltage", None)
+ if tmp is None:
+ return 0
+ value = tmp.get("Value", 0)
+ if value in self.restful.restful_err_str:
+ return 0
+ return self._get_value(value)
+
+ def get_input_current(self):
+ """
+ Get the input electric current of the PSU
+
+ Returns:
+ A float number, the input current in amperes, e.g 220.3
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ if psu_status_dict.get("InputStatus", False) is False:
+ value = 0
+ else:
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return 0
+ cur_psu_input = psu_power_dict.get("Inputs", None)
+ if cur_psu_input is None:
+ return 0
+ tmp = cur_psu_input.get("Current", None)
+ if tmp is None:
+ return 0
+ value = tmp.get("Value", 0)
+ if value in self.restful.restful_err_str:
+ return 0
+ return self._get_value(value)
+
+ def get_input_power(self):
+ """
+ Get the input current energy of the PSU
+
+ Returns:
+ A float number, the input power in watts, e.g. 302.6
+ """
+ psu_status_dict = self.psu_status_dict_update()
+ if psu_status_dict is None:
+ return 0
+ if psu_status_dict.get("InputStatus", False) is False:
+ value = 0
+ else:
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return 0
+ cur_psu_input = psu_power_dict.get("Inputs", None)
+ if cur_psu_input is None:
+ return 0
+ tmp = cur_psu_input.get("Power", None)
+ if tmp is None:
+ return 0
+ value = tmp.get("Value", 0)
+ if value in self.restful.restful_err_str:
+ return 0
+ value = round(float(value) / 1000, 1)
+ return self._get_value(value)
+
+ def get_revision(self):
+ """
+ Retrieves the hardware revision of the device
+
+ Returns:
+ string: Revision value of device
+ """
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return "N/A"
+ val = psu_info.get("hardware_version", "")
+ if val == "":
+ return "N/A"
+ return val
+
+ def get_vendor(self):
+ """
+ Retrieves the vendor name of the psu
+
+ Returns:
+ string: Vendor name of psu
+ """
+ psu_info = self.psu_dict_update()
+ if psu_info is None:
+ return "N/A"
+ val = psu_info.get("vendor", "")
+ if val == "":
+ return "N/A"
+ return val.rstrip('#')
+
+ def get_maximum_supplied_power(self):
+ """
+ Retrieves the maximum supplied power by PSU
+
+ Returns:
+ A float number, the maximum power output in Watts.
+ e.g. 1200.1
+ """
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return 0
+ cur_psu_output = psu_power_dict.get("Outputs", None)
+ if cur_psu_output is None:
+ return 0
+ tmp = cur_psu_output.get("Max_Power", None)
+ if tmp is None:
+ return 0
+ value = tmp.get("Value", 0)
+ if value in self.restful.restful_err_str:
+ return 0
+ value = round(float(value) / 1000, 1)
+ return self._get_value(value)
+
+
+ def get_thermal(self, index):
+ """
+ Retrieves thermal unit represented by (0-based) index
+
+ Args:
+ index: An integer, the index (0-based) of the thermal to
+ retrieve
+
+ Returns:
+ An object dervied from ThermalBase representing the specified thermal
+ """
+ return False
+
+ def get_capacity(self):
+ """
+ Gets the capacity (maximum output power) of the PSU in watts
+ Returns:
+ An integer, the capacity of PSU
+ """
+ return int(self.get_maximum_supplied_power())
+
+ def get_type(self):
+ """
+ Gets the type of the PSU
+ Returns:
+ A string, the type of PSU (AC/DC)
+ """
+ psu_power_dict = self.psu_power_dict_update()
+ if psu_power_dict is None:
+ return "N/A"
+ psu_inputs = psu_power_dict.get("Inputs", None)
+ if psu_inputs is None:
+ return "N/A"
+ tmp = psu_inputs.get("Type", None)
+ if tmp is None:
+ return "N/A"
+ if tmp == "0":
+ return "DC"
+ if tmp == "1":
+ return "AC"
+ return "N/A"
+
+ def get_service_tag(self):
+ """
+ Retrieves the service tag of the device
+ Returns:
+ string: The service tag of the device
+ """
+ return 'N/A'
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
new file mode 100644
index 000000000000..49cdda394333
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
@@ -0,0 +1,459 @@
+from restful_util.restful_api import RestfulApiClient
+from platform_util import exec_os_cmd, get_value, dev_file_read
+from plat_hal.baseutil import baseutil
+import time
+import sys
+PY3K = sys.version_info >= (3, 0)
+if PY3K:
+ from time import monotonic as _time
+else:
+ from monotonic import monotonic as _time
+
+PSU_NOT_PRESENCE = 0x01
+PSU_POWER_LOSS = 0x02
+PSU_FAN_FAULT = 0x04
+PSU_VOL_FAULT = 0x08
+PSU_CUR_FAULT = 0x10
+PSU_PWR_FAULT = 0x20
+PSU_TEMP_FAULT = 0x40
+
+PSU_ERR_VALUE = -999999
+
+
+def RestfulInfoUpdate():
+ def decorator(func):
+ def wrapper(self, *args, **kwargs):
+ self.update_restful_info(func.__name__)
+ return func(self, *args, **kwargs)
+ return wrapper
+ return decorator
+
+
+class RestfulApi(RestfulApiClient):
+
+ func_map = {
+ "get_psu_total_number": "psu",
+ "get_psu_info": "psu",
+ "get_fan_total_number": "fan",
+ "get_fan_rotor_number": "fan",
+ "get_fan_info": "fan",
+ "get_all_dcdc_sensors": "sensor",
+ "get_dcdc_sensor_by_id": "sensor",
+ "get_all_temp_sensors": "temp_sensor",
+ "get_temp_sensor_by_id": "temp_sensor",
+ "get_all_vol_sensors": "vol_sensor",
+ "get_vol_sensor_by_id": "vol_sensor",
+ "get_all_cur_sensors": "cur_sensor",
+ "get_cur_sensor_by_id": "cur_sensor",
+ "get_cpld_total_number": "fw",
+ "get_cpld_by_id": "fw",
+ "get_bmc_by_id": "fw",
+ "get_bmc_total_number": "fw",
+ "get_sysled": "led",
+ }
+
+ def __init__(self, default_gap=3):
+ self.gap = default_gap
+ self.config = baseutil.get_config()
+ self.eeprom_config = self.config.get("onie_e2", None)
+ self.reboot_cause_config = self.config.get("reboot_cause", None)
+ self.fpga_config = self.config.get("fpga_config", {})
+ self.bios_config = self.config.get("bios_config", {})
+ self.sw_config = self.config.get("switch_config", {})
+ self.cpld_config = self.config.get("cpld_config", {})
+ self.bmc_config = self.config.get("bmc_config", {})
+ self.fan_config = self.config.get("fan_config", {})
+ self.psu_config = self.config.get("psu_config", {})
+ self.thermal_config = self.config.get("thermal_config", {})
+ self.restful_ready = 0
+ self.dcdc_sensors = None
+ self.fans = None
+ self.psus = None
+ self.temp_sensors = None
+ self.vol_sensors = None
+ self.cur_sensors = None
+ self.cplds = None
+ self.bmc = None
+ self.sysled = None
+ self.temp_filter = {
+ "temp0": "INLET_TEMP_PDB",
+ "temp1": "INLET_TEMP_LC",
+ "temp2": "OUTLET_2_TEMP",
+ "temp3": "OUTLET_1_TEMP",
+ "temp4": "ASIC_TEMP",
+ "temp5": "CPU",
+ "temp6": "PSU1_TEMP",
+ "temp7": "PSU2_TEMP",
+ "temp8": "PSU3_TEMP",
+ "temp9": "PSU4_TEMP",
+ }
+ self.restful_update_map = {
+ "psu": {
+ "update_time": 0,
+ "update_func": self.update_psus,
+ "url": self.PsusUrl
+ },
+ "fan": {
+ "update_time": 0,
+ "update_func": self.update_fans,
+ "url": self.FansUrl
+ },
+ "fw": {
+ "update_time": 0,
+ "update_func": self.update_firmwares,
+ "url": self.FirmwaresUrl
+ },
+ "sensor": {
+ "update_time": 0,
+ "update_func": self.update_sensors,
+ "url": self.SensorsUrl
+ },
+ "temp_sensor": {
+ "update_time": 0,
+ "update_func": self.update_temp_sensors,
+ "url": self.TempSensorsUrl
+ },
+ "vol_sensor": {
+ "update_time": 0,
+ "update_func": self.update_vol_sensors,
+ "url": self.VolSensorsUrl
+ },
+ "cur_sensor": {
+ "update_time": 0,
+ "update_func": self.update_cur_sensors,
+ "url": self.CurSensorsUrl
+ },
+ "led": {
+ "update_time": 0,
+ "update_func": self.update_sysled,
+ "url": self.LEDsUrl
+ },
+ }
+ self.restful_err_str = ("ACCESS FAILED", "NA", "N/A")
+
+ def restful_check_ready(self):
+ if self.restful_ready == 1:
+ return True
+ retry = 60
+ while retry >= 0:
+ tmp = self.get_request(self.HostnameUrl)
+ if tmp is None:
+ time.sleep(5)
+ continue
+ ret = tmp.get('message', 'Not OK')
+ code = tmp.get('code', 0)
+ if ret == 'OK' and code == 200:
+ self.restful_ready = 1
+ return True
+ return False
+
+ def update_restful_info(self, func_name):
+ tmp = self.restful_update_map.get(self.func_map.get(func_name, None))
+ if tmp is not None:
+ last_time = tmp.get("update_time", 0)
+ local_time = _time()
+ func = tmp.get("update_func", None)
+ url = tmp.get("url", None)
+ if func is not None and local_time - last_time > self.gap:
+ ret, data = self.restful_request(url)
+ if ret:
+ func(data)
+ tmp["update_time"] = _time()
+
+ def restful_request(self, url):
+ try:
+ tmp = self.get_request(url)
+ if not tmp:
+ return False, None
+ ret = tmp.get('message', 'Not OK')
+ code = tmp.get('code', 0)
+ if ret == 'OK' and code == 200:
+ data = tmp.get('data', None)
+ return True, data
+ return False, None
+ except Exception as e:
+ return False, None
+
+ def update_firmwares(self, val):
+ try:
+ self.cplds = val.get('cpld', None)
+ self.bmc = val.get('bmc', None)
+ except Exception as e:
+ self.cplds = None
+ self.bmc = None
+
+ def update_sysled(self, val):
+ try:
+ self.sysled = val.get('sysled', None)
+ except Exception as e:
+ self.sysled = None
+
+ def update_psus(self, val):
+ try:
+ self.psus = val.get('psu', None)
+ except Exception as e:
+ self.psus = None
+
+ def update_fans(self, val):
+ try:
+ self.fans = val.get('fan', None)
+ except Exception as e:
+ self.fans = None
+
+ def update_sensors(self, val):
+ try:
+ cur_sensors = val.get('cur_sensor', None)
+ vol_sensors = val.get('vol_sensor', None)
+ temp_sensors = val.get('temp_sensor', None)
+ self.dcdc_sensors = {}
+ self.temp_sensors = {}
+ if cur_sensors is not None:
+ for name, data in cur_sensors.items():
+ if isinstance(data, dict):
+ self.dcdc_sensors[name] = data
+ if vol_sensors is not None:
+ for name, data in vol_sensors.items():
+ if isinstance(data, dict):
+ self.dcdc_sensors[name] = data
+ if temp_sensors is not None:
+ for name, data in temp_sensors.items():
+ if isinstance(data, dict):
+ if name in self.temp_filter:
+ self.temp_sensors[name] = data
+ self.temp_sensors[name]["alias"] = self.temp_filter[name]
+ except Exception as e:
+ self.dcdc_sensors = None
+ self.temp_sensors = None
+
+ def update_temp_sensors(self, val):
+ try:
+ temp_sensors = val.get('temp_sensor', None)
+ self.temp_sensors = {}
+ if temp_sensors is not None:
+ for name, data in temp_sensors.items():
+ if isinstance(data, dict):
+ if name in self.temp_filter:
+ self.temp_sensors[name] = data
+ self.temp_sensors[name]["alias"] = self.temp_filter[name]
+ except Exception as e:
+ self.temp_sensors = None
+
+ def update_vol_sensors(self, val):
+ try:
+ vol_sensors = val.get('vol_sensor', None)
+ self.vol_sensors = {}
+ if vol_sensors is not None:
+ for name, data in vol_sensors.items():
+ if isinstance(data, dict):
+ self.vol_sensors[name] = data
+ except Exception as e:
+ self.vol_sensors = None
+
+ def update_cur_sensors(self, val):
+ try:
+ cur_sensors = val.get('cur_sensor', None)
+ self.cur_sensors = {}
+ if cur_sensors is not None:
+ for name, data in cur_sensors.items():
+ if isinstance(data, dict):
+ self.cur_sensors[name] = data
+ except Exception as e:
+ self.cur_sensors = None
+
+ # Interface for Psu
+ def get_psu_total_number(self):
+ psu_num = self.psu_config.get("number", 0)
+ return psu_num
+
+
+ @RestfulInfoUpdate()
+ def get_psu_info(self, psu_name):
+ if self.psus is None:
+ return None
+ return self.psus.get(psu_name)
+
+ # Interface for Fan
+ def get_fan_total_number(self):
+ fan_num = self.fan_config.get("num_fantrays", 0)
+ return fan_num
+
+ def get_fan_rotor_number(self, fan_name):
+ rotor_number = self.fan_config.get("num_fans_pertray", 0)
+ return rotor_number
+
+ @RestfulInfoUpdate()
+ def get_fan_info(self, fan_name):
+ if self.fans is None:
+ return None
+ return self.fans.get(fan_name)
+
+ @RestfulInfoUpdate()
+ def get_all_dcdc_sensors(self):
+ return self.dcdc_sensors
+
+ # Interface for dcdc
+ @RestfulInfoUpdate()
+ def get_dcdc_sensor_by_id(self, dcdc_id):
+ if not self.dcdc_sensors:
+ return None
+ return self.dcdc_sensors.get(dcdc_id, None)
+
+ def get_thermal_total_number(self):
+ thermal_num = self.thermal_config.get("number", 0)
+ return thermal_num
+
+ @RestfulInfoUpdate()
+ def get_all_temp_sensors(self):
+ return self.temp_sensors
+
+ @RestfulInfoUpdate()
+ def get_temp_sensor_by_id(self, temp_id):
+ if not self.temp_sensors:
+ return None
+ return self.temp_sensors.get(temp_id, None)
+
+ @RestfulInfoUpdate()
+ def get_all_vol_sensors(self):
+ return self.vol_sensors
+
+ @RestfulInfoUpdate()
+ def get_vol_sensor_by_id(self, vol_id):
+ if not self.vol_sensors:
+ return None
+ return self.vol_sensors.get(vol_id, None)
+
+ @RestfulInfoUpdate()
+ def get_all_cur_sensors(self):
+ return self.cur_sensors
+
+ @RestfulInfoUpdate()
+ def get_cur_sensor_by_id(self, cur_id):
+ if not self.cur_sensors:
+ return None
+ return self.cur_sensors.get(cur_id, None)
+
+ def get_cpld_total_number(self):
+ cpld_num = self.cpld_config.get("number", 0)
+ return cpld_num
+
+ def get_fw_by_id(self, fw_name):
+ if "cpld" in fw_name:
+ return self.get_cpld_by_id(fw_name)
+ elif "bmc" in fw_name:
+ return self.get_bmc_by_id(fw_name)
+ elif "switch" in fw_name:
+ return self.get_switch_by_id(fw_name)
+ elif "bios" in fw_name:
+ return self.get_bios_by_id(fw_name)
+ elif "fpga" in fw_name:
+ return self.get_fpga_by_id(fw_name)
+
+ @RestfulInfoUpdate()
+ def get_cpld_by_id(self, fw_type):
+ if self.cplds is not None:
+ cpld = self.cplds.get(fw_type, None)
+ return cpld
+ return None
+
+ @RestfulInfoUpdate()
+ def get_sysled(self):
+ return self.sysled
+
+ def _get_value(self, config):
+ if config["gettype"] == "cmd":
+ ret, output = exec_os_cmd(config["cmd"])
+ return output
+
+ def get_fpga_total_number(self):
+ fpga_num = self.fpga_config.get("number", 0)
+ return fpga_num
+
+ def get_fpga_reg(self, config):
+ if config is None:
+ return "N/A"
+ ret, tmp = dev_file_read(config["dev_path"], config["offset"], config["len"])
+ if ret != True:
+ return "N/A"
+ reg = ""
+ for index in range(len(tmp) - 1, -1, -1):
+ val = hex(tmp[index]).replace("0x", "")
+ reg = reg + val
+ return reg
+
+ def get_fpga_by_id(self, fw_type):
+ fw_dict = {}
+ fpgas = self.fpga_config.get("fpgas", [])
+ for i in fpgas:
+ if fw_type == i["name"]:
+ fw_dict['alias'] = i.get('alias', None)
+ fw_dict['board_version'] = self.get_fpga_reg(i.get("board_version", None))
+ fw_dict['firmware_version'] = self.get_fpga_reg(i.get("firmware_version", None))
+ fw_dict['type'] = i.get('type', None)
+ break
+ return fw_dict
+
+ def get_bios_by_id(self, fw_type):
+ fw_dict = {}
+ bios = self.bios_config.get("bios", [])
+ for i in bios:
+ if fw_type == i["name"]:
+ fw_dict['alias'] = i.get('alias', None)
+ fw_dict['board_version'] = self._get_value(i.get("board_version", None))
+ fw_dict['firmware_version'] = self._get_value(i.get("firmware_version", None))
+ fw_dict['type'] = self._get_value(i.get("type", None))
+ break
+ return fw_dict
+
+ def get_switch_by_id(self, fw_type):
+ fw_dict = {}
+ sw = self.sw_config.get("switchs", [])
+ for i in sw:
+ if fw_type == i["name"]:
+ for cmd in i.get("init_cmd", []):
+ exec_os_cmd(cmd)
+ fw_dict['alias'] = i.get('alias', None)
+ fw_dict['board_version'] = self._get_value(i.get("board_version", None)).split(" ")[0]
+ fw_dict['firmware_version'] = self._get_value(i.get("firmware_version", None)).split(" ")[0]
+ fw_dict['type'] = i.get('type', None)
+ for cmd in i.get("deinit_cmd", []):
+ exec_os_cmd(cmd)
+ break
+ return fw_dict
+
+ @RestfulInfoUpdate()
+ def get_bmc_by_id(self, fw_type):
+ fw_dict = {}
+ if self.bmc is not None:
+ bmc = self.bmc.get(fw_type)
+ fw_dict['board_version'] = bmc.get('board_version', None)
+ fw_dict['alias'] = bmc.get('alias', None)
+ fw_dict['firmware_version'] = bmc.get('firmware_version', None)
+ fw_dict['type'] = bmc.get('type', None)
+ return fw_dict
+
+ def get_bmc_total_number(self):
+ bmc_num = self.bmc_config.get("number", 0)
+ return bmc_num
+
+ def get_bios_total_number(self):
+ num = self.bios_config.get("number", 0)
+ return num
+
+ def get_sw_total_number(self):
+ num = self.sw_config.get("number", 0)
+ return num
+
+ def get_onie_e2_path(self, e2_name):
+ if self.eeprom_config is None:
+ return "/sys/bus/i2c/devices/1-0056/eeprom"
+ return self.eeprom_config.get("e2loc").get("loc")
+
+ def get_cpu_reboot_cause(self):
+ if self.reboot_cause_config is None:
+ return 0
+ check_point = self.reboot_cause_config.get('check_point', None)
+ if check_point is not None:
+ ret, val = get_value(check_point)
+ if ret == True:
+ return val
+ return 0
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py
new file mode 100644
index 000000000000..5c17530a5c8b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py
@@ -0,0 +1,634 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#
+# *_device.py config version instruction:
+# ver 1.0 - platform api:
+# "presence_cpld": {
+# "dev_id": {
+# [dev_id]: {
+# "offset": {
+# [offset]: [port_id]
+# }
+# }
+# }
+# }
+# "reset_cpld": {
+# "dev_id": {
+# [dev_id]: {
+# "offset": {
+# [offset]: [port_id]
+# }
+# }
+# }
+# }
+# ver 2.0 - wb_plat:
+# "presence_path": "/xx/wb_plat/xx[port_id]/present"
+# "eeprom_path": "/sys/bus/i2c/devices/i2c-[bus]/[bus]-0050/eeprom"
+# "reset_path": "/xx/wb_plat/xx[port_id]/reset"
+#############################################################################
+import sys
+import time
+import syslog
+import traceback
+from abc import abstractmethod
+
+configfile_pre = "/usr/local/bin/"
+sys.path.append(configfile_pre)
+
+try:
+ from platform_intf import *
+ from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+ from plat_hal.baseutil import baseutil
+
+except ImportError as error:
+ raise ImportError(str(error) + "- required module not found") from error
+
+LOG_DEBUG_LEVEL = 1
+LOG_WARNING_LEVEL = 2
+LOG_ERROR_LEVEL = 3
+
+
+class Sfp(SfpOptoeBase):
+
+ OPTOE_DRV_TYPE1 = 1
+ OPTOE_DRV_TYPE2 = 2
+ OPTOE_DRV_TYPE3 = 3
+
+ # index must start at 1
+ def __init__(self, index):
+ SfpOptoeBase.__init__(self)
+ self.sfp_type = None
+ sfp_config = baseutil.get_config().get("sfps", None)
+ self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+ # Init instance of SfpCust
+ ver = sfp_config.get("ver", None)
+ if ver is None:
+ self._sfplog(LOG_ERROR_LEVEL, "Get Ver Config Error!")
+ vers = int(float(ver))
+ if vers == 1:
+ self._sfp_api = SfpV1(index)
+ elif vers == 2:
+ self._sfp_api = SfpV2(index)
+ else:
+ self._sfplog(LOG_ERROR_LEVEL, "Get SfpVer Error!")
+
+ def get_eeprom_path(self):
+ return self._sfp_api._get_eeprom_path()
+
+ def read_eeprom(self, offset, num_bytes):
+ return self._sfp_api.read_eeprom(offset, num_bytes)
+
+ def get_presence(self):
+ return self._sfp_api.get_presence()
+
+ def get_transceiver_info(self):
+ # temporary solution for a sonic202111 bug
+ transceiver_info = super().get_transceiver_info()
+ try:
+ if transceiver_info == None:
+ return None
+ if transceiver_info['cable_type'] == None:
+ transceiver_info['cable_type'] = 'N/A'
+ if transceiver_info["vendor_rev"] is not None:
+ transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
+ except BaseException:
+ print(traceback.format_exc())
+ return None
+ return transceiver_info
+
+ def get_reset_status(self):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'SFP':
+ self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+ return False
+
+ ret = self._sfp_api.get_reset_status()
+ return ret
+
+ def reset(self):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'SFP':
+ self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+ return False
+
+ self._sfplog(LOG_DEBUG_LEVEL, 'resetting...')
+ ret = self._sfp_api.set_reset(True)
+ if ret:
+ time.sleep(0.5)
+ ret = self._sfp_api.set_reset(False)
+
+ return ret
+
+ def get_lpmode(self):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'QSFP' or self.sfp_type == 'QSFP_DD':
+ return SfpOptoeBase.get_lpmode(self)
+
+ self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+ return False
+
+ def set_lpmode(self, lpmode):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None or self._xcvr_api is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'QSFP_DD' or self.sfp_type == 'QSFP':
+ return SfpOptoeBase.set_lpmode(self, lpmode)
+
+ self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+ return False
+
+ def get_tx_disable(self):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'SFP':
+ return self._sfp_api.get_tx_disable()
+
+ return SfpOptoeBase.get_tx_disable(self)
+
+ def get_tx_disable_channel(self):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'SFP':
+ return self._sfp_api.get_tx_disable_channel()
+
+ return SfpOptoeBase.get_tx_disable_channel(self)
+
+ def tx_disable(self, tx_disable):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'SFP':
+ return self._sfp_api.set_tx_disable(tx_disable)
+
+ return SfpOptoeBase.tx_disable(self, tx_disable)
+
+ def tx_disable_channel(self, channel, disable):
+ if self.get_presence() is False:
+ return False
+
+ if self.sfp_type is None:
+ self.refresh_xcvr_api()
+
+ if self.sfp_type == 'SFP':
+ self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support tx disable channel')
+ return False
+
+ return SfpOptoeBase.tx_disable_channel(self, channel, disable)
+
+ def set_optoe_write_max(self, write_max):
+ """
+ This func is declared and implemented by SONiC but we're not supported
+ so override it as NotImplemented
+ """
+ self._sfplog(LOG_DEBUG_LEVEL, "set_optoe_write_max NotImplemented")
+
+ def refresh_xcvr_api(self):
+ """
+ Updates the XcvrApi associated with this SFP
+ """
+ self._xcvr_api = self._xcvr_api_factory.create_xcvr_api()
+ class_name = self._xcvr_api.__class__.__name__
+ optoe_type = None
+ # set sfp_type
+ if 'CmisApi' in class_name:
+ self.sfp_type = 'QSFP_DD'
+ optoe_type = self.OPTOE_DRV_TYPE3
+ elif 'Sff8472Api' in class_name:
+ self.sfp_type = 'SFP'
+ optoe_type = self.OPTOE_DRV_TYPE2
+ elif ('Sff8636Api' in class_name or 'Sff8436Api' in class_name):
+ self.sfp_type = 'QSFP'
+ optoe_type = self.OPTOE_DRV_TYPE1
+ # set optoe driver
+ if optoe_type is not None:
+ self._sfp_api.set_optoe_type(optoe_type)
+
+ def _sfplog(self, log_level, msg):
+ if log_level >= self.log_level_config:
+ try:
+ syslog.openlog("Sfp")
+ if log_level == LOG_DEBUG_LEVEL:
+ syslog.syslog(syslog.LOG_DEBUG, msg)
+ elif log_level == LOG_WARNING_LEVEL:
+ syslog.syslog(syslog.LOG_DEBUG, msg)
+ elif log_level == LOG_ERROR_LEVEL:
+ syslog.syslog(syslog.LOG_ERR, msg)
+ syslog.closelog()
+
+ except BaseException:
+ print(traceback.format_exc())
+
+
+class SfpCust():
+ def __init__(self, index):
+ self.eeprom_path = None
+ self._init_config(index)
+
+ def _init_config(self, index):
+ sfp_config = baseutil.get_config().get("sfps", None)
+ self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+ self._port_id = index
+ self.eeprom_retry_times = sfp_config.get("eeprom_retry_times", 0)
+ self.eeprom_retry_break_sec = sfp_config.get("eeprom_retry_break_sec", 0)
+
+ def _get_eeprom_path(self):
+ return self.eeprom_path or None
+
+ @abstractmethod
+ def get_presence(self):
+ pass
+
+ def read_eeprom(self, offset, num_bytes):
+ try:
+ for i in range(self.eeprom_retry_times):
+ with open(self._get_eeprom_path(), mode='rb', buffering=0) as f:
+ f.seek(offset)
+ result = f.read(num_bytes)
+ # temporary solution for a sonic202111 bug
+ if len(result) < num_bytes:
+ result = result[::-1].zfill(num_bytes)[::-1]
+ if result is not None:
+ return bytearray(result)
+ time.sleep(self.eeprom_retry_break_sec)
+ continue
+
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return None
+
+ def write_eeprom(self, offset, num_bytes, write_buffer):
+ try:
+ for i in range(self.eeprom_retry_times):
+ ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer)
+ if ret is False:
+ time.sleep(self.eeprom_retry_break_sec)
+ continue
+ break
+
+ return ret
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return False
+
+ @abstractmethod
+ def set_optoe_type(self, optoe_type):
+ pass
+
+ @abstractmethod
+ def set_reset(self, reset):
+ pass
+
+ def _convert_str_range_to_int_arr(self, range_str):
+ if not range_str:
+ return []
+
+ int_range_strs = range_str.split(',')
+ range_res = []
+ for int_range_str in int_range_strs:
+ if '-' in int_range_str:
+ range_s = int(int_range_str.split('-')[0])
+ range_e = int(int_range_str.split('-')[1]) + 1
+ else:
+ range_s = int(int_range_str)
+ range_e = int(int_range_str) + 1
+
+ range_res = range_res + list(range(range_s, range_e))
+
+ return range_res
+
+ def _sfplog(self, log_level, msg):
+ if log_level >= self.log_level_config:
+ try:
+ syslog.openlog("SfpCust")
+ if log_level == LOG_DEBUG_LEVEL:
+ syslog.syslog(syslog.LOG_DEBUG, msg)
+ elif log_level == LOG_WARNING_LEVEL:
+ syslog.syslog(syslog.LOG_DEBUG, msg)
+ elif log_level == LOG_ERROR_LEVEL:
+ syslog.syslog(syslog.LOG_ERR, msg)
+ syslog.closelog()
+
+ except BaseException:
+ print(traceback.format_exc())
+
+
+class SfpV1(SfpCust):
+ def _init_config(self, index):
+ super()._init_config(index)
+ # init presence path
+ sfp_config = baseutil.get_config().get("sfps", None)
+
+ eeprom_path_config = sfp_config.get("eeprom_path", None)
+ eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+ self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+ eeprom_path_key, eeprom_path_key)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+ self.presence_cpld = sfp_config.get("presence_cpld", None)
+ self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path")
+
+ # init reset path
+ self.reset_cpld = sfp_config.get("reset_cpld", None)
+ self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld path")
+
+ # init tx_disable path
+ self.txdis_cpld = sfp_config.get("txdis_cpld", None)
+ self.txdisable_val_is_on = sfp_config.get("txdisable_val_is_on", 0)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld tx_disable path")
+
+ def get_presence(self):
+ if self.presence_cpld is None:
+ self._sfplog(LOG_ERROR_LEVEL, "presence_cpld is None!")
+ return False
+ try:
+ dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.presence_cpld)
+ if dev_id == -1:
+ return False
+ ret, info = platform_reg_read(0, dev_id, offset, 1)
+ if (ret is False
+ or info is None):
+ return False
+ return info[0] & (1 << offset_bit) == self.presence_val_is_present
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return False
+
+ def get_reset_status(self):
+ if self.reset_cpld is None:
+ self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+ return False
+ try:
+ dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+ if dev_id == -1:
+ return False
+ ret, info = platform_reg_read(0, dev_id, offset, 1)
+ if (ret is False
+ or info is None):
+ self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+ return False
+
+ return (info[0] & (1 << offset_bit) == self.reset_val_is_reset)
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return False
+
+ def get_tx_disable(self):
+ if self.reset_cpld is None:
+ self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+ return None
+
+ try:
+ tx_disable_list = []
+ dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+ if dev_id == -1:
+ return False
+ ret, info = platform_reg_read(0, dev_id, offset, 1)
+ if (ret is False
+ or info is None):
+ self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+ return None
+ if self.txdisable_val_is_on == 1:
+ tx_disable_list.append(info[0] & (1 << offset_bit) != 0)
+ else:
+ tx_disable_list.append(info[0] & (1 << offset_bit) == 0)
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return None
+
+ return tx_disable_list
+
+ def get_tx_disable_channel(self):
+ tx_disable_list = []
+ tx_disable_list = self.get_tx_disable()
+ if tx_disable_list is None:
+ return 0
+
+ tx_disabled = 0
+ for i in range(len(tx_disable_list)):
+ if tx_disable_list[i]:
+ tx_disabled |= 1 << i
+
+ return tx_disabled
+
+ def read_eeprom(self, offset, num_bytes):
+ try:
+ for i in range(self.eeprom_retry_times):
+ ret, info = platform_sfp_read(self._port_id, offset, num_bytes)
+ if (ret is False
+ or info is None):
+ time.sleep(self.eeprom_retry_break_sec)
+ continue
+ eeprom_raw = []
+ for i in range(0, num_bytes):
+ eeprom_raw.append(0)
+ for n in range(0, len(info)):
+ eeprom_raw[n] = info[n]
+ # temporary solution for a sonic202111 bug
+ if len(eeprom_raw) < num_bytes:
+ eeprom_raw = eeprom_raw[::-1].zfill(num_bytes)[::-1]
+ return bytearray(eeprom_raw)
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return None
+
+ def set_optoe_type(self, optoe_type):
+ ret, info = platform_get_optoe_type(self._port_id)
+ if ret is True and info != optoe_type:
+ try:
+ ret, _ = platform_set_optoe_type(self._port_id, optoe_type)
+ except Exception as err:
+ self._sfplog(LOG_ERROR_LEVEL, "Set optoe err %s" % err)
+
+ def set_reset(self, reset):
+ if self.reset_cpld is None:
+ self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+ return False
+ try:
+ val = []
+ dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+ if dev_id == -1:
+ return False
+ ret, info = platform_reg_read(0, dev_id, offset, 1)
+ if (ret is False
+ or info is None):
+ self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+ return False
+
+ if self.reset_val_is_reset == 0:
+ if reset:
+ val.append(info[0] & (~(1 << offset_bit)))
+ else:
+ val.append(info[0] | (1 << offset_bit))
+ else:
+ if reset:
+ val.append(info[0] | (1 << offset_bit))
+ else:
+ val.append(info[0] & (~(1 << offset_bit)))
+
+ ret, info = platform_reg_write(0, dev_id, offset, val)
+ if ret is False:
+ self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+ return False
+
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return False
+
+ return True
+
+ def set_tx_disable(self, tx_disable):
+ if self.txdis_cpld is None:
+ self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+ return False
+ try:
+ val = []
+ dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+ if dev_id == -1:
+ return False
+ ret, info = platform_reg_read(0, dev_id, offset, 1)
+ if (ret is False
+ or info is None):
+ self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+ return False
+
+ if self.txdisable_val_is_on == 0:
+ if tx_disable:
+ val.append(info[0] & (~(1 << offset_bit)))
+ else:
+ val.append(info[0] | (1 << offset_bit))
+ else:
+ if tx_disable:
+ val.append(info[0] | (1 << offset_bit))
+ else:
+ val.append(info[0] & (~(1 << offset_bit)))
+
+ ret, info = platform_reg_write(0, dev_id, offset, val)
+ if ret is False:
+ self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+ return False
+
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return False
+
+ return True
+
+ def _get_sfp_cpld_info(self, cpld_config):
+ dev_id = -1
+ offset = -1
+ offset_bit = -1
+ for dev_id_temp in cpld_config["dev_id"]:
+ for offset_temp in cpld_config["dev_id"][dev_id_temp]["offset"]:
+ port_range_str = cpld_config["dev_id"][dev_id_temp]["offset"][offset_temp]
+ port_range_int = self._convert_str_range_to_int_arr(port_range_str)
+ if self._port_id in port_range_int:
+ dev_id = dev_id_temp
+ offset = offset_temp
+ offset_bit = port_range_int.index(self._port_id)
+ break
+
+ return dev_id, offset, offset_bit
+
+
+class SfpV2(SfpCust):
+ def _init_config(self, index):
+ super()._init_config(index)
+ # init eeprom path
+ sfp_config = baseutil.get_config().get("sfps", None)
+ eeprom_path_config = sfp_config.get("eeprom_path", None)
+ eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+ self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+ eeprom_path_key, eeprom_path_key)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+ # init presence path
+ self.presence_path = None if sfp_config.get("presence_path",
+ None) is None else sfp_config.get("presence_path") % self._port_id
+ self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path)
+
+ # init optoe driver path
+ optoe_driver_path = sfp_config.get("optoe_driver_path", None)
+ optoe_driver_key = sfp_config.get("optoe_driver_key")[self._port_id - 1]
+ self.dev_class_path = None if optoe_driver_path is None else optoe_driver_path % (
+ optoe_driver_key, optoe_driver_key)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path)
+
+ # init reset path
+ self.reset_path = None if sfp_config.get(
+ "reset_path",
+ None) is None else sfp_config.get(
+ "reset_path",
+ None) % self._port_id
+ self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+ self._sfplog(LOG_DEBUG_LEVEL, "Done init reset path: %s" % self.reset_path)
+
+ def get_presence(self):
+ if self.presence_path is None:
+ self._sfplog(LOG_ERROR_LEVEL, "presence_path is None!")
+ return False
+ try:
+ with open(self.presence_path, "rb") as data:
+ sysfs_data = data.read(1)
+ if sysfs_data != "":
+ result = int(sysfs_data, 16)
+ return result == self.presence_val_is_present
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return False
+
+ def set_reset(self, reset):
+ return True
+
+ def set_optoe_type(self, optoe_type):
+ if self.dev_class_path is None:
+ self._sfplog(LOG_ERROR_LEVEL, "dev_class_path is None!")
+ return False
+ try:
+ with open(self.dev_class_path, "r+") as dc_file:
+ dc_file_val = dc_file.read(1)
+ if int(dc_file_val) != optoe_type:
+ dc_str = "%s" % str(optoe_type)
+ dc_file.write(dc_str)
+ # dc_file.close()
+ except BaseException:
+ self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+ return False
+ return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py
new file mode 100644
index 000000000000..516c86260e7c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py
@@ -0,0 +1,282 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Thermals' information which are available in the platform
+#
+########################################################################
+
+
+try:
+ import time
+ from sonic_platform_base.thermal_base import ThermalBase
+except ImportError as e:
+ raise ImportError(str(e) + "- required module not found") from e
+
+
+class Thermal(ThermalBase):
+
+ def __init__(self, interface_obj, index):
+
+ self.restful = interface_obj
+ self.temp_id = "temp" + str(index)
+
+ def get_service_tag(self):
+ """
+ Retrieves the service tag of the device
+ Returns:
+ string: The service tag of the device
+ """
+ return 'N/A'
+
+ def get_mfr_id(self):
+ """
+ Retrieves the manufacturer's name (or ID) of the device
+ Returns:
+ string: Manufacturer's id of device
+ """
+ return 'N/A'
+
+ def get_sensor(self):
+ temp_info = {}
+ info = self.restful.get_temp_sensor_by_id(self.temp_id)
+ if info is None:
+ return None
+
+ name = info.get("alias", "N/A")
+ temp_info['alias'] = info.get('alias', "N/A")
+ temp_info['type'] = info.get('type', "N/A")
+ value = info.get('value')
+ if value is None or value in self.restful.restful_err_str:
+ temp_info['value'] = None
+ else:
+ temp_info['value'] = float(value) / 1000
+ max =info.get('max')
+ if max is None or max in self.restful.restful_err_str:
+ temp_info['max'] = None
+ else:
+ temp_info['max'] = float(max) / 1000
+ min = info.get('min')
+ if min is None or min in self.restful.restful_err_str:
+ temp_info['min'] = None
+ else:
+ temp_info['min'] = float(min) / 1000
+ return temp_info
+
+ def get_name(self):
+ """
+ Retrieves the name of the thermal
+
+ Returns:
+ string: The name of the thermal
+ """
+ temp_dict = self.get_sensor()
+ if temp_dict is None:
+ return "N/A"
+ name = temp_dict.get("alias", "N/A")
+ return name
+
+ def get_presence(self):
+ """
+ Retrieves the presence of the thermal
+
+ Returns:
+ bool: True if thermal is present, False if not
+ """
+ return True
+
+ def get_model(self):
+ """
+ Retrieves the model number (or part number) of the Thermal
+
+ Returns:
+ string: Model/part number of Thermal
+ """
+ return "N/A"
+
+ def get_serial(self):
+ """
+ Retrieves the serial number of the Thermal
+
+ Returns:
+ string: Serial number of Thermal
+ """
+ return "N/A"
+
+ def get_revision(self):
+ """
+ Retrieves the hardware revision of the device
+
+ Returns:
+ string: Revision value of device
+ """
+ return "N/A"
+
+ def get_status(self):
+ """
+ Retrieves the operational status of the thermal
+
+ Returns:
+ A boolean value, True if thermal is operating properly,
+ False if not
+ """
+ temp_dict = self.get_sensor()
+ if temp_dict is None:
+ return False
+ if temp_dict.get("value") is None or temp_dict.get("max") is None or temp_dict.get("min") is None:
+ return False
+ if (temp_dict.get("value", -1) >= temp_dict.get("max", 0)
+ ) or (temp_dict.get("value", 0) <= temp_dict.get("min", -1)):
+ return False
+
+ return True
+
+ def get_position_in_parent(self):
+ """
+ Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+ for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+ Returns:
+ integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+ """
+ return -1
+
+ def is_replaceable(self):
+ """
+ Indicate whether this device is replaceable.
+ Returns:
+ bool: True if it is replaceable.
+ """
+ return False
+
+ def get_temperature(self):
+ """
+ Retrieves current temperature reading from thermal
+
+ Returns:
+ A float number of current temperature in Celsius up to nearest thousandth
+ of one degree Celsius, e.g. 30.125
+ """
+ temp_dict = self.get_sensor()
+ if temp_dict is None:
+ return None
+ value = temp_dict.get("value", None)
+ if value is None:
+ return None
+ if value < -200:
+ return None
+ return round(float(value), 1)
+
+ def get_high_threshold(self):
+ """
+ Retrieves the high threshold temperature of thermal
+
+ Returns:
+ A float number, the high threshold temperature of thermal in Celsius
+ up to nearest thousandth of one degree Celsius, e.g. 30.125
+ """
+ temp_dict = self.get_sensor()
+ if temp_dict is None:
+ return None
+ value = temp_dict.get("max", None)
+ if value is None:
+ return None
+ return round(float(value), 1)
+
+ def get_low_threshold(self):
+ """
+ Retrieves the low threshold temperature of thermal
+
+ Returns:
+ A float number, the low threshold temperature of thermal in Celsius
+ up to nearest thousandth of one degree Celsius, e.g. 30.125
+ """
+ temp_dict = self.get_sensor()
+ if temp_dict is None:
+ return None
+ value = temp_dict.get("min", None)
+ if value is None:
+ return None
+ return round(float(value), 1)
+
+ def set_high_threshold(self, temperature):
+ """
+ Sets the high threshold temperature of thermal
+
+ Args :
+ temperature: A float number up to nearest thousandth of one degree Celsius,
+ e.g. 30.125
+
+ Returns:
+ A boolean, True if threshold is set successfully, False if not
+ """
+ # not supported
+ return False
+
+ def set_low_threshold(self, temperature):
+ """
+ Sets the low threshold temperature of thermal
+
+ Args :
+ temperature: A float number up to nearest thousandth of one degree Celsius,
+ e.g. 30.125
+
+ Returns:
+ A boolean, True if threshold is set successfully, False if not
+ """
+ # not supported
+ return False
+
+ def get_high_critical_threshold(self):
+ """
+ Retrieves the high critical threshold temperature of thermal
+
+ Returns:
+ A float number, the high critical threshold temperature of thermal in Celsius
+ up to nearest thousandth of one degree Celsius, e.g. 30.125
+ """
+ temp_dict = self.get_sensor()
+ if temp_dict is None:
+ return None
+ value = temp_dict.get("max", None)
+ if value is None:
+ return None
+ return round(float(value), 1)
+
+ def get_low_critical_threshold(self):
+ """
+ Retrieves the low critical threshold temperature of thermal
+
+ Returns:
+ A float number, the low critical threshold temperature of thermal in Celsius
+ up to nearest thousandth of one degree Celsius, e.g. 30.125
+ """
+ temp_dict = self.get_sensor()
+ if temp_dict is None:
+ return None
+ value = temp_dict.get("min", None)
+ if value is None:
+ return None
+ return round(float(value), 1)
+
+ def get_minimum_recorded(self):
+ """
+ Retrieves the minimum recorded temperature of thermal
+
+ Returns:
+ A float number, the minimum recorded temperature of thermal in Celsius
+ up to nearest thousandth of one degree Celsius, e.g. 30.125
+ """
+ # not supported
+ return False
+
+ def get_maximum_recorded(self):
+ """
+ Retrieves the maximum recorded temperature of thermal
+
+ Returns:
+ A float number, the maximum recorded temperature of thermal in Celsius
+ up to nearest thousandth of one degree Celsius, e.g. 30.125
+ """
+ # not supported
+ return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..948337f47a9a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py
@@ -0,0 +1,236 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+#
+# Abstract base class for implementing a platform-specific class with
+# which to interact with a hardware watchdog module in SONiC
+#
+########################################################################
+
+import fcntl
+import os
+import array
+
+try:
+ from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as error:
+ raise ImportError(str(error) + "- required module not found") from error
+
+
+# ioctl constants
+IO_WRITE = 0x40000000
+IO_READ = 0x80000000
+IO_READ_WRITE = 0xC0000000
+IO_SIZE_INT = 0x00040000
+IO_SIZE_40 = 0x00280000
+IO_TYPE_WATCHDOG = ord('W') << 8
+
+WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG
+WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG
+WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG
+
+# Watchdog ioctl command
+WDIOC_GETSUPPORT = 0 | WDR_40
+WDIOC_GETSTATUS = 1 | WDR_INT
+WDIOC_GETBOOTSTATUS = 2 | WDR_INT
+WDIOC_GETTEMP = 3 | WDR_INT
+WDIOC_SETOPTIONS = 4 | WDR_INT
+WDIOC_KEEPALIVE = 5 | WDR_INT
+WDIOC_SETTIMEOUT = 6 | WDWR_INT
+WDIOC_GETTIMEOUT = 7 | WDR_INT
+WDIOC_SETPRETIMEOUT = 8 | WDWR_INT
+WDIOC_GETPRETIMEOUT = 9 | WDR_INT
+WDIOC_GETTIMELEFT = 10 | WDR_INT
+
+# Watchdog status constants
+WDIOS_DISABLECARD = 0x0001
+WDIOS_ENABLECARD = 0x0002
+
+WDT_COMMON_ERROR = -1
+WDT_IDENTITY = "CPLD Watchdog"
+WDT_SYSFS_PATH = "/sys/class/watchdog/"
+
+DEFAULT_TIMEOUT = 180
+
+
+class Watchdog(WatchdogBase):
+ """
+ Abstract base class for interfacing with a hardware watchdog module
+ """
+
+ def __init__(self):
+ self.watchdog, self.wdt_main_dev_name = self._get_wdt()
+ self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name
+ self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name
+ self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name
+ # Set default value
+ self._disable()
+ self.armed = False
+ self.timeout = self._gettimeout()
+
+ def _is_wd_main(self, dev):
+ """
+ Checks watchdog identity
+ """
+ identity = self._read_file(
+ "{}/{}/identity".format(WDT_SYSFS_PATH, dev))
+ return identity == WDT_IDENTITY
+
+ def _get_wdt(self):
+ """
+ Retrieves watchdog device
+ """
+ wdt_main_dev_list = [dev for dev in os.listdir(
+ "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)]
+ if not wdt_main_dev_list:
+ return None
+ wdt_main_dev_name = wdt_main_dev_list[0]
+ watchdog_device_path = "/dev/{}".format(wdt_main_dev_name)
+ watchdog = os.open(watchdog_device_path, os.O_RDWR)
+ return watchdog, wdt_main_dev_name
+
+ def _read_file(self, file_path):
+ """
+ Read text file
+ """
+ try:
+ with open(file_path, "r") as fd:
+ txt = fd.read()
+ except IOError:
+ return WDT_COMMON_ERROR
+ return txt.strip()
+
+ def _enable(self):
+ """
+ Turn on the watchdog timer
+ """
+ req = array.array('h', [WDIOS_ENABLECARD])
+ fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+ def _disable(self):
+ """
+ Turn off the watchdog timer
+ """
+ req = array.array('h', [WDIOS_DISABLECARD])
+ fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+ def _keepalive(self):
+ """
+ Keep alive watchdog timer
+ """
+ fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE)
+
+ def _settimeout(self, seconds):
+ """
+ Set watchdog timer timeout
+ @param seconds - timeout in seconds
+ @return is the actual set timeout
+ """
+ req = array.array('I', [seconds])
+ fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True)
+ return int(req[0])
+
+ def _gettimeout(self):
+ """
+ Get watchdog timeout
+ @return watchdog timeout
+ """
+ req = array.array('I', [0])
+ fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True)
+
+ return int(req[0])
+
+ def _gettimeleft(self):
+ """
+ Get time left before watchdog timer expires
+ @return time left in seconds
+ """
+ req = array.array('I', [0])
+ fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True)
+
+ return int(req[0])
+
+ def arm(self, seconds):
+ """
+ Arm the hardware watchdog with a timeout of seconds.
+ If the watchdog is currently armed, calling this function will
+ simply reset the timer to the provided value. If the underlying
+ hardware does not support the value provided in , this
+ method should arm the watchdog with the *next greater* available
+ value.
+
+ Returns:
+ An integer specifying the *actual* number of seconds the watchdog
+ was armed with. On failure returns -1.
+ """
+ ret = WDT_COMMON_ERROR
+ if seconds < 0:
+ return ret
+
+ try:
+ if self.timeout != seconds:
+ self.timeout = self._settimeout(seconds)
+ if self.armed:
+ self._keepalive()
+ else:
+ self._settimeout(seconds)
+ self._enable()
+ self.armed = True
+ ret = self.timeout
+ except IOError:
+ pass
+
+ return ret
+
+ def disarm(self):
+ """
+ Disarm the hardware watchdog
+
+ Returns:
+ A boolean, True if watchdog is disarmed successfully, False if not
+ """
+ disarmed = False
+ if self.is_armed():
+ try:
+ self._disable()
+ self.armed = False
+ disarmed = True
+ except IOError:
+ pass
+
+ return disarmed
+
+ def is_armed(self):
+ """
+ Retrieves the armed state of the hardware watchdog.
+
+ Returns:
+ A boolean, True if watchdog is armed, False if not
+ """
+ return self.armed
+
+ def get_remaining_time(self):
+ """
+ If the watchdog is armed, retrieve the number of seconds remaining on
+ the watchdog timer
+
+ Returns:
+ An integer specifying the number of seconds remaining on thei
+ watchdog timer. If the watchdog is not armed, returns -1.
+ """
+ timeleft = WDT_COMMON_ERROR
+
+ if self.armed:
+ try:
+ timeleft = self._gettimeleft()
+ except IOError:
+ pass
+
+ return timeleft
+
+ def __del__(self):
+ """
+ Close watchdog
+ """
+ os.close(self.watchdog)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile
new file mode 100755
index 000000000000..3039a7f85903
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile
@@ -0,0 +1,28 @@
+PWD = $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg
+INSTALL_S3IP_CONFIG_DIR = $(SUB_BUILD_DIR)/etc/s3ip
+
+all:
+ $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+ @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+ cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+ @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+ cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR)
+ @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+ @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+ @if [ ! -d ${INSTALL_S3IP_CONFIG_DIR} ]; then mkdir -p ${INSTALL_S3IP_CONFIG_DIR} ;fi
+ @if [ -d $(PWD)/s3ip_config/ ]; then cp -r $(PWD)/s3ip_config/* ${INSTALL_S3IP_CONFIG_DIR} ;fi
+ @if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi
+ @if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi
+clean:
+ rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd ${DIR_KERNEL_SRC}/*.mod
+ rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+ rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+ rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py
new file mode 100644
index 000000000000..0f2b3bb581e7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py
@@ -0,0 +1,1644 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+ "hal_fanctrl": 1,
+ "hal_ledctrl": 1,
+ "avscontrol": 0,
+ "tty_console": 1,
+ "dev_monitor": 1,
+ "pmon_syslog": 1,
+ "sff_temp_polling": 1,
+ "reboot_cause": 1,
+}
+
+DEV_MONITOR_PARAM = {
+ "polling_time": 10,
+ "psus": [
+ {
+ "name": "psu1",
+ "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 2, "okval": 0},
+ "device": [
+ {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 42, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu1frue2", "name": "24c02", "bus": 42, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "psu2",
+ "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 6, "okval": 0},
+ "device": [
+ {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 43, "loc": 0x58, "attr": "hwmon"},
+ {"id": "psu2frue2", "name": "24c02", "bus": 43, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "fans": [
+ {
+ "name": "fan1",
+ "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 0, "okval": 0},
+ "device": [
+ {"id": "fan1frue2", "name": "24c64", "bus": 52, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan2",
+ "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 1, "okval": 0},
+ "device": [
+ {"id": "fan2frue2", "name": "24c64", "bus": 53, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan3",
+ "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 2, "okval": 0},
+ "device": [
+ {"id": "fan3frue2", "name": "24c64", "bus": 54, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "fan4",
+ "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 3, "okval": 0},
+ "device": [
+ {"id": "fan4frue2", "name": "24c64", "bus": 55, "loc": 0x50, "attr": "eeprom"},
+ ],
+ },
+ ],
+ "others": [
+ {
+ "name": "eeprom",
+ "device": [
+ {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"},
+ ],
+ },
+ {
+ "name": "lm75",
+ "device": [
+ {"id": "lm75_1", "name": "lm75", "bus": 51, "loc": 0x4b, "attr": "hwmon"},
+ {"id": "lm75_2", "name": "lm75", "bus": 56, "loc": 0x4e, "attr": "hwmon"},
+ {"id": "lm75_3", "name": "lm75", "bus": 58, "loc": 0x4b, "attr": "hwmon"},
+ {"id": "lm75_4", "name": "lm75", "bus": 75, "loc": 0x4b, "attr": "hwmon"},
+ {"id": "lm75_5", "name": "lm75", "bus": 76, "loc": 0x4f, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name":"ct7318",
+ "device":[
+ {"id":"ct7318_1", "name":"ct7318","bus":77, "loc":0x4c, "attr":"hwmon"},
+ {"id":"ct7318_2", "name":"ct7318","bus":78, "loc":0x4c, "attr":"hwmon"},
+ ],
+ },
+ {
+ "name": "ucd90160",
+ "device": [
+ {"id": "ucd90160_1", "name": "ucd90160", "bus": 68, "loc": 0x5b, "attr": "hwmon"},
+ {"id": "ucd90160_2", "name": "ucd90160", "bus": 69, "loc": 0x5f, "attr": "hwmon"},
+ {"id": "ucd90160_3", "name": "ucd90160", "bus": 82, "loc": 0x5b, "attr": "hwmon"},
+ {"id": "ucd90160_4", "name": "ucd90160", "bus": 83, "loc": 0x5b, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "ucd9081",
+ "device": [
+ {"id": "wb_ucd9081_1", "name": "wb_ucd9081", "bus": 72, "loc": 0x68, "attr": "hwmon"},
+ ],
+ },
+ {
+ "name": "xdpe12284",
+ "device": [
+ {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 90, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 91, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_3", "name": "xdpe12284", "bus": 92, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_4", "name": "xdpe12284", "bus": 93, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_5", "name": "xdpe12284", "bus": 94, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_6", "name": "xdpe12284", "bus": 95, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_7", "name": "xdpe12284", "bus": 96, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_8", "name": "xdpe12284", "bus": 97, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_9", "name": "xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"},
+ {"id": "xdpe12284_10", "name": "xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"},
+ {"id": "xdpe12284_11", "name": "xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"},
+ {"id": "xdpe12284_12", "name": "xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"},
+ ],
+ },
+ ],
+}
+
+MANUINFO_CONF = {
+ "bios": {
+ "key": "BIOS",
+ "head": True,
+ "next": "onie"
+ },
+ "bios_vendor": {
+ "parent": "bios",
+ "key": "Vendor",
+ "cmd": "dmidecode -t 0 |grep Vendor",
+ "pattern": r".*Vendor",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "bios_version": {
+ "parent": "bios",
+ "key": "Version",
+ "cmd": "dmidecode -t 0 |grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "bios_date": {
+ "parent": "bios",
+ "key": "Release Date",
+ "cmd": "dmidecode -t 0 |grep Release",
+ "pattern": r".*Release Date",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "onie": {
+ "key": "ONIE",
+ "next": "cpu"
+ },
+ "onie_date": {
+ "parent": "onie",
+ "key": "Build Date",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_build_date",
+ "separator": "=",
+ "arrt_index": 1,
+ },
+ "onie_version": {
+ "parent": "onie",
+ "key": "Version",
+ "file": "/host/machine.conf",
+ "pattern": r"^onie_version",
+ "separator": "=",
+ "arrt_index": 2,
+ },
+
+ "cpu": {
+ "key": "CPU",
+ "next": "ssd"
+ },
+ "cpu_vendor": {
+ "parent": "cpu",
+ "key": "Vendor",
+ "cmd": "dmidecode --type processor |grep Manufacturer",
+ "pattern": r".*Manufacturer",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "cpu_model": {
+ "parent": "cpu",
+ "key": "Device Model",
+ "cmd": "dmidecode --type processor | grep Version",
+ "pattern": r".*Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "cpu_core": {
+ "parent": "cpu",
+ "key": "Core Count",
+ "cmd": "dmidecode --type processor | grep \"Core Count\"",
+ "pattern": r".*Core Count",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+ "cpu_thread": {
+ "parent": "cpu",
+ "key": "Thread Count",
+ "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+ "pattern": r".*Thread Count",
+ "separator": ":",
+ "arrt_index": 4,
+ },
+ "ssd": {
+ "key": "SSD",
+ "next": "cpld"
+ },
+ "ssd_model": {
+ "parent": "ssd",
+ "key": "Device Model",
+ "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+ "pattern": r".*Device Model",
+ "separator": ":",
+ "arrt_index": 1,
+ },
+ "ssd_fw": {
+ "parent": "ssd",
+ "key": "Firmware Version",
+ "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+ "pattern": r".*Firmware Version",
+ "separator": ":",
+ "arrt_index": 2,
+ },
+ "ssd_user_cap": {
+ "parent": "ssd",
+ "key": "User Capacity",
+ "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+ "pattern": r".*User Capacity",
+ "separator": ":",
+ "arrt_index": 3,
+ },
+
+ "cpld": {
+ "key": "CPLD",
+ "next": "psu"
+ },
+
+ "cpld1": {
+ "key": "CPLD1",
+ "parent": "cpld",
+ "arrt_index": 1,
+ },
+ "cpld1_model": {
+ "key": "Device Model",
+ "parent": "cpld1",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld1_vender": {
+ "key": "Vendor",
+ "parent": "cpld1",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld1_desc": {
+ "key": "Description",
+ "parent": "cpld1",
+ "config": "CPU_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld1_version": {
+ "key": "Firmware Version",
+ "parent": "cpld1",
+ "devfile": {
+ "loc": "/dev/cpld0",
+ "offset":0,
+ "len":4,
+ "bit_width":1
+ },
+ "arrt_index": 4,
+ },
+ "cpld2": {
+ "key": "CPLD2",
+ "parent": "cpld",
+ "arrt_index": 2,
+ },
+ "cpld2_model": {
+ "key": "Device Model",
+ "parent": "cpld2",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld2_vender": {
+ "key": "Vendor",
+ "parent": "cpld2",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld2_desc": {
+ "key": "Description",
+ "parent": "cpld2",
+ "config": "CONNECT_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld2_version": {
+ "key": "Firmware Version",
+ "parent": "cpld2",
+ "devfile": {
+ "loc": "/dev/cpld1",
+ "offset":0,
+ "len":4,
+ "bit_width":1
+ },
+ "arrt_index": 4,
+ },
+
+ "cpld3": {
+ "key": "CPLD3",
+ "parent": "cpld",
+ "arrt_index": 3,
+ },
+ "cpld3_model": {
+ "key": "Device Model",
+ "parent": "cpld3",
+ "config": "LCMXO3LF-4300C-6BG256C",
+ "arrt_index": 1,
+ },
+ "cpld3_vender": {
+ "key": "Vendor",
+ "parent": "cpld3",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld3_desc": {
+ "key": "Description",
+ "parent": "cpld3",
+ "config": "MAC_CPLDA",
+ "arrt_index": 3,
+ },
+ "cpld3_version": {
+ "key": "Firmware Version",
+ "parent": "cpld3",
+ "devfile": {
+ "loc": "/dev/cpld6",
+ "offset":0,
+ "len":4,
+ "bit_width":1
+ },
+ "arrt_index": 4,
+ },
+
+ "cpld4": {
+ "key": "CPLD4",
+ "parent": "cpld",
+ "arrt_index": 4,
+ },
+ "cpld4_model": {
+ "key": "Device Model",
+ "parent": "cpld4",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld4_vender": {
+ "key": "Vendor",
+ "parent": "cpld4",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld4_desc": {
+ "key": "Description",
+ "parent": "cpld4",
+ "config": "MAC_CPLDB",
+ "arrt_index": 3,
+ },
+ "cpld4_version": {
+ "key": "Firmware Version",
+ "parent": "cpld4",
+ "devfile": {
+ "loc": "/dev/cpld7",
+ "offset":0,
+ "len":4,
+ "bit_width":1
+ },
+ "arrt_index": 4,
+ },
+
+ "cpld5": {
+ "key": "CPLD5",
+ "parent": "cpld",
+ "arrt_index": 5,
+ },
+ "cpld5_model": {
+ "key": "Device Model",
+ "parent": "cpld5",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld5_vender": {
+ "key": "Vendor",
+ "parent": "cpld5",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld5_desc": {
+ "key": "Description",
+ "parent": "cpld5",
+ "config": "MAC_CPLDC",
+ "arrt_index": 3,
+ },
+ "cpld5_version": {
+ "key": "Firmware Version",
+ "parent": "cpld5",
+ "devfile": {
+ "loc": "/dev/cpld8",
+ "offset":0,
+ "len":4,
+ "bit_width":1
+ },
+ "arrt_index": 4,
+ },
+
+ "cpld6": {
+ "key": "CPLD6",
+ "parent": "cpld",
+ "arrt_index": 6,
+ },
+ "cpld6_model": {
+ "key": "Device Model",
+ "parent": "cpld6",
+ "config": "LCMXO3LF-4300C-6BG324I",
+ "arrt_index": 1,
+ },
+ "cpld6_vender": {
+ "key": "Vendor",
+ "parent": "cpld6",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld6_desc": {
+ "key": "Description",
+ "parent": "cpld6",
+ "config": "MGMT_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld6_version": {
+ "key": "Firmware Version",
+ "parent": "cpld6",
+ "devfile": {
+ "loc": "/dev/cpld9",
+ "offset":0,
+ "len":4,
+ "bit_width":1
+ },
+ "arrt_index": 4,
+ },
+
+ "cpld7": {
+ "key": "CPLD7",
+ "parent": "cpld",
+ "arrt_index": 7,
+ },
+ "cpld7_model": {
+ "key": "Device Model",
+ "parent": "cpld7",
+ "config": "LCMXO3LF-2100C-5BG256C",
+ "arrt_index": 1,
+ },
+ "cpld7_vender": {
+ "key": "Vendor",
+ "parent": "cpld7",
+ "config": "LATTICE",
+ "arrt_index": 2,
+ },
+ "cpld7_desc": {
+ "key": "Description",
+ "parent": "cpld7",
+ "config": "FAN_CPLD",
+ "arrt_index": 3,
+ },
+ "cpld7_version": {
+ "key": "Firmware Version",
+ "parent": "cpld7",
+ "devfile": {
+ "loc": "/dev/cpld10",
+ "offset":0,
+ "len":4,
+ "bit_width":1
+ },
+ "arrt_index": 4,
+ },
+
+ "psu": {
+ "key": "PSU",
+ "next": "fan"
+ },
+
+ "psu1": {
+ "parent": "psu",
+ "key": "PSU1",
+ "arrt_index": 1,
+ },
+ "psu1_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu1",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu1",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu1_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu1",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "psu2": {
+ "parent": "psu",
+ "key": "PSU2",
+ "arrt_index": 2,
+ },
+ "psu2_hw_version": {
+ "key": "Hardware Version",
+ "parent": "psu2",
+ "extra": {
+ "funcname": "getPsu",
+ "id": "psu2",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "psu2_fw_version": {
+ "key": "Firmware Version",
+ "parent": "psu2",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan": {
+ "key": "FAN",
+ "next": "i210"
+ },
+ "fan1": {
+ "key": "FAN1",
+ "parent": "fan",
+ "arrt_index": 1,
+ },
+ "fan1_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan1",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan1",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan1_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan1",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan2": {
+ "key": "FAN2",
+ "parent": "fan",
+ "arrt_index": 2,
+ },
+ "fan2_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan2",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan2",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan2_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan2",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan3": {
+ "key": "FAN3",
+ "parent": "fan",
+ "arrt_index": 3,
+ },
+ "fan3_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan3",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan3",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan3_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan3",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "fan4": {
+ "key": "FAN4",
+ "parent": "fan",
+ "arrt_index": 4,
+ },
+ "fan4_hw_version": {
+ "key": "Hardware Version",
+ "parent": "fan4",
+ "extra": {
+ "funcname": "checkFan",
+ "id": "fan4",
+ "key": "hw_version"
+ },
+ "arrt_index": 1,
+ },
+ "fan4_fw_version": {
+ "key": "Firmware Version",
+ "parent": "fan4",
+ "config": "NA",
+ "arrt_index": 2,
+ },
+
+ "i210": {
+ "key": "NIC",
+ "next": "fpga"
+ },
+ "i210_model": {
+ "parent": "i210",
+ "config": "NA",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "i210_vendor": {
+ "parent": "i210",
+ "config": "INTEL",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "i210_version": {
+ "parent": "i210",
+ "cmd": "ethtool -i eth0",
+ "pattern": r"firmware-version",
+ "separator": ":",
+ "key": "Firmware Version",
+ "arrt_index": 3,
+ },
+
+ "fpga": {
+ "key": "FPGA",
+ },
+
+ "fpga1": {
+ "key": "FPGA1",
+ "parent": "fpga",
+ "arrt_index": 1,
+ },
+ "fpga1_model": {
+ "parent": "fpga1",
+ "config": "XC7A50T-2FGG484I",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "fpga1_vender": {
+ "parent": "fpga1",
+ "config": "XILINX",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "fpga1_desc": {
+ "key": "Description",
+ "parent": "fpga1",
+ "config": "MAC_FPGA",
+ "arrt_index": 3,
+ },
+ "fpga1_hw_version": {
+ "parent": "fpga1",
+ "config": "NA",
+ "key": "Hardware Version",
+ "arrt_index": 4,
+ },
+ "fpga1_fw_version": {
+ "parent": "fpga1",
+ "pci": {
+ "bus": 6,
+ "slot": 0,
+ "fn": 0,
+ "bar": 0,
+ "offset": 0
+ },
+ "key": "Firmware Version",
+ "arrt_index": 5,
+ },
+ "fpga1_date": {
+ "parent": "fpga1",
+ "pci": {
+ "bus": 6,
+ "slot": 0,
+ "fn": 0,
+ "bar": 0,
+ "offset": 4
+ },
+ "key": "Build Date",
+ "arrt_index": 6,
+ },
+
+ "others": {
+ "key": "OTHERS",
+ },
+ "53134": {
+ "parent": "others",
+ "key": "CPU-BMC-SWITCH",
+ "arrt_index": 1,
+ },
+ "53134_model": {
+ "parent": "53134",
+ "config": "BCM53134O",
+ "key": "Device Model",
+ "arrt_index": 1,
+ },
+ "53134_vendor": {
+ "parent": "53134",
+ "config": "Broadcom",
+ "key": "Vendor",
+ "arrt_index": 2,
+ },
+ "53134_hw_version": {
+ "parent": "53134",
+ "key": "Hardware Version",
+ "func": {
+ "funcname": "get_bcm5387_version",
+ "params": {
+ "before": [
+ # OE high
+ {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/export"},
+ {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio323/direction"},
+ # SEL1 high
+ {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/export"},
+ {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio324/direction"},
+ #enable 53134 update
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x01},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x06},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=55 mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00"},
+ {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46"},
+ ],
+ "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
+ "after": [
+ {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio324/value"},
+ {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/unexport"},
+ {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio323/value"},
+ {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/unexport"},
+ ],
+ "finally": [
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"},
+ {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x00},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x00},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01},
+ ],
+ },
+ },
+ "arrt_index": 3,
+ },
+}
+
+PMON_SYSLOG_STATUS = {
+ "polling_time": 3,
+ "sffs": {
+ "present": {"path": ["/sys/s3ip/transceiver/*/present"], "ABSENT": 0},
+ "nochangedmsgflag": 0,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 1,
+ "alias": {
+ "sff1": "Ethernet1",
+ "sff2": "Ethernet2",
+ "sff3": "Ethernet3",
+ "sff4": "Ethernet4",
+ "sff5": "Ethernet5",
+ "sff6": "Ethernet6",
+ "sff7": "Ethernet7",
+ "sff8": "Ethernet8",
+ "sff9": "Ethernet9",
+ "sff10": "Ethernet10",
+ "sff11": "Ethernet11",
+ "sff12": "Ethernet12",
+ "sff13": "Ethernet13",
+ "sff14": "Ethernet14",
+ "sff15": "Ethernet15",
+ "sff16": "Ethernet16",
+ "sff17": "Ethernet17",
+ "sff18": "Ethernet18",
+ "sff19": "Ethernet19",
+ "sff20": "Ethernet20",
+ "sff21": "Ethernet21",
+ "sff22": "Ethernet22",
+ "sff23": "Ethernet23",
+ "sff24": "Ethernet24",
+ "sff25": "Ethernet25",
+ "sff26": "Ethernet26",
+ "sff27": "Ethernet27",
+ "sff28": "Ethernet28",
+ "sff29": "Ethernet29",
+ "sff30": "Ethernet30",
+ "sff31": "Ethernet31",
+ "sff32": "Ethernet32",
+ "sff33": "Ethernet33",
+ "sff34": "Ethernet34",
+ "sff35": "Ethernet35",
+ "sff36": "Ethernet36",
+ "sff37": "Ethernet37",
+ "sff38": "Ethernet38",
+ "sff39": "Ethernet39",
+ "sff40": "Ethernet40",
+ "sff41": "Ethernet41",
+ "sff42": "Ethernet42",
+ "sff43": "Ethernet43",
+ "sff44": "Ethernet44",
+ "sff45": "Ethernet45",
+ "sff46": "Ethernet46",
+ "sff47": "Ethernet47",
+ "sff48": "Ethernet48",
+ "sff49": "Ethernet49",
+ "sff50": "Ethernet50",
+ "sff51": "Ethernet51",
+ "sff52": "Ethernet52",
+ "sff53": "Ethernet53",
+ "sff54": "Ethernet54",
+ "sff55": "Ethernet55",
+ "sff56": "Ethernet56",
+ "sff57": "Ethernet57",
+ "sff58": "Ethernet58",
+ "sff59": "Ethernet59",
+ "sff60": "Ethernet60",
+ "sff61": "Ethernet61",
+ "sff62": "Ethernet62",
+ "sff63": "Ethernet63",
+ "sff64": "Ethernet64",
+ "sff65": "Ethernet65",
+ "sff66": "Ethernet66",
+ }
+ },
+ "fans": {
+ "present": {"path": ["/sys/s3ip/fan/*/status"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/s3ip/fan/%s/status", 'okval': 1},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "fan1": "FAN1",
+ "fan2": "FAN2",
+ "fan3": "FAN3",
+ "fan4": "FAN4"
+ }
+ },
+ "psus": {
+ "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0},
+ "status": [
+ {"path": "/sys/s3ip/psu/%s/out_status", "okval":1},
+ ],
+ "nochangedmsgflag": 1,
+ "nochangedmsgtime": 60,
+ "noprintfirsttimeflag": 0,
+ "alias": {
+ "psu1": "PSU1",
+ "psu2": "PSU2"
+ }
+ }
+}
+
+REBOOT_CTRL_PARAM = {
+ "cpu": {"path":"/dev/cpld1", "offset":0x17, "rst_val":0xfd, "rst_delay":0, "gettype":"devfile"},
+ "mac": [
+ {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0050", "rst_delay":0.1},
+ {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x00, "rst_delay":1, "gettype": "devfile"},
+ {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x01, "rst_delay":0, "gettype": "devfile"},
+ {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0060", "rst_delay":0.1},
+ ],
+ "phy": {"path":"/dev/cpld1", "offset":0x18, "rst_val":0x1e, "rst_delay":0, "gettype":"devfile"},
+ "power": [
+ {"bus": 42, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"},
+ {"bus": 42, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"},
+ {"bus": 43, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"},
+ {"bus": 43, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"},
+ ],
+
+}
+
+REBOOT_CAUSE_PARA = {
+ "reboot_cause_list": [
+ {
+ "name": "cold_reboot",
+ "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x09},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ]
+ },
+ {
+ "name": "wdt_reboot",
+ "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x05},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ },
+ {
+ "name": "bmc_reboot",
+ "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x06},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ },
+ {
+ "name": "cpu_reboot",
+ "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x03, 0x04]},
+ "record": [
+ {"record_type":"file", "mode":"cover", "log":"CPU reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "CPU reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ },
+ {
+ "name": "bmc_powerdown",
+ "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x02, 0x07, 0x0a]},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ },
+ {
+ "name": "otp_switch_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+ ]
+ },
+ {
+ "name": "otp_other_reboot",
+ "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+ "record": [
+ {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+ "finish_operation": [
+ {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+ ]
+ },
+ ],
+ "other_reboot_cause_record": [
+ {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+ {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+ ],
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+ {
+ "name": "mac_core", # AVS name
+ "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+ "default": 0x82, # default value, if rov value not in range
+ "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK
+ "cpld_avs": {"path": "/dev/cpld6", "offset": 0x30, "read_len": 1, "gettype": "devfile"},
+ "set_avs": {
+ "loc": "/sys/bus/i2c/devices/84-0040/avs0_vout_command", "gettype": "sysfs", "formula": None},
+ "mac_avs_param": {
+ 0x92: 0xBF4,
+ 0x90: 0xC29,
+ 0x8e: 0xC56,
+ 0x8c: 0xC8B,
+ 0x8a: 0xCBD,
+ 0x88: 0xCEA,
+ 0x86: 0xD14,
+ 0x84: 0xD44,
+ 0x82: 0xD71
+ }
+ }
+]
+
+DRIVERLISTS = [
+ {"name": "i2c_i801", "delay": 1},
+ {"name": "i2c_dev", "delay": 0},
+ {"name": "i2c_algo_bit", "delay": 0},
+ {"name": "i2c_gpio", "delay": 0},
+ {"name": "i2c_mux", "delay": 0},
+ {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0},
+ {"name": "platform_common dfd_my_type=0x40d7", "delay": 0},
+ {"name": "wb_fpga_pcie", "delay": 0},
+ {"name": "wb_pcie_dev", "delay": 0},
+ {"name": "wb_pcie_dev_device", "delay": 0},
+ {"name": "wb_io_dev", "delay": 0},
+ {"name": "wb_io_dev_device", "delay": 0},
+ {"name": "wb_indirect_dev", "delay": 0},
+ {"name": "wb_indirect_dev_device", "delay": 0},
+ {"name": "wb_i2c_dev", "delay": 0},
+ {"name": "wb_spi_dev", "delay": 0},
+ {"name": "wb_fpga_i2c_bus_drv", "delay": 0},
+ {"name": "wb_fpga_i2c_bus_device", "delay": 0},
+ {"name": "wb_i2c_mux_pca9641", "delay": 0},
+ {"name": "wb_i2c_mux_pca954x", "delay": 0},
+ {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+ {"name": "wb_fpga_pca954x_drv", "delay": 0},
+ {"name": "wb_fpga_pca954x_device", "delay": 0},
+ {"name": "wb_i2c_dev_device", "delay": 0},
+ {"name": "mdio_bitbang", "delay": 0},
+ {"name": "mdio_gpio", "delay": 0},
+ {"name": "wb_mdio_gpio_device gpio_mdc=69 gpio_mdio=70 gpio_chip_name=INTC3001:00", "delay": 0},
+ {"name": "wb_wdt", "delay": 0},
+ {"name": "wb_wdt_device", "delay": 0},
+ {"name": "lm75", "delay": 0},
+ {"name": "tmp401", "delay": 0},
+ {"name": "ct7148", "delay": 0},
+ {"name": "optoe", "delay": 0},
+ {"name": "at24", "delay": 0},
+ {"name": "pmbus_core", "delay": 0},
+ {"name": "wb_csu550", "delay": 0},
+ {"name": "ina3221", "delay": 0},
+ {"name": "tps53679", "delay": 0},
+ {"name": "ucd9000", "delay": 0},
+ {"name": "wb_ucd9081", "delay": 0},
+ {"name": "xdpe12284", "delay": 0},
+ {"name": "wb_xdpe132g5c_pmbus", "delay":0},
+ {"name": "wb_xdpe132g5c", "delay": 0},
+ {"name": "plat_dfd", "delay": 0},
+ {"name": "plat_switch", "delay": 0},
+ {"name": "plat_fan", "delay": 0},
+ {"name": "plat_psu", "delay": 0},
+ {"name": "plat_sff", "delay": 0},
+ {"name": "hw_test", "delay": 0},
+
+ {"name": "s3ip_sysfs", "delay": 0},
+ {"name": "wb_switch_driver", "delay": 0},
+ {"name": "syseeprom_device_driver", "delay": 0},
+ {"name": "fan_device_driver", "delay": 0},
+ {"name": "cpld_device_driver", "delay": 0},
+ {"name": "sysled_device_driver", "delay": 0},
+ {"name": "psu_device_driver", "delay": 0},
+ {"name": "transceiver_device_driver", "delay": 0},
+ {"name": "temp_sensor_device_driver", "delay": 0},
+ {"name": "vol_sensor_device_driver", "delay": 0},
+ {"name": "curr_sensor_device_driver", "delay": 0},
+ {"name": "fpga_device_driver", "delay": 0},
+ {"name": "watchdog_device_driver", "delay": 0},
+]
+
+DEVICE = [
+ {"name": "24c02", "bus": 1, "loc": 0x56},
+ {"name": "24c02", "bus": 57, "loc": 0x57},
+ {"name": "24c02", "bus": 61, "loc": 0x57},
+ {"name": "24c02", "bus": 66, "loc": 0x57},
+ # fan
+ {"name": "24c64", "bus": 52, "loc": 0x50},
+ {"name": "24c64", "bus": 53, "loc": 0x50},
+ {"name": "24c64", "bus": 54, "loc": 0x50},
+ {"name": "24c64", "bus": 55, "loc": 0x50},
+ # psu
+ {"name": "24c02", "bus": 42, "loc": 0x50},
+ {"name": "wb_fsp1200", "bus": 42, "loc": 0x58},
+ {"name": "24c02", "bus": 43, "loc": 0x50},
+ {"name": "wb_fsp1200", "bus": 43, "loc": 0x58},
+ # temp
+ {"name": "lm75", "bus": 51, "loc": 0x4b},
+ {"name": "lm75", "bus": 56, "loc": 0x4e},
+ {"name": "lm75", "bus": 58, "loc": 0x4b},
+ {"name": "lm75", "bus": 75, "loc": 0x4b},
+ {"name": "lm75", "bus": 76, "loc": 0x4f},
+ {"name": "ct7318", "bus": 77, "loc": 0x4c},
+ {"name": "ct7318", "bus": 78, "loc": 0x4c},
+ #dcdc
+ {"name": "ucd90160", "bus": 68, "loc": 0x5b},
+ {"name": "ucd90160", "bus": 69, "loc": 0x5f},
+ {"name": "xdpe12284", "bus": 69, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 69, "loc": 0x6e},
+ {"name": "xdpe12284", "bus": 69, "loc": 0x5e},
+ {"name": "xdpe12284", "bus": 69, "loc": 0x68},
+ {"name": "wb_ucd9081", "bus": 72, "loc": 0x68},
+ {"name": "wb_ucd90160", "bus": 82, "loc": 0x5b},
+ {"name": "wb_ucd90160", "bus": 83, "loc": 0x5b},
+ {"name": "xdpe12284", "bus": 90, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 91, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 92, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 93, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 94, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 95, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 96, "loc": 0x70},
+ {"name": "xdpe12284", "bus": 97, "loc": 0x70},
+ #avs
+ {"name": "wb_xdpe132g5c_pmbus", "bus": 84, "loc": 0x40},
+ {"name": "wb_xdpe132g5c", "bus": 84, "loc": 0x10},
+ {"name": "wb_xdpe132g5c_pmbus", "bus": 85, "loc": 0x4d},
+ {"name": "wb_xdpe132g5c", "bus": 85, "loc": 0x1d},
+ {"name": "wb_xdpe132g5c_pmbus", "bus": 86, "loc": 0x4d},
+ {"name": "wb_xdpe132g5c", "bus": 86, "loc": 0x1d},
+]
+
+OPTOE = [
+ {"name": "optoe2", "startbus": 59, "endbus": 60},
+ {"name": "optoe3", "startbus": 106, "endbus": 169},
+]
+
+
+INIT_PARAM = []
+
+INIT_COMMAND_PRE = []
+
+INIT_COMMAND = [
+ # open X86 BMC Serial port
+ "dfd_debug sysfs_data_wr /dev/cpld1 0x41 0x01",
+ # enable stream light
+ "dfd_debug sysfs_data_wr /dev/cpld6 0xef 0x01",
+ "dfd_debug sysfs_data_wr /dev/cpld7 0xef 0x01",
+ "dfd_debug sysfs_data_wr /dev/cpld8 0x80 0xff",
+ "dfd_debug sysfs_data_wr /dev/cpld8 0x81 0xff",
+ # KR power_on
+ "dfd_debug sysfs_data_wr /dev/cpld9 0x80 0x03",
+ # KR tx-disable enable
+ "dfd_debug sysfs_data_wr /dev/cpld9 0x58 0x00",
+ ]
+
+WARM_UPGRADE_PARAM = {
+ "slot0": {
+ "VME": {
+ "chain1": [
+ {
+ "name": "BASE_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/base_cpld_refresh_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x01, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x00, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "value": 0x2c, "delay": 0.1}, #bmc_ready
+ ],
+ "rw_recover_reg": [
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x19, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1b, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1c, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x23, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2b, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2c, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2d, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x38, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3e, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3f, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x43, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x44, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x57, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x5a, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x65, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x66, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x67, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x75, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb5, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x94, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x95, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa4, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa5, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb6, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb7, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb8, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbb, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbc, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc5, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc7, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe4, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe5, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe6, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe7, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe8, "read_len": 1, "value": None, "delay": 0.1},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 180,
+ "access_check_reg": {"skip": 1},
+ "finish_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x03,"delay": 20}, #after bmc_ready delay time
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x00, "delay": 0.1},
+ ],
+ },
+ ],
+ "chain2": [
+ {
+ "name": "MAC_CPLD_A",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mac_cplda_refresh_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x01, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x00, "delay": 0.1},
+ ],
+ "rw_recover_reg": [
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x76, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x77, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x78, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"skip": 1},
+ "finish_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x01, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+ ],
+ },
+ {
+ "name": "MAC_CPLD_B",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mac_cpldb_refresh_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x02, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x00, "delay": 0.1},
+ ],
+ "rw_recover_reg": [
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdc, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xde, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdf, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"skip": 1},
+ "finish_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x01, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+ ],
+ }
+ ],
+ "chain3": [
+ {
+ "name": "MAC_CPLD_C",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mac_cpldc_refresh_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x04, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x00, "delay": 0.1},
+ ],
+ "rw_recover_reg": [
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x13, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x14, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x15, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x16, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x1a, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4a, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4b, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x59, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x63, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"skip": 1},
+ "finish_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x01, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+ ],
+ }
+ ],
+ "chain4": [
+ {
+ "name": "FAN_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/fan_cpld_refresh_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x08, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1},
+ ],
+ "rw_recover_reg": [
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x22, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x56, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"skip": 1},
+ "finish_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+ ],
+ }
+ ],
+ "chain5": [
+ {
+ "name": "MGMT_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/mgmt_cpld_refresh_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x10, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x00, "delay": 0.1},
+ ],
+ "rw_recover_reg": [
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x30, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xa8, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 30,
+ "access_check_reg": {"skip": 1},
+ "finish_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x01, "delay": 1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+ ],
+ }
+ ],
+ "chain6": [
+ {
+ "name": "CPU_CPLD",
+ "refresh_file_judge_flag": 1,
+ "refresh_file": "/etc/.cpld_refresh/cpu_cpld_refresh_header.vme",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"cmd": "echo 497 > /sys/class/gpio/export", "gettype": "cmd"},
+ {"cmd": "echo out > /sys/class/gpio/gpio497/direction", "gettype": "cmd"},
+ {"cmd": "echo 1 > /sys/class/gpio/gpio497/value", "gettype": "cmd"},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x01, "delay": 0.1},
+ ],
+ "rw_recover_reg": [
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x51, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x54, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x60, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x61, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x85, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x86, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x87, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x88, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x89, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x8a, "read_len": 1, "value": None, "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "read_len": 1, "value": None, "delay": 0.1},
+ ],
+ "after_upgrade_delay": 1,
+ "after_upgrade_delay_timeout": 180,
+ "access_check_reg": {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x10, "read_len": 1, "value": 0x36, "okval": 0xff},
+ "finish_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x00, "delay": 0.1},
+ {"cmd": "echo 0 > /sys/class/gpio/gpio497/value", "gettype": "cmd"},
+ {"cmd": "echo 497 > /sys/class/gpio/unexport", "gettype": "cmd"},
+ ],
+ },
+ ],
+ },
+ "SPI-LOGIC-DEV": {
+ "chain1": [
+ {"name": "MAC_FPGA",
+ "init_cmd": [
+ {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+ {"cmd": "setpci -s 00:12.0 0x114.W=0xffff", "gettype": "cmd"},
+ {"cmd": "setpci -s 00:12.0 0x50.W=0x0050", "gettype": "cmd"}, # link_disable
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x00},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x01, "delay": 1},
+ ],
+ "after_upgrade_delay": 10,
+ "after_upgrade_delay_timeout": 10,
+ "refresh_finish_flag_check": {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x63, "value": 0x01, "read_len": 1},
+ "access_check_reg": {
+ "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len": 4, "gettype": "devfile",
+ "polling_cmd": [
+ {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd", "delay": 1}, # retrain_link
+ {"cmd": "setpci -s 00:12.0 0x52.w", "gettype": "cmd", "okval": 0x12,
+ "timeout": 10, "mask": 0xff}, # check link status
+ {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+ {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 2},
+ ],
+ "polling_delay": 0.1
+ },
+ "finish_cmd": [
+ {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd"}, # retrain_link
+ {"cmd": "setpci -s 00:12.0 0x110.W=0xffff", "gettype": "cmd"},
+ {"cmd": "setpci -s 00:12.0 0x114.W=0x0000", "gettype": "cmd"},
+ {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+ ],
+ },
+ ]
+ },
+ },
+ "stop_services_cmd": [
+ "/usr/local/bin/platform_process.py stop",
+ ],
+ "start_services_cmd": [
+ "/usr/local/bin/platform_process.py start",
+ ],
+}
+
+UPGRADE_SUMMARY = {
+ "devtype": 0x40d7,
+
+ "slot0": {
+ "subtype": 0,
+ "VME": {
+ "chain1": {
+ "name": "BASE_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain2": {
+ "name": "MAC_CPLDAB",
+ "is_support_warm_upg": 1,
+ },
+ "chain3": {
+ "name": "MAC_CPLDC",
+ "is_support_warm_upg": 1,
+ },
+ "chain4": {
+ "name": "FAN_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain5": {
+ "name": "MGMT_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ "chain6": {
+ "name": "CPU_CPLD",
+ "is_support_warm_upg": 1,
+ },
+ },
+
+ "SPI-LOGIC-DEV": {
+ "chain1": {
+ "name": "MAC_FPGA",
+ "is_support_warm_upg": 1,
+ }
+ },
+
+ "SYSFS": {
+ "chain2": {
+ "name": "BCM53134",
+ "is_support_warm_upg": 0,
+ "init_cmd": [
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00, "delay": 0.1},
+ {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_gpio_device sck=55 mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00", "gettype": "cmd"},
+ {"cmd": "modprobe wb_spi_93xx46", "gettype": "cmd", "delay": 0.1},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+ {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+ {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01, "delay": 0.1},
+ ],
+ },
+ },
+
+ "MTD": {
+ "chain4": {
+ "name": "BIOS",
+ "filesizecheck": 20480, # bios check file size, Unit: K
+ "is_support_warm_upg": 0,
+ "init_cmd": [
+ {"cmd": "modprobe mtd", "gettype": "cmd"},
+ {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+ {"cmd": "modprobe ofpart", "gettype": "cmd"},
+ {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+ {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"},
+ ],
+ "finish_cmd": [
+ {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"},
+ {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+ {"cmd": "rmmod ofpart", "gettype": "cmd"},
+ {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+ {"cmd": "rmmod mtd", "gettype": "cmd"},
+ ],
+ },
+ },
+
+ "TEST": {
+ "fpga": [
+ {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "MAC_FPGA"},
+ ],
+ "cpld": [
+ {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"},
+ {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "MAC_CPLDAB"},
+ {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "MAC_CPLDC"},
+ {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "FAN_CPLD"},
+ {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "MGMT_CPLD"},
+ {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"},
+ ],
+ },
+ },
+}
+
+PLATFORM_E2_CONF = {
+ "fan": [
+ {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom"},
+ {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/53-0050/eeprom"},
+ {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/54-0050/eeprom"},
+ {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/55-0050/eeprom"},
+ ],
+ "psu": [
+ {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"},
+ {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"},
+ ],
+ "syseeprom": [
+ {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"},
+ ],
+}
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py
new file mode 100644
index 000000000000..bb88ae1a5fae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py
@@ -0,0 +1,74 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+ "port_num": 66,
+ "port_bus_map": {
+ 1: 106,
+ 2: 107,
+ 3: 108,
+ 4: 109,
+ 5: 110,
+ 6: 111,
+ 7: 112,
+ 8: 113,
+ 9: 114,
+ 10: 115,
+ 11: 116,
+ 12: 117,
+ 13: 118,
+ 14: 119,
+ 15: 120,
+ 16: 121,
+ 17: 122,
+ 18: 123,
+ 19: 124,
+ 20: 125,
+ 21: 126,
+ 22: 127,
+ 23: 128,
+ 24: 129,
+ 25: 130,
+ 26: 131,
+ 27: 132,
+ 28: 133,
+ 29: 134,
+ 30: 135,
+ 31: 136,
+ 32: 137,
+ 33: 138,
+ 34: 139,
+ 35: 140,
+ 36: 141,
+ 37: 142,
+ 38: 143,
+ 39: 144,
+ 40: 145,
+ 41: 146,
+ 42: 147,
+ 43: 148,
+ 44: 149,
+ 45: 150,
+ 46: 151,
+ 47: 152,
+ 48: 153,
+ 49: 154,
+ 50: 155,
+ 51: 156,
+ 52: 157,
+ 53: 158,
+ 54: 159,
+ 55: 160,
+ 56: 161,
+ 57: 162,
+ 58: 163,
+ 59: 164,
+ 60: 165,
+ 61: 166,
+ 62: 167,
+ 63: 168,
+ 64: 169,
+ 65: 59,
+ 66: 60,
+ }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
new file mode 100644
index 000000000000..81a53b11f6f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
@@ -0,0 +1,756 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+ "intake": ['CRPS3000CL', 'ECDL3000123'],
+ "exhaust": []
+}
+
+fanairflow = {
+ "intake": ['FAN80-02-F'],
+ "exhaust": [],
+}
+
+psu_display_name = {
+ "PA3000I-F": ['CRPS3000CL', 'ECDL3000123'],
+}
+
+psutypedecode = {
+ 0x00: 'N/A',
+ 0x01: 'AC',
+ 0x02: 'DC',
+}
+
+class Unit:
+ Temperature = "C"
+ Voltage = "V"
+ Current = "A"
+ Power = "W"
+ Speed = "RPM"
+
+
+class threshold:
+ PSU_TEMP_MIN = -20 * 1000
+ PSU_TEMP_MAX = 65 * 1000
+
+ PSU_FAN_SPEED_MIN = 3500
+ PSU_FAN_SPEED_MAX = 23500
+ PSU_A_FAN_SPEED_MAX = 39000
+
+ PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+ PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000
+
+ PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000
+ PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000
+
+ PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000
+ PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000
+
+ ERR_VALUE = -9999999
+
+ PSU_OUTPUT_POWER_MIN = 0* 1000 * 1000
+ PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000
+
+ PSU_INPUT_POWER_MIN = 0 * 1000 * 1000
+ PSU_INPUT_POWER_MAX = 3100* 1000 * 1000
+
+ PSU_OUTPUT_CURRENT_MIN = 0 * 1000
+ PSU_OUTPUT_CURRENT_MAX = 246 * 1000
+
+ PSU_INPUT_CURRENT_MIN = 0 * 1000
+ PSU_INPUT_CURRENT_MAX = 20 * 1000
+
+ FRONT_FAN_SPEED_MAX = 18000
+ REAR_FAN_SPEED_MAX = 16000
+ FAN_SPEED_MIN = 3200
+
+
+devices = {
+ "sensor_print_src": "s3ip",
+
+ "dcdc_data_source": [
+ {
+ "path": "/sys/s3ip/vol_sensor",
+ "type": "vol",
+ "Unit": Unit.Voltage,
+ "read_times": 3,
+ },
+ {
+ "path": "/sys/s3ip/curr_sensor",
+ "type": "curr",
+ "Unit": Unit.Current,
+ "read_times": 3,
+ },
+ ],
+ "temp_data_source": [
+ {
+ "path": "/sys/s3ip/temp_sensor",
+ "type": "temp",
+ "Unit": Unit.Temperature,
+ },
+ ],
+
+ "onie_e2": [
+ {
+ "name": "ONIE_E2",
+ "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+ "airflow": "intake"
+ },
+ ],
+ "psus": [
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/42-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 42, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU1",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": {
+ "ECDL3000123": threshold.PSU_FAN_SPEED_MAX,
+ "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX,
+ },
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 42, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ },
+ {
+ "e2loc": {"loc": "/sys/bus/i2c/devices/43-0050/eeprom", "way": "sysfs"},
+ "pmbusloc": {"bus": 43, "addr": 0x58, "way": "i2c"},
+ "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "name": "PSU2",
+ "psu_display_name": psu_display_name,
+ "airflow": psu_fan_airflow,
+ "TempStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": threshold.PSU_TEMP_MIN,
+ "Max": threshold.PSU_TEMP_MAX,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ },
+ "FanStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+ "FanSpeed": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+ "Min": threshold.PSU_FAN_SPEED_MIN,
+ "Max": {
+ "ECDL3000123": threshold.PSU_FAN_SPEED_MAX,
+ "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX,
+ },
+ "Unit": Unit.Speed
+ },
+ "psu_fan_tolerance": 40,
+ "InputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+ "InputsType": {"bus": 43, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+ "InputsVoltage": {
+ 'AC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+
+ },
+ 'DC': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ 'other': {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+ "Min": threshold.ERR_VALUE,
+ "Max": threshold.ERR_VALUE,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ "InputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_CURRENT_MIN,
+ "Max": threshold.PSU_INPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "InputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+ "Min": threshold.PSU_INPUT_POWER_MIN,
+ "Max": threshold.PSU_INPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ "OutputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+ "OutputsVoltage": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+ "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+ "Unit": Unit.Voltage,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsCurrent": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+ "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+ "Unit": Unit.Current,
+ "format": "float(float(%s)/1000)"
+ },
+ "OutputsPower": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+ "Min": threshold.PSU_OUTPUT_POWER_MIN,
+ "Max": threshold.PSU_OUTPUT_POWER_MAX,
+ "Unit": Unit.Power,
+ "format": "float(float(%s)/1000000)"
+ },
+ }
+ ],
+ "temps": [
+ {
+ "name": "BOARD_TEMP",
+ "temp_id": "TEMP1",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/s3ip/temp_sensor/temp13/value", "way": "sysfs"},
+ {"loc": "/sys/s3ip/temp_sensor/temp14/value", "way": "sysfs"},
+ {"loc": "/sys/s3ip/temp_sensor/temp15/value", "way": "sysfs"},
+ ],
+ "Min": -10000,
+ "Low": 0,
+ "High": 70000,
+ "Max": 75000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "CPU_TEMP",
+ "temp_id": "TEMP2",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -15000,
+ "Low": 10000,
+ "High": 98000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "INLET_TEMP",
+ "temp_id": "TEMP3",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/s3ip/temp_sensor/temp10/value", "way": "sysfs"},
+ ],
+ "Min": -30000,
+ "Low": 0,
+ "High": 40000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "OUTLET_TEMP",
+ "temp_id": "TEMP4",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/s3ip/temp_sensor/temp11/value", "way": "sysfs"},
+ {"loc": "/sys/s3ip/temp_sensor/temp12/value", "way": "sysfs"},
+ ],
+ "Min": -30000,
+ "Low": 0,
+ "High": 70000,
+ "Max": 80000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SWITCH_TEMP",
+ "temp_id": "TEMP5",
+ "api_name": "ASIC_TEMP",
+ "Temperature": {
+ "value": {"loc": "/sys/s3ip/temp_sensor/temp17/value", "way": "sysfs"},
+ "Min": -30000,
+ "Low": 10000,
+ "High": 100000,
+ "Max": 105000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU1_TEMP",
+ "temp_id": "TEMP6",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -10000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "PSU2_TEMP",
+ "temp_id": "TEMP7",
+ "Temperature": {
+ "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+ "Min": -10000,
+ "Low": 0,
+ "High": 55000,
+ "Max": 60000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "MOS_TEMP",
+ "temp_id": "TEMP8",
+ "Temperature": {
+ "value": [
+ {"loc": "/sys/s3ip/temp_sensor/temp18/value", "way": "sysfs"},
+ {"loc": "/sys/s3ip/temp_sensor/temp19/value", "way": "sysfs"},
+ {"loc": "/sys/s3ip/temp_sensor/temp20/value", "way": "sysfs"},
+ ],
+ "Min": -30000,
+ "Low": 10000,
+ "High": 100000,
+ "Max":125000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ {
+ "name": "SFF_TEMP",
+ "Temperature": {
+ "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+ "Min": -15000,
+ "Low": 0,
+ "High": 80000,
+ "Max": 100000,
+ "Unit": Unit.Temperature,
+ "format": "float(float(%s)/1000)"
+ }
+ },
+ ],
+ "leds": [
+ {
+ "name": "FRONT_SYS_LED",
+ "led_type": "SYS_LED",
+ "led": {"loc": "/dev/cpld1", "offset": 0xd2, "len": 1, "way": "devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07
+ },
+ },
+ {
+ "name": "FRONT_PSU_LED",
+ "led_type": "PSU_LED",
+ "led": {"loc": "/dev/cpld1", "offset": 0xd3, "len": 1, "way": "devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07
+ },
+ },
+ {
+ "name": "FRONT_FAN_LED",
+ "led_type": "FAN_LED",
+ "led": {"loc": "/dev/cpld1", "offset": 0xd4, "len": 1, "way": "devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07
+ },
+ },
+ ],
+ "fans": [
+ {
+ "name": "FAN1",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-52/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/s3ip/fan/fan1/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"loc": "/dev/cpld10", "offset":0xd0, "len": 1, "way":"devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN2",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-53/53-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/s3ip/fan/fan2/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"loc": "/dev/cpld10", "offset":0xd1, "len": 1, "way":"devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN3",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-54/54-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/s3ip/fan/fan3/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"loc": "/dev/cpld10", "offset":0xd2, "len": 1, "way":"devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ {
+ "name": "FAN4",
+ "airflow": fanairflow,
+ "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-55/55-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+ "present": {"loc": "/sys/s3ip/fan/fan4/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "led": {"loc": "/dev/cpld10", "offset":0xd3, "len": 1, "way":"devfile"},
+ "led_attrs": {
+ "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+ "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+ },
+ "Rotor": {
+ "Rotor1_config": {
+ "name": "Rotor1",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.FRONT_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ "Rotor2_config": {
+ "name": "Rotor2",
+ "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"},
+ "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+ "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+ "SpeedMin": threshold.FAN_SPEED_MIN,
+ "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+ "Speed": {
+ "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"},
+ "Min": threshold.FAN_SPEED_MIN,
+ "Max": threshold.REAR_FAN_SPEED_MAX,
+ "Unit": Unit.Speed,
+ },
+ },
+ },
+ },
+ ],
+ "cplds": [
+ {
+ "name": "CPU_CPLD",
+ "cpld_id": "CPLD1",
+ "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for system power",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "CONNECT_CPLD",
+ "cpld_id": "CPLD2",
+ "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MAC_CPLDA",
+ "cpld_id": "CPLD3",
+ "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MAC_CPLDB",
+ "cpld_id": "CPLD4",
+ "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MAC_CPLDC",
+ "cpld_id": "CPLD5",
+ "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MGMT_CPLD",
+ "cpld_id": "CPLD6",
+ "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for sff modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "FAN_CPLD",
+ "cpld_id": "CPLD7",
+ "VersionFile": {"loc": "/dev/cpld10", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for fan modules",
+ "slot": 0,
+ "warm": 1,
+ },
+ {
+ "name": "MAC_FPGA",
+ "cpld_id": "CPLD8",
+ "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+ "desc": "Used for base functions",
+ "slot": 0,
+ "format": "little_endian",
+ "warm": 1,
+ },
+ {
+ "name": "BIOS",
+ "cpld_id": "CPLD9",
+ "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+ "desc": "Performs initialization of hardware components during booting",
+ "slot": 0,
+ "type": "str",
+ "warm": 0,
+ },
+ ],
+ "cpu": [
+ {
+ "name": "cpu",
+ "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"},
+ "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+ }
+ ],
+ "sfps": {
+ "ver": '1.0',
+ "port_index_start": 0,
+ "port_num": 66,
+ "log_level": 2,
+ "eeprom_retry_times": 5,
+ "eeprom_retry_break_sec": 0.2,
+ "presence_cpld": {
+ "dev_id": {
+ 6: {
+ "offset": {
+ 0x73: "17-24",
+ 0x74: "9-16",
+ 0x75: "1-8",
+ },
+ },
+ 7: {
+ "offset": {
+ 0x76: "57-64",
+ 0x77: "49-56",
+ 0x78: "41-48",
+ 0x79: "33-40",
+ 0x7a: "25-32",
+ },
+ },
+ 9: {
+ "offset": {
+ 0x69: "65-66",
+ },
+ },
+ },
+ },
+ "presence_val_is_present": 0,
+ "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+ "eeprom_path_key": list(range(106, 170)) + [59, 60],
+ "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+ "optoe_driver_key": list(range(106, 170)) + [59, 60],
+ "reset_cpld": {
+ "dev_id": {
+ 6: {
+ "offset": {
+ 0x70: "17-24",
+ 0x71: "9-16",
+ 0x72: "1-8",
+ },
+ },
+ 7: {
+ "offset": {
+ 0x70: "57-64",
+ 0x71: "49-56",
+ 0x72: "41-48",
+ 0x73: "33-40",
+ 0x74: "25-32",
+ },
+ },
+ },
+ },
+ "reset_val_is_reset": 0,
+ }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py
new file mode 100644
index 000000000000..4e95787950f6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py
@@ -0,0 +1,158 @@
+# coding:utf-8
+
+
+monitor = {
+ "openloop": {
+ "linear": {
+ "name": "linear",
+ "flag": 0,
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "K": 11,
+ "tin_min": 38,
+ },
+ "curve": {
+ "name": "curve",
+ "flag": 1,
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "a": -0.38,
+ "b": 33.68,
+ "c": -476,
+ "tin_min": 27,
+ },
+ },
+
+ "pid": {
+ "CPU_TEMP": {
+ "name": "CPU_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 0.3,
+ "Kd": 0.3,
+ "target": 80,
+ "value": [None, None, None],
+ },
+ "SWITCH_TEMP": {
+ "name": "SWITCH_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 1.5,
+ "Ki": 1,
+ "Kd": 0.3,
+ "target": 90,
+ "value": [None, None, None],
+ },
+ "OUTLET_TEMP": {
+ "name": "OUTLET_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.4,
+ "Kd": 0.3,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ "MOS_TEMP": {
+ "name": "MOS_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 1,
+ "Ki": 0.1,
+ "Kd": 0.3,
+ "target": 97,
+ "value": [None, None, None],
+ },
+ "SFF_TEMP": {
+ "name": "SFF_TEMP",
+ "flag": 1,
+ "type": "duty",
+ "pwm_min": 0x80,
+ "pwm_max": 0xff,
+ "Kp": 2,
+ "Ki": 0.3,
+ "Kd": 0,
+ "target": 65,
+ "value": [None, None, None],
+ },
+ },
+
+ "temps_threshold": {
+ "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999},
+ "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55, "fix": -2},
+ "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+ "CPU_TEMP": {"name": "CPU_TEMP", "warning": 90, "critical": 95},
+ "MOS_TEMP": {"name": "MOS_TEMP", "warning": 100, "critical": 125},
+ "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 95, "critical": 100},
+ "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+ },
+
+ "fancontrol_para": {
+ "interval": 5,
+ "max_pwm": 0xff,
+ "min_pwm": 0x80,
+ "abnormal_pwm": 0xff,
+ "warning_pwm": 0xff,
+ "temp_invalid_pid_pwm": 0x80,
+ "temp_error_pid_pwm": 0x80,
+ "temp_fail_num": 3,
+ "check_temp_fail": [
+ {"temp_name": "INLET_TEMP"},
+ {"temp_name": "SWITCH_TEMP"},
+ {"temp_name": "CPU_TEMP"},
+ {"temp_name": "MOS_TEMP"},
+ {"temp_name": "OUTLET_TEMP"},
+ {"temp_name": "BOARD_TEMP"},
+ ],
+ "temp_warning_num": 3, # temp over warning 3 times continuously
+ "temp_critical_num": 3, # temp over critical 3 times continuously
+ "temp_warning_countdown": 60, # 5 min warning speed after not warning
+ "temp_critical_countdown": 60, # 5 min full speed after not critical
+ "rotor_error_count": 6, # fan rotor error 6 times continuously
+ "inlet_mac_diff": 999,
+ "check_crit_reboot_flag": 1,
+ "check_crit_reboot_num": 3,
+ "check_crit_sleep_time": 20,
+ "psu_fan_control": 1,
+ "psu_absent_fullspeed_num": 0xFF,
+ "fan_absent_fullspeed_num": 1,
+ "rotor_error_fullspeed_num": 1,
+ "deal_all_fan_error_method_flag": 1,
+ "all_fan_error_switch_temp_critical_temp": 80,
+ "all_fan_error_recover_log": "Power off base and mac board.",
+ "all_fan_error_recover_cmd": "dfd_debug io_wr 0x93a 0x01",
+ "all_fan_error_check_crit_reboot_num": 3,
+ "all_fan_error_check_crit_sleep_time": 2,
+ },
+
+ "ledcontrol_para": {
+ "interval":5,
+ "checkpsu": 0, # 0: sys led don't follow psu led
+ "checkfan": 0, # 0: sys led don't follow fan led
+ "psu_amber_num": 1,
+ "fan_amber_num": 1,
+ "board_sys_led": [
+ {"led_name": "FRONT_SYS_LED"},
+ ],
+ "board_psu_led": [
+ {"led_name": "FRONT_PSU_LED"},
+ ],
+ "board_fan_led": [
+ {"led_name": "FRONT_FAN_LED"},
+ ],
+ },
+
+ "otp_reboot_judge_file": {
+ "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+ "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+ },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile
new file mode 100644
index 000000000000..8c39927af73d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile
@@ -0,0 +1,13 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m += wb_pcie_dev_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_fpga_i2c_bus_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_fpga_pca954x_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_wdt_device.o
+obj-m += wb_indirect_dev_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c
new file mode 100644
index 000000000000..60fde91c5102
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c
@@ -0,0 +1,1101 @@
+/*
+ * An wb_fpga_i2c_bus_device driver for fpga i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_fpga_i2c_debug = 0;
+static int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_fpga_i2c_debug) { \
+ printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_fpga_i2c_error) { \
+ printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+/* CPLD-I2C-MASTER-1 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data0 = {
+ .adap_nr = 2,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x00,
+ .i2c_filter = 0x04,
+ .i2c_stretch = 0x08,
+ .i2c_ext_9548_exits_flag = 0x0c,
+ .i2c_ext_9548_addr = 0x10,
+ .i2c_ext_9548_chan = 0x14,
+ .i2c_in_9548_chan = 0x18,
+ .i2c_slave = 0x1c,
+ .i2c_reg = 0x20,
+ .i2c_reg_len = 0x30,
+ .i2c_data_len = 0x34,
+ .i2c_ctrl = 0x38,
+ .i2c_status = 0x3c,
+ .i2c_err_vec = 0x48,
+ .i2c_data_buf = 0x100,
+ .i2c_data_buf_len = 256,
+ .dev_name = "/dev/cpld2",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 6,
+ .i2c_adap_reset_flag = 0,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+/* CPLD-I2C-MASTER-4 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data1 = {
+ .adap_nr = 3,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x00,
+ .i2c_filter = 0x04,
+ .i2c_stretch = 0x08,
+ .i2c_ext_9548_exits_flag = 0x0c,
+ .i2c_ext_9548_addr = 0x10,
+ .i2c_ext_9548_chan = 0x14,
+ .i2c_in_9548_chan = 0x18,
+ .i2c_slave = 0x1c,
+ .i2c_reg = 0x20,
+ .i2c_reg_len = 0x30,
+ .i2c_data_len = 0x34,
+ .i2c_ctrl = 0x38,
+ .i2c_status = 0x3c,
+ .i2c_err_vec = 0x48,
+ .i2c_data_buf = 0x100,
+ .i2c_data_buf_len = 256,
+ .dev_name = "/dev/cpld5",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 6,
+ .i2c_adap_reset_flag = 0,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+/* CPLD-I2C-MASTER-2 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data2 = {
+ .adap_nr = 4,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x00,
+ .i2c_filter = 0x04,
+ .i2c_stretch = 0x08,
+ .i2c_ext_9548_exits_flag = 0x0c,
+ .i2c_ext_9548_addr = 0x10,
+ .i2c_ext_9548_chan = 0x14,
+ .i2c_in_9548_chan = 0x18,
+ .i2c_slave = 0x1c,
+ .i2c_reg = 0x20,
+ .i2c_reg_len = 0x30,
+ .i2c_data_len = 0x34,
+ .i2c_ctrl = 0x38,
+ .i2c_status = 0x3c,
+ .i2c_err_vec = 0x48,
+ .i2c_data_buf = 0x100,
+ .i2c_data_buf_len = 256,
+ .dev_name = "/dev/cpld3",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 6,
+ .i2c_adap_reset_flag = 0,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+/* CPLD-I2C-MASTER-3 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data3 = {
+ .adap_nr = 5,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x00,
+ .i2c_filter = 0x04,
+ .i2c_stretch = 0x08,
+ .i2c_ext_9548_exits_flag = 0x0c,
+ .i2c_ext_9548_addr = 0x10,
+ .i2c_ext_9548_chan = 0x14,
+ .i2c_in_9548_chan = 0x18,
+ .i2c_slave = 0x1c,
+ .i2c_reg = 0x20,
+ .i2c_reg_len = 0x30,
+ .i2c_data_len = 0x34,
+ .i2c_ctrl = 0x38,
+ .i2c_status = 0x3c,
+ .i2c_err_vec = 0x48,
+ .i2c_data_buf = 0x100,
+ .i2c_data_buf_len = 256,
+ .dev_name = "/dev/cpld4",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 6,
+ .i2c_adap_reset_flag = 0,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data4 = {
+ .adap_nr = 6,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1400,
+ .i2c_filter = 0x1404,
+ .i2c_stretch = 0x1408,
+ .i2c_ext_9548_exits_flag = 0x140c,
+ .i2c_ext_9548_addr = 0x1410,
+ .i2c_ext_9548_chan = 0x1414,
+ .i2c_in_9548_chan = 0x1418,
+ .i2c_slave = 0x141c,
+ .i2c_reg = 0x1420,
+ .i2c_reg_len = 0x1430,
+ .i2c_data_len = 0x1434,
+ .i2c_ctrl = 0x1438,
+ .i2c_status = 0x143c,
+ .i2c_err_vec = 0x1448,
+ .i2c_data_buf = 0x1480,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x4c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data5 = {
+ .adap_nr = 7,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1500,
+ .i2c_filter = 0x1504,
+ .i2c_stretch = 0x1508,
+ .i2c_ext_9548_exits_flag = 0x150c,
+ .i2c_ext_9548_addr = 0x1510,
+ .i2c_ext_9548_chan = 0x1514,
+ .i2c_in_9548_chan = 0x1518,
+ .i2c_slave = 0x151c,
+ .i2c_reg = 0x1520,
+ .i2c_reg_len = 0x1530,
+ .i2c_data_len = 0x1534,
+ .i2c_ctrl = 0x1538,
+ .i2c_status = 0x153c,
+ .i2c_err_vec = 0x1548,
+ .i2c_data_buf = 0x1580,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x50,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data6 = {
+ .adap_nr = 8,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1800,
+ .i2c_filter = 0x1804,
+ .i2c_stretch = 0x1808,
+ .i2c_ext_9548_exits_flag = 0x180c,
+ .i2c_ext_9548_addr = 0x1810,
+ .i2c_ext_9548_chan = 0x1814,
+ .i2c_in_9548_chan = 0x1818,
+ .i2c_slave = 0x181c,
+ .i2c_reg = 0x1820,
+ .i2c_reg_len = 0x1830,
+ .i2c_data_len = 0x1834,
+ .i2c_ctrl = 0x1838,
+ .i2c_status = 0x183c,
+ .i2c_err_vec = 0x1848,
+ .i2c_data_buf = 0x1880,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x54,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data7 = {
+ .adap_nr = 9,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1900,
+ .i2c_filter = 0x1904,
+ .i2c_stretch = 0x1908,
+ .i2c_ext_9548_exits_flag = 0x190c,
+ .i2c_ext_9548_addr = 0x1910,
+ .i2c_ext_9548_chan = 0x1914,
+ .i2c_in_9548_chan = 0x1918,
+ .i2c_slave = 0x191c,
+ .i2c_reg = 0x1920,
+ .i2c_reg_len = 0x1930,
+ .i2c_data_len = 0x1934,
+ .i2c_ctrl = 0x1938,
+ .i2c_status = 0x193c,
+ .i2c_err_vec = 0x1948,
+ .i2c_data_buf = 0x1980,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x58,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data8 = {
+ .adap_nr = 10,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x1a00,
+ .i2c_filter = 0x1a04,
+ .i2c_stretch = 0x1a08,
+ .i2c_ext_9548_exits_flag = 0x1a0c,
+ .i2c_ext_9548_addr = 0x1a10,
+ .i2c_ext_9548_chan = 0x1a14,
+ .i2c_in_9548_chan = 0x1a18,
+ .i2c_slave = 0x1a1c,
+ .i2c_reg = 0x1a20,
+ .i2c_reg_len = 0x1a30,
+ .i2c_data_len = 0x1a34,
+ .i2c_ctrl = 0x1a38,
+ .i2c_status = 0x1a3c,
+ .i2c_err_vec = 0x1a48,
+ .i2c_data_buf = 0x1a80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000001,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data0 = {
+ .adap_nr = 11,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2000,
+ .i2c_filter = 0x2004,
+ .i2c_stretch = 0x2008,
+ .i2c_ext_9548_exits_flag = 0x200c,
+ .i2c_ext_9548_addr = 0x2010,
+ .i2c_ext_9548_chan = 0x2014,
+ .i2c_in_9548_chan = 0x2018,
+ .i2c_slave = 0x201c,
+ .i2c_reg = 0x2020,
+ .i2c_reg_len = 0x2030,
+ .i2c_data_len = 0x2034,
+ .i2c_ctrl = 0x2038,
+ .i2c_status = 0x203c,
+ .i2c_err_vec = 0x2048,
+ .i2c_data_buf = 0x2080,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000002,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data1 = {
+ .adap_nr = 12,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2100,
+ .i2c_filter = 0x2104,
+ .i2c_stretch = 0x2108,
+ .i2c_ext_9548_exits_flag = 0x210c,
+ .i2c_ext_9548_addr = 0x2110,
+ .i2c_ext_9548_chan = 0x2114,
+ .i2c_in_9548_chan = 0x2118,
+ .i2c_slave = 0x211c,
+ .i2c_reg = 0x2120,
+ .i2c_reg_len = 0x2130,
+ .i2c_data_len = 0x2134,
+ .i2c_ctrl = 0x2138,
+ .i2c_status = 0x213c,
+ .i2c_err_vec = 0x2148,
+ .i2c_data_buf = 0x2180,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x0000004,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data2 = {
+ .adap_nr = 13,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2200,
+ .i2c_filter = 0x2204,
+ .i2c_stretch = 0x2208,
+ .i2c_ext_9548_exits_flag = 0x220c,
+ .i2c_ext_9548_addr = 0x2210,
+ .i2c_ext_9548_chan = 0x2214,
+ .i2c_in_9548_chan = 0x2218,
+ .i2c_slave = 0x221c,
+ .i2c_reg = 0x2220,
+ .i2c_reg_len = 0x2230,
+ .i2c_data_len = 0x2234,
+ .i2c_ctrl = 0x2238,
+ .i2c_status = 0x223c,
+ .i2c_err_vec = 0x2248,
+ .i2c_data_buf = 0x2280,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000008,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data3 = {
+ .adap_nr = 14,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2300,
+ .i2c_filter = 0x2304,
+ .i2c_stretch = 0x2308,
+ .i2c_ext_9548_exits_flag = 0x230c,
+ .i2c_ext_9548_addr = 0x2310,
+ .i2c_ext_9548_chan = 0x2314,
+ .i2c_in_9548_chan = 0x2318,
+ .i2c_slave = 0x231c,
+ .i2c_reg = 0x2320,
+ .i2c_reg_len = 0x2330,
+ .i2c_data_len = 0x2334,
+ .i2c_ctrl = 0x2338,
+ .i2c_status = 0x233c,
+ .i2c_err_vec = 0x2348,
+ .i2c_data_buf = 0x2380,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000010,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data4 = {
+ .adap_nr = 15,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2400,
+ .i2c_filter = 0x2404,
+ .i2c_stretch = 0x2408,
+ .i2c_ext_9548_exits_flag = 0x240c,
+ .i2c_ext_9548_addr = 0x2410,
+ .i2c_ext_9548_chan = 0x2414,
+ .i2c_in_9548_chan = 0x2418,
+ .i2c_slave = 0x241c,
+ .i2c_reg = 0x2420,
+ .i2c_reg_len = 0x2430,
+ .i2c_data_len = 0x2434,
+ .i2c_ctrl = 0x2438,
+ .i2c_status = 0x243c,
+ .i2c_err_vec = 0x2448,
+ .i2c_data_buf = 0x2480,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000020,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data5 = {
+ .adap_nr = 16,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2500,
+ .i2c_filter = 0x2504,
+ .i2c_stretch = 0x2508,
+ .i2c_ext_9548_exits_flag = 0x250c,
+ .i2c_ext_9548_addr = 0x2510,
+ .i2c_ext_9548_chan = 0x2514,
+ .i2c_in_9548_chan = 0x2518,
+ .i2c_slave = 0x251c,
+ .i2c_reg = 0x2520,
+ .i2c_reg_len = 0x2530,
+ .i2c_data_len = 0x2534,
+ .i2c_ctrl = 0x2538,
+ .i2c_status = 0x253c,
+ .i2c_err_vec = 0x2548,
+ .i2c_data_buf = 0x2580,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000040,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data6 = {
+ .adap_nr = 17,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2600,
+ .i2c_filter = 0x2604,
+ .i2c_stretch = 0x2608,
+ .i2c_ext_9548_exits_flag = 0x260c,
+ .i2c_ext_9548_addr = 0x2610,
+ .i2c_ext_9548_chan = 0x2614,
+ .i2c_in_9548_chan = 0x2618,
+ .i2c_slave = 0x261c,
+ .i2c_reg = 0x2620,
+ .i2c_reg_len = 0x2630,
+ .i2c_data_len = 0x2634,
+ .i2c_ctrl = 0x2638,
+ .i2c_status = 0x263c,
+ .i2c_err_vec = 0x2648,
+ .i2c_data_buf = 0x2680,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000080,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data7 = {
+ .adap_nr = 18,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2700,
+ .i2c_filter = 0x2704,
+ .i2c_stretch = 0x2708,
+ .i2c_ext_9548_exits_flag = 0x270c,
+ .i2c_ext_9548_addr = 0x2710,
+ .i2c_ext_9548_chan = 0x2714,
+ .i2c_in_9548_chan = 0x2718,
+ .i2c_slave = 0x271c,
+ .i2c_reg = 0x2720,
+ .i2c_reg_len = 0x2730,
+ .i2c_data_len = 0x2734,
+ .i2c_ctrl = 0x2738,
+ .i2c_status = 0x273c,
+ .i2c_err_vec = 0x2748,
+ .i2c_data_buf = 0x2780,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000100,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data8 = {
+ .adap_nr = 19,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2800,
+ .i2c_filter = 0x2804,
+ .i2c_stretch = 0x2808,
+ .i2c_ext_9548_exits_flag = 0x280c,
+ .i2c_ext_9548_addr = 0x2810,
+ .i2c_ext_9548_chan = 0x2814,
+ .i2c_in_9548_chan = 0x2818,
+ .i2c_slave = 0x281c,
+ .i2c_reg = 0x2820,
+ .i2c_reg_len = 0x2830,
+ .i2c_data_len = 0x2834,
+ .i2c_ctrl = 0x2838,
+ .i2c_status = 0x283c,
+ .i2c_err_vec = 0x2848,
+ .i2c_data_buf = 0x2880,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000200,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data9 = {
+ .adap_nr = 20,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2900,
+ .i2c_filter = 0x2904,
+ .i2c_stretch = 0x2908,
+ .i2c_ext_9548_exits_flag = 0x290c,
+ .i2c_ext_9548_addr = 0x2910,
+ .i2c_ext_9548_chan = 0x2914,
+ .i2c_in_9548_chan = 0x2918,
+ .i2c_slave = 0x291c,
+ .i2c_reg = 0x2920,
+ .i2c_reg_len = 0x2930,
+ .i2c_data_len = 0x2934,
+ .i2c_ctrl = 0x2938,
+ .i2c_status = 0x293c,
+ .i2c_err_vec = 0x2948,
+ .i2c_data_buf = 0x2980,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000400,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data10 = {
+ .adap_nr = 21,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2a00,
+ .i2c_filter = 0x2a04,
+ .i2c_stretch = 0x2a08,
+ .i2c_ext_9548_exits_flag = 0x2a0c,
+ .i2c_ext_9548_addr = 0x2a10,
+ .i2c_ext_9548_chan = 0x2a14,
+ .i2c_in_9548_chan = 0x2a18,
+ .i2c_slave = 0x2a1c,
+ .i2c_reg = 0x2a20,
+ .i2c_reg_len = 0x2a30,
+ .i2c_data_len = 0x2a34,
+ .i2c_ctrl = 0x2a38,
+ .i2c_status = 0x2a3c,
+ .i2c_err_vec = 0x2a48,
+ .i2c_data_buf = 0x2a80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00000800,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data11 = {
+ .adap_nr = 22,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2b00,
+ .i2c_filter = 0x2b04,
+ .i2c_stretch = 0x2b08,
+ .i2c_ext_9548_exits_flag = 0x2b0c,
+ .i2c_ext_9548_addr = 0x2b10,
+ .i2c_ext_9548_chan = 0x2b14,
+ .i2c_in_9548_chan = 0x2b18,
+ .i2c_slave = 0x2b1c,
+ .i2c_reg = 0x2b20,
+ .i2c_reg_len = 0x2b30,
+ .i2c_data_len = 0x2b34,
+ .i2c_ctrl = 0x2b38,
+ .i2c_status = 0x2b3c,
+ .i2c_err_vec = 0x2b48,
+ .i2c_data_buf = 0x2b80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00001000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data12 = {
+ .adap_nr = 23,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2c00,
+ .i2c_filter = 0x2c04,
+ .i2c_stretch = 0x2c08,
+ .i2c_ext_9548_exits_flag = 0x2c0c,
+ .i2c_ext_9548_addr = 0x2c10,
+ .i2c_ext_9548_chan = 0x2c14,
+ .i2c_in_9548_chan = 0x2c18,
+ .i2c_slave = 0x2c1c,
+ .i2c_reg = 0x2c20,
+ .i2c_reg_len = 0x2c30,
+ .i2c_data_len = 0x2c34,
+ .i2c_ctrl = 0x2c38,
+ .i2c_status = 0x2c3c,
+ .i2c_err_vec = 0x2c48,
+ .i2c_data_buf = 0x2c80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00002000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data13 = {
+ .adap_nr = 24,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2d00,
+ .i2c_filter = 0x2d04,
+ .i2c_stretch = 0x2d08,
+ .i2c_ext_9548_exits_flag = 0x2d0c,
+ .i2c_ext_9548_addr = 0x2d10,
+ .i2c_ext_9548_chan = 0x2d14,
+ .i2c_in_9548_chan = 0x2d18,
+ .i2c_slave = 0x2d1c,
+ .i2c_reg = 0x2d20,
+ .i2c_reg_len = 0x2d30,
+ .i2c_data_len = 0x2d34,
+ .i2c_ctrl = 0x2d38,
+ .i2c_status = 0x2d3c,
+ .i2c_err_vec = 0x2d48,
+ .i2c_data_buf = 0x2d80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00004000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data14 = {
+ .adap_nr = 25,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2e00,
+ .i2c_filter = 0x2e04,
+ .i2c_stretch = 0x2e08,
+ .i2c_ext_9548_exits_flag = 0x2e0c,
+ .i2c_ext_9548_addr = 0x2e10,
+ .i2c_ext_9548_chan = 0x2e14,
+ .i2c_in_9548_chan = 0x2e18,
+ .i2c_slave = 0x2e1c,
+ .i2c_reg = 0x2e20,
+ .i2c_reg_len = 0x2e30,
+ .i2c_data_len = 0x2e34,
+ .i2c_ctrl = 0x2e38,
+ .i2c_status = 0x2e3c,
+ .i2c_err_vec = 0x2e48,
+ .i2c_data_buf = 0x2e80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00008000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data15 = {
+ .adap_nr = 26,
+ .i2c_timeout = 3000,
+ .i2c_scale = 0x2f00,
+ .i2c_filter = 0x2f04,
+ .i2c_stretch = 0x2f08,
+ .i2c_ext_9548_exits_flag = 0x2f0c,
+ .i2c_ext_9548_addr = 0x2f10,
+ .i2c_ext_9548_chan = 0x2f14,
+ .i2c_in_9548_chan = 0x2f18,
+ .i2c_slave = 0x2f1c,
+ .i2c_reg = 0x2f20,
+ .i2c_reg_len = 0x2f30,
+ .i2c_data_len = 0x2f34,
+ .i2c_ctrl = 0x2f38,
+ .i2c_status = 0x2f3c,
+ .i2c_err_vec = 0x2f48,
+ .i2c_data_buf = 0x2f80,
+ .dev_name = "/dev/fpga0",
+ .i2c_scale_value = 0x4e,
+ .i2c_filter_value = 0x7c,
+ .i2c_stretch_value = 0x7c,
+ .i2c_func_mode = 3,
+ .i2c_adap_reset_flag = 1,
+ .i2c_reset_addr = 0x7c,
+ .i2c_reset_on = 0x00010000,
+ .i2c_reset_off = 0x00000000,
+ .i2c_rst_delay_b = 0, /* delay time before reset(us) */
+ .i2c_rst_delay = 1, /* reset time(us) */
+ .i2c_rst_delay_a = 1, /* delay time after reset(us) */
+};
+
+static void wb_fpga_i2c_bus_device_release(struct device *dev)
+{
+ return;
+}
+
+static struct platform_device fpga_i2c_bus_device[] = {
+ {
+ .name = "wb-fpga-i2c",
+ .id = 1,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 2,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 3,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data2,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 4,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data3,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 5,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data4,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 6,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data5,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 7,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data6,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 8,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data7,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 9,
+ .dev = {
+ .platform_data = &fpga0_i2c_bus_device_data8,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 10,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data0,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 11,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data1,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 12,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data2,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 13,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data3,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 14,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data4,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 15,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data5,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 16,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data6,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 17,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data7,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 18,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data8,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 19,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data9,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 20,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data10,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 21,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data11,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 22,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data12,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 23,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data13,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 24,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data14,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+ {
+ .name = "wb-fpga-i2c",
+ .id = 25,
+ .dev = {
+ .platform_data = &fpga0_dom_i2c_bus_device_data15,
+ .release = wb_fpga_i2c_bus_device_release,
+ },
+ },
+};
+
+static int __init wb_fpga_i2c_bus_device_init(void)
+{
+ int i;
+ int ret = 0;
+ fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+ WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) {
+ fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+ ret = platform_device_register(&fpga_i2c_bus_device[i]);
+ if (ret < 0) {
+ fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */
+ printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1);
+ } else {
+ fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+ }
+ }
+ return 0;
+}
+
+static void __exit wb_fpga_i2c_bus_device_exit(void)
+{
+ int i;
+ fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+ WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) {
+ fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+ if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */
+ platform_device_unregister(&fpga_i2c_bus_device[i]);
+ }
+ }
+}
+
+module_init(wb_fpga_i2c_bus_device_init);
+module_exit(wb_fpga_i2c_bus_device_exit);
+MODULE_DESCRIPTION("FPGA I2C Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c
new file mode 100644
index 000000000000..043ec82366ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c
@@ -0,0 +1,489 @@
+/*
+ * An wb_fpga_pca954x_device driver for fpga pca954x device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static int g_wb_fpga_pca954x_device_debug = 0;
+static int g_wb_fpga_pca954x_device_error = 0;
+
+module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \
+ if (g_wb_fpga_pca954x_device_debug) { \
+ printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \
+ if (g_wb_fpga_pca954x_device_error) { \
+ printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+ } \
+} while (0)
+
+/* CPLD-I2C-MASTER-1 */
+static fpga_pca954x_device_t fpga_pca954x_device_data0 = {
+ .i2c_bus = 2,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 27,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data1 = {
+ .i2c_bus = 27,
+ .i2c_addr = 0x76,
+ .pca9548_base_nr = 42,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+/* CPLD-I2C-MASTER-4 */
+static fpga_pca954x_device_t fpga_pca954x_device_data2 = {
+ .i2c_bus = 3,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 28,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data3 = {
+ .i2c_bus = 28,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 50,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+/* CPLD-I2C-MASTER-2 */
+static fpga_pca954x_device_t fpga_pca954x_device_data4 = {
+ .i2c_bus = 4,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 29,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data5 = {
+ .i2c_bus =29,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 58,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+/* CPLD-I2C-MASTER-3 */
+static fpga_pca954x_device_t fpga_pca954x_device_data6 = {
+ .i2c_bus = 5,
+ .i2c_addr = 0x71,
+ .pca9548_base_nr = 30,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data7 = {
+ .i2c_bus = 30,
+ .i2c_addr = 0x77,
+ .pca9548_base_nr = 66,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+/* fpga-i2c-1 */
+static fpga_pca954x_device_t fpga_pca954x_device_data8 = {
+ .i2c_bus = 6,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 31,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data9 = {
+ .i2c_bus = 31,
+ .i2c_addr = 0x76,
+ .pca9548_base_nr = 74,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data10 = {
+ .i2c_bus = 7,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 32,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data11 = {
+ .i2c_bus = 32,
+ .i2c_addr = 0x76,
+ .pca9548_base_nr = 82,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data12 = {
+ .i2c_bus = 8,
+ .i2c_addr = 0x71,
+ .pca9548_base_nr = 33,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data13 = {
+ .i2c_bus = 33,
+ .i2c_addr = 0x76,
+ .pca9548_base_nr = 90,
+ .fpga_9548_flag = 2,
+ .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data14 = {
+ .i2c_bus = 9,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 98,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data15 = {
+ .i2c_bus = 10,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 102,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data16 = {
+ .i2c_bus = 11,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 106,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data17 = {
+ .i2c_bus = 12,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 110,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data18 = {
+ .i2c_bus = 13,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 114,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data19 = {
+ .i2c_bus = 14,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 118,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data20 = {
+ .i2c_bus = 15,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 122,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data21 = {
+ .i2c_bus = 16,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 126,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data22 = {
+ .i2c_bus = 17,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 130,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data23 = {
+ .i2c_bus = 18,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 134,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data24 = {
+ .i2c_bus = 19,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 138,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data25 = {
+ .i2c_bus = 20,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 142,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data26 = {
+ .i2c_bus = 21,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 146,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data27 = {
+ .i2c_bus = 22,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 150,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data28 = {
+ .i2c_bus = 23,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 154,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data29 = {
+ .i2c_bus = 24,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 158,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data30 = {
+ .i2c_bus = 25,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 162,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data31 = {
+ .i2c_bus = 26,
+ .i2c_addr = 0x70,
+ .pca9548_base_nr = 166,
+ .fpga_9548_flag = 1,
+ .fpga_9548_reset_flag = 0,
+};
+
+struct i2c_board_info fpga_pca954x_device_info[] = {
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data0,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data1,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data2,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data3,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data4,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data5,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data6,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data7,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data8,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data9,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data10,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data11,
+ },
+ {
+ .type = "wb_fpga_pca9541",
+ .platform_data = &fpga_pca954x_device_data12,
+ },
+ {
+ .type = "wb_fpga_pca9548",
+ .platform_data = &fpga_pca954x_device_data13,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data14,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data15,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data16,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data17,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data18,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data19,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data20,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data21,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data22,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data23,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data24,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data25,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data26,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data27,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data28,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data29,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data30,
+ },
+ {
+ .type = "wb_fpga_pca9544",
+ .platform_data = &fpga_pca954x_device_data31,
+ },
+};
+
+static int __init wb_fpga_pca954x_device_init(void)
+{
+ int i;
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+ fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+ WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) {
+ fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+ fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr;
+ adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus);
+ if (adap == NULL) {
+ fpga_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus);
+ continue;
+ }
+ client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]);
+ if (!client) {
+ fpga_pca954x_device_data->client = NULL;
+ printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n",
+ fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus);
+ } else {
+ fpga_pca954x_device_data->client = client;
+ }
+ i2c_put_adapter(adap);
+ }
+ return 0;
+}
+
+static void __exit wb_fpga_pca954x_device_exit(void)
+{
+ int i;
+ fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+ WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+ for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) {
+ fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+ if (fpga_pca954x_device_data->client) {
+ i2c_unregister_device(fpga_pca954x_device_data->client);
+ fpga_pca954x_device_data->client = NULL;
+ }
+ }
+}
+
+module_init(wb_fpga_pca954x_device_init);
+module_exit(wb_fpga_pca954x_device_exit);
+MODULE_DESCRIPTION("FPGA PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..92bced35580d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,181 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include
+#include
+#include