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ADS7924 AVDD supply lower than expected #366
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The datasheet wants 5-10 R here.
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Thanks both for the detailed testing of this. I assume that resistance was chosen based on the 8uA max current consumption specified in the data sheet (2.5ms cycle time) This resistor is way bigger than necessary, so can easily be decreased in the next revision as you suggest. Can we work around this satisfactorily for now in firmware by slowing down the cycle time? |
(this probably explains some of the issues that @wizath had with this ADC...) |
There's a firmware workaround by using the auto-scan-with-sleep function. The key here is that the voltage rail only sags if we have the ADC sampling at full-bore. |
replaced with 10R |
While working with booster, I was noticing that the reported measurement for P5V0 from the ADS7924 channel supply monitor was appearing low.
After further investigation, it appears that this is caused by a below-expected voltage on AVDD being supplied to the ADS7924.
Measuring voltage on the 3V3 side of the referenced resistor measures ~3.4V
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On the AVDD supply side, the voltage measures 2.65V.
This only occurs when the ADS7924 is configured for "auto-scan without sleep" conversion mode. If the ADS7924 is configured to use sleep, this issue is not present.
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