From e35a1a54612b4514eb5f173e5dc7fea75fbcc806 Mon Sep 17 00:00:00 2001 From: Clyde Laforge Date: Thu, 20 Jun 2024 15:36:56 +0200 Subject: [PATCH] feature: allow miso to be absent from SpiBus --- cocotbext/spi/spi.py | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/cocotbext/spi/spi.py b/cocotbext/spi/spi.py index 1d2f9c1..59f435b 100644 --- a/cocotbext/spi/spi.py +++ b/cocotbext/spi/spi.py @@ -11,6 +11,7 @@ from typing import Tuple import cocotb +from cocotb.binary import BinaryValue from cocotb.clock import BaseClock from cocotb.triggers import Edge from cocotb.triggers import Event @@ -60,9 +61,13 @@ def __init__(self, bus: SpiBus, config: SpiConfig) -> None: # spi signals self._sclk = bus.sclk self._mosi = bus.mosi - self._miso = bus.miso self._cs = bus.cs + if hasattr(bus, 'miso'): + self._miso = bus.miso + else: + self._miso = BinaryValue() + # size of a transfer self._config = config @@ -236,9 +241,13 @@ def __init__(self, bus: SpiBus): self._sclk = bus.sclk self._mosi = bus.mosi - self._miso = bus.miso self._cs = bus.cs + if hasattr(bus, 'miso'): + self._miso = bus.miso + else: + self._miso = BinaryValue() + self._miso.value = self._config.data_output_idle self.idle = Event()