From b3facd1b7d36ebb648f652be7a6156d69cccb7ea Mon Sep 17 00:00:00 2001 From: Fengtai Xie Date: Mon, 6 Jan 2025 14:39:20 +0800 Subject: [PATCH] riscv: telink: update commit id and nvs config - update commit id for zephyr . - add NVS_RAM_OPTIMIZATION option . Signed-off-by: Fengtai Xie --- .github/workflows/chef.yaml | 2 +- .github/workflows/examples-telink.yaml | 2 +- config/telink/chip-module/Kconfig.defaults | 9 +++++++++ 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/.github/workflows/chef.yaml b/.github/workflows/chef.yaml index 49db378008b33f..a22885729c14e0 100644 --- a/.github/workflows/chef.yaml +++ b/.github/workflows/chef.yaml @@ -111,7 +111,7 @@ jobs: platform: telink - name: Update Zephyr to specific revision (for developers purpose) shell: bash - run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py 2de597ef0b063825766fe62d93db8a59d15ef4b0" + run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py ab14605bc9bd8bfeee1e914f679478417b24de12" - name: CI Examples Telink shell: bash run: | diff --git a/.github/workflows/examples-telink.yaml b/.github/workflows/examples-telink.yaml index ce2cf267731f49..1bbace9c44d93e 100644 --- a/.github/workflows/examples-telink.yaml +++ b/.github/workflows/examples-telink.yaml @@ -58,7 +58,7 @@ jobs: gh-context: ${{ toJson(github) }} - name: Update Zephyr to specific revision (for developers purpose) - run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py 2de597ef0b063825766fe62d93db8a59d15ef4b0" + run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py ab14605bc9bd8bfeee1e914f679478417b24de12" - name: Build tools required for Factory Data # Run test for master and all PRs diff --git a/config/telink/chip-module/Kconfig.defaults b/config/telink/chip-module/Kconfig.defaults index bb2bad55d5fe07..2e1dcd85912d33 100644 --- a/config/telink/chip-module/Kconfig.defaults +++ b/config/telink/chip-module/Kconfig.defaults @@ -260,6 +260,15 @@ config NVS_LOOKUP_CACHE_SIZE default 400 if SOC_RISCV_TELINK_TL321X default 2048 if !PM +config NVS_RAM_OPTIMIZATION + bool "Optimize the RAM required for NVS" + default y if PM || SOC_RISCV_TELINK_TL321X + default n + +# Test on newest based code, need to enlarge to 512 which can pass TC_RR_1.1 +config NVS_LOOKUP_CACHE_ARRAY_SIZE + default 512 if PM || SOC_RISCV_TELINK_TL321X + config COMPRESS_LZMA depends on CHIP_OTA_REQUESTOR default y if SOC_RISCV_TELINK_TL321X