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And the docs of pause state that it is backwards compatible with CPUs without the instructions, corresponding to a nop in those:
This instruction was introduced in the Pentium 4 processors, but is backward compatible with all IA-32 processors. In earlier IA-32 processors, the PAUSE instruction operates like a NOP instruction.
The spec is very likely incorrect (we should report this upstream): https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_pause&expand=4108
(the SSE2 CPUID bit is not required)
Clang does not require it: https://github.com/llvm-mirror/clang/blob/be9413c753bdaff9cdb84b868f682abf6548ca60/include/clang/Basic/BuiltinsX86.def#L346
And the docs of
pause
state that it is backwards compatible with CPUs without the instructions, corresponding to anop
in those:cc @Fanael
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