diff --git a/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md b/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md
index b12c05589f5d3..ba64dc4685526 100644
--- a/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md
+++ b/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md
@@ -1,8 +1,12 @@
-# `riscv32{i,im,imc,imac,imafc}-unknown-none-elf`
+# `riscv32{i,im, ima,imc,imac,imafc}-unknown-none-elf`
 
 **Tier: 2**
 
-Bare-metal target for RISC-V CPUs with the RV32I, RV32IM, RV32IMA, RV32IMC, RV32IMAFC and RV32IMAC ISAs.
+Bare-metal target for RISC-V CPUs with the RV32I, RV32IM, RV32IMC, RV32IMAFC and RV32IMAC ISAs.
+
+**Tier: 3**
+
+Bare-metal target for RISC-V CPUs with the RV32IMA ISA.
 
 ## Target maintainers