Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

simd_div and simd_rem ICEs for non-power-of-two length vectors on Aarch64 #427

Open
calebzulawski opened this issue Aug 8, 2024 · 4 comments
Open

simd_div and simd_rem ICEs for non-power-of-two length vectors on Aarch64 #427

calebzulawski opened this issue Aug 8, 2024 · 4 comments
Labels
C-bug Category: Bug

Comments

@calebzulawski
Copy link
Member

calebzulawski commented Aug 8, 2024 •
edited
Loading

For non-power-of-two length vectors on Aarch64 (#422):

  • simd_div fails when the rhs argument is 0
  • simd_rem fails when the rhs argument is MIN

These still need reproducers to submit to LLVM
@calebzulawski calebzulawski added the C-bug Category: Bug label Aug 8, 2024
@calebzulawski calebzulawski changed the title simd_div and simd_mod ICEs for non-power-of-two length vectors on Aarch64 simd_div and simd_rem ICEs for non-power-of-two length vectors on Aarch64 Aug 8, 2024
@workingjubilee
Copy link
Member

oh cool.

@workingjubilee
Copy link
Member

@calebzulawski was this before we made our weird layout changes or just always

@workingjubilee
Copy link
Member

also on what element types?

@calebzulawski
Copy link
Member Author

Yeah, only with #[repr(simd, packed)]. I want to say it was for i8 but I don't remember for sure.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
C-bug Category: Bug
Projects
None yet
Milestone
No milestone
Development

No branches or pull requests
2 participants
@calebzulawski @workingjubilee