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docs: Update platform support
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SergioGasquez committed Jun 14, 2024
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3 changes: 2 additions & 1 deletion src/doc/rustc/src/SUMMARY.md
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- [\*-linux-ohos](platform-support/openharmony.md)
- [\*-hurd-gnu](platform-support/hurd.md)
- [aarch64-unknown-teeos](platform-support/aarch64-unknown-teeos.md)
- [\*-esp-espidf](platform-support/esp-idf.md)
- [\*-espidf](platform-support/esp-idf.md)
- [\*-unknown-fuchsia](platform-support/fuchsia.md)
- [\*-kmc-solid_\*](platform-support/kmc-solid.md)
- [csky-unknown-linux-gnuabiv2\*](platform-support/csky-unknown-linux-gnuabiv2.md)
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- [x86_64-fortanix-unknown-sgx](platform-support/x86_64-fortanix-unknown-sgx.md)
- [x86_64-unknown-linux-none.md](platform-support/x86_64-unknown-linux-none.md)
- [x86_64-unknown-none](platform-support/x86_64-unknown-none.md)
- [xtensa-\*-none-elf](platform-support/xtensa.md)
- [Targets](targets/index.md)
- [Built-in Targets](targets/built-in.md)
- [Custom Targets](targets/custom.md)
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12 changes: 6 additions & 6 deletions src/doc/rustc/src/platform-support.md
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Expand Up @@ -383,11 +383,11 @@ target | std | host | notes
`x86_64-wrs-vxworks` | ? | |
[`x86_64h-apple-darwin`](platform-support/x86_64h-apple-darwin.md) | ✓ | ✓ | macOS with late-gen Intel (at least Haswell)
[`x86_64-unknown-linux-none`](platform-support/x86_64-unknown-linux-none.md) | * | | 64-bit Linux with no libc
`xtensa-esp32-none-elf` | | | Xtensa ESP32
`xtensa-esp32-espidf` | | | Xtensa ESP32
`xtensa-esp32s2-none-elf` | | | Xtensa ESP32-S2
`xtensa-esp32s2-espidf` | | | Xtensa ESP32-S2
`xtensa-esp32s3-none-elf` | | | Xtensa ESP32-S3
`xtensa-esp32s3-espidf` | | | Xtensa ESP32-S3
[`xtensa-esp32-none-elf`](platform-support/xtensa.md) | * | | Xtensa ESP32
[`xtensa-esp32-espidf`](platform-support/esp-idf.md) | | | Xtensa ESP32
[`xtensa-esp32s2-none-elf`](platform-support/xtensa.md) | * | | Xtensa ESP32-S2
[`xtensa-esp32s2-espidf`](platform-support/esp-idf.md) | | | Xtensa ESP32-S2
[`xtensa-esp32s3-none-elf`](platform-support/xtensa.md) | * | | Xtensa ESP32-S3
[`xtensa-esp32s3-espidf`](platform-support/esp-idf.md) | | | Xtensa ESP32-S3

[runs on NVIDIA GPUs]: https://github.com/japaric-archived/nvptx#targets
20 changes: 12 additions & 8 deletions src/doc/rustc/src/platform-support/esp-idf.md
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# `*-esp-espidf`
# `*-espidf`

**Tier: 3**

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- Ivan Markov [@ivmarkov](https://github.com/ivmarkov)
- Scott Mabin [@MabezDev](https://github.com/MabezDev)
- Sergio Gasquez [@SergioGasquez](https://github.com/SergioGasquez)

## Requirements

The target names follow this format: `$ARCH-esp-espidf`, where `$ARCH` specifies the target processor architecture. The following targets are currently defined:

| Target name | Target CPU(s) | Minimum ESP-IDF version |
| ------------------------ | --------------------------------------------------------------- | ----------------------- |
| `riscv32imc-esp-espidf` | [ESP32-C2](https://www.espressif.com/en/products/socs/esp32-c2) | `v5.0` |
| `riscv32imc-esp-espidf` | [ESP32-C3](https://www.espressif.com/en/products/socs/esp32-c3) | `v4.3` |
| `riscv32imac-esp-espidf` | [ESP32-C6](https://www.espressif.com/en/products/socs/esp32-c6) | `v5.1` |
| `riscv32imac-esp-espidf` | [ESP32-H2](https://www.espressif.com/en/products/socs/esp32-h2) | `v5.1` |
| `riscv32imafc-esp-espidf`| [ESP32-P4](https://www.espressif.com/en/news/ESP32-P4) | `v5.2` |
| Target name | Target CPU(s) | Minimum ESP-IDF version |
| ------------------------- | --------------------------------------------------------------- | ----------------------- |
| `riscv32imc-esp-espidf` | [ESP32-C2](https://www.espressif.com/en/products/socs/esp32-c2) | `v5.0` |
| `riscv32imc-esp-espidf` | [ESP32-C3](https://www.espressif.com/en/products/socs/esp32-c3) | `v4.4` |
| `riscv32imac-esp-espidf` | [ESP32-C6](https://www.espressif.com/en/products/socs/esp32-c6) | `v5.1` |
| `riscv32imac-esp-espidf` | [ESP32-H2](https://www.espressif.com/en/products/socs/esp32-h2) | `v5.1` |
| `riscv32imafc-esp-espidf` | [ESP32-P4](https://www.espressif.com/en/news/ESP32-P4) | `v5.2` |
| `xtensa-esp32-espidf` | [ESP32](https://www.espressif.com/en/products/socs/esp32) | `v4.4` |
| `xtensa-esp32s2-espidf` | [ESP32-S2](https://www.espressif.com/en/products/socs/esp32-s2) | `v4.4` |
| `xtensa-esp32s3-espidf` | [ESP32-S3](https://www.espressif.com/en/products/socs/esp32-s3) | `v4.4` |

It is recommended to use the latest ESP-IDF stable release if possible.

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12 changes: 2 additions & 10 deletions src/doc/rustc/src/platform-support/xtensa.md
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# `xtensa-*`
# `xtensa-*-none-elf`

**Tier: 3**

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The target names follow this format: `xtensa-$CPU`, where `$CPU` specifies the target chip. The following targets are currently defined:


### `no_std`

| Target name | Target CPU(s) |
| ------------------------- | --------------------------------------------------------------- |
| `xtensa-esp32-none-elf` | [ESP32](https://www.espressif.com/en/products/socs/esp32) |
| `xtensa-esp32s2-none-elf` | [ESP32-S2](https://www.espressif.com/en/products/socs/esp32-s2) |
| `xtensa-esp32s3-none-elf` | [ESP32-S3](https://www.espressif.com/en/products/socs/esp32-s3) |

### `std`

| Target name | Target CPU(s) |
| ----------------------- | --------------------------------------------------------------- |
| `xtensa-esp32-espidf` | [ESP32](https://www.espressif.com/en/products/socs/esp32) |
| `xtensa-esp32s2-espidf` | [ESP32-S2](https://www.espressif.com/en/products/socs/esp32-s2) |
| `xtensa-esp32s3-espidf` | [ESP32-S3](https://www.espressif.com/en/products/socs/esp32-s3) |
Xtensa targets that support `std` are documented in the [ESP-IDF platform support document](esp-idf.md)

## Building the targets

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