From aef25a4c544a5eee550126abe7f2b54f390fd7a1 Mon Sep 17 00:00:00 2001
From: Viktor Sonesten <viktor.sonesten@grepit.se>
Date: Fri, 14 Jan 2022 15:01:50 +0100
Subject: [PATCH] dcb: improve enable_trace documentation

---
 src/peripheral/dcb.rs | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs
index ef879ac6..9fc3d527 100644
--- a/src/peripheral/dcb.rs
+++ b/src/peripheral/dcb.rs
@@ -2,7 +2,7 @@
 
 use volatile_register::{RW, WO};
 
-use crate::peripheral::DCB;
+use crate::peripheral::{DCB, DWT, ITM};
 use core::ptr;
 
 const DCB_DEMCR_TRCENA: u32 = 1 << 24;
@@ -22,10 +22,7 @@ pub struct RegisterBlock {
 }
 
 impl DCB {
-    /// Enables TRACE. This is for example required by the
-    /// `peripheral::DWT` cycle counter to work properly.
-    /// As by STM documentation, this flag is not reset on
-    /// soft-reset, only on power reset.
+    /// Global enable for all [`DWT`] and [`ITM`] features.
     ///
     /// Note: vendor-specific registers may have to be set to completely
     /// enable tracing. For example, on the STM32F401RE, `TRACE_MODE`