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Update Hexagon asm and analysis plugins #1614
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I have absolutely no idea what the cause of the failing test is. I just created a VM and built rizin as the ubuntu-tcc-test Action does it. Basically copied and pasted the commands to build TinyCC and meson. All tests succeeded. No error. The only difference is, that I use a debian-10 in the VM. No Ubuntu. Unfortunately I can't install a Ubuntu VM at the moment and my enthusiasm debugging it is meanwhile really low also. Do you have any advice how to proceed? Just in case I'm a blockhead. The commands I compiled rizin with TinyCC:
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So I ran the tests on an Ubuntu 20.04.3 LTS VM and they succeeded. It must be something with Github Actions than. |
also with tinycc? |
Oh, I was stupid. Sorry. Will debug it once I have more time. |
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I haven't really followed here... but if @wargio things is good, I'm ok to merge this as it is anyway quite confined to hexagon code. Please address just this thing first.
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Overall looks good. What bothers me - why you don't use predicates? They are pretty important.
Also, for relocations - could you please add a test specifically for relocations? Like it's done in https://github.com/rizinorg/rizin/pull/1699/files#diff-815fd301b119045a3c4aef6ecbb05174a1d997c1c43cf2b65d4a461ea57bd7b4R114
So for every different type of relocation you implemented, if it's in the test binary - print bytes, print instruction. It's recommended to cross-check your results against readelf
, objdump
, IDA Pro, Binary Ninja, Ghidra.
Good job!
Thank you. I really appreciate the work you guys put into reviewing this.
I quite frankly forgot about them. Will start with the implementation today. Can you give me a hint where rizin uses this information? I can't find a member in
The problem for me is, that tests implementations need a lot of time which I currently not have (e.g. compiling HVX code with the SDK is buggy, building a ELF binary with all implemented relocations is quite hard, as I just start learning about relocations details etc.). |
Almost forgot. Testing the reloc patching is quite hard at the moment since the rebasing is so broken. |
Please also rebase on top of the latest |
Hmm I see. What about, instead of generating code for each property, generating a lookup table in C for some properties? That would shift a bit of the work to the runtime, but probably also compress the entire thing a bit. |
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Mh, I will ponder about this a bit. But for now I will remove unnecessary function calls from it (~3 per instruction). This should drive the memory usage of gcc down quite a bit. @thestr4ng3r Just in case you have time and want to take a quick look at it yourself, in |
It's weird. But I no longer get the problem with >4gb memory usage of gcc (top shows something around 16MB). |
There are a lot of unrelated changes. Thus, I propose:
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Looks good to merge. Please use the better commit name when merging.
…gin design to monolithic; Basic ELF-reloc patching. - Update instruction set to v5-v67 + HVX. - Introduce monolithic plugin architecture to reverse opcodes in the same functions. - Analysis and Asm functionality was previously seperated and let to inconsistensies and incorrectly reversed opcodes. - Add missing system instructions and registers. - Enable search for immediates. - Mark packets of instructions. - Set more analysis data in RzAnalysisOp. - Add basic ELF-reloc patching. - Fix several disassembly and analysis bugs. - Jumps were not aligned to packet begin. - Endloop packets were not marked as such. - Rs.New registers were incorrectly disassembled. - Calling convention was out of date. - Add several formatting configs for the produced disassembly. - Dis/Enable UTF-8. - Print or omit # prefix of immediates. - Print signed immediates with signe or as unsigned integers.
Merge if #2033 is green (excluding the known debug test ASAN failure) |
Fails to build on Windows AppVeyor:
https://ci.appveyor.com/project/rizinorg/rizin/builds/41680793/job/6m3ufxlgdbrqrbi0 |
Failing test with ASAN:
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6942f6c should fix the Windows build. |
The other PR was green. |
Replaces #1338
Your checklist for this pull request
Detailed description
Updates Hexagon
analysis
andasm
plugin.Supports
asm
support for v5-v68 and HVX instructionsNot yet implemented
System registersSystem/Monitor instructionsNo tests yet for HVX instructions and hardware loops.Test plan
See test files.
Closing issues
closes rizinorg/rz-hexagon#13
closes rizinorg/rz-hexagon#15
closes rizinorg/rz-hexagon#17
closes rizinorg/rz-hexagon#18
closes rizinorg/rz-hexagon#19
closes rizinorg/rz-hexagon#21
closes rizinorg/rz-hexagon#22
closes rizinorg/rz-hexagon#24