Wrong absolute addresses due to missing CPU feature selection for M68K.

[Rot127]

Work environment

Questions	Answers
OS/arch/bits (mandatory)	Any
File format of the file you reverse (mandatory)	ELF
Architecture/bits of the file (mandatory)	M68K
rizin -v full output, not truncated (mandatory)	rizin 0.8.0 @ linux-x86-64 commit: 4fc540b (#4662)

Expected behavior

The M68K disassembler selects the correct cpu features and produces effective addresses of the correct bit width.

Actual behavior

With the Capstone v6 update a bug was fixed. It sets the correct address width now.
But by default Capstone chooses a CPU with a bit width of 24bits, not 32bits.

Because Rizin doesn't support different CPU version for M68K, some absolute addresses are off.

E.g. subi.l 0x15b119, d0 instead of subi.l 0x8015b119, d0 (see: test/db/formats/elf/m68k).

Steps to reproduce the behavior

• Please share the binary if it is shareable by drag and dropping it here in a zip archive (mandatory)
• Use Asciinema to describe the issue and share the link here (mandatory if you can't share the binary)
• Use code markdown CODE to make your code visible
• Or even better, create a Pull Request containing the test case in the test/ folder. See, for example, test/db/cmd/cmd_search.
• If the test requies to use the binary of some kind, please create a Pull Request to the rizinorg/rizin-testbins repository.

See test/db/formats/elf/m68k.

Additional Logs, screenshots, source code, configuration dump, ...

This can be fixed with RzArch.