Rename registers

rizinorg · Jun 20, 2023 · 737042c · 737042c
1 parent 67bad7a
commit 737042c
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/librz/analysis/arch/arm/arm_il32.c b/librz/analysis/arch/arm/arm_il32.c
@@ -1274,13 +1274,13 @@ static RzILOpEffect *msr(cs_insn *insn, bool is_thumb) {
 	bool update_f = false;
 	bool update_s = false;
 	switch (dst->reg) {
-	case ARM_SYSREG_APSR_NZCVQ:
+	case ARM_MCLASSSYSREG_APSR_NZCVQ:
 		update_f = true;
 		break;
-	case ARM_SYSREG_APSR_G:
+	case ARM_MCLASSSYSREG_APSR_G:
 		update_s = true;
 		break;
-	case ARM_SYSREG_APSR_NZCVQG:
+	case ARM_MCLASSSYSREG_APSR_NZCVQG:
 		update_f = true;
 		update_s = true;
 		break;