Add support for: v5-v68+HVX, System instructions/register; Change plu…

…gin design to monolithic; Basic ELF-reloc patching.

- Update instruction set to v5-v67 + HVX.
- Introduce monolithic plugin architecture to reverse opcodes in the same functions.
  - Analysis and Asm functionality was previously seperated and let to inconsistensies and incorrectly reversed opcodes.
- Add missing system instructions and registers.
- Enable search for immediates.
- Mark packets of instructions.
- Set more analysis data in RzAnalysisOp.
- Add basic ELF-reloc patching.
- Fix several disassembly and analysis bugs.
  - Jumps were not aligned to packet begin.
  - Endloop packets were not marked as such.
  - Rs.New registers were incorrectly disassembled.
  - Calling convention was out of date.
- Add several formatting configs for the produced disassembly.
  - Dis/Enable UTF-8.
  - Print or omit # prefix of immediates.
  - Print signed immediates with signe or as unsigned integers.

librz/analysis/d/cc-hexagon-32.sdb.txt

@@ -9,3 +9,23 @@ cc.hexagon.arg4=r4
 cc.hexagon.arg5=r5
 cc.hexagon.argn=stack_rev
 cc.hexagon.ret=r0
+
+hvx=cc
+cc.hvx.name=hvx
+cc.hvx.arg0=v0
+cc.hvx.arg1=v1
+cc.hvx.arg2=v2
+cc.hvx.arg3=v3
+cc.hvx.arg4=v4
+cc.hvx.arg5=v5
+cc.hvx.arg6=v6
+cc.hvx.arg7=v7
+cc.hvx.arg8=v8
+cc.hvx.arg9=v9
+cc.hvx.arg10=v10
+cc.hvx.arg11=v11
+cc.hvx.arg12=v12
+cc.hvx.arg13=v13
+cc.hvx.arg14=v14
+cc.hvx.arg15=v15
+cc.hvx.ret=v0

librz/analysis/d/meson.build

@@ -3,6 +3,7 @@ sdb_files = [
   'cc-arm-32',
   'cc-arm-64',
   'cc-avr-8',
+  'cc-hexagon-32',
   'cc-m68k-32',
   'cc-mips-32',
   'cc-mips-64',

librz/analysis/meson.build

@@ -99,15 +99,12 @@ rz_analysis_sources = [
   'p/analysis_xtensa.c',
   'p/analysis_z80.c',
   #'arch/gb/meta_gb_cmt.c',
-  'arch/hexagon/hexagon_analysis.c',
   '../asm/arch/amd29k/amd29k.c',
   '../asm/arch/arm/winedbg/be_arm.c',
   '../asm/arch/avr/disassembler.c',
   '../asm/arch/cr16/cr16_disas.c',
   '../asm/arch/ebc/ebc_disas.c',
   '../asm/arch/h8300/h8300_disas.c',
-  '../asm/arch/hexagon/hexagon.c',
-  '../asm/arch/hexagon/hexagon_disas.c',
   '../asm/arch/java/jvm.c',
   '../asm/arch/mcore/mcore.c',
   '../asm/arch/msp430/msp430_disas.c',
@@ -172,7 +169,6 @@ rz_analysis_inc = [
   platform_inc,
   include_directories(
     'arch/gb',
-    'arch/hexagon',
   )
 ]