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 |<span id="bruno-levy-episode-1">**learn-FPGA episode I: from blinky to RISC-V**</span>|[BrunoLevy](https://github.com/BrunoLevy)|A beginner's introduction to the digital design of a RISC-V softcore on FPGAs. Episode I gently starts from a very basic blinker in Verilog and morphs it step by step into a basic yet fully functional RISC-V SoC. It also explains how to write programs in C and assembly for the SoC.<i><br><br><ins>Topics</ins>: Digital design, FPGA, C Programming, RISC-V assembly<br><ins>Requirement</ins>: Basic knowledge of Verilog</i>|<a href="https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/README.md" target="_blank">[GitHub]</a>| 2024-01-10 |
 |**Hands-on RISC-V Processor Design**|[Rahul Behl](https://github.com/raulbehl)|This practical tutorial offers a deep dive into the world of computer architecture and processor design, with a specific focus on the RISC-V Instruction Set Architecture (ISA).<i><br><br><ins>Topics</ins>: Computer architecture, Processor design, RISC-V Instruction Set Architecture (ISA), SystemVerilog, RISC-V assembly<br><ins>Requirements</ins>: SystemVerilog but not necessary</i>|<a href="https://quicksilicon.in/course/riscv" target="_blank">[webpage]</a> | 2024-01-10 |
 |**LinuxFoundationX: Building a RISC-V CPU Core** | [Steve Hoover](https://www.edx.org/bio/steve-hoover) | This free EdX course by Steve Hoover (founder of Redwood EDA) is a great way for a beginner to get started with digital logic design and basic RISC-V microarchitecture design with the help of modern, freely available open source tools.<i><br><br><ins>Topics</ins>: Digital logic design, RISC-V Instruction Set Architecture (ISA), CPU microarchitecture, Transaction-Level Verilog, Makerchip online IDE</i>| <a href="https://www.edx.org/learn/design/the-linux-foundation-building-a-risc-v-cpu-core" target="_blank"> [edX Course Link] | 2024-01-10 |
-|**An introduction to Assembly Programming with RISC-V** | [Prof. Edson Borin](https://www.ic.unicamp.br/~edson/index.html) | A practical guidance to develop RISC-V operating systems<i><br><br><ins>Topics</ins>: RISC-V Instruction Set Architecture (ISA), Operating systems<br><ins>Requirements</ins>: C programming, Data structures, Linux commands</i>| <a href="https://github.com/plctlab/riscv-operating-system-mooc" target="_blank"> [Teaching resources]<a href="https://www.bilibili.com/video/BV1Q5411w7z5" target="_blank"> [Online course videos in Chineses] | 2024-03-05 |
+|**An introduction to Assembly Programming with RISC-V** | [Prof. Edson Borin](https://www.ic.unicamp.br/~edson/index.html) | This book uses RISC-V ISA to teach fundamental assembly programming concepts.<i><br><br><ins>Topics</ins>: RISC-V Instruction Set Architecture (ISA), RISC-V assembly</i>| <a href="https://www.ic.unicamp.br/~edson/riscv-book.html" target="_blank"> [webpage]| 2024-03-05 |
 |**Step-by-step RISC-V OS development** | [Chen Wang](https://github.com/unicornx) | A practical guidance to develop RISC-V operating systems<i><br><br><ins>Topics</ins>: RISC-V Instruction Set Architecture (ISA), Operating systems<br><ins>Requirements</ins>: C programming, Data structures, Linux commands</i>| <a href="https://github.com/plctlab/riscv-operating-system-mooc" target="_blank"> [Teaching resources]<a href="https://www.bilibili.com/video/BV1Q5411w7z5" target="_blank"> [Online course videos in Chineses] | 2024-03-05 |
 
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