From a5f9165c34938f54c71c09a0713de95d9f758757 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 4 Feb 2023 20:57:13 -0800 Subject: [PATCH 1/6] Pass dtb_file directly to make_dtb --- riscv/sim.cc | 11 +++++------ riscv/sim.h | 3 +-- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/riscv/sim.cc b/riscv/sim.cc index 051a4832a8..3154cba4af 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -45,7 +45,6 @@ sim_t::sim_t(const cfg_t *cfg, bool halted, mems(mems), plugin_devices(plugin_devices), procs(std::max(cfg->nprocs(), size_t(1))), - dtb_file(dtb_file ? dtb_file : ""), dtb_enabled(dtb_enabled), log_file(log_path), cmd_file(cmd_file), @@ -102,7 +101,7 @@ sim_t::sim_t(const cfg_t *cfg, bool halted, log_file.get(), sout_); } - make_dtb(); + make_dtb(dtb_file); void *fdt = (void *)dtb.c_str(); @@ -293,10 +292,10 @@ bool sim_t::mmio_store(reg_t paddr, size_t len, const uint8_t* bytes) return bus.store(paddr, len, bytes); } -void sim_t::make_dtb() +void sim_t::make_dtb(const char* dtb_file) { - if (!dtb_file.empty()) { - std::ifstream fin(dtb_file.c_str(), std::ios::binary); + if (dtb_file) { + std::ifstream fin(dtb_file, std::ios::binary); if (!fin.good()) { std::cerr << "can't find dtb file: " << dtb_file << std::endl; exit(-1); @@ -317,7 +316,7 @@ void sim_t::make_dtb() int fdt_code = fdt_check_header(dtb.c_str()); if (fdt_code) { std::cerr << "Failed to read DTB from "; - if (dtb_file.empty()) { + if (!dtb_file) { std::cerr << "auto-generated DTS string"; } else { std::cerr << "`" << dtb_file << "'"; diff --git a/riscv/sim.h b/riscv/sim.h index 350d82f4d1..9194a21eb4 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -66,7 +66,6 @@ class sim_t : public htif_t, public simif_t std::pair initrd_range; std::string dts; std::string dtb; - std::string dtb_file; bool dtb_enabled; std::unique_ptr boot_rom; std::unique_ptr clint; @@ -96,7 +95,7 @@ class sim_t : public htif_t, public simif_t char* addr_to_mem(reg_t paddr); bool mmio_load(reg_t paddr, size_t len, uint8_t* bytes); bool mmio_store(reg_t paddr, size_t len, const uint8_t* bytes); - void make_dtb(); + void make_dtb(const char* dtb_file); void set_rom(); const char* get_symbol(uint64_t paddr); From 736a915b5de0bc204be2072a4c137aaa554d0d29 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 4 Feb 2023 21:14:21 -0800 Subject: [PATCH 2/6] Don't reset sim_t if there is no dts for get_dts Before 3b26740, the reset was necessary because sim_t::get_dts would be called before sim_t::make_dtb was called in reset(). This is no longer necessary since now `make_dtb` is called in the constructor of sim_t --- riscv/sim.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/sim.h b/riscv/sim.h index 9194a21eb4..73fa0da042 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -49,7 +49,7 @@ class sim_t : public htif_t, public simif_t void set_remote_bitbang(remote_bitbang_t* remote_bitbang) { this->remote_bitbang = remote_bitbang; } - const char* get_dts() { if (dts.empty()) reset(); return dts.c_str(); } + const char* get_dts() { return dts.c_str(); } processor_t* get_core(size_t i) { return procs.at(i); } unsigned nprocs() const { return procs.size(); } From 0f7946243ee9163bf79eb967ac1d241992c66a50 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 13:30:51 -0800 Subject: [PATCH 3/6] Set cfg-provided processor_t.pmp_num before parsing the dtb This makes proc_t respect cfg->pmpregions even if no dtb parsing is performed --- riscv/processor.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/processor.cc b/riscv/processor.cc index b3d2467ecf..b9fbd32501 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -58,7 +58,7 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg, register_extension(e.second); set_pmp_granularity(1 << PMP_SHIFT); - set_pmp_num(state.max_pmp); + set_pmp_num(cfg->pmpregions); if (isa->get_max_xlen() == 32) set_mmu_capability(IMPL_MMU_SV32); From d417d53f9a02cb21ed41ffe60938e02bc4c33bb7 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 13:31:37 -0800 Subject: [PATCH 4/6] Use sv57 paging for rv64 configurations The DTS-based configuration already switched the default to sv57, This just changes the processor_t constructor to match --- riscv/processor.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/processor.cc b/riscv/processor.cc index b9fbd32501..b0d052c7a4 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -63,7 +63,7 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg, if (isa->get_max_xlen() == 32) set_mmu_capability(IMPL_MMU_SV32); else if (isa->get_max_xlen() == 64) - set_mmu_capability(IMPL_MMU_SV48); + set_mmu_capability(IMPL_MMU_SV57); set_impl(IMPL_MMU_ASID, true); set_impl(IMPL_MMU_VMID, true); From 85cb2d944cd386702c32e823ebeed73389d632ec Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 4 Feb 2023 21:27:00 -0800 Subject: [PATCH 5/6] Skip all dts/dtb-related steps if !dtb_enabled !dtb_enabled will now result in the following behavior: * sim_t.dts and sim_t.dtb will be empty * the dtb_file passed to sim_t will be ignored * The default bootrom will not be instantiated * Bus devices normally configured by parsing the dtb will not be added This includes the CLINT/PLIC/UART --- riscv/sim.cc | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/riscv/sim.cc b/riscv/sim.cc index 3154cba4af..d4400a9620 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -101,6 +101,10 @@ sim_t::sim_t(const cfg_t *cfg, bool halted, log_file.get(), sout_); } + // When running without using a dtb, skip the fdt-based configuration steps + if (!dtb_enabled) return; + + // Load dtb_file if provided, otherwise self-generate a dts/dtb make_dtb(dtb_file); void *fdt = (void *)dtb.c_str(); From 79d5b9af45877f0a802105d7d4f572003cf63a3f Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 13:36:40 -0800 Subject: [PATCH 6/6] Avoid magic number in dts generation's default pmpgranularity --- riscv/dts.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/dts.cc b/riscv/dts.cc index 461288622c..acedde857f 100644 --- a/riscv/dts.cc +++ b/riscv/dts.cc @@ -61,7 +61,7 @@ std::string make_dts(size_t insns_per_rtc_tick, size_t cpu_hz, " riscv,isa = \"" << procs[i]->get_isa().get_isa_string() << "\";\n" " mmu-type = \"riscv," << (procs[i]->get_isa().get_max_xlen() <= 32 ? "sv32" : "sv57") << "\";\n" " riscv,pmpregions = <" << pmpregions << ">;\n" - " riscv,pmpgranularity = <4>;\n" + " riscv,pmpgranularity = <" << (1 << PMP_SHIFT) << ">;\n" " clock-frequency = <" << cpu_hz << ">;\n" " CPU" << i << "_intc: interrupt-controller {\n" " #address-cells = <2>;\n"