From fff2699cfdcf9a2fe7e004ca92c299a2c11c37a1 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Sat, 17 Jun 2023 14:25:27 -0700
Subject: [PATCH 1/5] Remove instructions that belong only to Xbitmanip

---
 riscv/insns/bcompress.h    |  9 --------
 riscv/insns/bcompressw.h   | 10 ---------
 riscv/insns/bdecompress.h  |  9 --------
 riscv/insns/bdecompressw.h | 10 ---------
 riscv/insns/bfp.h          | 10 ---------
 riscv/insns/bfpw.h         |  9 --------
 riscv/insns/bmatflip.h     | 11 ----------
 riscv/insns/bmator.h       | 29 --------------------------
 riscv/insns/bmatxor.h      | 29 --------------------------
 riscv/insns/clmulhw.h      |  6 ------
 riscv/insns/clmulrw.h      |  6 ------
 riscv/insns/clmulw.h       |  6 ------
 riscv/insns/cmov.h         |  2 --
 riscv/insns/crc32_b.h      |  5 -----
 riscv/insns/crc32_d.h      |  6 ------
 riscv/insns/crc32_h.h      |  5 -----
 riscv/insns/crc32_w.h      |  5 -----
 riscv/insns/crc32c_b.h     |  5 -----
 riscv/insns/crc32c_d.h     |  6 ------
 riscv/insns/crc32c_h.h     |  5 -----
 riscv/insns/crc32c_w.h     |  5 -----
 riscv/insns/fsl.h          |  9 --------
 riscv/insns/fslw.h         | 10 ---------
 riscv/insns/fsriw.h        | 10 ---------
 riscv/insns/gorc.h         | 10 ---------
 riscv/insns/gorciw.h       | 11 ----------
 riscv/insns/gorcw.h        | 10 ---------
 riscv/insns/grev.h         | 10 ---------
 riscv/insns/greviw.h       | 11 ----------
 riscv/insns/grevw.h        | 10 ---------
 riscv/insns/packuw.h       |  5 -----
 riscv/insns/shfl.h         |  9 --------
 riscv/insns/shflw.h        |  9 --------
 riscv/insns/slo.h          |  2 --
 riscv/insns/sloi.h         |  3 ---
 riscv/insns/sloiw.h        |  3 ---
 riscv/insns/slow.h         |  3 ---
 riscv/insns/sro.h          |  2 --
 riscv/insns/sroi.h         |  3 ---
 riscv/insns/sroiw.h        |  3 ---
 riscv/insns/srow.h         |  3 ---
 riscv/insns/unshfl.h       |  9 --------
 riscv/insns/unshflw.h      |  9 --------
 riscv/insns/xperm16.h      |  2 --
 riscv/insns/xperm32.h      |  3 ---
 riscv/overlap_list.h       |  1 -
 riscv/riscv.mk.in          | 42 --------------------------------------
 47 files changed, 390 deletions(-)
 delete mode 100644 riscv/insns/bcompress.h
 delete mode 100644 riscv/insns/bcompressw.h
 delete mode 100644 riscv/insns/bdecompress.h
 delete mode 100644 riscv/insns/bdecompressw.h
 delete mode 100644 riscv/insns/bfp.h
 delete mode 100644 riscv/insns/bfpw.h
 delete mode 100644 riscv/insns/bmatflip.h
 delete mode 100644 riscv/insns/bmator.h
 delete mode 100644 riscv/insns/bmatxor.h
 delete mode 100644 riscv/insns/clmulhw.h
 delete mode 100644 riscv/insns/clmulrw.h
 delete mode 100644 riscv/insns/clmulw.h
 delete mode 100644 riscv/insns/cmov.h
 delete mode 100644 riscv/insns/crc32_b.h
 delete mode 100644 riscv/insns/crc32_d.h
 delete mode 100644 riscv/insns/crc32_h.h
 delete mode 100644 riscv/insns/crc32_w.h
 delete mode 100644 riscv/insns/crc32c_b.h
 delete mode 100644 riscv/insns/crc32c_d.h
 delete mode 100644 riscv/insns/crc32c_h.h
 delete mode 100644 riscv/insns/crc32c_w.h
 delete mode 100644 riscv/insns/fsl.h
 delete mode 100644 riscv/insns/fslw.h
 delete mode 100644 riscv/insns/fsriw.h
 delete mode 100644 riscv/insns/gorc.h
 delete mode 100644 riscv/insns/gorciw.h
 delete mode 100644 riscv/insns/gorcw.h
 delete mode 100644 riscv/insns/grev.h
 delete mode 100644 riscv/insns/greviw.h
 delete mode 100644 riscv/insns/grevw.h
 delete mode 100644 riscv/insns/packuw.h
 delete mode 100644 riscv/insns/shfl.h
 delete mode 100644 riscv/insns/shflw.h
 delete mode 100644 riscv/insns/slo.h
 delete mode 100644 riscv/insns/sloi.h
 delete mode 100644 riscv/insns/sloiw.h
 delete mode 100644 riscv/insns/slow.h
 delete mode 100644 riscv/insns/sro.h
 delete mode 100644 riscv/insns/sroi.h
 delete mode 100644 riscv/insns/sroiw.h
 delete mode 100644 riscv/insns/srow.h
 delete mode 100644 riscv/insns/unshfl.h
 delete mode 100644 riscv/insns/unshflw.h
 delete mode 100644 riscv/insns/xperm16.h
 delete mode 100644 riscv/insns/xperm32.h

diff --git a/riscv/insns/bcompress.h b/riscv/insns/bcompress.h
deleted file mode 100644
index 579346f463..0000000000
--- a/riscv/insns/bcompress.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_extension(EXT_XZBE);
-uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2);
-while (mask) {
-	uint64_t b = mask & ~((mask | (mask-1)) + 1);
-	c |= (data & b) >> (ctz(b) - i);
-	i += popcount(b);
-	mask -= b;
-}
-WRITE_RD(sext_xlen(c));
diff --git a/riscv/insns/bcompressw.h b/riscv/insns/bcompressw.h
deleted file mode 100644
index 2c1017cd17..0000000000
--- a/riscv/insns/bcompressw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBE);
-uint64_t c = 0, i = 0, data = zext32(RS1), mask = zext32(RS2);
-while (mask) {
-	uint64_t b = mask & ~((mask | (mask-1)) + 1);
-	c |= (data & b) >> (ctz(b) - i);
-	i += popcount(b);
-	mask -= b;
-}
-WRITE_RD(sext32(c));
diff --git a/riscv/insns/bdecompress.h b/riscv/insns/bdecompress.h
deleted file mode 100644
index 2894be0143..0000000000
--- a/riscv/insns/bdecompress.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_extension(EXT_XZBE);
-uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2);
-while (mask) {
-	uint64_t b = mask & ~((mask | (mask-1)) + 1);
-	c |= (data << (ctz(b) - i)) & b;
-	i += popcount(b);
-	mask -= b;
-}
-WRITE_RD(sext_xlen(c));
diff --git a/riscv/insns/bdecompressw.h b/riscv/insns/bdecompressw.h
deleted file mode 100644
index 468a7260ae..0000000000
--- a/riscv/insns/bdecompressw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBE);
-uint64_t c = 0, i = 0, data = zext32(RS1), mask = zext32(RS2);
-while (mask) {
-	uint64_t b = mask & ~((mask | (mask-1)) + 1);
-	c |= (data << (ctz(b) - i)) & b;
-	i += popcount(b);
-	mask -= b;
-}
-WRITE_RD(sext32(c));
diff --git a/riscv/insns/bfp.h b/riscv/insns/bfp.h
deleted file mode 100644
index 886d840531..0000000000
--- a/riscv/insns/bfp.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_extension(EXT_XZBF);
-reg_t cfg = RS2 >> (xlen/2);
-if ((cfg >> 30) == 2)
-	cfg = cfg >> 16;
-int len = (cfg >> 8) & (xlen/2-1);
-int off = cfg & (xlen-1);
-len = len ? len : xlen/2;
-reg_t mask = ~(~reg_t(0) << len) << off;
-reg_t data = RS2 << off;
-WRITE_RD(sext_xlen((data & mask) | (RS1 & ~mask)));
diff --git a/riscv/insns/bfpw.h b/riscv/insns/bfpw.h
deleted file mode 100644
index 42479e72f4..0000000000
--- a/riscv/insns/bfpw.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBF);
-reg_t cfg = RS2 >> 16;
-int len = (cfg >> 8) & 15;
-int off = cfg & 31;
-len = len ? len : 16;
-reg_t mask = ~(~reg_t(0) << len) << off;
-reg_t data = RS2 << off;
-WRITE_RD(sext32((data & mask) | (RS1 & ~mask)));
diff --git a/riscv/insns/bmatflip.h b/riscv/insns/bmatflip.h
deleted file mode 100644
index c10df8f9a1..0000000000
--- a/riscv/insns/bmatflip.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBM);
-reg_t x = RS1;
-for (int i = 0; i < 3; i++) {
-	x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
-	x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >>  8) | ((x & 0x0000FF000000FF00LL) <<  8);
-	x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >>  4) | ((x & 0x00F000F000F000F0LL) <<  4);
-	x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >>  2) | ((x & 0x0C0C0C0C0C0C0C0CLL) <<  2);
-	x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >>  1) | ((x & 0x2222222222222222LL) <<  1);
-}
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/bmator.h b/riscv/insns/bmator.h
deleted file mode 100644
index 33057ca04e..0000000000
--- a/riscv/insns/bmator.h
+++ /dev/null
@@ -1,29 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBM);
-
-// transpose of rs2
-int64_t rs2t = RS2;
-for (int i = 0; i < 3; i++) {
-  rs2t = (rs2t & 0xFFFF00000000FFFFLL) | ((rs2t & 0x0000FFFF00000000LL) >> 16) | ((rs2t & 0x00000000FFFF0000LL) << 16);
-  rs2t = (rs2t & 0xFF0000FFFF0000FFLL) | ((rs2t & 0x00FF000000FF0000LL) >>  8) | ((rs2t & 0x0000FF000000FF00LL) <<  8);
-  rs2t = (rs2t & 0xF00FF00FF00FF00FLL) | ((rs2t & 0x0F000F000F000F00LL) >>  4) | ((rs2t & 0x00F000F000F000F0LL) <<  4);
-  rs2t = (rs2t & 0xC3C3C3C3C3C3C3C3LL) | ((rs2t & 0x3030303030303030LL) >>  2) | ((rs2t & 0x0C0C0C0C0C0C0C0CLL) <<  2);
-  rs2t = (rs2t & 0x9999999999999999LL) | ((rs2t & 0x4444444444444444LL) >>  1) | ((rs2t & 0x2222222222222222LL) <<  1);
-}
-
-int64_t rs1 = RS1;
-uint8_t u[8]; // rows of rs1
-uint8_t v[8]; // cols of rs2
-
-for (int i = 0; i < 8; i++) {
-  u[i] = rs1 >> (i*8);
-  v[i] = rs2t >> (i*8);
-}
-
-uint64_t x = 0;
-for (int i = 0; i < 64; i++) {
-  if ((u[i / 8] & v[i % 8]) != 0)
-    x |= 1LL << i;
-}
-
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/bmatxor.h b/riscv/insns/bmatxor.h
deleted file mode 100644
index ca2d096715..0000000000
--- a/riscv/insns/bmatxor.h
+++ /dev/null
@@ -1,29 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBM);
-
-// transpose of rs2
-int64_t rs2t = RS2;
-for (int i = 0; i < 3; i++) {
-  rs2t = (rs2t & 0xFFFF00000000FFFFLL) | ((rs2t & 0x0000FFFF00000000LL) >> 16) | ((rs2t & 0x00000000FFFF0000LL) << 16);
-  rs2t = (rs2t & 0xFF0000FFFF0000FFLL) | ((rs2t & 0x00FF000000FF0000LL) >>  8) | ((rs2t & 0x0000FF000000FF00LL) <<  8);
-  rs2t = (rs2t & 0xF00FF00FF00FF00FLL) | ((rs2t & 0x0F000F000F000F00LL) >>  4) | ((rs2t & 0x00F000F000F000F0LL) <<  4);
-  rs2t = (rs2t & 0xC3C3C3C3C3C3C3C3LL) | ((rs2t & 0x3030303030303030LL) >>  2) | ((rs2t & 0x0C0C0C0C0C0C0C0CLL) <<  2);
-  rs2t = (rs2t & 0x9999999999999999LL) | ((rs2t & 0x4444444444444444LL) >>  1) | ((rs2t & 0x2222222222222222LL) <<  1);
-}
-
-int64_t rs1 = RS1;
-uint8_t u[8]; // rows of rs1
-uint8_t v[8]; // cols of rs2
-
-for (int i = 0; i < 8; i++) {
-  u[i] = rs1 >> (i*8);
-  v[i] = rs2t >> (i*8);
-}
-
-uint64_t x = 0;
-for (int i = 0; i < 64; i++) {
-  if (popcount(u[i / 8] & v[i % 8]) & 1)
-    x |= 1LL << i;
-}
-
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/clmulhw.h b/riscv/insns/clmulhw.h
deleted file mode 100644
index f41acb0e83..0000000000
--- a/riscv/insns/clmulhw.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_extension(EXT_XZBC);
-reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
-for (int i = 1; i < 32; i++)
-  if ((b >> i) & 1)
-    x ^= a >> (32-i);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/clmulrw.h b/riscv/insns/clmulrw.h
deleted file mode 100644
index 784859ae74..0000000000
--- a/riscv/insns/clmulrw.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_extension(EXT_XZBC);
-reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
-for (int i = 0; i < 32; i++)
-  if ((b >> i) & 1)
-    x ^= a >> (31-i);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/clmulw.h b/riscv/insns/clmulw.h
deleted file mode 100644
index 5bb753fe3d..0000000000
--- a/riscv/insns/clmulw.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_extension(EXT_XZBC);
-reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
-for (int i = 0; i < 32; i++)
-  if ((b >> i) & 1)
-    x ^= a << i;
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/cmov.h b/riscv/insns/cmov.h
deleted file mode 100644
index c7551bc645..0000000000
--- a/riscv/insns/cmov.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_extension(EXT_XZBT);
-WRITE_RD(RS2 ? RS1 : RS3);
diff --git a/riscv/insns/crc32_b.h b/riscv/insns/crc32_b.h
deleted file mode 100644
index 3111fe5728..0000000000
--- a/riscv/insns/crc32_b.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 8; i++)
-  x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/crc32_d.h b/riscv/insns/crc32_d.h
deleted file mode 100644
index 7fd7a38f2b..0000000000
--- a/riscv/insns/crc32_d.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 64; i++)
-  x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/crc32_h.h b/riscv/insns/crc32_h.h
deleted file mode 100644
index 5063fefd6d..0000000000
--- a/riscv/insns/crc32_h.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 16; i++)
-  x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/crc32_w.h b/riscv/insns/crc32_w.h
deleted file mode 100644
index 6e425ab8d9..0000000000
--- a/riscv/insns/crc32_w.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 32; i++)
-  x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/crc32c_b.h b/riscv/insns/crc32c_b.h
deleted file mode 100644
index d11b0dda87..0000000000
--- a/riscv/insns/crc32c_b.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 8; i++)
-  x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/crc32c_d.h b/riscv/insns/crc32c_d.h
deleted file mode 100644
index 81175fd9c1..0000000000
--- a/riscv/insns/crc32c_d.h
+++ /dev/null
@@ -1,6 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 64; i++)
-  x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/crc32c_h.h b/riscv/insns/crc32c_h.h
deleted file mode 100644
index ef5817d99e..0000000000
--- a/riscv/insns/crc32c_h.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 16; i++)
-  x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/crc32c_w.h b/riscv/insns/crc32c_w.h
deleted file mode 100644
index 8793540297..0000000000
--- a/riscv/insns/crc32c_w.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_extension(EXT_XZBR);
-reg_t x = zext_xlen(RS1);
-for (int i = 0; i < 32; i++)
-  x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/fsl.h b/riscv/insns/fsl.h
deleted file mode 100644
index 53a21608d9..0000000000
--- a/riscv/insns/fsl.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_extension(EXT_XZBT);
-int shamt = RS2 & (2*xlen-1);
-reg_t a = RS1, b = RS3;
-if (shamt >= xlen) {
-	a = RS3, b = RS1;
-	shamt -= xlen;
-}
-int rshamt = -shamt & (xlen-1);
-WRITE_RD(sext_xlen(shamt ? (a << shamt) | (zext_xlen(b) >> rshamt) : a));
diff --git a/riscv/insns/fslw.h b/riscv/insns/fslw.h
deleted file mode 100644
index 83940105b8..0000000000
--- a/riscv/insns/fslw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBT);
-int shamt = RS2 & 63;
-reg_t a = RS1, b = RS3;
-if (shamt >= 32) {
-	a = RS3, b = RS1;
-	shamt -= 32;
-}
-int rshamt = -shamt & 31;
-WRITE_RD(sext32(shamt ? (a << shamt) | (zext32(b) >> rshamt) : a));
diff --git a/riscv/insns/fsriw.h b/riscv/insns/fsriw.h
deleted file mode 100644
index 7956de7ce7..0000000000
--- a/riscv/insns/fsriw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBT);
-int shamt = SHAMT & 63;
-reg_t a = RS1, b = RS3;
-if (shamt >= 32) {
-	a = RS3, b = RS1;
-	shamt -= 32;
-}
-int rshamt = -shamt & 31;
-WRITE_RD(sext32(shamt ? (b << rshamt) | (zext32(a) >> shamt) : a));
diff --git a/riscv/insns/gorc.h b/riscv/insns/gorc.h
deleted file mode 100644
index ffe441347d..0000000000
--- a/riscv/insns/gorc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & (xlen-1);
-if (shamt &  1) x |= ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
-if (shamt &  2) x |= ((x & 0x3333333333333333LL) <<  2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >>  2);
-if (shamt &  4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) <<  4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >>  4);
-if (shamt &  8) x |= ((x & 0x00FF00FF00FF00FFLL) <<  8) | ((x & 0xFF00FF00FF00FF00LL) >>  8);
-if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
-if (shamt & 32) x |= ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32);
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/gorciw.h b/riscv/insns/gorciw.h
deleted file mode 100644
index 44ade807ea..0000000000
--- a/riscv/insns/gorciw.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-require(SHAMT < 32);
-reg_t x = RS1;
-int shamt = SHAMT;
-if (shamt &  1) x |= ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
-if (shamt &  2) x |= ((x & 0x3333333333333333LL) <<  2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >>  2);
-if (shamt &  4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) <<  4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >>  4);
-if (shamt &  8) x |= ((x & 0x00FF00FF00FF00FFLL) <<  8) | ((x & 0xFF00FF00FF00FF00LL) >>  8);
-if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/gorcw.h b/riscv/insns/gorcw.h
deleted file mode 100644
index 611b3caa43..0000000000
--- a/riscv/insns/gorcw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & 31;
-if (shamt &  1) x |= ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
-if (shamt &  2) x |= ((x & 0x3333333333333333LL) <<  2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >>  2);
-if (shamt &  4) x |= ((x & 0x0F0F0F0F0F0F0F0FLL) <<  4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >>  4);
-if (shamt &  8) x |= ((x & 0x00FF00FF00FF00FFLL) <<  8) | ((x & 0xFF00FF00FF00FF00LL) >>  8);
-if (shamt & 16) x |= ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/grev.h b/riscv/insns/grev.h
deleted file mode 100644
index 7181b3cda8..0000000000
--- a/riscv/insns/grev.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & (xlen-1);
-if (shamt &  1) x = ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
-if (shamt &  2) x = ((x & 0x3333333333333333LL) <<  2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >>  2);
-if (shamt &  4) x = ((x & 0x0F0F0F0F0F0F0F0FLL) <<  4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >>  4);
-if (shamt &  8) x = ((x & 0x00FF00FF00FF00FFLL) <<  8) | ((x & 0xFF00FF00FF00FF00LL) >>  8);
-if (shamt & 16) x = ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
-if (shamt & 32) x = ((x & 0x00000000FFFFFFFFLL) << 32) | ((x & 0xFFFFFFFF00000000LL) >> 32);
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/greviw.h b/riscv/insns/greviw.h
deleted file mode 100644
index 004ecf347c..0000000000
--- a/riscv/insns/greviw.h
+++ /dev/null
@@ -1,11 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-require(SHAMT < 32);
-reg_t x = RS1;
-int shamt = SHAMT;
-if (shamt &  1) x = ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
-if (shamt &  2) x = ((x & 0x3333333333333333LL) <<  2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >>  2);
-if (shamt &  4) x = ((x & 0x0F0F0F0F0F0F0F0FLL) <<  4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >>  4);
-if (shamt &  8) x = ((x & 0x00FF00FF00FF00FFLL) <<  8) | ((x & 0xFF00FF00FF00FF00LL) >>  8);
-if (shamt & 16) x = ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/grevw.h b/riscv/insns/grevw.h
deleted file mode 100644
index 3fbcf228d2..0000000000
--- a/riscv/insns/grevw.h
+++ /dev/null
@@ -1,10 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & 31;
-if (shamt &  1) x = ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
-if (shamt &  2) x = ((x & 0x3333333333333333LL) <<  2) | ((x & 0xCCCCCCCCCCCCCCCCLL) >>  2);
-if (shamt &  4) x = ((x & 0x0F0F0F0F0F0F0F0FLL) <<  4) | ((x & 0xF0F0F0F0F0F0F0F0LL) >>  4);
-if (shamt &  8) x = ((x & 0x00FF00FF00FF00FFLL) <<  8) | ((x & 0xFF00FF00FF00FF00LL) >>  8);
-if (shamt & 16) x = ((x & 0x0000FFFF0000FFFFLL) << 16) | ((x & 0xFFFF0000FFFF0000LL) >> 16);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/packuw.h b/riscv/insns/packuw.h
deleted file mode 100644
index 1b3f7d5f54..0000000000
--- a/riscv/insns/packuw.h
+++ /dev/null
@@ -1,5 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-reg_t lo = zext32(RS1) >> 16;
-reg_t hi = zext32(RS2) >> 16 << 16;
-WRITE_RD(sext32(lo | hi));
diff --git a/riscv/insns/shfl.h b/riscv/insns/shfl.h
deleted file mode 100644
index 3004871e2c..0000000000
--- a/riscv/insns/shfl.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & ((xlen-1) >> 1);
-if (shamt & 16) x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
-if (shamt &  8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >>  8) | ((x & 0x0000FF000000FF00LL) <<  8);
-if (shamt &  4) x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >>  4) | ((x & 0x00F000F000F000F0LL) <<  4);
-if (shamt &  2) x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >>  2) | ((x & 0x0C0C0C0C0C0C0C0CLL) <<  2);
-if (shamt &  1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >>  1) | ((x & 0x2222222222222222LL) <<  1);
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/shflw.h b/riscv/insns/shflw.h
deleted file mode 100644
index 06ee36045e..0000000000
--- a/riscv/insns/shflw.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & 15;
-if (shamt &  8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >>  8) | ((x & 0x0000FF000000FF00LL) <<  8);
-if (shamt &  4) x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >>  4) | ((x & 0x00F000F000F000F0LL) <<  4);
-if (shamt &  2) x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >>  2) | ((x & 0x0C0C0C0C0C0C0C0CLL) <<  2);
-if (shamt &  1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >>  1) | ((x & 0x2222222222222222LL) <<  1);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/slo.h b/riscv/insns/slo.h
deleted file mode 100644
index a27ec37e2e..0000000000
--- a/riscv/insns/slo.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_extension(EXT_XZBP);
-WRITE_RD(sext_xlen(~((~RS1) << (RS2 & (xlen-1)))));
diff --git a/riscv/insns/sloi.h b/riscv/insns/sloi.h
deleted file mode 100644
index 62278b030b..0000000000
--- a/riscv/insns/sloi.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require(SHAMT < xlen);
-require_extension(EXT_XZBP);
-WRITE_RD(sext_xlen(~((~RS1) << SHAMT)));
diff --git a/riscv/insns/sloiw.h b/riscv/insns/sloiw.h
deleted file mode 100644
index 492c94a112..0000000000
--- a/riscv/insns/sloiw.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-WRITE_RD(sext32(~((~RS1) << SHAMT)));
diff --git a/riscv/insns/slow.h b/riscv/insns/slow.h
deleted file mode 100644
index 04c90a45d4..0000000000
--- a/riscv/insns/slow.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-WRITE_RD(sext32(~((~RS1) << (RS2 & 0x1F))));
diff --git a/riscv/insns/sro.h b/riscv/insns/sro.h
deleted file mode 100644
index 3ac050daff..0000000000
--- a/riscv/insns/sro.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_extension(EXT_XZBP);
-WRITE_RD(sext_xlen(~((zext_xlen(~RS1)) >> (RS2 & (xlen-1)))));
diff --git a/riscv/insns/sroi.h b/riscv/insns/sroi.h
deleted file mode 100644
index e878892800..0000000000
--- a/riscv/insns/sroi.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require(SHAMT < xlen);
-require_extension(EXT_XZBP);
-WRITE_RD(sext_xlen(~((zext_xlen(~RS1)) >> SHAMT)));
diff --git a/riscv/insns/sroiw.h b/riscv/insns/sroiw.h
deleted file mode 100644
index 83480705fa..0000000000
--- a/riscv/insns/sroiw.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-WRITE_RD(sext32(~((~(uint32_t)RS1) >> SHAMT)));
diff --git a/riscv/insns/srow.h b/riscv/insns/srow.h
deleted file mode 100644
index 808af8dbbe..0000000000
--- a/riscv/insns/srow.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-WRITE_RD(sext32(~((~(uint32_t)RS1) >> (RS2 & 0x1F))));
diff --git a/riscv/insns/unshfl.h b/riscv/insns/unshfl.h
deleted file mode 100644
index 78990b876f..0000000000
--- a/riscv/insns/unshfl.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & ((xlen-1) >> 1);
-if (shamt &  1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >>  1) | ((x & 0x2222222222222222LL) <<  1);
-if (shamt &  2) x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >>  2) | ((x & 0x0C0C0C0C0C0C0C0CLL) <<  2);
-if (shamt &  4) x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >>  4) | ((x & 0x00F000F000F000F0LL) <<  4);
-if (shamt &  8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >>  8) | ((x & 0x0000FF000000FF00LL) <<  8);
-if (shamt & 16) x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
-WRITE_RD(sext_xlen(x));
diff --git a/riscv/insns/unshflw.h b/riscv/insns/unshflw.h
deleted file mode 100644
index 776534e742..0000000000
--- a/riscv/insns/unshflw.h
+++ /dev/null
@@ -1,9 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-reg_t x = RS1;
-int shamt = RS2 & 15;
-if (shamt &  1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >>  1) | ((x & 0x2222222222222222LL) <<  1);
-if (shamt &  2) x = (x & 0xC3C3C3C3C3C3C3C3LL) | ((x & 0x3030303030303030LL) >>  2) | ((x & 0x0C0C0C0C0C0C0C0CLL) <<  2);
-if (shamt &  4) x = (x & 0xF00FF00FF00FF00FLL) | ((x & 0x0F000F000F000F00LL) >>  4) | ((x & 0x00F000F000F000F0LL) <<  4);
-if (shamt &  8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >>  8) | ((x & 0x0000FF000000FF00LL) <<  8);
-WRITE_RD(sext32(x));
diff --git a/riscv/insns/xperm16.h b/riscv/insns/xperm16.h
deleted file mode 100644
index 6b0ad51f0e..0000000000
--- a/riscv/insns/xperm16.h
+++ /dev/null
@@ -1,2 +0,0 @@
-require_extension(EXT_XZBP);
-WRITE_RD(sext_xlen(xperm(RS1, RS2, 4, xlen)));
diff --git a/riscv/insns/xperm32.h b/riscv/insns/xperm32.h
deleted file mode 100644
index 64d90a406d..0000000000
--- a/riscv/insns/xperm32.h
+++ /dev/null
@@ -1,3 +0,0 @@
-require_rv64;
-require_extension(EXT_XZBP);
-WRITE_RD(xperm(RS1, RS2, 5, xlen));
diff --git a/riscv/overlap_list.h b/riscv/overlap_list.h
index d8b1225866..a30c770e60 100644
--- a/riscv/overlap_list.h
+++ b/riscv/overlap_list.h
@@ -12,4 +12,3 @@ DECLARE_OVERLAP_INSN(c_fsd, EXT_ZCD)
 DECLARE_OVERLAP_INSN(c_ebreak, EXT_ZCA)
 DECLARE_OVERLAP_INSN(c_jalr, EXT_ZCA)
 DECLARE_OVERLAP_INSN(c_jr, EXT_ZCA)
-DECLARE_OVERLAP_INSN(cmov, EXT_XZBT)
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index ac45b2896a..db63290205 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -393,15 +393,6 @@ riscv_insn_ext_q_zfa = \
 riscv_insn_ext_b = \
 	add_uw \
 	andn \
-	bdecompress \
-	bdecompressw \
-	bcompress \
-	bcompressw \
-	bfp \
-	bfpw \
-	bmatflip \
-	bmator \
-	bmatxor \
 	sh1add \
 	sh1add_uw \
 	sh2add \
@@ -414,31 +405,13 @@ riscv_insn_ext_b = \
 	clz \
 	clzw \
 	cmix \
-	cmov \
-	crc32_b \
-	crc32c_b \
-	crc32c_d \
-	crc32c_h \
-	crc32c_w \
-	crc32_d \
-	crc32_h \
-	crc32_w \
 	ctz \
 	ctzw \
-	fsl \
-	fslw \
 	fsr \
 	fsri \
-	fsriw \
 	fsrw \
-	gorc \
 	gorci \
-	gorciw \
-	gorcw \
-	grev \
 	grevi \
-	greviw \
-	grevw \
 	max \
 	maxu \
 	min \
@@ -447,7 +420,6 @@ riscv_insn_ext_b = \
 	pack \
 	packh \
 	packu \
-	packuw \
 	packw \
 	cpop \
 	cpopw \
@@ -467,26 +439,12 @@ riscv_insn_ext_b = \
 	bseti \
 	sext_b \
 	sext_h \
-	shfl \
 	shfli \
-	shflw \
 	slli_uw \
-	slo \
-	sloi \
-	sloiw \
-	slow \
-	sro \
-	sroi \
-	sroiw \
-	srow \
-	unshfl \
 	unshfli \
-	unshflw \
 	xnor \
 	xperm4 \
 	xperm8 \
-	xperm16 \
-	xperm32 \
 
 # Scalar Crypto ISE
 riscv_insn_ext_k = \

From b043cc1d7430d6a4d982aa4d2b07b44dd4b2366c Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Sat, 17 Jun 2023 14:33:42 -0700
Subject: [PATCH 2/5] Remove Xbitmanip from instructions that belong to
 multiple extensions

---
 riscv/insns/cmix.h    | 2 +-
 riscv/insns/fsr.h     | 3 ++-
 riscv/insns/fsri.h    | 3 ++-
 riscv/insns/fsrw.h    | 2 +-
 riscv/insns/gorci.h   | 3 +--
 riscv/insns/grevi.h   | 3 +--
 riscv/insns/pack.h    | 6 +-----
 riscv/insns/packh.h   | 5 +----
 riscv/insns/packu.h   | 4 +---
 riscv/insns/packw.h   | 5 +----
 riscv/insns/shfli.h   | 3 +--
 riscv/insns/unshfli.h | 3 +--
 riscv/insns/xperm4.h  | 2 +-
 riscv/insns/xperm8.h  | 2 +-
 14 files changed, 16 insertions(+), 30 deletions(-)

diff --git a/riscv/insns/cmix.h b/riscv/insns/cmix.h
index 98eb0bca21..f3b79773a9 100644
--- a/riscv/insns/cmix.h
+++ b/riscv/insns/cmix.h
@@ -1,2 +1,2 @@
-require_either_extension(EXT_ZBPBO, EXT_XZBT);
+require_extension(EXT_ZBPBO);
 WRITE_RD((RS1 & RS2) | (RS3 & ~RS2));
diff --git a/riscv/insns/fsr.h b/riscv/insns/fsr.h
index dfb26f11e1..d94f922e96 100644
--- a/riscv/insns/fsr.h
+++ b/riscv/insns/fsr.h
@@ -1,4 +1,5 @@
-require_either_extension(xlen == 32 ? EXT_ZBPBO : EXT_XZBT, EXT_XZBT);
+require_rv32;
+require_extension(EXT_ZBPBO);
 int shamt = RS2 & (2*xlen-1);
 reg_t a = RS1, b = RS3;
 if (shamt >= xlen) {
diff --git a/riscv/insns/fsri.h b/riscv/insns/fsri.h
index f7186f1b6a..ced23642a9 100644
--- a/riscv/insns/fsri.h
+++ b/riscv/insns/fsri.h
@@ -1,4 +1,5 @@
-require_either_extension(xlen == 32 ? EXT_ZBPBO : EXT_XZBT, EXT_XZBT);
+require_rv32;
+require_extension(EXT_ZBPBO);
 int shamt = SHAMT & (2*xlen-1);
 reg_t a = RS1, b = RS3;
 if (shamt >= xlen) {
diff --git a/riscv/insns/fsrw.h b/riscv/insns/fsrw.h
index 494fe260cc..9471e36dcc 100644
--- a/riscv/insns/fsrw.h
+++ b/riscv/insns/fsrw.h
@@ -1,5 +1,5 @@
 require_rv64;
-require_either_extension(EXT_ZBPBO, EXT_XZBT);
+require_extension(EXT_ZBPBO);
 int shamt = RS2 & 63;
 reg_t a = RS1, b = RS3;
 if (shamt >= 32) {
diff --git a/riscv/insns/gorci.h b/riscv/insns/gorci.h
index d3017f499e..a4656faa03 100644
--- a/riscv/insns/gorci.h
+++ b/riscv/insns/gorci.h
@@ -1,6 +1,5 @@
 // Zbb contains orc.b but not general gorci
-require(((SHAMT == 7) && p->extension_enabled(EXT_ZBB))
-  || p->extension_enabled(EXT_XZBP));
+require(((SHAMT == 7) && p->extension_enabled(EXT_ZBB)));
 require(SHAMT < xlen);
 reg_t x = RS1;
 int shamt = SHAMT;
diff --git a/riscv/insns/grevi.h b/riscv/insns/grevi.h
index d4718145b4..c37f59b467 100644
--- a/riscv/insns/grevi.h
+++ b/riscv/insns/grevi.h
@@ -4,8 +4,7 @@ int shamt = SHAMT;
 require(((shamt == xlen - 8) && (p->extension_enabled(EXT_ZBB) || p->extension_enabled(EXT_ZBKB))) //rev8
   || ((shamt == 7) && p->extension_enabled(EXT_ZBKB)) // rev8.b
   || ((shamt == 8) && p->extension_enabled(EXT_ZPN)) // rev8.h
-  || ((shamt == xlen - 1) && p->extension_enabled(EXT_ZPN)) // rev
-  || p->extension_enabled(EXT_XZBP));
+  || ((shamt == xlen - 1) && p->extension_enabled(EXT_ZPN)));
 require(shamt < xlen);
 reg_t x = RS1;
 if (shamt &  1) x = ((x & 0x5555555555555555LL) <<  1) | ((x & 0xAAAAAAAAAAAAAAAALL) >>  1);
diff --git a/riscv/insns/pack.h b/riscv/insns/pack.h
index 2140f918d0..0622b92291 100644
--- a/riscv/insns/pack.h
+++ b/riscv/insns/pack.h
@@ -1,11 +1,7 @@
 // RV32Zbb contains zext.h but not general pack
 require(((xlen == 32) && (insn.rs2() == 0) && p->extension_enabled(EXT_ZBB))
   || p->extension_enabled(EXT_ZPN)
-  || p->extension_enabled(EXT_ZBKB)
-  || p->extension_enabled(EXT_XZBP)
-  || p->extension_enabled(EXT_XZBE)
-  || p->extension_enabled(EXT_XZBF)
-  || ((xlen == 64) && p->extension_enabled(EXT_XZBM)));
+  || p->extension_enabled(EXT_ZBKB));
 reg_t lo = zext_xlen(RS1 << (xlen/2)) >> (xlen/2);
 reg_t hi = zext_xlen(RS2 << (xlen/2));
 WRITE_RD(sext_xlen(lo | hi));
diff --git a/riscv/insns/packh.h b/riscv/insns/packh.h
index 82886e3293..0f3de5b974 100644
--- a/riscv/insns/packh.h
+++ b/riscv/insns/packh.h
@@ -1,7 +1,4 @@
-require(p->extension_enabled(EXT_ZBKB) ||
-        p->extension_enabled(EXT_XZBP) ||
-        p->extension_enabled(EXT_XZBE) ||
-        p->extension_enabled(EXT_XZBF));
+require_extension(EXT_ZBKB);
 reg_t lo = zext_xlen(RS1 << (xlen-8)) >> (xlen-8);
 reg_t hi = zext_xlen(RS2 << (xlen-8)) >> (xlen-16);
 WRITE_RD(sext_xlen(lo | hi));
diff --git a/riscv/insns/packu.h b/riscv/insns/packu.h
index 441207c32e..0676429f80 100644
--- a/riscv/insns/packu.h
+++ b/riscv/insns/packu.h
@@ -1,6 +1,4 @@
-require(p->extension_enabled(EXT_ZPN) ||
-        p->extension_enabled(EXT_XZBP) ||
-        ((xlen == 64) && p->extension_enabled(EXT_XZBM)));
+require_extension(EXT_ZPN);
 reg_t lo = zext_xlen(RS1) >> (xlen/2);
 reg_t hi = zext_xlen(RS2) >> (xlen/2) << (xlen/2);
 WRITE_RD(sext_xlen(lo | hi));
diff --git a/riscv/insns/packw.h b/riscv/insns/packw.h
index 084c190d0d..dd78717c05 100644
--- a/riscv/insns/packw.h
+++ b/riscv/insns/packw.h
@@ -1,9 +1,6 @@
 // RV64Zbb contains zext.h but not general packw
 require(((insn.rs2() == 0) && p->extension_enabled(EXT_ZBB))
-  || p->extension_enabled(EXT_ZBKB)
-  || p->extension_enabled(EXT_XZBP)
-  || p->extension_enabled(EXT_XZBE)
-  || p->extension_enabled(EXT_XZBF));
+  || p->extension_enabled(EXT_ZBKB));
 require_rv64;
 reg_t lo = zext32(RS1 << 16) >> 16;
 reg_t hi = zext32(RS2 << 16);
diff --git a/riscv/insns/shfli.h b/riscv/insns/shfli.h
index f8636190f0..bb21d2c9d0 100644
--- a/riscv/insns/shfli.h
+++ b/riscv/insns/shfli.h
@@ -1,6 +1,5 @@
 // Zbkb contains zip but not general shfli
-require(((insn.rs2() == (xlen / 2 - 1)) && p->extension_enabled(EXT_ZBKB))
-  || p->extension_enabled(EXT_XZBP));
+require(((insn.rs2() == (xlen / 2 - 1)) && p->extension_enabled(EXT_ZBKB)));
 require(SHAMT < (xlen/2));
 reg_t x = RS1;
 int shamt = SHAMT & ((xlen-1) >> 1);
diff --git a/riscv/insns/unshfli.h b/riscv/insns/unshfli.h
index 26920f1403..5a9cff1c45 100644
--- a/riscv/insns/unshfli.h
+++ b/riscv/insns/unshfli.h
@@ -1,6 +1,5 @@
 // Zbkb contains unzip but not general unshfli
-require(((insn.rs2() == (xlen / 2 - 1)) && p->extension_enabled(EXT_ZBKB))
-  || p->extension_enabled(EXT_XZBP));
+require(((insn.rs2() == (xlen / 2 - 1)) && p->extension_enabled(EXT_ZBKB)));
 require(SHAMT < (xlen/2));
 reg_t x = RS1;
 int shamt = SHAMT & ((xlen-1) >> 1);
diff --git a/riscv/insns/xperm4.h b/riscv/insns/xperm4.h
index 38800f3bfb..a9d685f3f6 100644
--- a/riscv/insns/xperm4.h
+++ b/riscv/insns/xperm4.h
@@ -1,2 +1,2 @@
-require_either_extension(EXT_ZBKX, EXT_XZBP);
+require_extension(EXT_ZBKX);
 WRITE_RD(sext_xlen(xperm(RS1, RS2, 2, xlen)));
diff --git a/riscv/insns/xperm8.h b/riscv/insns/xperm8.h
index c272d66949..1ba48efc6c 100644
--- a/riscv/insns/xperm8.h
+++ b/riscv/insns/xperm8.h
@@ -1,2 +1,2 @@
-require_either_extension(EXT_ZBKX, EXT_XZBP);
+require_extension(EXT_ZBKX);
 WRITE_RD(sext_xlen(xperm(RS1, RS2, 3, xlen)));

From 961d6def2131fa0a831083684fc77b83592a2175 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Sat, 17 Jun 2023 14:34:22 -0700
Subject: [PATCH 3/5] Remove Xbitmanip from disassembler

---
 disasm/disasm.cc | 34 +---------------------------------
 1 file changed, 1 insertion(+), 33 deletions(-)

diff --git a/disasm/disasm.cc b/disasm/disasm.cc
index 25de783ae3..8722cdb977 100644
--- a/disasm/disasm.cc
+++ b/disasm/disasm.cc
@@ -2144,38 +2144,6 @@ void disassembler_t::add_instructions(const isa_parser_t* isa)
     }
   }
 
-  if (isa->extension_enabled(EXT_XZBP)) {
-    DEFINE_ITYPE_SHIFT(grevi);
-    DEFINE_ITYPE_SHIFT(gorci);
-    DEFINE_RTYPE(pack);
-    DEFINE_RTYPE(packh);
-    DEFINE_RTYPE(packu);
-    DEFINE_RTYPE(grev);
-    DEFINE_RTYPE(gorc);
-    DEFINE_RTYPE(xperm4);
-    DEFINE_RTYPE(xperm8);
-    DEFINE_RTYPE(xperm16);
-    DEFINE_RTYPE(xperm32);
-  }
-
-  if (isa->extension_enabled(EXT_XZBP) ||
-      isa->extension_enabled(EXT_XZBE) ||
-      isa->extension_enabled(EXT_XZBF)) {
-    if(isa->get_max_xlen() == 64) {
-      DEFINE_RTYPE(packw);
-    }
-  }
-
-  if (isa->extension_enabled(EXT_XZBT)) {
-    DEFINE_R3TYPE(cmix);
-    DEFINE_R3TYPE(fsr);
-    DEFINE_R3TYPE(fsri);
-    if(isa->get_max_xlen() == 64) {
-      DEFINE_R3TYPE(fsriw);
-      DEFINE_R3TYPE(fsrw);
-    }
-  }
-
   if (isa->extension_enabled(EXT_ZICBOM)) {
     DISASM_INSN("cbo.clean", cbo_clean, 0, {&base_only_address});
     DISASM_INSN("cbo.flush", cbo_flush, 0, {&base_only_address});
@@ -2252,7 +2220,7 @@ disassembler_t::disassembler_t(const isa_parser_t *isa)
 
   // next-highest priority: other instructions in same base ISA
   std::string fallback_isa_string = std::string("rv") + std::to_string(isa->get_max_xlen()) +
-    "gqchv_zfh_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zkn_zkr_zks_svinval_xbitmanip";
+    "gqchv_zfh_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zkn_zkr_zks_svinval";
   isa_parser_t fallback_isa(fallback_isa_string.c_str(), DEFAULT_PRIV);
   add_instructions(&fallback_isa);
 

From 69389df41cccc2853709e5a18f7c87693f4b0c3d Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Sat, 17 Jun 2023 14:24:37 -0700
Subject: [PATCH 4/5] isa parser: reject Xbitmanip extensions

---
 riscv/isa_parser.cc | 27 +--------------------------
 riscv/isa_parser.h  |  8 --------
 2 files changed, 1 insertion(+), 34 deletions(-)

diff --git a/riscv/isa_parser.cc b/riscv/isa_parser.cc
index bd73b0c39f..8bb8c495b3 100644
--- a/riscv/isa_parser.cc
+++ b/riscv/isa_parser.cc
@@ -242,32 +242,7 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
         extension_table[EXT_SSTC] = true;
     } else if (ext_str[0] == 'x') {
       extension_table['X'] = true;
-      if (ext_str == "xbitmanip") {
-        extension_table[EXT_XZBP] = true;
-        extension_table[EXT_XZBS] = true;
-        extension_table[EXT_XZBE] = true;
-        extension_table[EXT_XZBF] = true;
-        extension_table[EXT_XZBC] = true;
-        extension_table[EXT_XZBM] = true;
-        extension_table[EXT_XZBR] = true;
-        extension_table[EXT_XZBT] = true;
-      } else if (ext_str == "xzbp") {
-        extension_table[EXT_XZBP] = true;
-      } else if (ext_str == "xzbs") {
-        extension_table[EXT_XZBS] = true;
-      } else if (ext_str == "xzbe") {
-        extension_table[EXT_XZBE] = true;
-      } else if (ext_str == "xzbf") {
-        extension_table[EXT_XZBF] = true;
-      } else if (ext_str == "xzbc") {
-        extension_table[EXT_XZBC] = true;
-      } else if (ext_str == "xzbm") {
-        extension_table[EXT_XZBM] = true;
-      } else if (ext_str == "xzbr") {
-        extension_table[EXT_XZBR] = true;
-      } else if (ext_str == "xzbt") {
-        extension_table[EXT_XZBT] = true;
-      } else if (ext_str.size() == 1) {
+      if (ext_str.size() == 1) {
         bad_isa_string(str, "single 'X' is not a proper name");
       } else if (ext_str != "xdummy") {
          extension_t* x = find_extension(ext_str.substr(1).c_str())();
diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h
index 7558116869..4e6856195c 100644
--- a/riscv/isa_parser.h
+++ b/riscv/isa_parser.h
@@ -60,14 +60,6 @@ typedef enum {
   EXT_ZIHPM,
   EXT_ZVFBFMIN,
   EXT_ZVFBFWMA,
-  EXT_XZBP,
-  EXT_XZBS,
-  EXT_XZBE,
-  EXT_XZBF,
-  EXT_XZBC,
-  EXT_XZBM,
-  EXT_XZBR,
-  EXT_XZBT,
   EXT_SSTC,
   EXT_INTERNAL_ZFH_MOVE,
   NUM_ISA_EXTENSIONS

From 58f9ba084c8943de29caa4503f734a6f752b1068 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Sat, 17 Jun 2023 14:34:32 -0700
Subject: [PATCH 5/5] Remove Xbitmanip from README

---
 README.md | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/README.md b/README.md
index 8d5dc45b94..e850b6e459 100644
--- a/README.md
+++ b/README.md
@@ -53,20 +53,6 @@ Spike supports the following RISC-V ISA features:
   - Zvfbfmin extension, v0.6
   - Zvfbfwma extension, v0.6
 
-As a Spike extension, the remainder of the proposed
-[Bit-Manipulation Extensions](https://github.com/riscv/riscv-bitmanip)
-is provided under the Spike-custom extension name _Xbitmanip_.
-These instructions (and, of course, the extension name) are not RISC-V
-standards.
-
-These proposed bit-manipulation extensions can be split into further
-groups: Zbp, Zbs, Zbe, Zbf, Zbc, Zbm, Zbr, Zbt. Note that Zbc is
-ratified, but the original proposal contained some extra instructions
-(64-bit carryless multiplies) which are captured here.
-
-To enable these extensions individually, use the Spike-custom
-extension names _XZbp_, _XZbs_, _XZbc_, and so on.
-
 Versioning and APIs
 -------------------