diff --git a/CHANGELOG.md b/CHANGELOG.md
index b7b5a2d45..a70f71cbf 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,7 +1,7 @@
 # CHANGELOG
 
 ## [3.7.1] - 2023-07-30
-- Add support for unratified Svhad extension
+- Add support for unratified Svadu extension
 
 ## [3.7.0] - 2023-05-16
 - Updated the LI macro
diff --git a/coverage/rv32_svhad.cgf b/coverage/rv32_svadu.cgf
similarity index 100%
rename from coverage/rv32_svhad.cgf
rename to coverage/rv32_svadu.cgf
diff --git a/coverage/rv64_svhad.cgf b/coverage/rv64_svadu.cgf
similarity index 100%
rename from coverage/rv64_svhad.cgf
rename to coverage/rv64_svadu.cgf
diff --git a/riscv-test-suite/env/encoding.h b/riscv-test-suite/env/encoding.h
index eae8cd330..1dbe6853a 100755
--- a/riscv-test-suite/env/encoding.h
+++ b/riscv-test-suite/env/encoding.h
@@ -135,11 +135,11 @@
 #define MENVCFG_CBIE  0x00000030
 #define MENVCFG_CBCFE 0x00000040
 #define MENVCFG_CBZE  0x00000080
-#define MENVCFG_HADE  0x2000000000000000
+#define MENVCFG_ADUE  0x2000000000000000
 #define MENVCFG_PBMTE 0x4000000000000000
 #define MENVCFG_STCE  0x8000000000000000
 
-#define MENVCFGH_HADE  0x20000000
+#define MENVCFGH_ADUE  0x20000000
 #define MENVCFGH_PBMTE 0x40000000
 #define MENVCFGH_STCE  0x80000000
 
diff --git a/riscv-test-suite/env/test_macros.h b/riscv-test-suite/env/test_macros.h
index a6560cca1..511be17eb 100644
--- a/riscv-test-suite/env/test_macros.h
+++ b/riscv-test-suite/env/test_macros.h
@@ -984,7 +984,7 @@ RVTEST_SIGUPD_F(swreg,destreg,flagreg)
     sub x1,x1,tempreg			;\
     RVTEST_SIGUPD(swreg,x1,offset) 
 
-#define SETUP_PMP_SVHAD_TEST(swreg, offset, TR0, TR1, TR2) \
+#define SETUP_PMP_SVADU_TEST(swreg, offset, TR0, TR1, TR2) \
   li TR0, -1                                 ;\
   csrw pmpaddr0, TR0                         ;\
   j PMP_exist                                ;\
@@ -1004,7 +1004,7 @@ Mend_PMP:                                    ;\
   RVTEST_SIGUPD(x1,TR0,offset)               ;\
   RVTEST_SIGUPD(x1,TR1,offset)               ;\
 
-#define TEST_SVHAD(swreg, PTE_ADDR, VA, offset, menvcfgaddr, hade_bit) \
+#define TEST_SVADU(swreg, PTE_ADDR, VA, offset, menvcfgaddr, adue_bit) \
     sfence.vma                                                                          ;\
     la t0, VA                                                                           ;\
     li t2, PTE_X | PTE_W | PTE_R                                                        ;\
@@ -1077,7 +1077,7 @@ Mend_PMP:                                    ;\
     SREG t0, (PTE_ADDR)                                                                 ;\
     sfence.vma                                                                          ;\
 											;\
-    li t0, hade_bit                                                                     ;\
+    li t0, adue_bit                                                                     ;\
     csrs menvcfgaddr, t0                                                                ;\
 											;\
     la t0, VA                                                                           ;\
diff --git a/riscv-test-suite/rv32i_m/Svhad/src/svhad_sv32.S b/riscv-test-suite/rv32i_m/Svadu/src/svadu_sv32.S
similarity index 75%
rename from riscv-test-suite/rv32i_m/Svhad/src/svhad_sv32.S
rename to riscv-test-suite/rv32i_m/Svadu/src/svadu_sv32.S
index 5391be683..9c228fd86 100644
--- a/riscv-test-suite/rv32i_m/Svhad/src/svhad_sv32.S
+++ b/riscv-test-suite/rv32i_m/Svadu/src/svadu_sv32.S
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: BSD-3-Clause
 // -----------
 //
-// This assembly file tests the Svhad extension
+// This assembly file tests the Svadu extension
 // 
 #include "model_test.h"
 #include "arch_test.h"
@@ -19,12 +19,12 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svhad.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svhad_sv32)
+  RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv32)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
   # Setup PMP to cover 4G of address space
-  SETUP_PMP_SVHAD_TEST(x1, offset, t0, t1, t2)
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
   # Identity map the page_4k
   la t1, page_4k
@@ -34,12 +34,12 @@ RVTEST_CODE_BEGIN
   # enable virtual memory in Sv32 mode
   SATP_SETUP(t0, t1, SATP32_MODE)
 
-  # test svhad
-  TEST_SVHAD(x1, s2, page_4k, offset, 0x31a, MENVCFGH_HADE)
-  RVMODEL_HALT
+  # test svadu
+  TEST_SVADU(x1, s2, page_4k, offset, 0x31a, MENVCFGH_ADUE)
 
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -60,8 +60,10 @@ CANARY;
 signature_x1_0:
   .fill 128*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save:
diff --git a/riscv-test-suite/rv64i_m/Svhad/src/svhad_sv39.S b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv39.S
similarity index 76%
rename from riscv-test-suite/rv64i_m/Svhad/src/svhad_sv39.S
rename to riscv-test-suite/rv64i_m/Svadu/src/svadu_sv39.S
index 7cc48001a..750cdb72d 100644
--- a/riscv-test-suite/rv64i_m/Svhad/src/svhad_sv39.S
+++ b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv39.S
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: BSD-3-Clause
 // -----------
 //
-// This assembly file tests the Svhad extension
+// This assembly file tests the Svadu extension
 // 
 #include "model_test.h"
 #include "arch_test.h"
@@ -19,12 +19,12 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svhad.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svhad_sv39)
+  RVTEST_CASE(1,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv39)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
   # Setup PMP to cover 4G of address space
-  SETUP_PMP_SVHAD_TEST(x1, offset, t0, t1, t2)
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
   # Idenity map the page_4k
   la t1, page_4k
@@ -34,11 +34,11 @@ RVTEST_CODE_BEGIN
   # enable virtual memory in Sv39 mode
   SATP_SETUP(t0, t1, ((SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV39))
 
-  # test svhad
-  TEST_SVHAD(x1, s2, page_4k, offset, 0x30a, MENVCFG_HADE)
-  RVMODEL_HALT
+  # test svadu
+  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_ADUE)
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -59,8 +59,10 @@ CANARY;
 signature_x1_0:
   .fill 64*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save:
diff --git a/riscv-test-suite/rv64i_m/Svhad/src/svhad_sv48.S b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv48.S
similarity index 76%
rename from riscv-test-suite/rv64i_m/Svhad/src/svhad_sv48.S
rename to riscv-test-suite/rv64i_m/Svadu/src/svadu_sv48.S
index eeba3d44b..0297707a9 100644
--- a/riscv-test-suite/rv64i_m/Svhad/src/svhad_sv48.S
+++ b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv48.S
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: BSD-3-Clause
 // -----------
 //
-// This assembly file tests the Svhad extension
+// This assembly file tests the Svadu extension
 // 
 #include "model_test.h"
 #include "arch_test.h"
@@ -19,12 +19,12 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svhad.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svhad_sv48)
+  RVTEST_CASE(1,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv48)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
   # Setup PMP to cover 4G of address space
-  SETUP_PMP_SVHAD_TEST(x1, offset, t0, t1, t2)
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
   # Identity map the page_4k
   la t1, page_4k
@@ -34,11 +34,11 @@ RVTEST_CODE_BEGIN
   # enable virtual memory in Sv48 mode
   SATP_SETUP(t0, t1, ((SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV48))
 
-  # test svhad
-  TEST_SVHAD(x1, s2, page_4k, offset, 0x30a, MENVCFG_HADE)
-  RVMODEL_HALT
+  # test svadu
+  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_ADUE)
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -59,8 +59,10 @@ CANARY;
 signature_x1_0:
   .fill 64*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save:
diff --git a/riscv-test-suite/rv64i_m/Svhad/src/svhad_sv57.S b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv57.S
similarity index 76%
rename from riscv-test-suite/rv64i_m/Svhad/src/svhad_sv57.S
rename to riscv-test-suite/rv64i_m/Svadu/src/svadu_sv57.S
index 736868634..06f9d2405 100644
--- a/riscv-test-suite/rv64i_m/Svhad/src/svhad_sv57.S
+++ b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv57.S
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: BSD-3-Clause
 // -----------
 //
-// This assembly file tests the Svhad extension
+// This assembly file tests the Svadu extension
 // 
 #include "model_test.h"
 #include "arch_test.h"
@@ -19,12 +19,12 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svhad.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svhad_sv57)
+  RVTEST_CASE(1,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv57)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
   # Setup PMP to cover 4G of address space
-  SETUP_PMP_SVHAD_TEST(x1, offset, t0, t1, t2)
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
   # Identity map the page_4k
   la t1, page_4k
@@ -34,11 +34,11 @@ RVTEST_CODE_BEGIN
   # enable virtual memory in Sv57 mode
   SATP_SETUP(t0, t1, ((SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV57))
 
-  # test svhad
-  TEST_SVHAD(x1, s2, page_4k, offset, 0x30a, MENVCFG_HADE)
-  RVMODEL_HALT
+  # test svadu
+  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_ADUE)
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -59,8 +59,10 @@ CANARY;
 signature_x1_0:
   .fill 64*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save: