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Cache information about abstract access availability on per-register basis #1074

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JanMatCodasip opened this issue May 29, 2024 · 0 comments

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@JanMatCodasip
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JanMatCodasip commented May 29, 2024

(Note to self:)

Currently, OpenOCD keeps track whether abstract register access is supported for CSRs and FPRs as whole register "class". That is, OpenOCD keeps just one bool flag for the whole register group and read/write direction:
https://github.com/riscv-collab/riscv-openocd/blob/riscv/src/target/riscv/riscv-013.c#L195

The implementation should be reworked to keep track of the abstract access support for each register individually. The reason is that per the debug spec, some registers in the same "class" may be abstract-accessible whereas the others not. We don't want OpenOCD to stop using abstract access for all register of the same type if some of them are not supported via abstract access.

Pseudocode:

function register_read(reg_num)
{
    if (read from reg_num is SUPPORTED or UNKNOWN) {
        perform abstract read from reg_num;
        if (cmderr == SUCCESS) {
            remember that read from reg_num is SUPPORTED;
            return the value;
        }
        else if (cmderr == UNSUPPORTED) {
            remember that read from reg_num is UNSUPPORTED;
            // Go on and try program buffer.
        }
        else if (cmderr == EXCEPTION) {
            // The register most likely does not exist. 
            // But for robustness, don't give up yet and continue with program buffer.
        }
    }

    // Abstract access is unsupported or failed - try program buffer
    if (program buffer supported) {
        perform read of reg_num using program buffer;
        // ...
    }
    // ...
}
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