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lan743x_main.c
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lan743x_main.c
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/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (C) 2018 Microchip Technology Inc. */
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/crc32.h>
#include <linux/microchipphy.h>
#include <linux/net_tstamp.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <linux/rtnetlink.h>
#include <linux/iopoll.h>
#include <linux/crc16.h>
#include "lan743x_main.h"
#include "lan743x_ethtool.h"
static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
{
pci_release_selected_regions(adapter->pdev,
pci_select_bars(adapter->pdev,
IORESOURCE_MEM));
pci_disable_device(adapter->pdev);
}
static int lan743x_pci_init(struct lan743x_adapter *adapter,
struct pci_dev *pdev)
{
unsigned long bars = 0;
int ret;
adapter->pdev = pdev;
ret = pci_enable_device_mem(pdev);
if (ret)
goto return_error;
netif_info(adapter, probe, adapter->netdev,
"PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
pdev->vendor, pdev->device);
bars = pci_select_bars(pdev, IORESOURCE_MEM);
if (!test_bit(0, &bars))
goto disable_device;
ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
if (ret)
goto disable_device;
pci_set_master(pdev);
return 0;
disable_device:
pci_disable_device(adapter->pdev);
return_error:
return ret;
}
u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
{
return ioread32(&adapter->csr.csr_address[offset]);
}
void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
u32 data)
{
iowrite32(data, &adapter->csr.csr_address[offset]);
}
#define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
{
u32 data;
data = lan743x_csr_read(adapter, HW_CFG);
data |= HW_CFG_LRST_;
lan743x_csr_write(adapter, HW_CFG, data);
return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
!(data & HW_CFG_LRST_), 100000, 10000000);
}
static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
int offset, u32 bit_mask,
int target_value, int usleep_min,
int usleep_max, int count)
{
u32 data;
return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
target_value == ((data & bit_mask) ? 1 : 0),
usleep_max, usleep_min * count);
}
static int lan743x_csr_init(struct lan743x_adapter *adapter)
{
struct lan743x_csr *csr = &adapter->csr;
resource_size_t bar_start, bar_length;
int result;
bar_start = pci_resource_start(adapter->pdev, 0);
bar_length = pci_resource_len(adapter->pdev, 0);
csr->csr_address = devm_ioremap(&adapter->pdev->dev,
bar_start, bar_length);
if (!csr->csr_address) {
result = -ENOMEM;
goto clean_up;
}
csr->id_rev = lan743x_csr_read(adapter, ID_REV);
csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
netif_info(adapter, probe, adapter->netdev,
"ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
FPGA_REV_GET_MINOR_(csr->fpga_rev));
if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) {
result = -ENODEV;
goto clean_up;
}
csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
case ID_REV_CHIP_REV_A0_:
csr->flags |= LAN743X_CSR_FLAG_IS_A0;
csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
break;
case ID_REV_CHIP_REV_B0_:
csr->flags |= LAN743X_CSR_FLAG_IS_B0;
break;
}
result = lan743x_csr_light_reset(adapter);
if (result)
goto clean_up;
return 0;
clean_up:
return result;
}
static void lan743x_intr_software_isr(void *context)
{
struct lan743x_adapter *adapter = context;
struct lan743x_intr *intr = &adapter->intr;
u32 int_sts;
int_sts = lan743x_csr_read(adapter, INT_STS);
if (int_sts & INT_BIT_SW_GP_) {
/* disable the interrupt to prevent repeated re-triggering */
lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
intr->software_isr_flag = 1;
}
}
static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
{
struct lan743x_tx *tx = context;
struct lan743x_adapter *adapter = tx->adapter;
bool enable_flag = true;
lan743x_csr_read(adapter, INT_EN_SET);
if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
lan743x_csr_write(adapter, INT_EN_CLR,
INT_BIT_DMA_TX_(tx->channel_number));
}
if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
u32 dmac_int_sts;
u32 dmac_int_en;
if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
else
dmac_int_sts = ioc_bit;
if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
dmac_int_en = lan743x_csr_read(adapter,
DMAC_INT_EN_SET);
else
dmac_int_en = ioc_bit;
dmac_int_en &= ioc_bit;
dmac_int_sts &= dmac_int_en;
if (dmac_int_sts & ioc_bit) {
napi_schedule(&tx->napi);
enable_flag = false;/* poll func will enable later */
}
}
if (enable_flag)
/* enable isr */
lan743x_csr_write(adapter, INT_EN_SET,
INT_BIT_DMA_TX_(tx->channel_number));
}
static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
{
struct lan743x_rx *rx = context;
struct lan743x_adapter *adapter = rx->adapter;
bool enable_flag = true;
if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
lan743x_csr_write(adapter, INT_EN_CLR,
INT_BIT_DMA_RX_(rx->channel_number));
}
if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
u32 dmac_int_sts;
u32 dmac_int_en;
if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
else
dmac_int_sts = rx_frame_bit;
if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
dmac_int_en = lan743x_csr_read(adapter,
DMAC_INT_EN_SET);
else
dmac_int_en = rx_frame_bit;
dmac_int_en &= rx_frame_bit;
dmac_int_sts &= dmac_int_en;
if (dmac_int_sts & rx_frame_bit) {
napi_schedule(&rx->napi);
enable_flag = false;/* poll funct will enable later */
}
}
if (enable_flag) {
/* enable isr */
lan743x_csr_write(adapter, INT_EN_SET,
INT_BIT_DMA_RX_(rx->channel_number));
}
}
static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
{
struct lan743x_adapter *adapter = context;
unsigned int channel;
if (int_sts & INT_BIT_ALL_RX_) {
for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
channel++) {
u32 int_bit = INT_BIT_DMA_RX_(channel);
if (int_sts & int_bit) {
lan743x_rx_isr(&adapter->rx[channel],
int_bit, flags);
int_sts &= ~int_bit;
}
}
}
if (int_sts & INT_BIT_ALL_TX_) {
for (channel = 0; channel < LAN743X_USED_TX_CHANNELS;
channel++) {
u32 int_bit = INT_BIT_DMA_TX_(channel);
if (int_sts & int_bit) {
lan743x_tx_isr(&adapter->tx[channel],
int_bit, flags);
int_sts &= ~int_bit;
}
}
}
if (int_sts & INT_BIT_ALL_OTHER_) {
if (int_sts & INT_BIT_SW_GP_) {
lan743x_intr_software_isr(adapter);
int_sts &= ~INT_BIT_SW_GP_;
}
if (int_sts & INT_BIT_1588_) {
lan743x_ptp_isr(adapter);
int_sts &= ~INT_BIT_1588_;
}
}
if (int_sts)
lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
}
static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
{
struct lan743x_vector *vector = ptr;
struct lan743x_adapter *adapter = vector->adapter;
irqreturn_t result = IRQ_NONE;
u32 int_enables;
u32 int_sts;
if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
int_sts = lan743x_csr_read(adapter, INT_STS);
} else if (vector->flags &
(LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
} else {
/* use mask as implied status */
int_sts = vector->int_mask | INT_BIT_MAS_;
}
if (!(int_sts & INT_BIT_MAS_))
goto irq_done;
if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
/* disable vector interrupt */
lan743x_csr_write(adapter,
INT_VEC_EN_CLR,
INT_VEC_EN_(vector->vector_index));
if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
/* disable master interrupt */
lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
int_enables = lan743x_csr_read(adapter, INT_EN_SET);
} else {
/* use vector mask as implied enable mask */
int_enables = vector->int_mask;
}
int_sts &= int_enables;
int_sts &= vector->int_mask;
if (int_sts) {
if (vector->handler) {
vector->handler(vector->context,
int_sts, vector->flags);
} else {
/* disable interrupts on this vector */
lan743x_csr_write(adapter, INT_EN_CLR,
vector->int_mask);
}
result = IRQ_HANDLED;
}
if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
/* enable master interrupt */
lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
/* enable vector interrupt */
lan743x_csr_write(adapter,
INT_VEC_EN_SET,
INT_VEC_EN_(vector->vector_index));
irq_done:
return result;
}
static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
{
struct lan743x_intr *intr = &adapter->intr;
int result = -ENODEV;
int timeout = 10;
intr->software_isr_flag = 0;
/* enable interrupt */
lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
/* activate interrupt here */
lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
while ((timeout > 0) && (!(intr->software_isr_flag))) {
usleep_range(1000, 20000);
timeout--;
}
if (intr->software_isr_flag)
result = 0;
/* disable interrupts */
lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
return result;
}
static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
int vector_index, u32 flags,
u32 int_mask,
lan743x_vector_handler handler,
void *context)
{
struct lan743x_vector *vector = &adapter->intr.vector_list
[vector_index];
int ret;
vector->adapter = adapter;
vector->flags = flags;
vector->vector_index = vector_index;
vector->int_mask = int_mask;
vector->handler = handler;
vector->context = context;
ret = request_irq(vector->irq,
lan743x_intr_entry_isr,
(flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
IRQF_SHARED : 0, DRIVER_NAME, vector);
if (ret) {
vector->handler = NULL;
vector->context = NULL;
vector->int_mask = 0;
vector->flags = 0;
}
return ret;
}
static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
int vector_index)
{
struct lan743x_vector *vector = &adapter->intr.vector_list
[vector_index];
free_irq(vector->irq, vector);
vector->handler = NULL;
vector->context = NULL;
vector->int_mask = 0;
vector->flags = 0;
}
static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
u32 int_mask)
{
int index;
for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
if (adapter->intr.vector_list[index].int_mask & int_mask)
return adapter->intr.vector_list[index].flags;
}
return 0;
}
static void lan743x_intr_close(struct lan743x_adapter *adapter)
{
struct lan743x_intr *intr = &adapter->intr;
int index = 0;
lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
lan743x_intr_unregister_isr(adapter, index);
intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
}
}
if (intr->flags & INTR_FLAG_MSI_ENABLED) {
pci_disable_msi(adapter->pdev);
intr->flags &= ~INTR_FLAG_MSI_ENABLED;
}
if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
pci_disable_msix(adapter->pdev);
intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
}
}
static int lan743x_intr_open(struct lan743x_adapter *adapter)
{
struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT];
struct lan743x_intr *intr = &adapter->intr;
u32 int_vec_en_auto_clr = 0;
u32 int_vec_map0 = 0;
u32 int_vec_map1 = 0;
int ret = -ENODEV;
int index = 0;
u32 flags = 0;
intr->number_of_vectors = 0;
/* Try to set up MSIX interrupts */
memset(&msix_entries[0], 0,
sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT);
for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++)
msix_entries[index].entry = index;
ret = pci_enable_msix_range(adapter->pdev,
msix_entries, 1,
1 + LAN743X_USED_TX_CHANNELS +
LAN743X_USED_RX_CHANNELS);
if (ret > 0) {
intr->flags |= INTR_FLAG_MSIX_ENABLED;
intr->number_of_vectors = ret;
intr->using_vectors = true;
for (index = 0; index < intr->number_of_vectors; index++)
intr->vector_list[index].irq = msix_entries
[index].vector;
netif_info(adapter, ifup, adapter->netdev,
"using MSIX interrupts, number of vectors = %d\n",
intr->number_of_vectors);
}
/* If MSIX failed try to setup using MSI interrupts */
if (!intr->number_of_vectors) {
if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
if (!pci_enable_msi(adapter->pdev)) {
intr->flags |= INTR_FLAG_MSI_ENABLED;
intr->number_of_vectors = 1;
intr->using_vectors = true;
intr->vector_list[0].irq =
adapter->pdev->irq;
netif_info(adapter, ifup, adapter->netdev,
"using MSI interrupts, number of vectors = %d\n",
intr->number_of_vectors);
}
}
}
/* If MSIX, and MSI failed, setup using legacy interrupt */
if (!intr->number_of_vectors) {
intr->number_of_vectors = 1;
intr->using_vectors = false;
intr->vector_list[0].irq = intr->irq;
netif_info(adapter, ifup, adapter->netdev,
"using legacy interrupts\n");
}
/* At this point we must have at least one irq */
lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
/* map all interrupts to vector 0 */
lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
if (intr->using_vectors) {
flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
} else {
flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
LAN743X_VECTOR_FLAG_IRQ_SHARED;
}
if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
}
ret = lan743x_intr_register_isr(adapter, 0, flags,
INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
INT_BIT_ALL_OTHER_,
lan743x_intr_shared_isr, adapter);
if (ret)
goto clean_up;
intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
if (intr->using_vectors)
lan743x_csr_write(adapter, INT_VEC_EN_SET,
INT_VEC_EN_(0));
if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
}
/* enable interrupts */
lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
ret = lan743x_intr_test_isr(adapter);
if (ret)
goto clean_up;
if (intr->number_of_vectors > 1) {
int number_of_tx_vectors = intr->number_of_vectors - 1;
if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS)
number_of_tx_vectors = LAN743X_USED_TX_CHANNELS;
flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
if (adapter->csr.flags &
LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
}
for (index = 0; index < number_of_tx_vectors; index++) {
u32 int_bit = INT_BIT_DMA_TX_(index);
int vector = index + 1;
/* map TX interrupt to vector */
int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
/* Remove TX interrupt from shared mask */
intr->vector_list[0].int_mask &= ~int_bit;
ret = lan743x_intr_register_isr(adapter, vector, flags,
int_bit, lan743x_tx_isr,
&adapter->tx[index]);
if (ret)
goto clean_up;
intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
if (!(flags &
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
lan743x_csr_write(adapter, INT_VEC_EN_SET,
INT_VEC_EN_(vector));
}
}
if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) {
int number_of_rx_vectors = intr->number_of_vectors -
LAN743X_USED_TX_CHANNELS - 1;
if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
if (adapter->csr.flags &
LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
}
for (index = 0; index < number_of_rx_vectors; index++) {
int vector = index + 1 + LAN743X_USED_TX_CHANNELS;
u32 int_bit = INT_BIT_DMA_RX_(index);
/* map RX interrupt to vector */
int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
if (flags &
LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
int_vec_en_auto_clr |= INT_VEC_EN_(vector);
lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
int_vec_en_auto_clr);
}
/* Remove RX interrupt from shared mask */
intr->vector_list[0].int_mask &= ~int_bit;
ret = lan743x_intr_register_isr(adapter, vector, flags,
int_bit, lan743x_rx_isr,
&adapter->rx[index]);
if (ret)
goto clean_up;
intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
lan743x_csr_write(adapter, INT_VEC_EN_SET,
INT_VEC_EN_(vector));
}
}
return 0;
clean_up:
lan743x_intr_close(adapter);
return ret;
}
static int lan743x_dp_write(struct lan743x_adapter *adapter,
u32 select, u32 addr, u32 length, u32 *buf)
{
u32 dp_sel;
int i;
if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
1, 40, 100, 100))
return -EIO;
dp_sel = lan743x_csr_read(adapter, DP_SEL);
dp_sel &= ~DP_SEL_MASK_;
dp_sel |= select;
lan743x_csr_write(adapter, DP_SEL, dp_sel);
for (i = 0; i < length; i++) {
lan743x_csr_write(adapter, DP_ADDR, addr + i);
lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
1, 40, 100, 100))
return -EIO;
}
return 0;
}
static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
{
u32 ret;
ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
MAC_MII_ACC_PHY_ADDR_MASK_;
ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
MAC_MII_ACC_MIIRINDA_MASK_;
if (read)
ret |= MAC_MII_ACC_MII_READ_;
else
ret |= MAC_MII_ACC_MII_WRITE_;
ret |= MAC_MII_ACC_MII_BUSY_;
return ret;
}
static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
{
u32 data;
return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
!(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
}
static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index)
{
struct lan743x_adapter *adapter = bus->priv;
u32 val, mii_access;
int ret;
/* comfirm MII not busy */
ret = lan743x_mac_mii_wait_till_not_busy(adapter);
if (ret < 0)
return ret;
/* set the address, index & direction (read from PHY) */
mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
ret = lan743x_mac_mii_wait_till_not_busy(adapter);
if (ret < 0)
return ret;
val = lan743x_csr_read(adapter, MAC_MII_DATA);
return (int)(val & 0xFFFF);
}
static int lan743x_mdiobus_write(struct mii_bus *bus,
int phy_id, int index, u16 regval)
{
struct lan743x_adapter *adapter = bus->priv;
u32 val, mii_access;
int ret;
/* confirm MII not busy */
ret = lan743x_mac_mii_wait_till_not_busy(adapter);
if (ret < 0)
return ret;
val = (u32)regval;
lan743x_csr_write(adapter, MAC_MII_DATA, val);
/* set the address, index & direction (write to PHY) */
mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
ret = lan743x_mac_mii_wait_till_not_busy(adapter);
return ret;
}
static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
u8 *addr)
{
u32 addr_lo, addr_hi;
addr_lo = addr[0] |
addr[1] << 8 |
addr[2] << 16 |
addr[3] << 24;
addr_hi = addr[4] |
addr[5] << 8;
lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
ether_addr_copy(adapter->mac_address, addr);
netif_info(adapter, drv, adapter->netdev,
"MAC address set to %pM\n", addr);
}
static int lan743x_mac_init(struct lan743x_adapter *adapter)
{
bool mac_address_valid = true;
struct net_device *netdev;
u32 mac_addr_hi = 0;
u32 mac_addr_lo = 0;
u32 data;
netdev = adapter->netdev;
/* disable auto duplex, and speed detection. Phylib does that */
data = lan743x_csr_read(adapter, MAC_CR);
data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_);
data |= MAC_CR_CNTR_RST_;
lan743x_csr_write(adapter, MAC_CR, data);
if (!is_valid_ether_addr(adapter->mac_address)) {
mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
adapter->mac_address[0] = mac_addr_lo & 0xFF;
adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
adapter->mac_address[4] = mac_addr_hi & 0xFF;
adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
mac_addr_lo == 0xFFFFFFFF) {
mac_address_valid = false;
} else if (!is_valid_ether_addr(adapter->mac_address)) {
mac_address_valid = false;
}
if (!mac_address_valid)
eth_random_addr(adapter->mac_address);
}
lan743x_mac_set_address(adapter, adapter->mac_address);
ether_addr_copy(netdev->dev_addr, adapter->mac_address);
return 0;
}
static int lan743x_mac_open(struct lan743x_adapter *adapter)
{
int ret = 0;
u32 temp;
temp = lan743x_csr_read(adapter, MAC_RX);
lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
temp = lan743x_csr_read(adapter, MAC_TX);
lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
return ret;
}
static void lan743x_mac_close(struct lan743x_adapter *adapter)
{
u32 temp;
temp = lan743x_csr_read(adapter, MAC_TX);
temp &= ~MAC_TX_TXEN_;
lan743x_csr_write(adapter, MAC_TX, temp);
lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
1, 1000, 20000, 100);
temp = lan743x_csr_read(adapter, MAC_RX);
temp &= ~MAC_RX_RXEN_;
lan743x_csr_write(adapter, MAC_RX, temp);
lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1, 1000, 20000, 100);
}
static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
bool tx_enable, bool rx_enable)
{
u32 flow_setting = 0;
/* set maximum pause time because when fifo space frees
* up a zero value pause frame will be sent to release the pause
*/
flow_setting = MAC_FLOW_CR_FCPT_MASK_;
if (tx_enable)
flow_setting |= MAC_FLOW_CR_TX_FCEN_;
if (rx_enable)
flow_setting |= MAC_FLOW_CR_RX_FCEN_;
lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
}
static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
{
int enabled = 0;
u32 mac_rx = 0;
mac_rx = lan743x_csr_read(adapter, MAC_RX);
if (mac_rx & MAC_RX_RXEN_) {
enabled = 1;
if (mac_rx & MAC_RX_RXD_) {
lan743x_csr_write(adapter, MAC_RX, mac_rx);
mac_rx &= ~MAC_RX_RXD_;
}
mac_rx &= ~MAC_RX_RXEN_;
lan743x_csr_write(adapter, MAC_RX, mac_rx);
lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1, 1000, 20000, 100);
lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
}
mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) &
MAC_RX_MAX_SIZE_MASK_);
lan743x_csr_write(adapter, MAC_RX, mac_rx);
if (enabled) {
mac_rx |= MAC_RX_RXEN_;
lan743x_csr_write(adapter, MAC_RX, mac_rx);
}
return 0;
}
/* PHY */
static int lan743x_phy_reset(struct lan743x_adapter *adapter)
{
u32 data;
/* Only called with in probe, and before mdiobus_register */
data = lan743x_csr_read(adapter, PMT_CTL);
data |= PMT_CTL_ETH_PHY_RST_;
lan743x_csr_write(adapter, PMT_CTL, data);
return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
(!(data & PMT_CTL_ETH_PHY_RST_) &&
(data & PMT_CTL_READY_)),
50000, 1000000);
}
static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
u16 local_adv, u16 remote_adv)
{
struct lan743x_phy *phy = &adapter->phy;
u8 cap;
if (phy->fc_autoneg)
cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
else
cap = phy->fc_request_control;
lan743x_mac_flow_ctrl_set_enables(adapter,
cap & FLOW_CTRL_TX,
cap & FLOW_CTRL_RX);
}
static int lan743x_phy_init(struct lan743x_adapter *adapter)
{
return lan743x_phy_reset(adapter);
}
static void lan743x_phy_link_status_change(struct net_device *netdev)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
struct phy_device *phydev = netdev->phydev;
u32 data;
phy_print_status(phydev);
if (phydev->state == PHY_RUNNING) {
int remote_advertisement = 0;
int local_advertisement = 0;
data = lan743x_csr_read(adapter, MAC_CR);
/* set interface mode */
if (phy_interface_mode_is_rgmii(adapter->phy_mode))
/* RGMII */
data &= ~MAC_CR_MII_EN_;
else
/* GMII */
data |= MAC_CR_MII_EN_;
/* set duplex mode */
if (phydev->duplex)
data |= MAC_CR_DPX_;
else
data &= ~MAC_CR_DPX_;
/* set bus speed */
switch (phydev->speed) {
case SPEED_10:
data &= ~MAC_CR_CFG_H_;
data &= ~MAC_CR_CFG_L_;
break;
case SPEED_100:
data &= ~MAC_CR_CFG_H_;
data |= MAC_CR_CFG_L_;
break;
case SPEED_1000:
data |= MAC_CR_CFG_H_;
data &= ~MAC_CR_CFG_L_;
break;
}
lan743x_csr_write(adapter, MAC_CR, data);
local_advertisement =
linkmode_adv_to_mii_adv_t(phydev->advertising);
remote_advertisement =
linkmode_adv_to_mii_adv_t(phydev->lp_advertising);
lan743x_phy_update_flowcontrol(adapter, local_advertisement,
remote_advertisement);
lan743x_ptp_update_latency(adapter, phydev->speed);
}
}
static void lan743x_phy_close(struct lan743x_adapter *adapter)