From 9053b90d40aa28d6ee3e785fe2b4bc89239c425e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Hwong?=
<88561480+benihi@users.noreply.github.com>
Date: Wed, 20 Jul 2022 18:45:51 -0700
Subject: [PATCH 1/5] kernel: backport upstream mtk_eth_soc patches (#9809)
* kernel: move mtk flow offload patches to backport-5.15
They were accepted upstream
Signed-off-by: Felix Fietkau <nbd@nbd.name>
* kernel: backport upstream mtk_eth_soc patches
Includes MT7986 ethernet support
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Co-authored-by: Felix Fietkau <nbd@nbd.name>
---
...eth_soc-add-support-for-coherent-DM.patch} | 0
...k-mt7622-add-support-for-coherent-D.patch} | 0
...eth_soc-add-support-for-Wireless-Et.patch} | 0
...eth_soc-implement-flow-offloading-t.patch} | 8 +-
...k-mt7622-introduce-nodes-for-Wirele.patch} | 0
...eth_soc-add-ipv6-flow-offload-suppo.patch} | 4 +-
...eth_soc-support-TC_SETUP_BLOCK-for-.patch} | 2 +-
...eth_soc-allocate-struct-mtk_ppe-sep.patch} | 12 +-
...eth_soc-rework-hardware-flow-table-.patch} | 8 +-
...eth_soc-remove-bridge-flow-offload-.patch} | 0
...eth_soc-support-creating-mac-addres.patch} | 10 +-
..._eth_soc-wed-fix-sparse-endian-warni.patch | 56 ++
..._eth_soc-fix-return-value-check-in-m.patch | 25 +
..._eth_soc-use-standard-property-for-c.patch | 35 +
..._eth_soc-use-after-free-in-__mtk_ppe.patch | 33 +
..._eth_soc-add-check-for-allocation-fa.patch | 22 +
...silence-the-GCC-12-array-bounds-warn.patch | 26 +
..._eth_soc-rely-on-GFP_KERNEL-for-dma_.patch | 52 +
..._eth_soc-move-tx-dma-desc-configurat.patch | 206 ++++
..._eth_soc-add-txd_size-to-mtk_soc_dat.patch | 167 ++++
..._eth_soc-rely-on-txd_size-in-mtk_tx_.patch | 78 ++
..._eth_soc-rely-on-txd_size-in-mtk_des.patch | 109 +++
..._eth_soc-rely-on-txd_size-in-txd_to_.patch | 39 +
..._eth_soc-add-rxd_size-to-mtk_soc_dat.patch | 102 ++
..._eth_soc-rely-on-txd_size-field-in-m.patch | 46 +
..._eth_soc-rely-on-rxd_size-field-in-m.patch | 68 ++
..._eth_soc-introduce-device-register-m.patch | 814 ++++++++++++++++
..._eth_soc-introduce-MTK_NETSYS_V2-sup.patch | 917 ++++++++++++++++++
..._eth_soc-convert-ring-dma-pointer-to.patch | 135 +++
..._eth_soc-convert-scratch_ring-pointe.patch | 33 +
..._eth_soc-introduce-support-for-mt798.patch | 138 +++
..._eth_soc-fix-error-code-in-mtk_flow_.patch | 25 +
..._eth_soc-enable-rx-cksum-offload-for.patch | 47 +
...vert-driver-core-Set-fw_devlink-on-b.patch | 2 +-
...T-skip-GRO-for-foreign-MAC-addresses.patch | 12 +-
..._eth_soc-avoid-creating-duplicate-of.patch | 2 +-
...net-mtk_eth_soc-enable-threaded-NAPI.patch | 8 +-
..._eth_soc-implement-Clause-45-MDIO-ac.patch | 8 +-
...ernet-mtk_eth_soc-announce-2500baseT.patch | 2 +-
39 files changed, 3212 insertions(+), 39 deletions(-)
rename target/linux/generic/{pending-5.15/701-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch => backport-5.15/702-v5.19-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch} (100%)
rename target/linux/generic/{pending-5.15/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch => backport-5.15/702-v5.19-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch} (100%)
rename target/linux/generic/{pending-5.15/701-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch => backport-5.15/702-v5.19-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch} (100%)
rename target/linux/generic/{pending-5.15/701-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch => backport-5.15/702-v5.19-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch} (97%)
rename target/linux/generic/{pending-5.15/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch => backport-5.15/702-v5.19-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch} (100%)
rename target/linux/generic/{pending-5.15/701-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch => backport-5.15/702-v5.19-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch} (94%)
rename target/linux/generic/{pending-5.15/701-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch => backport-5.15/702-v5.19-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch} (92%)
rename target/linux/generic/{pending-5.15/701-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch => backport-5.15/702-v5.19-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch} (92%)
rename target/linux/generic/{pending-5.15/701-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch => backport-5.15/702-v5.19-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch} (98%)
rename target/linux/generic/{pending-5.15/701-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch => backport-5.15/702-v5.19-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch} (100%)
rename target/linux/generic/{pending-5.15/701-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch => backport-5.15/702-v5.19-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch} (97%)
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-11-net-ethernet-mtk_eth_soc-wed-fix-sparse-endian-warni.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-12-net-ethernet-mtk_eth_soc-fix-return-value-check-in-m.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-14-net-ethernet-mtk_eth_soc-use-after-free-in-__mtk_ppe.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-15-net-ethernet-mtk_eth_soc-add-check-for-allocation-fa.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-16-eth-mtk_eth_soc-silence-the-GCC-12-array-bounds-warn.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-17-net-ethernet-mtk_eth_soc-rely-on-GFP_KERNEL-for-dma_.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-18-net-ethernet-mtk_eth_soc-move-tx-dma-desc-configurat.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-19-net-ethernet-mtk_eth_soc-add-txd_size-to-mtk_soc_dat.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-20-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_tx_.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-21-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_des.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-22-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-txd_to_.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-23-net-ethernet-mtk_eth_soc-add-rxd_size-to-mtk_soc_dat.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-24-net-ethernet-mtk_eth_soc-rely-on-txd_size-field-in-m.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-25-net-ethernet-mtk_eth_soc-rely-on-rxd_size-field-in-m.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-26-net-ethernet-mtk_eth_soc-introduce-device-register-m.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-27-net-ethernet-mtk_eth_soc-introduce-MTK_NETSYS_V2-sup.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-28-net-ethernet-mtk_eth_soc-convert-ring-dma-pointer-to.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-29-net-ethernet-mtk_eth_soc-convert-scratch_ring-pointe.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-30-net-ethernet-mtk_eth_soc-introduce-support-for-mt798.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-31-net-ethernet-mtk_eth_soc-fix-error-code-in-mtk_flow_.patch
create mode 100644 target/linux/generic/backport-5.15/702-v5.19-33-net-ethernet-mtk_eth_soc-enable-rx-cksum-offload-for.patch
diff --git a/target/linux/generic/pending-5.15/701-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch b/target/linux/generic/backport-5.15/702-v5.19-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/701-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
rename to target/linux/generic/backport-5.15/702-v5.19-00-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
diff --git a/target/linux/generic/pending-5.15/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch b/target/linux/generic/backport-5.15/702-v5.19-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch
rename to target/linux/generic/backport-5.15/702-v5.19-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch
diff --git a/target/linux/generic/pending-5.15/701-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch b/target/linux/generic/backport-5.15/702-v5.19-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/701-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch
rename to target/linux/generic/backport-5.15/702-v5.19-02-net-ethernet-mtk_eth_soc-add-support-for-Wireless-Et.patch
diff --git a/target/linux/generic/pending-5.15/701-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch b/target/linux/generic/backport-5.15/702-v5.19-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch
similarity index 97%
rename from target/linux/generic/pending-5.15/701-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch
rename to target/linux/generic/backport-5.15/702-v5.19-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch
index 38d3968dfb80fe..28b32521049a82 100644
--- a/target/linux/generic/pending-5.15/701-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch
+++ b/target/linux/generic/backport-5.15/702-v5.19-03-net-ethernet-mtk_eth_soc-implement-flow-offloading-t.patch
@@ -166,7 +166,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
u16 addr_type = 0;
u32 timestamp;
u8 l4proto = 0;
-@@ -329,10 +372,14 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -326,10 +369,14 @@ mtk_flow_offload_replace(struct mtk_eth
if (data.pppoe.num == 1)
mtk_foe_entry_set_pppoe(&foe, data.pppoe.sid);
@@ -182,7 +182,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
entry = kzalloc(sizeof(*entry), GFP_KERNEL);
if (!entry)
return -ENOMEM;
-@@ -346,6 +393,7 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -343,6 +390,7 @@ mtk_flow_offload_replace(struct mtk_eth
}
entry->hash = hash;
@@ -190,7 +190,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
err = rhashtable_insert_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
if (err < 0)
-@@ -356,6 +404,8 @@ clear_flow:
+@@ -353,6 +401,8 @@ clear_flow:
mtk_foe_entry_clear(ð->ppe, hash);
free:
kfree(entry);
@@ -199,7 +199,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
return err;
}
-@@ -372,6 +422,8 @@ mtk_flow_offload_destroy(struct mtk_eth
+@@ -369,6 +419,8 @@ mtk_flow_offload_destroy(struct mtk_eth
mtk_foe_entry_clear(ð->ppe, entry->hash);
rhashtable_remove_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
diff --git a/target/linux/generic/pending-5.15/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch b/target/linux/generic/backport-5.15/702-v5.19-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch
rename to target/linux/generic/backport-5.15/702-v5.19-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch
diff --git a/target/linux/generic/pending-5.15/701-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch b/target/linux/generic/backport-5.15/702-v5.19-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch
similarity index 94%
rename from target/linux/generic/pending-5.15/701-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch
rename to target/linux/generic/backport-5.15/702-v5.19-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch
index b2114eb02d8f63..9adb067015ee95 100644
--- a/target/linux/generic/pending-5.15/701-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch
+++ b/target/linux/generic/backport-5.15/702-v5.19-05-net-ethernet-mtk_eth_soc-add-ipv6-flow-offload-suppo.patch
@@ -49,7 +49,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static void
mtk_flow_offload_mangle_eth(const struct flow_action_entry *act, void *eth)
{
-@@ -299,6 +313,9 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -296,6 +310,9 @@ mtk_flow_offload_replace(struct mtk_eth
case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
offload_type = MTK_PPE_PKT_TYPE_IPV4_HNAPT;
break;
@@ -59,7 +59,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
default:
return -EOPNOTSUPP;
}
-@@ -334,6 +351,17 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -331,6 +348,17 @@ mtk_flow_offload_replace(struct mtk_eth
mtk_flow_set_ipv4_addr(&foe, &data, false);
}
diff --git a/target/linux/generic/pending-5.15/701-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch b/target/linux/generic/backport-5.15/702-v5.19-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch
similarity index 92%
rename from target/linux/generic/pending-5.15/701-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch
rename to target/linux/generic/backport-5.15/702-v5.19-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch
index a9fc70533d445b..72c6d281723963 100644
--- a/target/linux/generic/pending-5.15/701-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch
+++ b/target/linux/generic/backport-5.15/702-v5.19-06-net-ethernet-mtk_eth_soc-support-TC_SETUP_BLOCK-for-.patch
@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
-@@ -566,10 +566,13 @@ mtk_eth_setup_tc_block(struct net_device
+@@ -563,10 +563,13 @@ mtk_eth_setup_tc_block(struct net_device
int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
void *type_data)
{
diff --git a/target/linux/generic/pending-5.15/701-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch b/target/linux/generic/backport-5.15/702-v5.19-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch
similarity index 92%
rename from target/linux/generic/pending-5.15/701-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch
rename to target/linux/generic/backport-5.15/702-v5.19-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch
index 87b8a050ae4830..a17d49cac11ec9 100644
--- a/target/linux/generic/pending-5.15/701-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch
+++ b/target/linux/generic/backport-5.15/702-v5.19-07-net-ethernet-mtk_eth_soc-allocate-struct-mtk_ppe-sep.patch
@@ -103,7 +103,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
-@@ -414,7 +414,7 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -411,7 +411,7 @@ mtk_flow_offload_replace(struct mtk_eth
entry->cookie = f->cookie;
timestamp = mtk_eth_timestamp(eth);
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (hash < 0) {
err = hash;
goto free;
-@@ -429,7 +429,7 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -426,7 +426,7 @@ mtk_flow_offload_replace(struct mtk_eth
return 0;
clear_flow:
@@ -121,7 +121,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
free:
kfree(entry);
if (wed_index >= 0)
-@@ -447,7 +447,7 @@ mtk_flow_offload_destroy(struct mtk_eth
+@@ -444,7 +444,7 @@ mtk_flow_offload_destroy(struct mtk_eth
if (!entry)
return -ENOENT;
@@ -130,7 +130,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
rhashtable_remove_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
if (entry->wed_index >= 0)
-@@ -469,7 +469,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
+@@ -466,7 +466,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
if (!entry)
return -ENOENT;
@@ -139,7 +139,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (timestamp < 0)
return -ETIMEDOUT;
-@@ -525,7 +525,7 @@ mtk_eth_setup_tc_block(struct net_device
+@@ -522,7 +522,7 @@ mtk_eth_setup_tc_block(struct net_device
struct flow_block_cb *block_cb;
flow_setup_cb_t *cb;
@@ -148,7 +148,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
return -EOPNOTSUPP;
if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
-@@ -577,7 +577,7 @@ int mtk_eth_setup_tc(struct net_device *
+@@ -574,7 +574,7 @@ int mtk_eth_setup_tc(struct net_device *
int mtk_eth_offload_init(struct mtk_eth *eth)
{
diff --git a/target/linux/generic/pending-5.15/701-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch b/target/linux/generic/backport-5.15/702-v5.19-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch
similarity index 98%
rename from target/linux/generic/pending-5.15/701-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch
rename to target/linux/generic/backport-5.15/702-v5.19-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch
index 1196753759a473..76e8eb11fd586a 100644
--- a/target/linux/generic/pending-5.15/701-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch
+++ b/target/linux/generic/backport-5.15/702-v5.19-08-net-ethernet-mtk_eth_soc-rework-hardware-flow-table-.patch
@@ -360,7 +360,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
int i;
if (rhashtable_lookup(ð->flow_table, &f->cookie, mtk_flow_ht_params))
-@@ -413,23 +398,21 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -410,23 +395,21 @@ mtk_flow_offload_replace(struct mtk_eth
return -ENOMEM;
entry->cookie = f->cookie;
@@ -392,7 +392,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
free:
kfree(entry);
if (wed_index >= 0)
-@@ -447,7 +430,7 @@ mtk_flow_offload_destroy(struct mtk_eth
+@@ -444,7 +427,7 @@ mtk_flow_offload_destroy(struct mtk_eth
if (!entry)
return -ENOENT;
@@ -401,7 +401,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
rhashtable_remove_fast(ð->flow_table, &entry->node,
mtk_flow_ht_params);
if (entry->wed_index >= 0)
-@@ -461,7 +444,6 @@ static int
+@@ -458,7 +441,6 @@ static int
mtk_flow_offload_stats(struct mtk_eth *eth, struct flow_cls_offload *f)
{
struct mtk_flow_entry *entry;
@@ -409,7 +409,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
u32 idle;
entry = rhashtable_lookup(ð->flow_table, &f->cookie,
-@@ -469,11 +451,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
+@@ -466,11 +448,7 @@ mtk_flow_offload_stats(struct mtk_eth *e
if (!entry)
return -ENOENT;
diff --git a/target/linux/generic/pending-5.15/701-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch b/target/linux/generic/backport-5.15/702-v5.19-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/701-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch
rename to target/linux/generic/backport-5.15/702-v5.19-09-net-ethernet-mtk_eth_soc-remove-bridge-flow-offload-.patch
diff --git a/target/linux/generic/pending-5.15/701-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch b/target/linux/generic/backport-5.15/702-v5.19-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch
similarity index 97%
rename from target/linux/generic/pending-5.15/701-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch
rename to target/linux/generic/backport-5.15/702-v5.19-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch
index 67c02d6dbc9251..209c65e66aa039 100644
--- a/target/linux/generic/pending-5.15/701-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch
+++ b/target/linux/generic/backport-5.15/702-v5.19-10-net-ethernet-mtk_eth_soc-support-creating-mac-addres.patch
@@ -452,7 +452,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
struct {
u16 id;
__be16 proto;
-@@ -260,9 +262,45 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -257,9 +259,45 @@ mtk_flow_offload_replace(struct mtk_eth
return -EOPNOTSUPP;
}
@@ -498,7 +498,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (act->mangle.htype == FLOW_ACT_MANGLE_HDR_TYPE_ETH)
mtk_flow_offload_mangle_eth(act, &data.eth);
break;
-@@ -294,17 +332,6 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -291,17 +329,6 @@ mtk_flow_offload_replace(struct mtk_eth
}
}
@@ -516,7 +516,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!is_valid_ether_addr(data.eth.h_source) ||
!is_valid_ether_addr(data.eth.h_dest))
return -EINVAL;
-@@ -318,10 +345,13 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -315,10 +342,13 @@ mtk_flow_offload_replace(struct mtk_eth
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
struct flow_match_ports ports;
@@ -531,7 +531,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
return -EOPNOTSUPP;
}
-@@ -351,6 +381,9 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -348,6 +378,9 @@ mtk_flow_offload_replace(struct mtk_eth
if (act->id != FLOW_ACTION_MANGLE)
continue;
@@ -541,7 +541,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
switch (act->mangle.htype) {
case FLOW_ACT_MANGLE_HDR_TYPE_TCP:
case FLOW_ACT_MANGLE_HDR_TYPE_UDP:
-@@ -376,6 +409,9 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -373,6 +406,9 @@ mtk_flow_offload_replace(struct mtk_eth
return err;
}
diff --git a/target/linux/generic/backport-5.15/702-v5.19-11-net-ethernet-mtk_eth_soc-wed-fix-sparse-endian-warni.patch b/target/linux/generic/backport-5.15/702-v5.19-11-net-ethernet-mtk_eth_soc-wed-fix-sparse-endian-warni.patch
new file mode 100644
index 00000000000000..8f3dfe82399f82
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-11-net-ethernet-mtk_eth_soc-wed-fix-sparse-endian-warni.patch
@@ -0,0 +1,56 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Fri, 8 Apr 2022 10:59:45 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc/wed: fix sparse endian warnings
+
+Descriptor fields are little-endian
+
+Fixes: 804775dfc288 ("net: ethernet: mtk_eth_soc: add support for Wireless Ethernet Dispatch (WED)")
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_wed.c
++++ b/drivers/net/ethernet/mediatek/mtk_wed.c
+@@ -144,16 +144,17 @@ mtk_wed_buffer_alloc(struct mtk_wed_devi
+
+ for (s = 0; s < MTK_WED_BUF_PER_PAGE; s++) {
+ u32 txd_size;
++ u32 ctrl;
+
+ txd_size = dev->wlan.init_buf(buf, buf_phys, token++);
+
+- desc->buf0 = buf_phys;
+- desc->buf1 = buf_phys + txd_size;
+- desc->ctrl = FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN0,
+- txd_size) |
+- FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN1,
+- MTK_WED_BUF_SIZE - txd_size) |
+- MTK_WDMA_DESC_CTRL_LAST_SEG1;
++ desc->buf0 = cpu_to_le32(buf_phys);
++ desc->buf1 = cpu_to_le32(buf_phys + txd_size);
++ ctrl = FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN0, txd_size) |
++ FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN1,
++ MTK_WED_BUF_SIZE - txd_size) |
++ MTK_WDMA_DESC_CTRL_LAST_SEG1;
++ desc->ctrl = cpu_to_le32(ctrl);
+ desc->info = 0;
+ desc++;
+
+@@ -184,12 +185,14 @@ mtk_wed_free_buffer(struct mtk_wed_devic
+
+ for (i = 0, page_idx = 0; i < dev->buf_ring.size; i += MTK_WED_BUF_PER_PAGE) {
+ void *page = page_list[page_idx++];
++ dma_addr_t buf_addr;
+
+ if (!page)
+ break;
+
+- dma_unmap_page(dev->hw->dev, desc[i].buf0,
+- PAGE_SIZE, DMA_BIDIRECTIONAL);
++ buf_addr = le32_to_cpu(desc[i].buf0);
++ dma_unmap_page(dev->hw->dev, buf_addr, PAGE_SIZE,
++ DMA_BIDIRECTIONAL);
+ __free_page(page);
+ }
+
diff --git a/target/linux/generic/backport-5.15/702-v5.19-12-net-ethernet-mtk_eth_soc-fix-return-value-check-in-m.patch b/target/linux/generic/backport-5.15/702-v5.19-12-net-ethernet-mtk_eth_soc-fix-return-value-check-in-m.patch
new file mode 100644
index 00000000000000..4ec8fe74bc7d7a
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-12-net-ethernet-mtk_eth_soc-fix-return-value-check-in-m.patch
@@ -0,0 +1,25 @@
+From: Yang Yingliang <yangyingliang@huawei.com>
+Date: Fri, 8 Apr 2022 11:22:46 +0800
+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix return value check in
+ mtk_wed_add_hw()
+
+If syscon_regmap_lookup_by_phandle() fails, it never return NULL pointer,
+change the check to IS_ERR().
+
+Fixes: 804775dfc288 ("net: ethernet: mtk_eth_soc: add support for Wireless Ethernet Dispatch (WED)")
+Reported-by: Hulk Robot <hulkci@huawei.com>
+Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_wed.c
++++ b/drivers/net/ethernet/mediatek/mtk_wed.c
+@@ -816,7 +816,7 @@ void mtk_wed_add_hw(struct device_node *
+ return;
+
+ regs = syscon_regmap_lookup_by_phandle(np, NULL);
+- if (!regs)
++ if (IS_ERR(regs))
+ return;
+
+ rcu_assign_pointer(mtk_soc_wed_ops, &wed_ops);
diff --git a/target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch b/target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch
new file mode 100644
index 00000000000000..d87022fce43e05
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch
@@ -0,0 +1,35 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 11 Apr 2022 12:13:25 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: use standard property for
+ cci-control-port
+
+Rely on standard cci-control-port property to identify CCI port
+reference.
+Update mt7622 dts binding.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -962,7 +962,7 @@
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
+ mediatek,ethsys = <ðsys>;
+ mediatek,sgmiisys = <&sgmiisys>;
+- mediatek,cci-control = <&cci_control2>;
++ cci-control-port = <&cci_control2>;
+ mediatek,wed = <&wed0>, <&wed1>;
+ mediatek,pcie-mirror = <&pcie_mirror>;
+ mediatek,hifsys = <&hifsys>;
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -3185,7 +3185,7 @@ static int mtk_probe(struct platform_dev
+ struct regmap *cci;
+
+ cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+- "mediatek,cci-control");
++ "cci-control-port");
+ /* enable CPU/bus coherency */
+ if (!IS_ERR(cci))
+ regmap_write(cci, 0, 3);
diff --git a/target/linux/generic/backport-5.15/702-v5.19-14-net-ethernet-mtk_eth_soc-use-after-free-in-__mtk_ppe.patch b/target/linux/generic/backport-5.15/702-v5.19-14-net-ethernet-mtk_eth_soc-use-after-free-in-__mtk_ppe.patch
new file mode 100644
index 00000000000000..656b3a159e8d16
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-14-net-ethernet-mtk_eth_soc-use-after-free-in-__mtk_ppe.patch
@@ -0,0 +1,33 @@
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Tue, 12 Apr 2022 12:24:19 +0300
+Subject: [PATCH] net: ethernet: mtk_eth_soc: use after free in
+ __mtk_ppe_check_skb()
+
+The __mtk_foe_entry_clear() function frees "entry" so we have to use
+the _safe() version of hlist_for_each_entry() to prevent a use after
+free.
+
+Fixes: 33fc42de3327 ("net: ethernet: mtk_eth_soc: support creating mac address based offload entries")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
+@@ -600,6 +600,7 @@ void __mtk_ppe_check_skb(struct mtk_ppe
+ struct mtk_foe_entry *hwe = &ppe->foe_table[hash];
+ struct mtk_flow_entry *entry;
+ struct mtk_foe_bridge key = {};
++ struct hlist_node *n;
+ struct ethhdr *eh;
+ bool found = false;
+ u8 *tag;
+@@ -609,7 +610,7 @@ void __mtk_ppe_check_skb(struct mtk_ppe
+ if (FIELD_GET(MTK_FOE_IB1_STATE, hwe->ib1) == MTK_FOE_STATE_BIND)
+ goto out;
+
+- hlist_for_each_entry(entry, head, list) {
++ hlist_for_each_entry_safe(entry, n, head, list) {
+ if (entry->type == MTK_FLOW_TYPE_L2_SUBFLOW) {
+ if (unlikely(FIELD_GET(MTK_FOE_IB1_STATE, hwe->ib1) ==
+ MTK_FOE_STATE_BIND))
diff --git a/target/linux/generic/backport-5.15/702-v5.19-15-net-ethernet-mtk_eth_soc-add-check-for-allocation-fa.patch b/target/linux/generic/backport-5.15/702-v5.19-15-net-ethernet-mtk_eth_soc-add-check-for-allocation-fa.patch
new file mode 100644
index 00000000000000..714163c86bb048
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-15-net-ethernet-mtk_eth_soc-add-check-for-allocation-fa.patch
@@ -0,0 +1,22 @@
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Thu, 21 Apr 2022 18:49:02 +0300
+Subject: [PATCH] net: ethernet: mtk_eth_soc: add check for allocation failure
+
+Check if the kzalloc() failed.
+
+Fixes: 804775dfc288 ("net: ethernet: mtk_eth_soc: add support for Wireless Ethernet Dispatch (WED)")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_wed.c
++++ b/drivers/net/ethernet/mediatek/mtk_wed.c
+@@ -827,6 +827,8 @@ void mtk_wed_add_hw(struct device_node *
+ goto unlock;
+
+ hw = kzalloc(sizeof(*hw), GFP_KERNEL);
++ if (!hw)
++ goto unlock;
+ hw->node = np;
+ hw->regs = regs;
+ hw->eth = eth;
diff --git a/target/linux/generic/backport-5.15/702-v5.19-16-eth-mtk_eth_soc-silence-the-GCC-12-array-bounds-warn.patch b/target/linux/generic/backport-5.15/702-v5.19-16-eth-mtk_eth_soc-silence-the-GCC-12-array-bounds-warn.patch
new file mode 100644
index 00000000000000..aa98745ac60e5b
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-16-eth-mtk_eth_soc-silence-the-GCC-12-array-bounds-warn.patch
@@ -0,0 +1,26 @@
+From: Jakub Kicinski <kuba@kernel.org>
+Date: Fri, 20 May 2022 12:56:03 -0700
+Subject: [PATCH] eth: mtk_eth_soc: silence the GCC 12 array-bounds warning
+
+GCC 12 gets upset because in mtk_foe_entry_commit_subflow()
+this driver allocates a partial structure. The writes are
+within bounds.
+
+Silence these warnings for now, our build bot runs GCC 12
+so we won't allow any new instances.
+
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/Makefile
++++ b/drivers/net/ethernet/mediatek/Makefile
+@@ -11,3 +11,8 @@ mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) +
+ endif
+ obj-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_ops.o
+ obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o
++
++# FIXME: temporarily silence -Warray-bounds on non W=1+ builds
++ifndef KBUILD_EXTRA_WARN
++CFLAGS_mtk_ppe.o += -Wno-array-bounds
++endif
diff --git a/target/linux/generic/backport-5.15/702-v5.19-17-net-ethernet-mtk_eth_soc-rely-on-GFP_KERNEL-for-dma_.patch b/target/linux/generic/backport-5.15/702-v5.19-17-net-ethernet-mtk_eth_soc-rely-on-GFP_KERNEL-for-dma_.patch
new file mode 100644
index 00000000000000..97677670cc1a59
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-17-net-ethernet-mtk_eth_soc-rely-on-GFP_KERNEL-for-dma_.patch
@@ -0,0 +1,52 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:26 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: rely on GFP_KERNEL for
+ dma_alloc_coherent whenever possible
+
+Rely on GFP_KERNEL for dma descriptors mappings in mtk_tx_alloc(),
+mtk_rx_alloc() and mtk_init_fq_dma() since they are run in non-irq
+context.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -845,7 +845,7 @@ static int mtk_init_fq_dma(struct mtk_et
+ eth->scratch_ring = dma_alloc_coherent(eth->dma_dev,
+ cnt * sizeof(struct mtk_tx_dma),
+ ð->phy_scratch_ring,
+- GFP_ATOMIC);
++ GFP_KERNEL);
+ if (unlikely(!eth->scratch_ring))
+ return -ENOMEM;
+
+@@ -1623,7 +1623,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+ goto no_tx_mem;
+
+ ring->dma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
+- &ring->phys, GFP_ATOMIC);
++ &ring->phys, GFP_KERNEL);
+ if (!ring->dma)
+ goto no_tx_mem;
+
+@@ -1641,8 +1641,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+ */
+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
+ ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
+- &ring->phys_pdma,
+- GFP_ATOMIC);
++ &ring->phys_pdma, GFP_KERNEL);
+ if (!ring->dma_pdma)
+ goto no_tx_mem;
+
+@@ -1757,7 +1756,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+
+ ring->dma = dma_alloc_coherent(eth->dma_dev,
+ rx_dma_size * sizeof(*ring->dma),
+- &ring->phys, GFP_ATOMIC);
++ &ring->phys, GFP_KERNEL);
+ if (!ring->dma)
+ return -ENOMEM;
+
diff --git a/target/linux/generic/backport-5.15/702-v5.19-18-net-ethernet-mtk_eth_soc-move-tx-dma-desc-configurat.patch b/target/linux/generic/backport-5.15/702-v5.19-18-net-ethernet-mtk_eth_soc-move-tx-dma-desc-configurat.patch
new file mode 100644
index 00000000000000..95f122f730f724
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-18-net-ethernet-mtk_eth_soc-move-tx-dma-desc-configurat.patch
@@ -0,0 +1,206 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:27 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: move tx dma desc configuration in
+ mtk_tx_set_dma_desc
+
+Move tx dma descriptor configuration in mtk_tx_set_dma_desc routine.
+This is a preliminary patch to introduce mt7986 ethernet support since
+it relies on a different tx dma descriptor layout.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -971,18 +971,51 @@ static void setup_tx_buf(struct mtk_eth
+ }
+ }
+
++static void mtk_tx_set_dma_desc(struct net_device *dev, struct mtk_tx_dma *desc,
++ struct mtk_tx_dma_desc_info *info)
++{
++ struct mtk_mac *mac = netdev_priv(dev);
++ u32 data;
++
++ WRITE_ONCE(desc->txd1, info->addr);
++
++ data = TX_DMA_SWC | TX_DMA_PLEN0(info->size);
++ if (info->last)
++ data |= TX_DMA_LS0;
++ WRITE_ONCE(desc->txd3, data);
++
++ data = (mac->id + 1) << TX_DMA_FPORT_SHIFT; /* forward port */
++ if (info->first) {
++ if (info->gso)
++ data |= TX_DMA_TSO;
++ /* tx checksum offload */
++ if (info->csum)
++ data |= TX_DMA_CHKSUM;
++ /* vlan header offload */
++ if (info->vlan)
++ data |= TX_DMA_INS_VLAN | info->vlan_tci;
++ }
++ WRITE_ONCE(desc->txd4, data);
++}
++
+ static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
+ int tx_num, struct mtk_tx_ring *ring, bool gso)
+ {
++ struct mtk_tx_dma_desc_info txd_info = {
++ .size = skb_headlen(skb),
++ .gso = gso,
++ .csum = skb->ip_summed == CHECKSUM_PARTIAL,
++ .vlan = skb_vlan_tag_present(skb),
++ .vlan_tci = skb_vlan_tag_get(skb),
++ .first = true,
++ .last = !skb_is_nonlinear(skb),
++ };
+ struct mtk_mac *mac = netdev_priv(dev);
+ struct mtk_eth *eth = mac->hw;
+ struct mtk_tx_dma *itxd, *txd;
+ struct mtk_tx_dma *itxd_pdma, *txd_pdma;
+ struct mtk_tx_buf *itx_buf, *tx_buf;
+- dma_addr_t mapped_addr;
+- unsigned int nr_frags;
+ int i, n_desc = 1;
+- u32 txd4 = 0, fport;
+ int k = 0;
+
+ itxd = ring->next_free;
+@@ -990,49 +1023,32 @@ static int mtk_tx_map(struct sk_buff *sk
+ if (itxd == ring->last_free)
+ return -ENOMEM;
+
+- /* set the forward port */
+- fport = (mac->id + 1) << TX_DMA_FPORT_SHIFT;
+- txd4 |= fport;
+-
+ itx_buf = mtk_desc_to_tx_buf(ring, itxd);
+ memset(itx_buf, 0, sizeof(*itx_buf));
+
+- if (gso)
+- txd4 |= TX_DMA_TSO;
+-
+- /* TX Checksum offload */
+- if (skb->ip_summed == CHECKSUM_PARTIAL)
+- txd4 |= TX_DMA_CHKSUM;
+-
+- /* VLAN header offload */
+- if (skb_vlan_tag_present(skb))
+- txd4 |= TX_DMA_INS_VLAN | skb_vlan_tag_get(skb);
+-
+- mapped_addr = dma_map_single(eth->dma_dev, skb->data,
+- skb_headlen(skb), DMA_TO_DEVICE);
+- if (unlikely(dma_mapping_error(eth->dma_dev, mapped_addr)))
++ txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size,
++ DMA_TO_DEVICE);
++ if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr)))
+ return -ENOMEM;
+
+- WRITE_ONCE(itxd->txd1, mapped_addr);
++ mtk_tx_set_dma_desc(dev, itxd, &txd_info);
++
+ itx_buf->flags |= MTK_TX_FLAGS_SINGLE0;
+ itx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 :
+ MTK_TX_FLAGS_FPORT1;
+- setup_tx_buf(eth, itx_buf, itxd_pdma, mapped_addr, skb_headlen(skb),
++ setup_tx_buf(eth, itx_buf, itxd_pdma, txd_info.addr, txd_info.size,
+ k++);
+
+ /* TX SG offload */
+ txd = itxd;
+ txd_pdma = qdma_to_pdma(ring, txd);
+- nr_frags = skb_shinfo(skb)->nr_frags;
+
+- for (i = 0; i < nr_frags; i++) {
++ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+ skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+ unsigned int offset = 0;
+ int frag_size = skb_frag_size(frag);
+
+ while (frag_size) {
+- bool last_frag = false;
+- unsigned int frag_map_size;
+ bool new_desc = true;
+
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA) ||
+@@ -1047,23 +1063,17 @@ static int mtk_tx_map(struct sk_buff *sk
+ new_desc = false;
+ }
+
+-
+- frag_map_size = min(frag_size, MTK_TX_DMA_BUF_LEN);
+- mapped_addr = skb_frag_dma_map(eth->dma_dev, frag, offset,
+- frag_map_size,
+- DMA_TO_DEVICE);
+- if (unlikely(dma_mapping_error(eth->dma_dev, mapped_addr)))
++ memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
++ txd_info.size = min(frag_size, MTK_TX_DMA_BUF_LEN);
++ txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
++ !(frag_size - txd_info.size);
++ txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag,
++ offset, txd_info.size,
++ DMA_TO_DEVICE);
++ if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr)))
+ goto err_dma;
+
+- if (i == nr_frags - 1 &&
+- (frag_size - frag_map_size) == 0)
+- last_frag = true;
+-
+- WRITE_ONCE(txd->txd1, mapped_addr);
+- WRITE_ONCE(txd->txd3, (TX_DMA_SWC |
+- TX_DMA_PLEN0(frag_map_size) |
+- last_frag * TX_DMA_LS0));
+- WRITE_ONCE(txd->txd4, fport);
++ mtk_tx_set_dma_desc(dev, txd, &txd_info);
+
+ tx_buf = mtk_desc_to_tx_buf(ring, txd);
+ if (new_desc)
+@@ -1073,20 +1083,17 @@ static int mtk_tx_map(struct sk_buff *sk
+ tx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 :
+ MTK_TX_FLAGS_FPORT1;
+
+- setup_tx_buf(eth, tx_buf, txd_pdma, mapped_addr,
+- frag_map_size, k++);
++ setup_tx_buf(eth, tx_buf, txd_pdma, txd_info.addr,
++ txd_info.size, k++);
+
+- frag_size -= frag_map_size;
+- offset += frag_map_size;
++ frag_size -= txd_info.size;
++ offset += txd_info.size;
+ }
+ }
+
+ /* store skb to cleanup */
+ itx_buf->skb = skb;
+
+- WRITE_ONCE(itxd->txd4, txd4);
+- WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) |
+- (!nr_frags * TX_DMA_LS0)));
+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
+ if (k & 0x1)
+ txd_pdma->txd2 |= TX_DMA_LS0;
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -842,6 +842,17 @@ enum mkt_eth_capabilities {
+ MTK_MUX_U3_GMAC2_TO_QPHY | \
+ MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA)
+
++struct mtk_tx_dma_desc_info {
++ dma_addr_t addr;
++ u32 size;
++ u16 vlan_tci;
++ u8 gso:1;
++ u8 csum:1;
++ u8 vlan:1;
++ u8 first:1;
++ u8 last:1;
++};
++
+ /* struct mtk_eth_data - This is the structure holding all differences
+ * among various plaforms
+ * @ana_rgc3: The offset for register ANA_RGC3 related to
diff --git a/target/linux/generic/backport-5.15/702-v5.19-19-net-ethernet-mtk_eth_soc-add-txd_size-to-mtk_soc_dat.patch b/target/linux/generic/backport-5.15/702-v5.19-19-net-ethernet-mtk_eth_soc-add-txd_size-to-mtk_soc_dat.patch
new file mode 100644
index 00000000000000..0aeb1ab9504b27
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-19-net-ethernet-mtk_eth_soc-add-txd_size-to-mtk_soc_dat.patch
@@ -0,0 +1,167 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:28 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: add txd_size to mtk_soc_data
+
+In order to remove mtk_tx_dma size dependency, introduce txd_size in
+mtk_soc_data data structure. Rely on txd_size in mtk_init_fq_dma() and
+mtk_dma_free() routines.
+This is a preliminary patch to add mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -837,20 +837,20 @@ static inline bool mtk_rx_get_desc(struc
+ /* the qdma core needs scratch memory to be setup */
+ static int mtk_init_fq_dma(struct mtk_eth *eth)
+ {
++ const struct mtk_soc_data *soc = eth->soc;
+ dma_addr_t phy_ring_tail;
+ int cnt = MTK_DMA_SIZE;
+ dma_addr_t dma_addr;
+ int i;
+
+ eth->scratch_ring = dma_alloc_coherent(eth->dma_dev,
+- cnt * sizeof(struct mtk_tx_dma),
++ cnt * soc->txrx.txd_size,
+ ð->phy_scratch_ring,
+ GFP_KERNEL);
+ if (unlikely(!eth->scratch_ring))
+ return -ENOMEM;
+
+- eth->scratch_head = kcalloc(cnt, MTK_QDMA_PAGE_SIZE,
+- GFP_KERNEL);
++ eth->scratch_head = kcalloc(cnt, MTK_QDMA_PAGE_SIZE, GFP_KERNEL);
+ if (unlikely(!eth->scratch_head))
+ return -ENOMEM;
+
+@@ -860,16 +860,19 @@ static int mtk_init_fq_dma(struct mtk_et
+ if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr)))
+ return -ENOMEM;
+
+- phy_ring_tail = eth->phy_scratch_ring +
+- (sizeof(struct mtk_tx_dma) * (cnt - 1));
++ phy_ring_tail = eth->phy_scratch_ring + soc->txrx.txd_size * (cnt - 1);
+
+ for (i = 0; i < cnt; i++) {
+- eth->scratch_ring[i].txd1 =
+- (dma_addr + (i * MTK_QDMA_PAGE_SIZE));
++ struct mtk_tx_dma *txd;
++
++ txd = (void *)eth->scratch_ring + i * soc->txrx.txd_size;
++ txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
+ if (i < cnt - 1)
+- eth->scratch_ring[i].txd2 = (eth->phy_scratch_ring +
+- ((i + 1) * sizeof(struct mtk_tx_dma)));
+- eth->scratch_ring[i].txd3 = TX_DMA_SDL(MTK_QDMA_PAGE_SIZE);
++ txd->txd2 = eth->phy_scratch_ring +
++ (i + 1) * soc->txrx.txd_size;
++
++ txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
++ txd->txd4 = 0;
+ }
+
+ mtk_w32(eth, eth->phy_scratch_ring, MTK_QDMA_FQ_HEAD);
+@@ -2169,6 +2172,7 @@ static int mtk_dma_init(struct mtk_eth *
+
+ static void mtk_dma_free(struct mtk_eth *eth)
+ {
++ const struct mtk_soc_data *soc = eth->soc;
+ int i;
+
+ for (i = 0; i < MTK_MAC_COUNT; i++)
+@@ -2176,9 +2180,8 @@ static void mtk_dma_free(struct mtk_eth
+ netdev_reset_queue(eth->netdev[i]);
+ if (eth->scratch_ring) {
+ dma_free_coherent(eth->dma_dev,
+- MTK_DMA_SIZE * sizeof(struct mtk_tx_dma),
+- eth->scratch_ring,
+- eth->phy_scratch_ring);
++ MTK_DMA_SIZE * soc->txrx.txd_size,
++ eth->scratch_ring, eth->phy_scratch_ring);
+ eth->scratch_ring = NULL;
+ eth->phy_scratch_ring = 0;
+ }
+@@ -3388,6 +3391,9 @@ static const struct mtk_soc_data mt2701_
+ .hw_features = MTK_HW_FEATURES,
+ .required_clks = MT7623_CLKS_BITMAP,
+ .required_pctl = true,
++ .txrx = {
++ .txd_size = sizeof(struct mtk_tx_dma),
++ },
+ };
+
+ static const struct mtk_soc_data mt7621_data = {
+@@ -3396,6 +3402,9 @@ static const struct mtk_soc_data mt7621_
+ .required_clks = MT7621_CLKS_BITMAP,
+ .required_pctl = false,
+ .offload_version = 2,
++ .txrx = {
++ .txd_size = sizeof(struct mtk_tx_dma),
++ },
+ };
+
+ static const struct mtk_soc_data mt7622_data = {
+@@ -3405,6 +3414,9 @@ static const struct mtk_soc_data mt7622_
+ .required_clks = MT7622_CLKS_BITMAP,
+ .required_pctl = false,
+ .offload_version = 2,
++ .txrx = {
++ .txd_size = sizeof(struct mtk_tx_dma),
++ },
+ };
+
+ static const struct mtk_soc_data mt7623_data = {
+@@ -3413,6 +3425,9 @@ static const struct mtk_soc_data mt7623_
+ .required_clks = MT7623_CLKS_BITMAP,
+ .required_pctl = true,
+ .offload_version = 2,
++ .txrx = {
++ .txd_size = sizeof(struct mtk_tx_dma),
++ },
+ };
+
+ static const struct mtk_soc_data mt7629_data = {
+@@ -3421,6 +3436,9 @@ static const struct mtk_soc_data mt7629_
+ .hw_features = MTK_HW_FEATURES,
+ .required_clks = MT7629_CLKS_BITMAP,
+ .required_pctl = false,
++ .txrx = {
++ .txd_size = sizeof(struct mtk_tx_dma),
++ },
+ };
+
+ static const struct mtk_soc_data rt5350_data = {
+@@ -3428,6 +3446,9 @@ static const struct mtk_soc_data rt5350_
+ .hw_features = MTK_HW_FEATURES_MT7628,
+ .required_clks = MT7628_CLKS_BITMAP,
+ .required_pctl = false,
++ .txrx = {
++ .txd_size = sizeof(struct mtk_tx_dma),
++ },
+ };
+
+ const struct of_device_id of_mtk_match[] = {
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -863,6 +863,7 @@ struct mtk_tx_dma_desc_info {
+ * the target SoC
+ * @required_pctl A bool value to show whether the SoC requires
+ * the extra setup for those pins used by GMAC.
++ * @txd_size Tx DMA descriptor size.
+ */
+ struct mtk_soc_data {
+ u32 ana_rgc3;
+@@ -871,6 +872,9 @@ struct mtk_soc_data {
+ bool required_pctl;
+ u8 offload_version;
+ netdev_features_t hw_features;
++ struct {
++ u32 txd_size;
++ } txrx;
+ };
+
+ /* currently no SoC has more than 2 macs */
diff --git a/target/linux/generic/backport-5.15/702-v5.19-20-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_tx_.patch b/target/linux/generic/backport-5.15/702-v5.19-20-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_tx_.patch
new file mode 100644
index 00000000000000..01dbca0753bb0f
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-20-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_tx_.patch
@@ -0,0 +1,78 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:29 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: rely on txd_size in
+ mtk_tx_alloc/mtk_tx_clean
+
+This is a preliminary patch to add mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -1624,8 +1624,10 @@ static int mtk_napi_rx(struct napi_struc
+
+ static int mtk_tx_alloc(struct mtk_eth *eth)
+ {
++ const struct mtk_soc_data *soc = eth->soc;
+ struct mtk_tx_ring *ring = ð->tx_ring;
+- int i, sz = sizeof(*ring->dma);
++ int i, sz = soc->txrx.txd_size;
++ struct mtk_tx_dma *txd;
+
+ ring->buf = kcalloc(MTK_DMA_SIZE, sizeof(*ring->buf),
+ GFP_KERNEL);
+@@ -1641,8 +1643,10 @@ static int mtk_tx_alloc(struct mtk_eth *
+ int next = (i + 1) % MTK_DMA_SIZE;
+ u32 next_ptr = ring->phys + next * sz;
+
+- ring->dma[i].txd2 = next_ptr;
+- ring->dma[i].txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
++ txd = (void *)ring->dma + i * sz;
++ txd->txd2 = next_ptr;
++ txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
++ txd->txd4 = 0;
+ }
+
+ /* On MT7688 (PDMA only) this driver uses the ring->dma structs
+@@ -1664,7 +1668,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+ ring->dma_size = MTK_DMA_SIZE;
+ atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
+ ring->next_free = &ring->dma[0];
+- ring->last_free = &ring->dma[MTK_DMA_SIZE - 1];
++ ring->last_free = (void *)txd;
+ ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
+ ring->thresh = MAX_SKB_FRAGS;
+
+@@ -1697,6 +1701,7 @@ no_tx_mem:
+
+ static void mtk_tx_clean(struct mtk_eth *eth)
+ {
++ const struct mtk_soc_data *soc = eth->soc;
+ struct mtk_tx_ring *ring = ð->tx_ring;
+ int i;
+
+@@ -1709,17 +1714,15 @@ static void mtk_tx_clean(struct mtk_eth
+
+ if (ring->dma) {
+ dma_free_coherent(eth->dma_dev,
+- MTK_DMA_SIZE * sizeof(*ring->dma),
+- ring->dma,
+- ring->phys);
++ MTK_DMA_SIZE * soc->txrx.txd_size,
++ ring->dma, ring->phys);
+ ring->dma = NULL;
+ }
+
+ if (ring->dma_pdma) {
+ dma_free_coherent(eth->dma_dev,
+- MTK_DMA_SIZE * sizeof(*ring->dma_pdma),
+- ring->dma_pdma,
+- ring->phys_pdma);
++ MTK_DMA_SIZE * soc->txrx.txd_size,
++ ring->dma_pdma, ring->phys_pdma);
+ ring->dma_pdma = NULL;
+ }
+ }
diff --git a/target/linux/generic/backport-5.15/702-v5.19-21-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_des.patch b/target/linux/generic/backport-5.15/702-v5.19-21-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_des.patch
new file mode 100644
index 00000000000000..1d23a178b4be0a
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-21-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-mtk_des.patch
@@ -0,0 +1,109 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:30 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: rely on txd_size in
+ mtk_desc_to_tx_buf
+
+This is a preliminary patch to add mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -890,10 +890,11 @@ static inline void *mtk_qdma_phys_to_vir
+ return ret + (desc - ring->phys);
+ }
+
+-static inline struct mtk_tx_buf *mtk_desc_to_tx_buf(struct mtk_tx_ring *ring,
+- struct mtk_tx_dma *txd)
++static struct mtk_tx_buf *mtk_desc_to_tx_buf(struct mtk_tx_ring *ring,
++ struct mtk_tx_dma *txd,
++ u32 txd_size)
+ {
+- int idx = txd - ring->dma;
++ int idx = ((void *)txd - (void *)ring->dma) / txd_size;
+
+ return &ring->buf[idx];
+ }
+@@ -1015,6 +1016,7 @@ static int mtk_tx_map(struct sk_buff *sk
+ };
+ struct mtk_mac *mac = netdev_priv(dev);
+ struct mtk_eth *eth = mac->hw;
++ const struct mtk_soc_data *soc = eth->soc;
+ struct mtk_tx_dma *itxd, *txd;
+ struct mtk_tx_dma *itxd_pdma, *txd_pdma;
+ struct mtk_tx_buf *itx_buf, *tx_buf;
+@@ -1026,7 +1028,7 @@ static int mtk_tx_map(struct sk_buff *sk
+ if (itxd == ring->last_free)
+ return -ENOMEM;
+
+- itx_buf = mtk_desc_to_tx_buf(ring, itxd);
++ itx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->txrx.txd_size);
+ memset(itx_buf, 0, sizeof(*itx_buf));
+
+ txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size,
+@@ -1054,7 +1056,7 @@ static int mtk_tx_map(struct sk_buff *sk
+ while (frag_size) {
+ bool new_desc = true;
+
+- if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA) ||
++ if (MTK_HAS_CAPS(soc->caps, MTK_QDMA) ||
+ (i & 0x1)) {
+ txd = mtk_qdma_phys_to_virt(ring, txd->txd2);
+ txd_pdma = qdma_to_pdma(ring, txd);
+@@ -1078,7 +1080,8 @@ static int mtk_tx_map(struct sk_buff *sk
+
+ mtk_tx_set_dma_desc(dev, txd, &txd_info);
+
+- tx_buf = mtk_desc_to_tx_buf(ring, txd);
++ tx_buf = mtk_desc_to_tx_buf(ring, txd,
++ soc->txrx.txd_size);
+ if (new_desc)
+ memset(tx_buf, 0, sizeof(*tx_buf));
+ tx_buf->skb = (struct sk_buff *)MTK_DMA_DUMMY_DESC;
+@@ -1097,7 +1100,7 @@ static int mtk_tx_map(struct sk_buff *sk
+ /* store skb to cleanup */
+ itx_buf->skb = skb;
+
+- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
++ if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
+ if (k & 0x1)
+ txd_pdma->txd2 |= TX_DMA_LS0;
+ else
+@@ -1115,7 +1118,7 @@ static int mtk_tx_map(struct sk_buff *sk
+ */
+ wmb();
+
+- if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
++ if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
+ if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) ||
+ !netdev_xmit_more())
+ mtk_w32(eth, txd->txd2, MTK_QTX_CTX_PTR);
+@@ -1129,13 +1132,13 @@ static int mtk_tx_map(struct sk_buff *sk
+
+ err_dma:
+ do {
+- tx_buf = mtk_desc_to_tx_buf(ring, itxd);
++ tx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->txrx.txd_size);
+
+ /* unmap dma */
+ mtk_tx_unmap(eth, tx_buf, false);
+
+ itxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
+- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
++ if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA))
+ itxd_pdma->txd2 = TX_DMA_DESP2_DEF;
+
+ itxd = mtk_qdma_phys_to_virt(ring, itxd->txd2);
+@@ -1449,7 +1452,8 @@ static int mtk_poll_tx_qdma(struct mtk_e
+ if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0)
+ break;
+
+- tx_buf = mtk_desc_to_tx_buf(ring, desc);
++ tx_buf = mtk_desc_to_tx_buf(ring, desc,
++ eth->soc->txrx.txd_size);
+ if (tx_buf->flags & MTK_TX_FLAGS_FPORT1)
+ mac = 1;
+
diff --git a/target/linux/generic/backport-5.15/702-v5.19-22-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-txd_to_.patch b/target/linux/generic/backport-5.15/702-v5.19-22-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-txd_to_.patch
new file mode 100644
index 00000000000000..2989d190d828ca
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-22-net-ethernet-mtk_eth_soc-rely-on-txd_size-in-txd_to_.patch
@@ -0,0 +1,39 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:31 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: rely on txd_size in txd_to_idx
+
+This is a preliminary patch to add mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -905,9 +905,10 @@ static struct mtk_tx_dma *qdma_to_pdma(s
+ return ring->dma_pdma - ring->dma + dma;
+ }
+
+-static int txd_to_idx(struct mtk_tx_ring *ring, struct mtk_tx_dma *dma)
++static int txd_to_idx(struct mtk_tx_ring *ring, struct mtk_tx_dma *dma,
++ u32 txd_size)
+ {
+- return ((void *)dma - (void *)ring->dma) / sizeof(*dma);
++ return ((void *)dma - (void *)ring->dma) / txd_size;
+ }
+
+ static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
+@@ -1123,8 +1124,10 @@ static int mtk_tx_map(struct sk_buff *sk
+ !netdev_xmit_more())
+ mtk_w32(eth, txd->txd2, MTK_QTX_CTX_PTR);
+ } else {
+- int next_idx = NEXT_DESP_IDX(txd_to_idx(ring, txd),
+- ring->dma_size);
++ int next_idx;
++
++ next_idx = NEXT_DESP_IDX(txd_to_idx(ring, txd, soc->txrx.txd_size),
++ ring->dma_size);
+ mtk_w32(eth, next_idx, MT7628_TX_CTX_IDX0);
+ }
+
diff --git a/target/linux/generic/backport-5.15/702-v5.19-23-net-ethernet-mtk_eth_soc-add-rxd_size-to-mtk_soc_dat.patch b/target/linux/generic/backport-5.15/702-v5.19-23-net-ethernet-mtk_eth_soc-add-rxd_size-to-mtk_soc_dat.patch
new file mode 100644
index 00000000000000..be258da75a9e1a
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-23-net-ethernet-mtk_eth_soc-add-rxd_size-to-mtk_soc_dat.patch
@@ -0,0 +1,102 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:32 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: add rxd_size to mtk_soc_data
+
+Similar to tx counterpart, introduce rxd_size in mtk_soc_data data
+structure.
+This is a preliminary patch to add mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -1775,7 +1775,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+ }
+
+ ring->dma = dma_alloc_coherent(eth->dma_dev,
+- rx_dma_size * sizeof(*ring->dma),
++ rx_dma_size * eth->soc->txrx.rxd_size,
+ &ring->phys, GFP_KERNEL);
+ if (!ring->dma)
+ return -ENOMEM;
+@@ -1833,9 +1833,8 @@ static void mtk_rx_clean(struct mtk_eth
+
+ if (ring->dma) {
+ dma_free_coherent(eth->dma_dev,
+- ring->dma_size * sizeof(*ring->dma),
+- ring->dma,
+- ring->phys);
++ ring->dma_size * eth->soc->txrx.rxd_size,
++ ring->dma, ring->phys);
+ ring->dma = NULL;
+ }
+ }
+@@ -3403,6 +3402,7 @@ static const struct mtk_soc_data mt2701_
+ .required_pctl = true,
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
++ .rxd_size = sizeof(struct mtk_rx_dma),
+ },
+ };
+
+@@ -3414,6 +3414,7 @@ static const struct mtk_soc_data mt7621_
+ .offload_version = 2,
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
++ .rxd_size = sizeof(struct mtk_rx_dma),
+ },
+ };
+
+@@ -3426,6 +3427,7 @@ static const struct mtk_soc_data mt7622_
+ .offload_version = 2,
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
++ .rxd_size = sizeof(struct mtk_rx_dma),
+ },
+ };
+
+@@ -3437,6 +3439,7 @@ static const struct mtk_soc_data mt7623_
+ .offload_version = 2,
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
++ .rxd_size = sizeof(struct mtk_rx_dma),
+ },
+ };
+
+@@ -3448,6 +3451,7 @@ static const struct mtk_soc_data mt7629_
+ .required_pctl = false,
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
++ .rxd_size = sizeof(struct mtk_rx_dma),
+ },
+ };
+
+@@ -3458,6 +3462,7 @@ static const struct mtk_soc_data rt5350_
+ .required_pctl = false,
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
++ .rxd_size = sizeof(struct mtk_rx_dma),
+ },
+ };
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -864,6 +864,7 @@ struct mtk_tx_dma_desc_info {
+ * @required_pctl A bool value to show whether the SoC requires
+ * the extra setup for those pins used by GMAC.
+ * @txd_size Tx DMA descriptor size.
++ * @rxd_size Rx DMA descriptor size.
+ */
+ struct mtk_soc_data {
+ u32 ana_rgc3;
+@@ -874,6 +875,7 @@ struct mtk_soc_data {
+ netdev_features_t hw_features;
+ struct {
+ u32 txd_size;
++ u32 rxd_size;
+ } txrx;
+ };
+
diff --git a/target/linux/generic/backport-5.15/702-v5.19-24-net-ethernet-mtk_eth_soc-rely-on-txd_size-field-in-m.patch b/target/linux/generic/backport-5.15/702-v5.19-24-net-ethernet-mtk_eth_soc-rely-on-txd_size-field-in-m.patch
new file mode 100644
index 00000000000000..53af586b6c0fc9
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-24-net-ethernet-mtk_eth_soc-rely-on-txd_size-field-in-m.patch
@@ -0,0 +1,46 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:33 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: rely on txd_size field in
+ mtk_poll_tx/mtk_poll_rx
+
+This is a preliminary to ad mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -1264,9 +1264,12 @@ static struct mtk_rx_ring *mtk_get_rx_ri
+ return ð->rx_ring[0];
+
+ for (i = 0; i < MTK_MAX_RX_RING_NUM; i++) {
++ struct mtk_rx_dma *rxd;
++
+ ring = ð->rx_ring[i];
+ idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
+- if (ring->dma[idx].rxd2 & RX_DMA_DONE) {
++ rxd = (void *)ring->dma + idx * eth->soc->txrx.rxd_size;
++ if (rxd->rxd2 & RX_DMA_DONE) {
+ ring->calc_idx_update = true;
+ return ring;
+ }
+@@ -1317,7 +1320,7 @@ static int mtk_poll_rx(struct napi_struc
+ goto rx_done;
+
+ idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
+- rxd = &ring->dma[idx];
++ rxd = (void *)ring->dma + idx * eth->soc->txrx.rxd_size;
+ data = ring->data[idx];
+
+ if (!mtk_rx_get_desc(&trxd, rxd))
+@@ -1509,7 +1512,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
+
+ mtk_tx_unmap(eth, tx_buf, true);
+
+- desc = &ring->dma[cpu];
++ desc = (void *)ring->dma + cpu * eth->soc->txrx.txd_size;
+ ring->last_free = desc;
+ atomic_inc(&ring->free_count);
+
diff --git a/target/linux/generic/backport-5.15/702-v5.19-25-net-ethernet-mtk_eth_soc-rely-on-rxd_size-field-in-m.patch b/target/linux/generic/backport-5.15/702-v5.19-25-net-ethernet-mtk_eth_soc-rely-on-rxd_size-field-in-m.patch
new file mode 100644
index 00000000000000..1f4fa1dfb50e3b
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-25-net-ethernet-mtk_eth_soc-rely-on-rxd_size-field-in-m.patch
@@ -0,0 +1,68 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:34 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: rely on rxd_size field in
+ mtk_rx_alloc/mtk_rx_clean
+
+Remove mtk_rx_dma structure layout dependency in mtk_rx_alloc/mtk_rx_clean.
+Initialize to 0 rxd3 and rxd4 in mtk_rx_alloc.
+This is a preliminary patch to add mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -1784,18 +1784,25 @@ static int mtk_rx_alloc(struct mtk_eth *
+ return -ENOMEM;
+
+ for (i = 0; i < rx_dma_size; i++) {
++ struct mtk_rx_dma *rxd;
++
+ dma_addr_t dma_addr = dma_map_single(eth->dma_dev,
+ ring->data[i] + NET_SKB_PAD + eth->ip_align,
+ ring->buf_size,
+ DMA_FROM_DEVICE);
+ if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr)))
+ return -ENOMEM;
+- ring->dma[i].rxd1 = (unsigned int)dma_addr;
++
++ rxd = (void *)ring->dma + i * eth->soc->txrx.rxd_size;
++ rxd->rxd1 = (unsigned int)dma_addr;
+
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+- ring->dma[i].rxd2 = RX_DMA_LSO;
++ rxd->rxd2 = RX_DMA_LSO;
+ else
+- ring->dma[i].rxd2 = RX_DMA_PLEN0(ring->buf_size);
++ rxd->rxd2 = RX_DMA_PLEN0(ring->buf_size);
++
++ rxd->rxd3 = 0;
++ rxd->rxd4 = 0;
+ }
+ ring->dma_size = rx_dma_size;
+ ring->calc_idx_update = false;
+@@ -1820,14 +1827,17 @@ static void mtk_rx_clean(struct mtk_eth
+
+ if (ring->data && ring->dma) {
+ for (i = 0; i < ring->dma_size; i++) {
++ struct mtk_rx_dma *rxd;
++
+ if (!ring->data[i])
+ continue;
+- if (!ring->dma[i].rxd1)
++
++ rxd = (void *)ring->dma + i * eth->soc->txrx.rxd_size;
++ if (!rxd->rxd1)
+ continue;
+- dma_unmap_single(eth->dma_dev,
+- ring->dma[i].rxd1,
+- ring->buf_size,
+- DMA_FROM_DEVICE);
++
++ dma_unmap_single(eth->dma_dev, rxd->rxd1,
++ ring->buf_size, DMA_FROM_DEVICE);
+ skb_free_frag(ring->data[i]);
+ }
+ kfree(ring->data);
diff --git a/target/linux/generic/backport-5.15/702-v5.19-26-net-ethernet-mtk_eth_soc-introduce-device-register-m.patch b/target/linux/generic/backport-5.15/702-v5.19-26-net-ethernet-mtk_eth_soc-introduce-device-register-m.patch
new file mode 100644
index 00000000000000..99f482c418fce6
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-26-net-ethernet-mtk_eth_soc-introduce-device-register-m.patch
@@ -0,0 +1,814 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:35 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: introduce device register map
+
+Introduce reg_map structure to add the capability to support different
+register definitions. Move register definitions in mtk_regmap structure.
+This is a preliminary patch to introduce mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -34,6 +34,59 @@ MODULE_PARM_DESC(msg_level, "Message lev
+ #define MTK_ETHTOOL_STAT(x) { #x, \
+ offsetof(struct mtk_hw_stats, x) / sizeof(u64) }
+
++static const struct mtk_reg_map mtk_reg_map = {
++ .tx_irq_mask = 0x1a1c,
++ .tx_irq_status = 0x1a18,
++ .pdma = {
++ .rx_ptr = 0x0900,
++ .rx_cnt_cfg = 0x0904,
++ .pcrx_ptr = 0x0908,
++ .glo_cfg = 0x0a04,
++ .rst_idx = 0x0a08,
++ .delay_irq = 0x0a0c,
++ .irq_status = 0x0a20,
++ .irq_mask = 0x0a28,
++ .int_grp = 0x0a50,
++ },
++ .qdma = {
++ .qtx_cfg = 0x1800,
++ .rx_ptr = 0x1900,
++ .rx_cnt_cfg = 0x1904,
++ .qcrx_ptr = 0x1908,
++ .glo_cfg = 0x1a04,
++ .rst_idx = 0x1a08,
++ .delay_irq = 0x1a0c,
++ .fc_th = 0x1a10,
++ .int_grp = 0x1a20,
++ .hred = 0x1a44,
++ .ctx_ptr = 0x1b00,
++ .dtx_ptr = 0x1b04,
++ .crx_ptr = 0x1b10,
++ .drx_ptr = 0x1b14,
++ .fq_head = 0x1b20,
++ .fq_tail = 0x1b24,
++ .fq_count = 0x1b28,
++ .fq_blen = 0x1b2c,
++ },
++ .gdm1_cnt = 0x2400,
++};
++
++static const struct mtk_reg_map mt7628_reg_map = {
++ .tx_irq_mask = 0x0a28,
++ .tx_irq_status = 0x0a20,
++ .pdma = {
++ .rx_ptr = 0x0900,
++ .rx_cnt_cfg = 0x0904,
++ .pcrx_ptr = 0x0908,
++ .glo_cfg = 0x0a04,
++ .rst_idx = 0x0a08,
++ .delay_irq = 0x0a0c,
++ .irq_status = 0x0a20,
++ .irq_mask = 0x0a28,
++ .int_grp = 0x0a50,
++ },
++};
++
+ /* strings used by ethtool */
+ static const struct mtk_ethtool_stats {
+ char str[ETH_GSTRING_LEN];
+@@ -618,8 +671,8 @@ static inline void mtk_tx_irq_disable(st
+ u32 val;
+
+ spin_lock_irqsave(ð->tx_irq_lock, flags);
+- val = mtk_r32(eth, eth->tx_int_mask_reg);
+- mtk_w32(eth, val & ~mask, eth->tx_int_mask_reg);
++ val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask);
++ mtk_w32(eth, val & ~mask, eth->soc->reg_map->tx_irq_mask);
+ spin_unlock_irqrestore(ð->tx_irq_lock, flags);
+ }
+
+@@ -629,8 +682,8 @@ static inline void mtk_tx_irq_enable(str
+ u32 val;
+
+ spin_lock_irqsave(ð->tx_irq_lock, flags);
+- val = mtk_r32(eth, eth->tx_int_mask_reg);
+- mtk_w32(eth, val | mask, eth->tx_int_mask_reg);
++ val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask);
++ mtk_w32(eth, val | mask, eth->soc->reg_map->tx_irq_mask);
+ spin_unlock_irqrestore(ð->tx_irq_lock, flags);
+ }
+
+@@ -640,8 +693,8 @@ static inline void mtk_rx_irq_disable(st
+ u32 val;
+
+ spin_lock_irqsave(ð->rx_irq_lock, flags);
+- val = mtk_r32(eth, MTK_PDMA_INT_MASK);
+- mtk_w32(eth, val & ~mask, MTK_PDMA_INT_MASK);
++ val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask);
++ mtk_w32(eth, val & ~mask, eth->soc->reg_map->pdma.irq_mask);
+ spin_unlock_irqrestore(ð->rx_irq_lock, flags);
+ }
+
+@@ -651,8 +704,8 @@ static inline void mtk_rx_irq_enable(str
+ u32 val;
+
+ spin_lock_irqsave(ð->rx_irq_lock, flags);
+- val = mtk_r32(eth, MTK_PDMA_INT_MASK);
+- mtk_w32(eth, val | mask, MTK_PDMA_INT_MASK);
++ val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask);
++ mtk_w32(eth, val | mask, eth->soc->reg_map->pdma.irq_mask);
+ spin_unlock_irqrestore(ð->rx_irq_lock, flags);
+ }
+
+@@ -703,39 +756,39 @@ void mtk_stats_update_mac(struct mtk_mac
+ hw_stats->rx_checksum_errors +=
+ mtk_r32(mac->hw, MT7628_SDM_CS_ERR);
+ } else {
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ unsigned int offs = hw_stats->reg_offset;
+ u64 stats;
+
+- hw_stats->rx_bytes += mtk_r32(mac->hw,
+- MTK_GDM1_RX_GBCNT_L + offs);
+- stats = mtk_r32(mac->hw, MTK_GDM1_RX_GBCNT_H + offs);
++ hw_stats->rx_bytes += mtk_r32(mac->hw, reg_map->gdm1_cnt + offs);
++ stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x4 + offs);
+ if (stats)
+ hw_stats->rx_bytes += (stats << 32);
+ hw_stats->rx_packets +=
+- mtk_r32(mac->hw, MTK_GDM1_RX_GPCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x8 + offs);
+ hw_stats->rx_overflow +=
+- mtk_r32(mac->hw, MTK_GDM1_RX_OERCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x10 + offs);
+ hw_stats->rx_fcs_errors +=
+- mtk_r32(mac->hw, MTK_GDM1_RX_FERCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x14 + offs);
+ hw_stats->rx_short_errors +=
+- mtk_r32(mac->hw, MTK_GDM1_RX_SERCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x18 + offs);
+ hw_stats->rx_long_errors +=
+- mtk_r32(mac->hw, MTK_GDM1_RX_LENCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x1c + offs);
+ hw_stats->rx_checksum_errors +=
+- mtk_r32(mac->hw, MTK_GDM1_RX_CERCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs);
+ hw_stats->rx_flow_control_packets +=
+- mtk_r32(mac->hw, MTK_GDM1_RX_FCCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs);
+ hw_stats->tx_skip +=
+- mtk_r32(mac->hw, MTK_GDM1_TX_SKIPCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x28 + offs);
+ hw_stats->tx_collisions +=
+- mtk_r32(mac->hw, MTK_GDM1_TX_COLCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x2c + offs);
+ hw_stats->tx_bytes +=
+- mtk_r32(mac->hw, MTK_GDM1_TX_GBCNT_L + offs);
+- stats = mtk_r32(mac->hw, MTK_GDM1_TX_GBCNT_H + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x30 + offs);
++ stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x34 + offs);
+ if (stats)
+ hw_stats->tx_bytes += (stats << 32);
+ hw_stats->tx_packets +=
+- mtk_r32(mac->hw, MTK_GDM1_TX_GPCNT + offs);
++ mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs);
+ }
+
+ u64_stats_update_end(&hw_stats->syncp);
+@@ -875,10 +928,10 @@ static int mtk_init_fq_dma(struct mtk_et
+ txd->txd4 = 0;
+ }
+
+- mtk_w32(eth, eth->phy_scratch_ring, MTK_QDMA_FQ_HEAD);
+- mtk_w32(eth, phy_ring_tail, MTK_QDMA_FQ_TAIL);
+- mtk_w32(eth, (cnt << 16) | cnt, MTK_QDMA_FQ_CNT);
+- mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, MTK_QDMA_FQ_BLEN);
++ mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head);
++ mtk_w32(eth, phy_ring_tail, soc->reg_map->qdma.fq_tail);
++ mtk_w32(eth, (cnt << 16) | cnt, soc->reg_map->qdma.fq_count);
++ mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, soc->reg_map->qdma.fq_blen);
+
+ return 0;
+ }
+@@ -1122,7 +1175,7 @@ static int mtk_tx_map(struct sk_buff *sk
+ if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
+ if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) ||
+ !netdev_xmit_more())
+- mtk_w32(eth, txd->txd2, MTK_QTX_CTX_PTR);
++ mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr);
+ } else {
+ int next_idx;
+
+@@ -1439,6 +1492,7 @@ rx_done:
+ static int mtk_poll_tx_qdma(struct mtk_eth *eth, int budget,
+ unsigned int *done, unsigned int *bytes)
+ {
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ struct mtk_tx_ring *ring = ð->tx_ring;
+ struct mtk_tx_dma *desc;
+ struct sk_buff *skb;
+@@ -1446,7 +1500,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
+ u32 cpu, dma;
+
+ cpu = ring->last_free_ptr;
+- dma = mtk_r32(eth, MTK_QTX_DRX_PTR);
++ dma = mtk_r32(eth, reg_map->qdma.drx_ptr);
+
+ desc = mtk_qdma_phys_to_virt(ring, cpu);
+
+@@ -1481,7 +1535,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
+ }
+
+ ring->last_free_ptr = cpu;
+- mtk_w32(eth, cpu, MTK_QTX_CRX_PTR);
++ mtk_w32(eth, cpu, reg_map->qdma.crx_ptr);
+
+ return budget;
+ }
+@@ -1574,24 +1628,25 @@ static void mtk_handle_status_irq(struct
+ static int mtk_napi_tx(struct napi_struct *napi, int budget)
+ {
+ struct mtk_eth *eth = container_of(napi, struct mtk_eth, tx_napi);
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ int tx_done = 0;
+
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
+ mtk_handle_status_irq(eth);
+- mtk_w32(eth, MTK_TX_DONE_INT, eth->tx_int_status_reg);
++ mtk_w32(eth, MTK_TX_DONE_INT, reg_map->tx_irq_status);
+ tx_done = mtk_poll_tx(eth, budget);
+
+ if (unlikely(netif_msg_intr(eth))) {
+ dev_info(eth->dev,
+ "done tx %d, intr 0x%08x/0x%x\n", tx_done,
+- mtk_r32(eth, eth->tx_int_status_reg),
+- mtk_r32(eth, eth->tx_int_mask_reg));
++ mtk_r32(eth, reg_map->tx_irq_status),
++ mtk_r32(eth, reg_map->tx_irq_mask));
+ }
+
+ if (tx_done == budget)
+ return budget;
+
+- if (mtk_r32(eth, eth->tx_int_status_reg) & MTK_TX_DONE_INT)
++ if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT)
+ return budget;
+
+ if (napi_complete_done(napi, tx_done))
+@@ -1603,6 +1658,7 @@ static int mtk_napi_tx(struct napi_struc
+ static int mtk_napi_rx(struct napi_struct *napi, int budget)
+ {
+ struct mtk_eth *eth = container_of(napi, struct mtk_eth, rx_napi);
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ int rx_done_total = 0;
+
+ mtk_handle_status_irq(eth);
+@@ -1610,21 +1666,21 @@ static int mtk_napi_rx(struct napi_struc
+ do {
+ int rx_done;
+
+- mtk_w32(eth, MTK_RX_DONE_INT, MTK_PDMA_INT_STATUS);
++ mtk_w32(eth, MTK_RX_DONE_INT, reg_map->pdma.irq_status);
+ rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth);
+ rx_done_total += rx_done;
+
+ if (unlikely(netif_msg_intr(eth))) {
+ dev_info(eth->dev,
+ "done rx %d, intr 0x%08x/0x%x\n", rx_done,
+- mtk_r32(eth, MTK_PDMA_INT_STATUS),
+- mtk_r32(eth, MTK_PDMA_INT_MASK));
++ mtk_r32(eth, reg_map->pdma.irq_status),
++ mtk_r32(eth, reg_map->pdma.irq_mask));
+ }
+
+ if (rx_done_total == budget)
+ return budget;
+
+- } while (mtk_r32(eth, MTK_PDMA_INT_STATUS) & MTK_RX_DONE_INT);
++ } while (mtk_r32(eth, reg_map->pdma.irq_status) & MTK_RX_DONE_INT);
+
+ if (napi_complete_done(napi, rx_done_total))
+ mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
+@@ -1687,20 +1743,20 @@ static int mtk_tx_alloc(struct mtk_eth *
+ */
+ wmb();
+
+- if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
+- mtk_w32(eth, ring->phys, MTK_QTX_CTX_PTR);
+- mtk_w32(eth, ring->phys, MTK_QTX_DTX_PTR);
++ if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
++ mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr);
++ mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr);
+ mtk_w32(eth,
+ ring->phys + ((MTK_DMA_SIZE - 1) * sz),
+- MTK_QTX_CRX_PTR);
+- mtk_w32(eth, ring->last_free_ptr, MTK_QTX_DRX_PTR);
++ soc->reg_map->qdma.crx_ptr);
++ mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr);
+ mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES,
+- MTK_QTX_CFG(0));
++ soc->reg_map->qdma.qtx_cfg);
+ } else {
+ mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0);
+ mtk_w32(eth, MTK_DMA_SIZE, MT7628_TX_MAX_CNT0);
+ mtk_w32(eth, 0, MT7628_TX_CTX_IDX0);
+- mtk_w32(eth, MT7628_PST_DTX_IDX0, MTK_PDMA_RST_IDX);
++ mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx);
+ }
+
+ return 0;
+@@ -1739,6 +1795,7 @@ static void mtk_tx_clean(struct mtk_eth
+
+ static int mtk_rx_alloc(struct mtk_eth *eth, int ring_no, int rx_flag)
+ {
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ struct mtk_rx_ring *ring;
+ int rx_data_len, rx_dma_size;
+ int i;
+@@ -1807,16 +1864,18 @@ static int mtk_rx_alloc(struct mtk_eth *
+ ring->dma_size = rx_dma_size;
+ ring->calc_idx_update = false;
+ ring->calc_idx = rx_dma_size - 1;
+- ring->crx_idx_reg = MTK_PRX_CRX_IDX_CFG(ring_no);
++ ring->crx_idx_reg = reg_map->pdma.pcrx_ptr + ring_no * MTK_QRX_OFFSET;
+ /* make sure that all changes to the dma ring are flushed before we
+ * continue
+ */
+ wmb();
+
+- mtk_w32(eth, ring->phys, MTK_PRX_BASE_PTR_CFG(ring_no) + offset);
+- mtk_w32(eth, rx_dma_size, MTK_PRX_MAX_CNT_CFG(ring_no) + offset);
++ mtk_w32(eth, ring->phys,
++ reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET + offset);
++ mtk_w32(eth, rx_dma_size,
++ reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET + offset);
+ mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg + offset);
+- mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), MTK_PDMA_RST_IDX + offset);
++ mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), reg_map->pdma.rst_idx + offset);
+
+ return 0;
+ }
+@@ -2125,9 +2184,9 @@ static int mtk_dma_busy_wait(struct mtk_
+ u32 val;
+
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
+- reg = MTK_QDMA_GLO_CFG;
++ reg = eth->soc->reg_map->qdma.glo_cfg;
+ else
+- reg = MTK_PDMA_GLO_CFG;
++ reg = eth->soc->reg_map->pdma.glo_cfg;
+
+ ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val,
+ !(val & (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)),
+@@ -2185,8 +2244,8 @@ static int mtk_dma_init(struct mtk_eth *
+ * automatically
+ */
+ mtk_w32(eth, FC_THRES_DROP_MODE | FC_THRES_DROP_EN |
+- FC_THRES_MIN, MTK_QDMA_FC_THRES);
+- mtk_w32(eth, 0x0, MTK_QDMA_HRED2);
++ FC_THRES_MIN, eth->soc->reg_map->qdma.fc_th);
++ mtk_w32(eth, 0x0, eth->soc->reg_map->qdma.hred);
+ }
+
+ return 0;
+@@ -2260,13 +2319,14 @@ static irqreturn_t mtk_handle_irq_tx(int
+ static irqreturn_t mtk_handle_irq(int irq, void *_eth)
+ {
+ struct mtk_eth *eth = _eth;
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+
+- if (mtk_r32(eth, MTK_PDMA_INT_MASK) & MTK_RX_DONE_INT) {
+- if (mtk_r32(eth, MTK_PDMA_INT_STATUS) & MTK_RX_DONE_INT)
++ if (mtk_r32(eth, reg_map->pdma.irq_mask) & MTK_RX_DONE_INT) {
++ if (mtk_r32(eth, reg_map->pdma.irq_status) & MTK_RX_DONE_INT)
+ mtk_handle_irq_rx(irq, _eth);
+ }
+- if (mtk_r32(eth, eth->tx_int_mask_reg) & MTK_TX_DONE_INT) {
+- if (mtk_r32(eth, eth->tx_int_status_reg) & MTK_TX_DONE_INT)
++ if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) {
++ if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT)
+ mtk_handle_irq_tx(irq, _eth);
+ }
+
+@@ -2290,6 +2350,7 @@ static void mtk_poll_controller(struct n
+ static int mtk_start_dma(struct mtk_eth *eth)
+ {
+ u32 rx_2b_offset = (NET_IP_ALIGN == 2) ? MTK_RX_2B_OFFSET : 0;
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ int err;
+
+ err = mtk_dma_init(eth);
+@@ -2304,16 +2365,15 @@ static int mtk_start_dma(struct mtk_eth
+ MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
+ MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
+ MTK_RX_BT_32DWORDS,
+- MTK_QDMA_GLO_CFG);
+-
++ reg_map->qdma.glo_cfg);
+ mtk_w32(eth,
+ MTK_RX_DMA_EN | rx_2b_offset |
+ MTK_RX_BT_32DWORDS | MTK_MULTI_EN,
+- MTK_PDMA_GLO_CFG);
++ reg_map->pdma.glo_cfg);
+ } else {
+ mtk_w32(eth, MTK_TX_WB_DDONE | MTK_TX_DMA_EN | MTK_RX_DMA_EN |
+ MTK_MULTI_EN | MTK_PDMA_SIZE_8DWORDS,
+- MTK_PDMA_GLO_CFG);
++ reg_map->pdma.glo_cfg);
+ }
+
+ return 0;
+@@ -2437,8 +2497,8 @@ static int mtk_stop(struct net_device *d
+ cancel_work_sync(ð->tx_dim.work);
+
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
+- mtk_stop_dma(eth, MTK_QDMA_GLO_CFG);
+- mtk_stop_dma(eth, MTK_PDMA_GLO_CFG);
++ mtk_stop_dma(eth, eth->soc->reg_map->qdma.glo_cfg);
++ mtk_stop_dma(eth, eth->soc->reg_map->pdma.glo_cfg);
+
+ mtk_dma_free(eth);
+
+@@ -2492,6 +2552,7 @@ static void mtk_dim_rx(struct work_struc
+ {
+ struct dim *dim = container_of(work, struct dim, work);
+ struct mtk_eth *eth = container_of(dim, struct mtk_eth, rx_dim);
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ struct dim_cq_moder cur_profile;
+ u32 val, cur;
+
+@@ -2499,7 +2560,7 @@ static void mtk_dim_rx(struct work_struc
+ dim->profile_ix);
+ spin_lock_bh(ð->dim_lock);
+
+- val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
++ val = mtk_r32(eth, reg_map->pdma.delay_irq);
+ val &= MTK_PDMA_DELAY_TX_MASK;
+ val |= MTK_PDMA_DELAY_RX_EN;
+
+@@ -2509,9 +2570,9 @@ static void mtk_dim_rx(struct work_struc
+ cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
+ val |= cur << MTK_PDMA_DELAY_RX_PINT_SHIFT;
+
+- mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
++ mtk_w32(eth, val, reg_map->pdma.delay_irq);
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
+- mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
++ mtk_w32(eth, val, reg_map->qdma.delay_irq);
+
+ spin_unlock_bh(ð->dim_lock);
+
+@@ -2522,6 +2583,7 @@ static void mtk_dim_tx(struct work_struc
+ {
+ struct dim *dim = container_of(work, struct dim, work);
+ struct mtk_eth *eth = container_of(dim, struct mtk_eth, tx_dim);
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ struct dim_cq_moder cur_profile;
+ u32 val, cur;
+
+@@ -2529,7 +2591,7 @@ static void mtk_dim_tx(struct work_struc
+ dim->profile_ix);
+ spin_lock_bh(ð->dim_lock);
+
+- val = mtk_r32(eth, MTK_PDMA_DELAY_INT);
++ val = mtk_r32(eth, reg_map->pdma.delay_irq);
+ val &= MTK_PDMA_DELAY_RX_MASK;
+ val |= MTK_PDMA_DELAY_TX_EN;
+
+@@ -2539,9 +2601,9 @@ static void mtk_dim_tx(struct work_struc
+ cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
+ val |= cur << MTK_PDMA_DELAY_TX_PINT_SHIFT;
+
+- mtk_w32(eth, val, MTK_PDMA_DELAY_INT);
++ mtk_w32(eth, val, reg_map->pdma.delay_irq);
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
+- mtk_w32(eth, val, MTK_QDMA_DELAY_INT);
++ mtk_w32(eth, val, reg_map->qdma.delay_irq);
+
+ spin_unlock_bh(ð->dim_lock);
+
+@@ -2552,6 +2614,7 @@ static int mtk_hw_init(struct mtk_eth *e
+ {
+ u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
+ ETHSYS_DMA_AG_MAP_PPE;
++ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ int i, val, ret;
+
+ if (test_and_set_bit(MTK_HW_INIT, ð->state))
+@@ -2626,10 +2689,10 @@ static int mtk_hw_init(struct mtk_eth *e
+ mtk_rx_irq_disable(eth, ~0);
+
+ /* FE int grouping */
+- mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
+- mtk_w32(eth, MTK_RX_DONE_INT, MTK_PDMA_INT_GRP2);
+- mtk_w32(eth, MTK_TX_DONE_INT, MTK_QDMA_INT_GRP1);
+- mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
++ mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp);
++ mtk_w32(eth, MTK_RX_DONE_INT, reg_map->pdma.int_grp + 4);
++ mtk_w32(eth, MTK_TX_DONE_INT, reg_map->qdma.int_grp);
++ mtk_w32(eth, MTK_RX_DONE_INT, reg_map->qdma.int_grp + 4);
+ mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
+
+ return 0;
+@@ -3168,14 +3231,6 @@ static int mtk_probe(struct platform_dev
+ if (IS_ERR(eth->base))
+ return PTR_ERR(eth->base);
+
+- if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
+- eth->tx_int_mask_reg = MTK_QDMA_INT_MASK;
+- eth->tx_int_status_reg = MTK_QDMA_INT_STATUS;
+- } else {
+- eth->tx_int_mask_reg = MTK_PDMA_INT_MASK;
+- eth->tx_int_status_reg = MTK_PDMA_INT_STATUS;
+- }
+-
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
+ eth->rx_dma_l4_valid = RX_DMA_L4_VALID_PDMA;
+ eth->ip_align = NET_IP_ALIGN;
+@@ -3409,6 +3464,7 @@ static int mtk_remove(struct platform_de
+ }
+
+ static const struct mtk_soc_data mt2701_data = {
++ .reg_map = &mtk_reg_map,
+ .caps = MT7623_CAPS | MTK_HWLRO,
+ .hw_features = MTK_HW_FEATURES,
+ .required_clks = MT7623_CLKS_BITMAP,
+@@ -3420,6 +3476,7 @@ static const struct mtk_soc_data mt2701_
+ };
+
+ static const struct mtk_soc_data mt7621_data = {
++ .reg_map = &mtk_reg_map,
+ .caps = MT7621_CAPS,
+ .hw_features = MTK_HW_FEATURES,
+ .required_clks = MT7621_CLKS_BITMAP,
+@@ -3432,6 +3489,7 @@ static const struct mtk_soc_data mt7621_
+ };
+
+ static const struct mtk_soc_data mt7622_data = {
++ .reg_map = &mtk_reg_map,
+ .ana_rgc3 = 0x2028,
+ .caps = MT7622_CAPS | MTK_HWLRO,
+ .hw_features = MTK_HW_FEATURES,
+@@ -3445,6 +3503,7 @@ static const struct mtk_soc_data mt7622_
+ };
+
+ static const struct mtk_soc_data mt7623_data = {
++ .reg_map = &mtk_reg_map,
+ .caps = MT7623_CAPS | MTK_HWLRO,
+ .hw_features = MTK_HW_FEATURES,
+ .required_clks = MT7623_CLKS_BITMAP,
+@@ -3457,6 +3516,7 @@ static const struct mtk_soc_data mt7623_
+ };
+
+ static const struct mtk_soc_data mt7629_data = {
++ .reg_map = &mtk_reg_map,
+ .ana_rgc3 = 0x128,
+ .caps = MT7629_CAPS | MTK_HWLRO,
+ .hw_features = MTK_HW_FEATURES,
+@@ -3469,6 +3529,7 @@ static const struct mtk_soc_data mt7629_
+ };
+
+ static const struct mtk_soc_data rt5350_data = {
++ .reg_map = &mt7628_reg_map,
+ .caps = MT7628_CAPS,
+ .hw_features = MTK_HW_FEATURES_MT7628,
+ .required_clks = MT7628_CLKS_BITMAP,
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -48,6 +48,8 @@
+ #define MTK_HW_FEATURES_MT7628 (NETIF_F_SG | NETIF_F_RXCSUM)
+ #define NEXT_DESP_IDX(X, Y) (((X) + 1) & ((Y) - 1))
+
++#define MTK_QRX_OFFSET 0x10
++
+ #define MTK_MAX_RX_RING_NUM 4
+ #define MTK_HW_LRO_DMA_SIZE 8
+
+@@ -100,18 +102,6 @@
+ /* Unicast Filter MAC Address Register - High */
+ #define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000))
+
+-/* PDMA RX Base Pointer Register */
+-#define MTK_PRX_BASE_PTR0 0x900
+-#define MTK_PRX_BASE_PTR_CFG(x) (MTK_PRX_BASE_PTR0 + (x * 0x10))
+-
+-/* PDMA RX Maximum Count Register */
+-#define MTK_PRX_MAX_CNT0 0x904
+-#define MTK_PRX_MAX_CNT_CFG(x) (MTK_PRX_MAX_CNT0 + (x * 0x10))
+-
+-/* PDMA RX CPU Pointer Register */
+-#define MTK_PRX_CRX_IDX0 0x908
+-#define MTK_PRX_CRX_IDX_CFG(x) (MTK_PRX_CRX_IDX0 + (x * 0x10))
+-
+ /* PDMA HW LRO Control Registers */
+ #define MTK_PDMA_LRO_CTRL_DW0 0x980
+ #define MTK_LRO_EN BIT(0)
+@@ -126,18 +116,19 @@
+ #define MTK_ADMA_MODE BIT(15)
+ #define MTK_LRO_MIN_RXD_SDL (MTK_HW_LRO_SDL_REMAIN_ROOM << 16)
+
+-/* PDMA Global Configuration Register */
+-#define MTK_PDMA_GLO_CFG 0xa04
++#define MTK_RX_DMA_LRO_EN BIT(8)
+ #define MTK_MULTI_EN BIT(10)
+ #define MTK_PDMA_SIZE_8DWORDS (1 << 4)
+
++/* PDMA Global Configuration Register */
++#define MTK_PDMA_LRO_SDL 0x3000
++#define MTK_RX_CFG_SDL_OFFSET 16
++
+ /* PDMA Reset Index Register */
+-#define MTK_PDMA_RST_IDX 0xa08
+ #define MTK_PST_DRX_IDX0 BIT(16)
+ #define MTK_PST_DRX_IDX_CFG(x) (MTK_PST_DRX_IDX0 << (x))
+
+ /* PDMA Delay Interrupt Register */
+-#define MTK_PDMA_DELAY_INT 0xa0c
+ #define MTK_PDMA_DELAY_RX_MASK GENMASK(15, 0)
+ #define MTK_PDMA_DELAY_RX_EN BIT(15)
+ #define MTK_PDMA_DELAY_RX_PINT_SHIFT 8
+@@ -151,19 +142,9 @@
+ #define MTK_PDMA_DELAY_PINT_MASK 0x7f
+ #define MTK_PDMA_DELAY_PTIME_MASK 0xff
+
+-/* PDMA Interrupt Status Register */
+-#define MTK_PDMA_INT_STATUS 0xa20
+-
+-/* PDMA Interrupt Mask Register */
+-#define MTK_PDMA_INT_MASK 0xa28
+-
+ /* PDMA HW LRO Alter Flow Delta Register */
+ #define MTK_PDMA_LRO_ALT_SCORE_DELTA 0xa4c
+
+-/* PDMA Interrupt grouping registers */
+-#define MTK_PDMA_INT_GRP1 0xa50
+-#define MTK_PDMA_INT_GRP2 0xa54
+-
+ /* PDMA HW LRO IP Setting Registers */
+ #define MTK_LRO_RX_RING0_DIP_DW0 0xb04
+ #define MTK_LRO_DIP_DW0_CFG(x) (MTK_LRO_RX_RING0_DIP_DW0 + (x * 0x40))
+@@ -185,26 +166,9 @@
+ #define MTK_RING_MAX_AGG_CNT_H ((MTK_HW_LRO_MAX_AGG_CNT >> 6) & 0x3)
+
+ /* QDMA TX Queue Configuration Registers */
+-#define MTK_QTX_CFG(x) (0x1800 + (x * 0x10))
+ #define QDMA_RES_THRES 4
+
+-/* QDMA TX Queue Scheduler Registers */
+-#define MTK_QTX_SCH(x) (0x1804 + (x * 0x10))
+-
+-/* QDMA RX Base Pointer Register */
+-#define MTK_QRX_BASE_PTR0 0x1900
+-
+-/* QDMA RX Maximum Count Register */
+-#define MTK_QRX_MAX_CNT0 0x1904
+-
+-/* QDMA RX CPU Pointer Register */
+-#define MTK_QRX_CRX_IDX0 0x1908
+-
+-/* QDMA RX DMA Pointer Register */
+-#define MTK_QRX_DRX_IDX0 0x190C
+-
+ /* QDMA Global Configuration Register */
+-#define MTK_QDMA_GLO_CFG 0x1A04
+ #define MTK_RX_2B_OFFSET BIT(31)
+ #define MTK_RX_BT_32DWORDS (3 << 11)
+ #define MTK_NDP_CO_PRO BIT(10)
+@@ -216,20 +180,12 @@
+ #define MTK_TX_DMA_EN BIT(0)
+ #define MTK_DMA_BUSY_TIMEOUT_US 1000000
+
+-/* QDMA Reset Index Register */
+-#define MTK_QDMA_RST_IDX 0x1A08
+-
+-/* QDMA Delay Interrupt Register */
+-#define MTK_QDMA_DELAY_INT 0x1A0C
+-
+ /* QDMA Flow Control Register */
+-#define MTK_QDMA_FC_THRES 0x1A10
+ #define FC_THRES_DROP_MODE BIT(20)
+ #define FC_THRES_DROP_EN (7 << 16)
+ #define FC_THRES_MIN 0x4444
+
+ /* QDMA Interrupt Status Register */
+-#define MTK_QDMA_INT_STATUS 0x1A18
+ #define MTK_RX_DONE_DLY BIT(30)
+ #define MTK_TX_DONE_DLY BIT(28)
+ #define MTK_RX_DONE_INT3 BIT(19)
+@@ -244,55 +200,8 @@
+ #define MTK_TX_DONE_INT MTK_TX_DONE_DLY
+
+ /* QDMA Interrupt grouping registers */
+-#define MTK_QDMA_INT_GRP1 0x1a20
+-#define MTK_QDMA_INT_GRP2 0x1a24
+ #define MTK_RLS_DONE_INT BIT(0)
+
+-/* QDMA Interrupt Status Register */
+-#define MTK_QDMA_INT_MASK 0x1A1C
+-
+-/* QDMA Interrupt Mask Register */
+-#define MTK_QDMA_HRED2 0x1A44
+-
+-/* QDMA TX Forward CPU Pointer Register */
+-#define MTK_QTX_CTX_PTR 0x1B00
+-
+-/* QDMA TX Forward DMA Pointer Register */
+-#define MTK_QTX_DTX_PTR 0x1B04
+-
+-/* QDMA TX Release CPU Pointer Register */
+-#define MTK_QTX_CRX_PTR 0x1B10
+-
+-/* QDMA TX Release DMA Pointer Register */
+-#define MTK_QTX_DRX_PTR 0x1B14
+-
+-/* QDMA FQ Head Pointer Register */
+-#define MTK_QDMA_FQ_HEAD 0x1B20
+-
+-/* QDMA FQ Head Pointer Register */
+-#define MTK_QDMA_FQ_TAIL 0x1B24
+-
+-/* QDMA FQ Free Page Counter Register */
+-#define MTK_QDMA_FQ_CNT 0x1B28
+-
+-/* QDMA FQ Free Page Buffer Length Register */
+-#define MTK_QDMA_FQ_BLEN 0x1B2C
+-
+-/* GMA1 counter / statics register */
+-#define MTK_GDM1_RX_GBCNT_L 0x2400
+-#define MTK_GDM1_RX_GBCNT_H 0x2404
+-#define MTK_GDM1_RX_GPCNT 0x2408
+-#define MTK_GDM1_RX_OERCNT 0x2410
+-#define MTK_GDM1_RX_FERCNT 0x2414
+-#define MTK_GDM1_RX_SERCNT 0x2418
+-#define MTK_GDM1_RX_LENCNT 0x241c
+-#define MTK_GDM1_RX_CERCNT 0x2420
+-#define MTK_GDM1_RX_FCCNT 0x2424
+-#define MTK_GDM1_TX_SKIPCNT 0x2428
+-#define MTK_GDM1_TX_COLCNT 0x242c
+-#define MTK_GDM1_TX_GBCNT_L 0x2430
+-#define MTK_GDM1_TX_GBCNT_H 0x2434
+-#define MTK_GDM1_TX_GPCNT 0x2438
+ #define MTK_STAT_OFFSET 0x40
+
+ #define MTK_WDMA0_BASE 0x2800
+@@ -853,8 +762,46 @@ struct mtk_tx_dma_desc_info {
+ u8 last:1;
+ };
+
++struct mtk_reg_map {
++ u32 tx_irq_mask;
++ u32 tx_irq_status;
++ struct {
++ u32 rx_ptr; /* rx base pointer */
++ u32 rx_cnt_cfg; /* rx max count configuration */
++ u32 pcrx_ptr; /* rx cpu pointer */
++ u32 glo_cfg; /* global configuration */
++ u32 rst_idx; /* reset index */
++ u32 delay_irq; /* delay interrupt */
++ u32 irq_status; /* interrupt status */
++ u32 irq_mask; /* interrupt mask */
++ u32 int_grp;
++ } pdma;
++ struct {
++ u32 qtx_cfg; /* tx queue configuration */
++ u32 rx_ptr; /* rx base pointer */
++ u32 rx_cnt_cfg; /* rx max count configuration */
++ u32 qcrx_ptr; /* rx cpu pointer */
++ u32 glo_cfg; /* global configuration */
++ u32 rst_idx; /* reset index */
++ u32 delay_irq; /* delay interrupt */
++ u32 fc_th; /* flow control */
++ u32 int_grp;
++ u32 hred; /* interrupt mask */
++ u32 ctx_ptr; /* tx acquire cpu pointer */
++ u32 dtx_ptr; /* tx acquire dma pointer */
++ u32 crx_ptr; /* tx release cpu pointer */
++ u32 drx_ptr; /* tx release dma pointer */
++ u32 fq_head; /* fq head pointer */
++ u32 fq_tail; /* fq tail pointer */
++ u32 fq_count; /* fq free page count */
++ u32 fq_blen; /* fq free page buffer length */
++ } qdma;
++ u32 gdm1_cnt;
++};
++
+ /* struct mtk_eth_data - This is the structure holding all differences
+ * among various plaforms
++ * @reg_map Soc register map.
+ * @ana_rgc3: The offset for register ANA_RGC3 related to
+ * sgmiisys syscon
+ * @caps Flags shown the extra capability for the SoC
+@@ -867,6 +814,7 @@ struct mtk_tx_dma_desc_info {
+ * @rxd_size Rx DMA descriptor size.
+ */
+ struct mtk_soc_data {
++ const struct mtk_reg_map *reg_map;
+ u32 ana_rgc3;
+ u32 caps;
+ u32 required_clks;
+@@ -994,8 +942,6 @@ struct mtk_eth {
+ u32 tx_bytes;
+ struct dim tx_dim;
+
+- u32 tx_int_mask_reg;
+- u32 tx_int_status_reg;
+ u32 rx_dma_l4_valid;
+ int ip_align;
+
diff --git a/target/linux/generic/backport-5.15/702-v5.19-27-net-ethernet-mtk_eth_soc-introduce-MTK_NETSYS_V2-sup.patch b/target/linux/generic/backport-5.15/702-v5.19-27-net-ethernet-mtk_eth_soc-introduce-MTK_NETSYS_V2-sup.patch
new file mode 100644
index 00000000000000..e15854ecad14bf
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-27-net-ethernet-mtk_eth_soc-introduce-MTK_NETSYS_V2-sup.patch
@@ -0,0 +1,917 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:36 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: introduce MTK_NETSYS_V2 support
+
+Introduce MTK_NETSYS_V2 support. MTK_NETSYS_V2 defines 32B TX/RX DMA
+descriptors.
+This is a preliminary patch to add mt7986 ethernet support.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -862,8 +862,8 @@ static inline int mtk_max_buf_size(int f
+ return buf_size;
+ }
+
+-static inline bool mtk_rx_get_desc(struct mtk_rx_dma *rxd,
+- struct mtk_rx_dma *dma_rxd)
++static bool mtk_rx_get_desc(struct mtk_eth *eth, struct mtk_rx_dma_v2 *rxd,
++ struct mtk_rx_dma_v2 *dma_rxd)
+ {
+ rxd->rxd2 = READ_ONCE(dma_rxd->rxd2);
+ if (!(rxd->rxd2 & RX_DMA_DONE))
+@@ -872,6 +872,10 @@ static inline bool mtk_rx_get_desc(struc
+ rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
+ rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
+ rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
++ rxd->rxd5 = READ_ONCE(dma_rxd->rxd5);
++ rxd->rxd6 = READ_ONCE(dma_rxd->rxd6);
++ }
+
+ return true;
+ }
+@@ -916,7 +920,7 @@ static int mtk_init_fq_dma(struct mtk_et
+ phy_ring_tail = eth->phy_scratch_ring + soc->txrx.txd_size * (cnt - 1);
+
+ for (i = 0; i < cnt; i++) {
+- struct mtk_tx_dma *txd;
++ struct mtk_tx_dma_v2 *txd;
+
+ txd = (void *)eth->scratch_ring + i * soc->txrx.txd_size;
+ txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
+@@ -926,6 +930,12 @@ static int mtk_init_fq_dma(struct mtk_et
+
+ txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
+ txd->txd4 = 0;
++ if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) {
++ txd->txd5 = 0;
++ txd->txd6 = 0;
++ txd->txd7 = 0;
++ txd->txd8 = 0;
++ }
+ }
+
+ mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head);
+@@ -1029,10 +1039,12 @@ static void setup_tx_buf(struct mtk_eth
+ }
+ }
+
+-static void mtk_tx_set_dma_desc(struct net_device *dev, struct mtk_tx_dma *desc,
+- struct mtk_tx_dma_desc_info *info)
++static void mtk_tx_set_dma_desc_v1(struct net_device *dev, void *txd,
++ struct mtk_tx_dma_desc_info *info)
+ {
+ struct mtk_mac *mac = netdev_priv(dev);
++ struct mtk_eth *eth = mac->hw;
++ struct mtk_tx_dma *desc = txd;
+ u32 data;
+
+ WRITE_ONCE(desc->txd1, info->addr);
+@@ -1056,6 +1068,59 @@ static void mtk_tx_set_dma_desc(struct n
+ WRITE_ONCE(desc->txd4, data);
+ }
+
++static void mtk_tx_set_dma_desc_v2(struct net_device *dev, void *txd,
++ struct mtk_tx_dma_desc_info *info)
++{
++ struct mtk_mac *mac = netdev_priv(dev);
++ struct mtk_tx_dma_v2 *desc = txd;
++ struct mtk_eth *eth = mac->hw;
++ u32 data;
++
++ WRITE_ONCE(desc->txd1, info->addr);
++
++ data = TX_DMA_PLEN0(info->size);
++ if (info->last)
++ data |= TX_DMA_LS0;
++ WRITE_ONCE(desc->txd3, data);
++
++ if (!info->qid && mac->id)
++ info->qid = MTK_QDMA_GMAC2_QID;
++
++ data = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2; /* forward port */
++ data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid);
++ WRITE_ONCE(desc->txd4, data);
++
++ data = 0;
++ if (info->first) {
++ if (info->gso)
++ data |= TX_DMA_TSO_V2;
++ /* tx checksum offload */
++ if (info->csum)
++ data |= TX_DMA_CHKSUM_V2;
++ }
++ WRITE_ONCE(desc->txd5, data);
++
++ data = 0;
++ if (info->first && info->vlan)
++ data |= TX_DMA_INS_VLAN_V2 | info->vlan_tci;
++ WRITE_ONCE(desc->txd6, data);
++
++ WRITE_ONCE(desc->txd7, 0);
++ WRITE_ONCE(desc->txd8, 0);
++}
++
++static void mtk_tx_set_dma_desc(struct net_device *dev, void *txd,
++ struct mtk_tx_dma_desc_info *info)
++{
++ struct mtk_mac *mac = netdev_priv(dev);
++ struct mtk_eth *eth = mac->hw;
++
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
++ mtk_tx_set_dma_desc_v2(dev, txd, info);
++ else
++ mtk_tx_set_dma_desc_v1(dev, txd, info);
++}
++
+ static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
+ int tx_num, struct mtk_tx_ring *ring, bool gso)
+ {
+@@ -1064,6 +1129,7 @@ static int mtk_tx_map(struct sk_buff *sk
+ .gso = gso,
+ .csum = skb->ip_summed == CHECKSUM_PARTIAL,
+ .vlan = skb_vlan_tag_present(skb),
++ .qid = skb->mark & MTK_QDMA_TX_MASK,
+ .vlan_tci = skb_vlan_tag_get(skb),
+ .first = true,
+ .last = !skb_is_nonlinear(skb),
+@@ -1123,7 +1189,9 @@ static int mtk_tx_map(struct sk_buff *sk
+ }
+
+ memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
+- txd_info.size = min(frag_size, MTK_TX_DMA_BUF_LEN);
++ txd_info.size = min_t(unsigned int, frag_size,
++ soc->txrx.dma_max_len);
++ txd_info.qid = skb->mark & MTK_QDMA_TX_MASK;
+ txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
+ !(frag_size - txd_info.size);
+ txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag,
+@@ -1204,17 +1272,16 @@ err_dma:
+ return -ENOMEM;
+ }
+
+-static inline int mtk_cal_txd_req(struct sk_buff *skb)
++static int mtk_cal_txd_req(struct mtk_eth *eth, struct sk_buff *skb)
+ {
+- int i, nfrags;
++ int i, nfrags = 1;
+ skb_frag_t *frag;
+
+- nfrags = 1;
+ if (skb_is_gso(skb)) {
+ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+ frag = &skb_shinfo(skb)->frags[i];
+ nfrags += DIV_ROUND_UP(skb_frag_size(frag),
+- MTK_TX_DMA_BUF_LEN);
++ eth->soc->txrx.dma_max_len);
+ }
+ } else {
+ nfrags += skb_shinfo(skb)->nr_frags;
+@@ -1266,7 +1333,7 @@ static netdev_tx_t mtk_start_xmit(struct
+ if (unlikely(test_bit(MTK_RESETTING, ð->state)))
+ goto drop;
+
+- tx_num = mtk_cal_txd_req(skb);
++ tx_num = mtk_cal_txd_req(eth, skb);
+ if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
+ netif_stop_queue(dev);
+ netif_err(eth, tx_queued, dev,
+@@ -1358,7 +1425,7 @@ static int mtk_poll_rx(struct napi_struc
+ int idx;
+ struct sk_buff *skb;
+ u8 *data, *new_data;
+- struct mtk_rx_dma *rxd, trxd;
++ struct mtk_rx_dma_v2 *rxd, trxd;
+ int done = 0, bytes = 0;
+
+ while (done < budget) {
+@@ -1366,7 +1433,7 @@ static int mtk_poll_rx(struct napi_struc
+ unsigned int pktlen;
+ dma_addr_t dma_addr;
+ u32 hash, reason;
+- int mac;
++ int mac = 0;
+
+ ring = mtk_get_rx_ring(eth);
+ if (unlikely(!ring))
+@@ -1376,16 +1443,15 @@ static int mtk_poll_rx(struct napi_struc
+ rxd = (void *)ring->dma + idx * eth->soc->txrx.rxd_size;
+ data = ring->data[idx];
+
+- if (!mtk_rx_get_desc(&trxd, rxd))
++ if (!mtk_rx_get_desc(eth, &trxd, rxd))
+ break;
+
+ /* find out which mac the packet come from. values start at 1 */
+- if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) ||
+- (trxd.rxd4 & RX_DMA_SPECIAL_TAG))
+- mac = 0;
+- else
+- mac = ((trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
+- RX_DMA_FPORT_MASK) - 1;
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
++ mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1;
++ else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&
++ !(trxd.rxd4 & RX_DMA_SPECIAL_TAG))
++ mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1;
+
+ if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
+ !eth->netdev[mac]))
+@@ -1431,7 +1497,7 @@ static int mtk_poll_rx(struct napi_struc
+ pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
+ skb->dev = netdev;
+ skb_put(skb, pktlen);
+- if (trxd.rxd4 & eth->rx_dma_l4_valid)
++ if (trxd.rxd4 & eth->soc->txrx.rx_dma_l4_valid)
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ else
+ skb_checksum_none_assert(skb);
+@@ -1449,10 +1515,25 @@ static int mtk_poll_rx(struct napi_struc
+ mtk_ppe_check_skb(eth->ppe, skb,
+ trxd.rxd4 & MTK_RXD4_FOE_ENTRY);
+
+- if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
+- (trxd.rxd2 & RX_DMA_VTAG))
+- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
+- RX_DMA_VID(trxd.rxd3));
++ if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
++ if (trxd.rxd3 & RX_DMA_VTAG_V2)
++ __vlan_hwaccel_put_tag(skb,
++ htons(RX_DMA_VPID(trxd.rxd4)),
++ RX_DMA_VID(trxd.rxd4));
++ } else if (trxd.rxd2 & RX_DMA_VTAG) {
++ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
++ RX_DMA_VID(trxd.rxd3));
++ }
++
++ /* If the device is attached to a dsa switch, the special
++ * tag inserted in VLAN field by hw switch can * be offloaded
++ * by RX HW VLAN offload. Clear vlan info.
++ */
++ if (netdev_uses_dsa(netdev))
++ __vlan_hwaccel_clear_tag(skb);
++ }
++
+ skb_record_rx_queue(skb, 0);
+ napi_gro_receive(napi, skb);
+
+@@ -1464,7 +1545,7 @@ release_desc:
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+ rxd->rxd2 = RX_DMA_LSO;
+ else
+- rxd->rxd2 = RX_DMA_PLEN0(ring->buf_size);
++ rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
+
+ ring->calc_idx = idx;
+
+@@ -1666,7 +1747,8 @@ static int mtk_napi_rx(struct napi_struc
+ do {
+ int rx_done;
+
+- mtk_w32(eth, MTK_RX_DONE_INT, reg_map->pdma.irq_status);
++ mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask,
++ reg_map->pdma.irq_status);
+ rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth);
+ rx_done_total += rx_done;
+
+@@ -1680,10 +1762,11 @@ static int mtk_napi_rx(struct napi_struc
+ if (rx_done_total == budget)
+ return budget;
+
+- } while (mtk_r32(eth, reg_map->pdma.irq_status) & MTK_RX_DONE_INT);
++ } while (mtk_r32(eth, reg_map->pdma.irq_status) &
++ eth->soc->txrx.rx_irq_done_mask);
+
+ if (napi_complete_done(napi, rx_done_total))
+- mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
++ mtk_rx_irq_enable(eth, eth->soc->txrx.rx_irq_done_mask);
+
+ return rx_done_total;
+ }
+@@ -1693,7 +1776,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+ const struct mtk_soc_data *soc = eth->soc;
+ struct mtk_tx_ring *ring = ð->tx_ring;
+ int i, sz = soc->txrx.txd_size;
+- struct mtk_tx_dma *txd;
++ struct mtk_tx_dma_v2 *txd;
+
+ ring->buf = kcalloc(MTK_DMA_SIZE, sizeof(*ring->buf),
+ GFP_KERNEL);
+@@ -1713,13 +1796,19 @@ static int mtk_tx_alloc(struct mtk_eth *
+ txd->txd2 = next_ptr;
+ txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
+ txd->txd4 = 0;
++ if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) {
++ txd->txd5 = 0;
++ txd->txd6 = 0;
++ txd->txd7 = 0;
++ txd->txd8 = 0;
++ }
+ }
+
+ /* On MT7688 (PDMA only) this driver uses the ring->dma structs
+ * only as the framework. The real HW descriptors are the PDMA
+ * descriptors in ring->dma_pdma.
+ */
+- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
++ if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
+ ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
+ &ring->phys_pdma, GFP_KERNEL);
+ if (!ring->dma_pdma)
+@@ -1799,13 +1888,11 @@ static int mtk_rx_alloc(struct mtk_eth *
+ struct mtk_rx_ring *ring;
+ int rx_data_len, rx_dma_size;
+ int i;
+- u32 offset = 0;
+
+ if (rx_flag == MTK_RX_FLAGS_QDMA) {
+ if (ring_no)
+ return -EINVAL;
+ ring = ð->rx_ring_qdma;
+- offset = 0x1000;
+ } else {
+ ring = ð->rx_ring[ring_no];
+ }
+@@ -1841,7 +1928,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+ return -ENOMEM;
+
+ for (i = 0; i < rx_dma_size; i++) {
+- struct mtk_rx_dma *rxd;
++ struct mtk_rx_dma_v2 *rxd;
+
+ dma_addr_t dma_addr = dma_map_single(eth->dma_dev,
+ ring->data[i] + NET_SKB_PAD + eth->ip_align,
+@@ -1856,26 +1943,47 @@ static int mtk_rx_alloc(struct mtk_eth *
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+ rxd->rxd2 = RX_DMA_LSO;
+ else
+- rxd->rxd2 = RX_DMA_PLEN0(ring->buf_size);
++ rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
+
+ rxd->rxd3 = 0;
+ rxd->rxd4 = 0;
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
++ rxd->rxd5 = 0;
++ rxd->rxd6 = 0;
++ rxd->rxd7 = 0;
++ rxd->rxd8 = 0;
++ }
+ }
+ ring->dma_size = rx_dma_size;
+ ring->calc_idx_update = false;
+ ring->calc_idx = rx_dma_size - 1;
+- ring->crx_idx_reg = reg_map->pdma.pcrx_ptr + ring_no * MTK_QRX_OFFSET;
++ if (rx_flag == MTK_RX_FLAGS_QDMA)
++ ring->crx_idx_reg = reg_map->qdma.qcrx_ptr +
++ ring_no * MTK_QRX_OFFSET;
++ else
++ ring->crx_idx_reg = reg_map->pdma.pcrx_ptr +
++ ring_no * MTK_QRX_OFFSET;
+ /* make sure that all changes to the dma ring are flushed before we
+ * continue
+ */
+ wmb();
+
+- mtk_w32(eth, ring->phys,
+- reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET + offset);
+- mtk_w32(eth, rx_dma_size,
+- reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET + offset);
+- mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg + offset);
+- mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), reg_map->pdma.rst_idx + offset);
++ if (rx_flag == MTK_RX_FLAGS_QDMA) {
++ mtk_w32(eth, ring->phys,
++ reg_map->qdma.rx_ptr + ring_no * MTK_QRX_OFFSET);
++ mtk_w32(eth, rx_dma_size,
++ reg_map->qdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET);
++ mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no),
++ reg_map->qdma.rst_idx);
++ } else {
++ mtk_w32(eth, ring->phys,
++ reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET);
++ mtk_w32(eth, rx_dma_size,
++ reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET);
++ mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no),
++ reg_map->pdma.rst_idx);
++ }
++ mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg);
+
+ return 0;
+ }
+@@ -2297,7 +2405,7 @@ static irqreturn_t mtk_handle_irq_rx(int
+ eth->rx_events++;
+ if (likely(napi_schedule_prep(ð->rx_napi))) {
+ __napi_schedule(ð->rx_napi);
+- mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
++ mtk_rx_irq_disable(eth, eth->soc->txrx.rx_irq_done_mask);
+ }
+
+ return IRQ_HANDLED;
+@@ -2321,8 +2429,10 @@ static irqreturn_t mtk_handle_irq(int ir
+ struct mtk_eth *eth = _eth;
+ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+
+- if (mtk_r32(eth, reg_map->pdma.irq_mask) & MTK_RX_DONE_INT) {
+- if (mtk_r32(eth, reg_map->pdma.irq_status) & MTK_RX_DONE_INT)
++ if (mtk_r32(eth, reg_map->pdma.irq_mask) &
++ eth->soc->txrx.rx_irq_done_mask) {
++ if (mtk_r32(eth, reg_map->pdma.irq_status) &
++ eth->soc->txrx.rx_irq_done_mask)
+ mtk_handle_irq_rx(irq, _eth);
+ }
+ if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) {
+@@ -2340,16 +2450,16 @@ static void mtk_poll_controller(struct n
+ struct mtk_eth *eth = mac->hw;
+
+ mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
+- mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
++ mtk_rx_irq_disable(eth, eth->soc->txrx.rx_irq_done_mask);
+ mtk_handle_irq_rx(eth->irq[2], dev);
+ mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
+- mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
++ mtk_rx_irq_enable(eth, eth->soc->txrx.rx_irq_done_mask);
+ }
+ #endif
+
+ static int mtk_start_dma(struct mtk_eth *eth)
+ {
+- u32 rx_2b_offset = (NET_IP_ALIGN == 2) ? MTK_RX_2B_OFFSET : 0;
++ u32 val, rx_2b_offset = (NET_IP_ALIGN == 2) ? MTK_RX_2B_OFFSET : 0;
+ const struct mtk_reg_map *reg_map = eth->soc->reg_map;
+ int err;
+
+@@ -2360,12 +2470,19 @@ static int mtk_start_dma(struct mtk_eth
+ }
+
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
+- mtk_w32(eth,
+- MTK_TX_WB_DDONE | MTK_TX_DMA_EN |
+- MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
+- MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
+- MTK_RX_BT_32DWORDS,
+- reg_map->qdma.glo_cfg);
++ val = mtk_r32(eth, reg_map->qdma.glo_cfg);
++ val |= MTK_TX_DMA_EN | MTK_RX_DMA_EN |
++ MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
++ MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE;
++
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
++ val |= MTK_MUTLI_CNT | MTK_RESV_BUF |
++ MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |
++ MTK_CHK_DDONE_EN;
++ else
++ val |= MTK_RX_BT_32DWORDS;
++ mtk_w32(eth, val, reg_map->qdma.glo_cfg);
++
+ mtk_w32(eth,
+ MTK_RX_DMA_EN | rx_2b_offset |
+ MTK_RX_BT_32DWORDS | MTK_MULTI_EN,
+@@ -2437,7 +2554,7 @@ static int mtk_open(struct net_device *d
+ napi_enable(ð->tx_napi);
+ napi_enable(ð->rx_napi);
+ mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
+- mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
++ mtk_rx_irq_enable(eth, eth->soc->txrx.rx_irq_done_mask);
+ refcount_set(ð->dma_refcnt, 1);
+ }
+ else
+@@ -2489,7 +2606,7 @@ static int mtk_stop(struct net_device *d
+ mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
+
+ mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
+- mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
++ mtk_rx_irq_disable(eth, eth->soc->txrx.rx_irq_done_mask);
+ napi_disable(ð->tx_napi);
+ napi_disable(ð->rx_napi);
+
+@@ -2649,9 +2766,25 @@ static int mtk_hw_init(struct mtk_eth *e
+ return 0;
+ }
+
+- /* Non-MT7628 handling... */
+- ethsys_reset(eth, RSTCTRL_FE);
+- ethsys_reset(eth, RSTCTRL_PPE);
++ val = RSTCTRL_FE | RSTCTRL_PPE;
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
++ regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0);
++
++ val |= RSTCTRL_ETH;
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1))
++ val |= RSTCTRL_PPE1;
++ }
++
++ ethsys_reset(eth, val);
++
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
++ regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,
++ 0x3ffffff);
++
++ /* Set FE to PDMAv2 if necessary */
++ val = mtk_r32(eth, MTK_FE_GLO_MISC);
++ mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC);
++ }
+
+ if (eth->pctl) {
+ /* Set GE2 driving and slew rate */
+@@ -2690,11 +2823,47 @@ static int mtk_hw_init(struct mtk_eth *e
+
+ /* FE int grouping */
+ mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp);
+- mtk_w32(eth, MTK_RX_DONE_INT, reg_map->pdma.int_grp + 4);
++ mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->pdma.int_grp + 4);
+ mtk_w32(eth, MTK_TX_DONE_INT, reg_map->qdma.int_grp);
+- mtk_w32(eth, MTK_RX_DONE_INT, reg_map->qdma.int_grp + 4);
++ mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4);
+ mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
+
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
++ /* PSE should not drop port8 and port9 packets */
++ mtk_w32(eth, 0x00000300, PSE_DROP_CFG);
++
++ /* PSE Free Queue Flow Control */
++ mtk_w32(eth, 0x01fa01f4, PSE_FQFC_CFG2);
++
++ /* PSE config input queue threshold */
++ mtk_w32(eth, 0x001a000e, PSE_IQ_REV(1));
++ mtk_w32(eth, 0x01ff001a, PSE_IQ_REV(2));
++ mtk_w32(eth, 0x000e01ff, PSE_IQ_REV(3));
++ mtk_w32(eth, 0x000e000e, PSE_IQ_REV(4));
++ mtk_w32(eth, 0x000e000e, PSE_IQ_REV(5));
++ mtk_w32(eth, 0x000e000e, PSE_IQ_REV(6));
++ mtk_w32(eth, 0x000e000e, PSE_IQ_REV(7));
++ mtk_w32(eth, 0x000e000e, PSE_IQ_REV(8));
++
++ /* PSE config output queue threshold */
++ mtk_w32(eth, 0x000f000a, PSE_OQ_TH(1));
++ mtk_w32(eth, 0x001a000f, PSE_OQ_TH(2));
++ mtk_w32(eth, 0x000f001a, PSE_OQ_TH(3));
++ mtk_w32(eth, 0x01ff000f, PSE_OQ_TH(4));
++ mtk_w32(eth, 0x000f000f, PSE_OQ_TH(5));
++ mtk_w32(eth, 0x0006000f, PSE_OQ_TH(6));
++ mtk_w32(eth, 0x00060006, PSE_OQ_TH(7));
++ mtk_w32(eth, 0x00060006, PSE_OQ_TH(8));
++
++ /* GDM and CDM Threshold */
++ mtk_w32(eth, 0x00000004, MTK_GDM2_THRES);
++ mtk_w32(eth, 0x00000004, MTK_CDMW0_THRES);
++ mtk_w32(eth, 0x00000004, MTK_CDMW1_THRES);
++ mtk_w32(eth, 0x00000004, MTK_CDME0_THRES);
++ mtk_w32(eth, 0x00000004, MTK_CDME1_THRES);
++ mtk_w32(eth, 0x00000004, MTK_CDMM_THRES);
++ }
++
+ return 0;
+
+ err_disable_pm:
+@@ -3231,12 +3400,8 @@ static int mtk_probe(struct platform_dev
+ if (IS_ERR(eth->base))
+ return PTR_ERR(eth->base);
+
+- if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
+- eth->rx_dma_l4_valid = RX_DMA_L4_VALID_PDMA;
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+ eth->ip_align = NET_IP_ALIGN;
+- } else {
+- eth->rx_dma_l4_valid = RX_DMA_L4_VALID;
+- }
+
+ spin_lock_init(ð->page_lock);
+ spin_lock_init(ð->tx_irq_lock);
+@@ -3472,6 +3637,10 @@ static const struct mtk_soc_data mt2701_
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
+ .rxd_size = sizeof(struct mtk_rx_dma),
++ .rx_irq_done_mask = MTK_RX_DONE_INT,
++ .rx_dma_l4_valid = RX_DMA_L4_VALID,
++ .dma_max_len = MTK_TX_DMA_BUF_LEN,
++ .dma_len_offset = 16,
+ },
+ };
+
+@@ -3485,6 +3654,10 @@ static const struct mtk_soc_data mt7621_
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
+ .rxd_size = sizeof(struct mtk_rx_dma),
++ .rx_irq_done_mask = MTK_RX_DONE_INT,
++ .rx_dma_l4_valid = RX_DMA_L4_VALID,
++ .dma_max_len = MTK_TX_DMA_BUF_LEN,
++ .dma_len_offset = 16,
+ },
+ };
+
+@@ -3499,6 +3672,10 @@ static const struct mtk_soc_data mt7622_
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
+ .rxd_size = sizeof(struct mtk_rx_dma),
++ .rx_irq_done_mask = MTK_RX_DONE_INT,
++ .rx_dma_l4_valid = RX_DMA_L4_VALID,
++ .dma_max_len = MTK_TX_DMA_BUF_LEN,
++ .dma_len_offset = 16,
+ },
+ };
+
+@@ -3512,6 +3689,10 @@ static const struct mtk_soc_data mt7623_
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
+ .rxd_size = sizeof(struct mtk_rx_dma),
++ .rx_irq_done_mask = MTK_RX_DONE_INT,
++ .rx_dma_l4_valid = RX_DMA_L4_VALID,
++ .dma_max_len = MTK_TX_DMA_BUF_LEN,
++ .dma_len_offset = 16,
+ },
+ };
+
+@@ -3525,6 +3706,10 @@ static const struct mtk_soc_data mt7629_
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
+ .rxd_size = sizeof(struct mtk_rx_dma),
++ .rx_irq_done_mask = MTK_RX_DONE_INT,
++ .rx_dma_l4_valid = RX_DMA_L4_VALID,
++ .dma_max_len = MTK_TX_DMA_BUF_LEN,
++ .dma_len_offset = 16,
+ },
+ };
+
+@@ -3537,6 +3722,10 @@ static const struct mtk_soc_data rt5350_
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma),
+ .rxd_size = sizeof(struct mtk_rx_dma),
++ .rx_irq_done_mask = MTK_RX_DONE_INT,
++ .rx_dma_l4_valid = RX_DMA_L4_VALID_PDMA,
++ .dma_max_len = MTK_TX_DMA_BUF_LEN,
++ .dma_len_offset = 16,
+ },
+ };
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -23,6 +23,7 @@
+ #define MTK_MAX_RX_LENGTH 1536
+ #define MTK_MAX_RX_LENGTH_2K 2048
+ #define MTK_TX_DMA_BUF_LEN 0x3fff
++#define MTK_TX_DMA_BUF_LEN_V2 0xffff
+ #define MTK_DMA_SIZE 512
+ #define MTK_NAPI_WEIGHT 64
+ #define MTK_MAC_COUNT 2
+@@ -83,6 +84,10 @@
+ #define MTK_CDMQ_IG_CTRL 0x1400
+ #define MTK_CDMQ_STAG_EN BIT(0)
+
++/* CDMP Ingress Control Register */
++#define MTK_CDMP_IG_CTRL 0x400
++#define MTK_CDMP_STAG_EN BIT(0)
++
+ /* CDMP Exgress Control Register */
+ #define MTK_CDMP_EG_CTRL 0x404
+
+@@ -102,13 +107,38 @@
+ /* Unicast Filter MAC Address Register - High */
+ #define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000))
+
++/* FE global misc reg*/
++#define MTK_FE_GLO_MISC 0x124
++
++/* PSE Free Queue Flow Control */
++#define PSE_FQFC_CFG1 0x100
++#define PSE_FQFC_CFG2 0x104
++#define PSE_DROP_CFG 0x108
++
++/* PSE Input Queue Reservation Register*/
++#define PSE_IQ_REV(x) (0x140 + (((x) - 1) << 2))
++
++/* PSE Output Queue Threshold Register*/
++#define PSE_OQ_TH(x) (0x160 + (((x) - 1) << 2))
++
++/* GDM and CDM Threshold */
++#define MTK_GDM2_THRES 0x1530
++#define MTK_CDMW0_THRES 0x164c
++#define MTK_CDMW1_THRES 0x1650
++#define MTK_CDME0_THRES 0x1654
++#define MTK_CDME1_THRES 0x1658
++#define MTK_CDMM_THRES 0x165c
++
+ /* PDMA HW LRO Control Registers */
+ #define MTK_PDMA_LRO_CTRL_DW0 0x980
+ #define MTK_LRO_EN BIT(0)
+ #define MTK_L3_CKS_UPD_EN BIT(7)
++#define MTK_L3_CKS_UPD_EN_V2 BIT(19)
+ #define MTK_LRO_ALT_PKT_CNT_MODE BIT(21)
+ #define MTK_LRO_RING_RELINQUISH_REQ (0x7 << 26)
++#define MTK_LRO_RING_RELINQUISH_REQ_V2 (0xf << 24)
+ #define MTK_LRO_RING_RELINQUISH_DONE (0x7 << 29)
++#define MTK_LRO_RING_RELINQUISH_DONE_V2 (0xf << 28)
+
+ #define MTK_PDMA_LRO_CTRL_DW1 0x984
+ #define MTK_PDMA_LRO_CTRL_DW2 0x988
+@@ -180,6 +210,13 @@
+ #define MTK_TX_DMA_EN BIT(0)
+ #define MTK_DMA_BUSY_TIMEOUT_US 1000000
+
++/* QDMA V2 Global Configuration Register */
++#define MTK_CHK_DDONE_EN BIT(28)
++#define MTK_DMAD_WR_WDONE BIT(26)
++#define MTK_WCOMP_EN BIT(24)
++#define MTK_RESV_BUF (0x40 << 16)
++#define MTK_MUTLI_CNT (0x4 << 12)
++
+ /* QDMA Flow Control Register */
+ #define FC_THRES_DROP_MODE BIT(20)
+ #define FC_THRES_DROP_EN (7 << 16)
+@@ -199,11 +236,32 @@
+ #define MTK_RX_DONE_INT MTK_RX_DONE_DLY
+ #define MTK_TX_DONE_INT MTK_TX_DONE_DLY
+
++#define MTK_RX_DONE_INT_V2 BIT(14)
++
+ /* QDMA Interrupt grouping registers */
+ #define MTK_RLS_DONE_INT BIT(0)
+
+ #define MTK_STAT_OFFSET 0x40
+
++/* QDMA TX NUM */
++#define MTK_QDMA_TX_NUM 16
++#define MTK_QDMA_TX_MASK (MTK_QDMA_TX_NUM - 1)
++#define QID_BITS_V2(x) (((x) & 0x3f) << 16)
++#define MTK_QDMA_GMAC2_QID 8
++
++#define MTK_TX_DMA_BUF_SHIFT 8
++
++/* QDMA V2 descriptor txd6 */
++#define TX_DMA_INS_VLAN_V2 BIT(16)
++/* QDMA V2 descriptor txd5 */
++#define TX_DMA_CHKSUM_V2 (0x7 << 28)
++#define TX_DMA_TSO_V2 BIT(31)
++
++/* QDMA V2 descriptor txd4 */
++#define TX_DMA_FPORT_SHIFT_V2 8
++#define TX_DMA_FPORT_MASK_V2 0xf
++#define TX_DMA_SWC_V2 BIT(30)
++
+ #define MTK_WDMA0_BASE 0x2800
+ #define MTK_WDMA1_BASE 0x2c00
+
+@@ -217,10 +275,9 @@
+ /* QDMA descriptor txd3 */
+ #define TX_DMA_OWNER_CPU BIT(31)
+ #define TX_DMA_LS0 BIT(30)
+-#define TX_DMA_PLEN0(_x) (((_x) & MTK_TX_DMA_BUF_LEN) << 16)
+-#define TX_DMA_PLEN1(_x) ((_x) & MTK_TX_DMA_BUF_LEN)
++#define TX_DMA_PLEN0(x) (((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset)
++#define TX_DMA_PLEN1(x) ((x) & eth->soc->txrx.dma_max_len)
+ #define TX_DMA_SWC BIT(14)
+-#define TX_DMA_SDL(_x) (((_x) & 0x3fff) << 16)
+
+ /* PDMA on MT7628 */
+ #define TX_DMA_DONE BIT(31)
+@@ -230,12 +287,14 @@
+ /* QDMA descriptor rxd2 */
+ #define RX_DMA_DONE BIT(31)
+ #define RX_DMA_LSO BIT(30)
+-#define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16)
+-#define RX_DMA_GET_PLEN0(_x) (((_x) >> 16) & 0x3fff)
++#define RX_DMA_PREP_PLEN0(x) (((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset)
++#define RX_DMA_GET_PLEN0(x) (((x) >> eth->soc->txrx.dma_len_offset) & eth->soc->txrx.dma_max_len)
+ #define RX_DMA_VTAG BIT(15)
+
+ /* QDMA descriptor rxd3 */
+-#define RX_DMA_VID(_x) ((_x) & 0xfff)
++#define RX_DMA_VID(x) ((x) & VLAN_VID_MASK)
++#define RX_DMA_TCI(x) ((x) & (VLAN_PRIO_MASK | VLAN_VID_MASK))
++#define RX_DMA_VPID(x) (((x) >> 16) & 0xffff)
+
+ /* QDMA descriptor rxd4 */
+ #define MTK_RXD4_FOE_ENTRY GENMASK(13, 0)
+@@ -246,10 +305,15 @@
+ /* QDMA descriptor rxd4 */
+ #define RX_DMA_L4_VALID BIT(24)
+ #define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */
+-#define RX_DMA_FPORT_SHIFT 19
+-#define RX_DMA_FPORT_MASK 0x7
+ #define RX_DMA_SPECIAL_TAG BIT(22)
+
++#define RX_DMA_GET_SPORT(x) (((x) >> 19) & 0xf)
++#define RX_DMA_GET_SPORT_V2(x) (((x) >> 26) & 0x7)
++
++/* PDMA V2 descriptor rxd3 */
++#define RX_DMA_VTAG_V2 BIT(0)
++#define RX_DMA_L4_VALID_V2 BIT(2)
++
+ /* PHY Indirect Access Control registers */
+ #define MTK_PHY_IAC 0x10004
+ #define PHY_IAC_ACCESS BIT(31)
+@@ -370,6 +434,16 @@
+ #define ETHSYS_TRGMII_MT7621_DDR_PLL BIT(5)
+
+ /* ethernet reset control register */
++#define ETHSYS_RSTCTRL 0x34
++#define RSTCTRL_FE BIT(6)
++#define RSTCTRL_PPE BIT(31)
++#define RSTCTRL_PPE1 BIT(30)
++#define RSTCTRL_ETH BIT(23)
++
++/* ethernet reset check idle register */
++#define ETHSYS_FE_RST_CHK_IDLE_EN 0x28
++
++/* ethernet reset control register */
+ #define ETHSYS_RSTCTRL 0x34
+ #define RSTCTRL_FE BIT(6)
+ #define RSTCTRL_PPE BIT(31)
+@@ -453,6 +527,17 @@ struct mtk_rx_dma {
+ unsigned int rxd4;
+ } __packed __aligned(4);
+
++struct mtk_rx_dma_v2 {
++ unsigned int rxd1;
++ unsigned int rxd2;
++ unsigned int rxd3;
++ unsigned int rxd4;
++ unsigned int rxd5;
++ unsigned int rxd6;
++ unsigned int rxd7;
++ unsigned int rxd8;
++} __packed __aligned(4);
++
+ struct mtk_tx_dma {
+ unsigned int txd1;
+ unsigned int txd2;
+@@ -460,6 +545,17 @@ struct mtk_tx_dma {
+ unsigned int txd4;
+ } __packed __aligned(4);
+
++struct mtk_tx_dma_v2 {
++ unsigned int txd1;
++ unsigned int txd2;
++ unsigned int txd3;
++ unsigned int txd4;
++ unsigned int txd5;
++ unsigned int txd6;
++ unsigned int txd7;
++ unsigned int txd8;
++} __packed __aligned(4);
++
+ struct mtk_eth;
+ struct mtk_mac;
+
+@@ -646,7 +742,9 @@ enum mkt_eth_capabilities {
+ MTK_SHARED_INT_BIT,
+ MTK_TRGMII_MT7621_CLK_BIT,
+ MTK_QDMA_BIT,
++ MTK_NETSYS_V2_BIT,
+ MTK_SOC_MT7628_BIT,
++ MTK_RSTCTRL_PPE1_BIT,
+
+ /* MUX BITS*/
+ MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT,
+@@ -678,7 +776,9 @@ enum mkt_eth_capabilities {
+ #define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT)
+ #define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT)
+ #define MTK_QDMA BIT(MTK_QDMA_BIT)
++#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT)
+ #define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT)
++#define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT)
+
+ #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \
+ BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)
+@@ -755,6 +855,7 @@ struct mtk_tx_dma_desc_info {
+ dma_addr_t addr;
+ u32 size;
+ u16 vlan_tci;
++ u16 qid;
+ u8 gso:1;
+ u8 csum:1;
+ u8 vlan:1;
+@@ -812,6 +913,10 @@ struct mtk_reg_map {
+ * the extra setup for those pins used by GMAC.
+ * @txd_size Tx DMA descriptor size.
+ * @rxd_size Rx DMA descriptor size.
++ * @rx_irq_done_mask Rx irq done register mask.
++ * @rx_dma_l4_valid Rx DMA valid register mask.
++ * @dma_max_len Max DMA tx/rx buffer length.
++ * @dma_len_offset Tx/Rx DMA length field offset.
+ */
+ struct mtk_soc_data {
+ const struct mtk_reg_map *reg_map;
+@@ -824,6 +929,10 @@ struct mtk_soc_data {
+ struct {
+ u32 txd_size;
+ u32 rxd_size;
++ u32 rx_irq_done_mask;
++ u32 rx_dma_l4_valid;
++ u32 dma_max_len;
++ u32 dma_len_offset;
+ } txrx;
+ };
+
+@@ -942,7 +1051,6 @@ struct mtk_eth {
+ u32 tx_bytes;
+ struct dim tx_dim;
+
+- u32 rx_dma_l4_valid;
+ int ip_align;
+
+ struct mtk_ppe *ppe;
diff --git a/target/linux/generic/backport-5.15/702-v5.19-28-net-ethernet-mtk_eth_soc-convert-ring-dma-pointer-to.patch b/target/linux/generic/backport-5.15/702-v5.19-28-net-ethernet-mtk_eth_soc-convert-ring-dma-pointer-to.patch
new file mode 100644
index 00000000000000..a95663923914fe
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-28-net-ethernet-mtk_eth_soc-convert-ring-dma-pointer-to.patch
@@ -0,0 +1,135 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:37 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: convert ring dma pointer to void
+
+Simplify the code converting {tx,rx} ring dma pointer to void
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -946,18 +946,15 @@ static int mtk_init_fq_dma(struct mtk_et
+ return 0;
+ }
+
+-static inline void *mtk_qdma_phys_to_virt(struct mtk_tx_ring *ring, u32 desc)
++static void *mtk_qdma_phys_to_virt(struct mtk_tx_ring *ring, u32 desc)
+ {
+- void *ret = ring->dma;
+-
+- return ret + (desc - ring->phys);
++ return ring->dma + (desc - ring->phys);
+ }
+
+ static struct mtk_tx_buf *mtk_desc_to_tx_buf(struct mtk_tx_ring *ring,
+- struct mtk_tx_dma *txd,
+- u32 txd_size)
++ void *txd, u32 txd_size)
+ {
+- int idx = ((void *)txd - (void *)ring->dma) / txd_size;
++ int idx = (txd - ring->dma) / txd_size;
+
+ return &ring->buf[idx];
+ }
+@@ -965,13 +962,12 @@ static struct mtk_tx_buf *mtk_desc_to_tx
+ static struct mtk_tx_dma *qdma_to_pdma(struct mtk_tx_ring *ring,
+ struct mtk_tx_dma *dma)
+ {
+- return ring->dma_pdma - ring->dma + dma;
++ return ring->dma_pdma - (struct mtk_tx_dma *)ring->dma + dma;
+ }
+
+-static int txd_to_idx(struct mtk_tx_ring *ring, struct mtk_tx_dma *dma,
+- u32 txd_size)
++static int txd_to_idx(struct mtk_tx_ring *ring, void *dma, u32 txd_size)
+ {
+- return ((void *)dma - (void *)ring->dma) / txd_size;
++ return (dma - ring->dma) / txd_size;
+ }
+
+ static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
+@@ -1388,7 +1384,7 @@ static struct mtk_rx_ring *mtk_get_rx_ri
+
+ ring = ð->rx_ring[i];
+ idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
+- rxd = (void *)ring->dma + idx * eth->soc->txrx.rxd_size;
++ rxd = ring->dma + idx * eth->soc->txrx.rxd_size;
+ if (rxd->rxd2 & RX_DMA_DONE) {
+ ring->calc_idx_update = true;
+ return ring;
+@@ -1440,7 +1436,7 @@ static int mtk_poll_rx(struct napi_struc
+ goto rx_done;
+
+ idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
+- rxd = (void *)ring->dma + idx * eth->soc->txrx.rxd_size;
++ rxd = ring->dma + idx * eth->soc->txrx.rxd_size;
+ data = ring->data[idx];
+
+ if (!mtk_rx_get_desc(eth, &trxd, rxd))
+@@ -1647,7 +1643,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
+
+ mtk_tx_unmap(eth, tx_buf, true);
+
+- desc = (void *)ring->dma + cpu * eth->soc->txrx.txd_size;
++ desc = ring->dma + cpu * eth->soc->txrx.txd_size;
+ ring->last_free = desc;
+ atomic_inc(&ring->free_count);
+
+@@ -1792,7 +1788,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+ int next = (i + 1) % MTK_DMA_SIZE;
+ u32 next_ptr = ring->phys + next * sz;
+
+- txd = (void *)ring->dma + i * sz;
++ txd = ring->dma + i * sz;
+ txd->txd2 = next_ptr;
+ txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
+ txd->txd4 = 0;
+@@ -1822,7 +1818,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+
+ ring->dma_size = MTK_DMA_SIZE;
+ atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
+- ring->next_free = &ring->dma[0];
++ ring->next_free = ring->dma;
+ ring->last_free = (void *)txd;
+ ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
+ ring->thresh = MAX_SKB_FRAGS;
+@@ -1937,7 +1933,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+ if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr)))
+ return -ENOMEM;
+
+- rxd = (void *)ring->dma + i * eth->soc->txrx.rxd_size;
++ rxd = ring->dma + i * eth->soc->txrx.rxd_size;
+ rxd->rxd1 = (unsigned int)dma_addr;
+
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+@@ -1999,7 +1995,7 @@ static void mtk_rx_clean(struct mtk_eth
+ if (!ring->data[i])
+ continue;
+
+- rxd = (void *)ring->dma + i * eth->soc->txrx.rxd_size;
++ rxd = ring->dma + i * eth->soc->txrx.rxd_size;
+ if (!rxd->rxd1)
+ continue;
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -688,7 +688,7 @@ struct mtk_tx_buf {
+ * are present
+ */
+ struct mtk_tx_ring {
+- struct mtk_tx_dma *dma;
++ void *dma;
+ struct mtk_tx_buf *buf;
+ dma_addr_t phys;
+ struct mtk_tx_dma *next_free;
+@@ -718,7 +718,7 @@ enum mtk_rx_flags {
+ * @calc_idx: The current head of ring
+ */
+ struct mtk_rx_ring {
+- struct mtk_rx_dma *dma;
++ void *dma;
+ u8 **data;
+ dma_addr_t phys;
+ u16 frag_size;
diff --git a/target/linux/generic/backport-5.15/702-v5.19-29-net-ethernet-mtk_eth_soc-convert-scratch_ring-pointe.patch b/target/linux/generic/backport-5.15/702-v5.19-29-net-ethernet-mtk_eth_soc-convert-scratch_ring-pointe.patch
new file mode 100644
index 00000000000000..459ffd540673dd
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-29-net-ethernet-mtk_eth_soc-convert-scratch_ring-pointe.patch
@@ -0,0 +1,33 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:38 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: convert scratch_ring pointer to
+ void
+
+Simplify the code converting scratch_ring pointer to void
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -922,7 +922,7 @@ static int mtk_init_fq_dma(struct mtk_et
+ for (i = 0; i < cnt; i++) {
+ struct mtk_tx_dma_v2 *txd;
+
+- txd = (void *)eth->scratch_ring + i * soc->txrx.txd_size;
++ txd = eth->scratch_ring + i * soc->txrx.txd_size;
+ txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
+ if (i < cnt - 1)
+ txd->txd2 = eth->phy_scratch_ring +
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -1028,7 +1028,7 @@ struct mtk_eth {
+ struct mtk_rx_ring rx_ring_qdma;
+ struct napi_struct tx_napi;
+ struct napi_struct rx_napi;
+- struct mtk_tx_dma *scratch_ring;
++ void *scratch_ring;
+ dma_addr_t phy_scratch_ring;
+ void *scratch_head;
+ struct clk *clks[MTK_CLK_MAX];
diff --git a/target/linux/generic/backport-5.15/702-v5.19-30-net-ethernet-mtk_eth_soc-introduce-support-for-mt798.patch b/target/linux/generic/backport-5.15/702-v5.19-30-net-ethernet-mtk_eth_soc-introduce-support-for-mt798.patch
new file mode 100644
index 00000000000000..4baeb2244f086e
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-30-net-ethernet-mtk_eth_soc-introduce-support-for-mt798.patch
@@ -0,0 +1,138 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 20 May 2022 20:11:39 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: introduce support for mt7986
+ chipset
+
+Add support for mt7986-eth driver available on mt7986 soc.
+
+Tested-by: Sam Shih <sam.shih@mediatek.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -87,6 +87,43 @@ static const struct mtk_reg_map mt7628_r
+ },
+ };
+
++static const struct mtk_reg_map mt7986_reg_map = {
++ .tx_irq_mask = 0x461c,
++ .tx_irq_status = 0x4618,
++ .pdma = {
++ .rx_ptr = 0x6100,
++ .rx_cnt_cfg = 0x6104,
++ .pcrx_ptr = 0x6108,
++ .glo_cfg = 0x6204,
++ .rst_idx = 0x6208,
++ .delay_irq = 0x620c,
++ .irq_status = 0x6220,
++ .irq_mask = 0x6228,
++ .int_grp = 0x6250,
++ },
++ .qdma = {
++ .qtx_cfg = 0x4400,
++ .rx_ptr = 0x4500,
++ .rx_cnt_cfg = 0x4504,
++ .qcrx_ptr = 0x4508,
++ .glo_cfg = 0x4604,
++ .rst_idx = 0x4608,
++ .delay_irq = 0x460c,
++ .fc_th = 0x4610,
++ .int_grp = 0x4620,
++ .hred = 0x4644,
++ .ctx_ptr = 0x4700,
++ .dtx_ptr = 0x4704,
++ .crx_ptr = 0x4710,
++ .drx_ptr = 0x4714,
++ .fq_head = 0x4720,
++ .fq_tail = 0x4724,
++ .fq_count = 0x4728,
++ .fq_blen = 0x472c,
++ },
++ .gdm1_cnt = 0x1c00,
++};
++
+ /* strings used by ethtool */
+ static const struct mtk_ethtool_stats {
+ char str[ETH_GSTRING_LEN];
+@@ -110,7 +147,7 @@ static const char * const mtk_clks_sourc
+ "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll",
+ "sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb",
+ "sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb",
+- "sgmii_ck", "eth2pll",
++ "sgmii_ck", "eth2pll", "wocpu0", "wocpu1", "netsys0", "netsys1"
+ };
+
+ void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
+@@ -3709,6 +3746,21 @@ static const struct mtk_soc_data mt7629_
+ },
+ };
+
++static const struct mtk_soc_data mt7986_data = {
++ .reg_map = &mt7986_reg_map,
++ .ana_rgc3 = 0x128,
++ .caps = MT7986_CAPS,
++ .required_clks = MT7986_CLKS_BITMAP,
++ .required_pctl = false,
++ .txrx = {
++ .txd_size = sizeof(struct mtk_tx_dma_v2),
++ .rxd_size = sizeof(struct mtk_rx_dma_v2),
++ .rx_irq_done_mask = MTK_RX_DONE_INT_V2,
++ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
++ .dma_len_offset = 8,
++ },
++};
++
+ static const struct mtk_soc_data rt5350_data = {
+ .reg_map = &mt7628_reg_map,
+ .caps = MT7628_CAPS,
+@@ -3731,6 +3783,7 @@ const struct of_device_id of_mtk_match[]
+ { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data},
+ { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
+ { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data},
++ { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data},
+ { .compatible = "ralink,rt5350-eth", .data = &rt5350_data},
+ {},
+ };
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -623,6 +623,10 @@ enum mtk_clks_map {
+ MTK_CLK_SGMII2_CDR_FB,
+ MTK_CLK_SGMII_CK,
+ MTK_CLK_ETH2PLL,
++ MTK_CLK_WOCPU0,
++ MTK_CLK_WOCPU1,
++ MTK_CLK_NETSYS0,
++ MTK_CLK_NETSYS1,
+ MTK_CLK_MAX
+ };
+
+@@ -653,6 +657,16 @@ enum mtk_clks_map {
+ BIT(MTK_CLK_SGMII2_CDR_FB) | \
+ BIT(MTK_CLK_SGMII_CK) | \
+ BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP))
++#define MT7986_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \
++ BIT(MTK_CLK_WOCPU1) | BIT(MTK_CLK_WOCPU0) | \
++ BIT(MTK_CLK_SGMII_TX_250M) | \
++ BIT(MTK_CLK_SGMII_RX_250M) | \
++ BIT(MTK_CLK_SGMII_CDR_REF) | \
++ BIT(MTK_CLK_SGMII_CDR_FB) | \
++ BIT(MTK_CLK_SGMII2_TX_250M) | \
++ BIT(MTK_CLK_SGMII2_RX_250M) | \
++ BIT(MTK_CLK_SGMII2_CDR_REF) | \
++ BIT(MTK_CLK_SGMII2_CDR_FB))
+
+ enum mtk_dev_state {
+ MTK_HW_INIT,
+@@ -851,6 +865,10 @@ enum mkt_eth_capabilities {
+ MTK_MUX_U3_GMAC2_TO_QPHY | \
+ MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA)
+
++#define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \
++ MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \
++ MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1)
++
+ struct mtk_tx_dma_desc_info {
+ dma_addr_t addr;
+ u32 size;
diff --git a/target/linux/generic/backport-5.15/702-v5.19-31-net-ethernet-mtk_eth_soc-fix-error-code-in-mtk_flow_.patch b/target/linux/generic/backport-5.15/702-v5.19-31-net-ethernet-mtk_eth_soc-fix-error-code-in-mtk_flow_.patch
new file mode 100644
index 00000000000000..e490333a9bbf02
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-31-net-ethernet-mtk_eth_soc-fix-error-code-in-mtk_flow_.patch
@@ -0,0 +1,25 @@
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Thu, 19 May 2022 17:08:00 +0300
+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix error code in
+ mtk_flow_offload_replace()
+
+Preserve the error code from mtk_foe_entry_commit(). Do not return
+success.
+
+Fixes: c4f033d9e03e ("net: ethernet: mtk_eth_soc: rework hardware flow table management")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+@@ -434,7 +434,8 @@ mtk_flow_offload_replace(struct mtk_eth
+ memcpy(&entry->data, &foe, sizeof(entry->data));
+ entry->wed_index = wed_index;
+
+- if (mtk_foe_entry_commit(eth->ppe, entry) < 0)
++ err = mtk_foe_entry_commit(eth->ppe, entry);
++ if (err < 0)
+ goto free;
+
+ err = rhashtable_insert_fast(ð->flow_table, &entry->node,
diff --git a/target/linux/generic/backport-5.15/702-v5.19-33-net-ethernet-mtk_eth_soc-enable-rx-cksum-offload-for.patch b/target/linux/generic/backport-5.15/702-v5.19-33-net-ethernet-mtk_eth_soc-enable-rx-cksum-offload-for.patch
new file mode 100644
index 00000000000000..2e3ad698b55d46
--- /dev/null
+++ b/target/linux/generic/backport-5.15/702-v5.19-33-net-ethernet-mtk_eth_soc-enable-rx-cksum-offload-for.patch
@@ -0,0 +1,47 @@
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 6 Jun 2022 21:49:00 +0200
+Subject: [PATCH] net: ethernet: mtk_eth_soc: enable rx cksum offload for
+ MTK_NETSYS_V2
+
+Enable rx checksum offload for mt7986 chipset.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://lore.kernel.org/r/c8699805c18f7fd38315fcb8da2787676d83a32c.1654544585.git.lorenzo@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -1462,8 +1462,8 @@ static int mtk_poll_rx(struct napi_struc
+ int done = 0, bytes = 0;
+
+ while (done < budget) {
++ unsigned int pktlen, *rxdcsum;
+ struct net_device *netdev;
+- unsigned int pktlen;
+ dma_addr_t dma_addr;
+ u32 hash, reason;
+ int mac = 0;
+@@ -1530,7 +1530,13 @@ static int mtk_poll_rx(struct napi_struc
+ pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
+ skb->dev = netdev;
+ skb_put(skb, pktlen);
+- if (trxd.rxd4 & eth->soc->txrx.rx_dma_l4_valid)
++
++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
++ rxdcsum = &trxd.rxd3;
++ else
++ rxdcsum = &trxd.rxd4;
++
++ if (*rxdcsum & eth->soc->txrx.rx_dma_l4_valid)
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ else
+ skb_checksum_none_assert(skb);
+@@ -3756,6 +3762,7 @@ static const struct mtk_soc_data mt7986_
+ .txd_size = sizeof(struct mtk_tx_dma_v2),
+ .rxd_size = sizeof(struct mtk_rx_dma_v2),
+ .rx_irq_done_mask = MTK_RX_DONE_INT_V2,
++ .rx_dma_l4_valid = RX_DMA_L4_VALID_V2,
+ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
+ .dma_len_offset = 8,
+ },
diff --git a/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch b/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch
index 5dd0554edbcee0..4f4d6c75091af4 100644
--- a/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch
+++ b/target/linux/generic/hack-5.15/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch
@@ -19,7 +19,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
-@@ -1561,7 +1561,7 @@ static void device_links_purge(struct de
+@@ -1562,7 +1562,7 @@ static void device_links_purge(struct de
#define FW_DEVLINK_FLAGS_RPM (FW_DEVLINK_FLAGS_ON | \
DL_FLAG_PM_RUNTIME)
diff --git a/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
index 2807bec7c6fe33..8b4cd1048825b1 100644
--- a/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
+++ b/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
@@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
-@@ -2068,6 +2068,8 @@ struct net_device {
+@@ -2075,6 +2075,8 @@ struct net_device {
struct netdev_hw_addr_list mc;
struct netdev_hw_addr_list dev_addrs;
@@ -32,7 +32,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
__u8 inner_protocol_type:1;
--- a/net/core/dev.c
+++ b/net/core/dev.c
-@@ -6057,6 +6057,9 @@ static enum gro_result dev_gro_receive(s
+@@ -6061,6 +6061,9 @@ static enum gro_result dev_gro_receive(s
int same_flow;
int grow;
@@ -42,7 +42,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (netif_elide_gro(skb->dev))
goto normal;
-@@ -8071,6 +8074,48 @@ static void __netdev_adjacent_dev_unlink
+@@ -8075,6 +8078,48 @@ static void __netdev_adjacent_dev_unlink
&upper_dev->adj_list.lower);
}
@@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static int __netdev_upper_dev_link(struct net_device *dev,
struct net_device *upper_dev, bool master,
void *upper_priv, void *upper_info,
-@@ -8122,6 +8167,7 @@ static int __netdev_upper_dev_link(struc
+@@ -8126,6 +8171,7 @@ static int __netdev_upper_dev_link(struc
if (ret)
return ret;
@@ -99,7 +99,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
ret = notifier_to_errno(ret);
-@@ -8218,6 +8264,7 @@ static void __netdev_upper_dev_unlink(st
+@@ -8222,6 +8268,7 @@ static void __netdev_upper_dev_unlink(st
__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
@@ -107,7 +107,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
-@@ -9037,6 +9084,7 @@ int dev_set_mac_address(struct net_devic
+@@ -9041,6 +9088,7 @@ int dev_set_mac_address(struct net_devic
if (err)
return err;
dev->addr_assign_type = NET_ADDR_SET;
diff --git a/target/linux/generic/pending-5.15/700-net-ethernet-mtk_eth_soc-avoid-creating-duplicate-of.patch b/target/linux/generic/pending-5.15/700-net-ethernet-mtk_eth_soc-avoid-creating-duplicate-of.patch
index 6323e5e9665a1a..c1f0734b434b35 100644
--- a/target/linux/generic/pending-5.15/700-net-ethernet-mtk_eth_soc-avoid-creating-duplicate-of.patch
+++ b/target/linux/generic/pending-5.15/700-net-ethernet-mtk_eth_soc-avoid-creating-duplicate-of.patch
@@ -14,7 +14,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
-@@ -189,6 +189,9 @@ mtk_flow_offload_replace(struct mtk_eth
+@@ -234,6 +234,9 @@ mtk_flow_offload_replace(struct mtk_eth
if (rhashtable_lookup(ð->flow_table, &f->cookie, mtk_flow_ht_params))
return -EEXIST;
diff --git a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
index 0811b20e98a01e..4b5c47420438bd 100644
--- a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
+++ b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
@@ -10,17 +10,17 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -2206,8 +2206,8 @@ static irqreturn_t mtk_handle_irq_rx(int
+@@ -2443,8 +2443,8 @@ static irqreturn_t mtk_handle_irq_rx(int
eth->rx_events++;
if (likely(napi_schedule_prep(ð->rx_napi))) {
- __napi_schedule(ð->rx_napi);
- mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
+ mtk_rx_irq_disable(eth, eth->soc->txrx.rx_irq_done_mask);
+ __napi_schedule(ð->rx_napi);
}
return IRQ_HANDLED;
-@@ -2219,8 +2219,8 @@ static irqreturn_t mtk_handle_irq_tx(int
+@@ -2456,8 +2456,8 @@ static irqreturn_t mtk_handle_irq_tx(int
eth->tx_events++;
if (likely(napi_schedule_prep(ð->tx_napi))) {
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
}
return IRQ_HANDLED;
-@@ -3333,6 +3333,8 @@ static int mtk_probe(struct platform_dev
+@@ -3623,6 +3623,8 @@ static int mtk_probe(struct platform_dev
* for NAPI to work
*/
init_dummy_netdev(ð->dummy_dev);
diff --git a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch
index 289398ce3af9b8..45c650b34a362f 100644
--- a/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch
+++ b/target/linux/mediatek/patches-5.15/703-v5.17-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-ac.patch
@@ -20,7 +20,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -106,13 +106,35 @@ static int _mtk_mdio_write(struct mtk_et
+@@ -196,13 +196,35 @@ static int _mtk_mdio_write(struct mtk_et
if (ret < 0)
return ret;
@@ -63,7 +63,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = mtk_mdio_busy_wait(eth);
if (ret < 0)
-@@ -129,12 +151,33 @@ static int _mtk_mdio_read(struct mtk_eth
+@@ -219,12 +241,33 @@ static int _mtk_mdio_read(struct mtk_eth
if (ret < 0)
return ret;
@@ -103,7 +103,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ret = mtk_mdio_busy_wait(eth);
if (ret < 0)
-@@ -593,6 +636,7 @@ static int mtk_mdio_init(struct mtk_eth
+@@ -683,6 +726,7 @@ static int mtk_mdio_init(struct mtk_eth
eth->mii_bus->name = "mdio";
eth->mii_bus->read = mtk_mdio_read;
eth->mii_bus->write = mtk_mdio_write;
@@ -113,7 +113,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-@@ -349,9 +349,12 @@
+@@ -322,9 +322,12 @@
#define PHY_IAC_ADDR_MASK GENMASK(24, 20)
#define PHY_IAC_ADDR(x) FIELD_PREP(PHY_IAC_ADDR_MASK, (x))
#define PHY_IAC_CMD_MASK GENMASK(19, 18)
diff --git a/target/linux/mediatek/patches-5.15/704-net-ethernet-mtk_eth_soc-announce-2500baseT.patch b/target/linux/mediatek/patches-5.15/704-net-ethernet-mtk_eth_soc-announce-2500baseT.patch
index e9d4188a459ed7..a7878ecb1b4f47 100644
--- a/target/linux/mediatek/patches-5.15/704-net-ethernet-mtk_eth_soc-announce-2500baseT.patch
+++ b/target/linux/mediatek/patches-5.15/704-net-ethernet-mtk_eth_soc-announce-2500baseT.patch
@@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -577,6 +577,7 @@ static void mtk_validate(struct phylink_
+@@ -667,6 +667,7 @@ static void mtk_validate(struct phylink_
if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) {
phylink_set(mask, 1000baseT_Full);
phylink_set(mask, 1000baseX_Full);
From 340fe780112b22ea33249ea8c8878597c6561e79 Mon Sep 17 00:00:00 2001
From: lovehackintosh <92633080+lovehackintosh@users.noreply.github.com>
Date: Thu, 21 Jul 2022 10:00:21 +0800
Subject: [PATCH 2/5] kernel: bump 5.10 to 5.10.131 (#9807)
---
include/kernel-5.10 | 4 ++--
...ables-update-table-flags-from-the-commi.patch | 4 ++--
.../generic/hack-5.10/221-module_exports.patch | 2 +-
...cting-with-source-address-failed-policy.patch | 16 ++++++++--------
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/include/kernel-5.10 b/include/kernel-5.10
index 658767af331fe3..f517e3b6a7cd25 100644
--- a/include/kernel-5.10
+++ b/include/kernel-5.10
@@ -1,2 +1,2 @@
-LINUX_VERSION-5.10 = .127
-LINUX_KERNEL_HASH-5.10.127 = 419233ee0b1ee1dc2be8abf1b241545d10dad19d95f237180d6ccdc0cd221580
+LINUX_VERSION-5.10 = .131
+LINUX_KERNEL_HASH-5.10.131 = 8bc441442c16c330a7148fe3cca9edcd98bc0fc9f68304633c7eb641770d21ce
diff --git a/target/linux/generic/backport-5.10/610-v5.13-10-netfilter-nftables-update-table-flags-from-the-commi.patch b/target/linux/generic/backport-5.10/610-v5.13-10-netfilter-nftables-update-table-flags-from-the-commi.patch
index e32bcfa4a77fa6..d2076031ca3b86 100644
--- a/target/linux/generic/backport-5.10/610-v5.13-10-netfilter-nftables-update-table-flags-from-the-commi.patch
+++ b/target/linux/generic/backport-5.10/610-v5.13-10-netfilter-nftables-update-table-flags-from-the-commi.patch
@@ -70,7 +70,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
nft_trans_table_update(trans) = true;
list_add_tail(&trans->list, &ctx->net->nft.commit_list);
return 0;
-@@ -7916,11 +7920,10 @@ static int nf_tables_commit(struct net *
+@@ -7923,11 +7927,10 @@ static int nf_tables_commit(struct net *
switch (trans->msg_type) {
case NFT_MSG_NEWTABLE:
if (nft_trans_table_update(trans)) {
@@ -86,7 +86,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
} else {
nft_clear(net, trans->ctx.table);
}
-@@ -8133,11 +8136,9 @@ static int __nf_tables_abort(struct net
+@@ -8140,11 +8143,9 @@ static int __nf_tables_abort(struct net
switch (trans->msg_type) {
case NFT_MSG_NEWTABLE:
if (nft_trans_table_update(trans)) {
diff --git a/target/linux/generic/hack-5.10/221-module_exports.patch b/target/linux/generic/hack-5.10/221-module_exports.patch
index b5ddaf1c6d0118..8ca464e3b2c342 100644
--- a/target/linux/generic/hack-5.10/221-module_exports.patch
+++ b/target/linux/generic/hack-5.10/221-module_exports.patch
@@ -104,7 +104,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* note on .section use: we specify progbits since usage of the "M" (SHF_MERGE)
* section flag requires it. Use '%progbits' instead of '@progbits' since the
-@@ -42,7 +42,7 @@
+@@ -39,7 +45,7 @@
__ksymtab_\name:
__put \val, __kstrtab_\name
.previous
diff --git a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
index ffdfaf6c23c7bd..b56e780ea6dbc9 100644
--- a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+++ b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
@@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
/*
* Allocate a dst for local (unicast / anycast) address.
*/
-@@ -4929,7 +4959,8 @@ static int rtm_to_fib6_config(struct sk_
+@@ -4936,7 +4966,8 @@ static int rtm_to_fib6_config(struct sk_
if (rtm->rtm_type == RTN_UNREACHABLE ||
rtm->rtm_type == RTN_BLACKHOLE ||
rtm->rtm_type == RTN_PROHIBIT ||
@@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
-@@ -6128,6 +6159,8 @@ static int ip6_route_dev_notify(struct n
+@@ -6135,6 +6166,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
@@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
-@@ -6139,6 +6172,7 @@ static int ip6_route_dev_notify(struct n
+@@ -6146,6 +6179,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
@@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
-@@ -6330,6 +6364,8 @@ static int __net_init ip6_route_net_init
+@@ -6337,6 +6371,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
@@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
-@@ -6340,11 +6376,21 @@ static int __net_init ip6_route_net_init
+@@ -6347,11 +6383,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
@@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
-@@ -6371,6 +6417,8 @@ out:
+@@ -6378,6 +6424,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
@@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
-@@ -6390,6 +6438,7 @@ static void __net_exit ip6_route_net_exi
+@@ -6397,6 +6445,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
@@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-@@ -6467,6 +6516,9 @@ void __init ip6_route_init_special_entri
+@@ -6474,6 +6523,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
From ebfa1b93b76d5a2faacecbc8ed237ed44f5a7018 Mon Sep 17 00:00:00 2001
From: lean <coolsnowwolf@gmail.com>
Date: Thu, 21 Jul 2022 15:10:56 +0800
Subject: [PATCH 3/5] generic: fix swconfig_leds.c in 5.18
---
.../files/drivers/net/phy/swconfig_leds.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/target/linux/generic/files/drivers/net/phy/swconfig_leds.c b/target/linux/generic/files/drivers/net/phy/swconfig_leds.c
index df53e5cd4a21a6..95dbdb76fd3f38 100644
--- a/target/linux/generic/files/drivers/net/phy/swconfig_leds.c
+++ b/target/linux/generic/files/drivers/net/phy/swconfig_leds.c
@@ -85,7 +85,11 @@ swconfig_trig_update_port_mask(struct led_trigger *trigger)
sw_trig = (void *) trigger;
port_mask = 0;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(5, 15, 0)
+ spin_lock(&trigger->leddev_list_lock);
+#else
read_lock(&trigger->leddev_list_lock);
+#endif
list_for_each(entry, &trigger->led_cdevs) {
struct led_classdev *led_cdev;
struct swconfig_trig_data *trig_data;
@@ -98,8 +102,11 @@ swconfig_trig_update_port_mask(struct led_trigger *trigger)
read_unlock(&trig_data->lock);
}
}
+#if LINUX_VERSION_CODE > KERNEL_VERSION(5, 15, 0)
+ spin_unlock(&trigger->leddev_list_lock);
+#else
read_unlock(&trigger->leddev_list_lock);
-
+#endif
sw_trig->port_mask = port_mask;
if (port_mask)
@@ -418,14 +425,22 @@ swconfig_trig_update_leds(struct switch_led_trigger *sw_trig)
struct led_trigger *trigger;
trigger = &sw_trig->trig;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(5, 15, 0)
+ spin_lock(&trigger->leddev_list_lock);
+#else
read_lock(&trigger->leddev_list_lock);
+#endif
list_for_each(entry, &trigger->led_cdevs) {
struct led_classdev *led_cdev;
led_cdev = list_entry(entry, struct led_classdev, trig_list);
swconfig_trig_led_event(sw_trig, led_cdev);
}
+#if LINUX_VERSION_CODE > KERNEL_VERSION(5, 15, 0)
+ spin_unlock(&trigger->leddev_list_lock);
+#else
read_unlock(&trigger->leddev_list_lock);
+#endif
}
static void
From cdad02d028141097926fac303bdf606baa5bea5b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=AA=B7=E9=AB=85=E5=A4=B4?=
<74764072+DHDAXCW@users.noreply.github.com>
Date: Thu, 21 Jul 2022 16:12:52 +0800
Subject: [PATCH 4/5] uboot-rockchip:doornet2 detaches from evb rk (#9812)
* add CONFIG_TARGET_DOORNET2_RK3399=y
* uboot-rockchip:doornet2 out of evb rk patch
* uboot-rockchip:cancel doornet2 to use rkbin
* Update armv8.mk
* rockchip:add kernel5.15 rk3399-nanopi-r4se.dts
* rockchip:add kernel 5.18 rk3399-nanopi-r4se
---
package/boot/uboot-rockchip/Makefile | 1 -
...9-Add-support-for-EmbedFire-DoorNet2.patch | 3 +-
...-split-doornet2-rk3399-out-of-evb_rk.patch | 696 ++++++++++++++++++
.../boot/dts/rockchip/rk3399-nanopi-r4se.dts | 144 ++++
.../boot/dts/rockchip/rk3399-nanopi-r4se.dts | 144 ++++
target/linux/rockchip/image/armv8.mk | 2 +-
6 files changed, 987 insertions(+), 3 deletions(-)
create mode 100644 package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch
create mode 100644 target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
create mode 100644 target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index 7b1686bed5ee6f..140d6e37234fec 100644
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -90,7 +90,6 @@ define U-Boot/doornet2-rk3399
DEPENDS:=+PACKAGE_u-boot-doornet2-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
- USE_RKBIN:=1
endef
define U-Boot/guangmiao-g4c-rk3399
diff --git a/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch b/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
index 05b510e24b99bf..e5ac061119e0a7 100644
--- a/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
+++ b/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
@@ -916,7 +916,7 @@
+
--- /dev/null
+++ b/configs/doornet2-rk3399_defconfig
-@@ -0,0 +1,65 @@
+@@ -0,0 +1,66 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
@@ -924,6 +924,7 @@
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
++CONFIG_TARGET_DOORNET2_RK3399=y
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-doornet2"
diff --git a/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch b/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch
new file mode 100644
index 00000000000000..4b74d36e2afdf7
--- /dev/null
+++ b/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch
@@ -0,0 +1,696 @@
+--- a/arch/arm/mach-rockchip/rk3399/Kconfig
++++ b/arch/arm/mach-rockchip/rk3399/Kconfig
+@@ -109,6 +109,21 @@ config TARGET_ROC_PC_RK3399
+ * wide voltage input(5V-15V), dual cell battery
+ * Wifi/BT accessible via expansion board M.2
+
++config TARGET_DOORNET2_RK3399
++ bool "EmbedFire DoorNet2 board"
++ help
++ DoorNet2 is SBC produced by EmbedFire. Key features:
++
++ * Rockchip RK3399
++ * 1-4GB DDR3 or LPDDR4
++ * SD card slot and 8-32GB eMMC
++ * Gigabit ethernet
++ * PCIe
++ * USB 3.0, 2.0
++ * USB Type C power
++ * GPIO expansion ports
++ * USB 2.0 Wifi module
++
+ endchoice
+
+ config ROCKCHIP_BOOT_MODE_REG
+@@ -151,6 +166,7 @@ config SYS_BOOTCOUNT_ADDR
+
+ endif # BOOTCOUNT_LIMIT
+
++source "board/embedfire/doornet2/Kconfig"
+ source "board/firefly/roc-pc-rk3399/Kconfig"
+ source "board/google/gru/Kconfig"
+ source "board/pine64/pinebook-pro-rk3399/Kconfig"
+--- /dev/null
++++ b/board/embedfire/doornet2/Kconfig
+@@ -0,0 +1,15 @@
++if TARGET_DOORNET2_RK3399
++
++config SYS_BOARD
++ default "doornet2"
++
++config SYS_VENDOR
++ default "embedfire"
++
++config SYS_CONFIG_NAME
++ default "doornet2"
++
++config BOARD_SPECIFIC_OPTIONS
++ def_bool y
++
++endif
+--- /dev/null
++++ b/board/embedfire/doornet2/Makefile
+@@ -0,0 +1,6 @@
++#
++# SPDX-License-Identifier: GPL-2.0+
++#
++
++obj-y += doornet2.o hwrev.o
++
+--- /dev/null
++++ b/board/embedfire/doornet2/doornet2.c
+@@ -0,0 +1,146 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include <common.h>
++#include <dm.h>
++#include <env.h>
++#include <hash.h>
++#include <linux/bitops.h>
++#include <i2c.h>
++#include <init.h>
++#include <net.h>
++#include <netdev.h>
++#include <syscon.h>
++#include <asm/arch-rockchip/bootrom.h>
++#include <asm/arch-rockchip/clock.h>
++#include <asm/arch-rockchip/grf_rk3399.h>
++#include <asm/arch-rockchip/hardware.h>
++#include <asm/arch-rockchip/misc.h>
++#include <asm/io.h>
++#include <asm/setup.h>
++#include <u-boot/sha256.h>
++#include "hwrev.h"
++
++#ifdef CONFIG_MISC_INIT_R
++static void setup_iodomain(void)
++{
++ struct rk3399_grf_regs *grf =
++ syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
++
++ /* BT565 and AUDIO is in 1.8v domain */
++ rk_setreg(&grf->io_vsel, BIT(0) | BIT(1));
++}
++
++static int __maybe_unused mac_read_from_generic_eeprom(u8 *addr)
++{
++ struct udevice *i2c_dev;
++ int ret;
++
++ /* Microchip 24AA02xxx EEPROMs with EUI-48 Node Identity */
++ ret = i2c_get_chip_for_busnum(2, 0x51, 1, &i2c_dev);
++ if (!ret)
++ ret = dm_i2c_read(i2c_dev, 0xfa, addr, 6);
++
++ return ret;
++}
++
++static void setup_macaddr(void)
++{
++#if CONFIG_IS_ENABLED(CMD_NET)
++ int ret;
++ const char *cpuid = env_get("cpuid#");
++ u8 hash[SHA256_SUM_LEN];
++ int size = sizeof(hash);
++ u8 mac_addr[6];
++ int from_eeprom = 0;
++ int lockdown = 0;
++
++#ifndef CONFIG_ENV_IS_NOWHERE
++ lockdown = env_get_yesno("lockdown") == 1;
++#endif
++ if (lockdown && env_get("ethaddr"))
++ return;
++
++ ret = mac_read_from_generic_eeprom(mac_addr);
++ if (!ret && is_valid_ethaddr(mac_addr)) {
++ eth_env_set_enetaddr("ethaddr", mac_addr);
++ from_eeprom = 1;
++ }
++
++ if (!cpuid) {
++ debug("%s: could not retrieve 'cpuid#'\n", __func__);
++ return;
++ }
++
++ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
++ if (ret) {
++ debug("%s: failed to calculate SHA256\n", __func__);
++ return;
++ }
++
++ /* Copy 6 bytes of the hash to base the MAC address on */
++ memcpy(mac_addr, hash, 6);
++
++ /* Make this a valid MAC address and set it */
++ mac_addr[0] &= 0xfe; /* clear multicast bit */
++ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
++
++ if (from_eeprom) {
++ eth_env_set_enetaddr("eth1addr", mac_addr);
++ } else {
++ eth_env_set_enetaddr("ethaddr", mac_addr);
++
++ if (lockdown && env_get("eth1addr"))
++ return;
++
++ /* Ugly, copy another 4 bytes to generate a similar address */
++ memcpy(mac_addr + 2, hash + 8, 4);
++ if (!memcmp(hash + 2, hash + 8, 4))
++ mac_addr[5] ^= 0xff;
++
++ eth_env_set_enetaddr("eth1addr", mac_addr);
++ }
++#endif
++
++ return;
++}
++
++int misc_init_r(void)
++{
++ const u32 cpuid_offset = 0x7;
++ const u32 cpuid_length = 0x10;
++ u8 cpuid[cpuid_length];
++ int ret;
++
++ setup_iodomain();
++
++ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
++ if (ret)
++ return ret;
++
++ ret = rockchip_cpuid_set(cpuid, cpuid_length);
++ if (ret)
++ return ret;
++
++ setup_macaddr();
++ bd_hwrev_init();
++
++ return 0;
++}
++#endif
++
++#ifdef CONFIG_SERIAL_TAG
++void get_board_serial(struct tag_serialnr *serialnr)
++{
++ char *serial_string;
++ u64 serial = 0;
++
++ serial_string = env_get("serial#");
++
++ if (serial_string)
++ serial = simple_strtoull(serial_string, NULL, 16);
++
++ serialnr->high = (u32)(serial >> 32);
++ serialnr->low = (u32)(serial & 0xffffffff);
++}
++#endif
++
+--- /dev/null
++++ b/board/embedfire/doornet2/hwrev.c
+@@ -0,0 +1,171 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include <common.h>
++#include <dm.h>
++#include <linux/delay.h>
++#include <log.h>
++#include <asm/io.h>
++#include <asm/gpio.h>
++#include <asm/arch-rockchip/gpio.h>
++
++/*
++ * ID info:
++ * ID : Volts : ADC value : Bucket
++ * == ===== ========= ===========
++ * 0 : 0.102V: 58 : 0 - 81
++ * 1 : 0.211V: 120 : 82 - 150
++ * 2 : 0.319V: 181 : 151 - 211
++ * 3 : 0.427V: 242 : 212 - 274
++ * 4 : 0.542V: 307 : 275 - 342
++ * 5 : 0.666V: 378 : 343 - 411
++ * 6 : 0.781V: 444 : 412 - 477
++ * 7 : 0.900V: 511 : 478 - 545
++ * 8 : 1.023V: 581 : 546 - 613
++ * 9 : 1.137V: 646 : 614 - 675
++ * 10 : 1.240V: 704 : 676 - 733
++ * 11 : 1.343V: 763 : 734 - 795
++ * 12 : 1.457V: 828 : 796 - 861
++ * 13 : 1.576V: 895 : 862 - 925
++ * 14 : 1.684V: 956 : 926 - 989
++ * 15 : 1.800V: 1023 : 990 - 1023
++ */
++static const int id_readings[] = {
++ 81, 150, 211, 274, 342, 411, 477, 545,
++ 613, 675, 733, 795, 861, 925, 989, 1023
++};
++
++static int cached_board_id = -1;
++
++#define SARADC_BASE 0xFF100000
++#define SARADC_DATA (SARADC_BASE + 0)
++#define SARADC_CTRL (SARADC_BASE + 8)
++
++static u32 get_saradc_value(int chn)
++{
++ int timeout = 0;
++ u32 adc_value = 0;
++
++ writel(0, SARADC_CTRL);
++ udelay(2);
++
++ writel(0x28 | chn, SARADC_CTRL);
++ udelay(50);
++
++ timeout = 0;
++ do {
++ if (readl(SARADC_CTRL) & 0x40) {
++ adc_value = readl(SARADC_DATA) & 0x3FF;
++ goto stop_adc;
++ }
++
++ udelay(10);
++ } while (timeout++ < 100);
++
++stop_adc:
++ writel(0, SARADC_CTRL);
++
++ return adc_value;
++}
++
++static uint32_t get_adc_index(int chn)
++{
++ int i;
++ int adc_reading;
++
++ if (cached_board_id != -1)
++ return cached_board_id;
++
++ adc_reading = get_saradc_value(chn);
++ for (i = 0; i < ARRAY_SIZE(id_readings); i++) {
++ if (adc_reading <= id_readings[i]) {
++ debug("ADC reading %d, ID %d\n", adc_reading, i);
++ cached_board_id = i;
++ return i;
++ }
++ }
++
++ /* should die for impossible value */
++ return 0;
++}
++
++/*
++ * Extended by ADC_IN4
++ * 0x06 - SOC-RK3399
++ * 0x09 - DoorNet2 DDR3
++ * 0x0a - DoorNet2 LPDDR4
++ */
++static int pcb_rev = -1;
++
++void bd_hwrev_init(void)
++{
++#define GPIO4_BASE 0xff790000
++ struct rockchip_gpio_regs *regs = (void *)GPIO4_BASE;
++
++#ifdef CONFIG_SPL_BUILD
++ struct udevice *dev;
++
++ if (uclass_get_device_by_driver(UCLASS_CLK,
++ DM_DRIVER_GET(clk_rk3399), &dev))
++ return;
++#endif
++
++ if (pcb_rev >= 0)
++ return;
++
++ /* D1, D0: input mode */
++ clrbits_le32(®s->swport_ddr, (0x3 << 24));
++ pcb_rev = (readl(®s->ext_port) >> 24) & 0x3;
++
++ if (pcb_rev == 0x3) {
++ /* Revision group A: 0x04 ~ 0x13 */
++ pcb_rev = 0x4 + get_adc_index(4);
++
++ } else if (pcb_rev == 0x1) {
++ int idx = get_adc_index(4);
++
++ /* Revision group B: 0x21 ~ 0x2f */
++ if (idx > 0) {
++ pcb_rev = 0x20 + idx;
++ }
++ }
++}
++
++#ifdef CONFIG_SPL_BUILD
++static struct board_ddrtype {
++ int rev;
++ const char *type;
++} ddrtypes[] = {
++ { 0x00, "lpddr3-samsung-4GB-1866" },
++ { 0x01, "lpddr3-samsung-4GB-1866" },
++ { 0x04, "ddr3-1866" },
++ { 0x06, "ddr3-1866" },
++ { 0x07, "lpddr4-100" },
++ { 0x09, "ddr3-1866" },
++ { 0x0a, "lpddr4-100" },
++ { 0x21, "lpddr4-100" },
++ { 0x22, "ddr3-1866" },
++};
++
++const char *rk3399_get_ddrtype(void) {
++ int i;
++
++ bd_hwrev_init();
++ printf("Board: rev%02x\n", pcb_rev);
++
++ for (i = 0; i < ARRAY_SIZE(ddrtypes); i++) {
++ if (ddrtypes[i].rev == pcb_rev)
++ return ddrtypes[i].type;
++ }
++
++ /* fallback to first subnode (ie, first included dtsi) */
++ return NULL;
++}
++#endif
++
++/* To override __weak symbols */
++u32 get_board_rev(void)
++{
++ return pcb_rev;
++}
++
++
+--- /dev/null
++++ b/board/embedfire/doornet2/MAINTAINERS
+@@ -0,0 +1,5 @@
++DoorNet2 Series
++M: embedfire <support@embedfire.com>
++S: Maintained
++F: board/embedfire/doornet2/
++F: include/configs/doornet2.h
+--- /dev/null
++++ b/board/embedfire/doornet2/hwrev.h
+@@ -0,0 +1,25 @@
++/*
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, you can access it online at
++ * http://www.gnu.org/licenses/gpl-2.0.html.
++ */
++
++#ifndef __BD_HW_REV_H__
++#define __BD_HW_REV_H__
++
++extern void bd_hwrev_config_gpio(void);
++extern void bd_hwrev_init(void);
++extern u32 get_board_rev(void);
++
++#endif /* __BD_HW_REV_H__ */
++
+--- a/drivers/clk/rockchip/clk_rk3399.c
++++ b/drivers/clk/rockchip/clk_rk3399.c
+@@ -1372,6 +1372,8 @@ static void rkclk_init(struct rockchip_c
+ pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
+ hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
+ HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
++
++ rk3399_saradc_set_clk(cru, 1000000);
+ }
+
+ static int rk3399_clk_probe(struct udevice *dev)
+--- /dev/null
++++ b/include/configs/doornet2.h
+@@ -0,0 +1,25 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * Copyright (C) Guangzhou FriendlyELEC Computer Tech. Co., Ltd.
++ * (http://www.friendlyarm.com)
++ *
++ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
++ */
++
++#ifndef __CONFIG_DOORNET2_H__
++#define __CONFIG_DOORNET2_H__
++
++#define ROCKCHIP_DEVICE_SETTINGS \
++ "stdin=serial,usbkbd\0" \
++ "stdout=serial,vidconsole\0" \
++ "stderr=serial,vidconsole\0"
++
++#include <configs/rk3399_common.h>
++
++#define SDRAM_BANK_SIZE (2UL << 30)
++
++#define CONFIG_SERIAL_TAG
++#define CONFIG_REVISION_TAG
++
++#endif
++
+--- a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
++++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
+@@ -4,7 +4,9 @@
+ */
+
+ &dmc {
+- rockchip,sdram-params = <
++ ddr3-1333 {
++ u-boot,dm-pre-reloc;
++ rockchip,sdram-params = <
+ 0x1
+ 0xa
+ 0x3
+@@ -1536,5 +1538,5 @@
+ 0x01010000
+ 0x00000000
+ >;
++ };
+ };
+-
+--- a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
++++ b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
+@@ -4,7 +4,9 @@
+ */
+
+ &dmc {
+- rockchip,sdram-params = <
++ ddr3-1600 {
++ u-boot,dm-pre-reloc;
++ rockchip,sdram-params = <
+ 0x1
+ 0xa
+ 0x3
+@@ -1536,4 +1538,5 @@
+ 0x01010000
+ 0x00000000
+ >;
++ };
+ };
+--- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
++++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
+@@ -4,7 +4,9 @@
+ */
+
+ &dmc {
+- rockchip,sdram-params = <
++ ddr3-1866 {
++ u-boot,dm-pre-reloc;
++ rockchip,sdram-params = <
+ 0x1
+ 0xa
+ 0x3
+@@ -1536,5 +1538,5 @@
+ 0x01010000
+ 0x00000000
+ >;
++ };
+ };
+-
+--- a/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
++++ b/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
+@@ -5,6 +5,8 @@
+ */
+
+ &dmc {
++ lpddr3-2GB-1600 {
++ u-boot,dm-pre-reloc;
+ rockchip,sdram-params = <
+ 0x1
+ 0xa
+@@ -1537,4 +1539,5 @@
+ 0x01010000
+ 0x00000000
+ >;
++ };
+ };
+--- a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
++++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
+@@ -4,6 +4,8 @@
+ */
+
+ &dmc {
++ lpddr3-4GB-1600 {
++ u-boot,dm-pre-reloc;
+ rockchip,sdram-params = <
+ 0x2
+ 0xa
+@@ -1536,4 +1538,5 @@
+ 0x01010000
+ 0x00000000
+ >;
++ };
+ };
+--- a/arch/arm/dts/rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi
++++ b/arch/arm/dts/rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi
+@@ -4,6 +4,8 @@
+ */
+
+ &dmc {
++ lpddr3-samsung-4GB-1866 {
++ u-boot,dm-pre-reloc;
+ rockchip,sdram-params = <
+ 0x2
+ 0xa
+@@ -1543,4 +1545,5 @@
+ 0x01010000 /* DENALI_PHY_957_DATA */
+ 0x00000000 /* DENALI_PHY_958_DATA */
+ >;
++ };
+ };
+--- a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
++++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
+@@ -6,6 +6,8 @@
+ */
+
+ &dmc {
++ lpddr4-100 {
++ u-boot,dm-pre-reloc;
+ rockchip,sdram-params = <
+ 0x2
+ 0xa
+@@ -1538,4 +1540,5 @@
+ 0x01010000
+ 0x00000000
+ >;
++ };
+ };
+--- a/drivers/ram/rockchip/sdram_rk3399.c
++++ b/drivers/ram/rockchip/sdram_rk3399.c
+@@ -1625,7 +1625,6 @@ static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride)
+ rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10, stride << 10);
+ }
+
+-#if !defined(CONFIG_RAM_RK3399_LPDDR4)
+ static int data_training_first(struct dram_info *dram, u32 channel, u8 rank,
+ struct rk3399_sdram_params *params)
+ {
+@@ -1715,8 +1714,8 @@ void modify_param(const struct chan_info *chan,
+ clrsetbits_le32(&denali_pi_params[76], 0x1 << 24, 0x1 << 24);
+ clrsetbits_le32(&denali_pi_params[77], 0x1, 0x1);
+ }
+-#else
+
++#if defined(CONFIG_RAM_RK3399_LPDDR4)
+ struct rk3399_sdram_params dfs_cfgs_lpddr4[] = {
+ #include "sdram-rk3399-lpddr4-400.inc"
+ #include "sdram-rk3399-lpddr4-800.inc"
+@@ -3011,22 +3010,43 @@ static int sdram_init(struct dram_info *dram,
+ return 0;
+ }
+
++__weak const char *rk3399_get_ddrtype(void)
++{
++ return NULL;
++}
++
+ static int rk3399_dmc_of_to_plat(struct udevice *dev)
+ {
+ struct rockchip_dmc_plat *plat = dev_get_plat(dev);
++ ofnode node = { .np = NULL };
++ const char *name;
+ int ret;
+
+ if (!CONFIG_IS_ENABLED(OF_REAL))
+ return 0;
+
+- ret = dev_read_u32_array(dev, "rockchip,sdram-params",
+- (u32 *)&plat->sdram_params,
+- sizeof(plat->sdram_params) / sizeof(u32));
++ name = rk3399_get_ddrtype();
++ if (name)
++ node = dev_read_subnode(dev, name);
++ if (!ofnode_valid(node)) {
++ debug("Failed to read subnode %s\n", name);
++ node = dev_read_first_subnode(dev);
++ }
++
++ /* fallback to current node */
++ if (!ofnode_valid(node))
++ node = dev_ofnode(dev);
++
++ ret = ofnode_read_u32_array(node, "rockchip,sdram-params",
++ (u32 *)&plat->sdram_params,
++ sizeof(plat->sdram_params) / sizeof(u32));
++
+ if (ret) {
+ printf("%s: Cannot read rockchip,sdram-params %d\n",
+ __func__, ret);
+ return ret;
+ }
++
+ ret = regmap_init_mem(dev_ofnode(dev), &plat->map);
+ if (ret)
+ printf("%s: regmap failed %d\n", __func__, ret);
+@@ -3051,18 +3071,21 @@ static int conv_of_plat(struct udevice *dev)
+ #endif
+
+ static const struct sdram_rk3399_ops rk3399_ops = {
+-#if !defined(CONFIG_RAM_RK3399_LPDDR4)
++
+ .data_training_first = data_training_first,
+ .set_rate_index = switch_to_phy_index1,
+ .modify_param = modify_param,
+ .get_phy_index_params = get_phy_index_params,
+-#else
++};
++
++#if defined(CONFIG_RAM_RK3399_LPDDR4)
++static const struct sdram_rk3399_ops lpddr4_ops = {
+ .data_training_first = lpddr4_mr_detect,
+ .set_rate_index = lpddr4_set_rate,
+ .modify_param = lpddr4_modify_param,
+- .get_phy_index_params = lpddr4_get_phy_index_params,
+-#endif
++ .get_phy_index_params = lpddr4_get_phy_index_params,
+ };
++#endif
+
+ static int rk3399_dmc_init(struct udevice *dev)
+ {
+@@ -3081,7 +3104,17 @@ static int rk3399_dmc_init(struct udevice *dev)
+ return ret;
+ #endif
+
+- priv->ops = &rk3399_ops;
++ if (params->base.dramtype == LPDDR4) {
++#if defined(CONFIG_RAM_RK3399_LPDDR4)
++ priv->ops = &lpddr4_ops;
++#else
++ printf("LPDDR4 support is disable\n");
++ return -EINVAL;
++#endif
++ } else {
++ priv->ops = &rk3399_ops;
++ }
++
+ priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC);
+ priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
diff --git a/target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts b/target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
new file mode 100644
index 00000000000000..737d15e1400851
--- /dev/null
+++ b/target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPC-T4 board device tree source
+ *
+ * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ *
+ * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
+ * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com>
+ * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com>
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi4.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R4SE";
+ compatible = "friendlyarm,nanopi-r4se", "rockchip,rk3399";
+
+ /delete-node/ display-subsystem;
+
+ gpio-leds {
+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
+
+ /delete-node/ led-0;
+
+ lan_led: led-lan {
+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
+ label = "green:lan";
+ };
+
+ sys_led: led-sys {
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ label = "red:power";
+ default-state = "on";
+ };
+
+ wan_led: led-wan {
+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
+ label = "green:wan";
+ };
+ };
+
+ gpio-keys {
+ pinctrl-0 = <&reset_button_pin>;
+
+ /delete-node/ power;
+
+ reset {
+ debounce-interval = <50>;
+ gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&i2c2 {
+ eeprom@51 {
+ compatible = "microchip,24c02", "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ read-only; /* This holds our MAC */
+ };
+};
+
+&i2c4 {
+ status = "disabled";
+};
+
+&pcie0 {
+ max-link-speed = <1>;
+ num-lanes = <1>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+};
+
+&pinctrl {
+ gpio-leds {
+ /delete-node/ status-led-pin;
+
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rockchip-key {
+ /delete-node/ power-key;
+
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&sdio0 {
+ status = "disabled";
+};
+
+&u2phy0_host {
+ phy-supply = <&vdd_5v>;
+};
+
+&u2phy1_host {
+ status = "disabled";
+};
+
+&uart0 {
+ status = "disabled";
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "host";
+};
+
+&vcc3v3_sys {
+ vin-supply = <&vcc5v0_sys>;
+};
diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
new file mode 100644
index 00000000000000..737d15e1400851
--- /dev/null
+++ b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPC-T4 board device tree source
+ *
+ * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ *
+ * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
+ * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com>
+ * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com>
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi4.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R4SE";
+ compatible = "friendlyarm,nanopi-r4se", "rockchip,rk3399";
+
+ /delete-node/ display-subsystem;
+
+ gpio-leds {
+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
+
+ /delete-node/ led-0;
+
+ lan_led: led-lan {
+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
+ label = "green:lan";
+ };
+
+ sys_led: led-sys {
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ label = "red:power";
+ default-state = "on";
+ };
+
+ wan_led: led-wan {
+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
+ label = "green:wan";
+ };
+ };
+
+ gpio-keys {
+ pinctrl-0 = <&reset_button_pin>;
+
+ /delete-node/ power;
+
+ reset {
+ debounce-interval = <50>;
+ gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&i2c2 {
+ eeprom@51 {
+ compatible = "microchip,24c02", "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ read-only; /* This holds our MAC */
+ };
+};
+
+&i2c4 {
+ status = "disabled";
+};
+
+&pcie0 {
+ max-link-speed = <1>;
+ num-lanes = <1>;
+ vpcie3v3-supply = <&vcc3v3_sys>;
+};
+
+&pinctrl {
+ gpio-leds {
+ /delete-node/ status-led-pin;
+
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rockchip-key {
+ /delete-node/ power-key;
+
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&sdio0 {
+ status = "disabled";
+};
+
+&u2phy0_host {
+ phy-supply = <&vdd_5v>;
+};
+
+&u2phy1_host {
+ status = "disabled";
+};
+
+&uart0 {
+ status = "disabled";
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "host";
+};
+
+&vcc3v3_sys {
+ vin-supply = <&vcc5v0_sys>;
+};
diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index 298242c35952b8..3e37279832ec2d 100644
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -17,7 +17,7 @@ define Device/embedfire_doornet2
DEVICE_MODEL := DoorNet2
SOC := rk3399
UBOOT_DEVICE_NAME := doornet2-rk3399
- IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-bin | gzip | append-metadata
+ IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-img | gzip | append-metadata
DEVICE_PACKAGES := kmod-r8168 -urngd
endef
TARGET_DEVICES += embedfire_doornet2
From 7af074fd1d373e03e090f178b497706c7c72e925 Mon Sep 17 00:00:00 2001
From: lean <coolsnowwolf@gmail.com>
Date: Thu, 21 Jul 2022 16:58:40 +0800
Subject: [PATCH 5/5] Revert "uboot-rockchip:doornet2 detaches from evb rk
(#9812)"
This reverts commit cdad02d028141097926fac303bdf606baa5bea5b.
---
package/boot/uboot-rockchip/Makefile | 1 +
...9-Add-support-for-EmbedFire-DoorNet2.patch | 3 +-
...-split-doornet2-rk3399-out-of-evb_rk.patch | 696 ------------------
.../boot/dts/rockchip/rk3399-nanopi-r4se.dts | 144 ----
.../boot/dts/rockchip/rk3399-nanopi-r4se.dts | 144 ----
target/linux/rockchip/image/armv8.mk | 2 +-
6 files changed, 3 insertions(+), 987 deletions(-)
delete mode 100644 package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch
delete mode 100644 target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
delete mode 100644 target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index 140d6e37234fec..7b1686bed5ee6f 100644
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -90,6 +90,7 @@ define U-Boot/doornet2-rk3399
DEPENDS:=+PACKAGE_u-boot-doornet2-rk3399:arm-trusted-firmware-rk3399
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3399_bl31_v1.35.elf
+ USE_RKBIN:=1
endef
define U-Boot/guangmiao-g4c-rk3399
diff --git a/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch b/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
index e5ac061119e0a7..05b510e24b99bf 100644
--- a/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
+++ b/package/boot/uboot-rockchip/patches/303-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
@@ -916,7 +916,7 @@
+
--- /dev/null
+++ b/configs/doornet2-rk3399_defconfig
-@@ -0,0 +1,66 @@
+@@ -0,0 +1,65 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
@@ -924,7 +924,6 @@
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
-+CONFIG_TARGET_DOORNET2_RK3399=y
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-doornet2"
diff --git a/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch b/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch
deleted file mode 100644
index 4b74d36e2afdf7..00000000000000
--- a/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-split-doornet2-rk3399-out-of-evb_rk.patch
+++ /dev/null
@@ -1,696 +0,0 @@
---- a/arch/arm/mach-rockchip/rk3399/Kconfig
-+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
-@@ -109,6 +109,21 @@ config TARGET_ROC_PC_RK3399
- * wide voltage input(5V-15V), dual cell battery
- * Wifi/BT accessible via expansion board M.2
-
-+config TARGET_DOORNET2_RK3399
-+ bool "EmbedFire DoorNet2 board"
-+ help
-+ DoorNet2 is SBC produced by EmbedFire. Key features:
-+
-+ * Rockchip RK3399
-+ * 1-4GB DDR3 or LPDDR4
-+ * SD card slot and 8-32GB eMMC
-+ * Gigabit ethernet
-+ * PCIe
-+ * USB 3.0, 2.0
-+ * USB Type C power
-+ * GPIO expansion ports
-+ * USB 2.0 Wifi module
-+
- endchoice
-
- config ROCKCHIP_BOOT_MODE_REG
-@@ -151,6 +166,7 @@ config SYS_BOOTCOUNT_ADDR
-
- endif # BOOTCOUNT_LIMIT
-
-+source "board/embedfire/doornet2/Kconfig"
- source "board/firefly/roc-pc-rk3399/Kconfig"
- source "board/google/gru/Kconfig"
- source "board/pine64/pinebook-pro-rk3399/Kconfig"
---- /dev/null
-+++ b/board/embedfire/doornet2/Kconfig
-@@ -0,0 +1,15 @@
-+if TARGET_DOORNET2_RK3399
-+
-+config SYS_BOARD
-+ default "doornet2"
-+
-+config SYS_VENDOR
-+ default "embedfire"
-+
-+config SYS_CONFIG_NAME
-+ default "doornet2"
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+
-+endif
---- /dev/null
-+++ b/board/embedfire/doornet2/Makefile
-@@ -0,0 +1,6 @@
-+#
-+# SPDX-License-Identifier: GPL-2.0+
-+#
-+
-+obj-y += doornet2.o hwrev.o
-+
---- /dev/null
-+++ b/board/embedfire/doornet2/doornet2.c
-@@ -0,0 +1,146 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+
-+#include <common.h>
-+#include <dm.h>
-+#include <env.h>
-+#include <hash.h>
-+#include <linux/bitops.h>
-+#include <i2c.h>
-+#include <init.h>
-+#include <net.h>
-+#include <netdev.h>
-+#include <syscon.h>
-+#include <asm/arch-rockchip/bootrom.h>
-+#include <asm/arch-rockchip/clock.h>
-+#include <asm/arch-rockchip/grf_rk3399.h>
-+#include <asm/arch-rockchip/hardware.h>
-+#include <asm/arch-rockchip/misc.h>
-+#include <asm/io.h>
-+#include <asm/setup.h>
-+#include <u-boot/sha256.h>
-+#include "hwrev.h"
-+
-+#ifdef CONFIG_MISC_INIT_R
-+static void setup_iodomain(void)
-+{
-+ struct rk3399_grf_regs *grf =
-+ syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-+
-+ /* BT565 and AUDIO is in 1.8v domain */
-+ rk_setreg(&grf->io_vsel, BIT(0) | BIT(1));
-+}
-+
-+static int __maybe_unused mac_read_from_generic_eeprom(u8 *addr)
-+{
-+ struct udevice *i2c_dev;
-+ int ret;
-+
-+ /* Microchip 24AA02xxx EEPROMs with EUI-48 Node Identity */
-+ ret = i2c_get_chip_for_busnum(2, 0x51, 1, &i2c_dev);
-+ if (!ret)
-+ ret = dm_i2c_read(i2c_dev, 0xfa, addr, 6);
-+
-+ return ret;
-+}
-+
-+static void setup_macaddr(void)
-+{
-+#if CONFIG_IS_ENABLED(CMD_NET)
-+ int ret;
-+ const char *cpuid = env_get("cpuid#");
-+ u8 hash[SHA256_SUM_LEN];
-+ int size = sizeof(hash);
-+ u8 mac_addr[6];
-+ int from_eeprom = 0;
-+ int lockdown = 0;
-+
-+#ifndef CONFIG_ENV_IS_NOWHERE
-+ lockdown = env_get_yesno("lockdown") == 1;
-+#endif
-+ if (lockdown && env_get("ethaddr"))
-+ return;
-+
-+ ret = mac_read_from_generic_eeprom(mac_addr);
-+ if (!ret && is_valid_ethaddr(mac_addr)) {
-+ eth_env_set_enetaddr("ethaddr", mac_addr);
-+ from_eeprom = 1;
-+ }
-+
-+ if (!cpuid) {
-+ debug("%s: could not retrieve 'cpuid#'\n", __func__);
-+ return;
-+ }
-+
-+ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
-+ if (ret) {
-+ debug("%s: failed to calculate SHA256\n", __func__);
-+ return;
-+ }
-+
-+ /* Copy 6 bytes of the hash to base the MAC address on */
-+ memcpy(mac_addr, hash, 6);
-+
-+ /* Make this a valid MAC address and set it */
-+ mac_addr[0] &= 0xfe; /* clear multicast bit */
-+ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
-+
-+ if (from_eeprom) {
-+ eth_env_set_enetaddr("eth1addr", mac_addr);
-+ } else {
-+ eth_env_set_enetaddr("ethaddr", mac_addr);
-+
-+ if (lockdown && env_get("eth1addr"))
-+ return;
-+
-+ /* Ugly, copy another 4 bytes to generate a similar address */
-+ memcpy(mac_addr + 2, hash + 8, 4);
-+ if (!memcmp(hash + 2, hash + 8, 4))
-+ mac_addr[5] ^= 0xff;
-+
-+ eth_env_set_enetaddr("eth1addr", mac_addr);
-+ }
-+#endif
-+
-+ return;
-+}
-+
-+int misc_init_r(void)
-+{
-+ const u32 cpuid_offset = 0x7;
-+ const u32 cpuid_length = 0x10;
-+ u8 cpuid[cpuid_length];
-+ int ret;
-+
-+ setup_iodomain();
-+
-+ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
-+ if (ret)
-+ return ret;
-+
-+ ret = rockchip_cpuid_set(cpuid, cpuid_length);
-+ if (ret)
-+ return ret;
-+
-+ setup_macaddr();
-+ bd_hwrev_init();
-+
-+ return 0;
-+}
-+#endif
-+
-+#ifdef CONFIG_SERIAL_TAG
-+void get_board_serial(struct tag_serialnr *serialnr)
-+{
-+ char *serial_string;
-+ u64 serial = 0;
-+
-+ serial_string = env_get("serial#");
-+
-+ if (serial_string)
-+ serial = simple_strtoull(serial_string, NULL, 16);
-+
-+ serialnr->high = (u32)(serial >> 32);
-+ serialnr->low = (u32)(serial & 0xffffffff);
-+}
-+#endif
-+
---- /dev/null
-+++ b/board/embedfire/doornet2/hwrev.c
-@@ -0,0 +1,171 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+
-+#include <common.h>
-+#include <dm.h>
-+#include <linux/delay.h>
-+#include <log.h>
-+#include <asm/io.h>
-+#include <asm/gpio.h>
-+#include <asm/arch-rockchip/gpio.h>
-+
-+/*
-+ * ID info:
-+ * ID : Volts : ADC value : Bucket
-+ * == ===== ========= ===========
-+ * 0 : 0.102V: 58 : 0 - 81
-+ * 1 : 0.211V: 120 : 82 - 150
-+ * 2 : 0.319V: 181 : 151 - 211
-+ * 3 : 0.427V: 242 : 212 - 274
-+ * 4 : 0.542V: 307 : 275 - 342
-+ * 5 : 0.666V: 378 : 343 - 411
-+ * 6 : 0.781V: 444 : 412 - 477
-+ * 7 : 0.900V: 511 : 478 - 545
-+ * 8 : 1.023V: 581 : 546 - 613
-+ * 9 : 1.137V: 646 : 614 - 675
-+ * 10 : 1.240V: 704 : 676 - 733
-+ * 11 : 1.343V: 763 : 734 - 795
-+ * 12 : 1.457V: 828 : 796 - 861
-+ * 13 : 1.576V: 895 : 862 - 925
-+ * 14 : 1.684V: 956 : 926 - 989
-+ * 15 : 1.800V: 1023 : 990 - 1023
-+ */
-+static const int id_readings[] = {
-+ 81, 150, 211, 274, 342, 411, 477, 545,
-+ 613, 675, 733, 795, 861, 925, 989, 1023
-+};
-+
-+static int cached_board_id = -1;
-+
-+#define SARADC_BASE 0xFF100000
-+#define SARADC_DATA (SARADC_BASE + 0)
-+#define SARADC_CTRL (SARADC_BASE + 8)
-+
-+static u32 get_saradc_value(int chn)
-+{
-+ int timeout = 0;
-+ u32 adc_value = 0;
-+
-+ writel(0, SARADC_CTRL);
-+ udelay(2);
-+
-+ writel(0x28 | chn, SARADC_CTRL);
-+ udelay(50);
-+
-+ timeout = 0;
-+ do {
-+ if (readl(SARADC_CTRL) & 0x40) {
-+ adc_value = readl(SARADC_DATA) & 0x3FF;
-+ goto stop_adc;
-+ }
-+
-+ udelay(10);
-+ } while (timeout++ < 100);
-+
-+stop_adc:
-+ writel(0, SARADC_CTRL);
-+
-+ return adc_value;
-+}
-+
-+static uint32_t get_adc_index(int chn)
-+{
-+ int i;
-+ int adc_reading;
-+
-+ if (cached_board_id != -1)
-+ return cached_board_id;
-+
-+ adc_reading = get_saradc_value(chn);
-+ for (i = 0; i < ARRAY_SIZE(id_readings); i++) {
-+ if (adc_reading <= id_readings[i]) {
-+ debug("ADC reading %d, ID %d\n", adc_reading, i);
-+ cached_board_id = i;
-+ return i;
-+ }
-+ }
-+
-+ /* should die for impossible value */
-+ return 0;
-+}
-+
-+/*
-+ * Extended by ADC_IN4
-+ * 0x06 - SOC-RK3399
-+ * 0x09 - DoorNet2 DDR3
-+ * 0x0a - DoorNet2 LPDDR4
-+ */
-+static int pcb_rev = -1;
-+
-+void bd_hwrev_init(void)
-+{
-+#define GPIO4_BASE 0xff790000
-+ struct rockchip_gpio_regs *regs = (void *)GPIO4_BASE;
-+
-+#ifdef CONFIG_SPL_BUILD
-+ struct udevice *dev;
-+
-+ if (uclass_get_device_by_driver(UCLASS_CLK,
-+ DM_DRIVER_GET(clk_rk3399), &dev))
-+ return;
-+#endif
-+
-+ if (pcb_rev >= 0)
-+ return;
-+
-+ /* D1, D0: input mode */
-+ clrbits_le32(®s->swport_ddr, (0x3 << 24));
-+ pcb_rev = (readl(®s->ext_port) >> 24) & 0x3;
-+
-+ if (pcb_rev == 0x3) {
-+ /* Revision group A: 0x04 ~ 0x13 */
-+ pcb_rev = 0x4 + get_adc_index(4);
-+
-+ } else if (pcb_rev == 0x1) {
-+ int idx = get_adc_index(4);
-+
-+ /* Revision group B: 0x21 ~ 0x2f */
-+ if (idx > 0) {
-+ pcb_rev = 0x20 + idx;
-+ }
-+ }
-+}
-+
-+#ifdef CONFIG_SPL_BUILD
-+static struct board_ddrtype {
-+ int rev;
-+ const char *type;
-+} ddrtypes[] = {
-+ { 0x00, "lpddr3-samsung-4GB-1866" },
-+ { 0x01, "lpddr3-samsung-4GB-1866" },
-+ { 0x04, "ddr3-1866" },
-+ { 0x06, "ddr3-1866" },
-+ { 0x07, "lpddr4-100" },
-+ { 0x09, "ddr3-1866" },
-+ { 0x0a, "lpddr4-100" },
-+ { 0x21, "lpddr4-100" },
-+ { 0x22, "ddr3-1866" },
-+};
-+
-+const char *rk3399_get_ddrtype(void) {
-+ int i;
-+
-+ bd_hwrev_init();
-+ printf("Board: rev%02x\n", pcb_rev);
-+
-+ for (i = 0; i < ARRAY_SIZE(ddrtypes); i++) {
-+ if (ddrtypes[i].rev == pcb_rev)
-+ return ddrtypes[i].type;
-+ }
-+
-+ /* fallback to first subnode (ie, first included dtsi) */
-+ return NULL;
-+}
-+#endif
-+
-+/* To override __weak symbols */
-+u32 get_board_rev(void)
-+{
-+ return pcb_rev;
-+}
-+
-+
---- /dev/null
-+++ b/board/embedfire/doornet2/MAINTAINERS
-@@ -0,0 +1,5 @@
-+DoorNet2 Series
-+M: embedfire <support@embedfire.com>
-+S: Maintained
-+F: board/embedfire/doornet2/
-+F: include/configs/doornet2.h
---- /dev/null
-+++ b/board/embedfire/doornet2/hwrev.h
-@@ -0,0 +1,25 @@
-+/*
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, you can access it online at
-+ * http://www.gnu.org/licenses/gpl-2.0.html.
-+ */
-+
-+#ifndef __BD_HW_REV_H__
-+#define __BD_HW_REV_H__
-+
-+extern void bd_hwrev_config_gpio(void);
-+extern void bd_hwrev_init(void);
-+extern u32 get_board_rev(void);
-+
-+#endif /* __BD_HW_REV_H__ */
-+
---- a/drivers/clk/rockchip/clk_rk3399.c
-+++ b/drivers/clk/rockchip/clk_rk3399.c
-@@ -1372,6 +1372,8 @@ static void rkclk_init(struct rockchip_c
- pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
- hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
- HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
-+
-+ rk3399_saradc_set_clk(cru, 1000000);
- }
-
- static int rk3399_clk_probe(struct udevice *dev)
---- /dev/null
-+++ b/include/configs/doornet2.h
-@@ -0,0 +1,25 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright (C) Guangzhou FriendlyELEC Computer Tech. Co., Ltd.
-+ * (http://www.friendlyarm.com)
-+ *
-+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
-+ */
-+
-+#ifndef __CONFIG_DOORNET2_H__
-+#define __CONFIG_DOORNET2_H__
-+
-+#define ROCKCHIP_DEVICE_SETTINGS \
-+ "stdin=serial,usbkbd\0" \
-+ "stdout=serial,vidconsole\0" \
-+ "stderr=serial,vidconsole\0"
-+
-+#include <configs/rk3399_common.h>
-+
-+#define SDRAM_BANK_SIZE (2UL << 30)
-+
-+#define CONFIG_SERIAL_TAG
-+#define CONFIG_REVISION_TAG
-+
-+#endif
-+
---- a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
-+++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
-@@ -4,7 +4,9 @@
- */
-
- &dmc {
-- rockchip,sdram-params = <
-+ ddr3-1333 {
-+ u-boot,dm-pre-reloc;
-+ rockchip,sdram-params = <
- 0x1
- 0xa
- 0x3
-@@ -1536,5 +1538,5 @@
- 0x01010000
- 0x00000000
- >;
-+ };
- };
--
---- a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
-+++ b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
-@@ -4,7 +4,9 @@
- */
-
- &dmc {
-- rockchip,sdram-params = <
-+ ddr3-1600 {
-+ u-boot,dm-pre-reloc;
-+ rockchip,sdram-params = <
- 0x1
- 0xa
- 0x3
-@@ -1536,4 +1538,5 @@
- 0x01010000
- 0x00000000
- >;
-+ };
- };
---- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
-+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
-@@ -4,7 +4,9 @@
- */
-
- &dmc {
-- rockchip,sdram-params = <
-+ ddr3-1866 {
-+ u-boot,dm-pre-reloc;
-+ rockchip,sdram-params = <
- 0x1
- 0xa
- 0x3
-@@ -1536,5 +1538,5 @@
- 0x01010000
- 0x00000000
- >;
-+ };
- };
--
---- a/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
-+++ b/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
-@@ -5,6 +5,8 @@
- */
-
- &dmc {
-+ lpddr3-2GB-1600 {
-+ u-boot,dm-pre-reloc;
- rockchip,sdram-params = <
- 0x1
- 0xa
-@@ -1537,4 +1539,5 @@
- 0x01010000
- 0x00000000
- >;
-+ };
- };
---- a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
-+++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
-@@ -4,6 +4,8 @@
- */
-
- &dmc {
-+ lpddr3-4GB-1600 {
-+ u-boot,dm-pre-reloc;
- rockchip,sdram-params = <
- 0x2
- 0xa
-@@ -1536,4 +1538,5 @@
- 0x01010000
- 0x00000000
- >;
-+ };
- };
---- a/arch/arm/dts/rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi
-+++ b/arch/arm/dts/rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi
-@@ -4,6 +4,8 @@
- */
-
- &dmc {
-+ lpddr3-samsung-4GB-1866 {
-+ u-boot,dm-pre-reloc;
- rockchip,sdram-params = <
- 0x2
- 0xa
-@@ -1543,4 +1545,5 @@
- 0x01010000 /* DENALI_PHY_957_DATA */
- 0x00000000 /* DENALI_PHY_958_DATA */
- >;
-+ };
- };
---- a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
-+++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
-@@ -6,6 +6,8 @@
- */
-
- &dmc {
-+ lpddr4-100 {
-+ u-boot,dm-pre-reloc;
- rockchip,sdram-params = <
- 0x2
- 0xa
-@@ -1538,4 +1540,5 @@
- 0x01010000
- 0x00000000
- >;
-+ };
- };
---- a/drivers/ram/rockchip/sdram_rk3399.c
-+++ b/drivers/ram/rockchip/sdram_rk3399.c
-@@ -1625,7 +1625,6 @@ static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride)
- rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10, stride << 10);
- }
-
--#if !defined(CONFIG_RAM_RK3399_LPDDR4)
- static int data_training_first(struct dram_info *dram, u32 channel, u8 rank,
- struct rk3399_sdram_params *params)
- {
-@@ -1715,8 +1714,8 @@ void modify_param(const struct chan_info *chan,
- clrsetbits_le32(&denali_pi_params[76], 0x1 << 24, 0x1 << 24);
- clrsetbits_le32(&denali_pi_params[77], 0x1, 0x1);
- }
--#else
-
-+#if defined(CONFIG_RAM_RK3399_LPDDR4)
- struct rk3399_sdram_params dfs_cfgs_lpddr4[] = {
- #include "sdram-rk3399-lpddr4-400.inc"
- #include "sdram-rk3399-lpddr4-800.inc"
-@@ -3011,22 +3010,43 @@ static int sdram_init(struct dram_info *dram,
- return 0;
- }
-
-+__weak const char *rk3399_get_ddrtype(void)
-+{
-+ return NULL;
-+}
-+
- static int rk3399_dmc_of_to_plat(struct udevice *dev)
- {
- struct rockchip_dmc_plat *plat = dev_get_plat(dev);
-+ ofnode node = { .np = NULL };
-+ const char *name;
- int ret;
-
- if (!CONFIG_IS_ENABLED(OF_REAL))
- return 0;
-
-- ret = dev_read_u32_array(dev, "rockchip,sdram-params",
-- (u32 *)&plat->sdram_params,
-- sizeof(plat->sdram_params) / sizeof(u32));
-+ name = rk3399_get_ddrtype();
-+ if (name)
-+ node = dev_read_subnode(dev, name);
-+ if (!ofnode_valid(node)) {
-+ debug("Failed to read subnode %s\n", name);
-+ node = dev_read_first_subnode(dev);
-+ }
-+
-+ /* fallback to current node */
-+ if (!ofnode_valid(node))
-+ node = dev_ofnode(dev);
-+
-+ ret = ofnode_read_u32_array(node, "rockchip,sdram-params",
-+ (u32 *)&plat->sdram_params,
-+ sizeof(plat->sdram_params) / sizeof(u32));
-+
- if (ret) {
- printf("%s: Cannot read rockchip,sdram-params %d\n",
- __func__, ret);
- return ret;
- }
-+
- ret = regmap_init_mem(dev_ofnode(dev), &plat->map);
- if (ret)
- printf("%s: regmap failed %d\n", __func__, ret);
-@@ -3051,18 +3071,21 @@ static int conv_of_plat(struct udevice *dev)
- #endif
-
- static const struct sdram_rk3399_ops rk3399_ops = {
--#if !defined(CONFIG_RAM_RK3399_LPDDR4)
-+
- .data_training_first = data_training_first,
- .set_rate_index = switch_to_phy_index1,
- .modify_param = modify_param,
- .get_phy_index_params = get_phy_index_params,
--#else
-+};
-+
-+#if defined(CONFIG_RAM_RK3399_LPDDR4)
-+static const struct sdram_rk3399_ops lpddr4_ops = {
- .data_training_first = lpddr4_mr_detect,
- .set_rate_index = lpddr4_set_rate,
- .modify_param = lpddr4_modify_param,
-- .get_phy_index_params = lpddr4_get_phy_index_params,
--#endif
-+ .get_phy_index_params = lpddr4_get_phy_index_params,
- };
-+#endif
-
- static int rk3399_dmc_init(struct udevice *dev)
- {
-@@ -3081,7 +3104,17 @@ static int rk3399_dmc_init(struct udevice *dev)
- return ret;
- #endif
-
-- priv->ops = &rk3399_ops;
-+ if (params->base.dramtype == LPDDR4) {
-+#if defined(CONFIG_RAM_RK3399_LPDDR4)
-+ priv->ops = &lpddr4_ops;
-+#else
-+ printf("LPDDR4 support is disable\n");
-+ return -EINVAL;
-+#endif
-+ } else {
-+ priv->ops = &rk3399_ops;
-+ }
-+
- priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC);
- priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
- priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
diff --git a/target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts b/target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
deleted file mode 100644
index 737d15e1400851..00000000000000
--- a/target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
+++ /dev/null
@@ -1,144 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * FriendlyElec NanoPC-T4 board device tree source
- *
- * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2018 Collabora Ltd.
- *
- * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
- * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com>
- * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3399-nanopi4.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi R4SE";
- compatible = "friendlyarm,nanopi-r4se", "rockchip,rk3399";
-
- /delete-node/ display-subsystem;
-
- gpio-leds {
- pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
-
- /delete-node/ led-0;
-
- lan_led: led-lan {
- gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
- label = "green:lan";
- };
-
- sys_led: led-sys {
- gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- label = "red:power";
- default-state = "on";
- };
-
- wan_led: led-wan {
- gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
- label = "green:wan";
- };
- };
-
- gpio-keys {
- pinctrl-0 = <&reset_button_pin>;
-
- /delete-node/ power;
-
- reset {
- debounce-interval = <50>;
- gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
- label = "reset";
- linux,code = <KEY_RESTART>;
- };
- };
-
- vdd_5v: vdd-5v {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&i2c2 {
- eeprom@51 {
- compatible = "microchip,24c02", "atmel,24c02";
- reg = <0x51>;
- pagesize = <16>;
- read-only; /* This holds our MAC */
- };
-};
-
-&i2c4 {
- status = "disabled";
-};
-
-&pcie0 {
- max-link-speed = <1>;
- num-lanes = <1>;
- vpcie3v3-supply = <&vcc3v3_sys>;
-};
-
-&pinctrl {
- gpio-leds {
- /delete-node/ status-led-pin;
-
- lan_led_pin: lan-led-pin {
- rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sys_led_pin: sys-led-pin {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wan_led_pin: wan-led-pin {
- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rockchip-key {
- /delete-node/ power-key;
-
- reset_button_pin: reset-button-pin {
- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&sdio0 {
- status = "disabled";
-};
-
-&u2phy0_host {
- phy-supply = <&vdd_5v>;
-};
-
-&u2phy1_host {
- status = "disabled";
-};
-
-&uart0 {
- status = "disabled";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "host";
-};
-
-&vcc3v3_sys {
- vin-supply = <&vcc5v0_sys>;
-};
diff --git a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts b/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
deleted file mode 100644
index 737d15e1400851..00000000000000
--- a/target/linux/rockchip/files-5.18/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4se.dts
+++ /dev/null
@@ -1,144 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * FriendlyElec NanoPC-T4 board device tree source
- *
- * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2018 Collabora Ltd.
- *
- * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
- * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com>
- * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3399-nanopi4.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi R4SE";
- compatible = "friendlyarm,nanopi-r4se", "rockchip,rk3399";
-
- /delete-node/ display-subsystem;
-
- gpio-leds {
- pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
-
- /delete-node/ led-0;
-
- lan_led: led-lan {
- gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
- label = "green:lan";
- };
-
- sys_led: led-sys {
- gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- label = "red:power";
- default-state = "on";
- };
-
- wan_led: led-wan {
- gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
- label = "green:wan";
- };
- };
-
- gpio-keys {
- pinctrl-0 = <&reset_button_pin>;
-
- /delete-node/ power;
-
- reset {
- debounce-interval = <50>;
- gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
- label = "reset";
- linux,code = <KEY_RESTART>;
- };
- };
-
- vdd_5v: vdd-5v {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&i2c2 {
- eeprom@51 {
- compatible = "microchip,24c02", "atmel,24c02";
- reg = <0x51>;
- pagesize = <16>;
- read-only; /* This holds our MAC */
- };
-};
-
-&i2c4 {
- status = "disabled";
-};
-
-&pcie0 {
- max-link-speed = <1>;
- num-lanes = <1>;
- vpcie3v3-supply = <&vcc3v3_sys>;
-};
-
-&pinctrl {
- gpio-leds {
- /delete-node/ status-led-pin;
-
- lan_led_pin: lan-led-pin {
- rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sys_led_pin: sys-led-pin {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wan_led_pin: wan-led-pin {
- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rockchip-key {
- /delete-node/ power-key;
-
- reset_button_pin: reset-button-pin {
- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&sdio0 {
- status = "disabled";
-};
-
-&u2phy0_host {
- phy-supply = <&vdd_5v>;
-};
-
-&u2phy1_host {
- status = "disabled";
-};
-
-&uart0 {
- status = "disabled";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "host";
-};
-
-&vcc3v3_sys {
- vin-supply = <&vcc5v0_sys>;
-};
diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index 3e37279832ec2d..298242c35952b8 100644
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -17,7 +17,7 @@ define Device/embedfire_doornet2
DEVICE_MODEL := DoorNet2
SOC := rk3399
UBOOT_DEVICE_NAME := doornet2-rk3399
- IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-img | gzip | append-metadata
+ IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-bin | gzip | append-metadata
DEVICE_PACKAGES := kmod-r8168 -urngd
endef
TARGET_DEVICES += embedfire_doornet2