diff --git a/drivers/chibios/i2c_master.c b/drivers/chibios/i2c_master.c index 4bd8e2af7624..fc4bb2ab3701 100644 --- a/drivers/chibios/i2c_master.c +++ b/drivers/chibios/i2c_master.c @@ -58,18 +58,23 @@ static i2c_status_t chibios_to_qmk(const msg_t* status) { } __attribute__((weak)) void i2c_init(void) { - // Try releasing special pins for a short time - palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT); - palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT); + static bool is_initialised = false; + if (!is_initialised) { + is_initialised = true; - chThdSleepMilliseconds(10); + // Try releasing special pins for a short time + palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT); + palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT); + + chThdSleepMilliseconds(10); #if defined(USE_GPIOV1) - palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, I2C1_SCL_PAL_MODE); - palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, I2C1_SDA_PAL_MODE); + palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, I2C1_SCL_PAL_MODE); + palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, I2C1_SDA_PAL_MODE); #else - palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); - palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); + palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); + palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); #endif + } } i2c_status_t i2c_start(uint8_t address) { diff --git a/drivers/chibios/spi_master.c b/drivers/chibios/spi_master.c index 552ac663c1e9..5aa60742e326 100644 --- a/drivers/chibios/spi_master.c +++ b/drivers/chibios/spi_master.c @@ -22,21 +22,26 @@ static pin_t currentSlavePin = NO_PIN; static SPIConfig spiConfig = {false, NULL, 0, 0, 0, 0}; __attribute__((weak)) void spi_init(void) { - // Try releasing special pins for a short time - palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_INPUT); - palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_INPUT); - palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_INPUT); + static bool is_initialised = false; + if (!is_initialised) { + is_initialised = true; - chThdSleepMilliseconds(10); + // Try releasing special pins for a short time + palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_INPUT); + palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_INPUT); + palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_INPUT); + + chThdSleepMilliseconds(10); #if defined(USE_GPIOV1) - palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); - palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); - palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); + palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); + palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); + palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); #else - palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); - palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); - palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); #endif + } } bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { diff --git a/drivers/eeprom/eeprom_i2c.c b/drivers/eeprom/eeprom_i2c.c index ca8af3da51a4..4210f06f9f9a 100644 --- a/drivers/eeprom/eeprom_i2c.c +++ b/drivers/eeprom/eeprom_i2c.c @@ -42,14 +42,6 @@ # include "debug.h" #endif // DEBUG_EEPROM_OUTPUT -static inline void init_i2c_if_required(void) { - static int done = 0; - if (!done) { - i2c_init(); - done = 1; - } -} - static inline void fill_target_address(uint8_t *buffer, const void *addr) { uintptr_t p = (uintptr_t)addr; for (int i = 0; i < EXTERNAL_EEPROM_ADDRESS_SIZE; ++i) { @@ -58,7 +50,7 @@ static inline void fill_target_address(uint8_t *buffer, const void *addr) { } } -void eeprom_driver_init(void) {} +void eeprom_driver_init(void) { i2c_init(); } void eeprom_driver_erase(void) { #if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) @@ -80,7 +72,6 @@ void eeprom_read_block(void *buf, const void *addr, size_t len) { uint8_t complete_packet[EXTERNAL_EEPROM_ADDRESS_SIZE]; fill_target_address(complete_packet, addr); - init_i2c_if_required(); i2c_transmit(EXTERNAL_EEPROM_I2C_ADDRESS((uintptr_t)addr), complete_packet, EXTERNAL_EEPROM_ADDRESS_SIZE, 100); i2c_receive(EXTERNAL_EEPROM_I2C_ADDRESS((uintptr_t)addr), buf, len, 100); @@ -98,7 +89,6 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) { uint8_t * read_buf = (uint8_t *)buf; uintptr_t target_addr = (uintptr_t)addr; - init_i2c_if_required(); while (len > 0) { uintptr_t page_offset = target_addr % EXTERNAL_EEPROM_PAGE_SIZE; int write_length = EXTERNAL_EEPROM_PAGE_SIZE - page_offset; diff --git a/drivers/eeprom/eeprom_spi.c b/drivers/eeprom/eeprom_spi.c index 7b6416eafbf4..182731d82f10 100644 --- a/drivers/eeprom/eeprom_spi.c +++ b/drivers/eeprom/eeprom_spi.c @@ -55,14 +55,6 @@ # include "debug.h" #endif // CONSOLE_ENABLE -static void init_spi_if_required(void) { - static int done = 0; - if (!done) { - spi_init(); - done = 1; - } -} - static bool spi_eeprom_start(void) { return spi_start(EXTERNAL_EEPROM_SPI_SLAVE_SELECT_PIN, EXTERNAL_EEPROM_SPI_LSBFIRST, EXTERNAL_EEPROM_SPI_MODE, EXTERNAL_EEPROM_SPI_CLOCK_DIVISOR); } static spi_status_t spi_eeprom_wait_while_busy(int timeout) { @@ -91,7 +83,7 @@ static void spi_eeprom_transmit_address(uintptr_t addr) { //---------------------------------------------------------------------------------------------------------------------- -void eeprom_driver_init(void) {} +void eeprom_driver_init(void) { spi_init(); } void eeprom_driver_erase(void) { #if defined(CONSOLE_ENABLE) && defined(DEBUG_EEPROM_OUTPUT) @@ -110,8 +102,6 @@ void eeprom_driver_erase(void) { } void eeprom_read_block(void *buf, const void *addr, size_t len) { - init_spi_if_required(); - //------------------------------------------------- // Wait for the write-in-progress bit to be cleared bool res = spi_eeprom_start(); @@ -154,8 +144,6 @@ void eeprom_read_block(void *buf, const void *addr, size_t len) { } void eeprom_write_block(const void *buf, void *addr, size_t len) { - init_spi_if_required(); - bool res; uint8_t * read_buf = (uint8_t *)buf; uintptr_t target_addr = (uintptr_t)addr; diff --git a/tmk_core/protocol/chibios/main.c b/tmk_core/protocol/chibios/main.c index a0d28f9afc08..efe6b07d6f56 100644 --- a/tmk_core/protocol/chibios/main.c +++ b/tmk_core/protocol/chibios/main.c @@ -54,6 +54,9 @@ #ifdef STM32_EEPROM_ENABLE # include "eeprom_stm32.h" #endif +#ifdef EEPROM_DRIVER +# include "eeprom_driver.h" +#endif #include "suspend.h" #include "wait.h" @@ -150,6 +153,9 @@ int main(void) { #ifdef STM32_EEPROM_ENABLE EEPROM_Init(); #endif +#ifdef EEPROM_DRIVER + eeprom_driver_init(); +#endif // TESTING // chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);