From 2bb577fc30b5554c8b6e1b4ffcb33e21414a5a54 Mon Sep 17 00:00:00 2001
From: David Lechner <david@pybricks.com>
Date: Mon, 1 Feb 2021 18:00:03 -0600
Subject: [PATCH] platform/technic_hub: don't zero clk_init

We are initialling all fields, so this doesn't do anything useful.
---
 lib/pbio/platform/technic_hub/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/pbio/platform/technic_hub/platform.c b/lib/pbio/platform/technic_hub/platform.c
index e49296e6d..24064327a 100644
--- a/lib/pbio/platform/technic_hub/platform.c
+++ b/lib/pbio/platform/technic_hub/platform.c
@@ -482,7 +482,7 @@ void SystemInit(void) {
 
     HAL_RCC_OscConfig(&osc_init);
 
-    RCC_ClkInitTypeDef clk_init = { 0 };
+    RCC_ClkInitTypeDef clk_init;
     clk_init.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
     clk_init.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
     clk_init.AHBCLKDivider = RCC_SYSCLK_DIV1;  // HCLK 80MHz