Core, Core2, CoreS3 port follow Up

[bmorcelli]

Explanation

Por to these devices had been poorly made, using the same M5Launcher port, but in the case of Bruce theres a necessity to release memory to leave room for other libraries.

Issue

Actually These devices are running without PSRAM support due IRAM limitation,
error section .text will not fit in region iram1_0_seg followed by more error messagens, it happens because all functions of M5GFX are being mapped into the lib crowding the Instruction table

It happens when I use these build_flags:

-DBOARD_HAS_PSRAM
-mfix-esp32-psram-cache-issue	
-mfix-esp32-psram-cache-strategy=memw

Solutions 1:

use -DPIO_FRAMEWORK_ARDUINO_MMU_CACHE16_IRAM48 reducing Cache to leave room for more IRAM, but Cache can compromise fw performance

Solution 2:

• Remodelate M5Unified to discover AXP model, depending on the board, to not use M5GFX support functions and lib.
  • Find out how M5 detects and decides which chip and driver use: Here
  • Find Chip model for Core, Core2 and CoreS3 devices to act accordingly: Probably Here
  • Find the difference between AXP192 and AXP2101 (same 0x34 I2C address for both, AXP192 responds 0x03 when asking on 0x03 register and AXP2101 responds 0x4A to this same register: HERE and IP5306 power management chips
  • Is there difference between touchscreen libs for these models?
  • Do the same for Mic and Speaker Classes

• M5GFX autodetect function were made to diferentiate between all boards of m5Stack, maybe remake it to check the difference between these devices (and check all variants) might be easy, because there won't be needed to check TFT models and responses, due to already have this information.

• M5 I2C Addresses for all devices HERE

• make fast checks over the I2C bus of peripherals and make the decisions for Power_Class, Touch_Class, Mic_Class and Speaker_Class and start them accordingly

[bmorcelli]

Better solution is use M5GFX with these devices.. need to redraw the icons for these devices..

[bmorcelli]

Changed M5GFX function calls to match with tft_eSPI and fixed -90° start of fillArc functions.. now drawings are working properly..

PSRAM is still turned off on Core Devices due to IRAM overflow error..

Trial and error:

• limited IR lib functions to allow only the ones we use... Didn't change anything about the problem

• Remapped all IRAN_ATTR (less then 10 functions in libraries) functions to DRAM.. no change

[bmorcelli]

Switched all Core Devices to M5Unified and M5GFX.

M5GFX: added functions overflowed to match the TFT_eSPI functions and achieve similar results

Next steps: Add parameter on M5.begin(desiredBoars) to build the code with only the desired board functions, to avoid linking innumerous unnecessary functions (such as other Power chip, TFT drivers, touch panels, Speaker drivers and etc...)

[bmorcelli]

Switched Core2 to a modified M5Core2.h lib, to use the TFT_eSPI from Bruce, releasing IRAM and enabling all functions available.

Still needs some polishing