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drm/amd/swsmu: add aldebaran smu13 ip support (v3)
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Add initial swSMU support.

v1: add smu13 ip support for aldebaran asic (Kevin/Kenneth)
v2: switch to thm/mp v13_0 ip headers (Hawking)
v3: squash in updates (Alex)

Signed-off-by: Kevin Wang <[email protected]>
Signed-off-by: Kenneth Feng <[email protected]>
Reviewed-by: Kenneth Feng <[email protected]>
Signed-off-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Kevin Wang authored and alexdeucher committed Mar 24, 2021
1 parent 465c437 commit c05d1c4
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Showing 12 changed files with 3,797 additions and 5 deletions.
1 change: 1 addition & 0 deletions drivers/gpu/drm/amd/pm/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@ subdir-ccflags-y += \
-I$(FULL_AMD_PATH)/pm/swsmu \
-I$(FULL_AMD_PATH)/pm/swsmu/smu11 \
-I$(FULL_AMD_PATH)/pm/swsmu/smu12 \
-I$(FULL_AMD_PATH)/pm/swsmu/smu13 \
-I$(FULL_AMD_PATH)/pm/powerplay \
-I$(FULL_AMD_PATH)/pm/powerplay/smumgr\
-I$(FULL_AMD_PATH)/pm/powerplay/hwmgr
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109 changes: 109 additions & 0 deletions drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,109 @@
/*
* Copyright 2020 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/

#ifndef ALDEBARAN_PP_SMC_H
#define ALDEBARAN_PP_SMC_H

#pragma pack(push, 1)

// SMU Response Codes:
#define PPSMC_Result_OK 0x1
#define PPSMC_Result_Failed 0xFF
#define PPSMC_Result_UnknownCmd 0xFE
#define PPSMC_Result_CmdRejectedPrereq 0xFD
#define PPSMC_Result_CmdRejectedBusy 0xFC

// Message Definitions:
#define PPSMC_MSG_TestMessage 0x1
#define PPSMC_MSG_GetSmuVersion 0x2
#define PPSMC_MSG_Mode1Reset 0x3
#define PPSMC_MSG_GetDriverIfVersion 0x4
#define PPSMC_MSG_spare1 0x5
#define PPSMC_MSG_spare2 0x6
#define PPSMC_MSG_EnableAllSmuFeatures 0x7
#define PPSMC_MSG_DisableAllSmuFeatures 0x8
#define PPSMC_MSG_spare3 0x9
#define PPSMC_MSG_spare4 0xA
#define PPSMC_MSG_spare5 0xB
#define PPSMC_MSG_spare6 0xC
#define PPSMC_MSG_GetEnabledSmuFeaturesLow 0xD
#define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xE
#define PPSMC_MSG_SetDriverDramAddrHigh 0xF
#define PPSMC_MSG_SetDriverDramAddrLow 0x10
#define PPSMC_MSG_SetToolsDramAddrHigh 0x11
#define PPSMC_MSG_SetToolsDramAddrLow 0x12
#define PPSMC_MSG_TransferTableSmu2Dram 0x13
#define PPSMC_MSG_TransferTableDram2Smu 0x14
#define PPSMC_MSG_UseDefaultPPTable 0x15
#define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x16
#define PPSMC_MSG_SetSystemVirtualDramAddrLow 0x17
#define PPSMC_MSG_SetSoftMinByFreq 0x18
#define PPSMC_MSG_SetSoftMaxByFreq 0x19
#define PPSMC_MSG_SetHardMinByFreq 0x1A
#define PPSMC_MSG_SetHardMaxByFreq 0x1B
#define PPSMC_MSG_GetMinDpmFreq 0x1C
#define PPSMC_MSG_GetMaxDpmFreq 0x1D
#define PPSMC_MSG_GetDpmFreqByIndex 0x1E
#define PPSMC_MSG_SetWorkloadMask 0x1F
#define PPSMC_MSG_GetVoltageByDpm 0x20
#define PPSMC_MSG_GetVoltageByDpmOverdrive 0x21
#define PPSMC_MSG_SetPptLimit 0x22
#define PPSMC_MSG_GetPptLimit 0x23
#define PPSMC_MSG_PrepareMp1ForUnload 0x24
#define PPSMC_MSG_PrepareMp1ForReset 0x25
#define PPSMC_MSG_SoftReset 0x26
#define PPSMC_MSG_RunDcBtc 0x27
#define PPSMC_MSG_DramLogSetDramAddrHigh 0x28
#define PPSMC_MSG_DramLogSetDramAddrLow 0x29
#define PPSMC_MSG_DramLogSetDramSize 0x2A
#define PPSMC_MSG_GetDebugData 0x2B
#define PPSMC_MSG_WaflTest 0x2C
#define PPSMC_MSG_spare7 0x2D
#define PPSMC_MSG_SetMemoryChannelEnable 0x2E
#define PPSMC_MSG_SetNumBadHbmPagesRetired 0x2F
#define PPSMC_MSG_DFCstateControl 0x32
#define PPSMC_MSG_GetGmiPwrDnHyst 0x33
#define PPSMC_MSG_SetGmiPwrDnHyst 0x34
#define PPSMC_MSG_GmiPwrDnControl 0x35
#define PPSMC_MSG_EnterGfxoff 0x36
#define PPSMC_MSG_ExitGfxoff 0x37
#define PPSMC_MSG_SetExecuteDMATest 0x38
#define PPSMC_MSG_EnableDeterminism 0x39
#define PPSMC_MSG_DisableDeterminism 0x3A
#define PPSMC_MSG_SetUclkDpmMode 0x3B

#define PPSMC_Message_Count 0x3C

typedef enum {
GFXOFF_ERROR_NO_ERROR,
GFXOFF_ERROR_DISALLOWED,
GFXOFF_ERROR_GFX_BUSY,
GFXOFF_ERROR_GFX_OFF,
GFXOFF_ERROR_GFX_ON,
} GFXOFF_ERROR_e;

typedef uint32_t PPSMC_Result;
typedef uint32_t PPSMC_Msg;
#pragma pack(pop)

#endif
1 change: 1 addition & 0 deletions drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
Original file line number Diff line number Diff line change
Expand Up @@ -1286,6 +1286,7 @@ extern const struct amd_ip_funcs smu_ip_funcs;

extern const struct amdgpu_ip_block_version smu_v11_0_ip_block;
extern const struct amdgpu_ip_block_version smu_v12_0_ip_block;
extern const struct amdgpu_ip_block_version smu_v13_0_ip_block;

bool is_support_sw_smu(struct amdgpu_device *adev);
bool is_support_cclk_dpm(struct amdgpu_device *adev);
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27 changes: 23 additions & 4 deletions drivers/gpu/drm/amd/pm/inc/smu_types.h
Original file line number Diff line number Diff line change
Expand Up @@ -168,9 +168,16 @@
__SMU_DUMMY_MAP(PowerGateAtHub), \
__SMU_DUMMY_MAP(SetSoftMinJpeg), \
__SMU_DUMMY_MAP(SetHardMinFclkByFreq), \
__SMU_DUMMY_MAP(DFCstateControl), \
__SMU_DUMMY_MAP(GmiPwrDnControl), \
__SMU_DUMMY_MAP(DAL_DISABLE_DUMMY_PSTATE_CHANGE),\
__SMU_DUMMY_MAP(DFCstateControl), \
__SMU_DUMMY_MAP(GmiPwrDnControl), \
__SMU_DUMMY_MAP(spare), \
__SMU_DUMMY_MAP(SetNumBadHbmPagesRetired), \
__SMU_DUMMY_MAP(GetGmiPwrDnHyst), \
__SMU_DUMMY_MAP(SetGmiPwrDnHyst), \
__SMU_DUMMY_MAP(EnterGfxoff), \
__SMU_DUMMY_MAP(ExitGfxoff), \
__SMU_DUMMY_MAP(SetExecuteDMATest), \
__SMU_DUMMY_MAP(DAL_DISABLE_DUMMY_PSTATE_CHANGE), \
__SMU_DUMMY_MAP(DAL_ENABLE_DUMMY_PSTATE_CHANGE), \
__SMU_DUMMY_MAP(SET_DRIVER_DUMMY_TABLE_DRAM_ADDR_HIGH), \
__SMU_DUMMY_MAP(SET_DRIVER_DUMMY_TABLE_DRAM_ADDR_LOW), \
Expand Down Expand Up @@ -214,6 +221,9 @@
__SMU_DUMMY_MAP(SetSlowPPTLimit), \
__SMU_DUMMY_MAP(GetFastPPTLimit), \
__SMU_DUMMY_MAP(GetSlowPPTLimit), \
__SMU_DUMMY_MAP(EnableDeterminism), \
__SMU_DUMMY_MAP(DisableDeterminism), \
__SMU_DUMMY_MAP(SetUclkDpmMode), \

#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
Expand All @@ -239,6 +249,7 @@ enum smu_clk_type {
SMU_SCLK,
SMU_MCLK,
SMU_PCIE,
SMU_LCLK,
SMU_OD_CCLK,
SMU_OD_SCLK,
SMU_OD_MCLK,
Expand All @@ -255,6 +266,7 @@ enum smu_clk_type {
__SMU_DUMMY_MAP(DPM_SOCCLK), \
__SMU_DUMMY_MAP(DPM_UVD), \
__SMU_DUMMY_MAP(DPM_VCE), \
__SMU_DUMMY_MAP(DPM_LCLK), \
__SMU_DUMMY_MAP(ULV), \
__SMU_DUMMY_MAP(DPM_MP0CLK), \
__SMU_DUMMY_MAP(DPM_LINK), \
Expand Down Expand Up @@ -283,6 +295,7 @@ enum smu_clk_type {
__SMU_DUMMY_MAP(DS_MP1CLK), \
__SMU_DUMMY_MAP(DS_MP0CLK), \
__SMU_DUMMY_MAP(XGMI), \
__SMU_DUMMY_MAP(XGMI_PER_LINK_PWR_DWN), \
__SMU_DUMMY_MAP(DPM_GFX_PACE), \
__SMU_DUMMY_MAP(MEM_VDDCI_SCALING), \
__SMU_DUMMY_MAP(MEM_MVDD_SCALING), \
Expand All @@ -304,6 +317,7 @@ enum smu_clk_type {
__SMU_DUMMY_MAP(MMHUB_PG), \
__SMU_DUMMY_MAP(ATHUB_PG), \
__SMU_DUMMY_MAP(APCC_DFLL), \
__SMU_DUMMY_MAP(DF_CSTATE), \
__SMU_DUMMY_MAP(DPM_GFX_GPO), \
__SMU_DUMMY_MAP(WAFL_CG), \
__SMU_DUMMY_MAP(CCLK_DPM), \
Expand Down Expand Up @@ -335,7 +349,12 @@ enum smu_clk_type {
__SMU_DUMMY_MAP(ISP_DPM), \
__SMU_DUMMY_MAP(A55_DPM), \
__SMU_DUMMY_MAP(CVIP_DSP_DPM), \
__SMU_DUMMY_MAP(MSMU_LOW_POWER),
__SMU_DUMMY_MAP(MSMU_LOW_POWER), \
__SMU_DUMMY_MAP(FUSE_CG), \
__SMU_DUMMY_MAP(MP1_CG), \
__SMU_DUMMY_MAP(SMUIO_CG), \
__SMU_DUMMY_MAP(THM_CG), \
__SMU_DUMMY_MAP(CLK_CG), \

#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(feature) SMU_FEATURE_##feature##_BIT
Expand Down
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