-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathm32c-dis.c
1311 lines (1200 loc) · 45.6 KB
/
m32c-dis.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't
Copyright (C) 1996-2016 Free Software Foundation, Inc.
This file is part of libopcodes.
This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
#include "dis-asm.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
#include "m32c-desc.h"
#include "m32c-opc.h"
#include "opintl.h"
/* Default text to print if an instruction isn't recognized. */
#define UNKNOWN_INSN_MSG _("*unknown*")
static void print_normal
(CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
static void print_address
(CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
static void print_keyword
(CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
static void print_insn_normal
(CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
static int print_insn
(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
static int default_print_insn
(CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
static int read_insn
(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
unsigned long *);
/* -- disassembler routines inserted here. */
/* -- dis.c */
#include "elf/m32c.h"
#include "elf-bfd.h"
/* Always print the short insn format suffix as ':<char>'. */
static void
print_suffix (void * dis_info, char suffix)
{
disassemble_info *info = dis_info;
(*info->fprintf_func) (info->stream, ":%c", suffix);
}
static void
print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
print_suffix (dis_info, 's');
}
static void
print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
print_suffix (dis_info, 'g');
}
static void
print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
print_suffix (dis_info, 'q');
}
static void
print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
print_suffix (dis_info, 'z');
}
/* Print the empty suffix. */
static void
print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
return;
}
static void
print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = dis_info;
if (value == 0)
(*info->fprintf_func) (info->stream, "r0h,r0l");
else
(*info->fprintf_func) (info->stream, "r0l,r0h");
}
static void
print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
unsigned long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = dis_info;
(*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
}
static void
print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
signed long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = dis_info;
(*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
}
static void
print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
/* Always print the size as '.w'. */
disassemble_info *info = dis_info;
(*info->fprintf_func) (info->stream, ".w");
}
#define POP 0
#define PUSH 1
static void print_pop_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
/* Print a set of registers, R0,R1,A0,A1,SB,FB. */
static void
print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED,
int push)
{
static char * m16c_register_names [] =
{
"r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
};
disassemble_info *info = dis_info;
int mask;
int reg_index = 0;
char* comma = "";
if (push)
mask = 0x80;
else
mask = 1;
if (value & mask)
{
(*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
comma = ",";
}
for (reg_index = 1; reg_index <= 7; ++reg_index)
{
if (push)
mask >>= 1;
else
mask <<= 1;
if (value & mask)
{
(*info->fprintf_func) (info->stream, "%s%s", comma,
m16c_register_names [reg_index]);
comma = ",";
}
}
}
static void
print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
print_regset (cd, dis_info, value, attrs, pc, length, POP);
}
static void
print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
}
static void
print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
signed long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = dis_info;
(*info->fprintf_func) (info->stream, "%ld", -value);
}
void m32c_cgen_print_operand
(CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
/* Main entry point for printing operands.
XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
of dis-asm.h on cgen.h.
This function is basically just a big switch statement. Earlier versions
used tables to look up the function to use, but
- if the table contains both assembler and disassembler functions then
the disassembler contains much of the assembler and vice-versa,
- there's a lot of inlining possibilities as things grow,
- using a switch statement avoids the function call overhead.
This function could be moved into `print_insn_normal', but keeping it
separate makes clear the interface between `print_insn_normal' and each of
the handlers. */
void
m32c_cgen_print_operand (CGEN_CPU_DESC cd,
int opindex,
void * xinfo,
CGEN_FIELDS *fields,
void const *attrs ATTRIBUTE_UNUSED,
bfd_vma pc,
int length)
{
disassemble_info *info = (disassemble_info *) xinfo;
switch (opindex)
{
case M32C_OPERAND_A0 :
print_keyword (cd, info, & m32c_cgen_opval_h_a0, 0, 0);
break;
case M32C_OPERAND_A1 :
print_keyword (cd, info, & m32c_cgen_opval_h_a1, 0, 0);
break;
case M32C_OPERAND_AN16_PUSH_S :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_4_1, 0);
break;
case M32C_OPERAND_BIT16AN :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
break;
case M32C_OPERAND_BIT16RN :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
break;
case M32C_OPERAND_BIT3_S :
print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BIT32ANPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
break;
case M32C_OPERAND_BIT32ANUNPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
break;
case M32C_OPERAND_BIT32RNPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
break;
case M32C_OPERAND_BIT32RNUNPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
break;
case M32C_OPERAND_BITBASE16_16_S8 :
print_signed_bitbase (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_BITBASE16_16_U16 :
print_unsigned_bitbase (cd, info, fields->f_dsp_16_u16, 0, pc, length);
break;
case M32C_OPERAND_BITBASE16_16_U8 :
print_unsigned_bitbase (cd, info, fields->f_dsp_16_u8, 0, pc, length);
break;
case M32C_OPERAND_BITBASE16_8_U11_S :
print_unsigned_bitbase (cd, info, fields->f_bitbase16_u11_S, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
print_signed_bitbase (cd, info, fields->f_bitbase32_16_s11_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
print_signed_bitbase (cd, info, fields->f_bitbase32_16_s19_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u11_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u19_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u27_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
print_signed_bitbase (cd, info, fields->f_bitbase32_24_s11_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
print_signed_bitbase (cd, info, fields->f_bitbase32_24_s19_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u11_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u19_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u27_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_BITNO16R :
print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
break;
case M32C_OPERAND_BITNO32PREFIXED :
print_normal (cd, info, fields->f_bitno32_prefixed, 0, pc, length);
break;
case M32C_OPERAND_BITNO32UNPREFIXED :
print_normal (cd, info, fields->f_bitno32_unprefixed, 0, pc, length);
break;
case M32C_OPERAND_DSP_10_U6 :
print_normal (cd, info, fields->f_dsp_10_u6, 0, pc, length);
break;
case M32C_OPERAND_DSP_16_S16 :
print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_16_S8 :
print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_16_U16 :
print_normal (cd, info, fields->f_dsp_16_u16, 0, pc, length);
break;
case M32C_OPERAND_DSP_16_U20 :
print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_16_U24 :
print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_16_U8 :
print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
break;
case M32C_OPERAND_DSP_24_S16 :
print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_24_S8 :
print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_24_U16 :
print_normal (cd, info, fields->f_dsp_24_u16, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_24_U20 :
print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_24_U24 :
print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_24_U8 :
print_normal (cd, info, fields->f_dsp_24_u8, 0, pc, length);
break;
case M32C_OPERAND_DSP_32_S16 :
print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_32_S8 :
print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_32_U16 :
print_normal (cd, info, fields->f_dsp_32_u16, 0, pc, length);
break;
case M32C_OPERAND_DSP_32_U20 :
print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
break;
case M32C_OPERAND_DSP_32_U24 :
print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
break;
case M32C_OPERAND_DSP_32_U8 :
print_normal (cd, info, fields->f_dsp_32_u8, 0, pc, length);
break;
case M32C_OPERAND_DSP_40_S16 :
print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_40_S8 :
print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_40_U16 :
print_normal (cd, info, fields->f_dsp_40_u16, 0, pc, length);
break;
case M32C_OPERAND_DSP_40_U20 :
print_normal (cd, info, fields->f_dsp_40_u20, 0, pc, length);
break;
case M32C_OPERAND_DSP_40_U24 :
print_normal (cd, info, fields->f_dsp_40_u24, 0, pc, length);
break;
case M32C_OPERAND_DSP_40_U8 :
print_normal (cd, info, fields->f_dsp_40_u8, 0, pc, length);
break;
case M32C_OPERAND_DSP_48_S16 :
print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_48_S8 :
print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_48_U16 :
print_normal (cd, info, fields->f_dsp_48_u16, 0, pc, length);
break;
case M32C_OPERAND_DSP_48_U20 :
print_normal (cd, info, fields->f_dsp_48_u20, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_48_U24 :
print_normal (cd, info, fields->f_dsp_48_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_DSP_48_U8 :
print_normal (cd, info, fields->f_dsp_48_u8, 0, pc, length);
break;
case M32C_OPERAND_DSP_8_S24 :
print_normal (cd, info, fields->f_dsp_8_s24, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_8_S8 :
print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_DSP_8_U16 :
print_normal (cd, info, fields->f_dsp_8_u16, 0, pc, length);
break;
case M32C_OPERAND_DSP_8_U24 :
print_normal (cd, info, fields->f_dsp_8_u24, 0, pc, length);
break;
case M32C_OPERAND_DSP_8_U6 :
print_normal (cd, info, fields->f_dsp_8_u6, 0, pc, length);
break;
case M32C_OPERAND_DSP_8_U8 :
print_normal (cd, info, fields->f_dsp_8_u8, 0, pc, length);
break;
case M32C_OPERAND_DST16AN :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
break;
case M32C_OPERAND_DST16AN_S :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an_s, 0);
break;
case M32C_OPERAND_DST16ANHI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an, 0);
break;
case M32C_OPERAND_DST16ANQI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_an, 0);
break;
case M32C_OPERAND_DST16ANQI_S :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_rn_QI_s, 0);
break;
case M32C_OPERAND_DST16ANSI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, fields->f_dst16_an, 0);
break;
case M32C_OPERAND_DST16RNEXTQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst16_rn_ext, 0);
break;
case M32C_OPERAND_DST16RNHI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
break;
case M32C_OPERAND_DST16RNQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst16_rn, 0);
break;
case M32C_OPERAND_DST16RNQI_S :
print_keyword (cd, info, & m32c_cgen_opval_h_r0l_r0h, fields->f_dst16_rn_QI_s, 0);
break;
case M32C_OPERAND_DST16RNSI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst16_rn, 0);
break;
case M32C_OPERAND_DST32ANEXTUNPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
break;
case M32C_OPERAND_DST32ANPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
break;
case M32C_OPERAND_DST32ANPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_prefixed, 0);
break;
case M32C_OPERAND_DST32ANPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_prefixed, 0);
break;
case M32C_OPERAND_DST32ANPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
break;
case M32C_OPERAND_DST32ANUNPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
break;
case M32C_OPERAND_DST32ANUNPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_unprefixed, 0);
break;
case M32C_OPERAND_DST32ANUNPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_unprefixed, 0);
break;
case M32C_OPERAND_DST32ANUNPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
break;
case M32C_OPERAND_DST32R0HI_S :
print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
break;
case M32C_OPERAND_DST32R0QI_S :
print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
break;
case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_HI, fields->f_dst32_rn_ext_unprefixed, 0);
break;
case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst32_rn_ext_unprefixed, 0);
break;
case M32C_OPERAND_DST32RNPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_prefixed_HI, 0);
break;
case M32C_OPERAND_DST32RNPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
break;
case M32C_OPERAND_DST32RNPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_prefixed_SI, 0);
break;
case M32C_OPERAND_DST32RNUNPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_unprefixed_HI, 0);
break;
case M32C_OPERAND_DST32RNUNPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
break;
case M32C_OPERAND_DST32RNUNPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_unprefixed_SI, 0);
break;
case M32C_OPERAND_G :
print_G (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_12_S4 :
print_normal (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_12_S4N :
print_signed4n (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_13_U3 :
print_normal (cd, info, fields->f_imm_13_u3, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_16_HI :
print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_16_QI :
print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_16_SI :
print_normal (cd, info, fields->f_dsp_16_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_IMM_20_S4 :
print_normal (cd, info, fields->f_imm_20_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_24_HI :
print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_IMM_24_QI :
print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_24_SI :
print_normal (cd, info, fields->f_dsp_24_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_IMM_32_HI :
print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_32_QI :
print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_32_SI :
print_normal (cd, info, fields->f_dsp_32_s32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_40_HI :
print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_40_QI :
print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_40_SI :
print_normal (cd, info, fields->f_dsp_40_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_IMM_48_HI :
print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_48_QI :
print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_48_SI :
print_normal (cd, info, fields->f_dsp_48_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_IMM_56_HI :
print_normal (cd, info, fields->f_dsp_56_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_IMM_56_QI :
print_normal (cd, info, fields->f_dsp_56_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_64_HI :
print_normal (cd, info, fields->f_dsp_64_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_8_HI :
print_normal (cd, info, fields->f_dsp_8_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_8_QI :
print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_8_S4 :
print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_8_S4N :
print_signed4n (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM_SH_12_S4 :
print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_12_s4, 0);
break;
case M32C_OPERAND_IMM_SH_20_S4 :
print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_20_s4, 0);
break;
case M32C_OPERAND_IMM_SH_8_S4 :
print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_8_s4, 0);
break;
case M32C_OPERAND_IMM1_S :
print_normal (cd, info, fields->f_imm1_S, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_IMM3_S :
print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_LAB_16_8 :
print_address (cd, info, fields->f_lab_16_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_24_8 :
print_address (cd, info, fields->f_lab_24_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_32_8 :
print_address (cd, info, fields->f_lab_32_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_40_8 :
print_address (cd, info, fields->f_lab_40_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_5_3 :
print_address (cd, info, fields->f_lab_5_3, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_8_16 :
print_address (cd, info, fields->f_lab_8_16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_8_24 :
print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
break;
case M32C_OPERAND_LAB_8_8 :
print_address (cd, info, fields->f_lab_8_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
break;
case M32C_OPERAND_LAB32_JMP_S :
print_address (cd, info, fields->f_lab32_jmp_s, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
break;
case M32C_OPERAND_Q :
print_Q (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_R0 :
print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
break;
case M32C_OPERAND_R0H :
print_keyword (cd, info, & m32c_cgen_opval_h_r0h, 0, 0);
break;
case M32C_OPERAND_R0L :
print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
break;
case M32C_OPERAND_R1 :
print_keyword (cd, info, & m32c_cgen_opval_h_r1, 0, 0);
break;
case M32C_OPERAND_R1R2R0 :
print_keyword (cd, info, & m32c_cgen_opval_h_r1r2r0, 0, 0);
break;
case M32C_OPERAND_R2 :
print_keyword (cd, info, & m32c_cgen_opval_h_r2, 0, 0);
break;
case M32C_OPERAND_R2R0 :
print_keyword (cd, info, & m32c_cgen_opval_h_r2r0, 0, 0);
break;
case M32C_OPERAND_R3 :
print_keyword (cd, info, & m32c_cgen_opval_h_r3, 0, 0);
break;
case M32C_OPERAND_R3R1 :
print_keyword (cd, info, & m32c_cgen_opval_h_r3r1, 0, 0);
break;
case M32C_OPERAND_REGSETPOP :
print_pop_regset (cd, info, fields->f_8_8, 0, pc, length);
break;
case M32C_OPERAND_REGSETPUSH :
print_push_regset (cd, info, fields->f_8_8, 0, pc, length);
break;
case M32C_OPERAND_RN16_PUSH_S :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_4_1, 0);
break;
case M32C_OPERAND_S :
print_S (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_SRC16AN :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src16_an, 0);
break;
case M32C_OPERAND_SRC16ANHI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src16_an, 0);
break;
case M32C_OPERAND_SRC16ANQI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src16_an, 0);
break;
case M32C_OPERAND_SRC16RNHI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src16_rn, 0);
break;
case M32C_OPERAND_SRC16RNQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src16_rn, 0);
break;
case M32C_OPERAND_SRC32ANPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
break;
case M32C_OPERAND_SRC32ANPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_prefixed, 0);
break;
case M32C_OPERAND_SRC32ANPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_prefixed, 0);
break;
case M32C_OPERAND_SRC32ANPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
break;
case M32C_OPERAND_SRC32ANUNPREFIXED :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
break;
case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_unprefixed, 0);
break;
case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_unprefixed, 0);
break;
case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
break;
case M32C_OPERAND_SRC32RNPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_prefixed_HI, 0);
break;
case M32C_OPERAND_SRC32RNPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_prefixed_QI, 0);
break;
case M32C_OPERAND_SRC32RNPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_prefixed_SI, 0);
break;
case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_unprefixed_HI, 0);
break;
case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_unprefixed_QI, 0);
break;
case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_unprefixed_SI, 0);
break;
case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
print_r0l_r0h (cd, info, fields->f_5_1, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_X :
print_X (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_Z :
print_Z (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32C_OPERAND_COND16_16 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_16_u8, 0);
break;
case M32C_OPERAND_COND16_24 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_24_u8, 0);
break;
case M32C_OPERAND_COND16_32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_32_u8, 0);
break;
case M32C_OPERAND_COND16C :
print_keyword (cd, info, & m32c_cgen_opval_h_cond16c, fields->f_cond16, 0);
break;
case M32C_OPERAND_COND16J :
print_keyword (cd, info, & m32c_cgen_opval_h_cond16j, fields->f_cond16, 0);
break;
case M32C_OPERAND_COND16J5 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond16j_5, fields->f_cond16j_5, 0);
break;
case M32C_OPERAND_COND32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case M32C_OPERAND_COND32_16 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_16_u8, 0);
break;
case M32C_OPERAND_COND32_24 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_24_u8, 0);
break;
case M32C_OPERAND_COND32_32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_32_u8, 0);
break;
case M32C_OPERAND_COND32_40 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_40_u8, 0);
break;
case M32C_OPERAND_COND32J :
print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32j, 0|(1<<CGEN_OPERAND_VIRTUAL));
break;
case M32C_OPERAND_CR1_PREFIXED_32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_21_3, 0);
break;
case M32C_OPERAND_CR1_UNPREFIXED_32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_13_3, 0);
break;
case M32C_OPERAND_CR16 :
print_keyword (cd, info, & m32c_cgen_opval_h_cr_16, fields->f_9_3, 0);
break;
case M32C_OPERAND_CR2_32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cr2_32, fields->f_13_3, 0);
break;
case M32C_OPERAND_CR3_PREFIXED_32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_21_3, 0);
break;
case M32C_OPERAND_CR3_UNPREFIXED_32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_13_3, 0);
break;
case M32C_OPERAND_FLAGS16 :
print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_9_3, 0);
break;
case M32C_OPERAND_FLAGS32 :
print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_13_3, 0);
break;
case M32C_OPERAND_SCCOND32 :
print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond16, 0);
break;
case M32C_OPERAND_SIZE :
print_size (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
default :
/* xgettext:c-format */
fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
opindex);
abort ();
}
}
cgen_print_fn * const m32c_cgen_print_handlers[] =
{
print_insn_normal,
};
void
m32c_cgen_init_dis (CGEN_CPU_DESC cd)
{
m32c_cgen_init_opcode_table (cd);
m32c_cgen_init_ibld_table (cd);
cd->print_handlers = & m32c_cgen_print_handlers[0];
cd->print_operand = m32c_cgen_print_operand;
}
/* Default print handler. */
static void
print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void *dis_info,
long value,
unsigned int attrs,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
; /* nothing to do */
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
(*info->fprintf_func) (info->stream, "%ld", value);
else
(*info->fprintf_func) (info->stream, "0x%lx", value);
}
/* Default address handler. */
static void
print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void *dis_info,
bfd_vma value,
unsigned int attrs,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
; /* Nothing to do. */
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
(*info->fprintf_func) (info->stream, "%ld", (long) value);
else
(*info->fprintf_func) (info->stream, "0x%lx", (long) value);
}
/* Keyword print handler. */
static void
print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void *dis_info,
CGEN_KEYWORD *keyword_table,
long value,
unsigned int attrs ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
const CGEN_KEYWORD_ENTRY *ke;
ke = cgen_keyword_lookup_value (keyword_table, value);
if (ke != NULL)
(*info->fprintf_func) (info->stream, "%s", ke->name);
else
(*info->fprintf_func) (info->stream, "???");
}
/* Default insn printer.
DIS_INFO is defined as `void *' so the disassembler needn't know anything
about disassemble_info. */
static void
print_insn_normal (CGEN_CPU_DESC cd,
void *dis_info,
const CGEN_INSN *insn,
CGEN_FIELDS *fields,
bfd_vma pc,
int length)
{
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
disassemble_info *info = (disassemble_info *) dis_info;
const CGEN_SYNTAX_CHAR_TYPE *syn;
CGEN_INIT_PRINT (cd);
for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
{
if (CGEN_SYNTAX_MNEMONIC_P (*syn))
{
(*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));