From cb6c5a9446e8036094e37968567b8bea35163f21 Mon Sep 17 00:00:00 2001 From: Yi Sun Date: Wed, 1 Jan 2025 16:06:08 -0800 Subject: [PATCH] chore: change address space in native compiler (#1147) * chore: change address space in native compiler * fix: convert AS correctly * chore: separate out NATIVE_AS * fix: change print to native as * feat: use repr(u8) for AS --- .../native/compiler/src/conversion/mod.rs | 148 +++++++++--------- 1 file changed, 73 insertions(+), 75 deletions(-) diff --git a/extensions/native/compiler/src/conversion/mod.rs b/extensions/native/compiler/src/conversion/mod.rs index 482215c905..e92e6c3b66 100644 --- a/extensions/native/compiler/src/conversion/mod.rs +++ b/extensions/native/compiler/src/conversion/mod.rs @@ -107,19 +107,17 @@ fn inst_large( } #[derive(Clone, Copy)] +#[repr(u8)] enum AS { - Immediate, - #[allow(dead_code)] - Register, - Memory, + Immediate = 0, + Native = 5, } impl AS { fn to_field(self) -> F { match self { AS::Immediate => F::ZERO, - AS::Register => F::ONE, - AS::Memory => F::TWO, + AS::Native => F::from_canonical_u8(AS::Native as u8), } } } @@ -146,9 +144,9 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, + AS::Native, ), ], AsmInstruction::AddFI(dst, lhs, rhs) => vec![ @@ -158,8 +156,8 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), rhs, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, AS::Immediate, ), ], @@ -170,9 +168,9 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, + AS::Native, ), ], AsmInstruction::SubFI(dst, lhs, rhs) => vec![ @@ -182,8 +180,8 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), rhs, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, AS::Immediate, ), ], @@ -194,9 +192,9 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), lhs, i32_f(rhs), - AS::Memory, + AS::Native, AS::Immediate, - AS::Memory, + AS::Native, ), ], AsmInstruction::MulF(dst, lhs, rhs) => vec![ @@ -206,9 +204,9 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, + AS::Native, ), ], AsmInstruction::MulFI(dst, lhs, rhs) => vec![ @@ -218,8 +216,8 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), rhs, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, AS::Immediate, ), ], @@ -230,9 +228,9 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, + AS::Native, ), ], AsmInstruction::DivFI(dst, lhs, rhs) => vec![ @@ -242,8 +240,8 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), i32_f(lhs), rhs, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, AS::Immediate, ), ], @@ -254,9 +252,9 @@ fn convert_base_arithmetic_instruction>( i32_f(dst), lhs, i32_f(rhs), - AS::Memory, + AS::Native, AS::Immediate, - AS::Memory, + AS::Native, ), ], _ => panic!( @@ -276,32 +274,32 @@ pub fn convert_field_extension>( i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], AsmInstruction::SubE(dst, lhs, rhs) => vec![inst( options.opcode_with_offset(FieldExtensionOpcode::FE4SUB), i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], AsmInstruction::MulE(dst, lhs, rhs) => vec![inst( options.opcode_with_offset(FieldExtensionOpcode::BBE4MUL), i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], AsmInstruction::DivE(dst, lhs, rhs) => vec![inst( options.opcode_with_offset(FieldExtensionOpcode::BBE4DIV), i32_f(dst), i32_f(lhs), i32_f(rhs), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], _ => panic!( "Illegal argument to convert_field_extension: {:?}", @@ -321,13 +319,13 @@ fn convert_print_instruction>( PhantomDiscriminant(NativePhantom::Print as u16), i32_f(src), F::ZERO, - 2, + AS::Native as u16, )], AsmInstruction::PrintF(src) => vec![Instruction::phantom( PhantomDiscriminant(NativePhantom::Print as u16), i32_f(src), F::ZERO, - 2, + AS::Native as u16, )], AsmInstruction::PrintE(src) => (0..EF::D as i32) .map(|i| { @@ -335,7 +333,7 @@ fn convert_print_instruction>( PhantomDiscriminant(NativePhantom::Print as u16), i32_f(src + i * word_size_i32), F::ZERO, - 2, + AS::Native as u16, ) }) .collect(), @@ -363,8 +361,8 @@ fn convert_instruction>( i32_f(dst), offset, i32_f(src), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, i32_f(index), size, ), @@ -376,8 +374,8 @@ fn convert_instruction>( i32_f(dst), index * size + offset, i32_f(src), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, ), ], AsmInstruction::StoreF(val, addr, index, size, offset) => vec![ @@ -387,8 +385,8 @@ fn convert_instruction>( i32_f(val), offset, i32_f(addr), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, i32_f(index), size, ), @@ -400,8 +398,8 @@ fn convert_instruction>( i32_f(val), index * size + offset, i32_f(addr), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, ), ], AsmInstruction::Jump(dst, label) => { @@ -412,7 +410,7 @@ fn convert_instruction>( i32_f(dst), labels(label) - pc, F::ZERO, - AS::Memory, + AS::Native, AS::Immediate, ), ] @@ -424,8 +422,8 @@ fn convert_instruction>( i32_f(lhs), i32_f(rhs), labels(label) - pc, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, ), ], AsmInstruction::BneI(label, lhs, rhs) => vec![ @@ -435,7 +433,7 @@ fn convert_instruction>( i32_f(lhs), rhs, labels(label) - pc, - AS::Memory, + AS::Native, AS::Immediate, ), ], @@ -446,8 +444,8 @@ fn convert_instruction>( i32_f(lhs), i32_f(rhs), labels(label) - pc, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, ), ], AsmInstruction::BeqI(label, lhs, rhs) => vec![ @@ -457,7 +455,7 @@ fn convert_instruction>( i32_f(lhs), rhs, labels(label) - pc, - AS::Memory, + AS::Native, AS::Immediate, ), ], @@ -469,8 +467,8 @@ fn convert_instruction>( i32_f(lhs + (i as i32)), i32_f(rhs + (i as i32)), labels(label) - (pc + F::from_canonical_usize(i * DEFAULT_PC_STEP as usize)), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )) .collect(), AsmInstruction::BneEI(label, lhs, rhs) => (0..EF::D) @@ -481,7 +479,7 @@ fn convert_instruction>( i32_f(lhs + (i as i32)), rhs.as_base_slice()[i], labels(label) - (pc + F::from_canonical_usize(i * DEFAULT_PC_STEP as usize)), - AS::Memory, + AS::Native, AS::Immediate, )) .collect(), @@ -498,8 +496,8 @@ fn convert_instruction>( } else { F::from_canonical_usize((i + 1) * DEFAULT_PC_STEP as usize) }, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )) .collect(), AsmInstruction::BeqEI(label, lhs, rhs) => (0..EF::D) @@ -515,7 +513,7 @@ fn convert_instruction>( } else { F::from_canonical_usize((i + 1) * DEFAULT_PC_STEP as usize) }, - AS::Memory, + AS::Native, AS::Immediate, )) .collect(), @@ -537,15 +535,15 @@ fn convert_instruction>( Instruction::phantom(PhantomDiscriminant(NativePhantom::HintInput as u16), F::ZERO, F::ZERO, 0) ], AsmInstruction::HintBits(src, len) => vec![ - Instruction::phantom(PhantomDiscriminant(NativePhantom::HintBits as u16), i32_f(src), F::from_canonical_u32(len), AS::Memory as u16) + Instruction::phantom(PhantomDiscriminant(NativePhantom::HintBits as u16), i32_f(src), F::from_canonical_u32(len), AS::Native as u16) ], AsmInstruction::StoreHintWordI(val, offset) => vec![inst( options.opcode_with_offset(NativeLoadStoreOpcode::SHINTW), F::ZERO, offset, i32_f(val), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], AsmInstruction::PrintV(..) | AsmInstruction::PrintF(..) | AsmInstruction::PrintE(..) => { if options.compile_prints { @@ -560,14 +558,14 @@ fn convert_instruction>( F::ZERO, i32_f(dst), AS::Immediate, - AS::Memory, + AS::Native, )], AsmInstruction::CopyF(dst, src) => vec![inst( options.opcode_with_offset(NativeLoadStoreOpcode::LOADW), i32_f(dst), F::ZERO, i32_f(src), - AS::Memory, + AS::Native, AS::Immediate, )], AsmInstruction::AddF(..) @@ -607,16 +605,16 @@ fn convert_instruction>( i32_f(dst), i32_f(src1), i32_f(src2), - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], AsmInstruction::Poseidon2Permute(dst, src) => vec![inst( options.opcode_with_offset(Poseidon2Opcode::PERM_POS2), i32_f(dst), i32_f(src), F::ZERO, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], AsmInstruction::CycleTrackerStart() => { if options.enable_cycle_tracker { @@ -638,15 +636,15 @@ fn convert_instruction>( i32_f(val), i32_f(index), AS::Immediate, - AS::Memory, - AS::Memory, + AS::Native, + AS::Native, )], AsmInstruction::FriReducedOpening(a, b, res, len, alpha, alpha_pow) => vec![Instruction { opcode: options.opcode_with_offset(FriOpcode::FRI_REDUCED_OPENING), a: i32_f(a), b: i32_f(b), c: i32_f(res), - d: AS::Memory.to_field(), + d: AS::Native.to_field(), e: i32_f(len), f: i32_f(alpha), g: i32_f(alpha_pow), @@ -669,7 +667,7 @@ pub fn convert_program>( F::ZERO, i32_f(0), AS::Immediate, - AS::Memory, + AS::Native, ); let init_debug_info = None;