From 9a76af809aa1732552e6c289b0ede261d7c9256c Mon Sep 17 00:00:00 2001 From: David Harris Date: Mon, 14 Oct 2024 15:28:28 -0700 Subject: [PATCH 01/54] Documented ecall services in WALLY-init-lib --- tests/coverage/WALLY-init-lib.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tests/coverage/WALLY-init-lib.h b/tests/coverage/WALLY-init-lib.h index 7e2aee771f..3a40d8351b 100644 --- a/tests/coverage/WALLY-init-lib.h +++ b/tests/coverage/WALLY-init-lib.h @@ -28,6 +28,12 @@ // The PMP tests are sensitive to the exact addresses in this code, so unfortunately // modifying anything breaks those tests. +// Provides simple firmware services through ecall. Place argument in a0 and issue ecall: +// 0: change to user mode +// 1: change to supervisor mode +// 3: change to machine mode +// 4: terminate program + .section .text.init .global rvtest_entry_point From de8a707361c1049c38b7f8c6461b4d483b92bda9 Mon Sep 17 00:00:00 2001 From: David Harris Date: Mon, 14 Oct 2024 15:28:56 -0700 Subject: [PATCH 02/54] Updated WARL field in senvcfg.CBIE to match ImperasDV --- src/privileged/csrs.sv | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/privileged/csrs.sv b/src/privileged/csrs.sv index 4797f800bf..a2a21c2ee1 100644 --- a/src/privileged/csrs.sv +++ b/src/privileged/csrs.sv @@ -128,13 +128,16 @@ module csrs import cvw::*; #(parameter cvw_t P) ( else assign STimerInt = 1'b0; + logic [1:0] LegalizedCBIE; + assign LegalizedCBIE = CSRWriteValM[5:4] == 2'b10 ? SENVCFG_REGW[5:4] : CSRWriteValM[5:4]; // Assume WARL for reserved CBIE = 10, keeps old value assign SENVCFG_WriteValM = { {(P.XLEN-8){1'b0}}, CSRWriteValM[7] & P.ZICBOZ_SUPPORTED, - CSRWriteValM[6:4] & {3{P.ZICBOM_SUPPORTED}}, + CSRWriteValM[6] & P.ZICBOM_SUPPORTED, + LegalizedCBIE & {2{P.ZICBOM_SUPPORTED}}, 3'b0, CSRWriteValM[0] & P.VIRTMEM_SUPPORTED - }; + }; flopenr #(P.XLEN) SENVCFGreg(clk, reset, WriteSENVCFGM, SENVCFG_WriteValM, SENVCFG_REGW); From 150641e5d329412626ad418fad1557c021d89578 Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 15 Oct 2024 09:08:25 -0700 Subject: [PATCH 03/54] Implemented mhpmevent[3:31] as read-only zero rather than illegal --- src/privileged/csrc.sv | 66 ++++++++++++++++++++++-------------------- 1 file changed, 35 insertions(+), 31 deletions(-) diff --git a/src/privileged/csrc.sv b/src/privileged/csrc.sv index 848cb7e019..8b292513bb 100644 --- a/src/privileged/csrc.sv +++ b/src/privileged/csrc.sv @@ -8,7 +8,6 @@ // See RISC-V Privileged Mode Specification 20190608 3.1.10-11 // // Documentation: RISC-V System on Chip Design -// MHPMEVENT is not supported // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw @@ -66,7 +65,8 @@ module csrc import cvw::*; #(parameter cvw_t P) ( localparam MTIME = 12'hB01; // this is a memory-mapped register; no such CSR exists, and access should faul; localparam MHPMCOUNTERHBASE = 12'hB80; localparam MTIMEH = 12'hB81; // this is a memory-mapped register; no such CSR exists, and access should fault - localparam MHPMEVENTBASE = 12'h320; + localparam MHPMEVENTBASE = 12'h323; + localparam MHPMEVENTLAST = 12'h33F; localparam HPMCOUNTERBASE = 12'hC00; localparam HPMCOUNTERHBASE = 12'hC80; localparam TIME = 12'hC01; @@ -156,37 +156,41 @@ module csrc import cvw::*; #(parameter cvw_t P) ( if (PrivilegeModeW == P.M_MODE | MCOUNTEREN_REGW[CounterNumM] & (!P.S_SUPPORTED | PrivilegeModeW == P.S_MODE | SCOUNTEREN_REGW[CounterNumM])) begin IllegalCSRCAccessM = 1'b0; - if (P.XLEN==64) begin // 64-bit counter reads - // Veri lator doesn't realize this only occurs for XLEN=64 - /* verilator lint_off WIDTH */ - if (CSRAdrM == TIME & ~CSRWriteM) CSRCReadValM = MTIME_CLINT; // TIME register is a shadow of the memory-mapped MTIME from the CLINT - /* verilator lint_on WIDTH */ - else if (CSRAdrM >= MHPMCOUNTERBASE & CSRAdrM < MHPMCOUNTERBASE+P.COUNTERS & CSRAdrM != MTIME) - CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; - else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS & ~CSRWriteM) // read-only - CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; - else begin + if (CSRAdrM >= MHPMEVENTBASE & CSRAdrM <= MHPMEVENTLAST) begin + CSRCReadValM = '0; // mphmevent[3:31] tied to read-only zero + end else begin + if (P.XLEN==64) begin // 64-bit counter reads + // Veri lator doesn't realize this only occurs for XLEN=64 + /* verilator lint_off WIDTH */ + if (CSRAdrM == TIME & ~CSRWriteM) CSRCReadValM = MTIME_CLINT; // TIME register is a shadow of the memory-mapped MTIME from the CLINT + /* verilator lint_on WIDTH */ + else if (CSRAdrM >= MHPMCOUNTERBASE & CSRAdrM < MHPMCOUNTERBASE+P.COUNTERS & CSRAdrM != MTIME) + CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; + else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS & ~CSRWriteM) // read-only + CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; + else begin + CSRCReadValM = '0; + IllegalCSRCAccessM = 1'b1; // requested CSR doesn't exist + end + end else begin // 32-bit counter reads + // Veril ator doesn't realize this only occurs for XLEN=32 + /* verilator lint_off WIDTH */ + if (CSRAdrM == TIME & ~CSRWriteM) CSRCReadValM = MTIME_CLINT[31:0];// TIME register is a shadow of the memory-mapped MTIME from the CLINT + else if (CSRAdrM == TIMEH & ~CSRWriteM) CSRCReadValM = MTIME_CLINT[63:32]; + /* verilator lint_on WIDTH */ + else if (CSRAdrM >= MHPMCOUNTERBASE & CSRAdrM < MHPMCOUNTERBASE+P.COUNTERS & CSRAdrM != MTIME) + CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; + else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS & ~CSRWriteM) // read-only + CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; + else if (CSRAdrM >= MHPMCOUNTERHBASE & CSRAdrM < MHPMCOUNTERHBASE+P.COUNTERS & CSRAdrM != MTIMEH) + CSRCReadValM = HPMCOUNTERH_REGW[CounterNumM]; + else if (CSRAdrM >= HPMCOUNTERHBASE & CSRAdrM < HPMCOUNTERHBASE+P.COUNTERS & ~CSRWriteM) // read-only + CSRCReadValM = HPMCOUNTERH_REGW[CounterNumM]; + else begin CSRCReadValM = '0; - IllegalCSRCAccessM = 1'b1; // requested CSR doesn't exist + IllegalCSRCAccessM = 1'b1; // requested CSR doesn't exist + end end - end else begin // 32-bit counter reads - // Veril ator doesn't realize this only occurs for XLEN=32 - /* verilator lint_off WIDTH */ - if (CSRAdrM == TIME & ~CSRWriteM) CSRCReadValM = MTIME_CLINT[31:0];// TIME register is a shadow of the memory-mapped MTIME from the CLINT - else if (CSRAdrM == TIMEH & ~CSRWriteM) CSRCReadValM = MTIME_CLINT[63:32]; - /* verilator lint_on WIDTH */ - else if (CSRAdrM >= MHPMCOUNTERBASE & CSRAdrM < MHPMCOUNTERBASE+P.COUNTERS & CSRAdrM != MTIME) - CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; - else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS & ~CSRWriteM) // read-only - CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; - else if (CSRAdrM >= MHPMCOUNTERHBASE & CSRAdrM < MHPMCOUNTERHBASE+P.COUNTERS & CSRAdrM != MTIMEH) - CSRCReadValM = HPMCOUNTERH_REGW[CounterNumM]; - else if (CSRAdrM >= HPMCOUNTERHBASE & CSRAdrM < HPMCOUNTERHBASE+P.COUNTERS & ~CSRWriteM) // read-only - CSRCReadValM = HPMCOUNTERH_REGW[CounterNumM]; - else begin - CSRCReadValM = '0; - IllegalCSRCAccessM = 1'b1; // requested CSR doesn't exist - end end end else begin CSRCReadValM = '0; From 69898f65da527ece235c4135cb8df2cd41b3d3c4 Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 15 Oct 2024 09:09:42 -0700 Subject: [PATCH 04/54] Disabled some features in imperasdv not implemented by Wally --- config/rv32gc/imperas.ic | 18 ++++++++++++++++++ config/rv64gc/imperas.ic | 20 ++++++++++++++------ 2 files changed, 32 insertions(+), 6 deletions(-) diff --git a/config/rv32gc/imperas.ic b/config/rv32gc/imperas.ic index fe4a3dbedd..9e9eef55f3 100644 --- a/config/rv32gc/imperas.ic +++ b/config/rv32gc/imperas.ic @@ -59,6 +59,24 @@ #--override cpu/instret_undefined=T #--override cpu/hpmcounter_undefined=T +# context registers not implemented +--override cpu/scontext_undefined=T +--override cpu/mcontext_undefined=T + +# nonratified mnosie register not implemented +--override cpu/mnoise_undefined=T + +# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag +#--override cpu/ecode_mask=0x8000000F # for RV32 +--override cpu/ecode_mask=0x800000000000000F # for RV64 + +# Debug mode not yet supported +--override cpu/debug_mode=none + +# Zkr entropy source and seed register not supported. +--override cpu/Zkr=F + + --override cpu/reset_address=0x80000000 --override cpu/unaligned=F # Zicclsm (should be true) diff --git a/config/rv64gc/imperas.ic b/config/rv64gc/imperas.ic index 1b038c920d..31584d22d5 100644 --- a/config/rv64gc/imperas.ic +++ b/config/rv64gc/imperas.ic @@ -57,15 +57,23 @@ #--override cpu/instret_undefined=T #--override cpu/hpmcounter_undefined=T +# context registers not implemented --override cpu/scontext_undefined=T --override cpu/mcontext_undefined=T + +# nonratified mnosie register not implemented --override cpu/mnoise_undefined=T -# *** how to override other undefined registers: seed, mphmevent, mseccfg, debugger registers -#--override cpu/seed_undefined=T -#--override mhpmevent3_undefined=T -#--override cpu/mseccfg_undefined=T -#--override cpu/tselect_undefined=T -#--override cpu/tdata1_undefined=T + +# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag +#--override cpu/ecode_mask=0x8000000F # for RV32 +--override cpu/ecode_mask=0x800000000000000F # for RV64 + +# Debug mode not yet supported +--override cpu/debug_mode=none + +# Zkr entropy source and seed register not supported. +--override cpu/Zkr=F + --override cpu/reset_address=0x80000000 From a0245622dc5b351ec78838dc654545acf415c211 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Tue, 15 Oct 2024 22:26:27 -0700 Subject: [PATCH 05/54] Make zsbl in Installation CI because it is used in standard regression tests --- .github/workflows/install.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index dfa4495261..15f41b36b8 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -121,11 +121,11 @@ jobs: with: name: installation-logs-${{ matrix.name }} path: ${{ env.RISCV }}/logs/ - # Make riscof only as that is the only testsuite used by standard regression + # Make riscof and zsbl only as that is the only testsuite used by standard regression - name: make tests run: | source setup.sh - make riscof --jobs $(nproc --ignore 1) + make riscof zsbl --jobs $(nproc --ignore 1) # Only the linux-testvectors are needed, so remove the rest of the buildroot to save space - name: Remove Buildroot to Save Space run: | From 658a57a2dde99cc76d2cd04f6e9e77c285ccd20b Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Tue, 15 Oct 2024 22:44:19 -0700 Subject: [PATCH 06/54] Run lint for distros that Verilator fails sim in Installation CI --- .github/workflows/install.yml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 15f41b36b8..e80bb4ef1a 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -137,6 +137,11 @@ jobs: run: | source setup.sh regression-wally + - name: Lint Only (for distros with broken Verilator sim) + if: ${{ matrix.name == 'ubuntu-20.04' || matrix.name == 'rocky-8' || matrix.name == 'almalinux-8'}} + run: | + source setup.sh + lint-wally # Upload regression logs for debugging - name: Upload regression logs uses: actions/upload-artifact@v4 From 2e774aa0558a6395eb027b62dc63d298a2851f47 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Wed, 16 Oct 2024 00:47:26 -0700 Subject: [PATCH 07/54] Run wsim on broken distros --- .github/workflows/install.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index e80bb4ef1a..6ada085c7c 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -142,6 +142,7 @@ jobs: run: | source setup.sh lint-wally + wsim rv32i arch32i --sim verilator # Upload regression logs for debugging - name: Upload regression logs uses: actions/upload-artifact@v4 From 2f22b236fcfd749899a86f48c6cfca438ecb9027 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Wed, 16 Oct 2024 00:48:27 -0700 Subject: [PATCH 08/54] Save wsim to log --- .github/workflows/install.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 6ada085c7c..0c4f5d2d3d 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -142,7 +142,7 @@ jobs: run: | source setup.sh lint-wally - wsim rv32i arch32i --sim verilator + wsim rv32i arch32i --sim verilator | tee $WALLY/sim/verilator/logs/rv32i_arch32i.log # Upload regression logs for debugging - name: Upload regression logs uses: actions/upload-artifact@v4 From 01805d9fb11784dfc9af437145f1fdc43df92eee Mon Sep 17 00:00:00 2001 From: David Harris Date: Wed, 16 Oct 2024 13:26:20 -0700 Subject: [PATCH 09/54] Corrected RV32gc imperas configuration --- config/rv32gc/imperas.ic | 5 ----- 1 file changed, 5 deletions(-) diff --git a/config/rv32gc/imperas.ic b/config/rv32gc/imperas.ic index 9e9eef55f3..eb40392163 100644 --- a/config/rv32gc/imperas.ic +++ b/config/rv32gc/imperas.ic @@ -63,9 +63,6 @@ --override cpu/scontext_undefined=T --override cpu/mcontext_undefined=T -# nonratified mnosie register not implemented ---override cpu/mnoise_undefined=T - # mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag #--override cpu/ecode_mask=0x8000000F # for RV32 --override cpu/ecode_mask=0x800000000000000F # for RV64 @@ -73,8 +70,6 @@ # Debug mode not yet supported --override cpu/debug_mode=none -# Zkr entropy source and seed register not supported. ---override cpu/Zkr=F --override cpu/reset_address=0x80000000 From d21e2fa99711d2d4e72765226bc298f5f54fa5e4 Mon Sep 17 00:00:00 2001 From: David Harris Date: Wed, 16 Oct 2024 21:41:14 -0700 Subject: [PATCH 10/54] Increased timeout on regression-wally to avoid floating-point fcov runs from failing --- bin/regression-wally | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/regression-wally b/bin/regression-wally index 67cd4815ba..1c9e09bfec 100755 --- a/bin/regression-wally +++ b/bin/regression-wally @@ -515,7 +515,7 @@ def main(): TIMEOUT_DUR = 20*60 os.system('rm -f questa/fcovrvvi_ucdb/* questa/fcovrvvi_logs/* questa/fcovrvvi/*') elif args.fcov: - TIMEOUT_DUR = 2*60 + TIMEOUT_DUR = 4*60 os.system('rm -f questa/fcov_ucdb/* questa/fcov_logs/* questa/fcov/*') elif args.buildroot: TIMEOUT_DUR = 60*1440 # 1 day From 9dcc0435b8a77fa95311424e790d400faa984605 Mon Sep 17 00:00:00 2001 From: David Harris Date: Wed, 16 Oct 2024 21:47:04 -0700 Subject: [PATCH 11/54] Increased timeout on regression-wally to avoid floating-point fcov runs from failing --- bin/regression-wally | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/regression-wally b/bin/regression-wally index 1c9e09bfec..a76836eeac 100755 --- a/bin/regression-wally +++ b/bin/regression-wally @@ -515,7 +515,7 @@ def main(): TIMEOUT_DUR = 20*60 os.system('rm -f questa/fcovrvvi_ucdb/* questa/fcovrvvi_logs/* questa/fcovrvvi/*') elif args.fcov: - TIMEOUT_DUR = 4*60 + TIMEOUT_DUR = 8*60 os.system('rm -f questa/fcov_ucdb/* questa/fcov_logs/* questa/fcov/*') elif args.buildroot: TIMEOUT_DUR = 60*1440 # 1 day From 9d941b7f2eab23819d10ab45652cadfb9bae0754 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 00:22:51 -0700 Subject: [PATCH 12/54] Fix missing directory in installation CI --- .github/workflows/install.yml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 0c4f5d2d3d..8a7733c2e7 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -137,10 +137,11 @@ jobs: run: | source setup.sh regression-wally - - name: Lint Only (for distros with broken Verilator sim) + - name: Lint + wsim Test Only (for distros with broken Verilator sim) if: ${{ matrix.name == 'ubuntu-20.04' || matrix.name == 'rocky-8' || matrix.name == 'almalinux-8'}} run: | source setup.sh + mkdir -p $WALLY/sim/verilator/logs/ lint-wally wsim rv32i arch32i --sim verilator | tee $WALLY/sim/verilator/logs/rv32i_arch32i.log # Upload regression logs for debugging From b10f46713ee86e0b73a8d3e0729c72d786efc386 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 00:27:47 -0700 Subject: [PATCH 13/54] Add installation status badge to README --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index f5dfe0f473..b77024a5ba 100644 --- a/README.md +++ b/README.md @@ -1,3 +1,4 @@ +![Installation CI](https://github.com/jordancarlin/cvw/actions/workflows/install.yml/badge.svg?branch=main) # core-v-wally Wally is a 5-stage pipelined processor configurable to support all the standard RISC-V options, including RV32/64, A, B, C, D, F, M, Q, and Zk* extensions, virtual memory, PMP, and the various privileged modes and CSRs. It provides optional caches, branch prediction, and standard RISC-V peripherals (CLINT, PLIC, UART, GPIO). Wally is written in SystemVerilog. It passes the [RISC-V Arch Tests](https://github.com/riscv-non-isa/riscv-arch-test) and boots Linux on an FPGA. Configurations range from a minimal RV32E core to a fully featured RV64GC application processor with all of the RVA22S64 profile extensions. Wally is part of the OpenHWGroup family of robust open RISC-V cores. From 58e093c9be824344cba9014902e2b5f1dabbce77 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 00:33:28 -0700 Subject: [PATCH 14/54] Add warning regarding broken Verilator on Ubuntu 20.04 and Red Hat 8 to compatibility section of README --- README.md | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index b77024a5ba..a1dca4fd14 100644 --- a/README.md +++ b/README.md @@ -66,7 +66,11 @@ This section describes the open source toolchain installation. ### Compatibility The current version of the toolchain has been tested on Ubuntu (versions 20.04 LTS, 22.04 LTS, and 24.04 LTS) and on Red Hat/Rocky/AlmaLinux (versions 8 and 9). -NOTE: Ubuntu 22.04LTS is incompatible with Synopsys Design Compiler. +> [!WARNING] +> Ubuntu 22.04LTS is incompatible with Synopsys Design Compiler. + +> [!WARNING] +> Verilator currently fails to simulate correctly on Ubuntu 20.04 LTS and Red Hat/Rocky/AlmaLinux 8. ### Overview The toolchain installation script installs the following tools: @@ -75,7 +79,6 @@ The toolchain installation script installs the following tools: - [QEMU](https://www.qemu.org/docs/master/system/target-riscv.html): emulator - [Spike](https://github.com/riscv-software-src/riscv-isa-sim): functional RISC-V model - [Verilator](https://github.com/verilator/verilator): open-source Verilog simulator - - NOTE: Verilator does not currently work reliably for simulating Wally on Ubuntu 20.04 LTS and Red Hat 8 - [RISC-V Sail Model](https://github.com/riscv/sail-riscv): golden reference model for RISC-V - [OSU Skywater 130 cell library](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12): standard cell library - [RISCOF](https://github.com/riscv-software-src/riscof.git): RISC-V compliance test framework From aa4304cb6c08d744fc02bd3cfa52e1a93f5420f5 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 00:34:49 -0700 Subject: [PATCH 15/54] Document --no-buildroot flag for installation script --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index a1dca4fd14..e4f7602e27 100644 --- a/README.md +++ b/README.md @@ -83,7 +83,7 @@ The toolchain installation script installs the following tools: - [OSU Skywater 130 cell library](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12): standard cell library - [RISCOF](https://github.com/riscv-software-src/riscof.git): RISC-V compliance test framework -Additionally, Buildroot Linux is built for Wally and linux test-vectors are generated for simulation. See the [Linux README](linux/README.md) for more details. +Additionally, Buildroot Linux is built for Wally and linux test-vectors are generated for simulation. See the [Linux README](linux/README.md) for more details. This can be skipped using the `--no-buildroot` flag. ### Installation From 055bcc5f97b85d8148aad14fb596370947f7a77c Mon Sep 17 00:00:00 2001 From: slmnemo Date: Mon, 9 Sep 2024 12:43:58 -0700 Subject: [PATCH 16/54] Changed make names to match new Linux makefile. Removed --buildroot option from regression call. --- bin/nightly_build.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/bin/nightly_build.py b/bin/nightly_build.py index 629da074e1..0770de66fc 100755 --- a/bin/nightly_build.py +++ b/bin/nightly_build.py @@ -751,8 +751,7 @@ def main(): # Compile Linux for local testing test_runner.set_env_var("RISCV",str(test_runner.cvw)) linux_path = test_runner.cvw / "linux" - test_runner.execute_makefile(target = "all_nosudo", makefile_path=linux_path) - test_runner.execute_makefile(target = "dumptvs_nosudo", makefile_path=linux_path) + test_runner.execute_makefile(target = "all", makefile_path=linux_path) ############################################# # RUN TESTS # From 25da694a2403c5c37cc8b32dffa0e7359e80aad9 Mon Sep 17 00:00:00 2001 From: slmnemo Date: Wed, 11 Sep 2024 12:18:57 -0700 Subject: [PATCH 17/54] Laid out new CSV daily tracker and emailsender classes. --- bin/nightly_build.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bin/nightly_build.py b/bin/nightly_build.py index 0770de66fc..7d0dcefbe6 100755 --- a/bin/nightly_build.py +++ b/bin/nightly_build.py @@ -794,8 +794,8 @@ def main(): logger.info(f"The total sucesses for all tests ran are: {total_number_success}") logger.info(f"The total failures for all tests ran are: {total_number_failures}") - # Copy actual test logs from sim/questa, sim/verilator - test_runner.copy_sim_logs([test_runner.cvw / "sim/questa/logs", test_runner.cvw / "sim/verilator/logs"]) + # Copy actual test logs from sim/questa, sim/verilator, sim/vcs + test_runner.copy_sim_logs([test_runner.cvw / "sim/questa/logs", test_runner.cvw / "sim/verilator/logs", test_runner.cvw / "sim/vcs/logs"]) ############################################# # FORMAT TESTS # From 35fa3ff461b3335f2372c8b96addef850d9336cf Mon Sep 17 00:00:00 2001 From: slmnemo Date: Thu, 26 Sep 2024 19:58:24 -0700 Subject: [PATCH 18/54] Fixed ERROR versus error bug in logger, fixed error in failed lint tests. Labeled lint tests in regression output. Changed test run directory to call direct location rather than calling unknown regression script --- bin/nightly_build.py | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/bin/nightly_build.py b/bin/nightly_build.py index 7d0dcefbe6..b8bce59820 100755 --- a/bin/nightly_build.py +++ b/bin/nightly_build.py @@ -409,16 +409,16 @@ def clean_format_output(self, input_file, output_file=None): if "Success" in line: passed_configs.append(line.split(':')[0].strip()) elif "passed lint" in line: - passed_configs.append(line.split(' ')[0].strip()) + passed_configs.append(f"Lint: {line.split(' ')[0].strip()}") #passed_configs.append(line) # potentially use a space elif "failed lint" in line: - failed_configs.append(line.split(' ')[0].strip(), "no log file") + failed_configs.append([f"Lint: {line.split(' ')[0].strip()}", "No Log File"]) #failed_configs.append(line) elif "Failures detected in output" in line: try: config_name = line.split(':')[0].strip() - log_file = os.path.abspath("logs/"+config_name+".log") + log_file = os.path.abspath(os.path.join("logs", config_name, ".log")) failed_configs.append((config_name, log_file)) except: failed_configs.append((config_name, "Log file not found")) @@ -619,7 +619,7 @@ def send_email(self, receiver_emails=None, subject="Nightly Regression Test"): # check if there are any emails if not receiver_emails: - self.logger.ERROR("No receiver emails provided.") + self.logger.error("No receiver emails provided.") return # grab the html file @@ -777,7 +777,7 @@ def main(): passed, failed = test_runner.clean_format_output(input_file = output_location) logger.info(f"{test_name} has been formatted to markdown") except: - logger.ERROR(f"Error occured with formatting {test_name}") + logger.error(f"Error occured with formatting {test_name}") logger.info(f"The # of failures are for {test_name}: {len(failed)}") total_number_failures+= len(failed) @@ -787,15 +787,19 @@ def main(): total_number_success += len(passed) total_success.append(passed) test_runner.rewrite_to_markdown(test_name, passed, failed) + + newlinechar = "\n" + logger.info(f"Failed tests: \n{newlinechar.join([x[0] for x in failed])}") except Exception as e: - logger.error("There was an error in running the tests: {e}") + logger.error(f"There was an error in running the tests: {e}") logger.info(f"The total sucesses for all tests ran are: {total_number_success}") logger.info(f"The total failures for all tests ran are: {total_number_failures}") # Copy actual test logs from sim/questa, sim/verilator, sim/vcs - test_runner.copy_sim_logs([test_runner.cvw / "sim/questa/logs", test_runner.cvw / "sim/verilator/logs", test_runner.cvw / "sim/vcs/logs"]) + if not args.tests == "test_lint": + test_runner.copy_sim_logs([test_runner.cvw / "sim/questa/logs", test_runner.cvw / "sim/verilator/logs", test_runner.cvw / "sim/vcs/logs"]) ############################################# # FORMAT TESTS # From e4b4cff270eb95a09a3e18fb4ee347bbd6475f75 Mon Sep 17 00:00:00 2001 From: slmnemo Date: Wed, 16 Oct 2024 18:48:08 -0700 Subject: [PATCH 19/54] Changed nightly_build.py to allow for nightly and buildroot to be passed as arguments --- bin/nightly_build.py | 50 +++++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 21 deletions(-) diff --git a/bin/nightly_build.py b/bin/nightly_build.py index b8bce59820..506a0e997a 100755 --- a/bin/nightly_build.py +++ b/bin/nightly_build.py @@ -84,7 +84,7 @@ class FolderManager: """A class for managing folders and repository cloning.""" - def __init__(self): + def __init__(self, basedir): """ Initialize the FolderManager instance. @@ -92,8 +92,12 @@ def __init__(self): base_dir (str): The base directory where folders will be managed and repository will be cloned. """ env_extract_var = 'WALLY' - self.base_dir = os.environ.get(env_extract_var) - self.base_parent_dir = os.path.dirname(self.base_dir) + if os.environ.get(env_extract_var): + self.base_dir = os.environ.get(env_extract_var) + self.base_parent_dir = os.path.dirname(self.base_dir) + else: + self.base_dir = basedir + self.base_parent_dir = os.path.dirname(self.base_dir) # logger.info(f"Base directory: {self.base_dir}") # logger.info(f"Parent Base directory: {self.base_parent_dir}") @@ -313,7 +317,7 @@ def execute_makefile(self, makefile_path=None, target=None): self.logger.error(f"Error making the tests. Target: {target}") return False - def run_tests(self, test_type=None, test_name=None, test_extension=None): + def run_tests(self, test_type=None, test_name=None, test_extensions=None): """ Run a script through the terminal and save the output to a file. @@ -329,12 +333,12 @@ def run_tests(self, test_type=None, test_name=None, test_extension=None): output_file = self.log_dir.joinpath(f"{test_name}-output.log") os.chdir(self.sim_dir) - if test_extension: - command = [test_type, test_name, test_extension] - self.logger.info(f"Command used to run tests: {test_type} {test_name} {test_extension}") + if test_extensions: + command = [test_type, test_name] + test_extensions + self.logger.info(f"Command used to run tests in directory {self.sim_dir}: {test_type} {test_name} {' '.join(test_extensions)}") else: command = [test_type, test_name] - self.logger.info(f"Command used to run tests: {test_type} {test_name}") + self.logger.info(f"Command used to run tests in directory {self.sim_dir}: {test_type} {test_name}") # Execute the command using subprocess and save the output into a file @@ -348,10 +352,10 @@ def run_tests(self, test_type=None, test_name=None, test_extension=None): self.logger.error("There was an error in running the tests in the run_tests function: {e}") # Check if the command executed successfuly if result.returncode or result.returncode == 0: - self.logger.info(f"Test ran successfuly. Test type: {test_type}, test name: {test_name}, test extention: {test_extension}") + self.logger.info(f"Test ran successfuly. Test type: {test_type}, test name: {test_name}, test extension: {' '.join(test_extensions)}") return True, output_file else: - self.logger.error(f"Error making test. Test type: {test_type}, test name: {test_name}, test extention: {test_extension}") + self.logger.error(f"Error making test. Test type: {test_type}, test name: {test_name}, test extension: {' '.join(test_extensions)}") return False, output_file @@ -535,7 +539,7 @@ def combine_markdown_files(self, passed_tests, failed_tests, test_list, total_nu md_file.write(f"\n**Total failed tests: {total_number_failures}**") for (test_item, item) in zip(test_list, failed_tests): md_file.write(f"\n\n### {test_item[1]} test") - md_file.write(f"\n**Command used:** {test_item[0]} {test_item[1]} {test_item[2]}\n\n") + md_file.write(f"\n**Command used:** {test_item[0]} {test_item[1]} {' '.join(test_item[2])}\n\n") md_file.write(f"**Failed Tests:**\n") @@ -558,7 +562,7 @@ def combine_markdown_files(self, passed_tests, failed_tests, test_list, total_nu md_file.write(f"\n**Total successful tests: {total_number_success}**") for (test_item, item) in zip(test_list, passed_tests): md_file.write(f"\n\n### {test_item[1]} test") - md_file.write(f"\n**Command used:** {test_item[0]} {test_item[1]} {test_item[2]}\n\n") + md_file.write(f"\n**Command used:** {test_item[0]} {test_item[1]} {' '.join(test_item[2])}\n\n") md_file.write(f"\n**Successful Tests:**\n") @@ -682,7 +686,7 @@ def main(): log_file_path = log_path.joinpath("nightly_build.log") previous_cvw_path = Path.home().joinpath(args.path,f"{yesterday}/cvw") # creates the object - folder_manager = FolderManager() + folder_manager = FolderManager(basedir=args.path) # setting the path on where to clone new repositories of cvw folder_manager.create_folders([cvw_path, results_path, log_path]) @@ -691,14 +695,18 @@ def main(): folder_manager.clone_repository(cvw_path, args.repository) # Define tests that we can run + # + # flags are a list + if (args.tests == "all"): + test_list = [["python", "./regression-wally", ["--nightly", "--buildroot"]]] if (args.tests == "nightly"): - test_list = [["python", "regression-wally", "--nightly --buildroot"]] - elif (args.tests == "test"): - test_list = [["python", "regression-wally", ""]] - elif (args.tests == "test_lint"): - test_list = [["bash", "lint-wally", "-nightly"]] + test_list = [["python", "./regression-wally", ["--nightly"]]] + elif (args.tests == "regression"): + test_list = [["python", "./regression-wally", []]] + elif (args.tests == "lint"): + test_list = [["bash", "./lint-wally", ["--nightly"]]] else: - print(f"Error: Invalid test '"+args.test+"' specified") + print(f"Error: Invalid test {args.tests} specified") raise SystemExit ############################################# @@ -765,9 +773,9 @@ def main(): total_failures = [] total_success = [] - for test_type, test_name, test_extension in test_list: + for test_type, test_name, test_extensions in test_list: - check, output_location = test_runner.run_tests(test_type=test_type, test_name=test_name, test_extension=test_extension) + check, output_location = test_runner.run_tests(test_type=test_type, test_name=test_name, test_extensions=test_extensions) try: if check: # this checks if the test actually ran successfuly output_log_list.append(output_location) From 0830cbb8d151e73135203017348671c376678939 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 02:14:37 -0700 Subject: [PATCH 20/54] README formatting updates --- README.md | 208 +++++++++++++++++++++++++++++++----------------------- 1 file changed, 121 insertions(+), 87 deletions(-) diff --git a/README.md b/README.md index e4f7602e27..6319494631 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,5 @@ ![Installation CI](https://github.com/jordancarlin/cvw/actions/workflows/install.yml/badge.svg?branch=main) + # core-v-wally Wally is a 5-stage pipelined processor configurable to support all the standard RISC-V options, including RV32/64, A, B, C, D, F, M, Q, and Zk* extensions, virtual memory, PMP, and the various privileged modes and CSRs. It provides optional caches, branch prediction, and standard RISC-V peripherals (CLINT, PLIC, UART, GPIO). Wally is written in SystemVerilog. It passes the [RISC-V Arch Tests](https://github.com/riscv-non-isa/riscv-arch-test) and boots Linux on an FPGA. Configurations range from a minimal RV32E core to a fully featured RV64GC application processor with all of the RVA22S64 profile extensions. Wally is part of the OpenHWGroup family of robust open RISC-V cores. @@ -15,62 +16,66 @@ Wally is presently at Technology Readiness Level 4, passing the RISC-V compatibi New users may wish to do the following setup to access the server via a GUI and use a text editor. - Git started with Git configuration and authentication: B.1 (replace with your name and email) - $ git config --global user.name "Ben Bitdiddle" - $ git config --global user.email "ben_bitdiddle@wally.edu" - $ git config --global pull.rebase false - Optional: Download and install x2go - A.1.1 - Optional: Download and install VSCode - A.4.2 - Optional: Make sure you can log into your server via x2go and via a terminal - Terminal on Mac, cmd on Windows, xterm on Linux - See A.1 about ssh -Y login from a terminal +- Git started with Git configuration and authentication: B.1 (replace with your name and email) + ```bash + $ git config --global user.name "Ben Bitdiddle" + $ git config --global user.email "ben_bitdiddle@wally.edu" + $ git config --global pull.rebase false + ``` +- Optional: Download and install x2go - A.1.1 +- Optional: Download and install VSCode - A.4.2 +- Optional: Make sure you can log into your server via x2go and via a terminal + - Terminal on Mac, cmd on Windows, xterm on Linux + - See A.1 about ssh -Y login from a terminal Then fork and clone the repo, source setup, make the tests and run regression - If you don't already have a Github account, create one - In a web browser, visit https://github.com/openhwgroup/cvw - In the upper right part of the screen, click on Fork - Create a fork, choosing the owner as your github account - and the repository as cvw. - - On the Linux computer where you will be working, log in - -Clone your fork of the repo. Change `` to your github id. - +1. If you don't already have a Github account, create one +2. In a web browser, visit https://github.com/openhwgroup/cvw +3. In the upper right part of the screen, click on Fork +4. Create a fork, choosing the owner as your github account and the repository as cvw. +5. On the Linux computer where you will be working, log in. +6. Clone your fork of the repo. Change `` to your github id. + ```bash $ git clone --recurse-submodules https://github.com//cvw $ cd cvw $ git remote add upstream https://github.com/openhwgroup/cvw + ``` -If you are installing on a new system without any tools installed, please jump to the next section, Toolchain Installation then come back here. +> [!NOTE] +> If you are installing on a new system without any tools installed, please jump to the next section, [Toolchain Installation](#toolchain-installation-and-configuration-sys-admin), then come back here. -Run the setup script to update your `PATH` and activate the python virtual environment. +7. Run the setup script to update your `PATH` and activate the python virtual environment. + ```bash $ source ./setup.sh + ``` -Add the following lines to your `.bashrc` or `.bash_profile` to run the setup script each time you log in. +8. Add the following lines to your `.bashrc` or `.bash_profile` to run the setup script each time you log in. + ```bash if [ -f ~/cvw/setup.sh ]; then source ~/cvw/setup.sh fi + ``` +9. Build the tests and run a regression simulation to prove everything is installed. Building tests may take a while. -Build the tests and run a regression simulation to prove everything is installed. Building tests will take a while. - + ```bash $ make --jobs $ regression-wally + ``` # Toolchain Installation and Configuration (Sys Admin) -This section describes the open source toolchain installation. +> This section describes the open source toolchain installation. ### Compatibility The current version of the toolchain has been tested on Ubuntu (versions 20.04 LTS, 22.04 LTS, and 24.04 LTS) and on Red Hat/Rocky/AlmaLinux (versions 8 and 9). > [!WARNING] -> Ubuntu 22.04LTS is incompatible with Synopsys Design Compiler. - -> [!WARNING] -> Verilator currently fails to simulate correctly on Ubuntu 20.04 LTS and Red Hat/Rocky/AlmaLinux 8. +> - Ubuntu 22.04LTS is incompatible with Synopsys Design Compiler. +> - Verilator currently fails to simulate correctly on Ubuntu 20.04 LTS and Red Hat/Rocky/AlmaLinux 8. ### Overview The toolchain installation script installs the following tools: @@ -89,21 +94,27 @@ Additionally, Buildroot Linux is built for Wally and linux test-vectors are gene The tools can be installed by running - $ $WALLY/bin/wally-tool-chain-install.sh - +```bash +$ $WALLY/bin/wally-tool-chain-install.sh +``` If this script is run as root or using `sudo`, it will also install all of the prerequisite packages using the system package manager. The default installation directory when run in this manner is `/opt/riscv`. If a user-level installation is desired, the script can instead be run by any user without `sudo` and the installation directory will be `~/riscv`. In this case, the prerequisite packages must first be installed by running - $ sudo $WALLY/bin/wally-package-install.sh +```bash +$ sudo $WALLY/bin/wally-package-install.sh +``` In either case, the installation directory can be overridden by passing the desired directory as the last argument to the installation script. For example, - $ sudo $WALLY/bin/wally-tool-chain-install.sh /home/riscv +```bash +$ sudo $WALLY/bin/wally-tool-chain-install.sh /home/riscv +``` See `wally-tool-chain-install.sh` for a detailed description of each component, or to issue the commands one at a time to install on the command line. -**NOTE:** The complete installation process requires ~55 GB of free space. If the `--clean` flag is passed as the first argument to the installation script then the final consumed space is only ~26 GB, but upgrading the tools requires reinstalling from scratch. +> [!NOTE] +> The complete installation process requires ~55 GB of free space. If the `--clean` flag is passed to the installation script then the final consumed space is only ~26 GB, but upgrading the tools will reinstall everything from scratch. ### Configuration `$WALLY/setup.sh` sources `$RISCV/site-setup.sh`. If the toolchain was installed in either of the default locations (`/opt/riscv` or `~/riscv`), `$RISCV` will automatically be set to the correct path when `setup.sh` is run. If a custom installation directory was used, then `$WALLY/setup.sh` must be modified to set the correct path. @@ -112,12 +123,13 @@ See `wally-tool-chain-install.sh` for a detailed description of each component, Change the following lines to point to the path and license server for your Siemens Questa and Synopsys Design Compiler and VCS installations and license servers. If you only have Questa or VCS, you can still simulate but cannot run logic synthesis. If Questa, VSC, or Design Compiler are already setup on this system then don't set these variables. - export MGLS_LICENSE_FILE=.. # Change this to your Siemens license server - export SNPSLMD_LICENSE_FILE=.. # Change this to your Synopsys license server - export QUESTA_HOME=.. # Change this for your path to Questa - export DC_HOME=.. # Change this for your path to Synopsys Design Compiler - export VCS_HOME=.. # Change this for your path to Synopsys VCS - +```bash +export MGLS_LICENSE_FILE=.. # Change this to your Siemens license server +export SNPSLMD_LICENSE_FILE=.. # Change this to your Synopsys license server +export QUESTA_HOME=.. # Change this for your path to Questa +export DC_HOME=.. # Change this for your path to Synopsys Design Compiler +export VCS_HOME=.. # Change this for your path to Synopsys VCS +``` # Installing EDA Tools @@ -131,39 +143,48 @@ Although most EDA tools are Linux-friendly, they tend to have issues when not in ### Siemens Questa -Siemens Questa simulates behavioral, RTL and gate-level HDL. To install Siemens Questa first go to a web browser and navigate to -https://eda.sw.siemens.com/en-US/ic/questa/simulation/advanced-simulator/. Click Sign In and log in with your credentials and the product can easily be downloaded and installed. Some Windows-based installations also require gcc libraries that are typically provided as a compressed zip download through Siemens. +Siemens Questa simulates behavioral, RTL and gate-level HDL. To install Siemens Questa first go to a web browser and navigate to https://eda.sw.siemens.com/en-US/ic/questa/simulation/advanced-simulator/. Click Sign In and log in with your credentials and the product can easily be downloaded and installed. Some Windows-based installations also require gcc libraries that are typically provided as a compressed zip download through Siemens. ### Synopsys Design Compiler (DC) -Many commercial synthesis and place and route tools require a common installer. These installers are provided by the EDA vendor and Synopsys has one called Synopsys Installer. To use Synopsys Installer, you will need to acquire a license through Synopsys that is typically Called Synopsys Common Licensing (SCL). Both the Synopsys Installer, license key file, and Design Compiler can all be downloaded through Synopsys Solvnet. First open a web browser, log into Synsopsy Solvnet, and download the installer and Design Compiler installation files. Then, install the Installer - - $ firefox & -Navigate to https://solvnet.synopsys.com -Log in with your institution’s username and password -Click on Downloads, then scroll down to Synopsys Installer -Select the latest version (currently 5.4). Click Download Here, agree, -Click on SynopsysInstaller_v5.4.run -Return to downloads and also get Design Compiler (synthesis) latest version, and any others you want. - Click on all parts and the .spf file, then click Download Files near the top -move the SynopsysInstaller into /cad/synopsys/Installer_5.4 with 755 permission for cad, -move other files into /cad/synopsys/downloads and work as user cad from here on - - $ cd /cad/synopsys/installer_5.4 - $ ./SynopsysInstaller_v5.4.run - Accept default installation directory - $ ./installer - Enter source path as /cad/synopsys/downloads, and installation path as /cad/synopsys - When prompted, enter your site ID - Follow prompts +Many commercial synthesis and place and route tools require a common installer. These installers are provided by the EDA vendor and Synopsys has one called Synopsys Installer. To use Synopsys Installer, you will need to acquire a license through Synopsys that is typically Called Synopsys Common Licensing (SCL). Both the Synopsys Installer, license key file, and Design Compiler can all be downloaded through Synopsys Solvnet. First open a web browser, log into Synsopsy Solvnet, and download the installer and Design Compiler installation files. Then, install the Installer. + +```bash +$ firefox & +``` + +- Navigate to https://solvnet.synopsys.com +- Log in with your institution’s username and password +- Click on Downloads, then scroll down to Synopsys Installer +- Select the latest version (currently 5.4). Click Download Here, agree, +- Click on SynopsysInstaller_v5.4.run +- Return to downloads and also get Design Compiler (synthesis) latest version, and any others you want. +- Click on all parts and the .spf file, then click Download Files near the top +- Move the SynopsysInstaller into `/cad/synopsys/Installer_5.4` with 755 permission for cad, +- move other files into `/cad/synopsys/downloads` and work as user cad from here on + +```bash +$ cd /cad/synopsys/installer_5.4 +$ ./SynopsysInstaller_v5.4.run +``` +- Accept default installation directory +```bash +$ ./installer +``` +- Enter source path as `/cad/synopsys/downloads`, and installation path as `/cad/synopsys` +- When prompted, enter your site ID +- Follow prompts Installer can be utilized in graphical or text-based modes. It is far easier to use the text-based installation tool. To install DC, navigate to the location where your downloaded DC files are and type installer. You should be prompted with questions related to where you wish to have your files installed. -The Synopsys Installer automatically installs all downloaded product files into a single top-level target directory. You do not need to specify the installation directory for each product. For example, if you specify /import/programs/synopsys as the target directory, your installation directory structure might look like this after installation: +The Synopsys Installer automatically installs all downloaded product files into a single top-level target directory. You do not need to specify the installation directory for each product. For example, if you specify `/import/programs/synopsys` as the target directory, your installation directory structure might look like this after installation: - /import/programs/synopsys/syn/S-2021.06-SP1 +```bash +/import/programs/synopsys/syn/S-2021.06-SP1 +``` -Note: Although most parts of Wally, including the Questa simulator, will work on most modern Linux platforms, as of 2022, the Synopsys CAD tools for SoC design are only supported on RedHat Enterprise Linux 7.4 or 8 or SUSE Linux Enterprise Server (SLES) 12 or 15. Moreover, the RISC-V formal specification (sail-riscv) does not build gracefully on RHEL7. +> [!Note] +> Although most parts of Wally, including the Questa simulator, will work on most modern Linux platforms, as of 2022, the Synopsys CAD tools for SoC design are only supported on RedHat Enterprise Linux 7.4 or 8 or SUSE Linux Enterprise Server (SLES) 12 or 15. Moreover, the RISC-V formal specification (sail-riscv) does not build gracefully on RHEL7. The Verilog simulation has been tested with Siemens Questa/ModelSim. This package is available to universities worldwide as part of the Design Verification Bundle through the Siemens Academic Partner Program members for $990/year. @@ -178,7 +199,7 @@ If you want to add a cronjob you can do the following: 1) Set up the email client `mutt` for your distribution 2) Enter `crontab -e` into a terminal 3) add this code to test building CVW and then running `regression-wally --nightly` at 9:30 PM each day -``` +```bash 30 21 * * * bash -l -c "source ~/PATH/TO/CVW/setup.sh; PATH_TO_CVW/cvw/bin/wrapper_nightly_runs.sh --path {PATH_TO_TEST_LOCATION} --target all --tests nightly --send_email harris@hmc.edu,kaitlin.verilog@gmail.com" ``` @@ -186,44 +207,57 @@ If you want to add a cronjob you can do the following: wsim runs one of multiple simulators, Questa, VCS, or Verilator using a specific configuration and either a suite of tests or a specific elf file. The general syntax is -wsim [--options] +`wsim [--options]` Parameters and options: - -h, --help show this help message and exit - --sim {questa,verilator,vcs}, -s {questa,verilator,vcs} Simulator - --tb {testbench,testbench_fp}, -t {testbench,testbench_fp} Testbench - --gui, -g Simulate with GUI - --coverage, -c Code & Functional Coverage - --fcov, -f Code & Functional Coverage - --args ARGS, -a ARGS Optional arguments passed to simulator via $value$plusargs - --vcd, -v Generate testbench.vcd - --lockstep, -l Run ImperasDV lock, step, and compare. - --locksteplog LOCKSTEPLOG, -b LOCKSTEPLOG Retired instruction number to be begin logging. - --covlog COVLOG, -d COVLOG Log coverage after n instructions. - --elfext ELFEXT, -e ELFEXT When searching for elf files only includes ones which end in this extension +``` +-h, --help show this help message and exit +--sim {questa,verilator,vcs}, -s {questa,verilator,vcs} Simulator +--tb {testbench,testbench_fp}, -t {testbench,testbench_fp} Testbench +--gui, -g Simulate with GUI +--coverage, -c Code & Functional Coverage +--fcov, -f Code & Functional Coverage +--args ARGS, -a ARGS Optional arguments passed to simulator via $value$plusargs +--vcd, -v Generate testbench.vcd +--lockstep, -l Run ImperasDV lock, step, and compare. +--locksteplog LOCKSTEPLOG, -b LOCKSTEPLOG Retired instruction number to be begin logging. +--covlog COVLOG, -d COVLOG Log coverage after n instructions. +--elfext ELFEXT, -e ELFEXT When searching for elf files only includes ones which end in this extension +``` Run basic test with questa - wsim rv64gc arch64i +```bash +wsim rv64gc arch64i +``` Run Questa with gui - wsim rv64gc wally64priv --gui +```bash +wsim rv64gc wally64priv --gui +``` -Run lockstep against ImperasDV with a single elf file in the --gui. Lockstep requires single elf. +Run lockstep against ImperasDV with a single elf file in the gui. Lockstep requires single elf. - wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/ref/ref.elf --lockstep --gui +```bash +wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/ref/ref.elf --lockstep --gui +``` Run lockstep against ImperasDV with a single elf file. Compute coverage. - wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/ref/ref.elf --lockstep --coverage +```bash +wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/ref/ref.elf --lockstep --coverage +``` Run lockstep against ImperasDV with directory file. - wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/ --lockstep +```bash +wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/ --lockstep +``` Run lockstep against ImperasDV with directory file and specify specific extension. - wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/ --lockstep --elfext ref.elf - +```bash +wsim rv64gc ../../tests/riscof/work/riscv-arch-test/rv64i_m/I/src/ --lockstep --elfext ref.elf +``` From 336a178da0429c43be8904f45b5a49fe2c253e5b Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 02:15:45 -0700 Subject: [PATCH 21/54] Fix appendix refs --- README.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/README.md b/README.md index 6319494631..62a59d5a29 100644 --- a/README.md +++ b/README.md @@ -16,17 +16,17 @@ Wally is presently at Technology Readiness Level 4, passing the RISC-V compatibi New users may wish to do the following setup to access the server via a GUI and use a text editor. -- Git started with Git configuration and authentication: B.1 (replace with your name and email) +- Git started with Git configuration and authentication: C.1 (replace with your name and email) ```bash $ git config --global user.name "Ben Bitdiddle" $ git config --global user.email "ben_bitdiddle@wally.edu" $ git config --global pull.rebase false ``` -- Optional: Download and install x2go - A.1.1 -- Optional: Download and install VSCode - A.4.2 +- Optional: Download and install x2go - B.1.1 +- Optional: Download and install VSCode - B.4.2 - Optional: Make sure you can log into your server via x2go and via a terminal - Terminal on Mac, cmd on Windows, xterm on Linux - - See A.1 about ssh -Y login from a terminal + - See B.1 about ssh -Y login from a terminal Then fork and clone the repo, source setup, make the tests and run regression From 05d86fc6cee21dfbfd20684d24bb9dd5cfac4a7f Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 15:08:32 -0700 Subject: [PATCH 22/54] Update fpga README formatting --- fpga/README.md | 52 ++++++++++++++++++++++++++++++++------------------ 1 file changed, 33 insertions(+), 19 deletions(-) diff --git a/fpga/README.md b/fpga/README.md index 236bc7ddbd..249df565bb 100644 --- a/fpga/README.md +++ b/fpga/README.md @@ -6,29 +6,39 @@ Wally supports the following boards # Quick Start -## build FPGA +## Build FPGA -`cd generator -make ` +```bash +cd generator +make +``` -example -`make vcu108` +Example: +```bash +make vcu108 +``` ## Make flash card image -ls /dev/sd* or ls /dev/mmc* to see which flash card devices you have. -Insert the flash card into the reader and ls /dev/sd* or /dev/mmc* again. The new device is the one you want to use. Make sure you select the root device (i.e. /dev/sdb) not the partition (i.e. /dev/sdb1). +`ls /dev/sd*` or `ls /dev/mmc*` to see which flash card devices you have. +Insert the flash card into the reader and `ls /dev/sd*` or `/dev/mmc*` again. The new device is the one you want to use. Make sure you select the root device (i.e. `/dev/sdb`) not the partition (i.e. `/dev/sdb1`). -`cd $WALLY/linux/sd-card` +```bash +cd $WALLY/linux/sd-card +``` This following script requires root. -`./flash-sd.sh -b -d ` +```bash +./flash-sd.sh -b -d +``` -example with vcu108, buildroot installed to /opt/riscv/buildroot, and the flash card is device /dev/sdc +Example with vcu108, buildroot installed to `/opt/riscv/buildroot`, and the flash card is device `/dev/sdc` -`./flash-sd.sh -b /opt/riscv/buildroot -d /opt/riscv/buildroot/output/images/wally-vcu108.dtb /dev/sdc` +```bash +./flash-sd.sh -b /opt/riscv/buildroot -d /opt/riscv/buildroot/output/images/wally-vcu108.dtb /dev/sdc +``` -Wait until the the script completes then remove the car. +Wait until the the script completes then remove the card. ## FPGA setup @@ -36,22 +46,26 @@ For the Arty A7 insert the PMOD daughter board into the right most slot and inse For the VCU108 and VCU118 boards insert the PMOD daughter board into the only PMOD slot on the right side of the boards. -Power on the boards. Arty A7 just plug in the USB connector. For the VCU boards make sure the power supply is connected and the two usb cables are connected. Flip on the switch. +Power on the boards. For Arty A7 just plug in the USB connector. For the VCU boards make sure the power supply is connected and the two usb cables are connected. Flip on the switch. The VCU118's on board UART converter does not work. Use a spark fun FTDI usb to UART adapter and plug into the mail PMOD on the right side of the board. Also the level sifters on the VCU118 do not work correctly with the digilent sd PMOD board. We have a custom board which works instead. -`cd $WALLY/fpga/generator -vivado &` +```bash +cd $WALLY/fpga/generator +vivado & +``` -open the design in the current directory WallyFPGA.xpr. +Open the design in the current directory `WallyFPGA.xpr`. Then click "Open Target" under "PROGRAM AND DEBUG". Then Program the device. ## Connect to UART -In another terminal ls /dev/ttyUSB*. One of these devices will be the UART connected to Wally. You may have to experiment by the running the following command multiple times. +In another terminal `ls /dev/ttyUSB*`. One of these devices will be the UART connected to Wally. You may have to experiment by the running the following command multiple times. -`screen /dev/ttyUSB1 115200` +```bash +screen /dev/ttyUSB1 115200 +``` -Swap out the USB1 for USB0 or USB1 as needed. +Swap out the `USB1` for `USB0` or `USB1` as needed. From c69f83224d7e87cbd072f5ab6183faa8de9118e6 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 15:18:04 -0700 Subject: [PATCH 23/54] Update SynthDC README formatting --- synthDC/README.md | 95 +++++++++++++++++++++++------------------------ 1 file changed, 47 insertions(+), 48 deletions(-) diff --git a/synthDC/README.md b/synthDC/README.md index 30a98a76b2..f0177d3698 100644 --- a/synthDC/README.md +++ b/synthDC/README.md @@ -1,42 +1,39 @@ -Synthesis for RISC-V Microprocessor System-on-Chip Design +# Synthesis for RISC-V Microprocessor System-on-Chip Design This subdirectory contains synthesis scripts for use with Synopsys (snps) Design Compiler (DC). Synthesis commands are found in -scripts/synth.tcl. +`scripts/synth.tcl`. -Example Usage +## Example Usage +```bash make synth DESIGN=wallypipelinedcore FREQ=500 CONFIG=rv32e - -environment variables - -DESIGN - Design provides the name of the output log. Default is synth. - -FREQ - Frequency in MHz. Default is 500 - -CONFIG - The Wally configuration file. The default is rv32e. - Examples: rv32e, rv64gc, rv32gc - -TECH - The target standard cell library. The default is sky130. - sky90: skywater 90nm TT 25C - sky130: skywater 130nm TT 25C - -SAIFPOWER - Controls if power analysis is driven by switching factor or - RTL modelsim simulation. When enabled requires a saif file - named power.saif. The default is 0. - 0: switching factor power analysis - 1: RTL simulation driven power analysis. - ------ -Extra Tool (PPA) +``` + +## Environment Variables + +- `DESIGN` + - Design provides the name of the output log. Default is synth. +- `FREQ` + - Frequency in MHz. Default is 500 +- `CONFIG` + - The Wally configuration file. The default is rv32e. + - Examples: rv32e, rv64gc, rv32gc +- `TECH` + - The target standard cell library. The default is sky130. + - Options: + - sky90: skywater 90nm TT 25C + - sky130: skywater 130nm TT 25C +- `SAIFPOWER` + - Controls if power analysis is driven by switching factor or RTL modelsim simulation. When enabled requires a saif file named power.saif. The default is 0. + - Options: + - 0: switching factor power analysis + - 1: RTL simulation driven power analysis. + +## Extra Tool (PPA) To run ppa analysis that hones into target frequency, you can type: -python3 ppa/ppaSynth.py from the synthDC directory. This runs a sweep -across all modules listed at the bottom of the ppaSynth.py file. +`python3 ppa/ppaSynth.py` from the synthDC directory. This runs a sweep +across all modules listed at the bottom of the `ppaSynth.py` file. Two options for running the sweep. The first run runs all modules for all techs around a given frequency (i.e., freqs). The second option @@ -44,19 +41,21 @@ will run all designs for the specific module based on bestSynths.csv values. Since the second option is 2nd, it has priority. If the second set of values is commented out, it will run all widths. -WARNING: The first option may runs lots of runs that could expend all -the licenses available for a license. Therefore, care must be taken -to be sure that enough licenses are available for this first option. - -##### Run specific syntheses - widths = [8, 16, 32, 64, 128] - modules = ['mul', 'adder', 'shifter', 'flop', 'comparator', 'binencoder', 'csa', 'mux2', 'mux4', 'mux8'] - techs = ['sky90', 'sky130', 'tsmc28', 'tsmc28psyn'] - freqs = [5000] - synthsToRun = allCombos(widths, modules, techs, freqs) - -##### Run a sweep based on best delay found in existing syntheses - module = 'adder' - width = 32 - tech = 'tsmc28psyn' - synthsToRun = freqSweep(module, width, tech) \ No newline at end of file +**WARNING:** The first option may runs lots of runs that could expend all the licenses available for a license. Therefore, care must be taken to be sure that enough licenses are available for this first option. + +### Run specific syntheses +```python +widths = [8, 16, 32, 64, 128] +modules = ['mul', 'adder', 'shifter', 'flop', 'comparator', 'binencoder', 'csa', 'mux2', 'mux4', 'mux8'] +techs = ['sky90', 'sky130', 'tsmc28', 'tsmc28psyn'] +freqs = [5000] +synthsToRun = allCombos(widths, modules, techs, freqs) +``` + +### Run a sweep based on best delay found in existing syntheses +```python +module = 'adder' +width = 32 +tech = 'tsmc28psyn' +synthsToRun = freqSweep(module, width, tech) +``` From 1e204f3c1223889dc19a4315cdfae8a30104d662 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 15:21:37 -0700 Subject: [PATCH 24/54] Update testfloat README formatting --- tests/fp/README.md | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/tests/fp/README.md b/tests/fp/README.md index 440f5eea8d..c4cd2b97b7 100644 --- a/tests/fp/README.md +++ b/tests/fp/README.md @@ -1,7 +1,7 @@ -james.stine@okstate.edu 14 Jan 2022 +james.stine@okstate.edu 14 Jan 2022\ jcarlin@hmc.edu Sept 2024 -## TestFloat for CVW +# TestFloat for CVW The CVW floating point unit is tested using testvectors from the Berkeley TestFloat suite, written originally by John Hauser. @@ -9,7 +9,7 @@ TestFloat and SoftFloat can be found as submodules in the addins directory, and - TestFloat: https://github.com/ucb-bar/berkeley-testfloat-3 - SoftFloat: https://github.com/ucb-bar/berkeley-softfloat-3 -### Compiling SoftFloat/TestFloat and Generating Testvectors +## Compiling SoftFloat/TestFloat and Generating Testvectors The entire testvector generation process can be performed by running make in this directory. @@ -17,7 +17,7 @@ The entire testvector generation process can be performed by running make in thi make --jobs ``` -This compiles SoftFloat for an x86_64 environment in its build/Linux-x86_64-GCC directory using the `SPECIALIZE_TYPE=RISCV` flag to get RISC-V behavior. TestFloat is then compiled in its build/Linux-x86_64-GCC directory using this SoftFloat library. +This compiles SoftFloat for an x86_64 environment in its `build/Linux-x86_64-GCC` directory using the `SPECIALIZE_TYPE=RISCV` flag to get RISC-V behavior. TestFloat is then compiled in its `build/Linux-x86_64-GCC` directory using this SoftFloat library. The Makefile in the vectors subdirectory of this directory is then called to generate testvectors for each rounding mode and operation. It also puts an underscore between each vector instead of a space to allow SystemVerilog `$readmemh` to read correctly. @@ -25,7 +25,7 @@ Testvectors for the combined integer floating-point divider are also generated. Although not needed, a `case.sh` script is included to change the case of the hex output. This is for those that do not like to see hexadecimal capitalized :P. -### Running TestFloat Vectors on Wally +## Running TestFloat Vectors on Wally TestFloat is run using the standard Wally simulation commands. @@ -40,15 +40,15 @@ wsim --tb testbench_fp ``` The choices for `` are as follows: ->cvtint - test integer conversion unit (fcvtint) -cvtfp - test floating-point conversion unit (fcvtfp) -cmp - test comparison unit's LT, LE, EQ opperations (fcmp) -add - test addition -fma - test fma -mul - test mult with fma -sub - test subtraction -div - test division -sqrt - test square root + cvtint - test integer conversion unit (fcvtint) + cvtfp - test floating-point conversion unit (fcvtfp) + cmp - test comparison unit's LT, LE, EQ opperations (fcmp) + add - test addition + fma - test fma + mul - test mult with fma + sub - test subtraction + div - test division + sqrt - test square root Any config that includes floating point support can be used. Each test will test all its vectors for all precisions supported by the given config. From 6d00ae98ea93aaa0cf066addede417bcf222be69 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 15:29:39 -0700 Subject: [PATCH 25/54] Update linux README formatting --- linux/README.MD | 35 ++++++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/linux/README.MD b/linux/README.MD index ba7fb8dd4a..7eb50dd9ff 100644 --- a/linux/README.MD +++ b/linux/README.MD @@ -14,21 +14,27 @@ In order to generate the Linux and boot stage binaries compatible with Wally, Bu To set up a Buildroot directory, configuration files for Buildroot, Linux, and Busybox must be copied into the correct locations inside the main Buildroot directory. Buildroot and device tree binaries must be generated as well. This can all be done automatically using the Makefile inside Wally's Linux subdirectory (this one). To install a new buildroot directory, build the Buildroot binaries, generate the device tree binaries, generate test-vectors for simulation, and install the buildroot package needed to build the SD card driver for Linux, run: - $ make +```bash +$ make +``` This installs to the `$RISCV` directory. Buildroot itself is installed to `$RISCV/buildroot` and the test-vectors are installed to `$RISCV/linux-testvectors`. Optionally, you can override the `BUILDROOT` variable to install a different buildroot source directory. - $ make install BUILDROOT=path/to/buildroot +``` +$ make install BUILDROOT= +``` ## Generating Device Tree Binaries -The device tree files for the various FPGA's Wally supports, as well as QEMU's device tree for the virt machine, are located in the `./devicetree` subdirectory. These device tree files are necessary for the boot process. +The device tree files for the various FPGAs Wally supports, as well as QEMU's device tree for the virt machine, are located in the `./devicetree` subdirectory. These device tree files are necessary for the boot process. They are built automatically using the main `make` command. To build the device tree binaries (.dtb) from the device tree sources (.dts) separately, we can build all of them at once using: - $ make generate #optionally override BUILDROOT +```bash +$ make generate # optionally override BUILDROOT +``` The .dts files will end up in the `/output/images` folder of your chosen buildroot directory. @@ -38,23 +44,30 @@ By using the `riscv64-unknown-elf-objdump` utility, we can disassemble the binar The disassembled binaries are built automatically using the main `make` command. To create the disassembled binaries separately, run: - $ make disassemble #optionally override BUILDROOT +```bash +$ make disassemble # optionally override BUILDROOT +``` You'll find the resulting disassembled files in `/output/images/disassembly`. ## Generate Memory Files for Linux Boot -Running a linux boot simulation uses a preloaded bootrom and ram memory. We use QEMU to generate these preloaded memory files. The files are output to $RISCV/linux-testvectors. The memory files are generated automatically when using the main `make` command. Alternatively, they can be generated by running +Running a linux boot simulation uses a preloaded bootrom and ram memory. We use QEMU to generate these preloaded memory files. The files are output to `$RISCV/linux-testvectors`. The memory files are generated automatically when using the main `make` command. Alternatively, they can be generated by running - make dumptvs +```bash +$ make dumptvs +``` ## Creating a Bootable SD Card To flash a bootable sd card for Wally's bootloader, use the `flash-sd.sh` script located in `/linux/sdcard`. The script allows you to specify which buildroot directory you would like to use and to specify the device tree. By default it is set up for the default location of buildroot in `$RISCV` and uses the vcu108 device tree. To use the script with your own buildroot directory and device tree, type: - $ cd sdcard - $ ./flash-sd.sh -b -d +```bash +$ cd sdcard +$ ./flash-sd.sh -b -d +``` for example - - $ ./flash-sd.sh -b ~/repos/buildroot -d wally-vcu118.dtb /dev/sdb +```bash +$ ./flash-sd.sh -b ~/repos/buildroot -d wally-vcu118.dtb /dev/sdb +``` From 34ccd5a3912db43b84cdf4c5deb5d22d6612a24f Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Thu, 17 Oct 2024 15:38:58 -0700 Subject: [PATCH 26/54] Update and combine Linux READMEs --- docs/README-linux.md | 41 ----------------------------------------- linux/README.MD | 6 ++++-- 2 files changed, 4 insertions(+), 43 deletions(-) delete mode 100644 docs/README-linux.md diff --git a/docs/README-linux.md b/docs/README-linux.md deleted file mode 100644 index 63a3f5e2bd..0000000000 --- a/docs/README-linux.md +++ /dev/null @@ -1,41 +0,0 @@ -### Cross-Compile Buildroot Linux - -Building Linux is only necessary for exploring the boot process in Chapter 17. Building and generating a trace is a time-consuming operation that could be skipped for now; you can return to this section later if you are interested in the Linux details. - -Buildroot depends on configuration files in riscv-wally, so the cad user must install Wally first according to the instructions in Section 2.2.2. However, don’t source ~/wally-riscv/setup.sh because it will set LD_LIBRARY_PATH in a way to cause make to fail on buildroot. - -To configure and build Buildroot: - - $ cd $RISCV - $ export WALLY=~/riscv-wally # make sure you haven’t sourced ~/riscv-wally/setup.sh by now - $ git clone https://github.com/buildroot/buildroot.git - $ cd buildroot - $ git checkout 2021.05 # last tested working version - $ cp -r $WALLY/linux/buildroot-config-src/wally ./board - $ cp ./board/wally/main.config .config - $ make --jobs - -To generate disassembly files and the device tree, run another make script. Note that you can expect some warnings about phandle references while running dtc on wally-virt.dtb. -Depending on your system configuration this makefile may need a bit of tweaking. It places the output buildroot images in $RISCV/linux-testvectors and the buildroot object dumps in $RISCV/buildroot/output/images/disassembly. If these directories are owned by root then the makefile will likely fail. You can either change the makefile's target directories or change temporarily change the owner of the two directories. - -$ source ~/riscv-wally/setup.sh -$ cd $WALLY/linux/buildroot-scripts -$ make all - -Note: When the make tasks complete, you’ll find source code in $RISCV/buildroot/output/build and the executables in $RISCV/buildroot/output/images. - -### Generate load images for linux boot - -The Questa linux boot uses preloaded bootram and ram memory. We use QEMU to generate these preloaded memory files. Files output in $RISCV/linux-testvectors - - cd cvw/linux/testvector-generation - ./genInitMem.sh - -This may require changing file permissions to the linux-testvectors directory. - -### Generate QEMU linux trace - -The linux testbench can instruction by instruction compare Wally's committed instructions against QEMU. To do this QEMU outputs a log file consisting of all instructions executed. Interrupts are handled by forcing the testbench to generate an interrupt at the same cycle as in QEMU. Generating this trace will take more than 24 hours. - - cd cvw/linux/testvector-generation - ./genTrace.sh diff --git a/linux/README.MD b/linux/README.MD index 7eb50dd9ff..b7a031ce66 100644 --- a/linux/README.MD +++ b/linux/README.MD @@ -12,7 +12,9 @@ In order to generate the Linux and boot stage binaries compatible with Wally, Buildroot is used for cross-compilation. -To set up a Buildroot directory, configuration files for Buildroot, Linux, and Busybox must be copied into the correct locations inside the main Buildroot directory. Buildroot and device tree binaries must be generated as well. This can all be done automatically using the Makefile inside Wally's Linux subdirectory (this one). To install a new buildroot directory, build the Buildroot binaries, generate the device tree binaries, generate test-vectors for simulation, and install the buildroot package needed to build the SD card driver for Linux, run: +To set up a Buildroot directory, configuration files for Buildroot, Linux, and Busybox must be copied into the correct locations inside the main Buildroot directory. Buildroot and device tree binaries must be generated as well. + +This can all be done automatically using the Makefile inside Wally's Linux subdirectory (this one). The main Wally installation script (`bin/wally-tool-chain-install.sh`) runs this by default, so buildroot is likely already setup. Otherwise, to install a new buildroot directory, build the Buildroot binaries, generate the device tree binaries, and generate testvectors for simulation run: ```bash $ make @@ -22,7 +24,7 @@ This installs to the `$RISCV` directory. Buildroot itself is installed to `$RISC Optionally, you can override the `BUILDROOT` variable to install a different buildroot source directory. -``` +```bash $ make install BUILDROOT= ``` From 60a12efa3067289c2d940780594fd04a221b3679 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 01:00:19 -0700 Subject: [PATCH 27/54] Test user install to custom location --- .github/workflows/install.yml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index dfa4495261..857283e175 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -67,6 +67,12 @@ jobs: os: ubuntu-latest image: null riscv_path: /home/riscv + # Custom location user level installation + - name: custom-user-install + os: ubuntu-latest + image: null + user: true + riscv_path: $HOME/riscv # run on selected version of ubuntu or on ubuntu-latest with docker image runs-on: ${{ matrix.os }} From 32c6427ae953c5c194c4b0de649e071150fe7253 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 13:36:38 -0700 Subject: [PATCH 28/54] Only suggest installation log if it exists --- bin/wally-tool-chain-install.sh | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index c722abf814..9e7a91327c 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -48,7 +48,9 @@ ENDC='\033[0m' # Reset to default color error() { echo -e "${FAIL_COLOR}Error: $STATUS installation failed" echo -e "Error on line ${BASH_LINENO[0]} with command $BASH_COMMAND${ENDC}" - echo -e "Please check the log in $RISCV/logs/$STATUS.log for more information." + if [ -e "$RISCV/logs/$STATUS.log" ]; then + echo -e "Please check the log in $RISCV/logs/$STATUS.log for more information." + fi exit 1 } From 871bae19249344dfee26254ac7b870b1d10b7b37 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 14:18:48 -0700 Subject: [PATCH 29/54] Refactor git_check function to be far more readable --- bin/wally-tool-chain-install.sh | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 9e7a91327c..91b6dc7162 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -55,16 +55,37 @@ error() { } # Check if a git repository exists, is up to date, and has been installed -# Clones the repository if it doesn't exist +# clones the repository if it doesn't exist +# $1: repo name +# $2: repo url to clone from +# $3: file to check if already installed +# $4: upstream branch, optional, default is master git_check() { local repo=$1 local url=$2 local check=$3 local branch="${4:-master}" - if [[ ((! -e $repo) && ($(git clone "$url") || true)) || ($(cd "$repo"; git fetch; git rev-parse HEAD) != $(cd "$repo"; git rev-parse origin/"$branch")) || (! -e $check) ]]; then - return 0 + + # Clone repo if it doesn't exist + if [[ ! -e $repo ]]; then + git clone "$url" + fi + + # Get the current HEAD commit hash and the remote branch commit hash + cd "$repo" + git fetch + local local_head=$(git rev-parse HEAD) + local remote_head=$(git rev-parse origin/"$branch") + + # Check if the git repository is not up to date or the specified file does not exist + if [[ "$local_head" != "$remote_head" ]]; then + echo "$repo is not up to date" + true + elif [[ ! -e $check ]]; then + echo "$check does not exist" + true else - return 1 + false fi } From 57400a12b37f204a8e901c8ea54bd5c2284fba8c Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 14:22:48 -0700 Subject: [PATCH 30/54] Refactor logger function to be more readable --- bin/wally-tool-chain-install.sh | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 91b6dc7162..fcd3504cf9 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -91,8 +91,13 @@ git_check() { # Log output to a file and only print lines with keywords logger() { - local log="$RISCV/logs/$1.log" - cat < /dev/stdin | tee -a "$log" | (grep -iE --color=never "(\bwarning|\berror|\bfail|\bsuccess|\bstamp|\bdoesn't work)" || true) | (grep -viE --color=never "(_warning|warning_|_error|error_|-warning|warning-|-error|error-|Werror|error\.o|warning flags)" || true) + local log_file="$RISCV/logs/$1.log" + local keyword_pattern="(\bwarning|\berror|\bfail|\bsuccess|\bstamp|\bdoesn't work)" + local exclude_pattern="(_warning|warning_|_error|error_|-warning|warning-|-error|error-|Werror|error\.o|warning flags)" + + cat < /dev/stdin | tee -a "$log_file" | \ + (grep -iE --color=never "$keyword_pattern" || true) | \ + (grep -viE --color=never "$exclude_pattern" || true) } set -e # break on error From 8fb7aef7d91f4e640f207c7b5051aceebf6ec379 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 15:32:03 -0700 Subject: [PATCH 31/54] Switch to wget for improved error handling --- bin/wally-tool-chain-install.sh | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index fcd3504cf9..b1714e817d 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -219,7 +219,9 @@ if (( RHEL_VERSION == 8 )) || (( UBUNTU_VERSION == 20 )); then section_header "Installing glib" pip install -U meson # Meson is needed to build glib cd "$RISCV" - curl --location https://download.gnome.org/sources/glib/2.70/glib-2.70.5.tar.xz | tar xJ + wget --retry-connrefused --retry-on-host-error https://download.gnome.org/sources/glib/2.70/glib-2.70.5.tar.xz + tar -xJf glib-2.70.5.tar.xz + rm -f glib-2.70.5.tar.xz cd glib-2.70.5 meson setup _build --prefix="$RISCV" meson compile -C _build @@ -236,7 +238,9 @@ if (( RHEL_VERSION == 8 )); then if [ ! -e "$RISCV"/include/gmp.h ]; then section_header "Installing gmp" cd "$RISCV" - curl --location https://ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz | tar xJ + wget --retry-connrefused --retry-on-host-error https://ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz + tar -xJf gmp-6.3.0.tar.xz + rm -f gmp-6.3.0.tar.xz cd gmp-6.3.0 ./configure --prefix="$RISCV" make -j "${NUM_THREADS}" @@ -380,7 +384,9 @@ section_header "Installing/Updating Sail Compiler" STATUS="Sail Compiler" if [ ! -e "$RISCV"/bin/sail ]; then cd "$RISCV" - curl --location https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz | tar xvz --directory="$RISCV" --strip-components=1 + wget --retry-connrefused --retry-on-host-error --output-document=sail.tar.gz https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz + tar xz --directory="$RISCV" --strip-components=1 -f sail.tar.gz + rm -f sail.tar.gz echo -e "${SUCCESS_COLOR}Sail Compiler successfully installed/updated!${ENDC}" else echo -e "${SUCCESS_COLOR}Sail Compiler already installed.${ENDC}" @@ -456,8 +462,8 @@ section_header "Downloading Site Setup Script" STATUS="site-setup scripts" cd "$RISCV" if [ ! -e "${RISCV}"/site-setup.sh ]; then - wget https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh - wget https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.csh + wget --retry-connrefused --retry-on-host-error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh + wget --retry-connrefused --retry-on-host-error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.csh echo -e "${SUCCESS_COLOR}Site setup script successfully downloaded!${ENDC}" echo -e "${WARNING_COLOR}Make sure to edit the environment variables in $RISCV/site-setup.sh (or .csh) to point to your installation of EDA tools and licensce files.${ENDC}" else From fbf607af324296e402473acfe4d4ff5587f9a8dd Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 15:48:22 -0700 Subject: [PATCH 32/54] Retry git clone if failure --- bin/wally-tool-chain-install.sh | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index b1714e817d..0ada8b0b42 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -68,7 +68,16 @@ git_check() { # Clone repo if it doesn't exist if [[ ! -e $repo ]]; then - git clone "$url" + for ((i=1; i<=5; i++)); do + git clone "$url" && break + echo -e "${WARNING_COLOR}Failed to clone $repo. Retrying.${ENDC}" + rm -rf "$repo" + sleep $i + done + if [[ ! -e $repo ]]; then + echo -e "${ERROR_COLOR}Failed to clone $repo after 5 attempts. Exiting.${ENDC}" + exit 1 + fi fi # Get the current HEAD commit hash and the remote branch commit hash @@ -79,10 +88,9 @@ git_check() { # Check if the git repository is not up to date or the specified file does not exist if [[ "$local_head" != "$remote_head" ]]; then - echo "$repo is not up to date" + echo "$repo is not up to date. Updating now." true elif [[ ! -e $check ]]; then - echo "$check does not exist" true else false From fe43880a235c8f8b74e3c95dbaee567da9dce180 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 16:15:32 -0700 Subject: [PATCH 33/54] Fix path issues --- bin/wally-tool-chain-install.sh | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 0ada8b0b42..4c337434f6 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -271,7 +271,7 @@ STATUS="riscv-gnu-toolchain" cd "$RISCV" # Temporarily pin riscv-gnu-toolchain to use GCC 13.2.0. GCC 14 does not work with the Q extension. if git_check "riscv-gnu-toolchain" "https://github.com/riscv/riscv-gnu-toolchain" "$RISCV/riscv-gnu-toolchain/stamps/build-gcc-newlib-stage2"; then - cd riscv-gnu-toolchain + cd "$RISCV"/riscv-gnu-toolchain git reset --hard && git clean -f && git checkout master && git pull ./configure --prefix="${RISCV}" --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] @@ -297,7 +297,7 @@ STATUS="elf2hex" cd "$RISCV" export PATH=$RISCV/bin:$PATH if git_check "elf2hex" "https://github.com/sifive/elf2hex.git" "$RISCV/bin/riscv64-unknown-elf-elf2bin"; then - cd elf2hex + cd "$RISCV"/elf2hex git reset --hard && git clean -f && git checkout master && git pull autoreconf -i ./configure --target=riscv64-unknown-elf --prefix="$RISCV" @@ -319,7 +319,7 @@ section_header "Installing/Updating QEMU" STATUS="qemu" cd "$RISCV" if git_check "qemu" "https://github.com/qemu/qemu" "$RISCV/include/qemu-plugin.h"; then - cd qemu + cd "$RISCV"/qemu git reset --hard && git clean -f && git checkout master && git pull --recurse-submodules -j "${NUM_THREADS}" git submodule update --init --recursive ./configure --target-list=riscv64-softmmu --prefix="$RISCV" @@ -341,7 +341,7 @@ section_header "Installing/Updating SPIKE" STATUS="spike" cd "$RISCV" if git_check "riscv-isa-sim" "https://github.com/riscv-software-src/riscv-isa-sim" "$RISCV/lib/pkgconfig/riscv-riscv.pc"; then - cd riscv-isa-sim + cd "$RISCV"/riscv-isa-sim git reset --hard && git clean -f && git checkout master && git pull mkdir -p build cd build @@ -367,7 +367,7 @@ STATUS="verilator" cd "$RISCV" if git_check "verilator" "https://github.com/verilator/verilator" "$RISCV/share/pkgconfig/verilator.pc"; then unset VERILATOR_ROOT - cd verilator + cd "$RISCV"/verilator git reset --hard && git clean -f && git checkout master && git pull autoconf ./configure --prefix="$RISCV" @@ -405,7 +405,7 @@ fi section_header "Installing/Updating RISC-V Sail Model" STATUS="riscv-sail-model" if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_RV32"; then - cd sail-riscv + cd "$RISCV"/sail-riscv git reset --hard && git clean -f && git checkout master && git pull ARCH=RV64 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV64 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] ARCH=RV32 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV32 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] @@ -428,7 +428,7 @@ STATUS="OSU Skywater 130 cell library" mkdir -p "$RISCV"/cad/lib cd "$RISCV"/cad/lib if git_check "sky130_osu_sc_t12" "https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12" "$RISCV/cad/lib/sky130_osu_sc_t12" "main"; then - cd sky130_osu_sc_t12 + cd "$RISCV"/sky130_osu_sc_t12 git reset --hard && git clean -f && git checkout main && git pull echo -e "${SUCCESS_COLOR}OSU Skywater library successfully installed!${ENDC}" else From 51d5c81392fd47683d0308eaead92e946dfebecf Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 16:18:46 -0700 Subject: [PATCH 34/54] Incompatible options on red hat 8 --- bin/wally-tool-chain-install.sh | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 4c337434f6..07dc6252b6 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -147,6 +147,12 @@ fi export PATH=$PATH:$RISCV/bin:/usr/bin export PKG_CONFIG_PATH=$RISCV/lib64/pkgconfig:$RISCV/lib/pkgconfig:$RISCV/share/pkgconfig:$RISCV/lib/x86_64-linux-gnu/pkgconfig:$PKG_CONFIG_PATH +if (( RHEL_VERSION == 8 )); then + retry_on_host_error="" +else + retry_on_host_error="--retry-on-host-error" +fi + # Check for incompatible PATH environment variable before proceeding with installation if [[ ":$PATH:" == *::* || ":$PATH:" == *:.:* ]]; then echo -e "${FAIL_COLOR}Error: You seem to have the current working directory in your \$PATH environment variable." @@ -227,7 +233,7 @@ if (( RHEL_VERSION == 8 )) || (( UBUNTU_VERSION == 20 )); then section_header "Installing glib" pip install -U meson # Meson is needed to build glib cd "$RISCV" - wget --retry-connrefused --retry-on-host-error https://download.gnome.org/sources/glib/2.70/glib-2.70.5.tar.xz + wget --retry-connrefused "$retry_on_host_error" https://download.gnome.org/sources/glib/2.70/glib-2.70.5.tar.xz tar -xJf glib-2.70.5.tar.xz rm -f glib-2.70.5.tar.xz cd glib-2.70.5 @@ -246,7 +252,7 @@ if (( RHEL_VERSION == 8 )); then if [ ! -e "$RISCV"/include/gmp.h ]; then section_header "Installing gmp" cd "$RISCV" - wget --retry-connrefused --retry-on-host-error https://ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz + wget --retry-connrefused "$retry_on_host_error" https://ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz tar -xJf gmp-6.3.0.tar.xz rm -f gmp-6.3.0.tar.xz cd gmp-6.3.0 @@ -392,7 +398,7 @@ section_header "Installing/Updating Sail Compiler" STATUS="Sail Compiler" if [ ! -e "$RISCV"/bin/sail ]; then cd "$RISCV" - wget --retry-connrefused --retry-on-host-error --output-document=sail.tar.gz https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz + wget --retry-connrefused "$retry_on_host_error" --output-document=sail.tar.gz https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz tar xz --directory="$RISCV" --strip-components=1 -f sail.tar.gz rm -f sail.tar.gz echo -e "${SUCCESS_COLOR}Sail Compiler successfully installed/updated!${ENDC}" @@ -470,8 +476,8 @@ section_header "Downloading Site Setup Script" STATUS="site-setup scripts" cd "$RISCV" if [ ! -e "${RISCV}"/site-setup.sh ]; then - wget --retry-connrefused --retry-on-host-error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh - wget --retry-connrefused --retry-on-host-error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.csh + wget --retry-connrefused "$retry_on_host_error" https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh + wget --retry-connrefused "$retry_on_host_error" https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.csh echo -e "${SUCCESS_COLOR}Site setup script successfully downloaded!${ENDC}" echo -e "${WARNING_COLOR}Make sure to edit the environment variables in $RISCV/site-setup.sh (or .csh) to point to your installation of EDA tools and licensce files.${ENDC}" else From cb0025dffe53d921fc7a7c6ac9ea1cabedcacc57 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 16:40:11 -0700 Subject: [PATCH 35/54] Additional validation in Linux Makefile --- linux/Makefile | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/linux/Makefile b/linux/Makefile index aadf24bdc1..74cabcf328 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -27,9 +27,16 @@ BINARIES := fw_jump.elf vmlinux busybox OBJDUMPS := $(foreach name, $(BINARIES), $(basename $(name) .elf)) OBJDUMPS := $(foreach name, $(OBJDUMPS), $(DIS)/$(name).objdump) -.PHONY: all generate disassemble install clean cleanDTB cleanDriver check_write_permissions +.PHONY: all generate disassemble install clean cleanDTB check_write_permissions check_environment -all: check_write_permissions clean download Image disassemble install dumptvs +all: check_environment check_write_permissions clean download Image disassemble install dumptvs + +check_environment: $(RISCV) +ifeq ($(findstring :$(RISCV)/lib:,:$(LD_LIBRARY_PATH):),) + @(echo "ERROR: Your environment variables are not set correctly." >&2 \ + && echo "Make sure to source setup.sh or install buildroot using the wally-tool-chain-install.sh script." >&2 \ + && exit 1) +endif check_write_permissions: ifeq ($(SUDO), sudo) @@ -41,24 +48,24 @@ endif && exit 1) @$(SUDO) rm -r $(RISCV)/.test -Image: +Image: check_environment bash -c "unset LD_LIBRARY_PATH; $(MAKE) -C $(BUILDROOT)" $(MAKE) generate @echo "Buildroot Image successfully generated." -install: check_write_permissions +install: check_write_permissions check_environment $(SUDO) rm -rf $(RISCV)/$(BUILDROOT) $(SUDO) mv $(BUILDROOT) $(RISCV)/$(BUILDROOT) @echo "Buildroot successfully installed." -dumptvs: check_write_permissions +dumptvs: check_write_permissions check_environment $(SUDO) mkdir -p $(RISCV)/linux-testvectors cd testvector-generation; ./genInitMem.sh @echo "Testvectors successfully generated." generate: $(DTB) $(IMAGES) -$(IMAGES)/%.dtb: ./devicetree/%.dts +$(IMAGES)/%.dtb: check_environment ./devicetree/%.dts dtc -I dts -O dtb $< > $@ $(IMAGES): @@ -70,7 +77,7 @@ $(RISCV): @ echo "and sourced setup.sh" # Disassembly rules --------------------------------------------------- -disassemble: +disassemble: check_environment rm -rf $(BUILDROOT)/output/images/disassembly find $(BUILDROOT)/output/build/linux-* -maxdepth 1 -name "vmlinux" | xargs cp -t $(BUILDROOT)/output/images/ mkdir -p $(DIS) @@ -114,9 +121,6 @@ $(BUILDROOT): # --------------------------------------------------------------------- -cleanDriver: - rm -f $(DRIVER) - cleanDTB: rm -f $(IMAGES)/*.dtb From f0e58b8fbab675568990be26d0b3ac87241128b5 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 16:47:03 -0700 Subject: [PATCH 36/54] Fix syntax error --- bin/wally-tool-chain-install.sh | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index 07dc6252b6..bbbc420937 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -147,9 +147,7 @@ fi export PATH=$PATH:$RISCV/bin:/usr/bin export PKG_CONFIG_PATH=$RISCV/lib64/pkgconfig:$RISCV/lib/pkgconfig:$RISCV/share/pkgconfig:$RISCV/lib/x86_64-linux-gnu/pkgconfig:$PKG_CONFIG_PATH -if (( RHEL_VERSION == 8 )); then - retry_on_host_error="" -else +if (( RHEL_VERSION != 8 )); then retry_on_host_error="--retry-on-host-error" fi From 0ee9fc779c5bd8cac3d03ac2c23aea5e61e17edb Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 19:06:11 -0700 Subject: [PATCH 37/54] Always set environ variables so logs upload correctly --- .github/workflows/install.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index 857283e175..e8c4312381 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -114,6 +114,7 @@ jobs: fi # Set environment variables for the rest of the job - name: Set Environment Variables + if: always() run: | if [ ! -z ${{ matrix.riscv_path }} ]; then sed -i 's,exit 1,export RISCV=${{ matrix.riscv_path }},g' setup.sh From 401b37dd93bbc1cf9860fadb589683bee4461488 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 19:08:49 -0700 Subject: [PATCH 38/54] Fix Linux Makefile --- linux/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux/Makefile b/linux/Makefile index 74cabcf328..b098b0a8b8 100644 --- a/linux/Makefile +++ b/linux/Makefile @@ -65,7 +65,7 @@ dumptvs: check_write_permissions check_environment generate: $(DTB) $(IMAGES) -$(IMAGES)/%.dtb: check_environment ./devicetree/%.dts +$(IMAGES)/%.dtb: ./devicetree/%.dts dtc -I dts -O dtb $< > $@ $(IMAGES): From 150365d320f5056eab6617c6fee1019c174149f4 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 22:18:08 -0700 Subject: [PATCH 39/54] fix wget --- bin/wally-tool-chain-install.sh | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index bbbc420937..db48e08e55 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -231,7 +231,7 @@ if (( RHEL_VERSION == 8 )) || (( UBUNTU_VERSION == 20 )); then section_header "Installing glib" pip install -U meson # Meson is needed to build glib cd "$RISCV" - wget --retry-connrefused "$retry_on_host_error" https://download.gnome.org/sources/glib/2.70/glib-2.70.5.tar.xz + wget -nv --retry-connrefused $retry_on_host_error https://download.gnome.org/sources/glib/2.70/glib-2.70.5.tar.xz tar -xJf glib-2.70.5.tar.xz rm -f glib-2.70.5.tar.xz cd glib-2.70.5 @@ -250,7 +250,7 @@ if (( RHEL_VERSION == 8 )); then if [ ! -e "$RISCV"/include/gmp.h ]; then section_header "Installing gmp" cd "$RISCV" - wget --retry-connrefused "$retry_on_host_error" https://ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz + wget -nv --retry-connrefused $retry_on_host_error https://ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz tar -xJf gmp-6.3.0.tar.xz rm -f gmp-6.3.0.tar.xz cd gmp-6.3.0 @@ -396,7 +396,7 @@ section_header "Installing/Updating Sail Compiler" STATUS="Sail Compiler" if [ ! -e "$RISCV"/bin/sail ]; then cd "$RISCV" - wget --retry-connrefused "$retry_on_host_error" --output-document=sail.tar.gz https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz + wget -nv --retry-connrefused $retry_on_host_error --output-document=sail.tar.gz https://github.com/rems-project/sail/releases/latest/download/sail.tar.gz tar xz --directory="$RISCV" --strip-components=1 -f sail.tar.gz rm -f sail.tar.gz echo -e "${SUCCESS_COLOR}Sail Compiler successfully installed/updated!${ENDC}" @@ -474,8 +474,8 @@ section_header "Downloading Site Setup Script" STATUS="site-setup scripts" cd "$RISCV" if [ ! -e "${RISCV}"/site-setup.sh ]; then - wget --retry-connrefused "$retry_on_host_error" https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh - wget --retry-connrefused "$retry_on_host_error" https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.csh + wget -nv --retry-connrefused $retry_on_host_error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.sh + wget -nv --retry-connrefused $retry_on_host_error https://raw.githubusercontent.com/openhwgroup/cvw/main/site-setup.csh echo -e "${SUCCESS_COLOR}Site setup script successfully downloaded!${ENDC}" echo -e "${WARNING_COLOR}Make sure to edit the environment variables in $RISCV/site-setup.sh (or .csh) to point to your installation of EDA tools and licensce files.${ENDC}" else From 19a14a231c44d78a129f6c8e24626784c10f68f8 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 22:37:55 -0700 Subject: [PATCH 40/54] Log installation of old distro dependencies --- bin/wally-tool-chain-install.sh | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index db48e08e55..f20da4e221 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -236,8 +236,8 @@ if (( RHEL_VERSION == 8 )) || (( UBUNTU_VERSION == 20 )); then rm -f glib-2.70.5.tar.xz cd glib-2.70.5 meson setup _build --prefix="$RISCV" - meson compile -C _build - meson install -C _build + meson compile -C _build -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + meson install -C _build 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] cd "$RISCV" rm -rf glib-2.70.5 echo -e "${SUCCESS_COLOR}glib successfully installed!${ENDC}" @@ -255,8 +255,8 @@ if (( RHEL_VERSION == 8 )); then rm -f gmp-6.3.0.tar.xz cd gmp-6.3.0 ./configure --prefix="$RISCV" - make -j "${NUM_THREADS}" - make install + make -j "${NUM_THREADS}" 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] + make install 2>&1 | logger $STATUS; [ "${PIPESTATUS[0]}" == 0 ] cd "$RISCV" rm -rf gmp-6.3.0 echo -e "${SUCCESS_COLOR}gmp successfully installed!${ENDC}" From 0f1f9ab3417654588f3186838a28e988abbdaa84 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sun, 20 Oct 2024 22:53:42 -0700 Subject: [PATCH 41/54] Fix custom user install location --- .github/workflows/install.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/install.yml b/.github/workflows/install.yml index e8c4312381..a49761e8a5 100644 --- a/.github/workflows/install.yml +++ b/.github/workflows/install.yml @@ -72,7 +72,7 @@ jobs: os: ubuntu-latest image: null user: true - riscv_path: $HOME/riscv + riscv_path: $HOME/riscv-toolchain # run on selected version of ubuntu or on ubuntu-latest with docker image runs-on: ${{ matrix.os }} From a4cda877efdc5f2d19ad05252b16c57a76aea782 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Mon, 21 Oct 2024 14:52:40 -0500 Subject: [PATCH 42/54] Fixed bit position of SPI fifo receive and transmit flags. --- src/uncore/spi_apb.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/uncore/spi_apb.sv b/src/uncore/spi_apb.sv index 91021e2b6d..57260e769f 100644 --- a/src/uncore/spi_apb.sv +++ b/src/uncore/spi_apb.sv @@ -221,8 +221,8 @@ module spi_apb import cvw::*; #(parameter cvw_t P) ( SPI_DELAY0: Dout <= {8'b0, Delay0[15:8], 8'b0, Delay0[7:0]}; SPI_DELAY1: Dout <= {8'b0, Delay1[15:8], 8'b0, Delay1[7:0]}; SPI_FMT: Dout <= {12'b0, Format[4:1], 13'b0, Format[0], 2'b0}; - SPI_TXDATA: Dout <= {23'b0, TransmitFIFOWriteFull, 8'b0}; - SPI_RXDATA: Dout <= {23'b0, ReceiveFIFOReadEmpty, ReceiveData[7:0]}; + SPI_TXDATA: Dout <= {TransmitFIFOWriteFull, 23'b0, 8'b0}; + SPI_RXDATA: Dout <= {ReceiveFIFOReadEmpty, 23'b0, ReceiveData[7:0]}; SPI_TXMARK: Dout <= {29'b0, TransmitWatermark}; SPI_RXMARK: Dout <= {29'b0, ReceiveWatermark}; SPI_IE: Dout <= {30'b0, InterruptEnable}; From 170082e30b4fe6dd623f2e0f1238c14ef10ea7f4 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Mon, 21 Oct 2024 15:38:00 -0700 Subject: [PATCH 43/54] Point installation CI badge at OpenHW repo --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 62a59d5a29..2c2bc0d0a7 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,4 @@ -![Installation CI](https://github.com/jordancarlin/cvw/actions/workflows/install.yml/badge.svg?branch=main) +![Installation CI](https://github.com/openhwgroup/cvw/actions/workflows/install.yml/badge.svg?branch=main) # core-v-wally From 69cc36795bbe724021372c079aca68b1bc740a9f Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 22 Oct 2024 04:45:40 -0700 Subject: [PATCH 44/54] privileged coverage updates --- config/rv64gc/coverage.svh | 3 ++- sim/questa/wally.do | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index d1bbaedbb4..1629fb9da2 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -9,7 +9,8 @@ `include "RV64M_coverage.svh" `include "RV64F_coverage.svh" `include "RV64Zfh_coverage.svh" -// `include "RV64VM_coverage.svh" +`include "RV64VM_coverage.svh" +`include "ZicsrM_coverage.svh" // `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" // `include "RV64CBO_PMP_coverage.svh" diff --git a/sim/questa/wally.do b/sim/questa/wally.do index d147080f36..f59e123f6a 100644 --- a/sim/questa/wally.do +++ b/sim/questa/wally.do @@ -192,7 +192,7 @@ if {$DEBUG > 0} { # suppress spurious warnngs about # "Extra checking for conflicts with always_comb done at vopt time" # because vsim will run vopt -set INC_DIRS "+incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared +incdir+${FCRVVI} +incdir+${FCRVVI}/rv32 +incdir+${FCRVVI}/rv64 +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/common +incdir+${FCRVVI}" +set INC_DIRS "+incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared +incdir+${FCRVVI} +incdir+${FCRVVI}/rv32 +incdir+${FCRVVI}/rv64 +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/priv +incdir+${FCRVVI}/common +incdir+${FCRVVI}" set SOURCES "${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*/*/*.sv" vlog -permissive -lint -work ${WKDIR} {*}${INC_DIRS} {*}${FCvlog} {*}${FCdefineCOVER_EXTS} {*}${lockstepvlog} ${FCdefineRVVI_COVERAGE} {*}${SOURCES} -suppress 2282,2583,7053,7063,2596,13286 From b848a1abfe22f6d3a4ec114acad68d0f0c32064b Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 22 Oct 2024 05:26:29 -0700 Subject: [PATCH 45/54] added no_pseudo_inst to only print regular instructions. --- config/rv32gc/imperas.ic | 2 ++ config/rv64gc/imperas.ic | 1 + 2 files changed, 3 insertions(+) diff --git a/config/rv32gc/imperas.ic b/config/rv32gc/imperas.ic index eb40392163..57c58c3e8a 100644 --- a/config/rv32gc/imperas.ic +++ b/config/rv32gc/imperas.ic @@ -62,6 +62,8 @@ # context registers not implemented --override cpu/scontext_undefined=T --override cpu/mcontext_undefined=T +--override no_pseudo_inst=T # For code coverage, don't produce pseudoinstructions + # mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag #--override cpu/ecode_mask=0x8000000F # for RV32 diff --git a/config/rv64gc/imperas.ic b/config/rv64gc/imperas.ic index 31584d22d5..558fb8cae9 100644 --- a/config/rv64gc/imperas.ic +++ b/config/rv64gc/imperas.ic @@ -60,6 +60,7 @@ # context registers not implemented --override cpu/scontext_undefined=T --override cpu/mcontext_undefined=T +--override no_pseudo_inst=T # For code coverage, don't produce pseudoinstructions # nonratified mnosie register not implemented --override cpu/mnoise_undefined=T From dfbe01084fd49cabdcce9fabfa82d415acc09688 Mon Sep 17 00:00:00 2001 From: slmnemo Date: Wed, 23 Oct 2024 08:47:56 -0700 Subject: [PATCH 46/54] Fixed error where an elif was written as if in test conditionals --- bin/nightly_build.py | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/bin/nightly_build.py b/bin/nightly_build.py index 506a0e997a..6d89f777f0 100755 --- a/bin/nightly_build.py +++ b/bin/nightly_build.py @@ -410,7 +410,7 @@ def clean_format_output(self, input_file, output_file=None): # Remove ANSI escape codes line = re.sub(r'\x1b\[[0-9;]*[mGK]', '', lines[index]) - if "Success" in line: + if "Success" in line: # test succeeds passed_configs.append(line.split(':')[0].strip()) elif "passed lint" in line: passed_configs.append(f"Lint: {line.split(' ')[0].strip()}") @@ -419,13 +419,21 @@ def clean_format_output(self, input_file, output_file=None): failed_configs.append([f"Lint: {line.split(' ')[0].strip()}", "No Log File"]) #failed_configs.append(line) - elif "Failures detected in output" in line: + elif "Failures detected in output" in line: # Text explicitly fails try: config_name = line.split(':')[0].strip() log_file = os.path.abspath(os.path.join("logs", config_name, ".log")) failed_configs.append((config_name, log_file)) except: failed_configs.append((config_name, "Log file not found")) + + elif "Timeout" in line: # Test times out + try: + config_name = line.split(':')[0].strip() + log_file = os.path.abspath("logs/"+config_name+".log") + failed_configs.append((f"Timeout: {config_name}", log_file)) + except: + failed_configs.append((f"Timeout: {config_name}", "No Log File")) index += 1 @@ -664,7 +672,7 @@ def main(): parser.add_argument('--path',default = "nightly", help='specify the path for where the nightly repositories will be cloned ex: "nightly-runs') parser.add_argument('--repository',default = "https://github.com/openhwgroup/cvw", help='specify which github repository you want to clone') - parser.add_argument('--target', default = "all", help='types of tests you can make are: all, wally-riscv-arch-test, no') + parser.add_argument('--target', default = "--jobs", help='types of tests you can make are: all, wally-riscv-arch-test, no') parser.add_argument('--tests', default = "nightly", help='types of tests you can run are: nightly, test, test_lint') parser.add_argument('--send_email',default = "", nargs="+", help='What emails to send test results to. Example: "[email1],[email2],..."') @@ -699,7 +707,7 @@ def main(): # flags are a list if (args.tests == "all"): test_list = [["python", "./regression-wally", ["--nightly", "--buildroot"]]] - if (args.tests == "nightly"): + elif (args.tests == "nightly"): test_list = [["python", "./regression-wally", ["--nightly"]]] elif (args.tests == "regression"): test_list = [["python", "./regression-wally", []]] @@ -755,11 +763,12 @@ def main(): if args.target != "no": test_runner.execute_makefile(target = args.target, makefile_path=test_runner.cvw) - if args.target == "all": - # Compile Linux for local testing - test_runner.set_env_var("RISCV",str(test_runner.cvw)) - linux_path = test_runner.cvw / "linux" - test_runner.execute_makefile(target = "all", makefile_path=linux_path) + # TODO: remove vestigial code if no longer wanted + # if args.target == "all": + # # Compile Linux for local testing + # test_runner.set_env_var("RISCV",str(test_runner.cvw)) + # linux_path = test_runner.cvw / "linux" + # test_runner.execute_makefile(target = "all", makefile_path=linux_path) ############################################# # RUN TESTS # From 885d8cb936d37f2fdbbd9c635e7881baf706d007 Mon Sep 17 00:00:00 2001 From: Corey Hickson Date: Thu, 24 Oct 2024 04:53:41 -0700 Subject: [PATCH 47/54] Enabling D and ZfhD Coverage --- config/rv32gc/coverage.svh | 2 ++ config/rv64gc/coverage.svh | 2 ++ 2 files changed, 4 insertions(+) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 3a04643ada..e2d25d765b 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -8,6 +8,8 @@ `include "RV32I_coverage.svh" `include "RV32M_coverage.svh" `include "RV32F_coverage.svh" +`include "RV32D_coverage.svh" +`include "RV32ZfhD_coverage.svh" `include "RV32Zfh_coverage.svh" `include "RV32Zicond_coverage.svh" `include "RV32Zca_coverage.svh" diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index 845b20e583..5f60e20395 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -9,6 +9,8 @@ `include "RV64I_coverage.svh" `include "RV64M_coverage.svh" `include "RV64F_coverage.svh" +`include "RV64D_coverage.svh" +`include "RV64ZfhD_coverage.svh" `include "RV64Zfh_coverage.svh" `include "RV64VM_coverage.svh" `include "RV64Zicond_coverage.svh" From 929f3892e0fc552e33732aa98859424e4e98e1b9 Mon Sep 17 00:00:00 2001 From: slmnemo Date: Thu, 24 Oct 2024 12:49:46 -0700 Subject: [PATCH 48/54] Added code to terminate pool processes on timeout --- bin/regression-wally | 1 + 1 file changed, 1 insertion(+) diff --git a/bin/regression-wally b/bin/regression-wally index 2d741ded82..c833516bf5 100755 --- a/bin/regression-wally +++ b/bin/regression-wally @@ -534,6 +534,7 @@ def main(): try: num_fail+=result.get(timeout=TIMEOUT_DUR) except TimeoutError: + pool.terminate() num_fail+=1 print(f"{bcolors.FAIL}%s: Timeout - runtime exceeded %d seconds{bcolors.ENDC}" % (config.cmd, TIMEOUT_DUR)) From 44e17efcf3520773b1004bc09ecadb58c766a731 Mon Sep 17 00:00:00 2001 From: Kaitlin Lucio Date: Thu, 24 Oct 2024 16:29:46 -0700 Subject: [PATCH 49/54] Removed unnecessary os.path.dirname in foldermanager init --- bin/nightly_build.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/nightly_build.py b/bin/nightly_build.py index 6d89f777f0..349bdb378d 100755 --- a/bin/nightly_build.py +++ b/bin/nightly_build.py @@ -97,7 +97,7 @@ def __init__(self, basedir): self.base_parent_dir = os.path.dirname(self.base_dir) else: self.base_dir = basedir - self.base_parent_dir = os.path.dirname(self.base_dir) + self.base_parent_dir = self.base_dir # logger.info(f"Base directory: {self.base_dir}") # logger.info(f"Parent Base directory: {self.base_parent_dir}") From 1c1acc467e84ce6268152326eecb6830f3a591ae Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 26 Oct 2024 02:01:09 -0700 Subject: [PATCH 50/54] Tweaked SPI to avoid breaking VCS, but the SCLK divider still doesn't produce the right frequency and SCLKenableEarly looks like it wouldn't work for SckDiv = 0 --- src/uncore/spi_apb.sv | 4 +- .../references/WALLY-spi-01.reference_output | 40 +++++++++---------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/src/uncore/spi_apb.sv b/src/uncore/spi_apb.sv index 57260e769f..54a072ac99 100644 --- a/src/uncore/spi_apb.sv +++ b/src/uncore/spi_apb.sv @@ -234,9 +234,9 @@ module spi_apb import cvw::*; #(parameter cvw_t P) ( // SPI enable generation, where SCLK = PCLK/(2*(SckDiv + 1)) // Asserts SCLKenable at the rising and falling edge of SCLK by counting from 0 to SckDiv // Active at 2x SCLK frequency to account for implicit half cycle delays and actions on both clock edges depending on phase - // When SckDiv is 0, count doesn't work and SCLKenable is simply PCLK + // When SckDiv is 0, count doesn't work and SCLKenable is simply PCLK *** dh 10/26/24: this logic is seriously broken. SCLK is not scaled to PCLK/(2*(SckDiv + 1)). SCLKenableEarly doesn't work right for SckDiv=0 assign ZeroDiv = ~|(SckDiv[10:0]); - assign SCLKenable = ZeroDiv ? PCLK : (DivCounter == SckDiv); + assign SCLKenable = ZeroDiv ? 1 : (DivCounter == SckDiv); assign SCLKenableEarly = ((DivCounter + 12'b1) == SckDiv); always_ff @(posedge PCLK) if (~PRESETn) DivCounter <= '0; diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-spi-01.reference_output b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-spi-01.reference_output index f62d9b0885..425866ac2a 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-spi-01.reference_output +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-spi-01.reference_output @@ -32,59 +32,59 @@ 00000003 -00000074 +00000074 # spi_burst_send -00000063 +00000063 # spi_burst_send -00000052 +00000052 # spi_burst_send -00000041 +00000041 # spi_burst_send -000000A1 +000000A1 # spi_burst_send 00000003 -000000B2 +000000B2 # spi_burst_send 00000001 -000000C3 +000000C3 # spi_burst_send -000000D4 +000000D4 # spi_burst_send 00000003 -000000A4 +000000A4 # tx_data write test 00000001 -000000B4 +000000B4 # tx_data write test -000000A5 +000000A5 # spi_burst_send -000000B5 +000000B5 # spi_burst_send -000000C5 +000000C5 # spi_burst_send -000000D5 +000000D5 # spi_burst_send -000000A7 +000000A7 # spi_burst_send -000000B7 +000000B7 # spi_burst_send -000000C7 +000000C7 # spi_burst_send 00000002 -000000D7 +000000D7 # spi_burst_send 00000000 00000011 #basic read write -000000FF +000000FF # first test sck_div -000000AE +000000AE # min sck_div first spi_burst_send 000000AD From e618596e5265b2b3143f5416e60525f4cd210b0f Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 26 Oct 2024 02:11:40 -0700 Subject: [PATCH 51/54] Added CSR coverage --- config/rv32gc/coverage.svh | 6 +++++- config/rv64gc/coverage.svh | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index e2d25d765b..2d1730a94e 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -5,6 +5,7 @@ // This file is needed in the config subdirectory for each config supporting coverage. // It defines which extensions are enabled for that config. +// Unprivileged extensions `include "RV32I_coverage.svh" `include "RV32M_coverage.svh" `include "RV32F_coverage.svh" @@ -15,4 +16,7 @@ `include "RV32Zca_coverage.svh" `include "RV32Zcb_coverage.svh" `include "RV32ZcbM_coverage.svh" -`include "RV32ZcbZbb_coverage.svh" \ No newline at end of file +`include "RV32ZcbZbb_coverage.svh" + +// Privileged extensions +`include "ZicsrM_coverage.svh" diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index 5f60e20395..df3b5403a5 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -12,7 +12,6 @@ `include "RV64D_coverage.svh" `include "RV64ZfhD_coverage.svh" `include "RV64Zfh_coverage.svh" -`include "RV64VM_coverage.svh" `include "RV64Zicond_coverage.svh" `include "RV64Zca_coverage.svh" `include "RV64Zcb_coverage.svh" @@ -21,6 +20,7 @@ `include "RV64ZcbZba_coverage.svh" // Privileged extensions +`include "RV64VM_coverage.svh" `include "ZicsrM_coverage.svh" // `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" From 0555e58afe0988ab6a26ce71d743d7dc2466ed14 Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 26 Oct 2024 02:12:43 -0700 Subject: [PATCH 52/54] Removed unnecessary display statement from testbench for DTIM versions --- testbench/testbench.sv | 1 - 1 file changed, 1 deletion(-) diff --git a/testbench/testbench.sv b/testbench/testbench.sv index e8ad09b36a..5b053c7635 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -540,7 +540,6 @@ module testbench; always @(posedge clk) begin if (LoadMem) begin $readmemh(memfilename, dut.core.lsu.dtim.dtim.ram.ram.RAM); - $display("Read memfile %s", memfilename); end if (CopyRAM) begin LogXLEN = (1 + P.XLEN/32); // 2 for rv32 and 3 for rv64 From 3ba92950600457fc8d66d7a421e28725156eb57b Mon Sep 17 00:00:00 2001 From: Zain2050 Date: Sat, 26 Oct 2024 09:06:01 -0700 Subject: [PATCH 53/54] enabled Zcf in rv32gc --- config/rv32gc/coverage.svh | 1 + 1 file changed, 1 insertion(+) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 2d1730a94e..80ab73f7bd 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -17,6 +17,7 @@ `include "RV32Zcb_coverage.svh" `include "RV32ZcbM_coverage.svh" `include "RV32ZcbZbb_coverage.svh" +`include "RV32Zcf_coverage.svh" // Privileged extensions `include "ZicsrM_coverage.svh" From d22988b6788233dd5b2fc7740274b1d00b894dc1 Mon Sep 17 00:00:00 2001 From: Zain2050 Date: Sat, 26 Oct 2024 09:17:34 -0700 Subject: [PATCH 54/54] also added Zcd --- config/rv32gc/coverage.svh | 1 + config/rv64gc/coverage.svh | 1 + 2 files changed, 2 insertions(+) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 80ab73f7bd..217e8788ad 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -18,6 +18,7 @@ `include "RV32ZcbM_coverage.svh" `include "RV32ZcbZbb_coverage.svh" `include "RV32Zcf_coverage.svh" +`include "RV32Zcd_coverage.svh" // Privileged extensions `include "ZicsrM_coverage.svh" diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index df3b5403a5..0491b4ab3e 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -18,6 +18,7 @@ `include "RV64ZcbM_coverage.svh" `include "RV64ZcbZbb_coverage.svh" `include "RV64ZcbZba_coverage.svh" +`include "RV64Zcd_coverage.svh" // Privileged extensions `include "RV64VM_coverage.svh"