diff --git a/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/acir_variable.rs b/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/acir_variable.rs
index 3bc99b4d054..4c47b752e5c 100644
--- a/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/acir_variable.rs
+++ b/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/acir_variable.rs
@@ -307,6 +307,7 @@ impl AcirContext {
             inverse_code,
             vec![AcirValue::Var(var, AcirType::field())],
             vec![AcirType::field()],
+            true,
         )?;
         let inverted_var = Self::expect_one_var(results);
 
@@ -708,6 +709,7 @@ impl AcirContext {
                     AcirValue::Var(rhs, AcirType::unsigned(bit_size)),
                 ],
                 vec![AcirType::unsigned(max_q_bits), AcirType::unsigned(max_rhs_bits)],
+                true,
             )?
             .try_into()
             .expect("quotient only returns two values");
@@ -1310,6 +1312,7 @@ impl AcirContext {
         generated_brillig: GeneratedBrillig,
         inputs: Vec<AcirValue>,
         outputs: Vec<AcirType>,
+        attempt_execution: bool,
     ) -> Result<Vec<AcirValue>, InternalError> {
         let b_inputs = try_vecmap(inputs, |i| match i {
             AcirValue::Var(var, _) => Ok(BrilligInputs::Single(self.var_to_expression(var)?)),
@@ -1329,10 +1332,12 @@ impl AcirContext {
 
         // Optimistically try executing the brillig now, if we can complete execution they just return the results.
         // This is a temporary measure pending SSA optimizations being applied to Brillig which would remove constant-input opcodes (See #2066)
-        if let Some(brillig_outputs) =
-            self.execute_brillig(&generated_brillig.byte_code, &b_inputs, &outputs)
-        {
-            return Ok(brillig_outputs);
+        if attempt_execution {
+            if let Some(brillig_outputs) =
+                self.execute_brillig(&generated_brillig.byte_code, &b_inputs, &outputs)
+            {
+                return Ok(brillig_outputs);
+            }
         }
 
         // Otherwise we must generate ACIR for it and execute at runtime.
diff --git a/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs b/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs
index 33f00796c9d..906389cfb6b 100644
--- a/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs
+++ b/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs
@@ -271,6 +271,7 @@ impl Context {
             code,
             inputs,
             outputs,
+            false,
         )?;
         let output_vars: Vec<_> = output_values
             .iter()
@@ -489,7 +490,7 @@ impl Context {
 
                                 let outputs: Vec<AcirType> = vecmap(result_ids, |result_id| dfg.type_of_value(*result_id).into());
 
-                                let output_values = self.acir_context.brillig(self.current_side_effects_enabled_var, code, inputs, outputs)?;
+                                let output_values = self.acir_context.brillig(self.current_side_effects_enabled_var, code, inputs, outputs, true)?;
 
                                 // Compiler sanity check
                                 assert_eq!(result_ids.len(), output_values.len(), "ICE: The number of Brillig output values should match the result ids in SSA");