From dfaf510305ea21b1001e0cf2ff0374defeb139d3 Mon Sep 17 00:00:00 2001 From: Tom French Date: Sun, 5 Feb 2023 00:22:28 +0000 Subject: [PATCH] chore(acvm): rename remaining references to gadget calls --- acvm/src/compiler/fallback.rs | 14 ++++++++------ acvm/src/pwg/logic.rs | 10 ++++++---- 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/acvm/src/compiler/fallback.rs b/acvm/src/compiler/fallback.rs index 19d3c2087..15d1e7e41 100644 --- a/acvm/src/compiler/fallback.rs +++ b/acvm/src/compiler/fallback.rs @@ -51,12 +51,13 @@ pub fn fallback(acir: Circuit, is_supported: IsBlackBoxSupported) -> Result Result<(u32, Vec), CompileError> { - let (updated_witness_index, opcodes_fallback) = match gc.name { + let (updated_witness_index, opcodes_fallback) = match bb_func_call.name { BlackBoxFunc::AND => { - let (lhs, rhs, result, num_bits) = crate::pwg::logic::extract_input_output(gc); + let (lhs, rhs, result, num_bits) = + crate::pwg::logic::extract_input_output(bb_func_call); stdlib::fallback::and( Expression::from(&lhs), Expression::from(&rhs), @@ -66,7 +67,8 @@ fn opcode_fallback( ) } BlackBoxFunc::XOR => { - let (lhs, rhs, result, num_bits) = crate::pwg::logic::extract_input_output(gc); + let (lhs, rhs, result, num_bits) = + crate::pwg::logic::extract_input_output(bb_func_call); stdlib::fallback::xor( Expression::from(&lhs), Expression::from(&rhs), @@ -78,7 +80,7 @@ fn opcode_fallback( BlackBoxFunc::RANGE => { // TODO: add consistency checks in one place // TODO: we aren't checking that range gate should have one input - let input = &gc.inputs[0]; + let input = &bb_func_call.inputs[0]; // Note there are no outputs because range produces no outputs stdlib::fallback::range( Expression::from(&input.witness), @@ -87,7 +89,7 @@ fn opcode_fallback( ) } _ => { - return Err(CompileError::UnsupportedBlackBox(gc.name)); + return Err(CompileError::UnsupportedBlackBox(bb_func_call.name)); } }; diff --git a/acvm/src/pwg/logic.rs b/acvm/src/pwg/logic.rs index 0dff9451f..57579ecf4 100644 --- a/acvm/src/pwg/logic.rs +++ b/acvm/src/pwg/logic.rs @@ -59,10 +59,12 @@ impl LogicSolver { } // TODO: Is there somewhere else that we can put this? // TODO: extraction methods are needed for some opcodes like logic and range -pub(crate) fn extract_input_output(gc: &BlackBoxFuncCall) -> (Witness, Witness, Witness, u32) { - let a = &gc.inputs[0]; - let b = &gc.inputs[1]; - let result = &gc.outputs[0]; +pub(crate) fn extract_input_output( + bb_func_call: &BlackBoxFuncCall, +) -> (Witness, Witness, Witness, u32) { + let a = &bb_func_call.inputs[0]; + let b = &bb_func_call.inputs[1]; + let result = &bb_func_call.outputs[0]; // The num_bits variable should be the same for all witnesses assert_eq!(