From da33762de8531914d4d0dae16bfce2192f02bc79 Mon Sep 17 00:00:00 2001 From: Pablo Barrio Date: Fri, 10 Jan 2020 17:51:21 +0000 Subject: [PATCH] [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below Summary: The Pointer Authentication Extension (PAC) was added in Armv8.3-A. Some instructions are implemented in the HINT space to allow compiling code common to CPUs regardless of whether they feature PAC or not, and still benefit from PAC protection in the PAC-enabled CPUs. The 8.3-specific mnemonics were currently enabled in any architecture, and LLVM was emitting them in assembly files when PAC code generation was enabled. This was ok for compilations where both LLVM codegen and the integrated assembler were used. However, the LLVM codegen was not compatible with other assemblers (e.g. GAS). Given the fact that the approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if compiling for Armv8.2-A or lower) is entirely reasonable, this patch makes LLVM to emit HINT when building for Armv8.2-A and below, instead of PACIASP, AUTIASP and friends. Then, LLVM assembly should be compatible with other assemblers. Reviewers: samparker, chill, LukeCheeseman Subscribers: kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71658 --- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 48 ++++++++---- .../machine-outliner-retaddr-sign-cfi.ll | 45 ++++++----- ...tliner-retaddr-sign-diff-scope-same-key.ll | 29 ++++--- .../machine-outliner-retaddr-sign-non-leaf.ll | 15 +++- ...tliner-retaddr-sign-same-scope-diff-key.ll | 23 ++++-- ...iner-retaddr-sign-same-scope-same-key-a.ll | 29 ++++--- ...iner-retaddr-sign-same-scope-same-key-b.ll | 29 ++++--- ...machine-outliner-retaddr-sign-subtarget.ll | 4 +- .../machine-outliner-retaddr-sign-thunk.ll | 31 +++++--- .../CodeGen/AArch64/sign-return-address.ll | 75 +++++++++++-------- .../AArch64/speculation-hardening-dagisel.ll | 2 +- .../AArch64/speculation-hardening-loads.ll | 2 +- .../test/MC/AArch64/armv8.3a-signed-pointer.s | 45 +++++++---- 13 files changed, 247 insertions(+), 130 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index 1fff8d78af0f5..d590d4d913ff8 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -815,38 +815,56 @@ let Predicates = [HasComplxNum, HasNEON] in { // v8.3a Pointer Authentication // These instructions inhabit part of the hint space and so can be used for -// armv8 targets +// armv8 targets. Keeping the old HINT mnemonic when compiling without PA is +// important for compatibility with other assemblers (e.g. GAS) when building +// software compatible with both CPUs that do or don't implement PA. let Uses = [LR], Defs = [LR] in { - def PACIAZ : SystemNoOperands<0b000, "paciaz">; - def PACIBZ : SystemNoOperands<0b010, "pacibz">; + def PACIAZ : SystemNoOperands<0b000, "hint #24">; + def PACIBZ : SystemNoOperands<0b010, "hint #26">; let isAuthenticated = 1 in { - def AUTIAZ : SystemNoOperands<0b100, "autiaz">; - def AUTIBZ : SystemNoOperands<0b110, "autibz">; + def AUTIAZ : SystemNoOperands<0b100, "hint #28">; + def AUTIBZ : SystemNoOperands<0b110, "hint #30">; } } let Uses = [LR, SP], Defs = [LR] in { - def PACIASP : SystemNoOperands<0b001, "paciasp">; - def PACIBSP : SystemNoOperands<0b011, "pacibsp">; + def PACIASP : SystemNoOperands<0b001, "hint #25">; + def PACIBSP : SystemNoOperands<0b011, "hint #27">; let isAuthenticated = 1 in { - def AUTIASP : SystemNoOperands<0b101, "autiasp">; - def AUTIBSP : SystemNoOperands<0b111, "autibsp">; + def AUTIASP : SystemNoOperands<0b101, "hint #29">; + def AUTIBSP : SystemNoOperands<0b111, "hint #31">; } } let Uses = [X16, X17], Defs = [X17], CRm = 0b0001 in { - def PACIA1716 : SystemNoOperands<0b000, "pacia1716">; - def PACIB1716 : SystemNoOperands<0b010, "pacib1716">; + def PACIA1716 : SystemNoOperands<0b000, "hint #8">; + def PACIB1716 : SystemNoOperands<0b010, "hint #10">; let isAuthenticated = 1 in { - def AUTIA1716 : SystemNoOperands<0b100, "autia1716">; - def AUTIB1716 : SystemNoOperands<0b110, "autib1716">; + def AUTIA1716 : SystemNoOperands<0b100, "hint #12">; + def AUTIB1716 : SystemNoOperands<0b110, "hint #14">; } } let Uses = [LR], Defs = [LR], CRm = 0b0000 in { - def XPACLRI : SystemNoOperands<0b111, "xpaclri">; + def XPACLRI : SystemNoOperands<0b111, "hint #7">; } -// These pointer authentication isntructions require armv8.3a +// These pointer authentication instructions require armv8.3a let Predicates = [HasPA] in { + + // When compiling with PA, there is a better mnemonic for these instructions. + def : InstAlias<"paciaz", (PACIAZ), 1>; + def : InstAlias<"pacibz", (PACIBZ), 1>; + def : InstAlias<"autiaz", (AUTIAZ), 1>; + def : InstAlias<"autibz", (AUTIBZ), 1>; + def : InstAlias<"paciasp", (PACIASP), 1>; + def : InstAlias<"pacibsp", (PACIBSP), 1>; + def : InstAlias<"autiasp", (AUTIASP), 1>; + def : InstAlias<"autibsp", (AUTIBSP), 1>; + def : InstAlias<"pacia1716", (PACIA1716), 1>; + def : InstAlias<"pacib1716", (PACIB1716), 1>; + def : InstAlias<"autia1716", (AUTIA1716), 1>; + def : InstAlias<"autib1716", (AUTIB1716), 1>; + def : InstAlias<"xpaclri", (XPACLRI), 1>; + multiclass SignAuth prefix, bits<3> prefix_z, string asm> { def IA : SignAuthOneData; def IB : SignAuthOneData; diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll index b6cc0ce1b2530..49e538bce1721 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll @@ -1,14 +1,18 @@ ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ -; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s +; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A +; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ +; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t +; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s ; Function a's outlining candidate contains a sp modifying add without a ; corresponsing sub, so we shouldn't outline it. define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" { -; CHECK-LABEL: a: // @a -; CHECK: // %bb.0: -; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK-LABEL: a: // @a +; CHECK: // %bb.0: +; CHECK-NEXT: .cfi_b_key_frame +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp +; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -22,15 +26,17 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" { store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 ; CHECK-NOT: bl OUTLINED_FUNCTION_{{[0-9]+}} -; CHECK: autibsp -; CECK-NEXT: ret +; V8A: hint #31 +; V83A: autibsp +; CHECK-NEXT: ret ret void } define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind { ; CHECK-LABEL: b: // @b ; CHECK-NEXT: // %bb.0: -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -44,15 +50,17 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" n store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 ; CHECK: bl [[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]] -; CHECK: autibsp -; CHECK-NEXT: ret +; V8A: hint #31 +; V83A: autibsp +; V8A-NEXT, V83A-NEXT: ret ret void } define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind { ; CHECK-LABEL: c: // @c ; CHECK-NEXT: // %bb.0: -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -66,15 +74,18 @@ define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" n store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 ; CHECK: bl [[OUTLINED_FUNC]] -; CHECK: autibsp -; CHECK-NEXT: ret +; V8A: hint #31 +; V83A: autibsp +; V8A-NEXT, V83A-NEXT: ret ret void } ; CHECK: [[OUTLINED_FUNC]] ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: autibsp -; CHECK-NEXT: ret +; V8A: hint #31 +; V83A: autibsp +; V8A-NEXT, V83A-NEXT: ret diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll index d8acaa9cbfd8e..4efbc3af5e953 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll @@ -1,9 +1,13 @@ ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ -; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s +; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A +; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ +; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t +; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s define void @a() "sign-return-address"="all" { ; CHECK-LABEL: a: // @a -; CHECK: paciasp +; V8A: hint #25 +; V83A: paciasp ; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -17,14 +21,16 @@ define void @a() "sign-return-address"="all" { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ret void ; CHECK: .cfi_endproc } define void @b() "sign-return-address"="non-leaf" { -; CHECK-LABEL: b: // @b -; CHECK-NOT: paciasp +; CHECK-LABE: b: // @b +; V8A-NOT: hint #25 +; V83A-NOT: paciasp ; CHECK-NOT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -38,15 +44,17 @@ define void @b() "sign-return-address"="non-leaf" { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK-NOT: autiasp +; V8A-NOT: hint #29 +; V83A-NOT: autiasp ret void ; CHECK: .cfi_endproc } define void @c() "sign-return-address"="all" { -; CHECK-LABEL: c: // @c -; CHECK: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK-LABEL: c: // @c +; V8A: hint #25 +; V83A: paciasp +; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -59,7 +67,8 @@ define void @c() "sign-return-address"="all" { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ret void ; CHECK: .cfi_endproc } diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll index c7cea17e7cf2d..9b281d19d486b 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll @@ -1,10 +1,14 @@ ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ -; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s +; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A +; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ +; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t +; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" { ; CHECK-LABEL: a: // @a ; CHECK: .cfi_b_key_frame -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -25,7 +29,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" { ; CHECK-LABEL: b: // @b ; CHECK: .cfi_b_key_frame -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -46,7 +51,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" { ; CHECK-LABEL: c: // @c ; CHECK: .cfi_b_key_frame -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -68,5 +74,6 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; CHECK-LABEL: OUTLINED_FUNCTION_0: ; CHECK-NOT: .cfi_b_key_frame ; CHECK-NOT: paci{{[a,b]}}sp +; CHECK-NOT: hint #2{{[5,7]}} ; CHECK-NOT: .cfi_negate_ra_state ; CHECK-NOT: auti{{[a,b]}}sp diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll index 4348d73743067..5138430331c01 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll @@ -1,9 +1,13 @@ ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ -; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s +; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A +; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ +; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t +; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s define void @a() "sign-return-address"="all" { ; CHECK-LABEL: a: // @a -; CHECK: paciasp +; V8A: hint #25 +; V83A: paciasp ; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -17,7 +21,8 @@ define void @a() "sign-return-address"="all" { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ret void ; CHECK: .cfi_endproc } @@ -25,7 +30,8 @@ define void @a() "sign-return-address"="all" { define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" { ; CHECK-LABEL: b: // @b ; CHECK: .cfi_b_key_frame -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -39,14 +45,16 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK-NOT: autiasp +; V8A-NOT: hint #29 +; V83A-NOT: autiasp ret void ; CHECK: .cfi_endproc } define void @c() "sign-return-address"="all" { ; CHECK-LABEL: c: // @c -; CHECK: paciasp +; V8A: hint #25 +; V83A: paciasp ; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -60,7 +68,8 @@ define void @c() "sign-return-address"="all" { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ret void ; CHECK: .cfi_endproc } diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll index f5e229a20ef28..e0b42bf54be33 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll @@ -1,9 +1,13 @@ ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ -; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s +; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A +; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ +; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t +; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s define void @a() "sign-return-address"="all" "sign-return-address-key"="a_key" nounwind { ; CHECK-LABEL: a: // @a -; CHECK: paciasp +; V8A: hint #25 +; V83A: paciasp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -16,13 +20,15 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="a_key" n store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ret void } define void @b() "sign-return-address"="all" nounwind { ; CHECK-LABEL: b: // @b -; CHECK: paciasp +; V8A: hint #25 +; V83A: paciasp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -35,13 +41,15 @@ define void @b() "sign-return-address"="all" nounwind { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ret void } define void @c() "sign-return-address"="all" nounwind { ; CHECK-LABEL: c: // @c -; CHECK: paciasp +; V8A: hint #25 +; V83A: paciasp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -54,11 +62,14 @@ define void @c() "sign-return-address"="all" nounwind { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ret void } ; CHECK-LABEL: OUTLINED_FUNCTION_0: -; CHECK: paciasp -; CHECK: autiasp +; V8A: hint #25 +; V83A: paciasp +; V8A: hint #29 +; V83A: autiasp ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll index c1940b44d2dad..de32f059b807e 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll @@ -1,10 +1,14 @@ ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ -; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s +; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A +; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \ +; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t +; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind { ; CHECK-LABEL: a: // @a ; CHECK-NEXT: // %bb.0: -; CHECK-NEXT: pacibsp +; V8A: hint #27 +; V83A: pacibsp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -17,14 +21,16 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" n store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autibsp +; V8A: hint #31 +; V83A: autibsp ret void } define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind { ; CHECK-LABEL: b: // @b ; CHECK-NEXT: // %bb.0: -; CHECK-NEXT: pacibsp +; V8A: hint #27 +; V83A: pacibsp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -37,14 +43,16 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" n store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autibsp +; V8A: hint #31 +; V83A: autibsp ret void } define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind { ; CHECK-LABEL: c: // @c ; CHECK-NEXT: // %bb.0: -; CHECK-NEXT: pacibsp +; V8A: hint #27 +; V83A: pacibsp %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -57,14 +65,17 @@ define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" n store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autibsp +; V8A: hint #31 +; V83A: autibsp ret void } ; CHECK-LABEL: OUTLINED_FUNCTION_0: ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: pacibsp +; V8A-NEXT: hint #27 +; V83A-NEXT: pacibsp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: autibsp +; V8A: hint #31 +; V83A: autibsp ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll index c2bb291506ae2..1459b62ee0f37 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll @@ -57,7 +57,7 @@ define void @c() #1 { ; CHECK-LABEL: c: // @c ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: pacibsp +; CHECK-NEXT: hint #27 ; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 @@ -72,7 +72,7 @@ define void @c() #1 { store i32 4, i32* %4, align 4 store i32 5, i32* %5, align 4 store i32 6, i32* %6, align 4 -; CHECK: autibsp +; CHECK: hint #31 ; CHECK-NOT: ret{{[a,b]}} ret void } diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll index d76dc5ef8a8e7..aea36d969108c 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll @@ -1,13 +1,18 @@ ; RUN: llc -mtriple aarch64-arm-linux-gnu --enable-machine-outliner \ -; RUN: -verify-machineinstrs %s -o - | FileCheck %s +; RUN: -verify-machineinstrs %s -o - | FileCheck --check-prefixes CHECK,V8A %s +; RUN-V83A: llc -mtriple aarch64-arm-none-eabi -enable-machine-outliner \ +; RUN-V83A: -verify-machineinstrs -mattr=+v8.3a %s -o - > %t +; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s declare i32 @thunk_called_fn(i32, i32, i32, i32) define i32 @a() #0 { ; CHECK-LABEL: a: // @a ; CHECK: // %bb.0: // %entry -; CHECK-NEXT: paciasp -; CHECK: autiasp +; V8A-NEXT: hint #25 +; V83A-NEXT: paciasp +; V8A: hint #29 +; V83A: autiasp ; CHECK-NEXT: ret entry: %call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4) @@ -18,9 +23,11 @@ entry: define i32 @b() #0 { ; CHECK-LABEL: b: // @b ; CHECK: // %bb.0: // %entry -; CHECK-NEXT: paciasp +; V8A-NEXT: hint #25 +; V83A-NEXT: paciasp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ; CHECK-NEXT: ret entry: %call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4) @@ -31,9 +38,11 @@ entry: define hidden i32 @c(i32 (i32, i32, i32, i32)* %fptr) #0 { ; CHECK-LABEL: c: // @c ; CHECK: // %bb.0: // %entry -; CHECK-NEXT: paciasp +; V8A-NEXT: hint #25 +; V83A-NEXT: paciasp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ; CHECK-NEXT: ret entry: %call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4) @@ -44,9 +53,11 @@ entry: define hidden i32 @d(i32 (i32, i32, i32, i32)* %fptr) #0 { ; CHECK-LABEL: d: // @d ; CHECK: // %bb.0: // %entry -; CHECK-NEXT: paciasp +; V8A-NEXT: hint #25 +; V83A-NEXT: paciasp ; CHECK-NEXT: .cfi_negate_ra_state -; CHECK: autiasp +; V8A: hint #29 +; V83A: autiasp ; CHECK-NEXT: ret entry: %call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4) @@ -59,5 +70,7 @@ attributes #0 = { "sign-return-address"="non-leaf" } ; CHECK-NOT: [[OUTLINED_FUNCTION_{{.*}}]] ; CHECK-NOT: .cfi_b_key_frame ; CHECK-NOT: paci{{[a,b]}}sp +; CHECK-NOT: hint #2{{[5,7]}} ; CHECK-NOT: .cfi_negate_ra_state ; CHECK-NOT: auti{{[a,b]}}sp +; CHECK-NOT: hint #{{[29,31]}} diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll index dfd52f87fdeb1..51df38aa5dfc8 100644 --- a/llvm/test/CodeGen/AArch64/sign-return-address.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple=aarch64-none-eabi < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-none-eabi < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-none-eabi -mattr=v8.3a < %s | FileCheck --check-prefix CHECK-V83A %s ; CHECK-LABEL: @leaf ; CHECK-NOT: paci{{[a,b]}}sp @@ -22,19 +23,23 @@ define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { } ; CHECK-LABEL: @leaf_sign_all -; CHECK: paciasp -; CHECK: autiasp -; CHECK: ret +; CHECK: hint #25 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" { ret i32 %x } -; CHECK: @leaf_clobbers_lr -; CHECK: paciasp -; CHECK: str x30, [sp, #-16]! -; CHECK: ldr x30, [sp], #16 -; CHECK-NEXT: autiasp -; CHECK: ret +; CHECK: @leaf_clobbers_lr +; CHECK: hint #25 +; CHECK-V83A: paciasp +; CHECK, CHECK-V83A: str x30, [sp, #-16]! +; CHECK, CHECK-V83A: ldr x30, [sp], #16 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V32A-NEXT: retaa define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1 ret i64 %x @@ -42,21 +47,25 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { declare i32 @foo(i32) -; CHECK: @non_leaf_sign_all -; CHECK: paciasp -; CHECK: autiasp -; CHECK: ret +; CHECK: @non_leaf_sign_all +; CHECK: hint #25 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { %call = call i32 @foo(i32 %x) ret i32 %call } -; CHECK: @non_leaf_sign_non_leaf -; CHECK: paciasp -; CHECK: str x30, [sp, #-16]! -; CHECK: ldr x30, [sp], #16 -; CHECK: autiasp -; CHECK: ret +; CHECK: @non_leaf_sign_non_leaf +; CHECK: hint #25 +; CHECK-V83A: paciasp +; CHECK, CHECK-V83A: str x30, [sp, #-16]! +; CHECK, CHECK-V83A: ldr x30, [sp], #16 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V83A: retaa define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { %call = call i32 @foo(i32 %x) ret i32 %call @@ -73,12 +82,14 @@ define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-featur declare fastcc i64 @bar(i64) -; CHECK-LABEL: @spill_lr_and_tail_call -; CHECK: paciasp -; CHECK: str x30, [sp, #-16]! -; CHECK: ldr x30, [sp], #16 -; CHECK: autiasp -; CHECK: b bar +; CHECK-LABEL: @spill_lr_and_tail_call +; CHECK: hint #25 +; CHECK-V83A: paciasp +; CHECK, CHECK-V83A: str x30, [sp, #-16]! +; CHECK, CHECK-V83A: ldr x30, [sp], #16 +; CHECK-V83A: autiasp +; CHECK: hint #29 +; CHECK: b bar define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1 tail call fastcc i64 @bar(i64 %x) @@ -86,15 +97,19 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { } ; CHECK-LABEL: @leaf_sign_all_a_key -; CHECK: paciasp -; CHECK: autiasp +; CHECK: hint #25 +; CHECK: hint #29 +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" { ret i32 %x } ; CHECK-LABEL: @leaf_sign_all_b_key -; CHECK: pacibsp -; CHECK: autibsp +; CHECK: hint #27 +; CHECK: hint #31 +; CHECK-V83A: pacibsp +; CHECK-V83A: retab define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" { ret i32 %x } diff --git a/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll b/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll index 4d13d98441e0d..72f3170fb09c8 100644 --- a/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll +++ b/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll @@ -18,7 +18,7 @@ entry: ; NOSLH-NOT: dsb sy ; NOSLH-NOT: isb if.then: - %0 = tail call i64 asm "autia1716", "={x17},{x16},0"(i64 %b, i64 %a) + %0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a) ; CHECK: bl g ; SLH: dsb sy ; SLH: isb diff --git a/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll b/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll index e90fb19a522a1..c5aae05143007 100644 --- a/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll +++ b/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll @@ -90,7 +90,7 @@ define i64 @no_masking_with_full_control_flow_barriers(i64 %a, i64 %b, i64* %p) ; CHECK: dsb sy ; CHECK: isb entry: - %0 = tail call i64 asm "autia1716", "={x17},{x16},0"(i64 %b, i64 %a) + %0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a) %X = load i64, i64* %p, align 8 %ret = add i64 %X, %0 ; CHECK-NOT: csdb diff --git a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s index 056a3ae86c07f..07e3783e1dc48 100644 --- a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s +++ b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s @@ -1,8 +1,8 @@ // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.3a -o - %s 2>&1 | \ // RUN: FileCheck --check-prefixes=CHECK,ALL %s -// RUN: not llvm-mc -triple aarch64-none-linux-gnu %s -o - > %t.1 2>%t.2 -// RUN: FileCheck --check-prefixes=ALL,NOENC %s < %t.1 +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding %s -o - > %t.1 2>%t.2 +// RUN: FileCheck --check-prefixes=ALL %s < %t.1 // RUN: FileCheck --check-prefix=CHECK-REQ %s < %t.2 // ALL: .text @@ -98,43 +98,56 @@ // ALL-EMPTY: paciasp // CHECK-NEXT: paciasp // encoding: [0x3f,0x23,0x03,0xd5] -// NOENC-NEXT: paciasp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: paciasp autiasp // CHECK-NEXT: autiasp // encoding: [0xbf,0x23,0x03,0xd5] -// NOENC-NEXT: autiasp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autiasp paciaz // CHECK-NEXT: paciaz // encoding: [0x1f,0x23,0x03,0xd5] -// NOENC-NEXT: paciaz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: paciaz autiaz // CHECK-NEXT: autiaz // encoding: [0x9f,0x23,0x03,0xd5] -// NOENC-NEXT: autiaz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autiaz pacia1716 // CHECK-NEXT: pacia1716 // encoding: [0x1f,0x21,0x03,0xd5] -// NOENC-NEXT: pacia1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacia1716 autia1716 // CHECK-NEXT: autia1716 // encoding: [0x9f,0x21,0x03,0xd5] -// NOENC-NEXT: autia1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autia1716 pacibsp // CHECK-NEXT: pacibsp // encoding: [0x7f,0x23,0x03,0xd5] -// NOENC-NEXT: pacibsp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacibsp autibsp // CHECK-NEXT: autibsp // encoding: [0xff,0x23,0x03,0xd5] -// NOENC-NEXT: autibsp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autibsp pacibz // CHECK-NEXT: pacibz // encoding: [0x5f,0x23,0x03,0xd5] -// NOENC-NEXT: pacibz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacibz autibz // CHECK-NEXT: autibz // encoding: [0xdf,0x23,0x03,0xd5] -// NOENC-NEXT: autibz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autibz pacib1716 // CHECK-NEXT: pacib1716 // encoding: [0x5f,0x21,0x03,0xd5] -// NOENC-NEXT: pacib1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacib1716 autib1716 // CHECK-NEXT: autib1716 // encoding: [0xdf,0x21,0x03,0xd5] -// NOENC-NEXT: autib1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autib1716 xpaclri -// CHECK-NEXT: xpaclri // encoding: [0xff,0x20,0x03,0xd5] -// NOENC-NEXT: xpaclri +// CHECK-NEXT: xpaclri // encoding: [0xff,0x20,0x03,0xd5] +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: xpaclri // ALL-EMPTY: pacia x0, x1