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Instability of continuously acquired signals #590
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Can you share a screenshot of your LV code and the values of any controls that are being passed into the DAQmx VIs? For what its worth, my hunch is that your channel config may be different. This code is hiding a lot of default parameter values, the one that might be at fault is the Terminal Configuration. task.ai_channels.add_ai_voltage_chan("Dev1/ai0") The full declaration: def add_ai_voltage_chan(
self, physical_channel, name_to_assign_to_channel="",
terminal_config=TerminalConfiguration.DEFAULT, min_val=-5.0,
max_val=5.0, units=VoltageUnits.VOLTS, custom_scale_name=""): |
The primary configuration difference I see is create channel, like I expected. Try this in your Python code: task.ai_channels.add_ai_voltage_chan("Dev1/ai0", terminal_config=TerminalConfiguration.DIFF, min_val=-10.0, max_val=10.0) |
Oh, bah. I thought we were chasing an absolute accuracy issue. I see that those samples are the first point in a sine-wave, and you even said:
My reading comprehension is poor today, I guess. The other major thing that your VI is doing that Python is that it is a Finite Retriggered Acquisition. Try this: task.timing.cfg_samp_clk_timing(2e6, "", Edge.RISING, sample_mode=AcquisitionType.Finite, samps_per_chan=400)
task.triggers.start_trigger.cfg_dig_edge_start_trig("/Dev1/PFI0", Edge.RISING)
task.triggers.start_trigger.retriggerable = True |
Yes.It's too hard for me. Finite Retriggered Acquisition should be used, but how do you guarantee that he is infinitely acquiring? Right now it stops the task automatically after it has collected enough samples. |
A finite retriggered acq shouldn't stop; it effectively behaves as a continuous acquisition. Can you share the most recent code that you have tried? |
That is acquiring a lot of data per trigger. The 400 samples callback will be invoked 2 million times per trigger. I am assuming 400 samples is a single cycle of the sine wave. If so, what you're seeing is time quantization errors from the clocks drifting between your acquisition device (the 6361) and whatever is generating the Sine Wave over a long period of time. The clock of the DAQ device is a 100MHz oscillator that has up to 50ppm of error. So imagine your 6361 and your sinewave generation have 50ppm of error in opposite directions. The 6361 clock is actually 99.995MHz. In 400 seconds (400 * 2e6 samples acquired at 2e6 sample rate), we would expect 100M * 400 clock ticks. At 99.995MHz that will take 400.02 seconds. If your sinewave generation is using a similar clock, but with the opposite error, 100.005MHz, then those same number of clock ticks will take 399.98 seconds. That is .04 seconds of skew between the two clocks. When you're sampling 2M times per second, that drift is significant - .04 seconds is 80,000 samples. I don't know where the PFI0 signal is coming from, but if its somehow referenced to that sine wave, then you're good.
Correct. You want that to be a single cycle of your sine wave because of the drift I describe above. 400 samples, maybe? |
Hi, Follow up this question, when I apply the code
My device is USB-6210 and I checked it supports the start trigger. I wonder if it is the bug or that my device doesn't support the retrigger? Thank you! |
Sadly that device does not support retriggerable Analog Input. Sorry! |
Acquisition Card:NI PCIe-6361
Same environment, I use the Python API to continuously capture a standard sine wave from a signal generator. As a result, the captured data is not one cycle per line (the first amplitude value of each line is decreasing gradually), but it is normal if the data is captured using LabVIew. This question has been bothering me for days!!!
Tasks
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