From 9d2571d2ed30d888c168412d41bcc31e84e12de4 Mon Sep 17 00:00:00 2001 From: Devaraj Ranganna Date: Thu, 28 Sep 2023 10:08:55 +0100 Subject: [PATCH] Cortex-M23: Do not use PSPLIM_NS (#791) According to Armv8-M technical reference manual, if the main extension is not implemented then PSPLIM_NS is RES0. Update the cortex-M23 port to not use the reserved PSPLIM_NS. --- portable/ARMv8M/non_secure/port.c | 40 ++++++++++++++++--- .../portable/GCC/ARM_CM23/portasm.c | 10 ++--- .../portable/GCC/ARM_CM23_NTZ/portasm.c | 28 ++++++++++--- .../portable/IAR/ARM_CM23/portasm.s | 11 ++--- .../portable/IAR/ARM_CM23_NTZ/portasm.s | 20 ++++++++++ portable/GCC/ARM_CM23/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM23/non_secure/portasm.c | 10 ++--- portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 40 ++++++++++++++++--- .../GCC/ARM_CM23_NTZ/non_secure/portasm.c | 28 ++++++++++--- portable/GCC/ARM_CM33/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM35P/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM35P_NTZ/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM55/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM55_NTZ/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM85/non_secure/port.c | 40 ++++++++++++++++--- portable/GCC/ARM_CM85_NTZ/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM23/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM23/non_secure/portasm.s | 11 ++--- portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 40 ++++++++++++++++--- .../IAR/ARM_CM23_NTZ/non_secure/portasm.s | 20 ++++++++++ portable/IAR/ARM_CM33/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM35P/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM35P_NTZ/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM55/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM55_NTZ/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM85/non_secure/port.c | 40 ++++++++++++++++--- portable/IAR/ARM_CM85_NTZ/non_secure/port.c | 40 ++++++++++++++++--- 29 files changed, 833 insertions(+), 145 deletions(-) diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index d452c33b0bd..1b41d587f04 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -109,7 +109,6 @@ " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ " subs r2, #20 \n" " msr psp, r3 \n" - " msr psplim, r4 \n" " msr control, r5 \n" " mov lr, r6 \n" " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -160,7 +159,6 @@ " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ " ldr r4, xSecureContextConst2 \n" " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " movs r1, #2 \n" /* r1 = 2. */ " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " adds r0, #32 \n" /* Discard everything up to r0. */ @@ -324,7 +322,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " \n" " save_special_regs: \n" " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " movs r4, #0 \n" /* r4 = 0. 0 is stored in the PSPLIM slot. */ " mrs r5, control \n" /* r5 = CONTROL. */ " mov r6, lr \n" /* r6 = LR. */ " stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -392,7 +390,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ " subs r2, #20 \n" " msr psp, r3 \n" - " msr psplim, r4 \n" " msr control, r5 \n" " mov lr, r6 \n" " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -467,7 +464,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ " str r2, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */ " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ " b select_next_task \n" @@ -477,7 +474,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ " str r2, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */ " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r2!, {r0, r1, r3-r7} \n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ " mov r4, r8 \n" /* r4 = r8. */ @@ -496,7 +493,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " \n" " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ " mov lr, r4 \n" /* LR = r4. */ " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " str r0, [r3] \n" /* Restore the task's xSecureContext. */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index c1d3b4618e1..ed493381269 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -109,7 +109,9 @@ " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ " subs r1, #16 \n" " msr psp, r2 \n" - " msr psplim, r3 \n" + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r3 \n" + #endif " msr control, r4 \n" " mov lr, r5 \n" " \n" @@ -155,7 +157,9 @@ " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " \n" " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + #endif " movs r1, #2 \n" /* r1 = 2. */ " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " adds r0, #32 \n" /* Discard everything up to r0. */ @@ -302,7 +306,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " \n" " save_special_regs: \n" " mrs r2, psp \n" /* r2 = PSP. */ - " mrs r3, psplim \n" /* r3 = PSPLIM. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + #else + " movs r3, #0 \n" /* r3 = 0. 0 is stored in the PSPLIM slot. */ + #endif " mrs r4, control \n" /* r4 = CONTROL. */ " mov r5, lr \n" /* r5 = LR. */ " stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -370,7 +378,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ " subs r1, #16 \n" " msr psp, r2 \n" - " msr psplim, r3 \n" + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r3 \n" + #endif " msr control, r4 \n" " mov lr, r5 \n" " \n" @@ -416,7 +426,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " subs r0, r0, #40 \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */ " str r0, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r2, psplim \n" /* r2 = PSPLIM. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + #else + " movs r2, #0 \n" /* r2 = 0. 0 is stored in the PSPLIM slot. */ + #endif " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r0!, {r2-r7} \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ " mov r4, r8 \n" /* r4 = r8. */ @@ -442,7 +456,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " msr psp, r0 \n" /* Remember the new top of stack for the task. */ " subs r0, r0, #40 \n" /* Move to the starting of the saved context. */ " ldmia r0!, {r2-r7} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ - " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + #endif " bx r3 \n" " \n" " .align 4 \n" diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s index 648ae005010..8c7000909b2 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s @@ -37,6 +37,7 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. #define configUSE_MPU_WRAPPERS_V1 0 #endif + EXTERN pxCurrentTCB EXTERN xSecureContext EXTERN vTaskSwitchContext @@ -167,7 +168,6 @@ vRestoreContextOfFirstTask: ldmia r2!, {r0, r3-r6} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ subs r2, #20 msr psp, r3 - msr psplim, r4 msr control, r5 mov lr, r6 ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -203,7 +203,6 @@ vRestoreContextOfFirstTask: ldm r0!, {r1-r3} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ ldr r4, =xSecureContext str r1, [r4] /* Set xSecureContext to this task's value for the same. */ - msr psplim, r2 /* Set this task's PSPLIM value. */ movs r1, #2 /* r1 = 2. */ msr CONTROL, r1 /* Switch to use PSP in the thread mode. */ adds r0, #32 /* Discard everything up to r0. */ @@ -279,7 +278,7 @@ PendSV_Handler: save_special_regs: mrs r3, psp /* r3 = PSP. */ - mrs r4, psplim /* r4 = PSPLIM. */ + movs r4, #0 /* r4 = 0. 0 is stored in the PSPLIM slot. */ mrs r5, control /* r5 = CONTROL. */ mov r6, lr /* r6 = LR. */ stmia r2!, {r0, r3-r6} /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -347,7 +346,6 @@ PendSV_Handler: ldmia r2!, {r0, r3-r6} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ subs r2, #20 msr psp, r3 - msr psplim, r4 msr control, r5 mov lr, r6 ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -406,7 +404,7 @@ PendSV_Handler: subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ str r2, [r1] /* Save the new top of stack in TCB. */ - mrs r1, psplim /* r1 = PSPLIM. */ + movs r1, #0 /* r1 = 0. 0 is stored in the PSPLIM slot. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ @@ -417,7 +415,7 @@ PendSV_Handler: ldr r1, [r3] /* Read pxCurrentTCB. */ subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ str r2, [r1] /* Save the new top of stack in TCB. */ - mrs r1, psplim /* r1 = PSPLIM. */ + movs r1, #0 /* r1 = 0. 0 is stored in the PSPLIM slot. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ stmia r2!, {r0, r1, r3-r7} /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ mov r4, r8 /* r4 = r8. */ @@ -436,7 +434,6 @@ PendSV_Handler: ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - msr psplim, r1 /* Restore the PSPLIM register value for the task. */ mov lr, r4 /* LR = r4. */ ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ str r0, [r3] /* Restore the task's xSecureContext. */ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s index 8f77c4dafb1..836a927c87d 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s @@ -36,6 +36,10 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. #define configUSE_MPU_WRAPPERS_V1 0 #endif +#ifndef configRUN_FREERTOS_SECURE_ONLY + #define configRUN_FREERTOS_SECURE_ONLY 0 +#endif + EXTERN pxCurrentTCB EXTERN vTaskSwitchContext EXTERN vPortSVCHandler_C @@ -157,7 +161,9 @@ vRestoreContextOfFirstTask: ldmia r1!, {r2-r5} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ subs r1, #16 msr psp, r2 + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r3 + #endif msr control, r4 mov lr, r5 @@ -189,7 +195,9 @@ vRestoreContextOfFirstTask: ldr r0, [r1] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ ldm r0!, {r1-r2} /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ +#if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r1 /* Set this task's PSPLIM value. */ +#endif movs r1, #2 /* r1 = 2. */ msr CONTROL, r1 /* Switch to use PSP in the thread mode. */ adds r0, #32 /* Discard everything up to r0. */ @@ -253,7 +261,11 @@ PendSV_Handler: save_special_regs: mrs r2, psp /* r2 = PSP. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) mrs r3, psplim /* r3 = PSPLIM. */ + #else + movs r3, #0 /* r3 = 0. 0 is stored in the PSPLIM slot. */ + #endif mrs r4, control /* r4 = CONTROL. */ mov r5, lr /* r5 = LR. */ stmia r1!, {r2-r5} /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -321,7 +333,9 @@ PendSV_Handler: ldmia r1!, {r2-r5} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ subs r1, #16 msr psp, r2 + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r3 + #endif msr control, r4 mov lr, r5 @@ -354,7 +368,11 @@ PendSV_Handler: subs r0, r0, #40 /* Make space for PSPLIM, LR and the remaining registers on the stack. */ str r0, [r1] /* Save the new top of stack in TCB. */ +#if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) mrs r2, psplim /* r2 = PSPLIM. */ +#else + movs r2, #0 /* r0 = 0. 0 is stored in the PSPLIM slot. */ +#endif mov r3, lr /* r3 = LR/EXC_RETURN. */ stmia r0!, {r2-r7} /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ mov r4, r8 /* r4 = r8. */ @@ -380,7 +398,9 @@ PendSV_Handler: msr psp, r0 /* Remember the new top of stack for the task. */ subs r0, r0, #40 /* Move to the starting of the saved context. */ ldmia r0!, {r2-r7} /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ +#if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r2 /* Restore the PSPLIM register value for the task. */ +#endif bx r3 #endif /* configENABLE_MPU */ diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index d452c33b0bd..1b41d587f04 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -109,7 +109,6 @@ " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ " subs r2, #20 \n" " msr psp, r3 \n" - " msr psplim, r4 \n" " msr control, r5 \n" " mov lr, r6 \n" " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -160,7 +159,6 @@ " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ " ldr r4, xSecureContextConst2 \n" " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " movs r1, #2 \n" /* r1 = 2. */ " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " adds r0, #32 \n" /* Discard everything up to r0. */ @@ -324,7 +322,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " \n" " save_special_regs: \n" " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " movs r4, #0 \n" /* r4 = 0. 0 is stored in the PSPLIM slot. */ " mrs r5, control \n" /* r5 = CONTROL. */ " mov r6, lr \n" /* r6 = LR. */ " stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -392,7 +390,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ " subs r2, #20 \n" " msr psp, r3 \n" - " msr psplim, r4 \n" " msr control, r5 \n" " mov lr, r6 \n" " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -467,7 +464,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ " str r2, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */ " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ " b select_next_task \n" @@ -477,7 +474,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ " str r2, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */ " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r2!, {r0, r1, r3-r7} \n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ " mov r4, r8 \n" /* r4 = r8. */ @@ -496,7 +493,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " \n" " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ " mov lr, r4 \n" /* LR = r4. */ " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " str r0, [r3] \n" /* Restore the task's xSecureContext. */ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index c1d3b4618e1..ed493381269 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -109,7 +109,9 @@ " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ " subs r1, #16 \n" " msr psp, r2 \n" - " msr psplim, r3 \n" + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r3 \n" + #endif " msr control, r4 \n" " mov lr, r5 \n" " \n" @@ -155,7 +157,9 @@ " ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " \n" " ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ - " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r1 \n" /* Set this task's PSPLIM value. */ + #endif " movs r1, #2 \n" /* r1 = 2. */ " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " adds r0, #32 \n" /* Discard everything up to r0. */ @@ -302,7 +306,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " \n" " save_special_regs: \n" " mrs r2, psp \n" /* r2 = PSP. */ - " mrs r3, psplim \n" /* r3 = PSPLIM. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " mrs r3, psplim \n" /* r3 = PSPLIM. */ + #else + " movs r3, #0 \n" /* r3 = 0. 0 is stored in the PSPLIM slot. */ + #endif " mrs r4, control \n" /* r4 = CONTROL. */ " mov r5, lr \n" /* r5 = LR. */ " stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -370,7 +378,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ " subs r1, #16 \n" " msr psp, r2 \n" - " msr psplim, r3 \n" + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r3 \n" + #endif " msr control, r4 \n" " mov lr, r5 \n" " \n" @@ -416,7 +426,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " subs r0, r0, #40 \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */ " str r0, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r2, psplim \n" /* r2 = PSPLIM. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " mrs r2, psplim \n" /* r2 = PSPLIM. */ + #else + " movs r2, #0 \n" /* r2 = 0. 0 is stored in the PSPLIM slot. */ + #endif " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r0!, {r2-r7} \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ " mov r4, r8 \n" /* r4 = r8. */ @@ -442,7 +456,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " msr psp, r0 \n" /* Remember the new top of stack for the task. */ " subs r0, r0, #40 \n" /* Move to the starting of the saved context. */ " ldmia r0!, {r2-r7} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ - " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) + " msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ + #endif " bx r3 \n" " \n" " .align 4 \n" diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.s b/portable/IAR/ARM_CM23/non_secure/portasm.s index 648ae005010..8c7000909b2 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -37,6 +37,7 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. #define configUSE_MPU_WRAPPERS_V1 0 #endif + EXTERN pxCurrentTCB EXTERN xSecureContext EXTERN vTaskSwitchContext @@ -167,7 +168,6 @@ vRestoreContextOfFirstTask: ldmia r2!, {r0, r3-r6} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ subs r2, #20 msr psp, r3 - msr psplim, r4 msr control, r5 mov lr, r6 ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -203,7 +203,6 @@ vRestoreContextOfFirstTask: ldm r0!, {r1-r3} /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ ldr r4, =xSecureContext str r1, [r4] /* Set xSecureContext to this task's value for the same. */ - msr psplim, r2 /* Set this task's PSPLIM value. */ movs r1, #2 /* r1 = 2. */ msr CONTROL, r1 /* Switch to use PSP in the thread mode. */ adds r0, #32 /* Discard everything up to r0. */ @@ -279,7 +278,7 @@ PendSV_Handler: save_special_regs: mrs r3, psp /* r3 = PSP. */ - mrs r4, psplim /* r4 = PSPLIM. */ + movs r4, #0 /* r4 = 0. 0 is stored in the PSPLIM slot. */ mrs r5, control /* r5 = CONTROL. */ mov r6, lr /* r6 = LR. */ stmia r2!, {r0, r3-r6} /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -347,7 +346,6 @@ PendSV_Handler: ldmia r2!, {r0, r3-r6} /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ subs r2, #20 msr psp, r3 - msr psplim, r4 msr control, r5 mov lr, r6 ldr r4, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -406,7 +404,7 @@ PendSV_Handler: subs r2, r2, #12 /* Make space for xSecureContext, PSPLIM and LR on the stack. */ str r2, [r1] /* Save the new top of stack in TCB. */ - mrs r1, psplim /* r1 = PSPLIM. */ + movs r1, #0 /* r1 = 0. 0 is stored in the PSPLIM slot. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ stmia r2!, {r0, r1, r3} /* Store xSecureContext, PSPLIM and LR on the stack. */ @@ -417,7 +415,7 @@ PendSV_Handler: ldr r1, [r3] /* Read pxCurrentTCB. */ subs r2, r2, #44 /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ str r2, [r1] /* Save the new top of stack in TCB. */ - mrs r1, psplim /* r1 = PSPLIM. */ + movs r1, #0 /* r1 = 0. 0 is stored in the PSPLIM slot. */ mov r3, lr /* r3 = LR/EXC_RETURN. */ stmia r2!, {r0, r1, r3-r7} /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ mov r4, r8 /* r4 = r8. */ @@ -436,7 +434,6 @@ PendSV_Handler: ldr r2, [r1] /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ ldmia r2!, {r0, r1, r4} /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - msr psplim, r1 /* Restore the PSPLIM register value for the task. */ mov lr, r4 /* LR = r4. */ ldr r3, =xSecureContext /* Read the location of xSecureContext i.e. &( xSecureContext ). */ str r0, [r3] /* Restore the task's xSecureContext. */ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 8f77c4dafb1..836a927c87d 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -36,6 +36,10 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. #define configUSE_MPU_WRAPPERS_V1 0 #endif +#ifndef configRUN_FREERTOS_SECURE_ONLY + #define configRUN_FREERTOS_SECURE_ONLY 0 +#endif + EXTERN pxCurrentTCB EXTERN vTaskSwitchContext EXTERN vPortSVCHandler_C @@ -157,7 +161,9 @@ vRestoreContextOfFirstTask: ldmia r1!, {r2-r5} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ subs r1, #16 msr psp, r2 + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r3 + #endif msr control, r4 mov lr, r5 @@ -189,7 +195,9 @@ vRestoreContextOfFirstTask: ldr r0, [r1] /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ ldm r0!, {r1-r2} /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ +#if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r1 /* Set this task's PSPLIM value. */ +#endif movs r1, #2 /* r1 = 2. */ msr CONTROL, r1 /* Switch to use PSP in the thread mode. */ adds r0, #32 /* Discard everything up to r0. */ @@ -253,7 +261,11 @@ PendSV_Handler: save_special_regs: mrs r2, psp /* r2 = PSP. */ + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) mrs r3, psplim /* r3 = PSPLIM. */ + #else + movs r3, #0 /* r3 = 0. 0 is stored in the PSPLIM slot. */ + #endif mrs r4, control /* r4 = CONTROL. */ mov r5, lr /* r5 = LR. */ stmia r1!, {r2-r5} /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -321,7 +333,9 @@ PendSV_Handler: ldmia r1!, {r2-r5} /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */ subs r1, #16 msr psp, r2 + #if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r3 + #endif msr control, r4 mov lr, r5 @@ -354,7 +368,11 @@ PendSV_Handler: subs r0, r0, #40 /* Make space for PSPLIM, LR and the remaining registers on the stack. */ str r0, [r1] /* Save the new top of stack in TCB. */ +#if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) mrs r2, psplim /* r2 = PSPLIM. */ +#else + movs r2, #0 /* r0 = 0. 0 is stored in the PSPLIM slot. */ +#endif mov r3, lr /* r3 = LR/EXC_RETURN. */ stmia r0!, {r2-r7} /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ mov r4, r8 /* r4 = r8. */ @@ -380,7 +398,9 @@ PendSV_Handler: msr psp, r0 /* Remember the new top of stack for the task. */ subs r0, r0, #40 /* Move to the starting of the saved context. */ ldmia r0!, {r2-r7} /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ +#if ( configRUN_FREERTOS_SECURE_ONLY == 1 ) msr psplim, r2 /* Restore the PSPLIM register value for the task. */ +#endif bx r3 #endif /* configENABLE_MPU */ diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9], diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index 0ba29f9b4d8..0c5b76488d9 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9],