From 2693e5dad381d002fcf67dc9196a398a68cb74dc Mon Sep 17 00:00:00 2001 From: ChaeHee Won Date: Mon, 18 Feb 2019 09:58:22 -0500 Subject: [PATCH 1/2] Turn on nad off HSI clock if system clock use MSI clock. --- .../stm32l0/CatenaStm32L0_ReadAnalog.cpp | 80 ++++++++++++++++++- 1 file changed, 76 insertions(+), 4 deletions(-) diff --git a/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp b/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp index 6edb99e..9a635e4 100644 --- a/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp +++ b/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp @@ -1,4 +1,4 @@ -/* CatenaStm32L0_ReadAnalog.cpp Tue Dec 18 2018 15:41:52 chwon */ +/* CatenaStm32L0_ReadAnalog.cpp Mon Feb 18 2019 09:56:32 chwon */ /* @@ -8,10 +8,10 @@ Module: CatenaStm32L0_ReadAnalog.cpp CatenaStm32L0::ReadAnalog() Version: - V0.13.0 Tue Dec 18 2018 15:41:52 chwon Edit level 1 + V0.14.0 Mon Feb 18 2019 09:56:32 chwon Edit level 2 Copyright notice: - This file copyright (C) 2018 by + This file copyright (C) 2018-2019 by MCCI Corporation 3520 Krums Corners Road @@ -29,6 +29,9 @@ Revision history: 0.13.0 Tue Dec 18 2018 15:41:52 chwon Module created. + 0.14.0 Mon Feb 18 2019 09:56:32 chwon + Turn on nad off HSI clock if system clock use MSI clock. + */ #ifdef ARDUINO_ARCH_STM32 @@ -111,6 +114,18 @@ bool CatenaStm32L0_ReadAnalog( __HAL_RCC_ADC1_CLK_ENABLE(); +#if CATENA_CFG_SYSCLK < 16 + /* Set the Low Frequency Mode */ + /* ADC->CCR = ADC_CCR_LFMEN; -- it's not working with MSI clock */ + + /* ADC requires HSI clock, so enable it now */ + LL_RCC_HSI_Enable(); + while (LL_RCC_HSI_IsReady() != 1U) + { + /* Wait for HSI ready */ + } +#endif + fStatusOk = AdcCalibrate(); if (fStatusOk) @@ -158,6 +173,10 @@ bool CatenaStm32L0_ReadAnalog( ADC1->CR &= ~ADC_CR_ADVREGEN; ADC->CCR &= ~ADC_CCR_VREFEN; +#if CATENA_CFG_SYSCLK < 16 + LL_RCC_HSI_Disable(); +#endif + __HAL_RCC_ADC1_FORCE_RESET(); __HAL_RCC_ADC1_RELEASE_RESET(); __HAL_RCC_ADC1_CLK_DISABLE(); @@ -193,7 +212,15 @@ static bool AdcDisable(void) while (ADC1->CR & ADC_CR_ADSTP) { if ((millis() - uTime) > 10) + { + gLog.printf( + gLog.kError, + "?AdcDisable:" + " CR=%x\n", + ADC1->CR + ); return false; + } } ADC1->CR |= ADC_CR_ADDIS; @@ -201,27 +228,51 @@ static bool AdcDisable(void) while (ADC1->CR & ADC_CR_ADEN) { if ((millis() - uTime) > 10) + { + gLog.printf( + gLog.kError, + "?AdcDisable:" + " CR=%x\n", + ADC1->CR + ); return false; + } } return true; } static bool AdcCalibrate(void) { + static uint32_t s_uLastCalibTime = 0; uint32_t uTime; if (ADC1->CR & ADC_CR_ADEN) AdcDisable(); + uTime = millis(); + if ((uTime - s_uLastCalibTime) < 2000) + return true; + + s_uLastCalibTime = uTime; + /* turn on the cal bit */ ADC1->ISR = ADC_ISR_EOCAL; ADC1->CR |= ADC_CR_ADCAL; - uTime = millis(); while (! (ADC1->ISR & ADC_ISR_EOCAL)) { if ((millis() - uTime) > 10) + { + gLog.printf( + gLog.kError, + "?AdcCalibrate:" + " CCR=%x CR=%x ISR=%x\n", + ADC->CCR, + ADC1->CR, + ADC1->ISR + ); return false; + } } uint32_t calData = ADC1->DR; @@ -247,7 +298,16 @@ static bool AdcEnable(void) while (!(ADC1->ISR & ADC_ISR_ADRDY)) { if ((millis() - uTime) > 10) + { + gLog.printf( + gLog.kError, + "?AdcEnable:" + " CR=%x ISR=%x\n", + ADC1->CR, + ADC1->ISR + ); return false; + } } return true; } @@ -263,6 +323,12 @@ static bool AdcGetValue(uint32_t *value) if ((millis() - uTime) > 10) { *value = 0x0FFFu; + gLog.printf( + gLog.kError, + "?AdcGetValue:" + " ISR=%x\n", + rAdcIsr + ); return false; } } @@ -284,6 +350,12 @@ static bool AdcGetValue(uint32_t *value) return true; } + gLog.printf( + gLog.kError, + "?AdcGetValue:" + " ISR=%x\n", + rAdcIsr + ); // no more data in this sequence *value = 0x0FFFu; return false; From 06dfb7627421022e46d5030f898aa123286d2fe3 Mon Sep 17 00:00:00 2001 From: ChaeHee Won Date: Mon, 18 Feb 2019 16:41:07 -0500 Subject: [PATCH 2/2] Add ADC_CALIBRATE_TIME constexpr and comment out debug message. --- .../stm32l0/CatenaStm32L0_ReadAnalog.cpp | 83 ++++++++++--------- 1 file changed, 42 insertions(+), 41 deletions(-) diff --git a/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp b/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp index 8bc6ecb..45de14c 100644 --- a/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp +++ b/src/lib/stm32/stm32l0/CatenaStm32L0_ReadAnalog.cpp @@ -30,7 +30,7 @@ Revision history: Module created. 0.14.0 Mon Feb 18 2019 09:56:32 chwon - Turn on nad off HSI clock if system clock use MSI clock. + Turn on and off HSI clock if system clock use MSI clock. */ @@ -53,6 +53,7 @@ using namespace McciCatena; \****************************************************************************/ constexpr unsigned long ADC_TIMEOUT = 10; +constexpr unsigned long ADC_CALIBRATE_TIME = 2000; constexpr int STM32L0_ADC_CHANNEL_VREFINT = 17; constexpr int STM32L0_ADC_CHANNEL_TEMPSENSOR = 18; @@ -233,12 +234,12 @@ static bool AdcDisable(void) { if ((millis() - uTime) > ADC_TIMEOUT) { - gLog.printf( - gLog.kError, - "?AdcDisable:" - " CR=%x\n", - ADC1->CR - ); +// gLog.printf( +// gLog.kError, +// "?AdcDisable:" +// " CR=%x\n", +// ADC1->CR +// ); return false; } } @@ -249,12 +250,12 @@ static bool AdcDisable(void) { if ((millis() - uTime) > ADC_TIMEOUT) { - gLog.printf( - gLog.kError, - "?AdcDisable:" - " CR=%x\n", - ADC1->CR - ); +// gLog.printf( +// gLog.kError, +// "?AdcDisable:" +// " CR=%x\n", +// ADC1->CR +// ); return false; } } @@ -275,7 +276,7 @@ static bool AdcCalibrate(void) } uTime = millis(); - if ((uTime - s_uLastCalibTime) < 2000) + if ((uTime - s_uLastCalibTime) < ADC_CALIBRATE_TIME) return true; s_uLastCalibTime = uTime; @@ -288,14 +289,14 @@ static bool AdcCalibrate(void) { if ((millis() - uTime) > ADC_TIMEOUT) { - gLog.printf( - gLog.kError, - "?AdcCalibrate:" - " CCR=%x CR=%x ISR=%x\n", - ADC->CCR, - ADC1->CR, - ADC1->ISR - ); +// gLog.printf( +// gLog.kError, +// "?AdcCalibrate:" +// " CCR=%x CR=%x ISR=%x\n", +// ADC->CCR, +// ADC1->CR, +// ADC1->ISR +// ); return false; } } @@ -326,13 +327,13 @@ static bool AdcEnable(void) { if ((millis() - uTime) > ADC_TIMEOUT) { - gLog.printf( - gLog.kError, - "?AdcEnable:" - " CR=%x ISR=%x\n", - ADC1->CR, - ADC1->ISR - ); +// gLog.printf( +// gLog.kError, +// "?AdcEnable:" +// " CR=%x ISR=%x\n", +// ADC1->CR, +// ADC1->ISR +// ); return false; } } @@ -350,12 +351,12 @@ static bool AdcGetValue(uint32_t *value) if ((millis() - uTime) > ADC_TIMEOUT) { *value = 0x0FFFu; - gLog.printf( - gLog.kError, - "?AdcGetValue:" - " ISR=%x\n", - rAdcIsr - ); +// gLog.printf( +// gLog.kError, +// "?AdcGetValue:" +// " ISR=%x\n", +// rAdcIsr +// ); return false; } } @@ -377,12 +378,12 @@ static bool AdcGetValue(uint32_t *value) return true; } - gLog.printf( - gLog.kError, - "?AdcGetValue:" - " ISR=%x\n", - rAdcIsr - ); +// gLog.printf( +// gLog.kError, +// "?AdcGetValue:" +// " ISR=%x\n", +// rAdcIsr +// ); // no more data in this sequence *value = 0x0FFFu; return false;