diff --git a/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp b/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp index daddbf1167b..13c9e66a1d6 100644 --- a/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp +++ b/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp @@ -27,10 +27,12 @@ #include "netsocket/nsapi_types.h" #include "platform/mbed_power_mgmt.h" #include "platform/mbed_error.h" +#include "CacheAlignedBuffer.h" #include "stm32xx_emac_config.h" #include "stm32xx_emac.h" + #include "mbed-trace/mbed_trace.h" #if defined(ETH_IP_VERSION_V2) @@ -59,6 +61,7 @@ #include "lan8742/lan8742.h" #include "lwip/memp.h" #include "lwip/api.h" +#include "linker_scripts/stm32_eth_region_size_calcs.h" #endif using namespace std::chrono; @@ -75,46 +78,19 @@ using namespace std::chrono; #define STM_ETH_MTU_SIZE 1500 #define STM_ETH_IF_NAME "st" -#ifndef ETH_IP_VERSION_V2 - -#if defined (__ICCARM__) /*!< IAR Compiler */ -#pragma data_alignment=4 -#endif -__ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx DMA Descriptor */ - -#if defined (__ICCARM__) /*!< IAR Compiler */ -#pragma data_alignment=4 -#endif -__ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */ - -#if defined (__ICCARM__) /*!< IAR Compiler */ -#pragma data_alignment=4 -#endif -__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */ - -#if defined (__ICCARM__) /*!< IAR Compiler */ -#pragma data_alignment=4 -#endif -__ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */ - -#else // ETH_IP_VERSION_V2 - -#if defined ( __ICCARM__ ) /*!< IAR Compiler */ +#define ETH_RX_DESC_CNT MBED_CONF_STM32_EMAC_ETH_RXBUFNB +#define ETH_TX_DESC_CNT MBED_CONF_STM32_EMAC_ETH_TXBUFNB -#pragma location=0x30040000 -ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */ -#pragma location=0x30040100 -ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */ -#pragma location=0x30040400 -uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_MAX_PACKET_SIZE]; /* Ethernet Receive Buffers */ +ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".EthDescriptors"))); /* Ethernet Rx DMA Descriptors */ +ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".EthDescriptors"))); /* Ethernet Tx DMA Descriptors */ -#elif defined ( __GNUC__ ) /* GCC & ARMC6*/ +// Rx buffer addresses need to be aligned 4 bytes and to cache lines because we cache invalidate the buffers after receiving them. +mbed::StaticCacheAlignedBuffer Rx_Buff[ETH_RX_DESC_CNT] __attribute__((section(".EthBuffers"))); /* Ethernet Receive Buffers */ -ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */ -ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */ -uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_MAX_PACKET_SIZE] __attribute__((section(".RxArraySection"))); /* Ethernet Receive Buffers */ +// Tx buffers just need to be aligned to the nearest 4 bytes. +uint32_t Tx_Buff[ETH_TX_DESC_CNT][ETH_MAX_PACKET_SIZE / sizeof(uint32_t)] __attribute__((section(".EthBuffers"))); -#endif +#if defined(ETH_IP_VERSION_V2) static lan8742_Object_t LAN8742; @@ -206,6 +182,12 @@ bool _phy_is_up(int32_t phy_state) return phy_state > LAN8742_STATUS_LINK_DOWN; } +// Integer log2 of an integer. +// from https://stackoverflow.com/questions/994593/how-to-do-an-integer-log2-in-c +static inline uint32_t log2i(uint32_t x) { + return sizeof(uint32_t) * 8 - __builtin_clz(x) - 1; +} + static void MPU_Config(void) { MPU_Region_InitTypeDef MPU_InitStruct; @@ -214,34 +196,23 @@ static void MPU_Config(void) HAL_MPU_Disable(); /* Configure the MPU attributes as Device not cacheable - for ETH DMA descriptors */ + for ETH DMA descriptors. The linker script puts these into their own + cordoned off, power-of-2 sized region. */ MPU_InitStruct.Enable = MPU_REGION_ENABLE; - MPU_InitStruct.BaseAddress = 0x30040000; - MPU_InitStruct.Size = MPU_REGION_SIZE_1KB; MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - MPU_InitStruct.Number = MPU_REGION_NUMBER0; + MPU_InitStruct.Number = 4; // Mbed OS MPU config can use regions 0 through 3 MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; MPU_InitStruct.SubRegionDisable = 0x00; - MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; + MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; - HAL_MPU_ConfigRegion(&MPU_InitStruct); + extern uint8_t __eth_descriptors_start[0]; // <-- defined in linker script + MPU_InitStruct.BaseAddress = reinterpret_cast(__eth_descriptors_start); - /* Configure the MPU attributes as Cacheable write through - for LwIP RAM heap which contains the Tx buffers */ - MPU_InitStruct.Enable = MPU_REGION_ENABLE; - MPU_InitStruct.BaseAddress = 0x30044000; - MPU_InitStruct.Size = MPU_REGION_SIZE_16KB; - MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; - MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; - MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; - MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - MPU_InitStruct.Number = MPU_REGION_NUMBER1; - MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; - MPU_InitStruct.SubRegionDisable = 0x00; - MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; + // Use a logarithm to calculate the region size + MPU_InitStruct.Size = log2i(STM32_DMA_DESCRIP_REGION_SIZE) - 1; HAL_MPU_ConfigRegion(&MPU_InitStruct); @@ -341,7 +312,7 @@ bool STM32_EMAC::low_level_init_successful() } /* Initialize Rx Descriptors list: Chain Mode */ - if (HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB) != HAL_OK) { + if (HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, Rx_Buff[0].data(), ETH_RXBUFNB) != HAL_OK) { tr_error("HAL_ETH_DMARxDescListInit issue"); return false; } @@ -399,7 +370,7 @@ bool STM32_EMAC::low_level_init_successful() TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; for (idx = 0; idx < ETH_RX_DESC_CNT; idx++) { - HAL_ETH_DescAssignMemory(&EthHandle, idx, Rx_Buff[idx], NULL); + HAL_ETH_DescAssignMemory(&EthHandle, idx, reinterpret_cast(Rx_Buff[idx].data()), NULL); } tr_info("low_level_init_successful"); @@ -534,6 +505,12 @@ bool STM32_EMAC::link_out(emac_mem_buf_t *buf) Txbuffer[i].next = NULL; } +#if defined(__DCACHE_PRESENT) + // For chips with a cache, we need to evict the Tx data from cache to main memory. + // This ensures that the DMA controller can see the most up-to-date copy of the data. + SCB_CleanDCache_by_Addr(Txbuffer[i].buffer, Txbuffer[i].len); +#endif + i++; } @@ -661,7 +638,7 @@ int STM32_EMAC::low_level_input(emac_mem_buf_t **buf) /* Build Rx descriptor to be ready for next data reception */ HAL_ETH_BuildRxDescriptors(&EthHandle); -#if !(defined(DUAL_CORE) && defined(CORE_CM4)) +#if defined(__DCACHE_PRESENT) /* Invalidate data cache for ETH Rx Buffers */ SCB_InvalidateDCache_by_Addr((uint32_t *)RxBuff.buffer, frameLength); #endif diff --git a/platform/mbed_lib.json b/platform/mbed_lib.json index 12481a50210..2bfefa4e7b5 100644 --- a/platform/mbed_lib.json +++ b/platform/mbed_lib.json @@ -243,6 +243,9 @@ "MTS_DRAGONFLY_L471QG": { "crash-capture-enabled": true, "fatal-error-auto-reboot-enabled": true + }, + "MCU_STM32H7": { + "crash-capture-enabled": true } } } diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/CMakeLists.txt index 9b262670180..56726b29df8 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/CMakeLists.txt @@ -5,10 +5,8 @@ add_subdirectory(TARGET_NUCLEO_H723ZG EXCLUDE_FROM_ALL) if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h723xx.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h723xg.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h723xx.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h723xg.sct) endif() add_library(mbed-stm32h723xg INTERFACE) @@ -23,6 +21,4 @@ target_sources(mbed-stm32h723xg ${STARTUP_FILE} ) -mbed_set_linker_script(mbed-stm32h723xg ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h723xg INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/CMakeLists.txt index fb055f26a51..d7c858d1100 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/CMakeLists.txt @@ -5,10 +5,8 @@ add_subdirectory(TARGET_WIO_H725AE EXCLUDE_FROM_ALL) if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h725xx.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h725xe.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h725xx.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h725xe.sct) endif() add_library(mbed-stm32h725xe INTERFACE) @@ -23,6 +21,4 @@ target_sources(mbed-stm32h725xe ${STARTUP_FILE} ) -mbed_set_linker_script(mbed-stm32h725xe ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h725xe INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/CMakeLists.txt index 67bfdd66a82..701f273928a 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/CMakeLists.txt @@ -6,7 +6,6 @@ add_library(mbed-wio-h725ae INTERFACE) target_sources(mbed-wio-h725ae INTERFACE PeripheralPins.c - system_clock_override.c ) target_include_directories(mbed-wio-h725ae diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/system_clock_override.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/system_clock_override.c deleted file mode 100644 index b78f35d1198..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TARGET_WIO_H725AE/system_clock_override.c +++ /dev/null @@ -1,118 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2015-2021 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/** - * This file configures the system clock as follows: - *-------------------------------------------------------------------- - * System clock source | USE_PLL_HSE_XTAL (external 25 MHz xtal) - *-------------------------------------------------------------------- - * SYSCLK(MHz) | 550 - * AHBCLK (MHz) | 275 - * APB1CLK (MHz) | 137.5 - * APB2CLK (MHz) | 137.5 - * APB3CLK (MHz) | 137.5 - * APB4CLK (MHz) | 137.5 - * USB capable (48 MHz) | YES - *-------------------------------------------------------------------- -**/ - -#include "stm32h7xx.h" -#include "mbed_error.h" - -// clock source is selected with CLOCK_SOURCE in json config -#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - default 25MHz) - -#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)) -/******************************************************************************/ -/* PLL (clocked by HSE) used as System clock source */ -/******************************************************************************/ -uint8_t SetSysClock_PLL_HSE() -{ - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - -#if !defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY) - /** Supply configuration update enable - */ - HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY); -#endif - - /** Configure the main internal regulator output voltage - */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); - - while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - - /** Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; /* For USB and RNG clock */ - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; -#if HSE_VALUE==25000000 - RCC_OscInitStruct.PLL.PLLM = 2; - RCC_OscInitStruct.PLL.PLLN = 44; - RCC_OscInitStruct.PLL.PLLP = 1; - RCC_OscInitStruct.PLL.PLLQ = 5; - RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLFRACN = 0; -#else -#error Unsupported externall clock value, check HSE_VALUE define -#endif - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; - RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - return 0; // FAIL - } - - /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 - |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; - RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; - RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) - { - return 0; // FAIL - } - -#if DEVICE_USBDEVICE - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - return 0; // FAIL - } - - HAL_PWREx_EnableUSBVoltageDetector(); -#endif /* DEVICE_USBDEVICE */ - - return 1; // OK -} -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) */ - - - diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/cmsis_nvic.h index 05a41ecee71..65a1d222020 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/cmsis_nvic.h @@ -19,5 +19,4 @@ #define NVIC_NUM_VECTORS 180 #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START - #endif diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/CMakeLists.txt index 3ec917d33d8..1f4e60dd809 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/CMakeLists.txt @@ -3,10 +3,8 @@ if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h735xx.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h735xg.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h735xx.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h735xg.sct) endif() add_library(mbed-stm32h735xg INTERFACE) @@ -21,6 +19,4 @@ target_sources(mbed-stm32h735xg ${STARTUP_FILE} ) -mbed_set_linker_script(mbed-stm32h735xg ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h735xg INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/TOOLCHAIN_GCC_ARM/stm32h735xg.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/TOOLCHAIN_GCC_ARM/stm32h735xg.ld deleted file mode 100644 index 5f479936c85..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/TOOLCHAIN_GCC_ARM/stm32h735xg.ld +++ /dev/null @@ -1,203 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - __etext = .; - _sidata = .; - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") -} diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/cmsis_nvic.h index 7a89564f452..65a1d222020 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/cmsis_nvic.h @@ -18,6 +18,5 @@ #define MBED_CMSIS_NVIC_H #define NVIC_NUM_VECTORS 180 -#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START - +#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START #endif diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/CMakeLists.txt index 1d97c5a782b..aae9befa134 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/CMakeLists.txt @@ -5,10 +5,8 @@ add_subdirectory(TARGET_NUCLEO_H743ZI2 EXCLUDE_FROM_ALL) if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h743xx.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/STM32H743xI.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h743xx.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h743xI.sct) endif() add_library(mbed-stm32h743xi INTERFACE) @@ -23,6 +21,4 @@ target_include_directories(mbed-stm32h743xi . ) -mbed_set_linker_script(mbed-stm32h743xi ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h743xi INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld deleted file mode 100644 index 62fadc887a3..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld +++ /dev/null @@ -1,236 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -M_CRASH_DATA_RAM_SIZE = 0x100; - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - DTCMRAM (rwx) : ORIGIN = NVIC_RAM_VECTOR_ADDRESS + VECTORS_SIZE, LENGTH = 128K - VECTORS_SIZE - RAM (xrw) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE - RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K - RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K - ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - __etext = .; - _sidata = .; - - .crash_data_ram : - { - . = ALIGN(8); - __CRASH_DATA_RAM__ = .; - __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */ - KEEP(*(.keep.crash_data_ram)) - *(.m_crash_data_ram) /* This is a user defined section */ - . += M_CRASH_DATA_RAM_SIZE; - . = ALIGN(8); - __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ - } > DTCMRAM - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") - - .lwip_sec (NOLOAD) : { - . = ABSOLUTE(0x30040000); - *(.RxDecripSection) - - . = ABSOLUTE(0x30040100); - *(.TxDecripSection) - - . = ABSOLUTE(0x30040400); - *(.RxArraySection) - - . = ABSOLUTE(0x30044000); - *(.ethusbram) - - } >RAM_D2 AT> FLASH -} diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/CMakeLists.txt index da5979ac9e0..aed25c38be8 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/CMakeLists.txt @@ -3,10 +3,8 @@ if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h750xx.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h750xb.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h750xx.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h750xb.sct) endif() add_library(mbed-stm32h750xb INTERFACE) @@ -21,6 +19,4 @@ target_sources(mbed-stm32h750xb ${STARTUP_FILE} ) -mbed_set_linker_script(mbed-stm32h750xb ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h750xb INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/TOOLCHAIN_GCC_ARM/stm32h750xb.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/TOOLCHAIN_GCC_ARM/stm32h750xb.ld deleted file mode 100644 index 5f479936c85..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/TOOLCHAIN_GCC_ARM/stm32h750xb.ld +++ /dev/null @@ -1,203 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - __etext = .; - _sidata = .; - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") -} diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/CMakeLists.txt index 42eed028ac8..d89bf45ed8e 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/CMakeLists.txt @@ -3,10 +3,8 @@ if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h753xx.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h753xi.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h753xx.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h753xi.sct) endif() add_library(mbed-stm32h753xi INTERFACE) @@ -21,6 +19,4 @@ target_sources(mbed-stm32h753xi ${STARTUP_FILE} ) -mbed_set_linker_script(mbed-stm32h753xi ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h753xi INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/TOOLCHAIN_GCC_ARM/stm32h753xi.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/TOOLCHAIN_GCC_ARM/stm32h753xi.ld deleted file mode 100644 index 198b8f71d72..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/TOOLCHAIN_GCC_ARM/stm32h753xi.ld +++ /dev/null @@ -1,220 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE - RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K - RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - __etext = .; - _sidata = .; - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") - - .lwip_sec (NOLOAD) : { - . = ABSOLUTE(0x30040000); - *(.RxDecripSection) - - . = ABSOLUTE(0x30040100); - *(.TxDecripSection) - - . = ABSOLUTE(0x30040400); - *(.RxArraySection) - - . = ABSOLUTE(0x30044000); - *(.ethusbram) - - } >RAM_D2 AT> FLASH -} diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/CMakeLists.txt index f16a4d350cf..eba60520f86 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/CMakeLists.txt @@ -5,10 +5,8 @@ add_subdirectory(TARGET_NUCLEO_H7A3ZI_Q EXCLUDE_FROM_ALL) if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h7a3xxq.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h7a3xxq.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h7a3xxq.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h7a3xxq.sct) endif() add_library(mbed-stm32h7a3xiq INTERFACE) @@ -24,6 +22,4 @@ target_include_directories(mbed-stm32h7a3xiq . ) -mbed_set_linker_script(mbed-stm32h7a3xiq ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h7a3xiq INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/TOOLCHAIN_GCC_ARM/stm32h7a3xxq.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/TOOLCHAIN_GCC_ARM/stm32h7a3xxq.ld deleted file mode 100644 index 919077ec530..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/TOOLCHAIN_GCC_ARM/stm32h7a3xxq.ld +++ /dev/null @@ -1,207 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - DTCMRAM (rwx) : ORIGIN = NVIC_RAM_VECTOR_ADDRESS + VECTORS_SIZE, LENGTH = 128K - VECTORS_SIZE - RAM (xrw) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE - RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K - RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K - ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - __etext = .; - _sidata = .; - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") -} diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/CMakeLists.txt index 79325fa9b33..daeebeef9b4 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/CMakeLists.txt @@ -3,10 +3,8 @@ if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h7b3xxq.S) - set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h7b3xiq.ld) elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h7b3xxq.S) - set(LINKER_FILE TOOLCHAIN_ARM/stm32h7b3xiq.sct) endif() add_library(mbed-stm32h7b3xiq INTERFACE) @@ -21,6 +19,4 @@ target_sources(mbed-stm32h7b3xiq ${STARTUP_FILE} ) -mbed_set_linker_script(mbed-stm32h7b3xiq ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) - target_link_libraries(mbed-stm32h7b3xiq INTERFACE mbed-stm32h7) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/TOOLCHAIN_GCC_ARM/stm32h7b3xiq.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/TOOLCHAIN_GCC_ARM/stm32h7b3xiq.ld deleted file mode 100644 index 5f479936c85..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/TOOLCHAIN_GCC_ARM/stm32h7b3xiq.ld +++ /dev/null @@ -1,203 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - __etext = .; - _sidata = .; - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") -} diff --git a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/CMakeLists.txt index d292a06ac76..9477b74a098 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/CMakeLists.txt @@ -1,4 +1,6 @@ # Copyright (c) 2024 Jamie Smith # SPDX-License-Identifier: Apache-2.0 -add_subdirectory(STM32H745_47_FAMILY) \ No newline at end of file +add_subdirectory(STM32H7Ax_FAMILY) +add_subdirectory(STM32H745_47_FAMILY) +add_subdirectory(STM32H743_STM32H72x_FAMILIES) \ No newline at end of file diff --git a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H743_STM32H72x_FAMILIES/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H743_STM32H72x_FAMILIES/CMakeLists.txt new file mode 100644 index 00000000000..05074c289a3 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H743_STM32H72x_FAMILIES/CMakeLists.txt @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Jamie Smith +# SPDX-License-Identifier: Apache-2.0 +if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") + mbed_set_linker_script(mbed-stm32h743xi STM32H743_H72x.ld) + mbed_set_linker_script(mbed-stm32h723xg STM32H743_H72x.ld) + mbed_set_linker_script(mbed-stm32h725xe STM32H743_H72x.ld) + mbed_set_linker_script(mbed-stm32h735xg STM32H743_H72x.ld) + mbed_set_linker_script(mbed-stm32h750xb STM32H743_H72x.ld) + mbed_set_linker_script(mbed-stm32h753xi STM32H743_H72x.ld) +endif() diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TOOLCHAIN_GCC_ARM/stm32h725xe.ld b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H743_STM32H72x_FAMILIES/STM32H743_H72x.ld similarity index 68% rename from targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TOOLCHAIN_GCC_ARM/stm32h725xe.ld rename to targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H743_STM32H72x_FAMILIES/STM32H743_H72x.ld index 5a84b0645b2..4c25ce56e48 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/TOOLCHAIN_GCC_ARM/stm32h725xe.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H743_STM32H72x_FAMILIES/STM32H743_H72x.ld @@ -15,16 +15,8 @@ ****************************************************************************** */ -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif +#include "cmsis_nvic.h" +#include "../stm32_eth_region_size_calcs.h" M_CRASH_DATA_RAM_SIZE = 0x100; @@ -38,17 +30,15 @@ STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Round up MBED_VECTTABLE_RAM_SIZE to 8 bytes */ #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) -#define MBED_RAM0_START (MBED_RAM_START + MBED_VECTTABLE_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE) MEMORY { - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - SRAM_DTC (xrw) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE - SRAM (xrw) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE - SRAM_LOWER (xrw) : ORIGIN = 0x30000000, LENGTH = 32K - SRAM_UPPER (xrw) : ORIGIN = 0x38000000, LENGTH = 16K - SRAM_ITC (xrw) : ORIGIN = 0x00000000, LENGTH = 64K + FLASH (rx) : ORIGIN = MBED_CONFIGURED_ROM_BANK_IROM1_START, LENGTH = MBED_CONFIGURED_ROM_BANK_IROM1_SIZE + SRAM_DTC (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_DTC_START + MBED_VECTTABLE_RAM_SIZE, LENGTH = MBED_RAM_BANK_SRAM_DTC_SIZE - MBED_VECTTABLE_RAM_SIZE + SRAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D1_START, LENGTH = MBED_RAM_BANK_SRAM_D1_SIZE + SRAM_D2 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D2_START, LENGTH = MBED_RAM_BANK_SRAM_D2_SIZE + SRAM_D3 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D3_START, LENGTH = MBED_RAM_BANK_SRAM_D3_SIZE + SRAM_ITC (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_ITC_START, LENGTH = MBED_RAM_BANK_SRAM_ITC_SIZE } /* Linker script to place sections and symbol values. Should be used together @@ -124,6 +114,7 @@ SECTIONS __etext = .; _sidata = .; + /* Put crash data in the otherwise unused D3 SRAM */ .crash_data_ram : { . = ALIGN(8); @@ -134,36 +125,7 @@ SECTIONS . += M_CRASH_DATA_RAM_SIZE; . = ALIGN(8); __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ - } > SRAM_UPPER - - /* .stack section doesn't contains any symbols. It is only - * used for linker to reserve space for the isr stack section - * WARNING: .stack should come immediately after the last secure memory - * section. This provides stack overflow detection. */ - .stack (NOLOAD): - { - __StackLimit = .; - *(.stack*); - . += STACK_SIZE - (. - __StackLimit); - } > SRAM_DTC - - /* Set stack top to end of SRAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ADDR(.stack) + SIZEOF(.stack); - _estack = __StackTop; - __StackLimit = ADDR(.stack); - PROVIDE(__stack = __StackTop); - - /* Place holder for additional heap */ - .heap_0 (COPY): - { - __mbed_sbrk_start_0 = .; - . += (ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - .); - __mbed_krbs_start_0 = .; - } > SRAM_DTC - - /* Check if heap exceeds SRAM_DTC */ - ASSERT(__mbed_krbs_start_0 <= (ORIGIN(SRAM_DTC)+LENGTH(SRAM_DTC)), "Heap is too big for SRAM_DTC") + } > SRAM_D3 .data : AT (__etext) { @@ -200,9 +162,6 @@ SECTIONS } > SRAM - /* Check if data exceeds SRAM */ - ASSERT(__data_end__ <= (ORIGIN(SRAM)+LENGTH(SRAM)), "data is too big for SRAM") - /* Uninitialized data section * This region is not initialized by the C/C++ library and can be used to * store state across soft reboots. */ @@ -215,7 +174,7 @@ SECTIONS . = ALIGN(32); __uninitialized_end = .; } > SRAM - + .bss : { . = ALIGN(8); @@ -228,20 +187,54 @@ SECTIONS _ebss = .; } > SRAM - /* Check if bss exceeds SRAM */ - ASSERT(__bss_end__ <= (ORIGIN(SRAM)+LENGTH(SRAM)), "bss is too big for SRAM") - .heap (COPY): { __end__ = .; - end = __end__; - __mbed_sbrk_start = .; + PROVIDE(end = .); + PROVIDE(__mbed_sbrk_start = .); *(.heap*) - . += (ORIGIN(SRAM) + LENGTH(SRAM) - .); - __mbed_krbs_start = .; + . = ORIGIN(SRAM) + LENGTH(SRAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__mbed_krbs_start = .); __HeapLimit = .; } > SRAM - /* Check if data + heap exceeds SRAM limit */ - ASSERT(__HeapLimit <= (ORIGIN(SRAM)+LENGTH(SRAM)), "Heap is too big for SRAM") + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > SRAM + + /* Set stack top to end of SRAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(SRAM) + LENGTH(SRAM); + _estack = __StackTop; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds SRAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region SRAM overflowed with stack") + + /* Ethernet DMA descriptors should be at the start of SRAM_D2 because they need an MPU region + and because the CM4 and CM7 have to agree on their location.*/ + .eth_descriptors (NOLOAD) : { + ASSERT(. == ORIGIN(SRAM_D2), "Eth Descriptors region must be at the start of SRAM_D2"); + PROVIDE(__eth_descriptors_start = .); + *(.EthDescriptors) + . = __eth_descriptors_start + STM32_DMA_DESCRIP_REGION_SIZE; + } >SRAM_D2 + + /* Ethernet buffers are recommended to be in SRAM_D2 but don't need any special MPU region. */ + .eth_buffers (NOLOAD) : { + *(.EthBuffers) + } >SRAM_D2 + + /* Use the rest of DTCM as additional heap */ + .heap_0 (COPY): + { + PROVIDE(__mbed_sbrk_start_0 = .); + . += (ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - .); + PROVIDE(__mbed_krbs_start_0 = .); + } > SRAM_DTC } diff --git a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM4/STM32H745_H747_CM4.ld b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM4/STM32H745_H747_CM4.ld index 074a5955d87..02a3cf703c9 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM4/STM32H745_H747_CM4.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM4/STM32H745_H747_CM4.ld @@ -16,6 +16,9 @@ */ #include "cmsis_nvic.h" +#include "../../stm32_eth_region_size_calcs.h" + +M_CRASH_DATA_RAM_SIZE = 0x100; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools @@ -23,17 +26,17 @@ #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; + +/* Round up MBED_VECTTABLE_RAM_SIZE to 8 bytes */ +#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) MEMORY { - FLASH (rx) : ORIGIN = MBED_CONFIGURED_ROM_START, LENGTH = MBED_CONFIGURED_ROM_SIZE - DTCMRAM (rwx) : ORIGIN = MBED_RAM_BANK_SRAM_DTC_START + VECTORS_SIZE, LENGTH = 128K - MBED_RAM_BANK_SRAM_DTC_SIZE - RAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D1_START, LENGTH = MBED_RAM_BANK_SRAM_D1_SIZE - RAM_D2 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D2_START, LENGTH = MBED_RAM_BANK_SRAM_D2_SIZE - RAM_D3 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D3_START, LENGTH = MBED_RAM_BANK_SRAM_D3_SIZE - ITCMRAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_ITC_START, LENGTH = MBED_RAM_BANK_SRAM_ITC_SIZE + FLASH (rx) : ORIGIN = MBED_CONFIGURED_ROM_BANK_IROM1_START, LENGTH = MBED_CONFIGURED_ROM_BANK_IROM1_SIZE + SRAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D1_START, LENGTH = MBED_RAM_BANK_SRAM_D1_SIZE + SRAM_D2 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D2_START, LENGTH = MBED_RAM_BANK_SRAM_D2_SIZE + SRAM_D3 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D3_START, LENGTH = MBED_RAM_BANK_SRAM_D3_SIZE } /* Linker script to place sections and symbol values. Should be used together @@ -107,6 +110,16 @@ SECTIONS __exidx_end = .; __etext = .; + + /* Ethernet DMA descriptors should be at the start of SRAM_D2 because they need an MPU region + and because the CM4 and CM7 have to agree on their location.*/ + .eth_descriptors (NOLOAD) : { + ASSERT(. == ORIGIN(SRAM_D2), "Eth Descriptors region must be at the start of SRAM_D2"); + PROVIDE(__eth_descriptors_start = .); + *(.EthDescriptors) + . = __eth_descriptors_start + STM32_DMA_DESCRIP_REGION_SIZE; + } >SRAM_D2 + _sidata = .; .data : AT (__etext) @@ -142,7 +155,7 @@ SECTIONS __data_end__ = .; _edata = .; - } > RAM_D2 + } > SRAM_D2 /* Uninitialized data section * This region is not initialized by the C/C++ library and can be used to @@ -155,7 +168,7 @@ SECTIONS KEEP(*(.keep.uninitialized)) . = ALIGN(32); __uninitialized_end = .; - } > RAM_D2 + } > SRAM_D2 .bss : { @@ -167,24 +180,25 @@ SECTIONS . = ALIGN(8); __bss_end__ = .; _ebss = .; - } > RAM_D2 + } > SRAM_D2 .heap (COPY): { __end__ = .; PROVIDE(end = .); + PROVIDE(__mbed_sbrk_start = .); *(.heap*) - . = ORIGIN(RAM_D2) + LENGTH(RAM_D2) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + . = ORIGIN(SRAM_D2) + LENGTH(SRAM_D2) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__mbed_krbs_start = .); __HeapLimit = .; - } > RAM_D2 - + } > SRAM_D2 /* .stack_dummy section doesn't contains any symbols. It is only * used for linker to calculate size of stack sections, and assign * values to stack symbols later */ .stack_dummy (COPY): { *(.stack*) - } > RAM_D2 + } > SRAM_D2 /* Set stack top to end of RAM_D2, and stack limit move down by * size of stack_dummy section */ @@ -193,6 +207,26 @@ SECTIONS __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + /* Check if data + heap + stack exceeds SRAM_D2 limit */ + ASSERT(__StackLimit >= __HeapLimit, "region SRAM_D2 overflowed with stack") + + /* Put crash data in the otherwise unused D3 SRAM */ + .crash_data_ram : + { + /* Advance forward by 1 crash data ram size so that we don't overwrite the CM7's crash data */ + . += M_CRASH_DATA_RAM_SIZE; + + __CRASH_DATA_RAM__ = .; + __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */ + KEEP(*(.keep.crash_data_ram)) + *(.m_crash_data_ram) /* This is a user defined section */ + . += M_CRASH_DATA_RAM_SIZE; + . = ALIGN(8); + __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ + } > SRAM_D3 + + /* Ethernet buffers are recommended to be in SRAM_D2 but don't need any special MPU region. */ + .eth_buffers (NOLOAD) : { + *(.EthBuffers) + } >SRAM_D2 } diff --git a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM7/STM32H745_H747_CM7.ld b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM7/STM32H745_H747_CM7.ld index 57c2dc9e043..f875636dc17 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM7/STM32H745_H747_CM7.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H745_47_FAMILY/CM7/STM32H745_H747_CM7.ld @@ -16,6 +16,9 @@ */ #include "cmsis_nvic.h" +#include "../../stm32_eth_region_size_calcs.h" + +M_CRASH_DATA_RAM_SIZE = 0x100; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools @@ -23,21 +26,23 @@ #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; + +/* Round up MBED_VECTTABLE_RAM_SIZE to 8 bytes */ +#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) MEMORY { - FLASH (rx) : ORIGIN = MBED_CONFIGURED_ROM_START, LENGTH = MBED_CONFIGURED_ROM_SIZE - DTCMRAM (rwx) : ORIGIN = MBED_RAM_BANK_SRAM_DTC_START + VECTORS_SIZE, LENGTH = 128K - MBED_RAM_BANK_SRAM_DTC_SIZE - RAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D1_START, LENGTH = MBED_RAM_BANK_SRAM_D1_SIZE - RAM_D2 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D2_START, LENGTH = MBED_RAM_BANK_SRAM_D2_SIZE - RAM_D3 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D3_START, LENGTH = MBED_RAM_BANK_SRAM_D3_SIZE - ITCMRAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_ITC_START, LENGTH = MBED_RAM_BANK_SRAM_ITC_SIZE + FLASH (rx) : ORIGIN = MBED_CONFIGURED_ROM_BANK_IROM1_START, LENGTH = MBED_CONFIGURED_ROM_BANK_IROM1_SIZE + SRAM_DTC (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_DTC_START + MBED_VECTTABLE_RAM_SIZE, LENGTH = MBED_RAM_BANK_SRAM_DTC_SIZE - MBED_VECTTABLE_RAM_SIZE + SRAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D1_START, LENGTH = MBED_RAM_BANK_SRAM_D1_SIZE + SRAM_D2 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D2_START, LENGTH = MBED_RAM_BANK_SRAM_D2_SIZE + SRAM_D3 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D3_START, LENGTH = MBED_RAM_BANK_SRAM_D3_SIZE + SRAM_ITC (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_ITC_START, LENGTH = MBED_RAM_BANK_SRAM_ITC_SIZE } /* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. + * with other linker script that defines memory regions FLASH and SRAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler * @@ -142,7 +147,7 @@ SECTIONS __data_end__ = .; _edata = .; - } > RAM + } > SRAM /* Uninitialized data section * This region is not initialized by the C/C++ library and can be used to @@ -155,7 +160,7 @@ SECTIONS KEEP(*(.keep.uninitialized)) . = ALIGN(32); __uninitialized_end = .; - } > RAM + } > SRAM .bss : { @@ -167,16 +172,18 @@ SECTIONS . = ALIGN(8); __bss_end__ = .; _ebss = .; - } > RAM + } > SRAM .heap (COPY): { __end__ = .; PROVIDE(end = .); + PROVIDE(__mbed_sbrk_start = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + . = ORIGIN(SRAM) + LENGTH(SRAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__mbed_krbs_start = .); __HeapLimit = .; - } > RAM + } > SRAM /* .stack_dummy section doesn't contains any symbols. It is only * used for linker to calculate size of stack sections, and assign @@ -184,30 +191,51 @@ SECTIONS .stack_dummy (COPY): { *(.stack*) - } > RAM + } > SRAM - /* Set stack top to end of RAM, and stack limit move down by + /* Set stack top to end of SRAM, and stack limit move down by * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackTop = ORIGIN(SRAM) + LENGTH(SRAM); _estack = __StackTop; __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") - - .lwip_sec (NOLOAD) : { - . = ABSOLUTE(0x10040000); - *(.RxDecripSection) - - . = ABSOLUTE(0x10040100); - *(.TxDecripSection) - - . = ABSOLUTE(0x10040400); - *(.RxArraySection) - - . = ABSOLUTE(0x10044000); - *(.ethusbram) - - } >RAM_D2 AT> FLASH + /* Check if data + heap + stack exceeds SRAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region SRAM overflowed with stack") + + /* Ethernet DMA descriptors should be at the start of SRAM_D2 because they need an MPU region + and because the CM4 and CM7 have to agree on their location.*/ + .eth_descriptors (NOLOAD) : { + ASSERT(. == ORIGIN(SRAM_D2), "Eth Descriptors region must be at the start of SRAM_D2"); + PROVIDE(__eth_descriptors_start = .); + *(.EthDescriptors) + . = __eth_descriptors_start + STM32_DMA_DESCRIP_REGION_SIZE; + } >SRAM_D2 + + /* Ethernet buffers are recommended to be in SRAM_D2 but not required to be, so we will + put them in SRAM since SRAM2 is used by the CM4 */ + .eth_buffers (NOLOAD) : { + *(.EthBuffers) + } >SRAM + + /* Put crash data in the otherwise unused D3 SRAM */ + .crash_data_ram : + { + . = ALIGN(8); + __CRASH_DATA_RAM__ = .; + __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */ + KEEP(*(.keep.crash_data_ram)) + *(.m_crash_data_ram) /* This is a user defined section */ + . += M_CRASH_DATA_RAM_SIZE; + . = ALIGN(8); + __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ + } > SRAM_D3 + + /* Use the rest of DTCM as additional heap */ + .heap_0 (COPY): + { + PROVIDE(__mbed_sbrk_start_0 = .); + . += (ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - .); + PROVIDE(__mbed_krbs_start_0 = .); + } > SRAM_DTC } diff --git a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H7Ax_FAMILY/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H7Ax_FAMILY/CMakeLists.txt new file mode 100644 index 00000000000..6d52456d32a --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H7Ax_FAMILY/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Jamie Smith +# SPDX-License-Identifier: Apache-2.0 +if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") + mbed_set_linker_script(mbed-stm32h7a3xiq STM32H7Ax.ld) + mbed_set_linker_script(mbed-stm32h7b3xiq STM32H7Ax.ld) +endif() diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/TOOLCHAIN_GCC_ARM/stm32h723xg.ld b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H7Ax_FAMILY/STM32H7Ax.ld similarity index 68% rename from targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/TOOLCHAIN_GCC_ARM/stm32h723xg.ld rename to targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H7Ax_FAMILY/STM32H7Ax.ld index bf7b2159999..fbb3793f311 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/TOOLCHAIN_GCC_ARM/stm32h723xg.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/STM32H7Ax_FAMILY/STM32H7Ax.ld @@ -15,16 +15,8 @@ ****************************************************************************** */ -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif +#include "cmsis_nvic.h" +#include "../stm32_eth_region_size_calcs.h" M_CRASH_DATA_RAM_SIZE = 0x100; @@ -38,21 +30,19 @@ STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Round up MBED_VECTTABLE_RAM_SIZE to 8 bytes */ #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) -#define MBED_RAM0_START (MBED_RAM_START + MBED_VECTTABLE_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE) MEMORY { - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - SRAM_DTC (xrw) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE - SRAM (xrw) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE - SRAM_LOWER (xrw) : ORIGIN = 0x30000000, LENGTH = 32K - SRAM_UPPER (xrw) : ORIGIN = 0x38000000, LENGTH = 16K - SRAM_ITC (xrw) : ORIGIN = 0x00000000, LENGTH = 64K + FLASH (rx) : ORIGIN = MBED_CONFIGURED_ROM_BANK_IROM1_START, LENGTH = MBED_CONFIGURED_ROM_BANK_IROM1_SIZE + SRAM_DTC (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_DTC_START + MBED_VECTTABLE_RAM_SIZE, LENGTH = MBED_RAM_BANK_SRAM_DTC_SIZE - MBED_VECTTABLE_RAM_SIZE + SRAM (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_AHB_START, LENGTH = MBED_RAM_BANK_SRAM_AHB_SIZE + SRAM_AXI (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_AXI_START, LENGTH = MBED_RAM_BANK_SRAM_AXI_SIZE + SRAM_D3 (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_D3_START, LENGTH = MBED_RAM_BANK_SRAM_D3_SIZE + SRAM_ITC (xrw) : ORIGIN = MBED_RAM_BANK_SRAM_ITC_START, LENGTH = MBED_RAM_BANK_SRAM_ITC_SIZE } /* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. + * with other linker script that defines memory regions FLASH and SRAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler * @@ -123,48 +113,7 @@ SECTIONS __etext = .; _sidata = .; - - .crash_data_ram : - { - . = ALIGN(8); - __CRASH_DATA_RAM__ = .; - __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */ - KEEP(*(.keep.crash_data_ram)) - *(.m_crash_data_ram) /* This is a user defined section */ - . += M_CRASH_DATA_RAM_SIZE; - . = ALIGN(8); - __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ - } > SRAM_UPPER - - /* .stack section doesn't contains any symbols. It is only - * used for linker to reserve space for the isr stack section - * WARNING: .stack should come immediately after the last secure memory - * section. This provides stack overflow detection. */ - .stack (NOLOAD): - { - __StackLimit = .; - *(.stack*); - . += STACK_SIZE - (. - __StackLimit); - } > SRAM_DTC - - /* Set stack top to end of SRAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ADDR(.stack) + SIZEOF(.stack); - _estack = __StackTop; - __StackLimit = ADDR(.stack); - PROVIDE(__stack = __StackTop); - - /* Place holder for additional heap */ - .heap_0 (COPY): - { - __mbed_sbrk_start_0 = .; - . += (ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - .); - __mbed_krbs_start_0 = .; - } > SRAM_DTC - - /* Check if heap exceeds SRAM_DTC */ - ASSERT(__mbed_krbs_start_0 <= (ORIGIN(SRAM_DTC)+LENGTH(SRAM_DTC)), "Heap is too big for SRAM_DTC") - + .data : AT (__etext) { __data_start__ = .; @@ -200,9 +149,6 @@ SECTIONS } > SRAM - /* Check if bss exceeds SRAM */ - ASSERT(__data_end__ <= (ORIGIN(SRAM)+LENGTH(SRAM)), ".data is too big for SRAM") - /* Uninitialized data section * This region is not initialized by the C/C++ library and can be used to * store state across soft reboots. */ @@ -215,7 +161,7 @@ SECTIONS . = ALIGN(32); __uninitialized_end = .; } > SRAM - + .bss : { . = ALIGN(8); @@ -228,20 +174,66 @@ SECTIONS _ebss = .; } > SRAM - /* Check if bss exceeds SRAM */ - ASSERT(__bss_end__ <= (ORIGIN(SRAM)+LENGTH(SRAM)), "BSS is too big for SRAM") - .heap (COPY): { __end__ = .; - end = __end__; - __mbed_sbrk_start = .; + PROVIDE(end = .); + PROVIDE(__mbed_sbrk_start = .); *(.heap*) - . += (ORIGIN(SRAM) + LENGTH(SRAM) - .); - __mbed_krbs_start = .; + . = ORIGIN(SRAM) + LENGTH(SRAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__mbed_krbs_start = .); __HeapLimit = .; } > SRAM - /* Check if data + heap exceeds SRAM limit */ - ASSERT(__HeapLimit <= (ORIGIN(SRAM)+LENGTH(SRAM)), "Heap is too big for SRAM") + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > SRAM + + /* Set stack top to end of SRAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(SRAM) + LENGTH(SRAM); + _estack = __StackTop; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds SRAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region SRAM overflowed with stack") + + /* Put crash data in the otherwise unused D3 SRAM */ + .crash_data_ram : + { + . = ALIGN(8); + __CRASH_DATA_RAM__ = .; + __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */ + KEEP(*(.keep.crash_data_ram)) + *(.m_crash_data_ram) /* This is a user defined section */ + . += M_CRASH_DATA_RAM_SIZE; + . = ALIGN(8); + __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ + } > SRAM_D3 + + /* Ethernet DMA descriptors should be at the start of SRAM_AXI because they need an MPU region.*/ + .eth_descriptors (NOLOAD) : { + ASSERT(. == ORIGIN(SRAM_AXI), "Eth Descriptors region must be at the start of SRAM_D2"); + PROVIDE(__eth_descriptors_start = .); + *(.EthDescriptors) + . = __eth_descriptors_start + STM32_DMA_DESCRIP_REGION_SIZE; + } >SRAM_AXI + + /* Ethernet buffers are recommended to be in SRAM_AXI but don't need any special MPU region. */ + .eth_buffers (NOLOAD) : { + *(.EthBuffers) + } >SRAM_AXI + + /* Use the rest of DTCM as additional heap */ + .heap_0 (COPY): + { + PROVIDE(__mbed_sbrk_start_0 = .); + . += (ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - .); + PROVIDE(__mbed_krbs_start_0 = .); + } > SRAM_DTC } diff --git a/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/stm32_eth_region_size_calcs.h b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/stm32_eth_region_size_calcs.h new file mode 100644 index 00000000000..16f3499be33 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32H7/linker_scripts/stm32_eth_region_size_calcs.h @@ -0,0 +1,51 @@ +/* mbed Microcontroller Library + * Copyright (c) 2024 Jamie Smith + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * This file contains calculations for the size of the memory region used for the Ethernet buffer descriptors. + * This region must be a power-of-2 size so that it can be used as an MPU region. Also, in dual core + * CPUs, the CM4 and CM7 have to agree on its size so they don't define conflicting memory regions. + * + * So, this header has some fancy math to calculate it. Note that this header is included by + * linker scripts so it can only contain preprocessor code. + */ + +/* from here: https://stackoverflow.com/questions/22925016/rounding-up-to-powers-of-2-with-preprocessor-constants */ +#define POW2_CEIL(v) (1 + \ +(((((((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) | \ + ((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) >> 0x04))) | \ + ((((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) | \ + ((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) >> 0x04))) >> 0x02))) | \ + ((((((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) | \ + ((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) >> 0x04))) | \ + ((((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) | \ + ((((v) - 1) | (((v) - 1) >> 0x10) | \ + (((v) - 1) | (((v) - 1) >> 0x10) >> 0x08)) >> 0x04))) >> 0x02))) >> 0x01)))) + +/* Size of an ETH_DMADescTypeDef structure in bytes*/ +#define STM32_SIZEOF_ETH_DMA_DESCRIPTOR 24 + +/* Calculation of RAM size */ +#define STM32_TOTAL_DMA_DESCRIPTOR_RAM_NEEDED (STM32_SIZEOF_ETH_DMA_DESCRIPTOR * (MBED_CONF_STM32_EMAC_ETH_RXBUFNB + MBED_CONF_STM32_EMAC_ETH_TXBUFNB)) +#define STM32_DMA_DESCRIP_REGION_SIZE POW2_CEIL(STM32_TOTAL_DMA_DESCRIPTOR_RAM_NEEDED) \ No newline at end of file diff --git a/targets/targets.json5 b/targets/targets.json5 index 9a92265c647..2f738a12003 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3314,7 +3314,8 @@ "STM32H7_550MHZ" ], "macros_add": [ - "STM32H735xx" + "STM32H735xx", + "MBED_SPLIT_HEAP" ], "overrides": { "system_power_supply": "PWR_LDO_SUPPLY" @@ -3332,7 +3333,8 @@ "STM32H7_480MHZ" ], "macros_add": [ - "STM32H743xx" + "STM32H743xx", + "MBED_SPLIT_HEAP" ], "overrides": { "system_power_supply": "PWR_LDO_SUPPLY" @@ -3417,11 +3419,6 @@ "macros_add": [ "STM32H745xx" ], - "overrides": { - "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY", - // Cannot enable overdrive mode because the default power supply is SMPS - "enable-overdrive-mode": 0 - }, "device_name": "STM32H745ZITx" }, "MCU_STM32H745xI_CM4": { @@ -3461,17 +3458,15 @@ } }, "macros_add": [ - "CORE_CM7" + "CORE_CM7", + "MBED_SPLIT_HEAP" ] }, - "NUCLEO_H745ZI_Q_CM7": { - "inherits": [ - "MCU_STM32H745xI_CM7" - ], - "extra_labels_add": [ "NUCLEO_H745ZI_Q" ], + "NUCLEO_H745ZI_Q": { "supported_form_factors": [ "ARDUINO_UNO" ], + "public": false, "config": { "d11_configuration": { "help": "Value: PB_5 for the default board configuration, PA_7 in case of solder bridge update (SB33 on/ SB35 off)", @@ -3481,47 +3476,24 @@ "usb_speed": { "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", "value": "USE_USB_OTG_FS" - } - }, - "device_has_add": [ - "USBDEVICE" - ], - "overrides": { - "network-default-interface-type": "ETHERNET" - }, - "image_url": "https://www.st.com/bin/ecommerce/api/image.PF262651.en.feature-description-include-personalized-no-cpn-medium.jpg" - }, - "NUCLEO_H745ZI_Q_CM4": { - "inherits": [ - "MCU_STM32H745xI_CM4" - ], - "extra_labels_add": [ "NUCLEO_H745ZI_Q" ], - "supported_form_factors": [ - "ARDUINO_UNO" - ], - "config": { - "d11_configuration": { - "help": "Value: PB_5 for the default board configuration, PA_7 in case of solder bridge update (SB33 on/ SB35 off)", - "value": "PB_5", - "macro_name": "STM32_D11_SPI_ETHERNET_PIN" }, - "usb_speed": { - "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", - "value": "USE_USB_OTG_FS" - } }, "device_has_add": [ "USBDEVICE" ], "overrides": { - "network-default-interface-type": "ETHERNET" + "network-default-interface-type": "ETHERNET", + "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY", + // Cannot enable overdrive mode because the default power supply is SMPS + "enable-overdrive-mode": 0 }, "image_url": "https://www.st.com/bin/ecommerce/api/image.PF262651.en.feature-description-include-personalized-no-cpn-medium.jpg" }, - "NUCLEO_H745ZI_Q" : { - "inherits" : [ - "NUCLEO_H745ZI_Q_CM7" - ] + "NUCLEO_H745ZI_Q_CM7": { + inherits: ["MCU_STM32H745xI_CM7", "NUCLEO_H745ZI_Q"] + }, + "NUCLEO_H745ZI_Q_CM4": { + inherits: ["MCU_STM32H745xI_CM4", "NUCLEO_H745ZI_Q"] }, "MCU_STM32H747xI": { "inherits": [ @@ -3534,12 +3506,7 @@ ], "macros_add": [ "STM32H747xx" - ], - "overrides": { - "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY", - // Cannot enable overdrive mode because the default power supply is SMPS - "enable-overdrive-mode": 0 - } + ] }, "MCU_STM32H747xI_CM7": { "inherits": [ @@ -3558,12 +3525,48 @@ } }, "macros_add": [ - "CORE_CM7" + "CORE_CM7", + "MBED_SPLIT_HEAP" ] }, + "MCU_STM32H747xI_CM4": { + "inherits": [ + "MCU_STM32H747xI" + ], + "public": false, + "extra_labels_add": [ + "STM32H747xI_CM4" + ], + "core": "Cortex-M4F", + "memory_bank_config": { + // Select flash bank 2 + "IROM1": { + "start": 0x08100000, + "size": 0x100000 + } + }, + "macros_add": [ + "CORE_CM4", + "MBED_MPU_CUSTOM" + ], + "device_has_remove": [ + "MPU" + ], + "OUTPUT_EXT": "hex" + }, + "DISCO_H747I": { + "image_url": "https://mm.digikey.com/Volume0/opasdata/d220001/medias/images/310/MFG_STM32H747I-DISCO.jpg", + "public": false, + "overrides": { + "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY", + // Cannot enable overdrive mode because the default power supply is SMPS + "enable-overdrive-mode": 0 + } + }, "DISCO_H747I_CM7": { "inherits": [ - "MCU_STM32H747xI_CM7" + "MCU_STM32H747xI_CM7", + "DISCO_H747" ], "supported_form_factors": [ "ARDUINO_UNO", @@ -3583,39 +3586,12 @@ "detect_code": [ "0814" ], - "device_name": "STM32H747XIHx", - "image_url": "https://mm.digikey.com/Volume0/opasdata/d220001/medias/images/310/MFG_STM32H747I-DISCO.jpg" - }, - "DISCO_H747I": { - "inherits": [ - "DISCO_H747I_CM7" - ], - "image_url": "https://mm.digikey.com/Volume0/opasdata/d220001/medias/images/310/MFG_STM32H747I-DISCO.jpg" - }, - "MCU_STM32H747xI_CM4": { - "inherits": [ - "MCU_STM32H747xI" - ], - "public": false, - "extra_labels_add": [ - "STM32H747xI_CM4" - ], - "core": "Cortex-M4F", - "memory_bank_config": { - // Select flash bank 2 - "IROM1": { - "start": 0x08100000, - "size": 0x100000 - } - }, - "macros_add": [ - "CORE_CM4" - ], - "OUTPUT_EXT": "hex" + "device_name": "STM32H747XIHx" }, "DISCO_H747I_CM4": { "inherits": [ - "MCU_STM32H747xI_CM4" + "MCU_STM32H747xI_CM4", + "DISCO_H747" ], "extra_labels_add": [ "DISCO_H747I", @@ -3632,8 +3608,7 @@ "STMOD", "PMOD" ], - "device_name": "STM32H747XIHx", - "image_url": "https://mm.digikey.com/Volume0/opasdata/d220001/medias/images/310/MFG_STM32H747I-DISCO.jpg" + "device_name": "STM32H747XIHx" }, // Umbrella target for all Arduino boards that use an H747 chip "STM32H747_ARDUINO": { @@ -3694,42 +3669,10 @@ "image_url": "https://store.arduino.cc/cdn/shop/products/ABX00042_00.iso_1200x900.jpg?v=1675840144" }, "ARDUINO_PORTENTA_H7_M7": { - "inherits": ["ARDUINO_PORTENTA_H7"], - "core": "Cortex-M7FD", - "memory_bank_config": { - // Select flash bank 1 - "IROM1": { - "start": 0x08000000, - "size": 0x100000 - } - }, - "extra_labels_add": [ - "STM32H747xI_CM7" - ], - "macros_add": [ - "CORE_CM7" - ] + "inherits": ["ARDUINO_PORTENTA_H7", "MCU_STM32H747xI_CM7"], }, "ARDUINO_PORTENTA_H7_M4": { - "inherits": ["ARDUINO_PORTENTA_H7"], - "core": "Cortex-M4F", - "memory_bank_config": { - // Select flash bank 2 - "IROM1": { - "start": 0x08100000, - "size": 0x100000 - } - }, - "extra_labels_add": [ - "STM32H747xI_CM4" - ], - "macros_add": [ - "CORE_CM4", - "MBED_MPU_CUSTOM" - ], - "device_has_remove": [ - "MPU" - ] + "inherits": ["ARDUINO_PORTENTA_H7", "MCU_STM32H747xI_CM4"], }, "MCU_STM32H750xB": { "inherits": [ @@ -3742,7 +3685,8 @@ "STM32H7_480MHZ" ], "macros_add": [ - "STM32H750xx" + "STM32H750xx", + "MBED_SPLIT_HEAP" ], "overrides": { "system_power_supply": "PWR_LDO_SUPPLY" @@ -3760,7 +3704,8 @@ "STM32H7_480MHZ" ], "macros_add": [ - "STM32H753xx" + "STM32H753xx", + "MBED_SPLIT_HEAP" ], "overrides": { "system_power_supply": "PWR_LDO_SUPPLY" @@ -3777,14 +3722,10 @@ ], "macros_add": [ "STM32H7A3xxQ", - "STM32H7_280MHZ" + "STM32H7_280MHZ", + "MBED_SPLIT_HEAP" ], - "device_name": "STM32H7A3ZITxQ", - "overrides": { - "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY", - // Cannot enable overdrive mode because the default power supply is SMPS - "enable-overdrive-mode": 0 - } + "device_name": "STM32H7A3ZITxQ" }, "NUCLEO_H7A3ZI_Q": { "inherits": [ @@ -3796,6 +3737,11 @@ "detect_code": [ "0860" ], + "overrides": { + "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY", + // Cannot enable overdrive mode because the default power supply is SMPS + "enable-overdrive-mode": 0 + }, "image_url": "https://www.st.com/bin/ecommerce/api/image.PF267690.en.feature-description-include-personalized-no-cpn-medium.jpg" }, "MCU_STM32H7B3xIQ": { @@ -3809,7 +3755,8 @@ "STM32H7_280MHZ" ], "macros_add": [ - "STM32H7B3xxQ" + "STM32H7B3xxQ", + "MBED_SPLIT_HEAP" ], "device_name": "STM32H7B3ZITxQ", "overrides": {