Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[spi_device] spi_device_tpm_tx_rx_test setup #25824

Open
T-bertola opened this issue Jan 9, 2025 · 0 comments
Open

[spi_device] spi_device_tpm_tx_rx_test setup #25824

T-bertola opened this issue Jan 9, 2025 · 0 comments

Comments

@T-bertola
Copy link

Description

Greetings,
I am a student looking to implement the EarlGrey as a TPM for a personal project.
Currently I am trying to use the provided device test to write values to the register using the emulated SPI interface on the verilator simulator. When the test goes to read the write FIFO, I get a load access fault. This is the command I am sending the DUT via the /dev/ SPI Interface:
0x07, 0xD4, 0x00, 0x80
0x04, 0x12, 0x23, 0x34,
0x33, 0x00, 0x00, 0x0B.
I also pasted the console output stack trace for the error, it's most likely my test setup. Any help is greatly appreciated!

▒I00001 test_rom.c:158] kChipInfo: scm_revision=54697461
I00002 test_rom.c:230] Test ROM complete, jumping to flash (addr: 20000480)!
I00001 ottf_main.c:166] Running sw/device/tests/spi_device_tpm_tx_rx_test.c
I00002 spi_device_testutils.c:342] Specified slew rate not supported, trying supported slew rate
I00003 spi_device_testutils.c:348] Specified drive strength not supported, trying supported drive strength
I00004 spi_device_tpm_tx_rx_test.c:170] SYNC: Begin TPM Test
I00005 spi_device_tpm_tx_rx_test.c:173] Iteration 0
I00006 spi_device_tpm_tx_rx_test.c:189] Expecting 8 bytes from tpm write
===== Exception Frame @ 1001fdb8 =====
mepc=200055dc ra=20005282 t0=1001fddb t1=00000008
t2=00000038 s0=00000007 s1=00000008 a0=40051f80
a1=00001f80 a2=1001fea0 a3=00000008 a4=00000001
a5=00000000 a6=00000040 a7=20004188 s2=00000001
s3=1001fea0 s4=40050000 s5=00000004 s6=00001f80
s7=10001cb6 s8=00000000 s9=0000000a s10=0000baad
s11=00010000 t3=ffffffff t4=00000028 t5=00000001
t6=ffffffff msts=00001880
===== Call Stack =====
20004188
20005282
20000e5a
20001728
20001676
20000548
20000548
200004c4
E00007 ottf_isrs.c:99] FAULT: Load Access Fault. MCAUSE=00000005 MEPC=200055da MTVAL=40051f80
[2025-01-09T05:09:13Z INFO opentitantool::command::console] ExitFailure("FAULT: Load Access Fault. MCAUSE=00000005 MEPC=200055da MTVAL=40051f80\r\n")
[2025-01-09T05:09:13Z INFO opentitantool] Command result: Matched exit_failure expression

Stack backtrace:
   0: anyhow::__private::format_err
   1: <opentitantool::command::console::Console as opentitanlib::app::command::CommandDispatch>::run
   2: opentitantool::_::<impl opentitanlib::app::command::CommandDispatch for opentitantool::RootCommandHierarchy>::run
   3: opentitantool::execute
   4: opentitantool::main
   5: core::ops::function::FnOnce::call_once
   6: std::sys_common::backtrace::__rust_begin_short_backtrace
   7: std::rt::lang_start::{{closure}}
   8: core::ops::function::impls::<impl core::ops::function::FnOnce<A> for &F>::call_once
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/core/src/ops/function.rs:284:13
      std::panicking::try::do_call
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:524:40
      std::panicking::try
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:488:19
      std::panic::catch_unwind
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panic.rs:142:14
      std::rt::lang_start_internal::{{closure}}
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/rt.rs:148:48
      std::panicking::try::do_call
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:524:40
      std::panicking::try
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:488:19
      std::panic::catch_unwind
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panic.rs:142:14
      std::rt::lang_start_internal
             at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/rt.rs:148:20
   9: std::rt::lang_start
  10: main
  11: __libc_start_call_main
             at ./csu/../sysdeps/nptl/libc_start_call_main.h:58:16
  12: __libc_start_main_impl
             at ./csu/../csu/libc-start.c:392:3
  13: _start

Error: Matched exit_failure expression

Stack backtrace:
0: anyhow::__private::format_err
1: <opentitantool::command::console::Console as opentitanlib::app::command::CommandDispatch>::run
2: opentitantool::_::::run
3: opentitantool::execute
4: opentitantool::main
5: core::ops::function::FnOnce::call_once
6: std::sys_common::backtrace::__rust_begin_short_backtrace
7: std::rt::lang_start::{{closure}}
8: core::ops::function::impls::<impl core::ops::function::FnOnce for &F>::call_once
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/core/src/ops/function.rs:284:13
std::panicking::try::do_call
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:524:40
std::panicking::try
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:488:19
std::panic::catch_unwind
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panic.rs:142:14
std::rt::lang_start_internal::{{closure}}
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/rt.rs:148:48
std::panicking::try::do_call
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:524:40
std::panicking::try
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panicking.rs:488:19
std::panic::catch_unwind
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/panic.rs:142:14
std::rt::lang_start_internal
at /rustc/32303b219d4dffa447aa606bc11c7a648f44a862/library/std/src/rt.rs:148:20
9: std::rt::lang_start
10: main
11: __libc_start_call_main
at ./csu/../sysdeps/nptl/libc_start_call_main.h:58:16
12: __libc_start_main_impl
at ./csu/../csu/libc-start.c:392:3
13: _start
FAIL: //sw/device/tests:spi_device_tpm_tx_rx_test_sim_verilator

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

1 participant