From c3404462a378b22d068be8336dea64d885668beb Mon Sep 17 00:00:00 2001 From: Michael Schaffner Date: Thu, 8 Apr 2021 17:13:44 -0700 Subject: [PATCH] [padring] Scan role parameters Ideally, the scan role (none, scan-in, scan-out) would be captured as part of the pinout Hjson description. However, due to the need to keep this information in the foundry repo, an approach with a separate SV package is taken. The open-source version is just a generic assignment of scan roles. The scan role parameters for the synthesized ASIC target are defined in the foundry repo and will be read in when the "fileset_partner" flag is defined in the build flow. Signed-off-by: Michael Schaffner --- hw/top_earlgrey/chip_earlgrey_asic.core | 4 +- .../rtl/autogen/chip_earlgrey_asic.sv | 74 ++++++++++++++++- hw/top_earlgrey/rtl/scan_role_pkg.sv | 82 +++++++++++++++++++ hw/top_earlgrey/scan_role_pkg.core | 42 ++++++++++ util/topgen/templates/chiplevel.sv.tpl | 15 +++- 5 files changed, 212 insertions(+), 5 deletions(-) create mode 100644 hw/top_earlgrey/rtl/scan_role_pkg.sv create mode 100644 hw/top_earlgrey/scan_role_pkg.core diff --git a/hw/top_earlgrey/chip_earlgrey_asic.core b/hw/top_earlgrey/chip_earlgrey_asic.core index 27e7c3e5e816a..4e6f441654aef 100644 --- a/hw/top_earlgrey/chip_earlgrey_asic.core +++ b/hw/top_earlgrey/chip_earlgrey_asic.core @@ -10,8 +10,10 @@ filesets: - lowrisc:systems:top_earlgrey:0.1 - lowrisc:systems:top_earlgrey_pkg - lowrisc:systems:padring - - "!fileset_partner ? (lowrisc:systems:ast)" - "fileset_partner ? (partner:systems:ast)" + - "fileset_partner ? (partner:systems:scan_role_pkg)" + - "!fileset_partner ? (lowrisc:systems:ast)" + - "!fileset_partner ? (lowrisc:systems:scan_role_pkg)" files: - rtl/autogen/chip_earlgrey_asic.sv file_type: systemVerilogSource diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv index f7554e4ff9a2a..78719ba793d4c 100644 --- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv +++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv @@ -174,9 +174,81 @@ module chip_earlgrey_asic ( // to custom, stubbed or added pads. .NDioPads(22), .NMioPads(47), - // TODO: need to add ScanRole parameters .PhysicalPads(1), .NIoBanks(IoBankCount), + .DioScanRole ({ + scan_role_pkg::DioPadIor9ScanRole, + scan_role_pkg::DioPadIor8ScanRole, + scan_role_pkg::DioPadSpiDevCsLScanRole, + scan_role_pkg::DioPadSpiDevClkScanRole, + scan_role_pkg::DioPadSpiDevD3ScanRole, + scan_role_pkg::DioPadSpiDevD2ScanRole, + scan_role_pkg::DioPadSpiDevD1ScanRole, + scan_role_pkg::DioPadSpiDevD0ScanRole, + scan_role_pkg::DioPadSpiHostCsLScanRole, + scan_role_pkg::DioPadSpiHostClkScanRole, + scan_role_pkg::DioPadSpiHostD3ScanRole, + scan_role_pkg::DioPadSpiHostD2ScanRole, + scan_role_pkg::DioPadSpiHostD1ScanRole, + scan_role_pkg::DioPadSpiHostD0ScanRole, + scan_role_pkg::DioPadFlashTestMode1ScanRole, + scan_role_pkg::DioPadFlashTestMode0ScanRole, + scan_role_pkg::DioPadFlashTestVoltScanRole, + scan_role_pkg::DioPadCc2ScanRole, + scan_role_pkg::DioPadCc1ScanRole, + scan_role_pkg::DioPadUsbNScanRole, + scan_role_pkg::DioPadUsbPScanRole, + scan_role_pkg::DioPadPorNScanRole + }), + .MioScanRole ({ + scan_role_pkg::MioPadIor13ScanRole, + scan_role_pkg::MioPadIor12ScanRole, + scan_role_pkg::MioPadIor11ScanRole, + scan_role_pkg::MioPadIor10ScanRole, + scan_role_pkg::MioPadIor7ScanRole, + scan_role_pkg::MioPadIor6ScanRole, + scan_role_pkg::MioPadIor5ScanRole, + scan_role_pkg::MioPadIor4ScanRole, + scan_role_pkg::MioPadIor3ScanRole, + scan_role_pkg::MioPadIor2ScanRole, + scan_role_pkg::MioPadIor1ScanRole, + scan_role_pkg::MioPadIor0ScanRole, + scan_role_pkg::MioPadIoc12ScanRole, + scan_role_pkg::MioPadIoc11ScanRole, + scan_role_pkg::MioPadIoc10ScanRole, + scan_role_pkg::MioPadIoc9ScanRole, + scan_role_pkg::MioPadIoc8ScanRole, + scan_role_pkg::MioPadIoc7ScanRole, + scan_role_pkg::MioPadIoc6ScanRole, + scan_role_pkg::MioPadIoc5ScanRole, + scan_role_pkg::MioPadIoc4ScanRole, + scan_role_pkg::MioPadIoc3ScanRole, + scan_role_pkg::MioPadIoc2ScanRole, + scan_role_pkg::MioPadIoc1ScanRole, + scan_role_pkg::MioPadIoc0ScanRole, + scan_role_pkg::MioPadIob12ScanRole, + scan_role_pkg::MioPadIob11ScanRole, + scan_role_pkg::MioPadIob10ScanRole, + scan_role_pkg::MioPadIob9ScanRole, + scan_role_pkg::MioPadIob8ScanRole, + scan_role_pkg::MioPadIob7ScanRole, + scan_role_pkg::MioPadIob6ScanRole, + scan_role_pkg::MioPadIob5ScanRole, + scan_role_pkg::MioPadIob4ScanRole, + scan_role_pkg::MioPadIob3ScanRole, + scan_role_pkg::MioPadIob2ScanRole, + scan_role_pkg::MioPadIob1ScanRole, + scan_role_pkg::MioPadIob0ScanRole, + scan_role_pkg::MioPadIoa8ScanRole, + scan_role_pkg::MioPadIoa7ScanRole, + scan_role_pkg::MioPadIoa6ScanRole, + scan_role_pkg::MioPadIoa5ScanRole, + scan_role_pkg::MioPadIoa4ScanRole, + scan_role_pkg::MioPadIoa3ScanRole, + scan_role_pkg::MioPadIoa2ScanRole, + scan_role_pkg::MioPadIoa1ScanRole, + scan_role_pkg::MioPadIoa0ScanRole + }), .DioPadBank ({ IoBankVcc, // IOR9 IoBankVcc, // IOR8 diff --git a/hw/top_earlgrey/rtl/scan_role_pkg.sv b/hw/top_earlgrey/rtl/scan_role_pkg.sv new file mode 100644 index 0000000000000..1e9246a0b1e44 --- /dev/null +++ b/hw/top_earlgrey/rtl/scan_role_pkg.sv @@ -0,0 +1,82 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Open-source scan role definitions for pads. +// This is only relevant for the ASIC target. + +package scan_role_pkg; + + import prim_pad_wrapper_pkg::*; + + parameter scan_role_e DioPadPorNScanRole = NoScan; + parameter scan_role_e DioPadSpiHostD0ScanRole = NoScan; + parameter scan_role_e DioPadSpiHostD1ScanRole = NoScan; + parameter scan_role_e DioPadSpiHostD2ScanRole = NoScan; + parameter scan_role_e DioPadSpiHostD3ScanRole = NoScan; + parameter scan_role_e DioPadSpiHostClkScanRole = NoScan; + parameter scan_role_e DioPadSpiHostCsLScanRole = NoScan; + parameter scan_role_e DioPadSpiDevD0ScanRole = NoScan; + parameter scan_role_e DioPadSpiDevD1ScanRole = NoScan; + parameter scan_role_e DioPadSpiDevD2ScanRole = NoScan; + parameter scan_role_e DioPadSpiDevD3ScanRole = NoScan; + parameter scan_role_e DioPadSpiDevClkScanRole = NoScan; + parameter scan_role_e DioPadSpiDevCsLScanRole = NoScan; + parameter scan_role_e DioPadUsbPScanRole = NoScan; + parameter scan_role_e DioPadUsbNScanRole = NoScan; + parameter scan_role_e DioPadCc1ScanRole = NoScan; + parameter scan_role_e DioPadCc2ScanRole = NoScan; + parameter scan_role_e DioPadFlashTestVoltScanRole = NoScan; + parameter scan_role_e DioPadFlashTestMode0ScanRole = NoScan; + parameter scan_role_e DioPadFlashTestMode1ScanRole = NoScan; + parameter scan_role_e DioPadIor8ScanRole = NoScan; + parameter scan_role_e DioPadIor9ScanRole = NoScan; + parameter scan_role_e MioPadIoa0ScanRole = NoScan; + parameter scan_role_e MioPadIoa1ScanRole = NoScan; + parameter scan_role_e MioPadIoa2ScanRole = NoScan; + parameter scan_role_e MioPadIoa3ScanRole = NoScan; + parameter scan_role_e MioPadIoa4ScanRole = NoScan; + parameter scan_role_e MioPadIoa5ScanRole = NoScan; + parameter scan_role_e MioPadIoa6ScanRole = NoScan; + parameter scan_role_e MioPadIoa7ScanRole = NoScan; + parameter scan_role_e MioPadIoa8ScanRole = NoScan; + parameter scan_role_e MioPadIob0ScanRole = NoScan; + parameter scan_role_e MioPadIob1ScanRole = NoScan; + parameter scan_role_e MioPadIob2ScanRole = NoScan; + parameter scan_role_e MioPadIob3ScanRole = NoScan; + parameter scan_role_e MioPadIob4ScanRole = NoScan; + parameter scan_role_e MioPadIob5ScanRole = NoScan; + parameter scan_role_e MioPadIob6ScanRole = NoScan; + parameter scan_role_e MioPadIob7ScanRole = NoScan; + parameter scan_role_e MioPadIob8ScanRole = NoScan; + parameter scan_role_e MioPadIob9ScanRole = NoScan; + parameter scan_role_e MioPadIob10ScanRole = NoScan; + parameter scan_role_e MioPadIob11ScanRole = NoScan; + parameter scan_role_e MioPadIob12ScanRole = NoScan; + parameter scan_role_e MioPadIoc0ScanRole = NoScan; + parameter scan_role_e MioPadIoc1ScanRole = NoScan; + parameter scan_role_e MioPadIoc2ScanRole = NoScan; + parameter scan_role_e MioPadIoc3ScanRole = NoScan; + parameter scan_role_e MioPadIoc4ScanRole = NoScan; + parameter scan_role_e MioPadIoc5ScanRole = NoScan; + parameter scan_role_e MioPadIoc6ScanRole = NoScan; + parameter scan_role_e MioPadIoc7ScanRole = NoScan; + parameter scan_role_e MioPadIoc8ScanRole = NoScan; + parameter scan_role_e MioPadIoc9ScanRole = NoScan; + parameter scan_role_e MioPadIoc10ScanRole = NoScan; + parameter scan_role_e MioPadIoc11ScanRole = NoScan; + parameter scan_role_e MioPadIoc12ScanRole = NoScan; + parameter scan_role_e MioPadIor0ScanRole = NoScan; + parameter scan_role_e MioPadIor1ScanRole = NoScan; + parameter scan_role_e MioPadIor2ScanRole = NoScan; + parameter scan_role_e MioPadIor3ScanRole = NoScan; + parameter scan_role_e MioPadIor4ScanRole = NoScan; + parameter scan_role_e MioPadIor5ScanRole = NoScan; + parameter scan_role_e MioPadIor6ScanRole = NoScan; + parameter scan_role_e MioPadIor7ScanRole = NoScan; + parameter scan_role_e MioPadIor10ScanRole = NoScan; + parameter scan_role_e MioPadIor11ScanRole = NoScan; + parameter scan_role_e MioPadIor12ScanRole = NoScan; + parameter scan_role_e MioPadIor13ScanRole = NoScan; + +endpackage : scan_role_pkg diff --git a/hw/top_earlgrey/scan_role_pkg.core b/hw/top_earlgrey/scan_role_pkg.core new file mode 100644 index 0000000000000..57ea2b1eb16ba --- /dev/null +++ b/hw/top_earlgrey/scan_role_pkg.core @@ -0,0 +1,42 @@ +CAPI=2: +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 +name: "lowrisc:systems:scan_role_pkg:0.1" +description: "Open-source place-holder for scanrole parameters" + +filesets: + files_rtl: + depend: + - lowrisc:prim:pad_wrapper_pkg + files: + - rtl/scan_role_pkg.sv + file_type: systemVerilogSource + + files_verilator_waiver: + depend: + # common waivers + - lowrisc:lint:common + - lowrisc:lint:comportable + file_type: vlt + + files_ascentlint_waiver: + depend: + # common waivers + - lowrisc:lint:common + - lowrisc:lint:comportable + file_type: waiver + + files_veriblelint_waiver: + depend: + # common waivers + - lowrisc:lint:common + - lowrisc:lint:comportable + +targets: + default: &default_target + filesets: + - tool_verilator ? (files_verilator_waiver) + - tool_ascentlint ? (files_ascentlint_waiver) + - tool_veriblelint ? (files_veriblelint_waiver) + - files_rtl diff --git a/util/topgen/templates/chiplevel.sv.tpl b/util/topgen/templates/chiplevel.sv.tpl index 6a044e3e19853..c55dcb8a198c8 100644 --- a/util/topgen/templates/chiplevel.sv.tpl +++ b/util/topgen/templates/chiplevel.sv.tpl @@ -227,17 +227,26 @@ module chip_${top["name"]}_${target["name"]} ( .NDioPads(${len(dedicated_pads)}), .NMioPads(${len(muxed_pads)}), % if target["name"] == "asic": - // TODO: need to add ScanRole parameters .PhysicalPads(1), .NIoBanks(IoBankCount), + .DioScanRole ({ +% for pad in list(reversed(dedicated_pads)): + scan_role_pkg::${lib.Name.from_snake_case('dio_pad_' + pad["name"] + '_scan_role').as_camel_case()}${"" if loop.last else ","} +% endfor + }), + .MioScanRole ({ +% for pad in list(reversed(muxed_pads)): + scan_role_pkg::${lib.Name.from_snake_case('mio_pad_' + pad["name"] + '_scan_role').as_camel_case()}${"" if loop.last else ","} +% endfor + }), .DioPadBank ({ % for pad in list(reversed(dedicated_pads)): - ${lib.Name(['io', 'bank', pad["bank"]]).as_camel_case()}${" " if loop.last else ","} // ${pad['name']} + ${lib.Name.from_snake_case('io_bank_' + pad["bank"]).as_camel_case()}${" " if loop.last else ","} // ${pad['name']} % endfor }), .MioPadBank ({ % for pad in list(reversed(muxed_pads)): - ${lib.Name(['io', 'bank', pad["bank"]]).as_camel_case()}${" " if loop.last else ","} // ${pad['name']} + ${lib.Name.from_snake_case('io_bank_' + pad["bank"]).as_camel_case()}${" " if loop.last else ","} // ${pad['name']} % endfor }), % endif